[edk2-devel] [PATCH 0/3] RISC-V Edk2 Server Platform Reference board
1. Create qemu-based server reference board. 2. Fixed the hotkeys not working in SCT UI. Evan Chai (3): RISC-V/PlatformBootManagerLib: add terminal interaction interface RiscVPlatformPkg: introduce more Pcds for PCI initialization RiscVQemuServerPlatform: create qemu-based server reference board Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/Hand-Off-Block-Hob-List.jpg | Bin 0 -> 16901 bytes Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/PI_Boot_Phases.jpg | Bin 0 -> 196120 bytes Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/RISC-V_Platform_EDK2_Firmware_Enabling_Philosophy.jpg | Bin 0 -> 329871 bytes Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/V2_DXE_Foundation-3.jpg | Bin 0 -> 51521 bytes Platform/Qemu/RiscVQemuServerPlatform/Library/PciHostBridgeLibEcam/PciHostBridgeLibEcam.c | 386 ++ Platform/Qemu/RiscVQemuServerPlatform/Library/PciHostBridgeLibEcam/PciHostBridgeLibEcam.inf | 49 Platform/Qemu/RiscVQemuServerPlatform/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.c | 42 ++ Platform/Qemu/RiscVQemuServerPlatform/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf | 32 Platform/Qemu/RiscVQemuServerPlatform/Readme.md | 327 Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc | 703 +++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf | 284 ++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf.inc | 42 ++ Platform/Qemu/RiscVQemuServerPlatform/Sec/Cpu.c | 33 + Platform/Qemu/RiscVQemuServerPlatform/Sec/Memory.c | 318 +++ Platform/Qemu/RiscVQemuServerPlatform/Sec/Platform.c | 160 + Platform/Qemu/RiscVQemuServerPlatform/Sec/SecEntry.S | 19 +++ Platform/Qemu/RiscVQemuServerPlatform/Sec/SecMain.c | 110 Platform/Qemu/RiscVQemuServerPlatform/Sec/SecMain.h | 104
[edk2-devel] [PATCH 2/3] RiscVPlatformPkg: introduce more Pcds for PCI initialization
It is assumed that the current system only supports a single RC model. Cc: Andrei Warkentin Cc: Sunil V L Cc: Yong Li Signed-off-by: Evan Chai --- Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 16 1 file changed, 16 insertions(+) diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec index b45f48fd..8eeafb2b 100644 --- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec @@ -1,6 +1,7 @@ ## @file RiscVPlatformPkg.dec # This Package provides UEFI RISC-V platform modules and libraries. # +# Copyright (c) 2024, Intel Corporation. All rights reserved. # Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -89,6 +90,21 @@ [PcdsFeatureFlag] [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] + # + # RC initialization + # + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x1200 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x1201 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT32|0x1202 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT32|0x1203 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x1204 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x1205 + + # + # Inclusive range of allowed PCI buses. + # + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciBusMin|0x0|UINT32|0x1206 + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPciBusMax|0x0|UINT32|0x1207 [UserExtensions.TianoCore."ExtraFiles"] RiscVPlatformPkgExtra.uni -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116173): https://edk2.groups.io/g/devel/message/116173 Mute This Topic: https://groups.io/mt/104645142/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 1/3] RISC-V/PlatformBootManagerLib: add terminal interaction interface
Fixed the hotkey not wokring in SCT(like F5, F6, F9, etc...),
causing all SCT tests to be run only through the command line.
This change provides a standard terminal interaction interface
in the UEFI environment.
Cc: Andrei Warkentin
Cc: Sunil V L
Cc: Yong Li
Signed-off-by: Evan Chai
---
Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
| 7 ++-
Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h
| 12 +++-
Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
| 2 ++
Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformData.c
| 15 ++-
4 files changed, 33 insertions(+), 3 deletions(-)
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
index 21667f42..c2336a07 100644
---
a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
+++
b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
@@ -2,7 +2,7 @@
This file include all platform actions
Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All rights
reserved.
-Copyright (c) 2015, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -169,6 +169,11 @@ PlatformBootManagerBeforeConsole (
//
EfiEventGroupSignal ();
+ //
+ // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
+ //
+ PlatformUefiEnvHotkeyRegister ();
+
//
// Update the console variables.
//
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h
b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h
index 7da15b01..8b71045f 100644
---
a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h
+++
b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h
@@ -2,7 +2,7 @@
Head file for BDS Platform specific code
Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights
reserved.
-Copyright (c) 2015, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -106,4 +106,14 @@ PlatformBootManagerShowProgress (
IN UINTN PreviousValue
);
+/**
+ It provides a standard interface for interacting with terminal devices in
+ the UEFI environment.
+**/
+VOID
+EFIAPI
+PlatformUefiEnvHotkeyRegister (
+ VOID
+ );
+
#endif // _PLATFORM_BOOT_MANAGER_H
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index caefae3b..0dd0cd67 100644
---
a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++
b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -2,6 +2,7 @@
# Include all platform action which can be customized by IBV/OEM.
#
# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.
+# Copyright (c) 2024, Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -42,6 +43,7 @@
[Guids]
gEfiEndOfDxeEventGroupGuid
+ gEfiTtyTermGuid
[Protocols]
gEfiGenericMemTestProtocolGuid ## CONSUMES
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformData.c
b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformData.c
index 4a79c6ca..3b66f3c8 100644
--- a/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformData.c
+++ b/Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformData.c
@@ -3,7 +3,7 @@
ConIn/ConOut variables.
Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights
reserved.
-Copyright (c) 2015, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -51,3 +51,16 @@ PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {
0
}
};
+
+/**
+ It provides a standard interface for interacting with terminal devices in
+ the UEFI environment.
+**/
+VOID
+EFIAPI
+PlatformUefiEnvHotkeyRegister (
+ VOID
+ )
+{
+ CopyGuid (, );
+}
--
2.34.1
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[edk2-devel] [PATCH 0/3] RISC-V Edk2 Server Platform Reference board
1. Create qemu-based server reference board. 2. Fixed the hotkeys not working in SCT UI. Evan Chai (3): RISC-V/PlatformBootManagerLib: add terminal interaction interface RiscVPlatformPkg: introduce more Pcds for PCI initialization RiscVQemuServerPlatform: create qemu-based server reference board Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/Hand-Off-Block-Hob-List.jpg | Bin 0 -> 16901 bytes Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/PI_Boot_Phases.jpg | Bin 0 -> 196120 bytes Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/RISC-V_Platform_EDK2_Firmware_Enabling_Philosophy.jpg | Bin 0 -> 329871 bytes Platform/Qemu/RiscVQemuServerPlatform/Documents/Media/V2_DXE_Foundation-3.jpg | Bin 0 -> 51521 bytes Platform/Qemu/RiscVQemuServerPlatform/Library/PciHostBridgeLibEcam/PciHostBridgeLibEcam.c | 386 ++ Platform/Qemu/RiscVQemuServerPlatform/Library/PciHostBridgeLibEcam/PciHostBridgeLibEcam.inf | 49 Platform/Qemu/RiscVQemuServerPlatform/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.c | 42 ++ Platform/Qemu/RiscVQemuServerPlatform/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf | 32 Platform/Qemu/RiscVQemuServerPlatform/Readme.md | 327 Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.dsc | 703 +++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf | 284 ++ Platform/Qemu/RiscVQemuServerPlatform/RiscVQemuServerPlatform.fdf.inc | 42 ++ Platform/Qemu/RiscVQemuServerPlatform/Sec/Cpu.c | 33 + Platform/Qemu/RiscVQemuServerPlatform/Sec/Memory.c | 318 +++ Platform/Qemu/RiscVQemuServerPlatform/Sec/Platform.c | 160 + Platform/Qemu/RiscVQemuServerPlatform/Sec/SecEntry.S | 19 +++ Platform/Qemu/RiscVQemuServerPlatform/Sec/SecMain.c | 110 Platform/Qemu/RiscVQemuServerPlatform/Sec/SecMain.h | 104
Re: [edk2-devel] [PATCH 0/5] Platforms cleanup v1
Hi Sunil, Sorry to remind, do we need one more reviewer for it? Or you can help to merge it now? BR, Evan -Original Message- From: devel@edk2.groups.io On Behalf Of Sunil V L Sent: Thursday, April 6, 2023 1:32 PM To: devel@edk2.groups.io; Chai, Evan Subject: Re: [edk2-devel] [PATCH 0/5] Platforms cleanup v1 On Thu, Apr 06, 2023 at 01:15:21PM +0800, Chai, Evan wrote: > Booting to uefi shell is verfied in Qemu mode, The qemu command be > refered to '5a> Boot on QEMU' in > https://github.com/riscv-admin/riscv-uefi-edk2-docs > Thanks! Evan for fixing this. The series LGTM. Reviewed-by: Sunil V L -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102931): https://edk2.groups.io/g/devel/message/102931 Mute This Topic: https://groups.io/mt/98015394/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms][PATCH 5/5] Platform/ Siliocn/: Fix building failure caused by wrong lib.
RiscVSbiLib was implemented in MdePkg/Library/BaseRiscVSbiLib. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c | 4 +++- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf | 4 +++- Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 3 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 4 ++-- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 4 ++-- Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf | 2 ++ Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 3 ++- 7 files changed, 16 insertions(+), 8 deletions(-) diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c index 524b0a63..30ec8a8b 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -2,13 +2,15 @@ Reset System Library functions for RISC-V Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include #include -#include +#include /** This function causes a system-wide reset (cold reset), in which diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf index 8987adb9..605d9efd 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -2,6 +2,8 @@ # Library instance for ResetSystem library class for RISC-V using SBI ecalls # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. +# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -29,4 +31,4 @@ [LibraryClasses] DebugLib - RiscVEdk2SbiLib + RiscVSbiLib diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf index 1e8d53f4..8eef9fbb 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf @@ -2,6 +2,7 @@ # RISC-V SEC module. # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -52,7 +53,7 @@ RiscVCpuLib RiscVOpensbiLib RiscVOpensbiPlatformLib - RiscVEdk2SbiLib + RiscVSbiLib [FixedPcd] gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index 95bf5ac4..4dc24386 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -148,10 +148,10 @@ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf !endif RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf - RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf + RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf - CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf + CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf # Flattened Device Tree (FDT) access library FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc index 099c4e22..9dff112d 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -149,11 +149,11 @@ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf !endif RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf - RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf + RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
[edk2-devel] [edk2-platforms][PATCH 4/5] Silicon/RISC-V: remove redundant function code from RiscVCpuLib
They had been implemented in MdePkg/Library/BaseLib Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 20 +--- Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 41 + 2 files changed, 2 insertions(+), 59 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index efe85489..f1555843 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -2,6 +2,7 @@ RISC-V CPU library definitions. Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -96,23 +97,4 @@ RiscVReadMachineImplementId ( VOID ); -VOID - RiscVSetSupervisorAddressTranslationRegister (UINT64); - -VOID - RiscVSetSupervisorScratch (UINT64); - -UINT64 -RiscVGetSupervisorScratch ( - VOID - ); - -VOID - RiscVSetSupervisorStvec (UINT64); - -UINT64 -RiscVGetSupervisorStvec ( - VOID - ); - #endif diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S index e242c9b8..52ef0788 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S @@ -3,6 +3,7 @@ // RISC-V CPU functions. // // Copyright (c) 2016 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +// Copyright (c) 2023, Intel Corporation. All rights reserved. // // SPDX-License-Identifier: BSD-2-Clause-Patent // @@ -101,43 +102,3 @@ ASM_FUNC (RiscVReadMachineImplementId) csrr a0, RISCV_CSR_MACHINE_MIMPID ret -// -// Set Supervisor mode scratch. -// @param a0 : Value set to Supervisor mode scratch -// -ASM_FUNC (RiscVSetSupervisorScratch) -csrrw a1, RISCV_CSR_SUPERVISOR_SSCRATCH, a0 -ret - -// -// Get Supervisor mode scratch. -// @retval a0 : Value in Supervisor mode scratch -// -ASM_FUNC (RiscVGetSupervisorScratch) -csrr a0, RISCV_CSR_SUPERVISOR_SSCRATCH -ret - -// -// Set Supervisor mode trap vector. -// @param a0 : Value set to Supervisor mode trap vector -// -ASM_FUNC (RiscVSetSupervisorStvec) -csrrw a1, RISCV_CSR_SUPERVISOR_STVEC, a0 -ret - -// -// Get Supervisor mode scratch. -// @retval a0 : Value in Supervisor mode trap vector -// -ASM_FUNC (RiscVGetSupervisorStvec) -csrr a0, RISCV_CSR_SUPERVISOR_STVEC -ret - -// -// Set Supervisor Address Translation and -// Protection Register. -// -ASM_FUNC (RiscVSetSupervisorAddressTranslationRegister) -csrw RISCV_CSR_SUPERVISOR_SATP, a0 -ret - -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102596): https://edk2.groups.io/g/devel/message/102596 Mute This Topic: https://groups.io/mt/98099331/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms][PATCH 3/5] Silicon/RISC-V: remove redundant RiscVTimerLib
It will be replaced by UefiCpuPkg/Library/BaseRiscV64CpuTimerLib. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 11 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 1 + Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc| 11 ++- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf| 1 + Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf | 35 --- Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c | 199 --- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 6 +- 7 files changed, 15 insertions(+), 249 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index c26b4608..95bf5ac4 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -2,6 +2,7 @@ # RISC-V EFI on SiFive VC707 (U500) RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -228,7 +229,7 @@ RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf [LibraryClasses.common.DXE_CORE] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf @@ -245,7 +246,7 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -265,7 +266,7 @@ [LibraryClasses.common.UEFI_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -280,7 +281,7 @@ [LibraryClasses.common.DXE_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf @@ -300,7 +301,7 @@ [LibraryClasses.common.UEFI_APPLICATION] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf !ifdef $(DEBUG_ON_SERIAL_PORT) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index b17c960d..684d5cae 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -2,6 +2,7 @@ # Flash definition file on SiFive VC707 (U500) RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc index 4487913f..099c4e22 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++
[edk2-devel] [edk2-platforms][PATCH 1/5] Silicon/RISC-V/ProcessorPkg: remove redundant CpuDxe driver
UefiCpuPkg/CpuDxeRiscV64 will replace it later.
Cc: Daniel Schaefer
Cc: Sunil V L
Cc: Andrei Warkentin
Signed-off-by: Evan Chai
---
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 2 +-
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c| 310
--
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h| 198
--
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 49
-
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni | 13
-
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni | 14
--
9 files changed, 4 insertions(+), 588 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index fc1ed012..efcfdd35 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -466,7 +466,7 @@
#
# RISC-V Core module
#
- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+ UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
index 4ce19279..da4d3379 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
@@ -151,7 +151,7 @@ INF
Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServi
# RISC-V Core Drivers
INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf
-INF Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
diff --git
a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index e59955d0..d92f8166 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -465,7 +465,7 @@
#
# RISC-V Core module
#
- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+ UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
diff --git
a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index c58fa635..237ed74a 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -151,7 +151,7 @@ INF
Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServi
# RISC-V Core Drivers
INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf
-INF Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c
b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c
deleted file mode 100644
index 8d4d406e..
--- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/** @file
- RISC-V CPU DXE driver.
-
- Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All
rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "CpuDxe.h"
-
-//
-// Global Variables
-//
-STATIC BOOLEAN mInterruptState = FALSE;
-STATIC EFI_HANDLE mCpuHandle = NULL;
-
-EFI_CPU_ARCH_PROTOCOL gCpu = {
- CpuFlushCpuDataCache,
- CpuEnableInterrupt,
- CpuDisableInterrupt,
-
[edk2-devel] [edk2-platforms][PATCH 2/5] Platform/Sifive: remove redundant TimerDxe from Platform
It will be replaced by UefiCpuPkg/CpuTimerDxeRiscV64. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2 +- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2 +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 2 +- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c | 311 --- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h | 174 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni | 14 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf | 54 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni| 12 9 files changed, 4 insertions(+), 569 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index efcfdd35..c26b4608 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -460,7 +460,7 @@ # # RISC-V Platform module # - Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf + UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index da4d3379..b17c960d 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -150,7 +150,7 @@ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # RISC-V Core Drivers -INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +INF UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc index d92f8166..4487913f 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -459,7 +459,7 @@ # # RISC-V Platform module # - Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf + UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf index 237ed74a..9ae89647 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf @@ -150,7 +150,7 @@ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # RISC-V Core Drivers -INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +INF UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c deleted file mode 100644 index deb57992.. --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c +++ /dev/null @@ -1,311 +0,0 @@ -/** @file - RISC-V Timer Architectural Protocol for U5 series platform. - - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved. - - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "Timer.h" -#include -#include -#include -#include -#include -#include - -BOOLEAN TimerHandlerReentry = FALSE; - -// -// The handle onto which the Timer Architectural Protocol will be installed -// -STATIC EFI_HANDLE mTimerHandle = NULL; -
[edk2-devel] [edk2-platforms][PATCH 0/5] Platforms cleanup v2
Booting to uefi shell is verfied in Qemu mode, The qemu command be refered to '5a> Boot on QEMU' in https://github.com/riscv-admin/riscv-uefi-edk2-docs Evan Chai (5): Silicon/RISC-V/ProcessorPkg: remove redundant CpuDxe driver Platform/Sifive: remove redundant TimerDxe from Platform Silicon/RISC-V: remove redundant RiscVTimerLib Silicon/RISC-V: remove redundant function code from RiscVCpuLib Platform/ Siliocn/: Fix building failure caused by wrong lib. Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c | 4 +++- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf | 4 +++- Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 3 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 19 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 5 +++-- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 19 ++- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 5 +++-- Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf | 2 ++ Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c | 311 --- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h | 174 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni | 14 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf | 54 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni | 12 Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 20 +--- Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 41 + Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf | 35 --- Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c | 199 --- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 6 +- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 310 -- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h | 198 -- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 49 - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni | 13 - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni | 14 -- Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 3 ++- 24 files changed, 41 insertions(+), 1473 deletions(-) delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni delete mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
[edk2-devel] [PATCH 0/5] Platforms cleanup v1
Booting to uefi shell is verfied in Qemu mode, The qemu command be refered to '5a> Boot on QEMU' in https://github.com/riscv-admin/riscv-uefi-edk2-docs Evan Chai (5): Silicon/RISC-V/ProcessorPkg: remove redundant CpuDxe driver Platform/Sifive: remove redundant TimerDxe from Platform Silicon/RISC-V: remove redundant RiscVTimerLib Silicon/RISC-V: remove redundant function code from RiscVCpuLib Platform/ Siliocn/: Fix building failure caused by wrong lib. Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c | 4 +++- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf | 4 +++- Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 3 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 19 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 5 +++-- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 19 ++- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 5 +++-- Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf | 2 ++ Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c | 311 --- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h | 174 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni | 14 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf | 54 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni | 12 Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 20 +--- Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 41 + Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf | 35 --- Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c | 199 --- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 6 +- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 310 -- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h | 198 -- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 49 - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni | 13 - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni | 14 -- Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 3 ++- 24 files changed, 41 insertions(+), 1473 deletions(-) delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni delete mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
[edk2-devel] [PATCH 5/5] Platform/ Siliocn/: Fix building failure caused by wrong lib.
RiscVSbiLib was implemented in MdePkg/Library/BaseRiscVSbiLib. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c | 4 +++- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf | 4 +++- Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 3 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 4 ++-- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 4 ++-- Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf | 2 ++ Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 3 ++- 7 files changed, 16 insertions(+), 8 deletions(-) diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c index 524b0a63..30ec8a8b 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -2,13 +2,15 @@ Reset System Library functions for RISC-V Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include #include -#include +#include /** This function causes a system-wide reset (cold reset), in which diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf index 8987adb9..605d9efd 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -2,6 +2,8 @@ # Library instance for ResetSystem library class for RISC-V using SBI ecalls # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. +# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -29,4 +31,4 @@ [LibraryClasses] DebugLib - RiscVEdk2SbiLib + RiscVSbiLib diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf index 1e8d53f4..8eef9fbb 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf @@ -2,6 +2,7 @@ # RISC-V SEC module. # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -52,7 +53,7 @@ RiscVCpuLib RiscVOpensbiLib RiscVOpensbiPlatformLib - RiscVEdk2SbiLib + RiscVSbiLib [FixedPcd] gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index 95bf5ac4..4dc24386 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -148,10 +148,10 @@ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf !endif RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf - RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf + RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf - CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf + CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf # Flattened Device Tree (FDT) access library FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc index 099c4e22..9dff112d 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -149,11 +149,11 @@ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf !endif RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf - RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf + RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
[edk2-devel] [PATCH 4/5] Silicon/RISC-V: remove redundant function code from RiscVCpuLib
They had been implemented in MdePkg/Library/BaseLib Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 20 +--- Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 41 + 2 files changed, 2 insertions(+), 59 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index efe85489..f1555843 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -2,6 +2,7 @@ RISC-V CPU library definitions. Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -96,23 +97,4 @@ RiscVReadMachineImplementId ( VOID ); -VOID - RiscVSetSupervisorAddressTranslationRegister (UINT64); - -VOID - RiscVSetSupervisorScratch (UINT64); - -UINT64 -RiscVGetSupervisorScratch ( - VOID - ); - -VOID - RiscVSetSupervisorStvec (UINT64); - -UINT64 -RiscVGetSupervisorStvec ( - VOID - ); - #endif diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S index e242c9b8..52ef0788 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S @@ -3,6 +3,7 @@ // RISC-V CPU functions. // // Copyright (c) 2016 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +// Copyright (c) 2023, Intel Corporation. All rights reserved. // // SPDX-License-Identifier: BSD-2-Clause-Patent // @@ -101,43 +102,3 @@ ASM_FUNC (RiscVReadMachineImplementId) csrr a0, RISCV_CSR_MACHINE_MIMPID ret -// -// Set Supervisor mode scratch. -// @param a0 : Value set to Supervisor mode scratch -// -ASM_FUNC (RiscVSetSupervisorScratch) -csrrw a1, RISCV_CSR_SUPERVISOR_SSCRATCH, a0 -ret - -// -// Get Supervisor mode scratch. -// @retval a0 : Value in Supervisor mode scratch -// -ASM_FUNC (RiscVGetSupervisorScratch) -csrr a0, RISCV_CSR_SUPERVISOR_SSCRATCH -ret - -// -// Set Supervisor mode trap vector. -// @param a0 : Value set to Supervisor mode trap vector -// -ASM_FUNC (RiscVSetSupervisorStvec) -csrrw a1, RISCV_CSR_SUPERVISOR_STVEC, a0 -ret - -// -// Get Supervisor mode scratch. -// @retval a0 : Value in Supervisor mode trap vector -// -ASM_FUNC (RiscVGetSupervisorStvec) -csrr a0, RISCV_CSR_SUPERVISOR_STVEC -ret - -// -// Set Supervisor Address Translation and -// Protection Register. -// -ASM_FUNC (RiscVSetSupervisorAddressTranslationRegister) -csrw RISCV_CSR_SUPERVISOR_SATP, a0 -ret - -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102359): https://edk2.groups.io/g/devel/message/102359 Mute This Topic: https://groups.io/mt/98015415/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 3/5] Silicon/RISC-V: remove redundant RiscVTimerLib
It will be replaced by UefiCpuPkg/Library/BaseRiscV64CpuTimerLib. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 11 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 1 + Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc| 11 ++- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf| 1 + Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf | 35 --- Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c | 199 --- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 6 +- 7 files changed, 15 insertions(+), 249 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index c26b4608..95bf5ac4 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -2,6 +2,7 @@ # RISC-V EFI on SiFive VC707 (U500) RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -228,7 +229,7 @@ RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf [LibraryClasses.common.DXE_CORE] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf @@ -245,7 +246,7 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -265,7 +266,7 @@ [LibraryClasses.common.UEFI_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -280,7 +281,7 @@ [LibraryClasses.common.DXE_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf @@ -300,7 +301,7 @@ [LibraryClasses.common.UEFI_APPLICATION] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf !ifdef $(DEBUG_ON_SERIAL_PORT) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index b17c960d..684d5cae 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -2,6 +2,7 @@ # Flash definition file on SiFive VC707 (U500) RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc index 4487913f..099c4e22 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++
[edk2-devel] [PATCH 2/5] Platform/Sifive: remove redundant TimerDxe from Platform
It will be replaced by UefiCpuPkg/CpuTimerDxeRiscV64. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2 +- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2 +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 2 +- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c | 311 --- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h | 174 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni | 14 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf | 54 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni| 12 9 files changed, 4 insertions(+), 569 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index efcfdd35..c26b4608 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -460,7 +460,7 @@ # # RISC-V Platform module # - Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf + UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index da4d3379..b17c960d 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -150,7 +150,7 @@ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # RISC-V Core Drivers -INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +INF UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc index d92f8166..4487913f 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -459,7 +459,7 @@ # # RISC-V Platform module # - Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf + UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf index 237ed74a..9ae89647 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf @@ -150,7 +150,7 @@ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf # RISC-V Core Drivers -INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +INF UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c deleted file mode 100644 index deb57992.. --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c +++ /dev/null @@ -1,311 +0,0 @@ -/** @file - RISC-V Timer Architectural Protocol for U5 series platform. - - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved. - - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "Timer.h" -#include -#include -#include -#include -#include -#include - -BOOLEAN TimerHandlerReentry = FALSE; - -// -// The handle onto which the Timer Architectural Protocol will be installed -// -STATIC EFI_HANDLE mTimerHandle = NULL; -
[edk2-devel] [PATCH 1/5] Silicon/RISC-V/ProcessorPkg: remove redundant CpuDxe driver
UefiCpuPkg/CpuDxeRiscV64 will replace it later.
Cc: Daniel Schaefer
Cc: Sunil V L
Cc: Andrei Warkentin
Signed-off-by: Evan Chai
---
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 2 +-
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c| 310
--
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h| 198
--
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 49
-
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni | 13
-
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni | 14
--
9 files changed, 4 insertions(+), 588 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index fc1ed012..efcfdd35 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -466,7 +466,7 @@
#
# RISC-V Core module
#
- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+ UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
index 4ce19279..da4d3379 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
@@ -151,7 +151,7 @@ INF
Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServi
# RISC-V Core Drivers
INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf
-INF Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
diff --git
a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index e59955d0..d92f8166 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -465,7 +465,7 @@
#
# RISC-V Core module
#
- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+ UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
diff --git
a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index c58fa635..237ed74a 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -151,7 +151,7 @@ INF
Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServi
# RISC-V Core Drivers
INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf
-INF Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
+INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c
b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c
deleted file mode 100644
index 8d4d406e..
--- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/** @file
- RISC-V CPU DXE driver.
-
- Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All
rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "CpuDxe.h"
-
-//
-// Global Variables
-//
-STATIC BOOLEAN mInterruptState = FALSE;
-STATIC EFI_HANDLE mCpuHandle = NULL;
-
-EFI_CPU_ARCH_PROTOCOL gCpu = {
- CpuFlushCpuDataCache,
- CpuEnableInterrupt,
- CpuDisableInterrupt,
-
[edk2-devel] [PATCH 0/5] Platforms cleanup v1
*** BLURB HERE *** Evan Chai (5): Silicon/RISC-V/ProcessorPkg: remove redundant CpuDxe driver Platform/Sifive: remove redundant TimerDxe from Platform Silicon/RISC-V: remove redundant RiscVTimerLib Silicon/RISC-V: remove redundant function code from RiscVCpuLib Platform/ Siliocn/: Fix building failure caused by wrong lib. Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c | 4 +++- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf | 4 +++- Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 3 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 19 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 5 +++-- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 19 ++- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 5 +++-- Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf | 2 ++ Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c | 311 --- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h | 174 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni | 14 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf | 54 -- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni | 12 Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 20 +--- Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 41 + Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf | 35 --- Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c | 199 --- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 6 +- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 310 -- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h | 198 -- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 49 - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni | 13 - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni | 14 -- Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 3 ++- 24 files changed, 41 insertions(+), 1473 deletions(-) delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf delete mode 100644 Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni delete mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf delete mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c delete mode 100644
[edk2-devel] [PATCH 1/3] Silicon/RISC-V: Fix build failures caused by duplicated definition
Clean up redundant function code becasue they were merged to MdePkg. Cc: Daniel Schaefer Signed-off-by: Evan Chai Reviewed-by: Andrei Warkentin Reviewed-by: Sunil V L --- .../Library/ResetSystemLib/ResetSystemLib.c | 3 +- .../Library/ResetSystemLib/ResetSystemLib.inf | 3 +- .../Include/IndustryStandard/RiscV.h | 2 +- .../Include/Library/RiscVCpuLib.h | 20 +--- .../Include/Library/RiscVEdk2SbiLib.h | 41 ++--- .../ProcessorPkg/Library/RiscVCpuLib/Cpu.S| 42 + .../Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c | 46 +-- .../Library/RiscVTimerLib/RiscVTimerLib.c | 2 + 8 files changed, 13 insertions(+), 146 deletions(-) diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c index 524b0a63..b4b64421 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -2,13 +2,14 @@ Reset System Library functions for RISC-V Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include #include -#include +#include /** This function causes a system-wide reset (cold reset), in which diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf index 8987adb9..fff2 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -2,6 +2,7 @@ # Library instance for ResetSystem library class for RISC-V using SBI ecalls # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -29,4 +30,4 @@ [LibraryClasses] DebugLib - RiscVEdk2SbiLib + RiscVSbiLib diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h index 8710aae6..8114766c 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h @@ -2,6 +2,7 @@ RISC-V package definitions. Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -62,7 +63,6 @@ #define RISCV_CSR_MACHINE_MIE 0x304 #define RISCV_CSR_MACHINE_MTVEC0x305 -#define RISCV_TIMER_COMPARE_BITS 32 // // Machine Timer and Counter. // diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index efe85489..f1555843 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -2,6 +2,7 @@ RISC-V CPU library definitions. Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -96,23 +97,4 @@ RiscVReadMachineImplementId ( VOID ); -VOID - RiscVSetSupervisorAddressTranslationRegister (UINT64); - -VOID - RiscVSetSupervisorScratch (UINT64); - -UINT64 -RiscVGetSupervisorScratch ( - VOID - ); - -VOID - RiscVSetSupervisorStvec (UINT64); - -UINT64 -RiscVGetSupervisorStvec ( - VOID - ); - #endif diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h index 36eb16e1..d9369269 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h @@ -2,6 +2,7 @@ Library to call the RISC-V SBI ecalls Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -9,8 +10,8 @@ - Hart - Hardware Thread, similar to a CPU core **/ -#ifndef RISCV_SBI_LIB_H_ -#define RISCV_SBI_LIB_H_ +#ifndef RISCV_SBI_LIB2_H_ +#define RISCV_SBI_LIB2_H_ #include #include @@ -474,42 +475,6 @@ SbiRemoteHfenceVvma ( IN UINTN Size ); -/// -/// Firmware System Reset (SRST) Extension -/// - -/** - Reset the system - - The System Reset Extension provides a function that allow the supervisor - software to request system-level reboot or shutdown. The term "system" refers - to the world-view of supervisor software and the underlying SBI - implementation could be machine mode firmware or
[edk2-devel] [PATCH 3/3] Platform/SiFive: Fixed build failure casued by wrong alignment
The lib and driver should be aligned to Mdepkg. Cc: Daniel Schaefer Signed-off-by: Evan Chai Reviewed-by: Andrei Warkentin Reviewed-by: Sunil V L --- .../U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 15 --- .../U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2 +- .../FreedomU540HiFiveUnleashedBoard/U540.dsc| 17 + .../FreedomU540HiFiveUnleashedBoard/U540.fdf| 2 +- 4 files changed, 19 insertions(+), 17 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index fc1ed012..372bb8fc 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -2,6 +2,7 @@ # RISC-V EFI on SiFive VC707 (U500) RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -150,7 +151,7 @@ RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf - CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf + CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf # Flattened Device Tree (FDT) access library FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf @@ -228,7 +229,7 @@ RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf [LibraryClasses.common.DXE_CORE] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf @@ -245,7 +246,7 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -265,7 +266,7 @@ [LibraryClasses.common.UEFI_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf @@ -280,7 +281,7 @@ [LibraryClasses.common.DXE_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf @@ -300,7 +301,7 @@ [LibraryClasses.common.UEFI_APPLICATION] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf !ifdef $(DEBUG_ON_SERIAL_PORT) @@ -466,7 +467,7 @@ # # RISC-V Core module # - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf + UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index 4ce19279..da4d3379 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -151,7 +151,7 @@ INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServi # RISC-V Core Drivers INF
[edk2-devel] [PATCH 2/3] Platform/SiFive: align the library and driver to MdePkg
There are almost same implementation in MdePkg, the part in
platform package can be deprecated.
Cc: Daniel Schaefer
Signed-off-by: Evan Chai
Reviewed-by: Andrei Warkentin
Reviewed-by: Sunil V L
---
.../RiscVTimerLib/BaseRiscVTimerLib.inf | 35 --
.../Library/RiscVTimerLib/RiscVTimerLib.c | 201
.../RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 13 +-
.../ProcessorPkg/Universal/CpuDxe/CpuDxe.c| 310 --
.../ProcessorPkg/Universal/CpuDxe/CpuDxe.h| 198 ---
.../ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 49 ---
.../ProcessorPkg/Universal/CpuDxe/CpuDxe.uni | 13 -
.../Universal/CpuDxe/CpuDxeExtra.uni | 14 -
8 files changed, 6 insertions(+), 827 deletions(-)
delete mode 100644
Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
delete mode 100644
Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c
delete mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c
delete mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h
delete mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
delete mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni
delete mode 100644 Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni
diff --git
a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
deleted file mode 100644
index 3c61149d..
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+++ /dev/null
@@ -1,35 +0,0 @@
-## @file
-# RISC-V Timer Library Instance.
-#
-# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All
rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION= 0x0001001b
- BASE_NAME = BaseRiscVTimerLib
- FILE_GUID = F0450728-3221-488E-8C63-BD3A8DF500E2
- MODULE_TYPE= BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = TimerLib
-
-[Sources]
- RiscVTimerLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
-
-[Pcd]
- gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerTickInNanoSecond
- gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz
-
-[LibraryClasses]
- BaseLib
- PcdLib
- RiscVCpuLib
- MachineModeTimerLib
-
-
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c
b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c
deleted file mode 100644
index 40a04d60..
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c
+++ /dev/null
@@ -1,201 +0,0 @@
-/** @file
- RISC-V instance of Timer Library.
-
- Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All
rights reserved.
- Copyright (c) 2023, Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include
-#include
-#include
-#include
-#include
-#include
-
-/**
- Stalls the CPU for at least the given number of ticks.
-
- Stalls the CPU for at least the given number of ticks. It's invoked by
- MicroSecondDelay() and NanoSecondDelay().
-
- @param Delay A period of time to delay in ticks.
-
-**/
-VOID
-InternalRiscVTimerDelay (
- IN UINT32 Delay
- )
-{
- UINT32 Ticks;
- UINT32 Times;
-
- Times = Delay >> (RISCV_TIMER_COMPARE_BITS - 2);
- Delay &= ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1);
- do {
-//
-// The target timer count is calculated here
-//
-Ticks = RiscVReadMachineTimerInterface () + Delay;
-Delay = 1 << (RISCV_TIMER_COMPARE_BITS - 2);
-while (((Ticks - RiscVReadMachineTimerInterface ()) & (1 <<
(RISCV_TIMER_COMPARE_BITS - 1))) == 0) {
- CpuPause ();
-}
- } while (Times-- > 0);
-}
-
-/**
- Stalls the CPU for at least the given number of microseconds.
-
- Stalls the CPU for the number of microseconds specified by MicroSeconds.
-
- @param MicroSeconds The minimum number of microseconds to delay.
-
- @return MicroSeconds
-
-**/
-UINTN
-EFIAPI
-MicroSecondDelay (
- IN UINTN MicroSeconds
- )
-{
- InternalRiscVTimerDelay (
-(UINT32)DivU64x32 (
- MultU64x32 (
-MicroSeconds,
-PcdGet64 (PcdRiscVMachineTimerFrequencyInHerz)
-),
- 100u
- )
-);
- return MicroSeconds;
-}
-
-/**
- Stalls the CPU for at least the given number of nanoseconds.
-
- Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
-
- @param NanoSeconds The minimum number of nanoseconds to delay.
-
- @return NanoSeconds
-
-**/
-UINTN
-EFIAPI
-NanoSecondDelay (
- IN UINTN NanoSeconds
- )
-{
- InternalRiscVTimerDelay (
-(UINT32)DivU64x32 (
- MultU64x32 (
-NanoSeconds,
-PcdGet64 (PcdRiscVMachineTimerFrequencyInHerz)
-),
- 10u
- )
-);
- return
[edk2-devel] [PATCH 1/3] Silicon/RISC-V: Fix build failures caused by duplicated definition
Clean up redundant function code becasue they were merged to MdePkg. Cc: Daniel Schaefer Signed-off-by: Evan Chai Reviewed-by: Andrei Warkentin Reviewed-by: Sunil V L --- .../Library/ResetSystemLib/ResetSystemLib.c | 3 +- .../Library/ResetSystemLib/ResetSystemLib.inf | 3 +- .../Include/IndustryStandard/RiscV.h | 2 +- .../Include/Library/RiscVCpuLib.h | 20 +--- .../Include/Library/RiscVEdk2SbiLib.h | 37 +-- .../ProcessorPkg/Library/RiscVCpuLib/Cpu.S| 42 + .../Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c | 46 +-- .../Library/RiscVTimerLib/RiscVTimerLib.c | 2 + 8 files changed, 11 insertions(+), 144 deletions(-) diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c index 524b0a63..b4b64421 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -2,13 +2,14 @@ Reset System Library functions for RISC-V Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ #include #include -#include +#include /** This function causes a system-wide reset (cold reset), in which diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf index 8987adb9..fff2 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -2,6 +2,7 @@ # Library instance for ResetSystem library class for RISC-V using SBI ecalls # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +# Copyright (c) 2023, Intel Corporation. All rights reserved. # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -29,4 +30,4 @@ [LibraryClasses] DebugLib - RiscVEdk2SbiLib + RiscVSbiLib diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h index 8710aae6..8114766c 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h @@ -2,6 +2,7 @@ RISC-V package definitions. Copyright (c) 2021-2022, Hewlett Packard Enterprise Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -62,7 +63,6 @@ #define RISCV_CSR_MACHINE_MIE 0x304 #define RISCV_CSR_MACHINE_MTVEC0x305 -#define RISCV_TIMER_COMPARE_BITS 32 // // Machine Timer and Counter. // diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index efe85489..f1555843 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -2,6 +2,7 @@ RISC-V CPU library definitions. Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -96,23 +97,4 @@ RiscVReadMachineImplementId ( VOID ); -VOID - RiscVSetSupervisorAddressTranslationRegister (UINT64); - -VOID - RiscVSetSupervisorScratch (UINT64); - -UINT64 -RiscVGetSupervisorScratch ( - VOID - ); - -VOID - RiscVSetSupervisorStvec (UINT64); - -UINT64 -RiscVGetSupervisorStvec ( - VOID - ); - #endif diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h index 36eb16e1..e05e4daa 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h @@ -2,6 +2,7 @@ Library to call the RISC-V SBI ecalls Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -474,42 +475,6 @@ SbiRemoteHfenceVvma ( IN UINTN Size ); -/// -/// Firmware System Reset (SRST) Extension -/// - -/** - Reset the system - - The System Reset Extension provides a function that allow the supervisor - software to request system-level reboot or shutdown. The term "system" refers - to the world-view of supervisor software and the underlying SBI - implementation could be machine mode firmware or hypervisor. - - Valid parameters for ResetType and ResetReason are defined in sbi_ecall_interface.h - - #define SBI_SRST_RESET_TYPE_SHUTDOWN0x0 - #define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1 - #define
[edk2-devel] [PATCH edk2-platforms 1/1] Silicon/RiscVEdk2SbiLib.h: correct a duplicated macro definition
RiscVEdk2SbiLib.h has the same macro defination as BaseRiscVSbiLib.h, the latter one was merged to MdePkg. Signed-off-by: Evan Chai --- .../RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h| 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h index 36eb16e1..00fdca64 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h @@ -2,6 +2,7 @@ Library to call the RISC-V SBI ecalls Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -9,8 +10,8 @@ - Hart - Hardware Thread, similar to a CPU core **/ -#ifndef RISCV_SBI_LIB_H_ -#define RISCV_SBI_LIB_H_ +#ifndef RISCV_SBI_LIB2_H_ +#define RISCV_SBI_LIB2_H_ #include #include -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100538): https://edk2.groups.io/g/devel/message/100538 Mute This Topic: https://groups.io/mt/97285412/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms 1/1] Silicon/RISC-V: Fix a build failure in RiscVCpuLib
From: "Chai, Evan" RiscVSetSupervisorAddressTranslationRegister() should be moved out from RiscVCpuLib since it had been merged to MdePkg/Include/Library/BaseLib.h, to avoid a multiple definition problem in building. Signed-off-by: Evan Chai --- .../RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 4 +--- Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 10 +- 2 files changed, 2 insertions(+), 12 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index efe85489..3331ea2f 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -2,6 +2,7 @@ RISC-V CPU library definitions. Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved. + Copyright (c) 2023, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -96,9 +97,6 @@ RiscVReadMachineImplementId ( VOID ); -VOID - RiscVSetSupervisorAddressTranslationRegister (UINT64); - VOID RiscVSetSupervisorScratch (UINT64); diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S index e242c9b8..f5bff547 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S @@ -3,6 +3,7 @@ // RISC-V CPU functions. // // Copyright (c) 2016 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved. +// Copyright (c) 2023, Intel Corporation. All rights reserved. // // SPDX-License-Identifier: BSD-2-Clause-Patent // @@ -132,12 +133,3 @@ ASM_FUNC (RiscVSetSupervisorStvec) ASM_FUNC (RiscVGetSupervisorStvec) csrr a0, RISCV_CSR_SUPERVISOR_STVEC ret - -// -// Set Supervisor Address Translation and -// Protection Register. -// -ASM_FUNC (RiscVSetSupervisorAddressTranslationRegister) -csrw RISCV_CSR_SUPERVISOR_SATP, a0 -ret - -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#100444): https://edk2.groups.io/g/devel/message/100444 Mute This Topic: https://groups.io/mt/97171798/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
