Re: [edk2-devel] [PATCH v2] Update CPUID Leaf 06H to follow latest SDM.

[Donald Kuo]

Thanks Ray to clarify.

@Wang, William2 let's follow the EDK2 recommendation.   

Thanks,

-Original Message-
From: Ni, Ray  
Sent: Monday, January 16, 2023 5:19 PM
To: Kuo, Donald ; Wang, William2 
; devel@edk2.groups.io
Cc: Kinney, Michael D ; Gao, Liming 
; Kumar, Chandana C 
Subject: RE: [PATCH v2] Update CPUID Leaf 06H to follow latest SDM.

Donald,
Old code might reference existing Reserved field in the structure definition.
So, to avoid old code assigning value to different bits if using same field 
name but for different bits position,
edk2 recommends to change the field name from ReservedX to ReservedY when the 
bits covered by ReservedX are changed. Y is the next unused index.

So comments as below:

> 
> -UINT32Reserved5  : 11;
> 
> +UINT32Reserved4  : 2;
We should rename Reserved5 to Reserved6.


> 
> +UINT32IA32_THERM_INTERRUPT   : 1;
> 
> +UINT32Reserved5  : 7;
Reserved7.



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#98562): https://edk2.groups.io/g/devel/message/98562
Mute This Topic: https://groups.io/mt/96250318/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [PATCH v4] Update CPUID Leaf 06H to follow latest SDM.

[Donald Kuo]

Thanks William

Looks good to me

Reviewed-by: Kuo, Donald donald@intel.com

-Original Message-
From: Wang, William2  
Sent: Monday, January 16, 2023 4:50 PM
To: devel@edk2.groups.io
Cc: Wang, William2 ; Kinney, Michael D 
; Gao, Liming ; Ni, Ray 
; Kuo, Donald ; Kumar, Chandana C 

Subject: [PATCH v4] Update CPUID Leaf 06H to follow latest SDM.

From: William2 Wang 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4262

Update CPUID Leaf 06H to follow latest SDM.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Ray Ni 
Cc: Donald Kuo 
Cc: Chandana C Kumar 
---
 MdePkg/Include/Register/Intel/Cpuid.h | 59 +++-
 1 file changed, 56 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/Register/Intel/Cpuid.h 
b/MdePkg/Include/Register/Intel/Cpuid.h
index 350bf60252..9569a8805a 100644
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -1195,12 +1195,24 @@ typedef union {
 /// [Bit 18] Fast access mode for the IA32_HWP_REQUEST MSR is supported if 
set.

 ///

 UINT32FastAccessMode : 1;

-UINT32Reserved4  : 1;

+///

+/// [Bit 19] IA32_HW_FEEDBACK_PTR MSR, IA32_HW_FEEDBACK_CONFIG MSR,

+/// IA32_PACKAGE_THERM_STATUS MSR bit 26, and IA32_PACKAGE_THERM_INTERRUPT 
MSR bit 25 are supported if set.

+UINT32HW_FEEDBACK: 1;

 ///

 /// [Bit 20] Ignoring Idle Logical Processor HWP request is supported if 
set.

 ///

 UINT32IgnoringIdleLogicalProcessorHWPRequest : 1;

-UINT32Reserved5  : 11;

+UINT32Reserved3  : 2;

+///

+/// [Bit 23] Intel Thread Director supported if set. IA32_HW_FEEDBACK_CHAR 
and

+/// IA32_HW_FEEDBACK_THREAD_CONFIG MSRs are supported if set.

+UINT32ThreadDirector : 1;

+///

+/// [Bit 24] IA32_THERM_INTERRUPT MSR bit 25 is supported if set.

+///

+UINT32IA32_THERM_INTERRUPT   : 1;

+UINT32Reserved4  : 7;

   } Bits;

   ///

   /// All bit fields as a 32-bit value

@@ -1252,7 +1264,13 @@ typedef union {
 /// (1B0H).

 ///

 UINT32PerformanceEnergyBias: 1;

-UINT32Reserved2: 28;

+UINT32Reserved2: 4;

+///

+/// {Bit 15:8] Number of Intel Thread Director classes supported by the 
processor. Information for that

+/// many classes is written into the Intel Thread Director Table by the 
hardware.

+///

+UINT32ThreadDirectorClasses: 8;

+UINT32Reserved3: 16;

   } Bits;

   ///

   /// All bit fields as a 32-bit value

@@ -1260,6 +1278,41 @@ typedef union {
   UINT32Uint32;

 } CPUID_THERMAL_POWER_MANAGEMENT_ECX;

 

+/**

+  CPUID Thermal and Power Management Information returned in EDX for CPUID leaf

+  #CPUID_THERMAL_POWER_MANAGEMENT.

+**/

+typedef union {

+  ///

+  /// Individual bit fields

+  ///

+  struct {

+///

+/// {Bits 7:0] Bitmap of supported hardware feedback interface 
capabilities.

+///   0 = When set to 1, indicates support for performance capability 
reporting.

+///   1 = When set to 1, indicates support for energy efficiency 
capability reporting.

+///   2-7 = Reserved

+///

+UINT32InterfaceCapability  : 8;

+///

+/// {Bits 11:8] Enumerates the size of the hardware feedback interface 
structure in number of 4 KB pages;

+/// add one to the return value to get the result.

+///

+UINT32InterfaceStructureSize   : 4;

+UINT32Reserved : 4;

+///

+/// {Bits 31:16] : Index (starting at 0) of this logical processor's row 
in the hardware feedback interface structure.

+/// Note that on some parts the index may be same for multiple logical 
processors. On some parts the

+/// indices may not be contiguous, i.e., there may be unused rows in the 
hardware feedback interface structure.

+///

+UINT32LogicalProcessorRowIndex : 16;

+  } Bits;

+  ///

+  /// All bit fields as a 32-bit value

+  ///

+  UINT32Uint32;

+} CPUID_THERMAL_POWER_MANAGEMENT_EDX;

+

 /**

   CPUID Structured Extended Feature Flags Enumeration

 

-- 
2.34.1.windows.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#98560): https://edk2.groups.io/g/devel/message/98560
Mute This Topic: https://groups.io/mt/96303267/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [PATCH v2] Update Architecture MSR to follow latest SDM.

[Donald Kuo]

Hi William

Looks good to me

Reviewed-by: Kuo, Donald donald@intel.com


-Original Message-
From: Wang, William2  
Sent: Friday, January 13, 2023 4:22 PM
To: devel@edk2.groups.io
Cc: Wang, William2 ; Kinney, Michael D 
; Gao, Liming ; Ni, Ray 
; Kuo, Donald ; Kumar, Chandana C 

Subject: [PATCH v2] Update Architecture MSR to follow latest SDM.

From: William2 Wang 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4263

Update Architecture MSR contains the MSR10A.BIT23 and
MSR195.BIT2-0 for overclocking undervolt protection.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Ray Ni 
Cc: Donald Kuo 
Cc: Chandana C Kumar 
---
 MdePkg/Include/Register/Intel/ArchitecturalMsr.h | 198 
 1 file changed, 198 insertions(+)

diff --git a/MdePkg/Include/Register/Intel/ArchitecturalMsr.h 
b/MdePkg/Include/Register/Intel/ArchitecturalMsr.h
index 071a8c689c..f548b56672 100644
--- a/MdePkg/Include/Register/Intel/ArchitecturalMsr.h
+++ b/MdePkg/Include/Register/Intel/ArchitecturalMsr.h
@@ -682,6 +682,149 @@ typedef union {
   UINT64Uint64;

 } MSR_IA32_MTRRCAP_REGISTER;

 

+/**

+  Enumeration of Architectural Features (R/O). If CPUID.(EAX=07H, 
ECX=0):EDX[29]=1.

+

+  @param  ECX  IA32_ARCH_CAPABILITIES (0x010A)

+  @param  EAX  Lower 32-bits of MSR value.

+   Described by the type IA32_ARCH_CAPABILITIES_REGISTER.

+  @param  EDX  Upper 32-bits of MSR value.

+   Described by the type IA32_ARCH_CAPABILITIES_REGISTER.

+

+  Example usage

+  @code

+  IA32_ARCH_CAPABILITIES_REGISTER  Msr;

+

+  Msr.Uint64 = AsmReadMsr64 (IA32_ARCH_CAPABILITIES);

+  @endcode

+  @note IA32_ARCH_CAPABILITIES is defined as IA32_ARCH_CAPABILITIES in SDM.

+**/

+#define IA32_ARCH_CAPABILITIES  0x010A

+

+/**

+  MSR information returned for MSR index #IA32_ARCH_CAPABILITIES

+**/

+typedef union {

+  ///

+  /// Individual bit fields

+  ///

+  struct {

+///

+/// [Bits 0]  RDCL_NO: The processor is not susceptible to Rogue Data 
Cache Load (RDCL).

+///

+UINT32RDCL_NO  : 1;

+///

+/// [Bit 1] IBRS_ALL: The processor supports enhanced IBRS.

+///

+UINT32IBRS_ALL : 1;

+///

+/// [Bit 2] RSBA: The processor supports RSB Alternate. Alternative branch 
predictors

+/// may be used by RET instructions when the RSB is empty. SW using 
retpoline may be

+/// affected by this behavior.

+///

+UINT32RSBA : 1;

+///

+/// [Bit 3] SKIP_L1DFL_VMENTRY: A value of 1 indicates the hypervisor need 
not flush the

+/// L1D on VM entry.

+///

+UINT32SKIP_L1DFL_VMENTRY   : 1;

+///

+/// [Bit 4] SSB_NO: Processor is not susceptible to Speculative Store 
Bypass.

+///

+UINT32SSB_NO   : 1;

+///

+/// [Bit 5] MDS_NO: Processor is not susceptible to Microarchitectural 
Data Sampling (MDS).

+///

+UINT32MDS_NO   : 1;

+///

+/// [Bit 6] IF_PSCHANGE_MC_NO: The processor is not susceptible to a 
machine check error due to

+/// modifying the size of a code page without TLB invalidation.

+///

+UINT32IF_PSCHANGE_MC_NO: 1;

+///

+/// [Bit 7] TSX_CTRL: If 1, indicates presence of IA32_TSX_CTRL MSR.

+///

+UINT32TSX_CTRL : 1;

+///

+/// [Bit 8] TAA_NO: If 1, processor is not affected by TAA.

+///

+UINT32TAA_NO   : 1;

+UINT32Reserved1: 1;

+///

+/// [Bit 10] MISC_PACKAGE_CTLS: The processor supports 
IA32_MISC_PACKAGE_CTLS MSR.

+///

+UINT32MISC_PACKAGE_CTLS: 1;

+///

+/// [Bit 11] ENERGY_FILTERING_CTL: The processor supports setting and 
reading the

+/// IA32_MISC_PACKAGE_CTLS[0] (ENERGY_FILTERING_ENABLE) bit.

+///

+UINT32ENERGY_FILTERING_CTL : 1;

+///

+/// [Bit 12] DOITM: If 1, the processor supports Data Operand Independent 
Timing Mode.

+///

+UINT32DOITM: 1;

+///

+/// [Bit 13] SBDR_SSDP_NO: The processor is not affected by either the 
Shared Buffers Data

+/// Read (SBDR) vulnerability or the Sideband Stale Data Propagator (SSDP).

+///

+UINT32SBDR_SSDP_NO : 1;

+///

+/// [Bit 14] FBSDP_NO: The processor is not affected by the Fill Buffer 
Stale Data Propagator (FBSDP).

+///

+UINT32FBSDP_NO : 1;

+///

+/// [Bit 15] PSDP_NO: The processor is not affected by vulnerabilities 
involving the Primary Stale Data Propagator (PSDP).

+///

+UINT32PSDP_NO  : 1;

+UINT32Reserved2: 1;

+///

+/// [Bit 17] FB_CLEAR: If 1, the processor supports overwrite of fill 
buffer values as part of MD_CLEAR operations

+/// with the VERW instruction.

+///

+UINT32FB_CLEAR : 1;

+///

+/// [Bit 18] FB_CLEAR_CTRL: If 1, the processor supports

Re: [edk2-devel] [PATCH v2] Update CPUID Leaf 06H to follow latest SDM.

[Donald Kuo]

Hi William

Overall looks good to me.

1. For EAX: Can we change Reserved4 & 5 to Reserved3 & 4, since only 4 reserved.

2. For EDX: Bits [7:0], how about to add more detail description for BIT0 and 
BIT1, and BIT [7:2] = Reserved to align with SDM


+/// {Bits 7:0] Bitmap of supported hardware feedback interface 
capabilities.

+///

+UINT32InterfaceCapability  : 8;

Thanks,





-Original Message-
From: Wang, William2  
Sent: Friday, January 13, 2023 4:26 PM
To: devel@edk2.groups.io
Cc: Wang, William2 ; Kinney, Michael D 
; Gao, Liming ; Ni, Ray 
; Kuo, Donald ; Kumar, Chandana C 

Subject: [PATCH v2] Update CPUID Leaf 06H to follow latest SDM.

From: William2 Wang 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4262

Update CPUID Leaf 06H to follow latest SDM.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Ray Ni 
Cc: Donald Kuo 
Cc: Chandana C Kumar 
---
 MdePkg/Include/Register/Intel/Cpuid.h | 56 ++--
 1 file changed, 53 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/Register/Intel/Cpuid.h 
b/MdePkg/Include/Register/Intel/Cpuid.h
index 350bf60252..46cdb827e2 100644
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -1195,12 +1195,24 @@ typedef union {
 /// [Bit 18] Fast access mode for the IA32_HWP_REQUEST MSR is supported if 
set.

 ///

 UINT32FastAccessMode : 1;

-UINT32Reserved4  : 1;

+///

+/// [Bit 19] IA32_HW_FEEDBACK_PTR MSR, IA32_HW_FEEDBACK_CONFIG MSR,

+/// IA32_PACKAGE_THERM_STATUS MSR bit 26, and IA32_PACKAGE_THERM_INTERRUPT 
MSR bit 25 are supported if set.

+UINT32HW_FEEDBACK: 1;

 ///

 /// [Bit 20] Ignoring Idle Logical Processor HWP request is supported if 
set.

 ///

 UINT32IgnoringIdleLogicalProcessorHWPRequest : 1;

-UINT32Reserved5  : 11;

+UINT32Reserved4  : 2;

+///

+/// [Bit 23] Intel Thread Director supported if set. IA32_HW_FEEDBACK_CHAR 
and

+/// IA32_HW_FEEDBACK_THREAD_CONFIG MSRs are supported if set.

+UINT32ThreadDirector : 1;

+///

+/// [Bit 24] IA32_THERM_INTERRUPT MSR bit 25 is supported if set.

+///

+UINT32IA32_THERM_INTERRUPT   : 1;

+UINT32Reserved5  : 7;

   } Bits;

   ///

   /// All bit fields as a 32-bit value

@@ -1252,7 +1264,13 @@ typedef union {
 /// (1B0H).

 ///

 UINT32PerformanceEnergyBias: 1;

-UINT32Reserved2: 28;

+UINT32Reserved2: 4;

+///

+/// {Bit 15:8] Number of Intel Thread Director classes supported by the 
processor. Information for that

+/// many classes is written into the Intel Thread Director Table by the 
hardware.

+///

+UINT32ThreadDirectorClasses: 8;

+UINT32Reserved3: 16;

   } Bits;

   ///

   /// All bit fields as a 32-bit value

@@ -1260,6 +1278,38 @@ typedef union {
   UINT32Uint32;

 } CPUID_THERMAL_POWER_MANAGEMENT_ECX;

 

+/**

+  CPUID Thermal and Power Management Information returned in EDX for CPUID leaf

+  #CPUID_THERMAL_POWER_MANAGEMENT.

+**/

+typedef union {

+  ///

+  /// Individual bit fields

+  ///

+  struct {

+///

+/// {Bits 7:0] Bitmap of supported hardware feedback interface 
capabilities.

+///

+UINT32InterfaceCapability  : 8;

+///

+/// {Bits 11:8] Enumerates the size of the hardware feedback interface 
structure in number of 4 KB pages;

+/// add one to the return value to get the result.

+///

+UINT32InterfaceStructureSize   : 4;

+UINT32Reserved : 4;

+///

+/// {Bits 31:16] : Index (starting at 0) of this logical processor's row 
in the hardware feedback interface structure.

+/// Note that on some parts the index may be same for multiple logical 
processors. On some parts the

+/// indices may not be contiguous, i.e., there may be unused rows in the 
hardware feedback interface structure.

+///

+UINT32LogicalProcessorRowIndex : 16;

+  } Bits;

+  ///

+  /// All bit fields as a 32-bit value

+  ///

+  UINT32Uint32;

+} CPUID_THERMAL_POWER_MANAGEMENT_EDX;

+

 /**

   CPUID Structured Extended Feature Flags Enumeration

 

-- 
2.34.1.windows.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#98557): https://edk2.groups.io/g/devel/message/98557
Mute This Topic: https://groups.io/mt/96250318/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [edk2-platforms: PATCH] Modify processor _UID ordering by CPU default fused in MADT

[Donald Kuo]

Thanks Jack

Looks good. Reviewed.

-Original Message-
From: Ni, Ray  
Sent: Tuesday, August 9, 2022 3:13 PM
To: Lin, JackX ; devel@edk2.groups.io
Cc: Chiu, Chasel ; Dong, Eric ; 
Yao, Jiewen ; Chaganty, Rangasai V 
; Kuo, Donald ; Kumar, 
Chandana C ; Palakshareddy, Lavanya C 
; Palakshareddy, Lavanya C 

Subject: RE: [edk2-platforms: PATCH] Modify processor _UID ordering by CPU 
default fused in MADT

Reviewed-by: Ray Ni 

> -Original Message-
> From: Lin, JackX 
> Sent: Monday, August 8, 2022 4:21 PM
> To: devel@edk2.groups.io
> Cc: Lin, JackX ; Lin, JackX 
> ; Chiu, Chasel ; Dong, 
> Eric ; Yao, Jiewen ; Ni, 
> Ray ; Chaganty, Rangasai V 
> ; Kuo, Donald ; 
> Kumar, Chandana C ; Palakshareddy; 
> Palakshareddy, Lavanya C 
> Subject: [edk2-platforms: PATCH] Modify processor _UID ordering by CPU 
> default fused in MADT
> 
> BIOS should not reordering cpu processor_uid
> 
> Signed-off-by: JackX Lin 
> Cc: Chasel Chiu 
> Cc: Dong Eric 
> Cc: Jiewen Yao 
> Cc: Ray Ni 
> Cc: Rangasai V Chaganty 
> Cc: Donald Kuo 
> Cc: Chandana C Kumar 
> Cc: Palakshareddy, Lavanya C 
> Cc: JackX Lin 
> ---
>  Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 174
> +++---
> --
> 
> --
>  1 file changed, 39 insertions(+), 135 deletions(-)
> 
> diff --git 
> a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> index c7e87cbd7d..176e422e81 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> @@ -57,38 +57,9 @@ BOOLEAN mForceX2ApicId;
>  BOOLEAN mX2ApicEnabled;
> 
>  EFI_MP_SERVICES_PROTOCOL*mMpService;
> -BOOLEAN mCpuOrderSorted;
> -EFI_CPU_ID_ORDER_MAP*mCpuApicIdOrderTable = NULL;
>  UINTN   mNumberOfCpus = 0;
>  UINTN   mNumberOfEnabledCPUs = 0;
> 
> -
> -/**
> -  The function is called by PerformQuickSort to compare int values.
> -
> -  @param[in] LeftThe pointer to first buffer.
> -  @param[in] Right   The pointer to second buffer.
> -
> -  @return -1 Buffer1 is less than Buffer2.
> -  @return  1 Buffer1 is greater than Buffer2.
> -
> -**/
> -INTN
> -EFIAPI
> -ApicIdCompareFunction (
> -  IN CONST VOID *Left,
> -  IN CONST VOID *Right
> -  )
> -{
> -  UINT32  LeftApicId;
> -  UINT32  RightApicId;
> -
> -  LeftApicId = ((EFI_CPU_ID_ORDER_MAP *) Left)->ApicId;
> -  RightApicId = ((EFI_CPU_ID_ORDER_MAP *) Right)->ApicId;
> -
> -  return (LeftApicId > RightApicId)? 1 : (-1); -}
> -
>  /**
>Print Cpu Apic ID Table
> 
> @@ -116,7 +87,8 @@ DebugDisplayReOrderTable (  EFI_STATUS  
> AppendCpuMapTableEntry (
>  IN VOID   *ApicPtr,
> -IN UINT32 LocalApicCounter
> +IN UINT32 LocalApicCounter,
> +IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable
>)
>  {
>EFI_STATUSStatus;
> @@ -131,9 +103,9 @@ AppendCpuMapTableEntry (
> 
>if(Type == EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC) {
>  if(!mX2ApicEnabled) {
> -  LocalApicPtr->Flags=
> (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
> -  LocalApicPtr->ApicId   =
> (UINT8)mCpuApicIdOrderTable[LocalApicCounter].ApicId;
> -  LocalApicPtr->AcpiProcessorUid =
> (UINT8)mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid;
> +  LocalApicPtr->Flags=
> (UINT8)CpuApicIdOrderTable[LocalApicCounter].Flags;
> +  LocalApicPtr->ApicId   =
> (UINT8)CpuApicIdOrderTable[LocalApicCounter].ApicId;
> +  LocalApicPtr->AcpiProcessorUid =
> (UINT8)CpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid;
>  } else {
>LocalApicPtr->Flags= 0;
>LocalApicPtr->ApicId   = 0xFF;
> @@ -142,9 +114,9 @@ AppendCpuMapTableEntry (
>  }
>} else if(Type == EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC) {
>  if(mX2ApicEnabled) {
> -  LocalX2ApicPtr->Flags=
> (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags;
> -  LocalX2ApicPtr->X2ApicId =
> mCpuApicIdOrderTable[LocalApicCounter].ApicId;
> -  LocalX2ApicPtr->AcpiProcessorUid =
> mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid;
> +  LocalX2ApicPtr->Flags=
> (UINT8)CpuApicIdOrderTable[LocalApicCounter].Flags;
> +  LocalX2A

Re: [edk2-devel] [edk2-platforms:PATCH] Modify processor _UID ordering by CPU default fused in MADT

[Donald Kuo]

Thanks Jack

The changes looks good to me.

Donald

-Original Message-
From: Lin, JackX  
Sent: Thursday, July 28, 2022 3:25 PM
To: devel@edk2.groups.io
Cc: Lin, JackX ; Lin, JackX ; Chiu, 
Chasel ; Dong, Eric ; Yao, Jiewen 
; Ni, Ray ; Chaganty, Rangasai V 
; Kuo, Donald ; Kumar, 
Chandana C ; Palakshareddy; Palakshareddy, Lavanya 
C 
Subject: [edk2-platforms:PATCH] Modify processor _UID ordering by CPU default 
fused in MADT

BIOS should not reordering cpu processor_uid

Signed-off-by: JackX Lin 
Cc: Chasel Chiu 
Cc: Dong Eric 
Cc: Jiewen Yao 
Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Cc: Donald Kuo 
Cc: Chandana C Kumar 
Cc: Palakshareddy, Lavanya C 
Cc: JackX Lin 
---
 Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 99 
---
 1 file changed, 4 insertions(+), 95 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c 
b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index c7e87cbd7d..d0e8891918 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -62,33 +62,6 @@ EFI_CPU_ID_ORDER_MAP*mCpuApicIdOrderTable = NULL;
 UINTN   mNumberOfCpus = 0;
 UINTN   mNumberOfEnabledCPUs = 0;
 
-
-/**
-  The function is called by PerformQuickSort to compare int values.
-
-  @param[in] LeftThe pointer to first buffer.
-  @param[in] Right   The pointer to second buffer.
-
-  @return -1 Buffer1 is less than Buffer2.
-  @return  1 Buffer1 is greater than Buffer2.
-
-**/
-INTN
-EFIAPI
-ApicIdCompareFunction (
-  IN CONST VOID *Left,
-  IN CONST VOID *Right
-  )
-{
-  UINT32  LeftApicId;
-  UINT32  RightApicId;
-
-  LeftApicId = ((EFI_CPU_ID_ORDER_MAP *) Left)->ApicId;
-  RightApicId = ((EFI_CPU_ID_ORDER_MAP *) Right)->ApicId;
-
-  return (LeftApicId > RightApicId)? 1 : (-1); -}
-
 /**
   Print Cpu Apic ID Table
 
@@ -168,21 +141,16 @@ SortCpuLocalApicInTable (
   EFI_PROCESSOR_INFORMATION ProcessorInfoBuffer;
   UINT32Index;
   UINT32CurrProcessor;
-  UINT32BspApicId;
-  EFI_CPU_ID_ORDER_MAP  TempVal;
   EFI_CPU_ID_ORDER_MAP  *CpuIdMapPtr;
   UINT32CoreThreadMask;
-  EFI_CPU_ID_ORDER_MAP  *TempCpuApicIdOrderTable;
   UINT32Socket;
 
-  Index  = 0;
   Status = EFI_SUCCESS;
 
   if (mCpuOrderSorted) {
 return Status;
   }
 
-  TempCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof 
(EFI_CPU_ID_ORDER_MAP));
   CoreThreadMask = (UINT32) ((1 << mNumOfBitShift) - 1);
 
   for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; 
CurrProcessor++, Index++) { @@ -192,7 +160,7 @@ SortCpuLocalApicInTable (

);
 
-CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) [Index];
+CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) 
+ [Index];
 if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) {
   CpuIdMapPtr->ApicId  = (UINT32)ProcessorInfoBuffer.ProcessorId;
   CpuIdMapPtr->Thread  = ProcessorInfoBuffer.Location.Thread;
@@ -214,74 +182,16 @@ SortCpuLocalApicInTable (
 } //end if PROC ENABLE
   } //end for CurrentProcessor
 
-  //keep for debug purpose
   DEBUG ((DEBUG_INFO, "::ACPI::  APIC ID Order Table Init.   CoreThreadMask = 
%x,  mNumOfBitShift = %x\n", CoreThreadMask, mNumOfBitShift));
-  DebugDisplayReOrderTable (TempCpuApicIdOrderTable);
 
   //
   // Get Bsp Apic Id
   //
-  BspApicId = GetApicId ();
-  DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId));
-
-  //
-  //check to see if 1st entry is BSP, if not swap it
-  //
-  if (TempCpuApicIdOrderTable[0].ApicId != BspApicId) {
-for (Index = 0; Index < mNumberOfCpus; Index++) {
-  if ((TempCpuApicIdOrderTable[Index].Flags == 1) && 
(TempCpuApicIdOrderTable[Index].ApicId == BspApicId)) {
-CopyMem (, [Index], sizeof 
(EFI_CPU_ID_ORDER_MAP));
-CopyMem ([Index], [0], 
sizeof (EFI_CPU_ID_ORDER_MAP));
-CopyMem ([0], , sizeof 
(EFI_CPU_ID_ORDER_MAP));
-break;
-  }
-}
-
-if (mNumberOfCpus <= Index) {
-  DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable Index 
Bufferflow\n"));
-  return EFI_INVALID_PARAMETER;
-}
-  }
-
-  //
-  // 1. Sort TempCpuApicIdOrderTable,
-  //sort it by using ApicId from minimum to maximum (Socket0 to SocketN), 
and the BSP must in the fist location of the table.
-  //So, start sorting the table from the second element and total elements 
are mNumberOfCpus-1.
-  /

Re: [edk2-devel] [edk2-platforms: PATCH] System will occur a CPU exception error when sorting CPU APIC map, because of a pointer point to an wrong space.

[Donald Kuo]

Reviewed-by: Donald Kuo 

-Original Message-
From: Kumar, Chandana C  
Sent: Wednesday, December 22, 2021 12:33 AM
To: Lin, JackX ; devel@edk2.groups.io
Cc: Chiu, Chasel ; Dong, Eric ; 
Yao, Jiewen ; Ni, Ray ; Chaganty, 
Rangasai V ; Kuo, Donald 
Subject: RE: [edk2-platforms: PATCH] System will occur a CPU exception error 
when sorting CPU APIC map, because of a pointer point to an wrong space.

Reviewed-by: Chandana C Kumar 

> -Original Message-
> From: Lin, JackX 
> Sent: Tuesday, December 21, 2021 12:18 PM
> To: devel@edk2.groups.io
> Cc: Lin, JackX ; Lin, JackX 
> ; Chiu, Chasel ; Dong, 
> Eric ; Yao, Jiewen ; Ni, 
> Ray ; Chaganty, Rangasai V 
> ; Kuo, Donald ; 
> Kumar, Chandana C 
> Subject: [edk2-platforms: PATCH] System will occur a CPU exception 
> error when sorting CPU APIC map, because of a pointer point to an wrong space.
> 
> Signed-off-by: JackX Lin 
> Cc: Chasel Chiu 
> Cc: Dong Eric 
> Cc: Jiewen Yao 
> Cc: Ray Ni 
> Cc: Rangasai V Chaganty 
> Cc: Donald Kuo 
> Cc: Chandana C Kumar 
> Cc: JackX Lin 
> ---
>  Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git 
> a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> index 785cf4c2f9..05fc7799fb 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> @@ -169,7 +169,7 @@ SortCpuLocalApicInTable (
>UINT32Index;
>UINT32CurrProcessor;
>UINT32BspApicId;
> -  EFI_CPU_ID_ORDER_MAP  *TempVal;
> +  EFI_CPU_ID_ORDER_MAP  TempVal;
>EFI_CPU_ID_ORDER_MAP  *CpuIdMapPtr;
>UINT32CoreThreadMask;
>EFI_CPU_ID_ORDER_MAP  *TempCpuApicIdOrderTable;
> @@ -183,7 +183,6 @@ SortCpuLocalApicInTable (
>}
> 
>TempCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof 
> (EFI_CPU_ID_ORDER_MAP));
> -  TempVal = AllocateZeroPool (sizeof (EFI_CPU_ID_ORDER_MAP));
>CoreThreadMask = (UINT32) ((1 << mNumOfBitShift) - 1);
> 
>for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus;
> CurrProcessor++, Index++) {
> --
> 2.32.0.windows.2



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#85149): https://edk2.groups.io/g/devel/message/85149
Mute This Topic: https://groups.io/mt/87872992/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Thanks Liming help :)

Donald
> -Original Message-
> From: Gao, Liming
> Sent: Wednesday, August 21, 2019 9:46 PM
> To: Zeng, Star ; Kuo, Donald ;
> devel@edk2.groups.io; ler...@redhat.com; Dong, Eric
> 
> Cc: Ni, Ray ; Chan, Amy ;
> Chaganty, Rangasai V ; Lai, Luke
> ; Li, Kevin Y ;
> leif.lindh...@linaro.org; af...@apple.com; Kinney, Michael D
> 
> Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by
> using CPUID(0x15) TSC leaf
> 
> Done. And, push @30781febe2106cc0d7186e70136120353cd67df2
> 
> Thanks
> Liming
> > -Original Message-
> > From: Zeng, Star
> > Sent: Tuesday, August 20, 2019 10:00 PM
> > To: Gao, Liming ; Kuo, Donald
> > ; devel@edk2.groups.io; ler...@redhat.com;
> Dong,
> > Eric 
> > Cc: Ni, Ray ; Chan, Amy ;
> > Chaganty, Rangasai V ; Lai, Luke
> > ; Li, Kevin Y ;
> > leif.lindh...@linaro.org; af...@apple.com; Kinney, Michael D
> > ; Zeng, Star 
> > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library
> > by using CPUID(0x15) TSC leaf
> >
> > Remember to add entry for it at
> https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Release-
> Planning.
> >
> > > -Original Message-
> > > From: Gao, Liming
> > > Sent: Tuesday, August 20, 2019 7:56 PM
> > > To: Kuo, Donald ; devel@edk2.groups.io;
> > > ler...@redhat.com; Dong, Eric 
> > > Cc: Ni, Ray ; Zeng, Star ;
> > > Chan, Amy ; Chaganty, Rangasai V
> > > ; Lai, Luke ; Li,
> > > Kevin Y ; leif.lindh...@linaro.org;
> > > af...@apple.com; Kinney, Michael D 
> > > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC
> > > library by using CPUID(0x15) TSC leaf
> > >
> > > Donald:
> > >   Thanks for your update. If no other comment, I will help push this
> > > patch tomorrow.
> > >
> > > Thanks
> > > Liming
> > > > -Original Message-
> > > > From: Kuo, Donald
> > > > Sent: Tuesday, August 20, 2019 3:22 PM
> > > > To: Gao, Liming ; devel@edk2.groups.io;
> > > > ler...@redhat.com; Dong, Eric 
> > > > Cc: Ni, Ray ; Zeng, Star ;
> > > > Chan, Amy ; Chaganty, Rangasai V
> > > > ; Lai, Luke ;
> > > > Li, Kevin Y ; leif.lindh...@linaro.org;
> > > > af...@apple.com; Kinney, Michael D 
> > > > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC
> > > > library by using CPUID(0x15) TSC leaf
> > > >
> > > > Hi Liming,
> > > >
> > > > Done.
> > > >
> > > > Patch is attached to
> > > > https://bugzilla.tianocore.org/show_bug.cgi?id=1909
> > > >
> > > > Another BZ to apply CpuTimerLib will be tracking on:
> > > > https://bugzilla.tianocore.org/show_bug.cgi?id=2096
> > > >
> > > > Thanks,
> > > > Donald
> > > >
> > > > > -Original Message-
> > > > > From: Gao, Liming
> > > > > Sent: Tuesday, August 20, 2019 2:51 PM
> > > > > To: Kuo, Donald ; devel@edk2.groups.io;
> > > > > ler...@redhat.com; Dong, Eric 
> > > > > Cc: Ni, Ray ; Zeng, Star
> > > > > ; Chan, Amy ;
> Chaganty,
> > > > > Rangasai V ; Lai, Luke
> > > > > ; Li, Kevin Y ;
> > > > > leif.lindh...@linaro.org; af...@apple.com; Kinney, Michael D
> > > > > 
> > > > > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC
> > > > > library by using CPUID(0x15) TSC leaf
> > > > >
> > > > > Donald:
> > > > >   Please also attach the patch linker in BZs.
> > > > >
> > > > >   And, please submit another BZ for edk2-
> > > > > platforms\Platform\Intel\KabylakeOpenBoardPkg to apply this new
> > > > > library instance.
> > > > >
> > > > > Thanks
> > > > > Liming
> > > > > >-Original Message-
> > > > > >From: Kuo, Donald
> > > > > >Sent: Tuesday, August 20, 2019 10:44 AM
> > > > > >To: devel@edk2.groups.io; ler...@redhat.com; Gao, Liming
> > > > > >; Dong, Eric 
> > > > > >Cc: Ni, Ray ; Zeng, Star
> > > > > >; Chan, Amy ;
> > > > > >Chaganty, Rangasai V ; Lai, Luke
> > > > > >; Li, Kevin Y ;
> > > > > >leif.lindh...@linaro.org; af...@apple.com; Kinney, Michael D
> > > > > >
> > > > > >Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC
> > > > > >library by using CPUID(0x15) TSC leaf
> > > > > >
> > > > > >Thanks Laszlo help to review and great feedbacks. That we did
> > > > > >miss to fulfil
> > > > > BZ.
> > > > > >
> > > > > >I had updated Bugzilla
> > > > > >https://bugzilla.tianocore.org/show_bug.cgi?id=1909
> > > > > >for more documentation.
> > > > > >
> > > > > >As I know for the edk2-platforms should be consumed as KBL (7th
> > > > > >Generation) platform in Client, and this feature based on SDM
> > > > > >is supported on SKL (6th Generation, Family 06h) onwards. So
> > > > > >it's ok to use as TimerLib instances for edk2-platforms.
> > > > > >
> > > > > >And I think the library is new instances for TimerLib for
> > > > > >supported CPU, and those non-supported CPU will still keep
> > > > > >using AcpiTimerlib as TimerLib instances.
> > > > > >
> > > > > >Thanks,
> > > > > >Donald
> > > > > >
> > > > > >> -Original Message-
> > > > > >> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On
> > > > > >> Behalf Of Laszlo Ersek
> > > > > >> Sent: Saturday, 

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Hi Liming,

Done.

Patch is attached to https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Another BZ to apply CpuTimerLib will be tracking on:  
https://bugzilla.tianocore.org/show_bug.cgi?id=2096

Thanks,
Donald

> -Original Message-
> From: Gao, Liming
> Sent: Tuesday, August 20, 2019 2:51 PM
> To: Kuo, Donald ; devel@edk2.groups.io;
> ler...@redhat.com; Dong, Eric 
> Cc: Ni, Ray ; Zeng, Star ; Chan,
> Amy ; Chaganty, Rangasai V
> ; Lai, Luke ; Li, Kevin
> Y ; leif.lindh...@linaro.org; af...@apple.com; Kinney,
> Michael D 
> Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by
> using CPUID(0x15) TSC leaf
> 
> Donald:
>   Please also attach the patch linker in BZs.
> 
>   And, please submit another BZ for edk2-
> platforms\Platform\Intel\KabylakeOpenBoardPkg to apply this new library
> instance.
> 
> Thanks
> Liming
> >-Original Message-
> >From: Kuo, Donald
> >Sent: Tuesday, August 20, 2019 10:44 AM
> >To: devel@edk2.groups.io; ler...@redhat.com; Gao, Liming
> >; Dong, Eric 
> >Cc: Ni, Ray ; Zeng, Star ; Chan,
> >Amy ; Chaganty, Rangasai V
> >; Lai, Luke ; Li,
> >Kevin Y ; leif.lindh...@linaro.org;
> >af...@apple.com; Kinney, Michael D 
> >Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library
> >by using CPUID(0x15) TSC leaf
> >
> >Thanks Laszlo help to review and great feedbacks. That we did miss to fulfil
> BZ.
> >
> >I had updated Bugzilla
> >https://bugzilla.tianocore.org/show_bug.cgi?id=1909
> >for more documentation.
> >
> >As I know for the edk2-platforms should be consumed as KBL (7th
> >Generation) platform in Client, and this feature based on SDM is
> >supported on SKL (6th Generation, Family 06h) onwards. So it's ok to
> >use as TimerLib instances for edk2-platforms.
> >
> >And I think the library is new instances for TimerLib for supported
> >CPU, and those non-supported CPU will still keep using AcpiTimerlib as
> >TimerLib instances.
> >
> >Thanks,
> >Donald
> >
> >> -Original Message-
> >> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> >> Laszlo Ersek
> >> Sent: Saturday, August 17, 2019 4:40 AM
> >> To: Gao, Liming ; Kuo, Donald
> >> ; Dong, Eric ;
> >> devel@edk2.groups.io
> >> Cc: Ni, Ray ; Zeng, Star ;
> >> Chan, Amy ; Chaganty, Rangasai V
> >> ; Lai, Luke ; Li,
> >> Kevin Y ; leif.lindh...@linaro.org;
> >> af...@apple.com;
> >Kinney,
> >> Michael D 
> >> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC
> >> library by using CPUID(0x15) TSC leaf
> >>
> >> On 08/16/19 18:16, Laszlo Ersek wrote:
> >> > On 08/15/19 06:02, Gao, Liming wrote:
> >> >> Donald: This change is a new feature. Now, it is not in edk2
> >> >> feature planning list. If you want to catch it into 201908 stable
> >> >> tag, please get approve from Stewards first. I have cc this mail to all
> Stewards.
> >> > - I don't mind adding a new feature, as long as it gets properly
> >> > reviewed by package owners before we enter the soft feature freeze.
> >> >
> >> > - Looking at the BZ
> >> > , a bit more
> >> > documentation would be nice.
> >> >
> >> > - On the negative side, I'm very much *not* a fan of adding
> >> > features to the open source edk2 tree without actually *consuming*
> >> > the feature in an open source tree. Are the new library instances
> >> > going to be put to use in edk2-platforms, perhaps?
> >> >
> >> > We discussed this topic earlier on some of the stewards' calls. On
> >> > one hand, it's not uncommon to see library instances from Intel
> >> > enter core
> >> > edk2 packages without any dependent platform code, or even a
> >> > detailed problem statement / purpose description (see e.g. commit
> >> > 5c9bb86f171c and its surrounding commits). On the other hand,
> >> > attempts in the past, to add libraries with well demonstrated and
> >> > direct in-tree use cases, to
> >> > edk2 core, have been rejected, from other submitters. (Here's one
> >> > example: .) I'm
> >> > not prying at proprietary platform information, but a new library
> >> > added to
> >> > edk2 core *should* be well-justified.
> >> >
> >> > The commit message on this patch is empty. It only references
> >> > . And if I
> >> > open the BZ, this is all I get:
> >> >
> >> > Need a new TSC library to check the CPUID leaf (EAX=0x15) for TSC.
> >> > For new platform (start from SKL) can use CPUID and retire/remove
> >> > the current override from AcpiTimerLib.
> >> >
> >> > Does this read like an actual feature request? (TimerLib is an
> >> > MdePkg library class, so not exactly "niche".)
> >>
> >> In comparison, the following email does read like a feature request:
> >>
> >> [edk2-devel] Determining TSC frequency programmatically
> >> https://edk2.groups.io/g/devel/message/45750
> >> http://mid.mail-archive.com/8EC14D0D-DFA5-412D-A4E1-
> >> 4d641576d...@protonmail.com

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Thanks Laszlo help to review and great feedbacks. That we did miss to fulfil 
BZ. 

I had updated Bugzilla https://bugzilla.tianocore.org/show_bug.cgi?id=1909 for 
more documentation.

As I know for the edk2-platforms should be consumed as KBL (7th Generation) 
platform in Client, and this feature based on SDM is supported on SKL (6th 
Generation, Family 06h) onwards. So it's ok to use as TimerLib instances for 
edk2-platforms.

And I think the library is new instances for TimerLib for supported CPU, and 
those non-supported CPU will still keep using AcpiTimerlib as TimerLib 
instances.

Thanks,
Donald

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Laszlo Ersek
> Sent: Saturday, August 17, 2019 4:40 AM
> To: Gao, Liming ; Kuo, Donald
> ; Dong, Eric ;
> devel@edk2.groups.io
> Cc: Ni, Ray ; Zeng, Star ; Chan,
> Amy ; Chaganty, Rangasai V
> ; Lai, Luke ; Li, Kevin
> Y ; leif.lindh...@linaro.org; af...@apple.com; Kinney,
> Michael D 
> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by
> using CPUID(0x15) TSC leaf
> 
> On 08/16/19 18:16, Laszlo Ersek wrote:
> > On 08/15/19 06:02, Gao, Liming wrote:
> >> Donald: This change is a new feature. Now, it is not in edk2 feature
> >> planning list. If you want to catch it into 201908 stable tag, please
> >> get approve from Stewards first. I have cc this mail to all Stewards.
> > - I don't mind adding a new feature, as long as it gets properly
> > reviewed by package owners before we enter the soft feature freeze.
> >
> > - Looking at the BZ
> > , a bit more
> > documentation would be nice.
> >
> > - On the negative side, I'm very much *not* a fan of adding features
> > to the open source edk2 tree without actually *consuming* the feature
> > in an open source tree. Are the new library instances going to be put
> > to use in edk2-platforms, perhaps?
> >
> > We discussed this topic earlier on some of the stewards' calls. On one
> > hand, it's not uncommon to see library instances from Intel enter core
> > edk2 packages without any dependent platform code, or even a detailed
> > problem statement / purpose description (see e.g. commit 5c9bb86f171c
> > and its surrounding commits). On the other hand, attempts in the past,
> > to add libraries with well demonstrated and direct in-tree use cases,
> > to
> > edk2 core, have been rejected, from other submitters. (Here's one
> > example: .) I'm
> > not prying at proprietary platform information, but a new library
> > added to
> > edk2 core *should* be well-justified.
> >
> > The commit message on this patch is empty. It only references
> > . And if I open
> > the BZ, this is all I get:
> >
> > Need a new TSC library to check the CPUID leaf (EAX=0x15) for TSC.
> > For new platform (start from SKL) can use CPUID and retire/remove
> > the current override from AcpiTimerLib.
> >
> > Does this read like an actual feature request? (TimerLib is an MdePkg
> > library class, so not exactly "niche".)
> 
> In comparison, the following email does read like a feature request:
> 
> [edk2-devel] Determining TSC frequency programmatically
> https://edk2.groups.io/g/devel/message/45750
> http://mid.mail-archive.com/8EC14D0D-DFA5-412D-A4E1-
> 4d641576d...@protonmail.com
> 
> If the posting is related to TianoCore#1909, then I urge the BZ assignee to
> please reference the message in the TianoCore BZ.
> 
> Thanks
> Laszlo
> 
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#46074): https://edk2.groups.io/g/devel/message/46074
Mute This Topic: https://groups.io/mt/32839184/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Hi Vitaly,

UEFI Application does be another scope. And regards your question on “a way to 
dynamically determine the difference between Xeon client and server” … is not 
in current design-in, for long term goal we could consider if there is proper 
way to identify CPU SKU dynamically.

Thanks for sharing your thought and it could be an enhancement on TimerLib in 
the future. ☺

Thanks,
Donald

From: Kinney, Michael D
Sent: Friday, August 16, 2019 12:23 AM
To: devel@edk2.groups.io; vit9...@protonmail.com; Kuo, Donald 
; Kinney, Michael D 
Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using 
CPUID(0x15) TSC leaf

Vitaly,

When implementing a UEFI Application, if you want maximum compatibility, you 
should use UEFI Services/Protocols and minimize as many HW assumptions as 
possible.

I understand, especially for accurate time and clock related services, the that 
the UEFI Specification defined Services/Protocols can be challenging to use.

When adding content that uses HW such as TSC or CPUID the UEFI App should be 
implemented with good detection logic to know it is safe to use that HW, and 
contain the fallback logic to use an alternate mechanism if the required HW is 
not present.  This is a very different approach than some early FW 
initialization code that can safely make some HW assumptions that helps keep 
the FW init code small and efficient.  This does imply that different libraries 
may be required for FW init and UEFI Applications.

Thanks,

Mike

From: devel@edk2.groups.io 
[mailto:devel@edk2.groups.io] On Behalf Of Vitaly Cheptsov via Groups.Io
Sent: Thursday, August 15, 2019 5:10 AM
To: Kuo, Donald mailto:donald@intel.com>>
Cc: devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using 
CPUID(0x15) TSC leaf

Hi Donald,

Glad to hear it helped a little, and sorry for some outdated quotes.

Your clarification regarding model range is very helpful. Xeon W being client 
and thus having client clock makes sense, though I must say it was quite not 
obvious. I was referring to the same SDM table, and it would have been great to 
have vertical range binding instead of the misleading CPUID.

With that, however, I still do not see a way to dynamically determine the 
difference between Xeon client and server.

For us it is needed as we use TimerLib differently. For you TimerLib is a part 
of BSP, so you face no issue statically setting the clock frequency as a PCD. 
For us TimerLib is used as a part of an UEFI application compatible with 
different hardware, and in fact not just Intel. We have such "generic TimerLib" 
library, and to determine CPU frequency, as a fallback to CPUID 15H, it relies 
on ACPI PM timer. This is not great for two reasons:
- we have to maintain it ourselves, while we would have liked that be part of 
EDK II with different vendors contributing to the project.
- we still cannot find an obvious way to determine crystal clock when it is not 
reported, in particular for Xeon W and Xeon Scalable case.

I guess this is now out of the scope of this patch and perhaps even this exact 
library, but it will be helpful to hear relevant technical details on the issue 
and opinions on such "generic TimerLib" library to later appear in EDK II.

Best regards,
Vitaly
15 авг. 2019 г., в 11:40, Kuo, Donald 
mailto:donald@intel.com>> написал(а):

Hi Vitaly,

Appreciated for reviewing very detail. And looks your captured some piece of 
code is older version. And should be ok, I do got your point.

Item #1
-  I do missed RegEax error handling in case for 
CpuidCoreClockCalculateTscFrequency () should return 0 and EFI_UNSUPPORTED. AR: 
Will update it.

Item #2:
-  Actually the information is from SDM Table 18-85
o   As we know CPUID signature could be hard to identify processor XTAL 
frequency is? So we only check CPUID Leaf 0x15
o   And the PCD will be defined depends on platform specific and during project 
early development. Based on SDM, Intel processor for CPUID.15h EAX and EBX is 
enumerated, but ECX could be possible not enumerated. So that is why we based 
on  SDM Table 18-85 to create PCD as below:
•  Intel Xeon Server family: 25MHz
•  Intel Core and Intel Xeon W family: 24MHz
•  Intel Atom : 19.2MHz
•  So regards the “06_55h” might cause the confused, we could review it whether 
remove it??
Item #3:
-  Again, the XTAL frequency is optional and should be define in early 
phase of new project. Default should still use AcpiTimer.
oPlatform / developer owner should well know the CPU generation XTAL 
frequency is? Server / Client / Atom ?
o   For those CPU not supported should still use AcpiTimerLib (default)

Thanks,
Donald

From: vit9696 via [] [mailto:vit9696=protonmail.com@[]]
Sent: Thursday, August 15, 2019 3:20 PM
To: Kuo, Donald mailto:donald@intel.com>>; 

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Cc: Amy Chan 
Cc: Rangasai V Chaganty 
Signed-off-by: Donald Kuo 
---
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c   |  41 +++
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf |  35 +++
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni |  17 ++
 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c   | 279 +
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c|  85 +++
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf  |  37 +++
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni  |  17 ++
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c|  58 +
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf  |  36 +++
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni  |  17 ++
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   3 +
 UefiCpuPkg/UefiCpuPkg.uni  |  10 +
 13 files changed, 643 insertions(+)
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni

diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..6ddf917bad
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,41 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance as Base Timer 
Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
+
diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..fd93adc5f1
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib|SEC PEI_CORE PEIM
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/CpuTimer

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Hi Vitaly,

Appreciated for reviewing very detail. And looks your captured some piece of 
code is older version. And should be ok, I do got your point.

Item #1

-  I do missed RegEax error handling in case for 
CpuidCoreClockCalculateTscFrequency () should return 0 and EFI_UNSUPPORTED. AR: 
Will update it.

Item #2:

-  Actually the information is from SDM Table 18-85

o   As we know CPUID signature could be hard to identify processor XTAL 
frequency is? So we only check CPUID Leaf 0x15

o   And the PCD will be defined depends on platform specific and during project 
early development. Based on SDM, Intel processor for CPUID.15h EAX and EBX is 
enumerated, but ECX could be possible not enumerated. So that is why we based 
on  SDM Table 18-85 to create PCD as below:

§  Intel Xeon Server family: 25MHz

§  Intel Core and Intel Xeon W family: 24MHz

§  Intel Atom : 19.2MHz

§  So regards the “06_55h” might cause the confused, we could review it whether 
remove it??
Item #3:

-  Again, the XTAL frequency is optional and should be define in early 
phase of new project. Default should still use AcpiTimer.

oPlatform / developer owner should well know the CPU generation XTAL 
frequency is? Server / Client / Atom ?

o   For those CPU not supported should still use AcpiTimerLib (default)

Thanks,
Donald

From: vit9696 via [] [mailto:vit9696=protonmail.com@[]]
Sent: Thursday, August 15, 2019 3:20 PM
To: Kuo, Donald ; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using 
CPUID(0x15) TSC leaf

Hello,

Thank you for the patch! I reviewed the code and noticed select issues 
explained below.

1. The following construction:

if (RegEbx == 0) {
DEBUG ((DEBUG_ERROR, "The CPU is not capble for Core Crystal Clock Frequency 
!!\n"));
ASSERT (RegEbx != 0);
}

Does not look good to me, and in my opinion, should be written differently:

if (RegEbx == 0 || RegEax == 0) {
DEBUG ((DEBUG_ERROR, "The CPU is not capble for Core Crystal Clock Frequency 
!!\n"));
ASSERT (RegEbx != 0);
  ASSERT (RegEax != 0);
  return 0;
}

The reason for the above code being wrong is potential division by zero below, 
which behaviour is undefined (and in fact unknown due to unspecified interrupt 
table state). Even though the intent is to not permit the use of this library 
on an unsupported platform, runtime checks and assertions are essentially 
NO-OPs, should be separate and not confused. For this to work properly the call 
to CpuidCoreClockCalculateTscFrequency should happen in library constructor 
with EFI_UNSUPPORTED return on CpuidCoreClockCalculateTscFrequency returning 0.

2. The notes about crystal clock frequency for 06_55H CPU signature:
"2500 - Intel Xeon Processor Scalable Family with CPUID signature 
06_55H(25MHz).\n"
# Intel Xeon Processor Scalable Family with CPUID signature 06_55H = 2500 
(25MHz)

are misleading in both this library and Intel SDM. Intel Xeon W processors have 
the same CPUID signature (06_55H), they report 0 crystal clock frequency, and 
their crystal clock frequency is 24 MHz. This should at least be mentioned in 
the lower part mentioning Intel Xeon W Processor Family(24MHz).

Actually, given that many Intel guys are here, I wonder whether anybody knows 
if there is any better approach to distinguish Xeon Scalable CPUs and Xeon W 
CPUs besides using brand string or using marketing frequency from CPUID 16H to 
determine crystal clock frequency (this is what Linux does at the moment)?

3. Intel Atom Denverton with CPUID signature (06_5FH), also known as Goldmont 
X, reports 0 crystal clock frequency as well, and has 25 MHz frequency. This is 
missing from SDM, but once again I believe it should be included in the two 
places from the above to avoid confusion.

Besides these 3 points, honestly, the library itself appears to be very limited 
for anything but embedding it into the firmware with known hardware, which 
already works just fine by defining the PCD. Missing 0 crystal clock frequency 
handling in runtime with hardcoding the PCD value looks very bad, because the 
number of modern Intel CPU models reporting 0 crystal clock frequency and 
having non 24 MHz frequency is quite far from 0. This makes the library 
essentially impossible to use in any UEFI application or third-party product 
even when targeting Skylake+ generation. To resolute this I vote for additional 
detection functionality to be added to the library to obtain crystal clock 
frequency when the CPUID reports 0. The PCD could be the last resort when no 
other method works. My opinion is that this should be resolved prior to merging 
the patch.

Best regards,
Vitaly

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#45699): https://edk2.groups.io/g/devel/message/45699
Mute This Topic: https://groups.io/mt/32839184/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Thanks Liming for review.

Update UefiCpuPkg.uni for review again.

Thanks,
Donald

> -Original Message-
> From: Gao, Liming
> Sent: Thursday, August 15, 2019 12:03 PM
> To: Kuo, Donald ; Dong, Eric
> ; devel@edk2.groups.io
> Cc: Ni, Ray ; Zeng, Star ; Chan,
> Amy ; Chaganty, Rangasai V
> ; Lai, Luke ; Li, Kevin
> Y ; Laszlo Ersek (ler...@redhat.com)
> ; leif.lindh...@linaro.org; af...@apple.com; Kinney,
> Michael D 
> Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by
> using CPUID(0x15) TSC leaf
> 
> Donald:
>   This change is a new feature. Now, it is not in edk2 feature planning list. 
> If
> you want to catch it into 201908 stable tag, please get approve from
> Stewards first. I have cc this mail to all Stewards.
> 
>   For this patch, I have one minor comment. You add one PCD in UefiCpuPkg
> DEC. Please also add this PCD into UefiCpuPkg.uni.
> 
> Thanks
> Liming
> > -Original Message-
> > From: Kuo, Donald
> > Sent: Thursday, August 15, 2019 11:02 AM
> > To: Dong, Eric ; devel@edk2.groups.io; Gao,
> > Liming 
> > Cc: Ni, Ray ; Zeng, Star ;
> > Chan, Amy ; Chaganty, Rangasai V
> > ; Lai, Luke ; Li,
> > Kevin Y 
> > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library
> > by using CPUID(0x15) TSC leaf
> >
> > Hi Liming,
> >
> > As we plan to add new TimerLib to use CPUID Leaf 0x15 (CPU XTAL clock
> > frequency) to calculate TSC to resolve performance value unreliable
> concern.
> >
> > As the code review had got approved and planning into 201908 stable
> > tag. Please help to review whether any concern for 201908 stable tag.
> >
> > Thanks,
> > Donald
> >
> > > -Original Message-
> > > From: Dong, Eric
> > > Sent: Thursday, August 15, 2019 10:46 AM
> > > To: devel@edk2.groups.io; Kuo, Donald 
> > > Cc: Ni, Ray ; Zeng, Star ;
> > > Chan, Amy ; Chaganty, Rangasai V
> > > 
> > > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC
> > > library by using CPUID(0x15) TSC leaf
> > >
> > > Reviewed-by: Eric Dong 
> > >
> > > > -Original Message-
> > > > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf
> > > > Of Donald Kuo
> > > > Sent: Tuesday, August 13, 2019 6:53 PM
> > > > To: devel@edk2.groups.io
> > > > Cc: Ni, Ray ; Zeng, Star ;
> > > > Dong, Eric ; Chan, Amy ;
> > > > Chaganty, Rangasai V 
> > > > Subject: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library
> > > > by using
> > > > CPUID(0x15) TSC leaf
> > > >
> > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909
> > > >
> > > > Cc: Ray Ni 
> > > > Cc: Star Zeng 
> > > > Cc: Eric Dong 
> > > > Cc: Amy Chan 
> > > > Cc: Rangasai V Chaganty 
> > > > Signed-off-by: Donald Kuo 
> > > > ---
> > > >  UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c   |  41 +++
> > > >  UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf |  35 +++
> > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni |  17 ++
> > > >  UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c   | 274
> > > > +
> > > >  UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c|  81 ++
> > > >  UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf  |  37 +++
> > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni  |  17 ++
> > > >  UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c|  58 +
> > > >  UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf  |  36 +++
> > > > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni  |  17 ++
> > > >  UefiCpuPkg/UefiCpuPkg.dec  |   8 +
> > > >  UefiCpuPkg/UefiCpuPkg.dsc  |   3 +
> > > >  12 files changed, 624 insertions(+)  create mode 100644
> > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
> > > >  create mode 100644
> > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> > > >  create mode 100644
> > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
> > > >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c
> > > >  create mode 100644
> > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c
> > > >  create mode 100644
> > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf
> > > >  create mode 1006

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Cc: Amy Chan 
Cc: Rangasai V Chaganty 
Signed-off-by: Donald Kuo 
---
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c   |  41 +++
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf |  35 +++
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni |  17 ++
 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c   | 274 +
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c|  81 ++
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf  |  37 +++
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni  |  17 ++
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c|  58 +
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf  |  36 +++
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni  |  17 ++
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   3 +
 UefiCpuPkg/UefiCpuPkg.uni  |  10 +
 13 files changed, 634 insertions(+)
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni

diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..6ddf917bad
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,41 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance as Base Timer 
Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
+
diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..fd93adc5f1
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib|SEC PEI_CORE PEIM
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/CpuTimer

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Hi Liming,

As we plan to add new TimerLib to use CPUID Leaf 0x15 (CPU XTAL clock 
frequency) to calculate TSC to resolve performance value unreliable concern.

As the code review had got approved and planning into 201908 stable tag. Please 
help to review whether any concern for 201908 stable tag.

Thanks,
Donald

> -Original Message-
> From: Dong, Eric
> Sent: Thursday, August 15, 2019 10:46 AM
> To: devel@edk2.groups.io; Kuo, Donald 
> Cc: Ni, Ray ; Zeng, Star ; Chan,
> Amy ; Chaganty, Rangasai V
> 
> Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by
> using CPUID(0x15) TSC leaf
> 
> Reviewed-by: Eric Dong 
> 
> > -Original Message-
> > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> > Donald Kuo
> > Sent: Tuesday, August 13, 2019 6:53 PM
> > To: devel@edk2.groups.io
> > Cc: Ni, Ray ; Zeng, Star ;
> > Dong, Eric ; Chan, Amy ;
> > Chaganty, Rangasai V 
> > Subject: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by
> > using
> > CPUID(0x15) TSC leaf
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909
> >
> > Cc: Ray Ni 
> > Cc: Star Zeng 
> > Cc: Eric Dong 
> > Cc: Amy Chan 
> > Cc: Rangasai V Chaganty 
> > Signed-off-by: Donald Kuo 
> > ---
> >  UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c   |  41 +++
> >  UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf |  35 +++
> > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni |  17 ++
> >  UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c   | 274
> > +
> >  UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c|  81 ++
> >  UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf  |  37 +++
> > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni  |  17 ++
> >  UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c|  58 +
> >  UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf  |  36 +++
> > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni  |  17 ++
> >  UefiCpuPkg/UefiCpuPkg.dec  |   8 +
> >  UefiCpuPkg/UefiCpuPkg.dsc  |   3 +
> >  12 files changed, 624 insertions(+)
> >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
> >  create mode 100644
> UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> >  create mode 100644
> UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
> >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c
> >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c
> >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf
> >  create mode 100644
> UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni
> >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c
> >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf
> >  create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni
> >
> > diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
> > b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
> > new file mode 100644
> > index 00..6ddf917bad
> > --- /dev/null
> > +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
> > @@ -0,0 +1,41 @@
> > +/** @file
> > +  CPUID Leaf 0x15 for Core Crystal Clock frequency instance as Base
> > +Timer
> > Library.
> > +
> > +  Copyright (c) 2019 Intel Corporation. All rights reserved.
> > +  SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include 
> > +#include 
> > +#include 
> > +
> > +/**
> > +  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
> > +
> > +  The TSC counting frequency is determined by using CPUID leaf 0x15.
> > Frequency in MHz = Core XTAL frequency * EBX/EAX.
> > +  In newer flavors of the CPU, core xtal frequency is returned in ECX
> > + or 0 if
> > not supported.
> > +  @return The number of TSC counts per second.
> > +
> > +**/
> > +UINT64
> > +CpuidCoreClockCalculateTscFrequency (
> > +  VOID
> > +  );
> > +
> > +/**
> > +  Internal function to retrieves the 64-bit frequency in Hz.
> > +
> > +  Internal function to retrieves the 64-bit frequency in Hz.
> > +
> > +  @return The frequency in Hz.
> > +
> > +**/
> > +UINT64
> > +InternalGetPerformanceCounterFrequency (
> > +  VOID
> > +  )
> > +{
> > +  return CpuidCoreClockCalculateTscFrequency (); }
> > +
> > diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> > b/UefiCpuPkg/L

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Cc: Amy Chan 
Cc: Rangasai V Chaganty 
Signed-off-by: Donald Kuo 
---
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c   |  41 +++
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf |  35 +++
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni |  17 ++
 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c   | 274 +
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c|  81 ++
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf  |  37 +++
 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni  |  17 ++
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c|  58 +
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf  |  36 +++
 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni  |  17 ++
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   3 +
 12 files changed, 624 insertions(+)
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni

diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..6ddf917bad
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,41 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance as Base Timer 
Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
+
diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..fd93adc5f1
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib|SEC PEI_CORE PEIM
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c

Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

Hi Eric,

The CPUID Leaf 0x1:EDX.TSC[bit 4] is to check capability for 
IA32_TIME_STAMP_COUNTER MSR and RDTSC instruction which defined in IA32 SDM 
chapter 17.17

And what we implement is based on IA32 SDM Chapter 18.7 for CPU core XTAL clock 
frequency which is from CPUID Leaf 0x15 and new TSC frequency = (ECX, Core XTAL 
Frequency) * EBX/EAX

So no need to check CPUID(0x01).

Thanks,
Donald

> -Original Message-
> From: Dong, Eric
> Sent: Tuesday, August 13, 2019 10:27 AM
> To: Kuo, Donald ; devel@edk2.groups.io
> Cc: Ni, Ray ; Zeng, Star ; Chan,
> Amy ; Chaganty, Rangasai V
> 
> Subject: RE: [PATCH] UefiCpuPkg: Adding a new TSC library by using
> CPUID(0x15) TSC leaf
> 
> Hi Donald,
> 
> Do you think it's necessary to check the TIME_STAMP_COUNTER capability
> before using it? I see SDM has CPUID(0x01) which return the capability of
> TIME_STAMP_COUNTER.
> 
> Thanks,
> Eric
> 
> > -Original Message-
> > From: Kuo, Donald
> > Sent: Monday, August 12, 2019 7:23 PM
> > To: devel@edk2.groups.io
> > Cc: Ni, Ray ; Zeng, Star ;
> > Dong, Eric ; Chan, Amy ;
> > Chaganty, Rangasai V 
> > Subject: [PATCH] UefiCpuPkg: Adding a new TSC library by using
> > CPUID(0x15) TSC leaf
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909
> >
> > Cc: Ray Ni 
> > Cc: Star Zeng 
> > Cc: Eric Dong 
> > Cc: Amy Chan 
> > Cc: Rangasai V Chaganty 
> > Signed-off-by: Donald Kuo 
> > ---
> >  .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
> >  .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
> >  .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  16 ++
> >  UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 272
> > +
> >  UefiCpuPkg/UefiCpuPkg.dec  |   8 +
> >  UefiCpuPkg/UefiCpuPkg.dsc  |   1 +
> >  6 files changed, 372 insertions(+)
> >  create mode 100644
> > UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
> >  create mode 100644
> > UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
> >  create mode 100644
> > UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
> >  create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
> >
> > diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
> > b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
> > new file mode 100644
> > index 00..ccb92a95d3
> > --- /dev/null
> > +++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
> > @@ -0,0 +1,40 @@
> > +/** @file
> > +  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer
> Library.
> > +
> > +  Copyright (c) 2019 Intel Corporation. All rights reserved.
> > +  SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +**/
> > +
> > +#include 
> > +#include 
> > +#include 
> > +
> > +/**
> > +  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
> > +
> > +  The TSC counting frequency is determined by using CPUID leaf 0x15.
> > Frequency in MHz = Core XTAL frequency * EBX/EAX.
> > +  In newer flavors of the CPU, core xtal frequency is returned in ECX
> > + or 0 if
> > not supported.
> > +  @return The number of TSC counts per second.
> > +
> > +**/
> > +UINT64
> > +CpuidCoreClockCalculateTscFrequency (
> > +  VOID
> > +  );
> > +
> > +/**
> > +  Internal function to retrieves the 64-bit frequency in Hz.
> > +
> > +  Internal function to retrieves the 64-bit frequency in Hz.
> > +
> > +  @return The frequency in Hz.
> > +
> > +**/
> > +UINT64
> > +InternalGetPerformanceCounterFrequency (
> > +  VOID
> > +  )
> > +{
> > +  return CpuidCoreClockCalculateTscFrequency (); }
> > diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
> > b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
> > new file mode 100644
> > index 00..7e27a55c90
> > --- /dev/null
> > +++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
> > @@ -0,0 +1,35 @@
> > +## @file
> > +#  Base CPU Timer Library
> > +#
> > +#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.
> > +The performance #  counter features are provided by the processors
> > +time
> > stamp counter.
> > +#
> > +#  Copyright (c) 2019, Intel Corporation. All rights reserved. #
> > +SPDX-License-Identifier: BSD-2-Clause-Patent # ##
> > +
> > +[Defines]
> > +  INF_VERSION= 0x00010005
&g

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Donald Kuo 
---
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  17 ++
 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 290 +
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   4 +-
 6 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..ccb92a95d3
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,40 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..c31dacd57a
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
\ No newline at end of file
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..5ed01146cf
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,290 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  );
+
+/**
+  CPUID Leaf 0x15 for Core Cry

[edk2-devel] [PATCH] UefiCpuPkg: Add new TimerLib for CPUID Leaf 0x15 Core Crystal Clock Frequency

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Donald Kuo 
---
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  17 ++
 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 290 +
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   4 +-
 6 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..ccb92a95d3
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,40 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..c31dacd57a
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
\ No newline at end of file
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..5ed01146cf
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,290 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  );
+
+/**
+  CPUID Leaf 0x15 for Core Cry

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Signed-off-by: Donald Kuo 
---
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  17 ++
 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 290 +
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   4 +-
 6 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..ccb92a95d3
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,40 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..c31dacd57a
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
\ No newline at end of file
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..5ed01146cf
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,290 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  );
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is deter

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Donald Kuo 
---
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  17 ++
 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 290 +
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   4 +-
 6 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..ccb92a95d3
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,40 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..c31dacd57a
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
\ No newline at end of file
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..5ed01146cf
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,290 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  );
+
+/**
+  CPUID Leaf 0x15 for Core Cry

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Cc: Amy Chan 
Cc: Rangasai V Chaganty 
Signed-off-by: Donald Kuo 
---
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  16 ++
 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 272 +
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   1 +
 6 files changed, 372 insertions(+)
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..ccb92a95d3
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,40 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..7e27a55c90
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..6e5c3ef70e
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,16 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..39492acd8e
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,272 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  );
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Cc: Amy Chan 
Cc: Rangasai V Chaganty 
Signed-off-by: Donald Kuo 
---
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  16 ++
 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 274 +
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   1 +
 6 files changed, 374 insertions(+)
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..ccb92a95d3
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,40 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..7e27a55c90
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..6e5c3ef70e
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,16 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..965e206d7d
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,274 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  );
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined

[edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf

[Donald Kuo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1909

Cc: Ray Ni 
Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Donald Kuo 
---
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.c  |  40 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.inf|  35 +++
 .../Library/BaseCpuTimerLib/BaseCpuTimerLib.uni|  17 ++
 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c   | 290 +
 UefiCpuPkg/UefiCpuPkg.dec  |   8 +
 UefiCpuPkg/UefiCpuPkg.dsc  |   4 +-
 6 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
 create mode 100644 UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
new file mode 100644
index 00..ccb92a95d3
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.c
@@ -0,0 +1,40 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  CPUID Leaf 0x15 for Core Crystal Clock Frequency.
+
+  The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency 
in MHz = Core XTAL frequency * EBX/EAX.
+  In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if 
not supported.
+  @return The number of TSC counts per second.
+
+**/
+UINT64
+CpuidCoreClockCalculateTscFrequency (
+  VOID
+  );
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  )
+{
+  return CpuidCoreClockCalculateTscFrequency ();
+}
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
new file mode 100644
index 00..c31dacd57a
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.inf
@@ -0,0 +1,35 @@
+## @file
+#  Base CPU Timer Library
+#
+#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  counter features are provided by the processors time stamp counter.
+#
+#  Copyright (c) 2019, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BaseCpuTimerLib
+  FILE_GUID  = F10B5B91-D15A-496C-B044-B5235721AA08
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+  MODULE_UNI_FILE= BaseCpuTimerLib.uni
+
+[Sources]
+  CpuTimerLib.c
+  BaseCpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
\ No newline at end of file
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni 
b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
new file mode 100644
index 00..fcf2b0fbcb
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/BaseCpuTimerLib.uni
@@ -0,0 +1,17 @@
+// /** @file
+// Base CPU Timer Library
+//
+// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency.  The 
performance
+// counter features are provided by the processors time stamp counter.
+//
+// Copyright (c) 2019, Intel Corporation. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Provides basic timer 
support using CPUID Leaf 0x15 XTAL frequency."
+
diff --git a/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c 
b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
new file mode 100644
index 00..5ed01146cf
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseCpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,290 @@
+/** @file
+  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  Internal function to retrieves the 64-bit frequency in Hz.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+InternalGetPerformanceCounterFrequency (
+  VOID
+  );
+
+/**
+  CPUID Leaf 0x15 for Core Cry