Re: [edk2-devel] [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
2021年12月10日(金) 15:51 Masami Hiramatsu via groups.io : > --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec > +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec > @@ -41,7 +41,11 @@ >gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|6250|UINT32|0x0005 > ># for capsule update > +!if $(EXPAND_NVSTORAGE) == 1 > + > gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x0400 > +!else > > gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x0009 > +!endif Oops, this may cause a build error. build.py... /home/mhiramat/firmware/edk2-platforms/Silicon/Socionext/SynQuacer/SynQuacer.dec(44): error 3000: No token space GUID or PCD name specified !if $(EXPAND_NVSTORAGE) == 1 (.|||) Can't we use any macros in .dec file? Thank you, > ># for SMBIOS Type17 >gSynQuacerTokenSpaceGuid.PcdStoredSpdDDR4Address|0|UINT32|0x000A > > > > > > -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84690): https://edk2.groups.io/g/devel/message/84690 Mute This Topic: https://groups.io/mt/87694100/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v3 6/6] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
Add "EXPAND_NVSTORAGE" build option to expand NvStorage Variable size and FTW spare/working size for the DeveloperBox platform. Since the size of the NvStorage VariableSize is not enough large, FWTS uefirttime test, which updates the NV variables in runtime, failes. This expands the size to fix this issue. Note that this is not compatible with previous variable layout on NOR flash, if this option is enabled, the PcdLowestSupportedFirmwareVersion is set to 0x400 (1024). Since the DeveloperBox platform uses the "BUILD_NUMBER" build option for the firmware version (PcdFirmwareRevision), firmware builder must ensure followings; - if the EXPAND_NVSTORAGE=1, BUILD_NUMBER must be bigger than 1024, - Or, the BUILD_NUMBER must be less than 1024. Signed-off-by: Masami Hiramatsu Reported-by: Kazuhiko Sakamoto --- Changes in v3: - Expand the NvStorage size with build option. - Update the PcdLowestSupportedFirmwareVersion. --- .../Socionext/DeveloperBox/DeveloperBox.dsc.inc|9 - Silicon/Socionext/SynQuacer/SynQuacer.dec |4 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc index c034c0a32c..40d0baaa30 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc @@ -280,12 +280,19 @@ gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress|0x0800 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0840 +!if $(EXPAND_NVSTORAGE) == 1 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0008 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0848 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0008 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0850 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0008 +!else gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0001 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0841 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0001 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0842 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0001 - +!endif gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"SNI " gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x52434155514e5953 # SYNQUACR gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec index 401ac4e78d..bccb88bcca 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -41,7 +41,11 @@ gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|6250|UINT32|0x0005 # for capsule update +!if $(EXPAND_NVSTORAGE) == 1 + gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x0400 +!else gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x0009 +!endif # for SMBIOS Type17 gSynQuacerTokenSpaceGuid.PcdStoredSpdDDR4Address|0|UINT32|0x000A -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84626): https://edk2.groups.io/g/devel/message/84626 Mute This Topic: https://groups.io/mt/87631131/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v3 5/6] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
Add DBG2 table to ACPI tables. The COM1 uart port will be used
for OS debug, and it is 16550 compatible.
Signed-off-by: Masami Hiramatsu
---
Changes in v2:
- Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
- Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1
Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70
2 files changed, 71 insertions(+)
create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 886777a0fa..e77d7a3056 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -19,6 +19,7 @@
[Sources]
AcpiTables.h
AcpiSsdtRootPci.asl
+ Dbg2.aslc
Dsdt.asl
Fadt.aslc
Gtdt.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
new file mode 100644
index 00..89c9dbd998
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
@@ -0,0 +1,70 @@
+/** @file
+* Debug Port Table (DBG2)
+*
+* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#include
+#include
+#include
+#include
+#include
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1',
0x00 }
+#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0,
EFI_ACPI_6_3_BYTE, Address }
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTUREBaseAddressRegister;
+ UINT32AddressSize;
+ UINT8 NameSpaceString[10];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
+} DBG2_TABLE;
+
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+__ACPI_HEADER (
+ EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+),
+OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+1 /* NumberOfDebugPorts */
+ },
+ {
+{
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
+ 1, /* NumberofGenericAddressRegisters
*/
+ 10, /* NameSpaceStringLength */
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
+ 0, /* OemDataLength */
+ 0, /* OemDataOffset */
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
+},
+SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
+SYNQUACER_UART1_SIZE, /* AddressSize */
+SYNQUACER_UART1_STR, /* NameSpaceString */
+ }
+};
+
+#pragma pack()
+
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+VOID* CONST ReferenceAcpiTable = &Dbg2;
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[edk2-devel] [PATCH v3 4/6] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks
Fix the number of erase blocks by rounding up the result.
The erase blocks must include the last block covered by the
length bytes.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
Reviewed-by: Leif Lindholm
---
.../SynQuacerPlatformFlashAccessLib.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
index bded74dc4f..ad4021cf59 100644
---
a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
+++
b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
@@ -283,7 +283,7 @@ PerformFlashWriteWithProgress (
DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address %llx (LBA 0x%lx)\n",
__FUNCTION__, Length, FlashAddress, Lba));
- Status = Fvb->EraseBlocks (Fvb, Lba, Length / BlockSize,
+ Status = Fvb->EraseBlocks (Fvb, Lba, (Length + BlockSize - 1) / BlockSize,
EFI_LBA_LIST_TERMINATOR);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Fvb->EraseBlocks () failed - %r\n",
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[edk2-devel] [PATCH v3 3/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width
Since the RefreshFramePhysicalAddress and
WatchdogControlFramePhysicalAddress fields are defined as UINT64
in EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE data structure,
and both of gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase and
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase are defined as
UINT64, FixedPcdGet64() should be used for reading and setting
those parameters.
Signed-off-by: Masami Hiramatsu
---
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index e7ab88b0a8..b045a49efa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -74,8 +74,8 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
// UINT32 GTxCommonFlags
},
EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
-FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
-FixedPcdGet32 (PcdGenericWatchdogControlBase),
+FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
+FixedPcdGet64 (PcdGenericWatchdogControlBase),
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
0),
};
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[edk2-devel] [PATCH v3 2/6] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
This fixes Socionext DeveloperBox GenericWatchdog interrupt
number to 93 instead of 94. Since the 93 is the default interrupt
number defined in ArmPkg/ArmPkg.dec, this doesn't redefine
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
Changes in v2:
- Just focus on using PcdGenericWatchdogEl2IntrNum in Gtdt.aslc
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1 +
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 96efb2d38e..886777a0fa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -50,6 +50,7 @@
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index c811fc5a0c..e7ab88b0a8 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -76,7 +76,7 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
FixedPcdGet32 (PcdGenericWatchdogControlBase),
-94,
+FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
0),
};
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[edk2-devel] [PATCH v3 1/6] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready
If an EFI application frequently repeats SetTime and GetTime,
the I2C bus can be busy and failed to start. To fix this issue,
add waiting loop for the bus busy status. (Usually, it is
enough to read 3 times for checking, but for safety this
sets 10 for timeout.)
This also clean up the code path a bit so that it is easy to
understand what should do on each combinations of BSR.BB and
BCR.MSS.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
Changes in v3:
- Fix LF to CRLF.
- Change title to wait for bus ready.
Changes in v2:
- Rename WAIT_FOR_BUS_BUSY_TIMEOUT to WAIT_FOR_BUS_READY_TIMEOUT
- Fix indentation.
---
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 ++--
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git
a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index 8aa9799018..c8646db800 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -16,6 +16,8 @@
//
#define WAIT_FOR_INTERRUPT_TIMEOUT5
+#define WAIT_FOR_BUS_READY_TIMEOUT 10
+
/**
Set the frequency for the I2C clock line.
@@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
IN EFI_I2C_OPERATION *Op
)
{
+ UINTN Timeout = WAIT_FOR_BUS_READY_TIMEOUT;
UINT8 Bsr;
UINT8 Bcr;
@@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
- if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
-DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
-return EFI_ALREADY_STARTED;
- }
+ if (!(Bcr & F_I2C_BCR_MSS)) {
- if (Bsr & F_I2C_BSR_BB) { // Bus is busy
-DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
-MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
- } else {
-if (Bcr & F_I2C_BCR_MSS) {
- DEBUG ((DEBUG_WARN,
-"%a: is not in master mode\n", __FUNCTION__));
- return EFI_DEVICE_ERROR;
+if (Bsr & F_I2C_BSR_BB) { // Bus is busy
+do {
+ Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
+} while (Timeout-- && (Bsr & F_I2C_BSR_BB));
+
+if (Bsr & F_I2C_BSR_BB) {
+ DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
+ return EFI_ALREADY_STARTED;
+}
}
+
DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
+
+ } else { // F_I2C_BCR_MSS is set
+
+if (!(Bsr & F_I2C_BSR_BB)) {
+ DEBUG ((DEBUG_WARN,
+"%a: is not in master mode\n", __FUNCTION__));
+ return EFI_DEVICE_ERROR;
+}
+
+DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
+MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
}
+
return EFI_SUCCESS;
}
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[edk2-devel] [PATCH v3 0/6] Series short description
Hi Leif and Ard, Here are the 3rd version of the series to fix some issues on the DeveloperBox. In this version, I fixed the [1/6] for the line ending issue (sorry about this, I forgot to update the basement tree), and add NvStorage expanding patch [6/6/] again with the lowest supported firmware version and build option. I hope this fits what you thought. Thank you, --- Masami Hiramatsu (6): [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus ready [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes .../Socionext/DeveloperBox/DeveloperBox.dsc.inc|9 ++- .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |2 + Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |6 +- .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 +++ .../SynQuacerPlatformFlashAccessLib.c |2 - Silicon/Socionext/SynQuacer/SynQuacer.dec |4 + 7 files changed, 114 insertions(+), 17 deletions(-) create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84620): https://edk2.groups.io/g/devel/message/84620 Mute This Topic: https://groups.io/mt/87631123/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 5/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
Add DBG2 table to ACPI tables. The COM1 uart port will be used
for OS debug, and it is 16550 compatible.
Signed-off-by: Masami Hiramatsu
---
Changes in v2:
- Move Dbg2.aslc before Dsdt.asl to keep the list alphabetically sorted.
- Use EFI_ACPI_6_3_SYSTEM_MEMORY and EFI_ACPI_6_3_BYTE for initialization.
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1
Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70
2 files changed, 71 insertions(+)
create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 886777a0fa..e77d7a3056 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -19,6 +19,7 @@
[Sources]
AcpiTables.h
AcpiSsdtRootPci.asl
+ Dbg2.aslc
Dsdt.asl
Fadt.aslc
Gtdt.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
new file mode 100644
index 00..89c9dbd998
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
@@ -0,0 +1,70 @@
+/** @file
+* Debug Port Table (DBG2)
+*
+* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#include
+#include
+#include
+#include
+#include
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1',
0x00 }
+#define SQ_GAS32(Address) { EFI_ACPI_6_3_SYSTEM_MEMORY, 32, 0,
EFI_ACPI_6_3_BYTE, Address }
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTUREBaseAddressRegister;
+ UINT32AddressSize;
+ UINT8 NameSpaceString[10];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
+} DBG2_TABLE;
+
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+__ACPI_HEADER (
+ EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+),
+OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+1 /* NumberOfDebugPorts */
+ },
+ {
+{
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
+ 1, /* NumberofGenericAddressRegisters
*/
+ 10, /* NameSpaceStringLength */
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
+ 0, /* OemDataLength */
+ 0, /* OemDataOffset */
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
+},
+SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
+SYNQUACER_UART1_SIZE, /* AddressSize */
+SYNQUACER_UART1_STR, /* NameSpaceString */
+ }
+};
+
+#pragma pack()
+
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+VOID* CONST ReferenceAcpiTable = &Dbg2;
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[edk2-devel] [PATCH v2 4/5] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks
Fix the number of erase blocks by rounding up the result.
The erase blocks must include the last block covered by the
length bytes.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
Reviewed-by: Leif Lindholm
---
.../SynQuacerPlatformFlashAccessLib.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
index bded74dc4f..ad4021cf59 100644
---
a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
+++
b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
@@ -283,7 +283,7 @@ PerformFlashWriteWithProgress (
DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address %llx (LBA 0x%lx)\n",
__FUNCTION__, Length, FlashAddress, Lba));
- Status = Fvb->EraseBlocks (Fvb, Lba, Length / BlockSize,
+ Status = Fvb->EraseBlocks (Fvb, Lba, (Length + BlockSize - 1) / BlockSize,
EFI_LBA_LIST_TERMINATOR);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Fvb->EraseBlocks () failed - %r\n",
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[edk2-devel] [PATCH v2 3/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width
Since the RefreshFramePhysicalAddress and
WatchdogControlFramePhysicalAddress fields are defined as UINT64
in EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE data structure,
and both of gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase and
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase are defined as
UINT64, FixedPcdGet64() should be used for reading and setting
those parameters.
Signed-off-by: Masami Hiramatsu
---
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index e7ab88b0a8..b045a49efa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -74,8 +74,8 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
// UINT32 GTxCommonFlags
},
EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
-FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
-FixedPcdGet32 (PcdGenericWatchdogControlBase),
+FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
+FixedPcdGet64 (PcdGenericWatchdogControlBase),
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
0),
};
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[edk2-devel] [PATCH v2 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
This fixes Socionext DeveloperBox GenericWatchdog interrupt
number to 93 instead of 94. Since the 93 is the default interrupt
number defined in ArmPkg/ArmPkg.dec, this doesn't redefine
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
Changes in v2:
- Just focus on using PcdGenericWatchdogEl2IntrNum in Gtdt.aslc
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1 +
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 96efb2d38e..886777a0fa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -50,6 +50,7 @@
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index c811fc5a0c..e7ab88b0a8 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -76,7 +76,7 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
FixedPcdGet32 (PcdGenericWatchdogControlBase),
-94,
+FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
0),
};
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[edk2-devel] [PATCH v2 1/5] [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy
If an EFI application frequently repeats SetTime and GetTime,
the I2C bus can be busy and failed to start. To fix this issue,
add waiting loop for the bus busy status. (Usually, it is
enough to read 3 times for checking, but for safety this
sets 10 for timeout.)
This also clean up the code path a bit so that it is easy to
understand what should do on each combinations of BSR.BB and
BCR.MSS.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
Changes in v2:
- Rename WAIT_FOR_BUS_BUSY_TIMEOUT to WAIT_FOR_BUS_READY_TIMEOUT
- Fix indentation.
---
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 ++--
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git
a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index 31f6e3072f..918a9e7752 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -16,6 +16,8 @@
//
#define WAIT_FOR_INTERRUPT_TIMEOUT5
+#define WAIT_FOR_BUS_READY_TIMEOUT 10
+
/**
Set the frequency for the I2C clock line.
@@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
IN EFI_I2C_OPERATION *Op
)
{
+ UINTN Timeout = WAIT_FOR_BUS_READY_TIMEOUT;
UINT8 Bsr;
UINT8 Bcr;
@@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
- if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
-DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
-return EFI_ALREADY_STARTED;
- }
+ if (!(Bcr & F_I2C_BCR_MSS)) {
- if (Bsr & F_I2C_BSR_BB) { // Bus is busy
-DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
-MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
- } else {
-if (Bcr & F_I2C_BCR_MSS) {
- DEBUG ((DEBUG_WARN,
-"%a: is not in master mode\n", __FUNCTION__));
- return EFI_DEVICE_ERROR;
+if (Bsr & F_I2C_BSR_BB) { // Bus is busy
+do {
+ Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
+} while (Timeout-- && (Bsr & F_I2C_BSR_BB));
+
+if (Bsr & F_I2C_BSR_BB) {
+ DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
+ return EFI_ALREADY_STARTED;
+}
}
+
DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
+
+ } else { // F_I2C_BCR_MSS is set
+
+if (!(Bsr & F_I2C_BSR_BB)) {
+ DEBUG ((DEBUG_WARN,
+"%a: is not in master mode\n", __FUNCTION__));
+ return EFI_DEVICE_ERROR;
+}
+
+DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
+MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
}
+
return EFI_SUCCESS;
}
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[edk2-devel] [PATCH v2 0/5] Series short description
Hi Leif and Ard, Here are the 2nd version of the series to fix some issues on the DeveloperBox. I fixed some patches according to the Leif's comment. I also dropped the last variable area update patch, because the release number discussion is still continuing on the previous thread. Anyway, the fixes for otheer patches are ready. So I send the series without it. Thank you, --- Masami Hiramatsu (5): [edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number [edk2-platforms] Silicon/Socionext/SynQuacer: Fix to read watchdog parameters with correct width [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |2 + Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |6 +- .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 +++ .../SynQuacerPlatformFlashAccessLib.c |2 - 5 files changed, 102 insertions(+), 16 deletions(-) create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84293): https://edk2.groups.io/g/devel/message/84293 Mute This Topic: https://groups.io/mt/87472860/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 5/5] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
Hi Leif, I found that "gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision" is a digit number. On the DeveloperBox, it is the same as the BUILD_NUMBER which was set when building the EDK2 as below. Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc: gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision|$(BUILD_NUMBER) And now it becomes 99 in official snapshot (this will be the old series) http://snapshots.linaro.org/components/kernel/leg-96boards-developerbox-edk2/99/ However, this snapshot is actually not updated a while ago since the source repository is not more maintained. Anyway, my point is that the FirmwareRevision is not set as a fixed number, but it will be given at the build time. In that case, it is hard to set the PcdLowestSupportedFirmwareVersion because the PcdFirmwareRevision can be freely editable by who is releasing the firmware (and now no one officially releases it. just a bot repeating compilation without any update) My idea is to keep the PcdFirmwareRevision as is, but only set the PcdLowestSupportedFirmwareVersion as for example 1024 with the variable area is extended. The person who maintains the firmware release build needs to care about setting BUILD_NUMBER more than 1024. This will prevent users to rollback to older image accidentary, but not prevent the careless developer to build their own binary with lower BUILD_NUMBER etc. What do you think? Thank you, 2021年11月30日(火) 7:33 Masami Hiramatsu via groups.io : > > Hi Leif, > > 2021年11月29日(月) 22:43 Leif Lindholm : > > > > On Sat, Nov 27, 2021 at 16:48:45 +0900, Masami Hiramatsu wrote: > > > > On Fri, Nov 05, 2021 at 18:24:01 +0900, Masami Hiramatsu wrote: > > > > > Expand NvStorage Variable size and FTW spare/working size > > > > > for the DeveloperBox platform. > > > > > > > > > > Since the size of the NvStorage VariableSize is not enough > > > > > large, FWTS uefirttime test, which updates the NV > > > > > variables in runtime, failes. This expands the size to fix > > > > > this issue. > > > > > > > > Does this change erase all existing variables? > > > > > > Ah, indeed. It may need to erase all variables. > > > > That is quite likely to lead to upset users. > > OK. > > > > > If so, I think it is worth introducing this as a non-default build > > > > option, in order to not wreck existing installations on a firmware > > > > update. > > > > > > > > I think it would also be worth considering whether to update > > > > PcdLowestSupportedFirmwareVersion. PcdFirmwareRevision > > > > should definitely be updated. > > > > > > I'm not sure about this point. > > > You meant we should have 2 different revisions like a branch? > > > - Branch A(current version): keep the variable area size the same. > > > - Branch B(new version): expand the variable area. > > > And a build option will change the branch by updating the > > > PcdFirmwareRevision? > > > > Not a branch - just that you need to explicitly build for the size of > > flash area you want to use, and if you provide pre-built downloadable > > ones - provide two variants. > > I got it. > > > This becomes a bit of a maintenance nightmare over time. > > Actually, I'm considering a kind of "leap" firmware release, which > involves all firmware update by manual (not automatic), because the > SCP-firmware is too old anymore and the new SCP firmware (OSS version) > requires to update TF-A, which is not compatible with old ones. > Obviously, this must be done by manual. > > So, afterwards, we will not release old version anymore. Anyway, the > old firmware snapshot image is not updated in one year (since source > repository has not been updated). The firmware on LVFS is released in > 2019. > (BTW, can I change the UUID which fwupd detects too?) > > I will provide a build option for the users who update EDK2 by themselves. > > > A better solution would be for the firmware to (somehow) resize the > > parameter area - retaining existing values - if it encounters the > > smaller version. I don't think we have an example of that. > > Hmm, I rather like to erase it while the "leap" update, since the backward > compatibility is not guaranteed. And after the update, user will be able > to choose the U-Boot on the DeveloperBox. > > > PcdLowestSupportedFirmwareVersion still needs to be set, to the same > > value as the new PcdFirmwareRevision, to prevent downgrading to a > > version that does not support the larger size. > > OK, so this is for protecting rollback.
Re: [edk2-devel] [PATCH 5/5] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
Hi Leif, 2021年11月29日(月) 22:43 Leif Lindholm : > > On Sat, Nov 27, 2021 at 16:48:45 +0900, Masami Hiramatsu wrote: > > > On Fri, Nov 05, 2021 at 18:24:01 +0900, Masami Hiramatsu wrote: > > > > Expand NvStorage Variable size and FTW spare/working size > > > > for the DeveloperBox platform. > > > > > > > > Since the size of the NvStorage VariableSize is not enough > > > > large, FWTS uefirttime test, which updates the NV > > > > variables in runtime, failes. This expands the size to fix > > > > this issue. > > > > > > Does this change erase all existing variables? > > > > Ah, indeed. It may need to erase all variables. > > That is quite likely to lead to upset users. OK. > > > If so, I think it is worth introducing this as a non-default build > > > option, in order to not wreck existing installations on a firmware > > > update. > > > > > > I think it would also be worth considering whether to update > > > PcdLowestSupportedFirmwareVersion. PcdFirmwareRevision > > > should definitely be updated. > > > > I'm not sure about this point. > > You meant we should have 2 different revisions like a branch? > > - Branch A(current version): keep the variable area size the same. > > - Branch B(new version): expand the variable area. > > And a build option will change the branch by updating the > > PcdFirmwareRevision? > > Not a branch - just that you need to explicitly build for the size of > flash area you want to use, and if you provide pre-built downloadable > ones - provide two variants. I got it. > This becomes a bit of a maintenance nightmare over time. Actually, I'm considering a kind of "leap" firmware release, which involves all firmware update by manual (not automatic), because the SCP-firmware is too old anymore and the new SCP firmware (OSS version) requires to update TF-A, which is not compatible with old ones. Obviously, this must be done by manual. So, afterwards, we will not release old version anymore. Anyway, the old firmware snapshot image is not updated in one year (since source repository has not been updated). The firmware on LVFS is released in 2019. (BTW, can I change the UUID which fwupd detects too?) I will provide a build option for the users who update EDK2 by themselves. > A better solution would be for the firmware to (somehow) resize the > parameter area - retaining existing values - if it encounters the > smaller version. I don't think we have an example of that. Hmm, I rather like to erase it while the "leap" update, since the backward compatibility is not guaranteed. And after the update, user will be able to choose the U-Boot on the DeveloperBox. > PcdLowestSupportedFirmwareVersion still needs to be set, to the same > value as the new PcdFirmwareRevision, to prevent downgrading to a > version that does not support the larger size. OK, so this is for protecting rollback. But this means, do I need to make it optional (switched by build option) too? > > > Also PcdLowestSupportedFirmwareVersion you meant is > > in the capsule file? > > I meant to change the Pcd value. That implements the change in > SystemFirmwareDescriptorTable.aslc. OK. Thank you, > > Regards, > > Leif > > > Thank you, > > > > > > > > > > / > > > Leif > > > > > > > Signed-off-by: Masami Hiramatsu > > > > Reported-by: Kazuhiko Sakamoto > > > > --- > > > > .../Socionext/DeveloperBox/DeveloperBox.dsc.inc| 10 +- > > > > 1 file changed, 5 insertions(+), 5 deletions(-) > > > > > > > > diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > > > b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > > > index 0a364bc457..3baf97ecc0 100644 > > > > --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > > > +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > > > @@ -280,11 +280,11 @@ > > > >gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress|0x0800 > > > > > > > > > > > > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0840 > > > > - > > > > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0001 > > > > - > > > > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0841 > > > > - > > > > gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0001 > > > > - > > > > gEfiMdeModule
Re: [edk2-devel] [PATCH 4/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
Hi Leif,
2021年11月27日(土) 3:10 Leif Lindholm :
>
> On Fri, Nov 05, 2021 at 18:23:53 +0900, Masami Hiramatsu wrote:
> > Add DBG2 table to ACPI tables. The COM1 uart port will be used
> > for OS debug, and it is 16550 compatible.
> >
> > Signed-off-by: Masami Hiramatsu
> > ---
> > .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1
> > Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70
> >
> > 2 files changed, 71 insertions(+)
> > create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> >
> > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > index 886777a0fa..3023206330 100644
> > --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > @@ -22,6 +22,7 @@
> >Dsdt.asl
> >Fadt.aslc
> >Gtdt.aslc
> > + Dbg2.aslc
>
> Please move this before Dsdt.asl, to keep the list alphabetically sorted.
OK.
>
> >Iort.aslc
> >Madt.aslc
> >Mcfg.aslc
> > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > new file mode 100644
> > index 00..027b3b658b
> > --- /dev/null
> > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
> > @@ -0,0 +1,70 @@
> > +/** @file
> > +* Debug Port Table (DBG2)
> > +*
> > +* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
> > +*
> > +* SPDX-License-Identifier: BSD-2-Clause-Patent
> > +*
> > +**/
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include "AcpiTables.h"
> > +
> > +#pragma pack(1)
> > +
> > +#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M',
> > '1', 0x00 }
> > +#define SQ_GAS32(Address) { EFI_ACPI_5_0_SYSTEM_MEMORY, 32, 0,
> > EFI_ACPI_5_0_BYTE, Address }
>
> Use EFI_ACPI_6_3_ consistently?
OK, got it.
Thank you,
>
> /
> Leif
>
> > +
> > +typedef struct {
> > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> > + EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTUREBaseAddressRegister;
> > + UINT32AddressSize;
> > + UINT8 NameSpaceString[10];
> > +} DBG2_DEBUG_DEVICE_INFORMATION;
> > +
> > +typedef struct {
> > + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
> > + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
> > +} DBG2_TABLE;
> > +
> > +
> > +STATIC DBG2_TABLE Dbg2 = {
> > + {
> > +__ACPI_HEADER (
> > + EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
> > + DBG2_TABLE,
> > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> > +),
> > +OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> > +1 /* NumberOfDebugPorts */
> > + },
> > + {
> > +{
> > + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
> > + sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
> > + 1, /*
> > NumberofGenericAddressRegisters */
> > + 10, /* NameSpaceStringLength */
> > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
> > + 0, /* OemDataLength */
> > + 0, /* OemDataOffset */
> > + EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
> > + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
> > + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
> > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
> > + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
> > +},
> > +SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
> > +SYNQUACER_UART1_SIZE, /* AddressSize */
> > +SYNQUACER_UART1_STR, /* NameSpaceString */
> > + }
> > +};
> > +
> > +#pragma pack()
> > +
> > +// Reference the table being generated to prevent the optimizer from
> > removing
> > +// the data structure from the executable
> > +VOID* CONST ReferenceAcpiTable = &Dbg2;
> >
--
Masami Hiramatsu
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Re: [edk2-devel] [PATCH 5/5] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
Hi Leif, 2021年11月27日(土) 3:19 Leif Lindholm : > > On Fri, Nov 05, 2021 at 18:24:01 +0900, Masami Hiramatsu wrote: > > Expand NvStorage Variable size and FTW spare/working size > > for the DeveloperBox platform. > > > > Since the size of the NvStorage VariableSize is not enough > > large, FWTS uefirttime test, which updates the NV > > variables in runtime, failes. This expands the size to fix > > this issue. > > Does this change erase all existing variables? Ah, indeed. It may need to erase all variables. > > If so, I think it is worth introducing this as a non-default build > option, in order to not wreck existing installations on a firmware > update. > > I think it would also be worth considering whether to update > PcdLowestSupportedFirmwareVersion. PcdFirmwareRevision > should definitely be updated. I'm not sure about this point. You meant we should have 2 different revisions like a branch? - Branch A(current version): keep the variable area size the same. - Branch B(new version): expand the variable area. And a build option will change the branch by updating the PcdFirmwareRevision? Also PcdLowestSupportedFirmwareVersion you meant is in the capsule file? Thank you, > > / > Leif > > > Signed-off-by: Masami Hiramatsu > > Reported-by: Kazuhiko Sakamoto > > --- > > .../Socionext/DeveloperBox/DeveloperBox.dsc.inc| 10 +- > > 1 file changed, 5 insertions(+), 5 deletions(-) > > > > diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > index 0a364bc457..3baf97ecc0 100644 > > --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc > > @@ -280,11 +280,11 @@ > >gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress|0x0800 > > > >gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0840 > > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0001 > > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0841 > > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0001 > > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0842 > > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0001 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0008 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0848 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0008 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0850 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0008 > > > >gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"SNI " > > > > gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x52434155514e5953 > > # SYNQUACR > > -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84114): https://edk2.groups.io/g/devel/message/84114 Mute This Topic: https://groups.io/mt/86836385/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
Hi Leif,
2021年11月27日(土) 2:50 Leif Lindholm :
>
> On Fri, Nov 05, 2021 at 18:23:36 +0900, Masami Hiramatsu wrote:
> > This fixes Socionext DeveloperBox GenericWatchdog interrupt
> > number to 93 instead of 94. Since the 93 is the default interrupt
> > number defined in ArmPkg/ArmPkg.dec, this doesn't redefine
> > gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum.
> >
>
> That is one thing this patch does.
>
> > Signed-off-by: Masami Hiramatsu
> > Reported-by: Kazuhiko Sakamoto
> > ---
> > .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1 +
> > Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |6 +++---
> > 2 files changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > index 96efb2d38e..886777a0fa 100644
> > --- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
> > @@ -50,6 +50,7 @@
> >
> >gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> >gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> > + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
> >
> >gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
> >gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
> > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
> > b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
> > index c811fc5a0c..b045a49efa 100644
> > --- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
> > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
> > @@ -74,9 +74,9 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
> >// UINT32 GTxCommonFlags
> >},
> >EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
> > -FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
> > -FixedPcdGet32 (PcdGenericWatchdogControlBase),
> > -94,
> > +FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
> > +FixedPcdGet64 (PcdGenericWatchdogControlBase),
>
> But it also changes these two FixedPcdGet32 calls to FixedPcdGet64.
> That should be a separate patch.
OK, I'll make it a separate patch.
Thank you,
>
> /
> Leif
>
> > +FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
> > 0),
> > };
> >
> >
--
Masami Hiramatsu
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Re: [edk2-devel] [PATCH 1/5] [RESEND][edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy
Hi Leif,
2021年11月27日(土) 2:47 Leif Lindholm :
>
> On Fri, Nov 05, 2021 at 18:23:28 +0900, Masami Hiramatsu wrote:
> > If an EFI application frequently repeats SetTime and GetTime,
> > the I2C bus can be busy and failed to start. To fix this issue,
> > add waiting loop for the bus busy status. (Usually, it is
> > enough to read 3 times for checking, but for safety this
> > sets 10 for timeout.)
> >
> > This also clean up the code path a bit so that it is easy to
> > understand what should do on each combinations of BSR.BB and
> > BCR.MSS.
> >
> > Signed-off-by: Masami Hiramatsu
> > Reported-by: Kazuhiko Sakamoto
> > ---
> > .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38
> > ++--
> > 1 file changed, 26 insertions(+), 12 deletions(-)
> >
> > diff --git
> > a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> > b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> > index 31f6e3072f..380eba8059 100644
> > --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> > +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> > @@ -16,6 +16,8 @@
> > //
> > #define WAIT_FOR_INTERRUPT_TIMEOUT5
> >
> > +#define WAIT_FOR_BUS_BUSY_TIMEOUT10
> > +
>
> I think it would be more clear English to say that we are waiting
> _for_ the bus to be *ready* - meaning that we are waiting _while_ the
> bus is *busy*.
>
> So I suggest
> WAIT_FOR_BUS_BUSY_TIMEOUT ->
> WAIT_FOR_BUS_READY_TIMEOUT
Oops, indeed. It is waiting for the bus "ready", not "busy" ...
>
> > /**
> >Set the frequency for the I2C clock line.
> >
> > @@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
> >IN EFI_I2C_OPERATION *Op
> >)
> > {
> > + UINTN Timeout = WAIT_FOR_BUS_BUSY_TIMEOUT;
>
> This indentation does not match the subsequent lines.
OK, I'll fix that.
Thank you!
>
> /
> Leif
>
> >UINT8 Bsr;
> >UINT8 Bcr;
> >
> > @@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
> >Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
> >Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
> >
> > - if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
> > -DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
> > -return EFI_ALREADY_STARTED;
> > - }
> > + if (!(Bcr & F_I2C_BCR_MSS)) {
> >
> > - if (Bsr & F_I2C_BSR_BB) { // Bus is busy
> > -DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
> > -MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
> > - } else {
> > -if (Bcr & F_I2C_BCR_MSS) {
> > - DEBUG ((DEBUG_WARN,
> > -"%a: is not in master mode\n", __FUNCTION__));
> > - return EFI_DEVICE_ERROR;
> > +if (Bsr & F_I2C_BSR_BB) { // Bus is busy
> > +do {
> > + Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
> > +} while (Timeout-- && (Bsr & F_I2C_BSR_BB));
> > +
> > +if (Bsr & F_I2C_BSR_BB) {
> > + DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
> > + return EFI_ALREADY_STARTED;
> > +}
> > }
> > +
> > DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
> > MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
> > Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
> > +
> > + } else { // F_I2C_BCR_MSS is set
> > +
> > +if (!(Bsr & F_I2C_BSR_BB)) {
> > + DEBUG ((DEBUG_WARN,
> > +"%a: is not in master mode\n", __FUNCTION__));
> > + return EFI_DEVICE_ERROR;
> > +}
> > +
> > +DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
> > +MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
> >}
> > +
> >return EFI_SUCCESS;
> > }
> >
> >
--
Masami Hiramatsu
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Re: [edk2-devel] [PATCH 0/5] Series short description
Hi Leif, Oh, I missed that. I need to fix my mailing list filter... Anyway, thanks for the feedback. Let me update if I need. Regards, 2021年11月26日(金) 1:40 Leif Lindholm : > > Hi Masami, > > My feedback was > https://edk2.groups.io/g/devel/message/83641 > > Best Regards, > > Leif > > On Thu, Nov 25, 2021 at 20:19:51 +0900, Masami Hiramatsu wrote: > > Hello Leif and Ard, > > > > Could you give me any feedback on this series? > > > > Thank you, > > > > 2021年11月5日(金) 18:23 Masami Hiramatsu : > > > > > > Hello Leif and Ard, > > > > > > Here are a series of patches to fix some issues on the DeveloperBox. > > > Our team found those issues when we ran the SystemReady ES ACS tests[1]. > > > > > > [1] https://github.com/ARM-software/arm-systemready/tree/main/ES > > > > > > The seires has 5 patches, [1/5] is a resend patch which I sent > > > before[2], others are new fixes. Actually, one another issue > > > still exists, which will be fixed soon. > > > > > > [2] https://www.mail-archive.com/devel@edk2.groups.io/msg37170.html > > > > > > Thank you, > > > > > > --- > > > > > > Masami Hiramatsu (5): > > > [RESEND][edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy > > > [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog > > > interrupt number > > > [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the > > > number of erase blocks > > > [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table > > > [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes > > > > > > > > > .../Socionext/DeveloperBox/DeveloperBox.dsc.inc| 10 +-- > > > .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |2 + > > > Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 > > > > > > Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc | 6 +- > > > .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 +++ > > > .../SynQuacerPlatformFlashAccessLib.c |2 - > > > 6 files changed, 107 insertions(+), 21 deletions(-) > > > create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc > > > > > > -- > > > Masami Hiramatsu > > > > > > > > -- > > Masami Hiramatsu -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84091): https://edk2.groups.io/g/devel/message/84091 Mute This Topic: https://groups.io/mt/86836376/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms 0/2] Socionext housekeeping
Hi Leif, Sorry for replying late. 2021年11月11日(木) 20:59 Leif Lindholm : > > Masami - while looking at your set from last Friday, patch 1/5 fails > to apply since the file being modified has the wrong line endings in > the tree. Oh, OK. is it CR/LF? > > 2/2 fixes that. > (Obviously, the patch looks nonsensical since SMTP strips the added CR > back out.) Thanks for fixing! > > 1/2 adds you as a reviewer to the Socionext platforms. (This means > that you will be cc:d on any future patches to these, and that I > can use your Reviewed-by for 2/2.) > > Does this sound good to you? Yes, these look good to me. Acked-by: Masami Hiramatsu for the series. Thank you! > > Leif Lindholm (2): > Maintainers.txt: add Masami as Socionext reviewer > Silicon/Socionext: fix line endings > > Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 1162 > ++-- > Maintainers.txt |1 > + > 2 files changed, 582 insertions(+), 581 deletions(-) > > -- > 2.30.2 > -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84090): https://edk2.groups.io/g/devel/message/84090 Mute This Topic: https://groups.io/mt/86979607/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 0/5] Series short description
Hello Leif and Ard, Could you give me any feedback on this series? Thank you, 2021年11月5日(金) 18:23 Masami Hiramatsu : > > Hello Leif and Ard, > > Here are a series of patches to fix some issues on the DeveloperBox. > Our team found those issues when we ran the SystemReady ES ACS tests[1]. > > [1] https://github.com/ARM-software/arm-systemready/tree/main/ES > > The seires has 5 patches, [1/5] is a resend patch which I sent > before[2], others are new fixes. Actually, one another issue > still exists, which will be fixed soon. > > [2] https://www.mail-archive.com/devel@edk2.groups.io/msg37170.html > > Thank you, > > --- > > Masami Hiramatsu (5): > [RESEND][edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy > [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog > interrupt number > [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the > number of erase blocks > [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table > [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes > > > .../Socionext/DeveloperBox/DeveloperBox.dsc.inc| 10 +-- > .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |2 + > Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 > > Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |6 +- > .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 +++ > .../SynQuacerPlatformFlashAccessLib.c |2 - > 6 files changed, 107 insertions(+), 21 deletions(-) > create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc > > -- > Masami Hiramatsu -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#84084): https://edk2.groups.io/g/devel/message/84084 Mute This Topic: https://groups.io/mt/86836376/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 5/5] [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes
Expand NvStorage Variable size and FTW spare/working size for the DeveloperBox platform. Since the size of the NvStorage VariableSize is not enough large, FWTS uefirttime test, which updates the NV variables in runtime, failes. This expands the size to fix this issue. Signed-off-by: Masami Hiramatsu Reported-by: Kazuhiko Sakamoto --- .../Socionext/DeveloperBox/DeveloperBox.dsc.inc| 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc index 0a364bc457..3baf97ecc0 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc.inc @@ -280,11 +280,11 @@ gFip006DxeTokenSpaceGuid.PcdFip006DxeMemBaseAddress|0x0800 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0840 - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0001 - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0841 - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0001 - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0842 - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0001 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0008 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0848 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0008 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0850 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0008 gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"SNI " gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x52434155514e5953 # SYNQUACR -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#83380): https://edk2.groups.io/g/devel/message/83380 Mute This Topic: https://groups.io/mt/86836385/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 4/5] [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table
Add DBG2 table to ACPI tables. The COM1 uart port will be used
for OS debug, and it is 16550 compatible.
Signed-off-by: Masami Hiramatsu
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1
Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70
2 files changed, 71 insertions(+)
create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 886777a0fa..3023206330 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -22,6 +22,7 @@
Dsdt.asl
Fadt.aslc
Gtdt.aslc
+ Dbg2.aslc
Iort.aslc
Madt.aslc
Mcfg.aslc
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
new file mode 100644
index 00..027b3b658b
--- /dev/null
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc
@@ -0,0 +1,70 @@
+/** @file
+* Debug Port Table (DBG2)
+*
+* Copyright (c) 2020,2021 Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+#include
+#include
+#include
+#include
+#include
+
+#include "AcpiTables.h"
+
+#pragma pack(1)
+
+#define SYNQUACER_UART1_STR { '\\', '_', 'S', 'B', '.', 'C', 'O', 'M', '1',
0x00 }
+#define SQ_GAS32(Address) { EFI_ACPI_5_0_SYSTEM_MEMORY, 32, 0,
EFI_ACPI_5_0_BYTE, Address }
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTUREBaseAddressRegister;
+ UINT32AddressSize;
+ UINT8 NameSpaceString[10];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo;
+} DBG2_TABLE;
+
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+__ACPI_HEADER (
+ EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+),
+OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+1 /* NumberOfDebugPorts */
+ },
+ {
+{
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION),
+ 1, /* NumberofGenericAddressRegisters
*/
+ 10, /* NameSpaceStringLength */
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
+ 0, /* OemDataLength */
+ 0, /* OemDataOffset */
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS,
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE},
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)
+},
+SQ_GAS32 (SYNQUACER_UART1_BASE), /* BaseAddressRegister */
+SYNQUACER_UART1_SIZE, /* AddressSize */
+SYNQUACER_UART1_STR, /* NameSpaceString */
+ }
+};
+
+#pragma pack()
+
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+VOID* CONST ReferenceAcpiTable = &Dbg2;
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[edk2-devel] [PATCH 3/5] [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks
Fix the number of erase blocks by rounding up the result.
The erase blocks must include the last block covered by the
length bytes.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
.../SynQuacerPlatformFlashAccessLib.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
index bded74dc4f..ad4021cf59 100644
---
a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
+++
b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c
@@ -283,7 +283,7 @@ PerformFlashWriteWithProgress (
DEBUG ((DEBUG_INFO, "%a: erasing 0x%llx bytes at address %llx (LBA 0x%lx)\n",
__FUNCTION__, Length, FlashAddress, Lba));
- Status = Fvb->EraseBlocks (Fvb, Lba, Length / BlockSize,
+ Status = Fvb->EraseBlocks (Fvb, Lba, (Length + BlockSize - 1) / BlockSize,
EFI_LBA_LIST_TERMINATOR);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Fvb->EraseBlocks () failed - %r\n",
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[edk2-devel] [PATCH 2/5] [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number
This fixes Socionext DeveloperBox GenericWatchdog interrupt
number to 93 instead of 94. Since the 93 is the default interrupt
number defined in ArmPkg/ArmPkg.dec, this doesn't redefine
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
.../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |1 +
Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |6 +++---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index 96efb2d38e..886777a0fa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -50,6 +50,7 @@
gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
index c811fc5a0c..b045a49efa 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc
@@ -74,9 +74,9 @@ EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
// UINT32 GTxCommonFlags
},
EFI_ACPI_6_0_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
-FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
-FixedPcdGet32 (PcdGenericWatchdogControlBase),
-94,
+FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
+FixedPcdGet64 (PcdGenericWatchdogControlBase),
+FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
0),
};
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[edk2-devel] [PATCH 1/5] [RESEND][edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy
If an EFI application frequently repeats SetTime and GetTime,
the I2C bus can be busy and failed to start. To fix this issue,
add waiting loop for the bus busy status. (Usually, it is
enough to read 3 times for checking, but for safety this
sets 10 for timeout.)
This also clean up the code path a bit so that it is easy to
understand what should do on each combinations of BSR.BB and
BCR.MSS.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 ++--
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git
a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index 31f6e3072f..380eba8059 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -16,6 +16,8 @@
//
#define WAIT_FOR_INTERRUPT_TIMEOUT5
+#define WAIT_FOR_BUS_BUSY_TIMEOUT10
+
/**
Set the frequency for the I2C clock line.
@@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
IN EFI_I2C_OPERATION *Op
)
{
+ UINTN Timeout = WAIT_FOR_BUS_BUSY_TIMEOUT;
UINT8 Bsr;
UINT8 Bcr;
@@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
- if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
-DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
-return EFI_ALREADY_STARTED;
- }
+ if (!(Bcr & F_I2C_BCR_MSS)) {
- if (Bsr & F_I2C_BSR_BB) { // Bus is busy
-DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
-MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
- } else {
-if (Bcr & F_I2C_BCR_MSS) {
- DEBUG ((DEBUG_WARN,
-"%a: is not in master mode\n", __FUNCTION__));
- return EFI_DEVICE_ERROR;
+if (Bsr & F_I2C_BSR_BB) { // Bus is busy
+do {
+ Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
+} while (Timeout-- && (Bsr & F_I2C_BSR_BB));
+
+if (Bsr & F_I2C_BSR_BB) {
+ DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
+ return EFI_ALREADY_STARTED;
+}
}
+
DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
+
+ } else { // F_I2C_BCR_MSS is set
+
+if (!(Bsr & F_I2C_BSR_BB)) {
+ DEBUG ((DEBUG_WARN,
+"%a: is not in master mode\n", __FUNCTION__));
+ return EFI_DEVICE_ERROR;
+}
+
+DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
+MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
}
+
return EFI_SUCCESS;
}
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[edk2-devel] [PATCH 0/5] Series short description
Hello Leif and Ard, Here are a series of patches to fix some issues on the DeveloperBox. Our team found those issues when we ran the SystemReady ES ACS tests[1]. [1] https://github.com/ARM-software/arm-systemready/tree/main/ES The seires has 5 patches, [1/5] is a resend patch which I sent before[2], others are new fixes. Actually, one another issue still exists, which will be fixed soon. [2] https://www.mail-archive.com/devel@edk2.groups.io/msg37170.html Thank you, --- Masami Hiramatsu (5): [RESEND][edk2-platforms] Silicon/SynQuacerI2cDxe: Wait for bus busy [edk2-platforms] Silicon/Socionext/SynQuacer: Fix GenericWatchdog interrupt number [edk2-platforms] Silicon/SynQuacerPlatformFlashAccessLib: Fix the number of erase blocks [edk2-platforms] Silicon/SynQuacer: add DBG2 ACPI table [edk2-platforms] Platform/DeveloperBox: Expand NvStorage sizes .../Socionext/DeveloperBox/DeveloperBox.dsc.inc| 10 +-- .../Socionext/SynQuacer/AcpiTables/AcpiTables.inf |2 + Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc | 70 Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc |6 +- .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 +++ .../SynQuacerPlatformFlashAccessLib.c |2 - 6 files changed, 107 insertions(+), 21 deletions(-) create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dbg2.aslc -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#83375): https://edk2.groups.io/g/devel/message/83375 Mute This Topic: https://groups.io/mt/86836376/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 0/4] SynQuacer drivers test the ControllerHandle correctly
Hi Leif, Thank you for your reply! 2021年10月27日(水) 20:21 Leif Lindholm : > > Hi Masami, > > Apologies for delay. > > Thank you, this set looks good. > However, you cannot make legal statements on behalf of Sakamoto-san, > only yourself. If you are happy with that, I could drop their > Signed-off-by: statements before I push. They would retain the > authorship. Actually I got this patch from Sakamoto-san with the Signed-off-by, so I sent it via my own internal tree. OK, next time I will ask Sakamoto-san to send it by himself, or just report to me and I write the patch. Thank you, > > Best Regards, > > Leif > > On Wed, Oct 13, 2021 at 14:36:43 +0900, Masami Hiramatsu wrote: > > Hello, > > > > Here are the patches to fix the SynQuacer related drivers to test > > whether the ControllerHandle is managed by that driver correctly. > > These bugs are found by edk2-test. > > > > Thank you, > > > > --- > > > > Kazuhiko Sakamoto (4): > > Silicon/SynQuacerNetsecDxe: Test the ControllerHandle is managed by > > this driver > > Silicon/SynQuacerI2cDxe: Test the ControllerHandle is managed by this > > driver > > Silicon/AtSha204a: Test the ControllerHandle is managed by this driver > > Silicon/ChaosKeyDxe: Test the ControllerHandle is managed by this > > driver > > > > > > Silicon/Atmel/AtSha204a/AtSha204aDriver.h |1 + > > Silicon/Atmel/AtSha204a/ComponentName.c| 13 + > > Silicon/Atmel/AtSha204a/DriverBinding.c|1 - > > Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDriver.h |1 + > > Silicon/Openmoko/ChaosKeyDxe/ComponentName.c | 13 + > > Silicon/Openmoko/ChaosKeyDxe/DriverBinding.c |1 - > > .../Drivers/Net/NetsecDxe/ComponentName.c | 13 + > > .../Drivers/Net/NetsecDxe/DriverBinding.c |1 - > > .../SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h|1 + > > .../Drivers/SynQuacerI2cDxe/ComponentName.c | 13 + > > .../Drivers/SynQuacerI2cDxe/DriverBinding.c|2 +- > > .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.h |1 + > > 12 files changed, 57 insertions(+), 4 deletions(-) > > > > -- > > Masami Hiramatsu -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#82763): https://edk2.groups.io/g/devel/message/82763 Mute This Topic: https://groups.io/mt/86281577/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 4/4] Silicon/ChaosKeyDxe: Test the ControllerHandle is managed by this driver
From: Kazuhiko Sakamoto
Test the @ControllerHandle is not NULL and is actually managed by
this driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Kazuhiko Sakamoto
Signed-off-by: Masami Hiramatsu
---
Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDriver.h |1 +
Silicon/Openmoko/ChaosKeyDxe/ComponentName.c | 13 +
Silicon/Openmoko/ChaosKeyDxe/DriverBinding.c |1 -
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDriver.h
b/Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDriver.h
index 97cfbbb755..59582b3bf9 100644
--- a/Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDriver.h
+++ b/Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDriver.h
@@ -38,6 +38,7 @@ typedef struct {
CR(a, CHAOSKEY_DEV, Rng, CHAOSKEY_DEV_SIGNATURE)
extern EFI_COMPONENT_NAME2_PROTOCOL gChaosKeyDriverComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gUsbDriverBinding;
EFI_STATUS
ChaosKeyInit (
diff --git a/Silicon/Openmoko/ChaosKeyDxe/ComponentName.c
b/Silicon/Openmoko/ChaosKeyDxe/ComponentName.c
index 25117e2500..5b0f42cb67 100644
--- a/Silicon/Openmoko/ChaosKeyDxe/ComponentName.c
+++ b/Silicon/Openmoko/ChaosKeyDxe/ComponentName.c
@@ -159,6 +159,19 @@ ChaosKeyGetControllerName (
OUT CHAR16 **ControllerName
)
{
+ EFI_STATUS Status;
+
+ if (!ControllerHandle) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EfiTestManagedDevice (ControllerHandle,
+ gUsbDriverBinding.DriverBindingHandle,
+ &gEfiUsbIoProtocolGuid);
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
if (ChildHandle != NULL) {
return EFI_UNSUPPORTED;
}
diff --git a/Silicon/Openmoko/ChaosKeyDxe/DriverBinding.c
b/Silicon/Openmoko/ChaosKeyDxe/DriverBinding.c
index e7d0d3fe56..4cbd23ad36 100644
--- a/Silicon/Openmoko/ChaosKeyDxe/DriverBinding.c
+++ b/Silicon/Openmoko/ChaosKeyDxe/DriverBinding.c
@@ -146,7 +146,6 @@ UsbHwrngDriverBindingStop (
}
-STATIC
EFI_DRIVER_BINDING_PROTOCOL gUsbDriverBinding = {
UsbHwrngDriverBindingSupported,
UsbHwrngDriverBindingStart,
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[edk2-devel] [PATCH 3/4] Silicon/AtSha204a: Test the ControllerHandle is managed by this driver
From: Kazuhiko Sakamoto
Test the @ControllerHandle is not NULL and is actually managed by
this driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Kazuhiko Sakamoto
Signed-off-by: Masami Hiramatsu
---
Silicon/Atmel/AtSha204a/AtSha204aDriver.h |1 +
Silicon/Atmel/AtSha204a/ComponentName.c | 13 +
Silicon/Atmel/AtSha204a/DriverBinding.c |1 -
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Silicon/Atmel/AtSha204a/AtSha204aDriver.h
b/Silicon/Atmel/AtSha204a/AtSha204aDriver.h
index 615959baf4..11be15b25b 100644
--- a/Silicon/Atmel/AtSha204a/AtSha204aDriver.h
+++ b/Silicon/Atmel/AtSha204a/AtSha204aDriver.h
@@ -59,6 +59,7 @@ typedef struct {
#define ATSHA204A_OPCODE_RANDOM 0x1b
extern EFI_COMPONENT_NAME2_PROTOCOL gAtSha204aDriverComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gI2cHwrngDriverBinding;
EFI_STATUS
AtSha204aInit (
diff --git a/Silicon/Atmel/AtSha204a/ComponentName.c
b/Silicon/Atmel/AtSha204a/ComponentName.c
index eec7b9120b..cc1d970bcf 100644
--- a/Silicon/Atmel/AtSha204a/ComponentName.c
+++ b/Silicon/Atmel/AtSha204a/ComponentName.c
@@ -159,6 +159,19 @@ AtSha204aGetControllerName (
OUT CHAR16 **ControllerName
)
{
+ EFI_STATUS Status;
+
+ if (!ControllerHandle) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EfiTestManagedDevice (ControllerHandle,
+ gI2cHwrngDriverBinding.DriverBindingHandle,
+ &gEfiI2cIoProtocolGuid);
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
if (ChildHandle != NULL) {
return EFI_UNSUPPORTED;
}
diff --git a/Silicon/Atmel/AtSha204a/DriverBinding.c
b/Silicon/Atmel/AtSha204a/DriverBinding.c
index 38ffd80df9..e278ab0554 100644
--- a/Silicon/Atmel/AtSha204a/DriverBinding.c
+++ b/Silicon/Atmel/AtSha204a/DriverBinding.c
@@ -132,7 +132,6 @@ I2cHwrngDriverBindingStop (
}
-STATIC
EFI_DRIVER_BINDING_PROTOCOL gI2cHwrngDriverBinding = {
I2cHwrngDriverBindingSupported,
I2cHwrngDriverBindingStart,
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[edk2-devel] [PATCH 2/4] Silicon/SynQuacerI2cDxe: Test the ControllerHandle is managed by this driver
From: Kazuhiko Sakamoto
Test the @ControllerHandle is not NULL and is actually managed by
this driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Kazuhiko Sakamoto
Signed-off-by: Masami Hiramatsu
---
.../Drivers/SynQuacerI2cDxe/ComponentName.c| 13 +
.../Drivers/SynQuacerI2cDxe/DriverBinding.c|2 +-
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.h |1 +
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git
a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/ComponentName.c
b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/ComponentName.c
index 9e7f189c13..ed5f11f107 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/ComponentName.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/ComponentName.c
@@ -158,6 +158,19 @@ SynQuacerI2cGetControllerName (
OUT CHAR16 **ControllerName
)
{
+ EFI_STATUS Status;
+
+ if (!ControllerHandle) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EfiTestManagedDevice (ControllerHandle,
+
gSynQuacerI2cDriverBinding.DriverBindingHandle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid);
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
if (ChildHandle != NULL) {
return EFI_UNSUPPORTED;
}
diff --git
a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/DriverBinding.c
b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/DriverBinding.c
index 4e265aacf1..912ae79d14 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/DriverBinding.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/DriverBinding.c
@@ -129,7 +129,7 @@ SynQuacerI2cDriverBindingStop (
}
-STATIC EFI_DRIVER_BINDING_PROTOCOL gSynQuacerI2cDriverBinding = {
+EFI_DRIVER_BINDING_PROTOCOL gSynQuacerI2cDriverBinding = {
SynQuacerI2cDriverBindingSupported,
SynQuacerI2cDriverBindingStart,
SynQuacerI2cDriverBindingStop,
diff --git
a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.h
b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.h
index f891e4bf2f..c6534e6972 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.h
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.h
@@ -25,6 +25,7 @@
#include
extern EFI_COMPONENT_NAME2_PROTOCOL gSynQuacerI2cDriverComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gSynQuacerI2cDriverBinding;
#define SYNQUACER_I2C_SIGNATURE SIGNATURE_32 ('S', 'I', '2', 'C')
#define SYNQUACER_I2C_FROM_THIS(a) CR ((a), SYNQUACER_I2C_MASTER, \
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[edk2-devel] [PATCH 1/4] Silicon/SynQuacerNetsecDxe: Test the ControllerHandle is managed by this driver
From: Kazuhiko Sakamoto
Test the @ControllerHandle is not NULL and is actually managed by
this driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Kazuhiko Sakamoto
Signed-off-by: Masami Hiramatsu
---
.../Drivers/Net/NetsecDxe/ComponentName.c | 13 +
.../Drivers/Net/NetsecDxe/DriverBinding.c |1 -
.../SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h|1 +
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/ComponentName.c
b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/ComponentName.c
index 44b3daa0af..743fa88384 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/ComponentName.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/ComponentName.c
@@ -159,6 +159,19 @@ NetsecGetControllerName (
OUT CHAR16 **ControllerName
)
{
+ EFI_STATUS Status;
+
+ if (!ControllerHandle) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ Status = EfiTestManagedDevice (ControllerHandle,
+ gNetsecDriverBinding.DriverBindingHandle,
+ &gEdkiiNonDiscoverableDeviceProtocolGuid);
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
if (ChildHandle != NULL) {
return EFI_UNSUPPORTED;
}
diff --git a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/DriverBinding.c
b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/DriverBinding.c
index 392d1b474f..fa0c415e98 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/DriverBinding.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/DriverBinding.c
@@ -131,7 +131,6 @@ NetsecDriverBindingStop (
}
-STATIC
EFI_DRIVER_BINDING_PROTOCOL gNetsecDriverBinding = {
NetsecDriverBindingSupported,
NetsecDriverBindingStart,
diff --git a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h
b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h
index cf2abb0ab1..9b3d19c033 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h
+++ b/Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h
@@ -27,6 +27,7 @@
#include "netsec_for_uefi/pfdep.h"
extern EFI_COMPONENT_NAME2_PROTOCOL gNetsecDriverComponentName2;
+extern EFI_DRIVER_BINDING_PROTOCOL gNetsecDriverBinding;
/*--- Simple Network Driver entry point functions
*/
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[edk2-devel] [PATCH 0/4] SynQuacer drivers test the ControllerHandle correctly
Hello, Here are the patches to fix the SynQuacer related drivers to test whether the ControllerHandle is managed by that driver correctly. These bugs are found by edk2-test. Thank you, --- Kazuhiko Sakamoto (4): Silicon/SynQuacerNetsecDxe: Test the ControllerHandle is managed by this driver Silicon/SynQuacerI2cDxe: Test the ControllerHandle is managed by this driver Silicon/AtSha204a: Test the ControllerHandle is managed by this driver Silicon/ChaosKeyDxe: Test the ControllerHandle is managed by this driver Silicon/Atmel/AtSha204a/AtSha204aDriver.h |1 + Silicon/Atmel/AtSha204a/ComponentName.c| 13 + Silicon/Atmel/AtSha204a/DriverBinding.c|1 - Silicon/Openmoko/ChaosKeyDxe/ChaosKeyDriver.h |1 + Silicon/Openmoko/ChaosKeyDxe/ComponentName.c | 13 + Silicon/Openmoko/ChaosKeyDxe/DriverBinding.c |1 - .../Drivers/Net/NetsecDxe/ComponentName.c | 13 + .../Drivers/Net/NetsecDxe/DriverBinding.c |1 - .../SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h|1 + .../Drivers/SynQuacerI2cDxe/ComponentName.c| 13 + .../Drivers/SynQuacerI2cDxe/DriverBinding.c|2 +- .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.h |1 + 12 files changed, 57 insertions(+), 4 deletions(-) -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#81857): https://edk2.groups.io/g/devel/message/81857 Mute This Topic: https://groups.io/mt/86281577/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH] Silicon/SynQuacerI2cDxe: Wait for bus busy
Hello Ard,
Would you have any comment on this fix?
Thank you,
2021年9月30日(木) 14:44 Masami Hiramatsu via groups.io :
> If an EFI application frequently repeats SetTime and GetTime,
> the I2C bus can be busy and failed to start. To fix this issue,
> add waiting loop for the bus busy status. (Usually, it is
> enough to read 3 times for checking, but for safety this
> sets 10 for timeout.)
>
> This also clean up the code path a bit so that it is easy to
> understand what should do on each combinations of BSR.BB and
> BCR.MSS.
>
> Signed-off-by: Masami Hiramatsu
> Reported-by: Kazuhiko Sakamoto
> Contributed-under: TianoCore Contribution Agreement 1.1
> ---
> .../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38
> ++--
> 1 file changed, 26 insertions(+), 12 deletions(-)
>
> diff --git
> a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> index 31f6e3072f..380eba8059 100644
> --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
> @@ -16,6 +16,8 @@
> //
> #define WAIT_FOR_INTERRUPT_TIMEOUT5
>
> +#define WAIT_FOR_BUS_BUSY_TIMEOUT10
> +
> /**
>Set the frequency for the I2C clock line.
>
> @@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
>IN EFI_I2C_OPERATION *Op
>)
> {
> + UINTN Timeout = WAIT_FOR_BUS_BUSY_TIMEOUT;
>UINT8 Bsr;
>UINT8 Bcr;
>
> @@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
>Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
>Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
>
> - if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
> -DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
> -return EFI_ALREADY_STARTED;
> - }
> + if (!(Bcr & F_I2C_BCR_MSS)) {
>
> - if (Bsr & F_I2C_BSR_BB) { // Bus is busy
> -DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
> -MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
> - } else {
> -if (Bcr & F_I2C_BCR_MSS) {
> - DEBUG ((DEBUG_WARN,
> -"%a: is not in master mode\n", __FUNCTION__));
> - return EFI_DEVICE_ERROR;
> +if (Bsr & F_I2C_BSR_BB) { // Bus is busy
> +do {
> + Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
> +} while (Timeout-- && (Bsr & F_I2C_BSR_BB));
> +
> +if (Bsr & F_I2C_BSR_BB) {
> + DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
> + return EFI_ALREADY_STARTED;
> +}
> }
> +
> DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
> MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
> Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
> +
> + } else { // F_I2C_BCR_MSS is set
> +
> +if (!(Bsr & F_I2C_BSR_BB)) {
> + DEBUG ((DEBUG_WARN,
> +"%a: is not in master mode\n", __FUNCTION__));
> + return EFI_DEVICE_ERROR;
> +}
> +
> +DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
> +MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
>}
> +
>return EFI_SUCCESS;
> }
>
>
>
>
>
>
>
>
--
Masami Hiramatsu
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[edk2-devel] [PATCH] Silicon/SynQuacerI2cDxe: Wait for bus busy
If an EFI application frequently repeats SetTime and GetTime,
the I2C bus can be busy and failed to start. To fix this issue,
add waiting loop for the bus busy status. (Usually, it is
enough to read 3 times for checking, but for safety this
sets 10 for timeout.)
This also clean up the code path a bit so that it is easy to
understand what should do on each combinations of BSR.BB and
BCR.MSS.
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
Contributed-under: TianoCore Contribution Agreement 1.1
---
.../Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 38 ++--
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git
a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
index 31f6e3072f..380eba8059 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c
@@ -16,6 +16,8 @@
//
#define WAIT_FOR_INTERRUPT_TIMEOUT5
+#define WAIT_FOR_BUS_BUSY_TIMEOUT10
+
/**
Set the frequency for the I2C clock line.
@@ -152,6 +154,7 @@ SynQuacerI2cMasterStart (
IN EFI_I2C_OPERATION *Op
)
{
+ UINTN Timeout = WAIT_FOR_BUS_BUSY_TIMEOUT;
UINT8 Bsr;
UINT8 Bcr;
@@ -167,24 +170,35 @@ SynQuacerI2cMasterStart (
Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
Bcr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BCR);
- if ((Bsr & F_I2C_BSR_BB) && !(Bcr & F_I2C_BCR_MSS)) {
-DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
-return EFI_ALREADY_STARTED;
- }
+ if (!(Bcr & F_I2C_BCR_MSS)) {
- if (Bsr & F_I2C_BSR_BB) { // Bus is busy
-DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
-MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
- } else {
-if (Bcr & F_I2C_BCR_MSS) {
- DEBUG ((DEBUG_WARN,
-"%a: is not in master mode\n", __FUNCTION__));
- return EFI_DEVICE_ERROR;
+if (Bsr & F_I2C_BSR_BB) { // Bus is busy
+do {
+ Bsr = MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR);
+} while (Timeout-- && (Bsr & F_I2C_BSR_BB));
+
+if (Bsr & F_I2C_BSR_BB) {
+ DEBUG ((DEBUG_INFO, "%a: bus is busy\n", __FUNCTION__));
+ return EFI_ALREADY_STARTED;
+}
}
+
DEBUG ((DEBUG_INFO, "%a: Start Condition\n", __FUNCTION__));
MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR,
Bcr | F_I2C_BCR_MSS | F_I2C_BCR_INTE | F_I2C_BCR_BEIE);
+
+ } else { // F_I2C_BCR_MSS is set
+
+if (!(Bsr & F_I2C_BSR_BB)) {
+ DEBUG ((DEBUG_WARN,
+"%a: is not in master mode\n", __FUNCTION__));
+ return EFI_DEVICE_ERROR;
+}
+
+DEBUG ((DEBUG_INFO, "%a: Continuous Start\n", __FUNCTION__));
+MmioWrite8 (I2c->MmioBase + F_I2C_REG_BCR, Bcr | F_I2C_BCR_SCC);
}
+
return EFI_SUCCESS;
}
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Re: [edk2-devel] [edk2-platforms PATCH v2 0/2] Fix some issues on SynQuacer
2021年7月28日(水) 19:44 Ard Biesheuvel : > > On Mon, 26 Jul 2021 at 10:28, Masami Hiramatsu > wrote: > > > > Hello, > > > > Here is the 2nd version of the patches to fix 2 issues on SynQuacer > > platform support. > > I and Sakamoto-san found these issues in edk2-test testcases on SynQuacer > > DeveloperBox platfrom. > > > > Previous version are here; > > > > https://edk2.groups.io/g/devel/message/77085 > > https://edk2.groups.io/g/devel/message/77086 > > > > In this version, I grouped these 2 patches and update patch changelog. > > > > [1/2] Fixes OpteeRng driver to check invalid parameter correctly. > > Without this fix, edk2-test BBTestGetRNGConformanceTestCheckpoint1 > > reports an error. > > > > [2/2] Fixes Pcf8563RealTimeClockLib to clear unused Nanosecond field. > > Without this fix, edk2-test BBTestGetTimeInterfaceTest and > > BBTestSetTimeInterfaceTest failed. Moreover, 'date' and 'time' > > commands on UEFI shell can not set the time. > > > > Thank you, > > > > --- > > > > Masami Hiramatsu (2): > > Silicon/SynQuacer/OpteeRngDxe: Fix invalid parameter check > > Silicon/NXP/Pcf8563RealTimeClockLib: Clear Nanosecond field in GetTime > > > > Thank you Masami. > > Pushed as 194269223294..c131fed73d37 Thank you Ard! -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#78280): https://edk2.groups.io/g/devel/message/78280 Mute This Topic: https://groups.io/mt/84454408/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms PATCH v2 2/2] Silicon/NXP/Pcf8563RealTimeClockLib: Clear Nanosecond field in GetTime
Clear unsupported Nanosecond field of the EFI_TIME data structure.
Without this fix, date/time commands on UEFI shell fail to set
because of the invaild parameter error.
This is tested on the SynQuacer DeveloperBox platform which also
uses 'Pcf8563' RTC chip.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
Changes in v2:
- Update changelog.
---
.../Pcf8563RealTimeClockLib.c |2 ++
1 file changed, 2 insertions(+)
diff --git
a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
index 7310fecb39..b79ea89fea 100644
--- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
+++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c
@@ -117,6 +117,8 @@ LibGetTime (
return EFI_DEVICE_ERROR;
}
+ Time->Nanosecond = 0;
+
if ((DateTime.VL_seconds & PCF8563_CLOCK_INVALID) != 0) {
Time->Second = 0;
Time->Minute = 0;
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[edk2-devel] [edk2-platforms PATCH v2 1/2] Silicon/SynQuacer/OpteeRngDxe: Fix invalid parameter check
Fix invalid parameter case according to the UEFI spec 2.9,
section 37.5 EFI_RNG_PROTOCOL.GetRNG. The spec said,
"RNGValue is null or RNGValueLength is zero." instead of
"RNGValue is NULL and RNGValueLength is non-zero."
This fixes the mOpteeRng::GetRNG() to check the invalid
parameter case correctly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Masami Hiramatsu
Reported-by: Kazuhiko Sakamoto
---
Changes in v2:
- Update changelog.
---
.../SynQuacer/Drivers/OpteeRngDxe/OpteeRng.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Drivers/OpteeRngDxe/OpteeRng.c
b/Silicon/Socionext/SynQuacer/Drivers/OpteeRngDxe/OpteeRng.c
index 51c15b1b94..333a3e625c 100644
--- a/Silicon/Socionext/SynQuacer/Drivers/OpteeRngDxe/OpteeRng.c
+++ b/Silicon/Socionext/SynQuacer/Drivers/OpteeRngDxe/OpteeRng.c
@@ -98,8 +98,7 @@ GetInfo (
@retval EFI_NOT_READY There is not enough random data available to
satisfy the length requested by
RNGValueLength.
- @retval EFI_INVALID_PARAMETER RNGValue is NULL and RNGValueLength is
- non-zero.
+ @retval EFI_INVALID_PARAMETER RNGValue is NULL or RNGValueLength is zero.
**/
STATIC
@@ -119,7 +118,7 @@ GetRNG (
UINTN OutSize;
UINTN WaitMiliSeconds;
- if ((Value == NULL) && (ValueLength != 0)) {
+ if ((Value == NULL) || (ValueLength == 0)) {
return EFI_INVALID_PARAMETER;
}
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[edk2-devel] [edk2-platforms PATCH v2 0/2] Fix some issues on SynQuacer
Hello, Here is the 2nd version of the patches to fix 2 issues on SynQuacer platform support. I and Sakamoto-san found these issues in edk2-test testcases on SynQuacer DeveloperBox platfrom. Previous version are here; https://edk2.groups.io/g/devel/message/77085 https://edk2.groups.io/g/devel/message/77086 In this version, I grouped these 2 patches and update patch changelog. [1/2] Fixes OpteeRng driver to check invalid parameter correctly. Without this fix, edk2-test BBTestGetRNGConformanceTestCheckpoint1 reports an error. [2/2] Fixes Pcf8563RealTimeClockLib to clear unused Nanosecond field. Without this fix, edk2-test BBTestGetTimeInterfaceTest and BBTestSetTimeInterfaceTest failed. Moreover, 'date' and 'time' commands on UEFI shell can not set the time. Thank you, --- Masami Hiramatsu (2): Silicon/SynQuacer/OpteeRngDxe: Fix invalid parameter check Silicon/NXP/Pcf8563RealTimeClockLib: Clear Nanosecond field in GetTime .../Pcf8563RealTimeClockLib.c |2 ++ .../SynQuacer/Drivers/OpteeRngDxe/OpteeRng.c |5 ++--- 2 files changed, 4 insertions(+), 3 deletions(-) -- Masami Hiramatsu -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#78166): https://edk2.groups.io/g/devel/message/78166 Mute This Topic: https://groups.io/mt/84454408/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
