Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread Chiu, Chasel

Thanks Liming!!

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of
> gaoliming via groups.io
> Sent: Thursday, November 10, 2022 8:52 PM
> To: devel@edk2.groups.io; Chiu, Chasel ; Kinney,
> Michael D 
> Cc: Desimone, Nathaniel L ; Zeng, Star
> ; S, Ashraf Ali ; Duggapu,
> Chinni B ; Kuo, Ted 
> Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> supporting null UPD pointer in FSP-T
> 
> This change has been merged at
> 3182843f3bc92599fa2ed4fd13ffd3f75907fe9e
> 
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 Chiu,
> Chasel
> > 发送时间: 2022年11月11日 9:57
> > 收件人: Gao, Liming ;
> devel@edk2.groups.io;
> > Kinney, Michael D 
> > 抄送: Desimone, Nathaniel L ; Zeng,
> Star
> > ; S, Ashraf Ali ;
> > Duggapu, Chinni B ; Kuo, Ted
> > 
> > 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> supporting
> > null UPD pointer in FSP-T
> >
> >
> > Thanks Liming!!
> >
> > > -Original Message-
> > > From: gaoliming 
> > > Sent: Thursday, November 10, 2022 5:37 PM
> > > To: devel@edk2.groups.io; Chiu, Chasel ;
> > > Kinney, Michael D 
> > > Cc: Desimone, Nathaniel L ; Zeng,
> > > Star ; S, Ashraf Ali ;
> > > Duggapu, Chinni B ; Kuo, Ted
> > > 
> > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > supporting null UPD pointer in FSP-T
> > >
> > > Chasel:
> > >   Seemly, this is a bug fix for the previous change. In soft feature
> > > freeze,
> > the
> > > bug is still allowed. Since this patch has passed review, I can help merge
> it.
> > >
> > > Thanks
> > > Liming
> > > > -----邮件原件-
> > > > 发件人: devel@edk2.groups.io  代表 Chiu,
> > > Chasel
> > > > 发送时间: 2022年11月11日 9:08
> > > > 收件人: devel@edk2.groups.io; Gao, Liming
> > > ;
> > > > Kinney, Michael D 
> > > > 抄送: Desimone, Nathaniel L ; Zeng,
> > > Star
> > > > ; S, Ashraf Ali ;
> > > > Duggapu, Chinni B ; Kuo, Ted
> > > > 
> > > > 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > supporting
> > > > null UPD pointer in FSP-T
> > > >
> > > >
> > > > Sorry for missing this message.
> > > > Since this patch is important for unblocking platform FSP
> > > > implementation, @Gao, Liming, @Kinney, Michael D, could you please
> > > > help to merge it to catch this stable tag?
> > > >
> > > > Thanks,
> > > > Chasel
> > > >
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: devel@edk2.groups.io  On Behalf Of
> > > > > gaoliming via groups.io
> > > > > Sent: Thursday, November 10, 2022 4:54 PM
> > > > > To: Chiu, Chasel ; Kinney, Michael D
> > > > > 
> > > > > Cc: Desimone, Nathaniel L ;
> > > > > Zeng, Star ; S, Ashraf Ali
> > > > > ; Duggapu, Chinni B
> > > > > ; devel@edk2.groups.io; Kuo, Ted
> > > > > 
> > > > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement
> of
> > > > > supporting null UPD pointer in FSP-T
> > > > >
> > > > > Chasel:
> > > > >   Please see the announce mail
> > > > > https://edk2.groups.io/g/devel/message/96175
> > > > >
> > > > >   Now, we are in soft feature freeze. If the patch wants to
> > > > > catch this stable tag, please highlight it and get approval from
> Stewards.
> > > > >
> > > > > Thanks
> > > > > Liming
> > > > > > -邮件原件-
> > > > > > 发件人: Chiu, Chasel 
> > > > > > 发送时间: 2022年11月11日 8:47
> > > > > > 收件人: Gao, Liming ; Kinney,
> Michael D
> > > > > > 
> > > > > > 抄送: Desimone, Nathaniel L ;
> > Zeng,
> > > > > Star
> > > > > > ; S, Ashraf Ali ;
> > > > > > Duggapu, Chinni B ;
> > > > > > devel@edk2.groups.io; Kuo, Ted 
> > > > > > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > > > supporting
> > > > > > null UPD pointer in FSP-T
> > > > > >
> > > > > >
> > > > > > Hi Liming, M

回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread gaoliming via groups.io
This change has been merged at 3182843f3bc92599fa2ed4fd13ffd3f75907fe9e

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Chiu, Chasel
> 发送时间: 2022年11月11日 9:57
> 收件人: Gao, Liming ; devel@edk2.groups.io;
> Kinney, Michael D 
> 抄送: Desimone, Nathaniel L ; Zeng, Star
> ; S, Ashraf Ali ; Duggapu,
> Chinni B ; Kuo, Ted 
> 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting
> null UPD pointer in FSP-T
> 
> 
> Thanks Liming!!
> 
> > -Original Message-
> > From: gaoliming 
> > Sent: Thursday, November 10, 2022 5:37 PM
> > To: devel@edk2.groups.io; Chiu, Chasel ; Kinney,
> > Michael D 
> > Cc: Desimone, Nathaniel L ; Zeng, Star
> > ; S, Ashraf Ali ; Duggapu,
> > Chinni B ; Kuo, Ted 
> > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > supporting null UPD pointer in FSP-T
> >
> > Chasel:
> >   Seemly, this is a bug fix for the previous change. In soft feature freeze,
> the
> > bug is still allowed. Since this patch has passed review, I can help merge 
> > it.
> >
> > Thanks
> > Liming
> > > -邮件原件-
> > > 发件人: devel@edk2.groups.io  代表 Chiu,
> > Chasel
> > > 发送时间: 2022年11月11日 9:08
> > > 收件人: devel@edk2.groups.io; Gao, Liming
> > ;
> > > Kinney, Michael D 
> > > 抄送: Desimone, Nathaniel L ; Zeng,
> > Star
> > > ; S, Ashraf Ali ;
> > > Duggapu, Chinni B ; Kuo, Ted
> > > 
> > > 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > supporting
> > > null UPD pointer in FSP-T
> > >
> > >
> > > Sorry for missing this message.
> > > Since this patch is important for unblocking platform FSP
> > > implementation, @Gao, Liming, @Kinney, Michael D, could you please
> > > help to merge it to catch this stable tag?
> > >
> > > Thanks,
> > > Chasel
> > >
> > >
> > >
> > > > -Original Message-
> > > > From: devel@edk2.groups.io  On Behalf Of
> > > > gaoliming via groups.io
> > > > Sent: Thursday, November 10, 2022 4:54 PM
> > > > To: Chiu, Chasel ; Kinney, Michael D
> > > > 
> > > > Cc: Desimone, Nathaniel L ; Zeng,
> > > > Star ; S, Ashraf Ali ;
> > > > Duggapu, Chinni B ;
> > > > devel@edk2.groups.io; Kuo, Ted 
> > > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > > supporting null UPD pointer in FSP-T
> > > >
> > > > Chasel:
> > > >   Please see the announce mail
> > > > https://edk2.groups.io/g/devel/message/96175
> > > >
> > > >   Now, we are in soft feature freeze. If the patch wants to catch
> > > > this stable tag, please highlight it and get approval from Stewards.
> > > >
> > > > Thanks
> > > > Liming
> > > > > -邮件原件-
> > > > > 发件人: Chiu, Chasel 
> > > > > 发送时间: 2022年11月11日 8:47
> > > > > 收件人: Gao, Liming ; Kinney, Michael D
> > > > > 
> > > > > 抄送: Desimone, Nathaniel L ;
> Zeng,
> > > > Star
> > > > > ; S, Ashraf Ali ;
> > > > > Duggapu, Chinni B ;
> > > > > devel@edk2.groups.io; Kuo, Ted 
> > > > > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > > supporting
> > > > > null UPD pointer in FSP-T
> > > > >
> > > > >
> > > > > Hi Liming, Michael,
> > > > >
> > > > > May I know why we cannot merge this PR
> > > > > https://github.com/tianocore/edk2/pull/3624 ?
> > > > > Was it due to Hard Feature Freeze? But I thought we still have time
> > right?
> > > > >
> > > > > Thanks,
> > > > > Chasel
> > > > >
> > > > >
> > > > > > -Original Message-
> > > > > > From: devel@edk2.groups.io  On Behalf Of
> > > > > > Kuo, Ted
> > > > > > Sent: Wednesday, November 9, 2022 3:31 AM
> > > > > > To: devel@edk2.groups.io
> > > > > > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > > > > > ; Zeng, Star
> > > > > > ; S, Ashraf Ali ;
> > > > > > Duggapu, Chinni B 
> > > > > > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > > > > supporting null UPD pointer in FSP-T
> > > >

Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread Chiu, Chasel

Thanks Liming!!

> -Original Message-
> From: gaoliming 
> Sent: Thursday, November 10, 2022 5:37 PM
> To: devel@edk2.groups.io; Chiu, Chasel ; Kinney,
> Michael D 
> Cc: Desimone, Nathaniel L ; Zeng, Star
> ; S, Ashraf Ali ; Duggapu,
> Chinni B ; Kuo, Ted 
> Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> supporting null UPD pointer in FSP-T
> 
> Chasel:
>   Seemly, this is a bug fix for the previous change. In soft feature freeze, 
> the
> bug is still allowed. Since this patch has passed review, I can help merge it.
> 
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 Chiu,
> Chasel
> > 发送时间: 2022年11月11日 9:08
> > 收件人: devel@edk2.groups.io; Gao, Liming
> ;
> > Kinney, Michael D 
> > 抄送: Desimone, Nathaniel L ; Zeng,
> Star
> > ; S, Ashraf Ali ;
> > Duggapu, Chinni B ; Kuo, Ted
> > 
> > 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> supporting
> > null UPD pointer in FSP-T
> >
> >
> > Sorry for missing this message.
> > Since this patch is important for unblocking platform FSP
> > implementation, @Gao, Liming, @Kinney, Michael D, could you please
> > help to merge it to catch this stable tag?
> >
> > Thanks,
> > Chasel
> >
> >
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io  On Behalf Of
> > > gaoliming via groups.io
> > > Sent: Thursday, November 10, 2022 4:54 PM
> > > To: Chiu, Chasel ; Kinney, Michael D
> > > 
> > > Cc: Desimone, Nathaniel L ; Zeng,
> > > Star ; S, Ashraf Ali ;
> > > Duggapu, Chinni B ;
> > > devel@edk2.groups.io; Kuo, Ted 
> > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > supporting null UPD pointer in FSP-T
> > >
> > > Chasel:
> > >   Please see the announce mail
> > > https://edk2.groups.io/g/devel/message/96175
> > >
> > >   Now, we are in soft feature freeze. If the patch wants to catch
> > > this stable tag, please highlight it and get approval from Stewards.
> > >
> > > Thanks
> > > Liming
> > > > -邮件原件-
> > > > 发件人: Chiu, Chasel 
> > > > 发送时间: 2022年11月11日 8:47
> > > > 收件人: Gao, Liming ; Kinney, Michael D
> > > > 
> > > > 抄送: Desimone, Nathaniel L ; Zeng,
> > > Star
> > > > ; S, Ashraf Ali ;
> > > > Duggapu, Chinni B ;
> > > > devel@edk2.groups.io; Kuo, Ted 
> > > > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > supporting
> > > > null UPD pointer in FSP-T
> > > >
> > > >
> > > > Hi Liming, Michael,
> > > >
> > > > May I know why we cannot merge this PR
> > > > https://github.com/tianocore/edk2/pull/3624 ?
> > > > Was it due to Hard Feature Freeze? But I thought we still have time
> right?
> > > >
> > > > Thanks,
> > > > Chasel
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: devel@edk2.groups.io  On Behalf Of
> > > > > Kuo, Ted
> > > > > Sent: Wednesday, November 9, 2022 3:31 AM
> > > > > To: devel@edk2.groups.io
> > > > > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > > > > ; Zeng, Star
> > > > > ; S, Ashraf Ali ;
> > > > > Duggapu, Chinni B 
> > > > > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > > > supporting null UPD pointer in FSP-T
> > > > >
> > > > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114
> > > > >
> > > > > 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD
> > > pointer
> > > > >   respectively in TempRamInitApi in IA32 FspSecCoreT.
> > > > > 2.Correct inappropriate description in the return value of
> > > > >   AsmGetFspInfoHeader.
> > > > > 3.Replace hardcoded offset value 0x1C with
> > > FSP_HEADER_IMGBASE_OFFSET
> > > > > in
> > > > >   FspHeler.nasm.
> > > > >
> > > > > Cc: Chasel Chiu 
> > > > > Cc: Nate DeSimone 
> > > > > Cc: Star Zeng 
> > > > > Cc: Ashraf Ali S 
> > > > > Cc: Chinni B Duggapu 
> > > > > Signed-off-by: Ted Kuo 
> > > > > ---
> > > > >  .../FspSecCore/Ia32/FspApiEntryT.nasm | 17

回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread gaoliming via groups.io
Chasel:
  Seemly, this is a bug fix for the previous change. In soft feature freeze, 
the bug is still allowed. Since this patch has passed review, I can help merge 
it. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Chiu, Chasel
> 发送时间: 2022年11月11日 9:08
> 收件人: devel@edk2.groups.io; Gao, Liming ;
> Kinney, Michael D 
> 抄送: Desimone, Nathaniel L ; Zeng, Star
> ; S, Ashraf Ali ; Duggapu,
> Chinni B ; Kuo, Ted 
> 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting
> null UPD pointer in FSP-T
> 
> 
> Sorry for missing this message.
> Since this patch is important for unblocking platform FSP implementation,
> @Gao, Liming, @Kinney, Michael D, could you please help to merge it to catch
> this stable tag?
> 
> Thanks,
> Chasel
> 
> 
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of
> > gaoliming via groups.io
> > Sent: Thursday, November 10, 2022 4:54 PM
> > To: Chiu, Chasel ; Kinney, Michael D
> > 
> > Cc: Desimone, Nathaniel L ; Zeng, Star
> > ; S, Ashraf Ali ; Duggapu,
> > Chinni B ; devel@edk2.groups.io; Kuo, Ted
> > 
> > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > supporting null UPD pointer in FSP-T
> >
> > Chasel:
> >   Please see the announce mail
> > https://edk2.groups.io/g/devel/message/96175
> >
> >   Now, we are in soft feature freeze. If the patch wants to catch this 
> > stable
> > tag, please highlight it and get approval from Stewards.
> >
> > Thanks
> > Liming
> > > -邮件原件-
> > > 发件人: Chiu, Chasel 
> > > 发送时间: 2022年11月11日 8:47
> > > 收件人: Gao, Liming ; Kinney, Michael D
> > > 
> > > 抄送: Desimone, Nathaniel L ; Zeng,
> > Star
> > > ; S, Ashraf Ali ;
> > > Duggapu, Chinni B ; devel@edk2.groups.io;
> > > Kuo, Ted 
> > > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > supporting
> > > null UPD pointer in FSP-T
> > >
> > >
> > > Hi Liming, Michael,
> > >
> > > May I know why we cannot merge this PR
> > > https://github.com/tianocore/edk2/pull/3624 ?
> > > Was it due to Hard Feature Freeze? But I thought we still have time right?
> > >
> > > Thanks,
> > > Chasel
> > >
> > >
> > > > -Original Message-
> > > > From: devel@edk2.groups.io  On Behalf Of Kuo,
> > > > Ted
> > > > Sent: Wednesday, November 9, 2022 3:31 AM
> > > > To: devel@edk2.groups.io
> > > > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > > > ; Zeng, Star ;
> > > > S, Ashraf Ali ; Duggapu, Chinni B
> > > > 
> > > > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > > supporting null UPD pointer in FSP-T
> > > >
> > > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114
> > > >
> > > > 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD
> > pointer
> > > >   respectively in TempRamInitApi in IA32 FspSecCoreT.
> > > > 2.Correct inappropriate description in the return value of
> > > >   AsmGetFspInfoHeader.
> > > > 3.Replace hardcoded offset value 0x1C with
> > FSP_HEADER_IMGBASE_OFFSET
> > > > in
> > > >   FspHeler.nasm.
> > > >
> > > > Cc: Chasel Chiu 
> > > > Cc: Nate DeSimone 
> > > > Cc: Star Zeng 
> > > > Cc: Ashraf Ali S 
> > > > Cc: Chinni B Duggapu 
> > > > Signed-off-by: Ted Kuo 
> > > > ---
> > > >  .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++--
> > > >  IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm   |  4 +-
> > > >  .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74
> > > ++-
> > > >  IntelFsp2Pkg/FspSecCore/SecFsp.h  |  2 +-
> > > >  IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm|  4 +-
> > > >  5 files changed, 55 insertions(+), 46 deletions(-)
> > > >
> > > > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > > b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > > index 73821ad22a..2cff8b3643 100644
> > > > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > > @@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi):
> > > >SAVE_EAX   SAVE_EDX +  CALL_EBP
> > > ASM_PFX(LoadUpdPointerToECX) ;
> > 

Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread Chiu, Chasel

Sorry for missing this message.
Since this patch is important for unblocking platform FSP implementation, @Gao, 
Liming, @Kinney, Michael D, could you please help to merge it to catch this 
stable tag?

Thanks,
Chasel



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of
> gaoliming via groups.io
> Sent: Thursday, November 10, 2022 4:54 PM
> To: Chiu, Chasel ; Kinney, Michael D
> 
> Cc: Desimone, Nathaniel L ; Zeng, Star
> ; S, Ashraf Ali ; Duggapu,
> Chinni B ; devel@edk2.groups.io; Kuo, Ted
> 
> Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> supporting null UPD pointer in FSP-T
> 
> Chasel:
>   Please see the announce mail
> https://edk2.groups.io/g/devel/message/96175
> 
>   Now, we are in soft feature freeze. If the patch wants to catch this stable
> tag, please highlight it and get approval from Stewards.
> 
> Thanks
> Liming
> > -邮件原件-
> > 发件人: Chiu, Chasel 
> > 发送时间: 2022年11月11日 8:47
> > 收件人: Gao, Liming ; Kinney, Michael D
> > 
> > 抄送: Desimone, Nathaniel L ; Zeng,
> Star
> > ; S, Ashraf Ali ;
> > Duggapu, Chinni B ; devel@edk2.groups.io;
> > Kuo, Ted 
> > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> supporting
> > null UPD pointer in FSP-T
> >
> >
> > Hi Liming, Michael,
> >
> > May I know why we cannot merge this PR
> > https://github.com/tianocore/edk2/pull/3624 ?
> > Was it due to Hard Feature Freeze? But I thought we still have time right?
> >
> > Thanks,
> > Chasel
> >
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io  On Behalf Of Kuo,
> > > Ted
> > > Sent: Wednesday, November 9, 2022 3:31 AM
> > > To: devel@edk2.groups.io
> > > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > > ; Zeng, Star ;
> > > S, Ashraf Ali ; Duggapu, Chinni B
> > > 
> > > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of
> > > supporting null UPD pointer in FSP-T
> > >
> > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114
> > >
> > > 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD
> pointer
> > >   respectively in TempRamInitApi in IA32 FspSecCoreT.
> > > 2.Correct inappropriate description in the return value of
> > >   AsmGetFspInfoHeader.
> > > 3.Replace hardcoded offset value 0x1C with
> FSP_HEADER_IMGBASE_OFFSET
> > > in
> > >   FspHeler.nasm.
> > >
> > > Cc: Chasel Chiu 
> > > Cc: Nate DeSimone 
> > > Cc: Star Zeng 
> > > Cc: Ashraf Ali S 
> > > Cc: Chinni B Duggapu 
> > > Signed-off-by: Ted Kuo 
> > > ---
> > >  .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++--
> > >  IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm   |  4 +-
> > >  .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74
> > ++-
> > >  IntelFsp2Pkg/FspSecCore/SecFsp.h  |  2 +-
> > >  IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm|  4 +-
> > >  5 files changed, 55 insertions(+), 46 deletions(-)
> > >
> > > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > index 73821ad22a..2cff8b3643 100644
> > > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > > @@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi):
> > >SAVE_EAX   SAVE_EDX +  CALL_EBP
> > ASM_PFX(LoadUpdPointerToECX) ;
> > > ECX for UPD param+  SAVE_ECX   ;
> > save UPD param to slot
> > > 3 in xmm6+   ;   ; Sec Platform Init   ;-  CALL_EBP
> > > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param   CALL_MMX
> > > ASM_PFX(SecPlatformInit)   cmp   eax, 0   jnz
> > TempRamInitExit;
> > > Load microcode   LOAD_ESP-  CALL_EBP
> > ASM_PFX(LoadUpdPointerToECX) ;
> > > ECX for UPD param+  LOAD_ECX   CALL_MMX
> > > ASM_PFX(LoadMicrocodeDefault)-  SXMMN xmm6, 3,
> > eax;Save
> > > microcode return status in ECX-SLOT 3 in xmm6.+
> > > SAVE_UCODE_STATUS ; Save microcode return status in
> > slot 1 in
> > > xmm5.   ;@note If return value eax is not 0, microcode did not load, but
> > > continue and attempt to boot.; Call Sec CAR Init   LOAD_ESP-
> > CALL_EBP
> > > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param+  LOAD_ECX
> > > CALL_MMX  ASM_PFX(SecCarInit)   cmp   eax, 0   jnz
> > TempRamInitExit

回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread gaoliming via groups.io
Chasel:
  Please see the announce mail https://edk2.groups.io/g/devel/message/96175

  Now, we are in soft feature freeze. If the patch wants to catch this
stable tag, please highlight it and get approval from Stewards.

Thanks
Liming
> -邮件原件-
> 发件人: Chiu, Chasel 
> 发送时间: 2022年11月11日 8:47
> 收件人: Gao, Liming ; Kinney, Michael D
> 
> 抄送: Desimone, Nathaniel L ; Zeng, Star
> ; S, Ashraf Ali ; Duggapu,
> Chinni B ; devel@edk2.groups.io; Kuo, Ted
> 
> 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting
> null UPD pointer in FSP-T
> 
> 
> Hi Liming, Michael,
> 
> May I know why we cannot merge this PR
> https://github.com/tianocore/edk2/pull/3624 ?
> Was it due to Hard Feature Freeze? But I thought we still have time right?
> 
> Thanks,
> Chasel
> 
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Kuo,
> > Ted
> > Sent: Wednesday, November 9, 2022 3:31 AM
> > To: devel@edk2.groups.io
> > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > ; Zeng, Star ; S,
> > Ashraf Ali ; Duggapu, Chinni B
> > 
> > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting
> > null UPD pointer in FSP-T
> >
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114
> >
> > 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD pointer
> >   respectively in TempRamInitApi in IA32 FspSecCoreT.
> > 2.Correct inappropriate description in the return value of
> >   AsmGetFspInfoHeader.
> > 3.Replace hardcoded offset value 0x1C with
> > FSP_HEADER_IMGBASE_OFFSET in
> >   FspHeler.nasm.
> >
> > Cc: Chasel Chiu 
> > Cc: Nate DeSimone 
> > Cc: Star Zeng 
> > Cc: Ashraf Ali S 
> > Cc: Chinni B Duggapu 
> > Signed-off-by: Ted Kuo 
> > ---
> >  .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++--
> >  IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm   |  4 +-
> >  .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74
> ++-
> >  IntelFsp2Pkg/FspSecCore/SecFsp.h  |  2 +-
> >  IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm|  4 +-
> >  5 files changed, 55 insertions(+), 46 deletions(-)
> >
> > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > index 73821ad22a..2cff8b3643 100644
> > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> > @@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi):
> >SAVE_EAX   SAVE_EDX +  CALL_EBP
> ASM_PFX(LoadUpdPointerToECX) ;
> > ECX for UPD param+  SAVE_ECX   ;
> save UPD param to slot
> > 3 in xmm6+   ;   ; Sec Platform Init   ;-  CALL_EBP
> > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param   CALL_MMX
> > ASM_PFX(SecPlatformInit)   cmp   eax, 0   jnz
> TempRamInitExit;
> > Load microcode   LOAD_ESP-  CALL_EBP
> ASM_PFX(LoadUpdPointerToECX) ;
> > ECX for UPD param+  LOAD_ECX   CALL_MMX
> > ASM_PFX(LoadMicrocodeDefault)-  SXMMN xmm6, 3,
> eax;Save
> > microcode return status in ECX-SLOT 3 in xmm6.+
> > SAVE_UCODE_STATUS ; Save microcode return status in
> slot 1 in
> > xmm5.   ;@note If return value eax is not 0, microcode did not load, but
> > continue and attempt to boot.; Call Sec CAR Init   LOAD_ESP-
> CALL_EBP
> > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param+  LOAD_ECX
> > CALL_MMX  ASM_PFX(SecCarInit)   cmp   eax, 0   jnz
> TempRamInitExit
> > LOAD_ESP-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD
> > param-  mov   edi, ecx ; Save UPD param
> to EDI for later code
> > use+  LOAD_ECX+  mov   edi, ecx; Save UPD
> param to EDI for
> > later code use   CALL_MMX  ASM_PFX(EstablishStackFsp)   cmp
> eax, 0
> > jnz   TempRamInitExit -  LXMMN xmm6, eax, 3  ;Restore
> microcode
> > status if no CAR init error from ECX-SLOT 3 in xmm6.-  SXMMN xmm6,
> 3,
> > edi  ;Save FSP-T UPD parameter pointer in ECX-SLOT 3 in xmm6.+
> > LOAD_UCODE_STATUS ; Restore microcode status if no
> CAR init
> > error from slot 1 in xmm5.  TempRamInitExit:   mov   bl,
> al  ;
> > save al data in bldiff --git
a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> > b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> > index e3e1945473..3c63f6eea5 100644
> > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> > @@ -7,6 +7,8 @@
> >   SECTION .text +FSP_HEADER_IMGBASE

Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread Chiu, Chasel


Hi Liming, Michael,

May I know why we cannot merge this PR 
https://github.com/tianocore/edk2/pull/3624 ?
Was it due to Hard Feature Freeze? But I thought we still have time right?

Thanks,
Chasel


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Kuo,
> Ted
> Sent: Wednesday, November 9, 2022 3:31 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; S,
> Ashraf Ali ; Duggapu, Chinni B
> 
> Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting
> null UPD pointer in FSP-T
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114
> 
> 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD pointer
>   respectively in TempRamInitApi in IA32 FspSecCoreT.
> 2.Correct inappropriate description in the return value of
>   AsmGetFspInfoHeader.
> 3.Replace hardcoded offset value 0x1C with
> FSP_HEADER_IMGBASE_OFFSET in
>   FspHeler.nasm.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Ashraf Ali S 
> Cc: Chinni B Duggapu 
> Signed-off-by: Ted Kuo 
> ---
>  .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++--
>  IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm   |  4 +-
>  .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74 ++-
>  IntelFsp2Pkg/FspSecCore/SecFsp.h  |  2 +-
>  IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm|  4 +-
>  5 files changed, 55 insertions(+), 46 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 73821ad22a..2cff8b3643 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi):
>SAVE_EAX   SAVE_EDX +  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ;
> ECX for UPD param+  SAVE_ECX   ; save UPD param 
> to slot
> 3 in xmm6+   ;   ; Sec Platform Init   ;-  CALL_EBP
> ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param   CALL_MMX
> ASM_PFX(SecPlatformInit)   cmp   eax, 0   jnz   TempRamInitExit;
> Load microcode   LOAD_ESP-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ;
> ECX for UPD param+  LOAD_ECX   CALL_MMX
> ASM_PFX(LoadMicrocodeDefault)-  SXMMN xmm6, 3, eax;Save
> microcode return status in ECX-SLOT 3 in xmm6.+
> SAVE_UCODE_STATUS ; Save microcode return status in slot 1 in
> xmm5.   ;@note If return value eax is not 0, microcode did not load, but
> continue and attempt to boot.; Call Sec CAR Init   LOAD_ESP-  CALL_EBP
> ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param+  LOAD_ECX
> CALL_MMX  ASM_PFX(SecCarInit)   cmp   eax, 0   jnz   TempRamInitExit
> LOAD_ESP-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD
> param-  mov   edi, ecx ; Save UPD param to EDI for 
> later code
> use+  LOAD_ECX+  mov   edi, ecx; Save UPD param to EDI for
> later code use   CALL_MMX  ASM_PFX(EstablishStackFsp)   cmp   eax, 0
> jnz   TempRamInitExit -  LXMMN xmm6, eax, 3  ;Restore microcode
> status if no CAR init error from ECX-SLOT 3 in xmm6.-  SXMMN xmm6, 3,
> edi  ;Save FSP-T UPD parameter pointer in ECX-SLOT 3 in xmm6.+
> LOAD_UCODE_STATUS ; Restore microcode status if no CAR init
> error from slot 1 in xmm5.  TempRamInitExit:   mov   bl, al   
>;
> save al data in bldiff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> index e3e1945473..3c63f6eea5 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> @@ -7,6 +7,8 @@
>   SECTION .text +FSP_HEADER_IMGBASE_OFFSETEQU   1Ch+ global
> ASM_PFX(FspInfoHeaderRelativeOff) ASM_PFX(FspInfoHeaderRelativeOff):
> DD0x12345678   ; This value must be patched by the build
> script@@ -14,7 +16,7 @@ ASM_PFX(FspInfoHeaderRelativeOff):
>  global ASM_PFX(AsmGetFspBaseAddress)
> ASM_PFX(AsmGetFspBaseAddress):call
> ASM_PFX(AsmGetFspInfoHeader)-   add   eax, 0x1C+   add   eax,
> FSP_HEADER_IMGBASE_OFFSETmov   eax, dword [eax]ret diff --git
> a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> index 4c321cbece..a222f2e376 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> @@ -1,6 +1,6 @@
>  
> ;--
>  ;-; Copyright (c)
> 2015 - 2019, Intel Corporation. All rights reserved.+; Copyright (c)
> 2015 - 2022, Intel Corporation. All rights reserved. ; SPDX-License-
>

Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-10 Thread Nate DeSimone
Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Kuo, Ted
Sent: Wednesday, November 9, 2022 3:31 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star ; S, Ashraf 
Ali ; Duggapu, Chinni B 
Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null 
UPD pointer in FSP-T

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114

1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD pointer
  respectively in TempRamInitApi in IA32 FspSecCoreT.
2.Correct inappropriate description in the return value of
  AsmGetFspInfoHeader.
3.Replace hardcoded offset value 0x1C with FSP_HEADER_IMGBASE_OFFSET in
  FspHeler.nasm.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++--
 IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm   |  4 +-
 .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74 ++-
 IntelFsp2Pkg/FspSecCore/SecFsp.h  |  2 +-
 IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm|  4 +-
 5 files changed, 55 insertions(+), 46 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 73821ad22a..2cff8b3643 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi):
   SAVE_EAX
   SAVE_EDX
 
+  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
+  SAVE_ECX   ; save UPD param to slot 3 in xmm6
+
   ;
   ; Sec Platform Init
   ;
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
   CALL_MMX  ASM_PFX(SecPlatformInit)
   cmp   eax, 0
   jnz   TempRamInitExit
 
   ; Load microcode
   LOAD_ESP
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
+  LOAD_ECX
   CALL_MMX  ASM_PFX(LoadMicrocodeDefault)
-  SXMMN xmm6, 3, eax;Save microcode return status in ECX-SLOT 
3 in xmm6.
+  SAVE_UCODE_STATUS ; Save microcode return status in slot 1 
in xmm5.
   ;@note If return value eax is not 0, microcode did not load, but continue 
and attempt to boot.
 
   ; Call Sec CAR Init
   LOAD_ESP
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
+  LOAD_ECX
   CALL_MMX  ASM_PFX(SecCarInit)
   cmp   eax, 0
   jnz   TempRamInitExit
 
   LOAD_ESP
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
-  mov   edi, ecx ; Save UPD param to EDI for later 
code use
+  LOAD_ECX
+  mov   edi, ecx; Save UPD param to EDI for later code use
   CALL_MMX  ASM_PFX(EstablishStackFsp)
   cmp   eax, 0
   jnz   TempRamInitExit
 
-  LXMMN xmm6, eax, 3  ;Restore microcode status if no CAR init error from 
ECX-SLOT 3 in xmm6.
-  SXMMN xmm6, 3, edi  ;Save FSP-T UPD parameter pointer in ECX-SLOT 3 in 
xmm6.
+  LOAD_UCODE_STATUS ; Restore microcode status if no CAR init 
error from slot 1 in xmm5.
 
 TempRamInitExit:
   mov   bl, al  ; save al data in bl
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
index e3e1945473..3c63f6eea5 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
@@ -7,6 +7,8 @@
 
 SECTION .text
 
+FSP_HEADER_IMGBASE_OFFSETEQU   1Ch
+
 global ASM_PFX(FspInfoHeaderRelativeOff)
 ASM_PFX(FspInfoHeaderRelativeOff):
DD0x12345678   ; This value must be patched by the build 
script
@@ -14,7 +16,7 @@ ASM_PFX(FspInfoHeaderRelativeOff):
 global ASM_PFX(AsmGetFspBaseAddress)
 ASM_PFX(AsmGetFspBaseAddress):
call  ASM_PFX(AsmGetFspInfoHeader)
-   add   eax, 0x1C
+   add   eax, FSP_HEADER_IMGBASE_OFFSET
mov   eax, dword [eax]
ret
 
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc 
b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
index 4c321cbece..a222f2e376 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
@@ -1,6 +1,6 @@
 ;--
 ;
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ; Abstract:
@@ -16,21 +16,21 @@
 ;
 ; Define SSE macros using SSE 4.1 instructions
 ; args 1:XMM, 2:IDX, 3:REG
-%macro SXMMN   3
+%macro SXMMN3
  pinsrd  %1, %3, (%2 & 3)
  %endmacro
 
 ;
 ;args 1:XMM, 2:REG, 3:IDX
 ;
-%macro LXMMN   3
+%macro LXMMN3
  pextrd  %2, %1, (%3 & 3)
  %endmacro
 %else
 ;
 ; Define SSE macros using SSE 2 instructions
 ; args 1:XMM, 2:IDX, 3:REG
-%macro SXMMN   3
+%macro SXMMN3
  pinsrw

Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-09 Thread Chiu, Chasel


Thanks for cleaner implementation Ted!

Reviewed-by: Chasel Chiu 



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Kuo,
> Ted
> Sent: Wednesday, November 9, 2022 3:31 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; S,
> Ashraf Ali ; Duggapu, Chinni B
> 
> Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting
> null UPD pointer in FSP-T
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114
> 
> 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD pointer
>   respectively in TempRamInitApi in IA32 FspSecCoreT.
> 2.Correct inappropriate description in the return value of
>   AsmGetFspInfoHeader.
> 3.Replace hardcoded offset value 0x1C with
> FSP_HEADER_IMGBASE_OFFSET in
>   FspHeler.nasm.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Ashraf Ali S 
> Cc: Chinni B Duggapu 
> Signed-off-by: Ted Kuo 
> ---
>  .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++--
>  IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm   |  4 +-
>  .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74 ++-
>  IntelFsp2Pkg/FspSecCore/SecFsp.h  |  2 +-
>  IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm|  4 +-
>  5 files changed, 55 insertions(+), 46 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 73821ad22a..2cff8b3643 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi):
>SAVE_EAX   SAVE_EDX +  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ;
> ECX for UPD param+  SAVE_ECX   ; save UPD param 
> to slot
> 3 in xmm6+   ;   ; Sec Platform Init   ;-  CALL_EBP
> ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param   CALL_MMX
> ASM_PFX(SecPlatformInit)   cmp   eax, 0   jnz   TempRamInitExit;
> Load microcode   LOAD_ESP-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ;
> ECX for UPD param+  LOAD_ECX   CALL_MMX
> ASM_PFX(LoadMicrocodeDefault)-  SXMMN xmm6, 3, eax;Save
> microcode return status in ECX-SLOT 3 in xmm6.+
> SAVE_UCODE_STATUS ; Save microcode return status in slot 1 in
> xmm5.   ;@note If return value eax is not 0, microcode did not load, but
> continue and attempt to boot.; Call Sec CAR Init   LOAD_ESP-  CALL_EBP
> ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param+  LOAD_ECX
> CALL_MMX  ASM_PFX(SecCarInit)   cmp   eax, 0   jnz   TempRamInitExit
> LOAD_ESP-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD
> param-  mov   edi, ecx ; Save UPD param to EDI for 
> later code
> use+  LOAD_ECX+  mov   edi, ecx; Save UPD param to EDI for
> later code use   CALL_MMX  ASM_PFX(EstablishStackFsp)   cmp   eax, 0
> jnz   TempRamInitExit -  LXMMN xmm6, eax, 3  ;Restore microcode
> status if no CAR init error from ECX-SLOT 3 in xmm6.-  SXMMN xmm6, 3,
> edi  ;Save FSP-T UPD parameter pointer in ECX-SLOT 3 in xmm6.+
> LOAD_UCODE_STATUS ; Restore microcode status if no CAR init
> error from slot 1 in xmm5.  TempRamInitExit:   mov   bl, al   
>;
> save al data in bldiff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> index e3e1945473..3c63f6eea5 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
> @@ -7,6 +7,8 @@
>   SECTION .text +FSP_HEADER_IMGBASE_OFFSETEQU   1Ch+ global
> ASM_PFX(FspInfoHeaderRelativeOff) ASM_PFX(FspInfoHeaderRelativeOff):
> DD0x12345678   ; This value must be patched by the build
> script@@ -14,7 +16,7 @@ ASM_PFX(FspInfoHeaderRelativeOff):
>  global ASM_PFX(AsmGetFspBaseAddress)
> ASM_PFX(AsmGetFspBaseAddress):call
> ASM_PFX(AsmGetFspInfoHeader)-   add   eax, 0x1C+   add   eax,
> FSP_HEADER_IMGBASE_OFFSETmov   eax, dword [eax]ret diff --git
> a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> index 4c321cbece..a222f2e376 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
> @@ -1,6 +1,6 @@
>  
> ;--
>  ;-; Copyright (c)
> 2015 - 2019, Intel Corporation. All rights reserved.+; Copyright (c)
> 2015 - 2022, Intel Corporation. All rights reserved. ; SPDX-License-
> Identifier: BSD-2-Clause-Patent ; ; Abstract:@@ -16,21 +16,21 @@
>  ; ; Define SSE macros using SSE 4.1 instructions ; args 1:XMM,

[edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T

2022-11-09 Thread Kuo, Ted
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114

1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD pointer
  respectively in TempRamInitApi in IA32 FspSecCoreT.
2.Correct inappropriate description in the return value of
  AsmGetFspInfoHeader.
3.Replace hardcoded offset value 0x1C with FSP_HEADER_IMGBASE_OFFSET in
  FspHeler.nasm.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++--
 IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm   |  4 +-
 .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74 ++-
 IntelFsp2Pkg/FspSecCore/SecFsp.h  |  2 +-
 IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm|  4 +-
 5 files changed, 55 insertions(+), 46 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 73821ad22a..2cff8b3643 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi):
   SAVE_EAX
   SAVE_EDX
 
+  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
+  SAVE_ECX   ; save UPD param to slot 3 in xmm6
+
   ;
   ; Sec Platform Init
   ;
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
   CALL_MMX  ASM_PFX(SecPlatformInit)
   cmp   eax, 0
   jnz   TempRamInitExit
 
   ; Load microcode
   LOAD_ESP
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
+  LOAD_ECX
   CALL_MMX  ASM_PFX(LoadMicrocodeDefault)
-  SXMMN xmm6, 3, eax;Save microcode return status in ECX-SLOT 
3 in xmm6.
+  SAVE_UCODE_STATUS ; Save microcode return status in slot 1 
in xmm5.
   ;@note If return value eax is not 0, microcode did not load, but continue 
and attempt to boot.
 
   ; Call Sec CAR Init
   LOAD_ESP
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
+  LOAD_ECX
   CALL_MMX  ASM_PFX(SecCarInit)
   cmp   eax, 0
   jnz   TempRamInitExit
 
   LOAD_ESP
-  CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
-  mov   edi, ecx ; Save UPD param to EDI for later 
code use
+  LOAD_ECX
+  mov   edi, ecx; Save UPD param to EDI for later code use
   CALL_MMX  ASM_PFX(EstablishStackFsp)
   cmp   eax, 0
   jnz   TempRamInitExit
 
-  LXMMN xmm6, eax, 3  ;Restore microcode status if no CAR init error from 
ECX-SLOT 3 in xmm6.
-  SXMMN xmm6, 3, edi  ;Save FSP-T UPD parameter pointer in ECX-SLOT 3 in 
xmm6.
+  LOAD_UCODE_STATUS ; Restore microcode status if no CAR init 
error from slot 1 in xmm5.
 
 TempRamInitExit:
   mov   bl, al  ; save al data in bl
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
index e3e1945473..3c63f6eea5 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm
@@ -7,6 +7,8 @@
 
 SECTION .text
 
+FSP_HEADER_IMGBASE_OFFSETEQU   1Ch
+
 global ASM_PFX(FspInfoHeaderRelativeOff)
 ASM_PFX(FspInfoHeaderRelativeOff):
DD0x12345678   ; This value must be patched by the build 
script
@@ -14,7 +16,7 @@ ASM_PFX(FspInfoHeaderRelativeOff):
 global ASM_PFX(AsmGetFspBaseAddress)
 ASM_PFX(AsmGetFspBaseAddress):
call  ASM_PFX(AsmGetFspInfoHeader)
-   add   eax, 0x1C
+   add   eax, FSP_HEADER_IMGBASE_OFFSET
mov   eax, dword [eax]
ret
 
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc 
b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
index 4c321cbece..a222f2e376 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
@@ -1,6 +1,6 @@
 ;--
 ;
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ; Abstract:
@@ -16,21 +16,21 @@
 ;
 ; Define SSE macros using SSE 4.1 instructions
 ; args 1:XMM, 2:IDX, 3:REG
-%macro SXMMN   3
+%macro SXMMN3
  pinsrd  %1, %3, (%2 & 3)
  %endmacro
 
 ;
 ;args 1:XMM, 2:REG, 3:IDX
 ;
-%macro LXMMN   3
+%macro LXMMN3
  pextrd  %2, %1, (%3 & 3)
  %endmacro
 %else
 ;
 ; Define SSE macros using SSE 2 instructions
 ; args 1:XMM, 2:IDX, 3:REG
-%macro SXMMN   3
+%macro SXMMN3
  pinsrw  %1, %3, (%2 & 3) * 2
  ror %3, 16
  pinsrw  %1, %3, (%2 & 3) * 2 + 1
@@ -38,19 +38,19 @@
  %endmacro
 
 ;
-;args 1:XMM, 2:REG,  3:IDX
+;args 1:XMM, 2:REG, 3:IDX
 ;
 %macro LXMMN3
- pshufd  %1, %1,  ((0E4E4E4h >> (%3 * 2))  & 0FFh)
+ pshufd  %1, %1, ((0E4E4E4h >> (%3 * 2))  & 0FFh)
  movd%2,