Re: [edk2-devel] [PATCH 14/18] UefiCpuPkg: Remove code to set register table

2024-05-12 Thread Ni, Ray
Reviewed-by: Ray Ni 

Thanks,
Ray

From: Tan, Dun 
Sent: Friday, May 10, 2024 18:08
To: devel@edk2.groups.io 
Cc: Ni, Ray ; Laszlo Ersek ; Kumar, Rahul 
R ; Gerd Hoffmann ; Wu, Jiaxin 

Subject: [PATCH 14/18] UefiCpuPkg: Remove code to set register table

Remove code to set register table in CpuS3.c.
In previous commit, PcdCpuFeaturesInitOnS3Resume
has been set to TRUE. So that CpuFeaturesPei PEIM
will initialize the CPU registers and perform CPU
features initialization.

Signed-off-by: Dun Tan 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Jiaxin Wu 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 423 
---
 1 file changed, 423 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 7ac6b62676..9520451d92 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -91,425 +91,6 @@ UINT8  mApHltLoopCodeTemplate[] = {
   0xEB, 0xFC  // jmp $-2
 };

-/**
-  Increment semaphore by 1.
-
-  @param  SemIN:  32-bit unsigned integer
-
-**/
-VOID
-S3ReleaseSemaphore (
-  IN OUT  volatile UINT32  *Sem
-  )
-{
-  InterlockedIncrement (Sem);
-}
-
-/**
-  Decrement the semaphore by 1 if it is not zero.
-
-  Performs an atomic decrement operation for semaphore.
-  The compare exchange operation must be performed using
-  MP safe mechanisms.
-
-  @param  SemIN:  32-bit unsigned integer
-
-**/
-VOID
-S3WaitForSemaphore (
-  IN OUT  volatile UINT32  *Sem
-  )
-{
-  UINT32  Value;
-
-  do {
-Value = *Sem;
-  } while (Value == 0 ||
-   InterlockedCompareExchange32 (
- Sem,
- Value,
- Value - 1
- ) != Value);
-}
-
-/**
-  Read / write CR value.
-
-  @param[in]  CrIndex The CR index which need to read/write.
-  @param[in]  ReadRead or write. TRUE is read.
-  @param[in,out]  CrValue CR value.
-
-  @retvalEFI_SUCCESS means read/write success, else return EFI_UNSUPPORTED.
-**/
-UINTN
-ReadWriteCr (
-  IN UINT32   CrIndex,
-  IN BOOLEAN  Read,
-  IN OUT UINTN*CrValue
-  )
-{
-  switch (CrIndex) {
-case 0:
-  if (Read) {
-*CrValue = AsmReadCr0 ();
-  } else {
-AsmWriteCr0 (*CrValue);
-  }
-
-  break;
-case 2:
-  if (Read) {
-*CrValue = AsmReadCr2 ();
-  } else {
-AsmWriteCr2 (*CrValue);
-  }
-
-  break;
-case 3:
-  if (Read) {
-*CrValue = AsmReadCr3 ();
-  } else {
-AsmWriteCr3 (*CrValue);
-  }
-
-  break;
-case 4:
-  if (Read) {
-*CrValue = AsmReadCr4 ();
-  } else {
-AsmWriteCr4 (*CrValue);
-  }
-
-  break;
-default:
-  return EFI_UNSUPPORTED;
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Initialize the CPU registers from a register table.
-
-  @param[in]  RegisterTable The register table for this AP.
-  @param[in]  ApLocationAP location info for this ap.
-  @param[in]  CpuStatus CPU status info for this CPU.
-  @param[in]  CpuFlags  Flags data structure used when program the 
register.
-
-  @note This service could be called by BSP/APs.
-**/
-VOID
-ProgramProcessorRegister (
-  IN CPU_REGISTER_TABLE  *RegisterTable,
-  IN EFI_CPU_PHYSICAL_LOCATION   *ApLocation,
-  IN CPU_STATUS_INFORMATION  *CpuStatus,
-  IN PROGRAM_CPU_REGISTER_FLAGS  *CpuFlags
-  )
-{
-  CPU_REGISTER_TABLE_ENTRY  *RegisterTableEntry;
-  UINTN Index;
-  UINTN Value;
-  CPU_REGISTER_TABLE_ENTRY  *RegisterTableEntryHead;
-  volatile UINT32   *SemaphorePtr;
-  UINT32FirstThread;
-  UINT32CurrentThread;
-  UINT32CurrentCore;
-  UINTN ProcessorIndex;
-  UINT32*ThreadCountPerPackage;
-  UINT8 *ThreadCountPerCore;
-  EFI_STATUSStatus;
-  UINT64CurrentValue;
-
-  //
-  // Traverse Register Table of this logical processor
-  //
-  RegisterTableEntryHead = (CPU_REGISTER_TABLE_ENTRY 
*)(UINTN)RegisterTable->RegisterTableEntry;
-
-  for (Index = 0; Index < RegisterTable->TableLength; Index++) {
-RegisterTableEntry = [Index];
-
-//
-// Check the type of specified register
-//
-switch (RegisterTableEntry->RegisterType) {
-  //
-  // The specified register is Control Register
-  //
-  case ControlRegister:
-Status = ReadWriteCr 

[edk2-devel] [PATCH 14/18] UefiCpuPkg: Remove code to set register table

2024-05-10 Thread duntan
Remove code to set register table in CpuS3.c.
In previous commit, PcdCpuFeaturesInitOnS3Resume
has been set to TRUE. So that CpuFeaturesPei PEIM
will initialize the CPU registers and perform CPU
features initialization.

Signed-off-by: Dun Tan 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Jiaxin Wu 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 423 
---
 1 file changed, 423 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 7ac6b62676..9520451d92 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -91,425 +91,6 @@ UINT8  mApHltLoopCodeTemplate[] = {
   0xEB, 0xFC  // jmp $-2
 };
 
-/**
-  Increment semaphore by 1.
-
-  @param  SemIN:  32-bit unsigned integer
-
-**/
-VOID
-S3ReleaseSemaphore (
-  IN OUT  volatile UINT32  *Sem
-  )
-{
-  InterlockedIncrement (Sem);
-}
-
-/**
-  Decrement the semaphore by 1 if it is not zero.
-
-  Performs an atomic decrement operation for semaphore.
-  The compare exchange operation must be performed using
-  MP safe mechanisms.
-
-  @param  SemIN:  32-bit unsigned integer
-
-**/
-VOID
-S3WaitForSemaphore (
-  IN OUT  volatile UINT32  *Sem
-  )
-{
-  UINT32  Value;
-
-  do {
-Value = *Sem;
-  } while (Value == 0 ||
-   InterlockedCompareExchange32 (
- Sem,
- Value,
- Value - 1
- ) != Value);
-}
-
-/**
-  Read / write CR value.
-
-  @param[in]  CrIndex The CR index which need to read/write.
-  @param[in]  ReadRead or write. TRUE is read.
-  @param[in,out]  CrValue CR value.
-
-  @retvalEFI_SUCCESS means read/write success, else return EFI_UNSUPPORTED.
-**/
-UINTN
-ReadWriteCr (
-  IN UINT32   CrIndex,
-  IN BOOLEAN  Read,
-  IN OUT UINTN*CrValue
-  )
-{
-  switch (CrIndex) {
-case 0:
-  if (Read) {
-*CrValue = AsmReadCr0 ();
-  } else {
-AsmWriteCr0 (*CrValue);
-  }
-
-  break;
-case 2:
-  if (Read) {
-*CrValue = AsmReadCr2 ();
-  } else {
-AsmWriteCr2 (*CrValue);
-  }
-
-  break;
-case 3:
-  if (Read) {
-*CrValue = AsmReadCr3 ();
-  } else {
-AsmWriteCr3 (*CrValue);
-  }
-
-  break;
-case 4:
-  if (Read) {
-*CrValue = AsmReadCr4 ();
-  } else {
-AsmWriteCr4 (*CrValue);
-  }
-
-  break;
-default:
-  return EFI_UNSUPPORTED;
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Initialize the CPU registers from a register table.
-
-  @param[in]  RegisterTable The register table for this AP.
-  @param[in]  ApLocationAP location info for this ap.
-  @param[in]  CpuStatus CPU status info for this CPU.
-  @param[in]  CpuFlags  Flags data structure used when program the 
register.
-
-  @note This service could be called by BSP/APs.
-**/
-VOID
-ProgramProcessorRegister (
-  IN CPU_REGISTER_TABLE  *RegisterTable,
-  IN EFI_CPU_PHYSICAL_LOCATION   *ApLocation,
-  IN CPU_STATUS_INFORMATION  *CpuStatus,
-  IN PROGRAM_CPU_REGISTER_FLAGS  *CpuFlags
-  )
-{
-  CPU_REGISTER_TABLE_ENTRY  *RegisterTableEntry;
-  UINTN Index;
-  UINTN Value;
-  CPU_REGISTER_TABLE_ENTRY  *RegisterTableEntryHead;
-  volatile UINT32   *SemaphorePtr;
-  UINT32FirstThread;
-  UINT32CurrentThread;
-  UINT32CurrentCore;
-  UINTN ProcessorIndex;
-  UINT32*ThreadCountPerPackage;
-  UINT8 *ThreadCountPerCore;
-  EFI_STATUSStatus;
-  UINT64CurrentValue;
-
-  //
-  // Traverse Register Table of this logical processor
-  //
-  RegisterTableEntryHead = (CPU_REGISTER_TABLE_ENTRY 
*)(UINTN)RegisterTable->RegisterTableEntry;
-
-  for (Index = 0; Index < RegisterTable->TableLength; Index++) {
-RegisterTableEntry = [Index];
-
-//
-// Check the type of specified register
-//
-switch (RegisterTableEntry->RegisterType) {
-  //
-  // The specified register is Control Register
-  //
-  case ControlRegister:
-Status = ReadWriteCr (RegisterTableEntry->Index, TRUE, );
-if (EFI_ERROR (Status)) {
-  break;
-}
-
-if (RegisterTableEntry->TestThenWrite) {
-  CurrentValue = BitFieldRead64 (
-   Value,
-   RegisterTableEntry->ValidBitStart,
-