Re: [edk2-devel] [PATCH 28/33] AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.
[AMD Official Use Only - General] Ok, got it! Thanks Abner > -Original Message- > From: Xing, Eric > Sent: Tuesday, January 23, 2024 6:20 PM > To: Chang, Abner ; Zhai, MingXin (Duke) > ; devel@edk2.groups.io > Cc: Yao, Ken ; Fu, Igniculus > Subject: RE: [PATCH 28/33] AMD/VanGoghBoard: Check in > SmmCpuFeaturesLibCommon module. > > [AMD Official Use Only - General] > > Hi Abner, > Thanks for the review, it is good catch. > Currently, our current override files are based on UDK202208 code base now. > We will leverage latest EDK2 changes after we update to new EDK2 code base. > > Thanks, > Eric > > > -Original Message- > > From: Chang, Abner > > Sent: Tuesday, January 23, 2024 1:14 PM > > To: Zhai, MingXin (Duke) ; devel@edk2.groups.io > > Cc: Xing, Eric ; Yao, Ken ; Fu, > > Igniculus > > Subject: RE: [PATCH 28/33] AMD/VanGoghBoard: Check in > > SmmCpuFeaturesLibCommon module. > > > > [AMD Official Use Only - General] > > > > Please confirm if the latest edk2 SmmCpuFeatureLibCommon.c and > > AmdSmmCpuFeatureLib.c under SmmCpuFeatureLib can cover your changes > > in this patch or not. > > > > Thanks > > Abner > > > > > -Original Message- > > > From: duke.z...@amd.com > > > Sent: Thursday, January 18, 2024 2:51 PM > > > To: devel@edk2.groups.io > > > Cc: Xing, Eric ; Yao, Ken ; Fu, > > > Igniculus ; Chang, Abner > > > > > Subject: [PATCH 28/33] AMD/VanGoghBoard: Check in > > > SmmCpuFeaturesLibCommon module. > > > > > > From: Duke Zhai > > > > > > > > > BZ #:4640 > > > > > > Initial SmmCpuFeaturesLibCommon module. The CPU specific > > programming > > > for > > > > > > PiSmmCpuDxeSmm module when STM support is not included. > > > > > > > > > > > > Signed-off-by: Duke Zhai > > > > > > Cc: Eric Xing > > > > > > Cc: Ken Yao > > > > > > Cc: Igniculus Fu > > > > > > Cc: Abner Chang > > > > > > --- > > > > > > .../SmmCpuFeaturesLibCommon.c | 629 ++ > > > > > > 1 file changed, 629 insertions(+) > > > > > > create mode 100644 > > > > > > Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpu > > > FeaturesLib/SmmCpuFeaturesLibCommon.c > > > > > > > > > > > > diff --git > > > > > > a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC > > p > > > uFeaturesLib/SmmCpuFeaturesLibCommon.c > > > > > > b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC > > > puFeaturesLib/SmmCpuFeaturesLibCommon.c > > > > > > new file mode 100644 > > > > > > index 00..7b07425336 > > > > > > --- /dev/null > > > > > > +++ > > > > > > b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC > > > puFeaturesLib/SmmCpuFeaturesLibCommon.c > > > > > > @@ -0,0 +1,629 @@ > > > > > > +/** @file > > > > > > + Implements AMD SmmCpuFeaturesLibCommon.c > > > > > > + > > > > > > + Copyright (C) 2024 Advanced Micro Devices, Inc. All rights > > > + reserved. > > > > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > + > > > > > > +**/ > > > > > > + > > > > > > +/* This file includes code originally published under the following > > > +license. */ > > > > > > +/** @file > > > > > > +Implementation shared across all library instances. > > > > > > + > > > > > > +Copyright (c) 2010 - 2019, Intel Corporation. All rights > > > +reserved. > > > > > > +Copyright (c) Microsoft Corporation. > > > > > > +SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > + > > > > > > +**/ > > > > > > + > > > > > > +#include > > > > > > +#include > > > > > > +#include > > > > > > +#include > > > > > > +#include > > > > > > +#include > > > > > > +#include > > > > > > +#include > > > > > > +#include > > > > > > +#include "CpuFeaturesLib.h" > > > > > > + > > > > > > +// > > > > > > +// Machine Specific Registers (MSRs) > > > > > > +// > > > > > > +#define SMM_FEATURES_LIB_IA32_MTRR_CAP0x0FE > > > > > > +#define SMM_FEATURES_LIB_IA32_FEATURE_CONTROL 0x03A > > > > > > +#define SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE 0x1F2 > > > > > > +#define SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK 0x1F3 > > > > > > +#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE 0x0A0 > > > > > > +#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK 0x0A1 > > > > > > +#defineEFI_MSR_SMRR_MASK 0xF000 > > > > > > +#defineEFI_MSR_SMRR_PHYS_MASK_VALIDBIT11 > > > > > > +#define SMM_FEATURES_LIB_SMM_FEATURE_CONTROL 0x4E0 > > > > > > + > > > > > > +// > > > > > > +// MSRs required for configuration of SMM Code Access Check > > > > > > +// > > > > > > +#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D > > > > > > +#define SMM_CODE_ACCESS_CHK_BIT BIT58 > > > > > > + > > > > > > +extern UINT8 mSmmSaveStateRegisterLma; > > > > > > + > > > > > > +// > > > > > > +// Set default value to assume SMRR is not supported > > > > > > +// > > > > > > +BOOLEAN mSmrrSupported = FALSE; > > > > > > + > > > > > > +// > > > > > > +// Set default value to assume MSR_SMM_FEATURE_CONTROL is not > > > supported > > >
Re: [edk2-devel] [PATCH 28/33] AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.
[AMD Official Use Only - General] Hi Abner, Thanks for the review, it is good catch. Currently, our current override files are based on UDK202208 code base now. We will leverage latest EDK2 changes after we update to new EDK2 code base. Thanks, Eric > -Original Message- > From: Chang, Abner > Sent: Tuesday, January 23, 2024 1:14 PM > To: Zhai, MingXin (Duke) ; devel@edk2.groups.io > Cc: Xing, Eric ; Yao, Ken ; Fu, > Igniculus > Subject: RE: [PATCH 28/33] AMD/VanGoghBoard: Check in > SmmCpuFeaturesLibCommon module. > > [AMD Official Use Only - General] > > Please confirm if the latest edk2 SmmCpuFeatureLibCommon.c and > AmdSmmCpuFeatureLib.c under SmmCpuFeatureLib can cover your changes > in this patch or not. > > Thanks > Abner > > > -Original Message- > > From: duke.z...@amd.com > > Sent: Thursday, January 18, 2024 2:51 PM > > To: devel@edk2.groups.io > > Cc: Xing, Eric ; Yao, Ken ; Fu, > > Igniculus ; Chang, Abner > > > Subject: [PATCH 28/33] AMD/VanGoghBoard: Check in > > SmmCpuFeaturesLibCommon module. > > > > From: Duke Zhai > > > > > > BZ #:4640 > > > > Initial SmmCpuFeaturesLibCommon module. The CPU specific > programming > > for > > > > PiSmmCpuDxeSmm module when STM support is not included. > > > > > > > > Signed-off-by: Duke Zhai > > > > Cc: Eric Xing > > > > Cc: Ken Yao > > > > Cc: Igniculus Fu > > > > Cc: Abner Chang > > > > --- > > > > .../SmmCpuFeaturesLibCommon.c | 629 ++ > > > > 1 file changed, 629 insertions(+) > > > > create mode 100644 > > > Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpu > > FeaturesLib/SmmCpuFeaturesLibCommon.c > > > > > > > > diff --git > > > a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC > p > > uFeaturesLib/SmmCpuFeaturesLibCommon.c > > > b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC > > puFeaturesLib/SmmCpuFeaturesLibCommon.c > > > > new file mode 100644 > > > > index 00..7b07425336 > > > > --- /dev/null > > > > +++ > > > b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC > > puFeaturesLib/SmmCpuFeaturesLibCommon.c > > > > @@ -0,0 +1,629 @@ > > > > +/** @file > > > > + Implements AMD SmmCpuFeaturesLibCommon.c > > > > + > > > > + Copyright (C) 2024 Advanced Micro Devices, Inc. All rights > > + reserved. > > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > > + > > > > +**/ > > > > + > > > > +/* This file includes code originally published under the following > > +license. */ > > > > +/** @file > > > > +Implementation shared across all library instances. > > > > + > > > > +Copyright (c) 2010 - 2019, Intel Corporation. All rights > > +reserved. > > > > +Copyright (c) Microsoft Corporation. > > > > +SPDX-License-Identifier: BSD-2-Clause-Patent > > > > + > > > > +**/ > > > > + > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include "CpuFeaturesLib.h" > > > > + > > > > +// > > > > +// Machine Specific Registers (MSRs) > > > > +// > > > > +#define SMM_FEATURES_LIB_IA32_MTRR_CAP0x0FE > > > > +#define SMM_FEATURES_LIB_IA32_FEATURE_CONTROL 0x03A > > > > +#define SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE 0x1F2 > > > > +#define SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK 0x1F3 > > > > +#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE 0x0A0 > > > > +#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK 0x0A1 > > > > +#defineEFI_MSR_SMRR_MASK 0xF000 > > > > +#defineEFI_MSR_SMRR_PHYS_MASK_VALIDBIT11 > > > > +#define SMM_FEATURES_LIB_SMM_FEATURE_CONTROL 0x4E0 > > > > + > > > > +// > > > > +// MSRs required for configuration of SMM Code Access Check > > > > +// > > > > +#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D > > > > +#define SMM_CODE_ACCESS_CHK_BIT BIT58 > > > > + > > > > +extern UINT8 mSmmSaveStateRegisterLma; > > > > + > > > > +// > > > > +// Set default value to assume SMRR is not supported > > > > +// > > > > +BOOLEAN mSmrrSupported = FALSE; > > > > + > > > > +// > > > > +// Set default value to assume MSR_SMM_FEATURE_CONTROL is not > > supported > > > > +// > > > > +BOOLEAN mSmmFeatureControlSupported = FALSE; > > > > + > > > > +// > > > > +// Set default value to assume IA-32 Architectural MSRs are used > > > > +// > > > > +UINT32 mSmrrPhysBaseMsr = > > SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE; > > > > +UINT32 mSmrrPhysMaskMsr = > > SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK; > > > > + > > > > +// > > > > +// Set default value to assume MTRRs need to be configured on each > > +SMI > > > > +// > > > > +BOOLEAN mNeedConfigureMtrrs = TRUE; > > > > + > > > > +// > > > > +// Array for state of SMRR enable on all CPUs > > > > +// > > > > +BOOLEAN *mSmrrEnabled; > > > > + > > > > +/** > > > > + Performs library initialization. > > > > + > > > > + This initialization function contains common functionality shared > > +
Re: [edk2-devel] [PATCH 28/33] AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.
[AMD Official Use Only - General]
Please confirm if the latest edk2 SmmCpuFeatureLibCommon.c and
AmdSmmCpuFeatureLib.c under SmmCpuFeatureLib can cover your changes in this
patch or not.
Thanks
Abner
> -Original Message-
> From: duke.z...@amd.com
> Sent: Thursday, January 18, 2024 2:51 PM
> To: devel@edk2.groups.io
> Cc: Xing, Eric ; Yao, Ken ; Fu,
> Igniculus ; Chang, Abner
> Subject: [PATCH 28/33] AMD/VanGoghBoard: Check in
> SmmCpuFeaturesLibCommon module.
>
> From: Duke Zhai
>
>
> BZ #:4640
>
> Initial SmmCpuFeaturesLibCommon module. The CPU specific programming
> for
>
> PiSmmCpuDxeSmm module when STM support is not included.
>
>
>
> Signed-off-by: Duke Zhai
>
> Cc: Eric Xing
>
> Cc: Ken Yao
>
> Cc: Igniculus Fu
>
> Cc: Abner Chang
>
> ---
>
> .../SmmCpuFeaturesLibCommon.c | 629 ++
>
> 1 file changed, 629 insertions(+)
>
> create mode 100644
> Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpu
> FeaturesLib/SmmCpuFeaturesLibCommon.c
>
>
>
> diff --git
> a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCp
> uFeaturesLib/SmmCpuFeaturesLibCommon.c
> b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC
> puFeaturesLib/SmmCpuFeaturesLibCommon.c
>
> new file mode 100644
>
> index 00..7b07425336
>
> --- /dev/null
>
> +++
> b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmC
> puFeaturesLib/SmmCpuFeaturesLibCommon.c
>
> @@ -0,0 +1,629 @@
>
> +/** @file
>
> + Implements AMD SmmCpuFeaturesLibCommon.c
>
> +
>
> + Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +/* This file includes code originally published under the following license.
> */
>
> +/** @file
>
> +Implementation shared across all library instances.
>
> +
>
> +Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
>
> +Copyright (c) Microsoft Corporation.
>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#include
>
> +#include
>
> +#include
>
> +#include
>
> +#include
>
> +#include
>
> +#include
>
> +#include
>
> +#include
>
> +#include "CpuFeaturesLib.h"
>
> +
>
> +//
>
> +// Machine Specific Registers (MSRs)
>
> +//
>
> +#define SMM_FEATURES_LIB_IA32_MTRR_CAP0x0FE
>
> +#define SMM_FEATURES_LIB_IA32_FEATURE_CONTROL 0x03A
>
> +#define SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE 0x1F2
>
> +#define SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK 0x1F3
>
> +#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE 0x0A0
>
> +#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK 0x0A1
>
> +#defineEFI_MSR_SMRR_MASK 0xF000
>
> +#defineEFI_MSR_SMRR_PHYS_MASK_VALIDBIT11
>
> +#define SMM_FEATURES_LIB_SMM_FEATURE_CONTROL 0x4E0
>
> +
>
> +//
>
> +// MSRs required for configuration of SMM Code Access Check
>
> +//
>
> +#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D
>
> +#define SMM_CODE_ACCESS_CHK_BIT BIT58
>
> +
>
> +extern UINT8 mSmmSaveStateRegisterLma;
>
> +
>
> +//
>
> +// Set default value to assume SMRR is not supported
>
> +//
>
> +BOOLEAN mSmrrSupported = FALSE;
>
> +
>
> +//
>
> +// Set default value to assume MSR_SMM_FEATURE_CONTROL is not
> supported
>
> +//
>
> +BOOLEAN mSmmFeatureControlSupported = FALSE;
>
> +
>
> +//
>
> +// Set default value to assume IA-32 Architectural MSRs are used
>
> +//
>
> +UINT32 mSmrrPhysBaseMsr =
> SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE;
>
> +UINT32 mSmrrPhysMaskMsr =
> SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK;
>
> +
>
> +//
>
> +// Set default value to assume MTRRs need to be configured on each SMI
>
> +//
>
> +BOOLEAN mNeedConfigureMtrrs = TRUE;
>
> +
>
> +//
>
> +// Array for state of SMRR enable on all CPUs
>
> +//
>
> +BOOLEAN *mSmrrEnabled;
>
> +
>
> +/**
>
> + Performs library initialization.
>
> +
>
> + This initialization function contains common functionality shared betwen
> all
>
> + library instance constructors.
>
> +
>
> +**/
>
> +VOID
>
> +CpuFeaturesLibInitialization (
>
> + VOID
>
> + )
>
> +{
>
> + UINT32 RegEax;
>
> + UINT32 RegEdx;
>
> + UINTN FamilyId;
>
> + UINTN ModelId;
>
> +
>
> + //
>
> + // Retrieve CPU Family and Model
>
> + //
>
> + AsmCpuid (CPUID_VERSION_INFO, , NULL, NULL, );
>
> + FamilyId = (RegEax >> 8) & 0xf;
>
> + ModelId = (RegEax >> 4) & 0xf;
>
> + if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
>
> +ModelId = ModelId | ((RegEax >> 12) & 0xf0);
>
> + }
>
> +
>
> + //
>
> + // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability
>
> + //
>
> + if ((RegEdx & BIT12) != 0) {
>
> +//
>
> +// Check MTRR_CAP MSR bit 11 for SMRR support
>
> +//
>
> +if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) !=
> 0) {
>
> + mSmrrSupported = TRUE;
>
> +}
>
> + }
>
> +
>
> + //
>
> + // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
>
> + // Volume 3C, Section 35.3 MSRs in the
[edk2-devel] [PATCH 28/33] AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.
From: Duke Zhai
BZ #:4640
Initial SmmCpuFeaturesLibCommon module. The CPU specific programming for
PiSmmCpuDxeSmm module when STM support is not included.
Signed-off-by: Duke Zhai
Cc: Eric Xing
Cc: Ken Yao
Cc: Igniculus Fu
Cc: Abner Chang
---
.../SmmCpuFeaturesLibCommon.c | 629 ++
1 file changed, 629 insertions(+)
create mode 100644
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
diff --git
a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
new file mode 100644
index 00..7b07425336
--- /dev/null
+++
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
@@ -0,0 +1,629 @@
+/** @file
+ Implements AMD SmmCpuFeaturesLibCommon.c
+
+ Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/* This file includes code originally published under the following license. */
+/** @file
+Implementation shared across all library instances.
+
+Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) Microsoft Corporation.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "CpuFeaturesLib.h"
+
+//
+// Machine Specific Registers (MSRs)
+//
+#define SMM_FEATURES_LIB_IA32_MTRR_CAP0x0FE
+#define SMM_FEATURES_LIB_IA32_FEATURE_CONTROL 0x03A
+#define SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE 0x1F2
+#define SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK 0x1F3
+#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE 0x0A0
+#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK 0x0A1
+#defineEFI_MSR_SMRR_MASK 0xF000
+#defineEFI_MSR_SMRR_PHYS_MASK_VALIDBIT11
+#define SMM_FEATURES_LIB_SMM_FEATURE_CONTROL 0x4E0
+
+//
+// MSRs required for configuration of SMM Code Access Check
+//
+#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D
+#define SMM_CODE_ACCESS_CHK_BIT BIT58
+
+extern UINT8 mSmmSaveStateRegisterLma;
+
+//
+// Set default value to assume SMRR is not supported
+//
+BOOLEAN mSmrrSupported = FALSE;
+
+//
+// Set default value to assume MSR_SMM_FEATURE_CONTROL is not supported
+//
+BOOLEAN mSmmFeatureControlSupported = FALSE;
+
+//
+// Set default value to assume IA-32 Architectural MSRs are used
+//
+UINT32 mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE;
+UINT32 mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK;
+
+//
+// Set default value to assume MTRRs need to be configured on each SMI
+//
+BOOLEAN mNeedConfigureMtrrs = TRUE;
+
+//
+// Array for state of SMRR enable on all CPUs
+//
+BOOLEAN *mSmrrEnabled;
+
+/**
+ Performs library initialization.
+
+ This initialization function contains common functionality shared betwen all
+ library instance constructors.
+
+**/
+VOID
+CpuFeaturesLibInitialization (
+ VOID
+ )
+{
+ UINT32 RegEax;
+ UINT32 RegEdx;
+ UINTN FamilyId;
+ UINTN ModelId;
+
+ //
+ // Retrieve CPU Family and Model
+ //
+ AsmCpuid (CPUID_VERSION_INFO, , NULL, NULL, );
+ FamilyId = (RegEax >> 8) & 0xf;
+ ModelId = (RegEax >> 4) & 0xf;
+ if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
+ModelId = ModelId | ((RegEax >> 12) & 0xf0);
+ }
+
+ //
+ // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability
+ //
+ if ((RegEdx & BIT12) != 0) {
+//
+// Check MTRR_CAP MSR bit 11 for SMRR support
+//
+if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0) {
+ mSmrrSupported = TRUE;
+}
+ }
+
+ //
+ // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
+ // Volume 3C, Section 35.3 MSRs in the Intel(R) Atom(TM) Processor Family
+ //
+ // If CPU Family/Model is 06_1CH, 06_26H, 06_27H, 06_35H or 06_36H, then
+ // SMRR Physical Base and SMM Physical Mask MSRs are not available.
+ //
+ if (FamilyId == 0x06) {
+if ((ModelId == 0x1C) || (ModelId == 0x26) || (ModelId == 0x27) ||
(ModelId == 0x35) || (ModelId == 0x36)) {
+ mSmrrSupported = FALSE;
+}
+ }
+
+ //
+ // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
+ // Volume 3C, Section 35.2 MSRs in the Intel(R) Core(TM) 2 Processor Family
+ //
+ // If CPU Family/Model is 06_0F or 06_17, then use Intel(R) Core(TM) 2
+ // Processor Family MSRs
+ //
+ if (FamilyId == 0x06) {
+if ((ModelId == 0x17) || (ModelId == 0x0f)) {
+ mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE;
+ mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK;
+}
+ }
+
+ //
+ // Intel(R) 64 and
