Re: [edk2-devel] [PATCH ovmf v3 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER

2024-05-20 Thread Lendacky, Thomas via groups.io

On 5/2/24 09:34, Alexey Kardashevskiy wrote:

For now we need DebugSwap but others are likely to be needed too.

Cc: Tom Lendacky 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Zhiguang Liu 
Signed-off-by: Alexey Kardashevskiy 


A recent APM has defined a few more and has slightly different naming 
(see below). If you have to submit another version it might be good to 
update them. Otherwise:


Reviewed-by: Tom Lendacky 


---
  MdePkg/Include/Register/Amd/Fam17Msr.h | 63 ++--
  1 file changed, 59 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h 
b/MdePkg/Include/Register/Amd/Fam17Msr.h
index f2d5ccb39dc7..bce51a66517f 100644
--- a/MdePkg/Include/Register/Amd/Fam17Msr.h
+++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
@@ -126,19 +126,74 @@ typedef union {
  ///
  /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled
  ///
-UINT32SevBit: 1;
+UINT32SevBit  : 1;
  
  ///

  /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is 
enabled
  ///
-UINT32SevEsBit  : 1;
+UINT32SevEsBit: 1;
  
  ///

  /// [Bit 2] Secure Nested Paging (SevSnp) is enabled
  ///
-UINT32SevSnpBit : 1;
+UINT32SevSnpBit   : 1;
  
-UINT32Reserved2 : 29;

+///
+/// [Bit 3] The guest was run with the Virtual TOM feature enabled in 
SEV_FEATURES[1]
+///
+UINT32vTOM_Enabled: 1;


The APM has this as vTOM and the PPR as VirtualTOM, so can probably 
remove the _Enabled.



+
+///
+/// [Bit 4] The guest was run with the ReflectVC feature enabled in 
SEV_FEATURES[2]
+///
+UINT32ReflectVC   : 1;
+
+///
+/// [Bit 5] The guest was run with the Restricted Injection feature 
enabled in SEV_FEATURES[3]
+///
+UINT32RestrictedInjection : 1;
+
+///
+/// [Bit 6] The guest was run with the Alternate Injection feature enabled 
in SEV_FEATURES[4]
+///
+UINT32AlternateInjection  : 1;
+
+///
+/// [Bit 7] This guest was run with debug register swapping enabled in 
SEV_FEATURES[5]
+///
+UINT32DebugSwap   : 1;


The APM has this as DebugVirtualization and the PPR as DebugSwapSupport.


+
+///
+/// [Bit 8]  This guest was run with the PreventHostIBS feature enabled in 
SEV_FEATURES[6]
+///
+UINT32PreventHostIBS  : 1;
+
+///
+/// [Bit 9] The guest was run with the BTB isolation feature enabled in 
SEV_FEATURES[7]
+///
+UINT32SNPBTBIsolation : 1;


The APM has this as BTBIsolation, while the PPR has it as you do.


+
+///
+/// [Bit 10]
+///
+UINT32Reserved0   : 1;
+
+///
+/// [Bit 11] The guest was run with the Secure TSC feature enabled in 
SEV_FEATURES[9]
+///
+UINT32SecureTsc   : 1;
+
+///
+/// [Bits 12 13 14 15]
+///
+UINT32Reserved1   : 4;
+
+///
+/// [Bit 16] The guest was run with the VMSA Register Protection feature 
enabled in SEV_FEATURES[14]
+///
+UINT32VmsaRegProt_Enabled : 1;


The APM has this VmsaRegProt, so can probably drop the _Enabled.


+
+UINT32Reserved2   : 15;
} Bits;
///
/// All bit fields as a 32-bit value



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[edk2-devel] [PATCH ovmf v3 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER

2024-05-02 Thread Alexey Kardashevskiy via groups.io
For now we need DebugSwap but others are likely to be needed too.

Cc: Tom Lendacky 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Zhiguang Liu 
Signed-off-by: Alexey Kardashevskiy 
---
 MdePkg/Include/Register/Amd/Fam17Msr.h | 63 ++--
 1 file changed, 59 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h 
b/MdePkg/Include/Register/Amd/Fam17Msr.h
index f2d5ccb39dc7..bce51a66517f 100644
--- a/MdePkg/Include/Register/Amd/Fam17Msr.h
+++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
@@ -126,19 +126,74 @@ typedef union {
 ///
 /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled
 ///
-UINT32SevBit: 1;
+UINT32SevBit  : 1;
 
 ///
 /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is 
enabled
 ///
-UINT32SevEsBit  : 1;
+UINT32SevEsBit: 1;
 
 ///
 /// [Bit 2] Secure Nested Paging (SevSnp) is enabled
 ///
-UINT32SevSnpBit : 1;
+UINT32SevSnpBit   : 1;
 
-UINT32Reserved2 : 29;
+///
+/// [Bit 3] The guest was run with the Virtual TOM feature enabled in 
SEV_FEATURES[1]
+///
+UINT32vTOM_Enabled: 1;
+
+///
+/// [Bit 4] The guest was run with the ReflectVC feature enabled in 
SEV_FEATURES[2]
+///
+UINT32ReflectVC   : 1;
+
+///
+/// [Bit 5] The guest was run with the Restricted Injection feature 
enabled in SEV_FEATURES[3]
+///
+UINT32RestrictedInjection : 1;
+
+///
+/// [Bit 6] The guest was run with the Alternate Injection feature enabled 
in SEV_FEATURES[4]
+///
+UINT32AlternateInjection  : 1;
+
+///
+/// [Bit 7] This guest was run with debug register swapping enabled in 
SEV_FEATURES[5]
+///
+UINT32DebugSwap   : 1;
+
+///
+/// [Bit 8]  This guest was run with the PreventHostIBS feature enabled in 
SEV_FEATURES[6]
+///
+UINT32PreventHostIBS  : 1;
+
+///
+/// [Bit 9] The guest was run with the BTB isolation feature enabled in 
SEV_FEATURES[7]
+///
+UINT32SNPBTBIsolation : 1;
+
+///
+/// [Bit 10]
+///
+UINT32Reserved0   : 1;
+
+///
+/// [Bit 11] The guest was run with the Secure TSC feature enabled in 
SEV_FEATURES[9]
+///
+UINT32SecureTsc   : 1;
+
+///
+/// [Bits 12 13 14 15]
+///
+UINT32Reserved1   : 4;
+
+///
+/// [Bit 16] The guest was run with the VMSA Register Protection feature 
enabled in SEV_FEATURES[14]
+///
+UINT32VmsaRegProt_Enabled : 1;
+
+UINT32Reserved2   : 15;
   } Bits;
   ///
   /// All bit fields as a 32-bit value
-- 
2.44.0



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