[edk2-devel] [PATCH v1 1/1] UefiCpuPackage: Add APIs for CPU physical address mask calculation

2022-01-13 Thread Yu Pu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394

Firmware contains lots of code that deals with page table.These
code need the information of cpu physical address mask which
can be calculated from CPUID result.Today all these code implements
directly calls CPUID and calculates the address mask.
This bugzilla requests to add a new API as below so that all the
duplicated code can be removed.

Cc: Eric Dong 
Cc: Ray Ni 

Signed-off-by: Yu Pu 
---
 UefiCpuPkg/CpuDxe/CpuDxe.c | 16 +--
 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 47 
 UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c  |  9 +---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c|  9 +---
 UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c  |  9 +---
 UefiCpuPkg/Include/Library/UefiCpuLib.h| 17 +++
 6 files changed, 70 insertions(+), 37 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 00f3cb09572c..8aca1bf72b4c 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -503,21 +503,7 @@ InitializeMtrrMask (
   VOID
   )
 {
-  UINT32  RegEax;
-  UINT8   PhysicalAddressBits;
-
-  AsmCpuid (0x8000, &RegEax, NULL, NULL, NULL);
-
-  if (RegEax >= 0x8008) {
-AsmCpuid (0x8008, &RegEax, NULL, NULL, NULL);
-
-PhysicalAddressBits = (UINT8)RegEax;
-  } else {
-PhysicalAddressBits = 36;
-  }
-
-  mValidMtrrBitsMask= LShiftU64 (1, PhysicalAddressBits) - 1;
-  mValidMtrrAddressMask = mValidMtrrBitsMask & 0xf000ULL;
+  GetPhysicalAddressBits(&mValidMtrrBitsMask, &mValidMtrrAddressMask);
 }
 
 /**
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c 
b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
index 5d925bc273f8..bb1343f3cd21 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
@@ -79,3 +79,50 @@ GetCpuSteppingId (
 
   return (UINT8)Eax.Bits.SteppingId;
 }
+
+/**
+  Get the physical address width supported by the processor.
+  @param[out] ValidAddressMask  Bitmask with valid address bits set to
+one; other bits are clear. Optional
+parameter.
+  @param[out] ValidPageBaseAddressMask  Bitmask with valid page base address
+bits set to one; other bits are clear.
+Optional parameter.
+  @return  The physical address width supported by the processor.
+**/
+UINT8
+EFIAPI
+GetPhysicalAddressBits (
+  OUT UINT64 *ValidAddressMask OPTIONAL,
+  OUT UINT64 *ValidPageBaseAddressMask OPTIONAL
+  )
+{
+  UINT32 MaxExtendedFunction;
+  CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
+  UINT64 AddressMask;
+  UINT64 PageBaseAddressMask;
+
+  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
+  if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+AsmCpuid (
+  CPUID_VIR_PHY_ADDRESS_SIZE,
+  &VirPhyAddressSize.Uint32,
+  NULL,
+  NULL,
+  NULL
+  );
+  } else {
+VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
+  }
+
+  AddressMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
+  PageBaseAddressMask = AddressMask & ~(UINT64)0xFFF;
+
+  if (ValidAddressMask != NULL) {
+*ValidAddressMask = AddressMask;
+  }
+  if (ValidPageBaseAddressMask != NULL) {
+*ValidPageBaseAddressMask = PageBaseAddressMask;
+  }
+  return (UINT8)VirPhyAddressSize.Bits.PhysicalAddressBits;
+}
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c 
b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
index 4e8f897f5e9c..ec7cd4013132 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -330,13 +331,7 @@ SmmCpuFeaturesInstallSmiHandler (
   if (Hob != NULL) {
 Psd->PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
   } else {
-AsmCpuid (0x8000, &RegEax, NULL, NULL, NULL);
-if (RegEax >= 0x8008) {
-  AsmCpuid (0x8008, &RegEax, NULL, NULL, NULL);
-  Psd->PhysicalAddressBits = (UINT8)RegEax;
-} else {
-  Psd->PhysicalAddressBits = 36;
-}
+Psd->PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
   }
 
   if (!mStmConfigurationTableInitialized) {
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 538394f23910..de1385a86948 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -194,7 +194,6 @@ CalculateMaximumSupportAddress (
   VOID
   )
 {
-  UINT32  RegEax;
   UINT8   PhysicalAddressBits;
   VOID*Hob;
 
@@ -205,13 +204,7 @@ CalculateMaximumSupportAddress (
   if (Hob != NULL) {
 PhysicalAddress

[edk2-devel] [PATCH v1 1/1] UefiCpuPackage: Add APIs for CPU physical address mask calculation

2022-01-12 Thread Yu Pu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394

Firmware contains lots of code that deals with page table.These
code need the information of cpu physical address mask which
can be calculated from CPUID result.Today all these code implements
directly calls CPUID and calculates the address mask.
This bugzilla requests to add a new API as below so that all the
duplicated code can be removed.

Cc: Eric Dong 
Cc: Ray Ni 

Signed-off-by: Yu Pu 
Reviewed-by: Rahul Kumar 
---
 IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c| 
10 +
 MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c|  
9 +---
 MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c | 
14 +-
 MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c| 
14 +-
 OvmfPkg/XenPlatformPei/MemDetect.c  | 
11 +
 StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInternal.c  |  
9 +---
 UefiCpuPkg/CpuDxe/CpuDxe.c  | 
16 +--
 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c  | 
47 
 UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c   |  
9 +---
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c |  
9 +---
 UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c   |  
9 +---
 UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c  | 
10 +
 UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c |  
9 +---
 EmulatorPkg/EmulatorPkg.dsc |  
1 +
 IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf  |  
1 +
 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf |  
2 +
 MdeModulePkg/MdeModulePkg.dsc   |  
1 +
 MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf |  
1 +
 StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf   |  
2 +
 StandaloneMmPkg/StandaloneMmPkg.dsc |  
1 +
 UefiCpuPkg/Include/Library/UefiCpuLib.h | 
17 +++
 21 files changed, 95 insertions(+), 107 deletions(-)

diff --git a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c 
b/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c
index f879c268e7ec..3f8ed122b2be 100644
--- a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c
+++ b/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "CacheLibInternal.h"
 
 /**
@@ -388,15 +389,8 @@ SetCacheAttributes (
   UINT32 UsedMsrNum;
   EFI_MEMORY_CACHE_TYPE  UsedMemoryCacheType;
   UINT64 ValidMtrrAddressMask;
-  UINT32 Cpuid_RegEax;
 
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &Cpuid_RegEax, NULL, NULL, NULL);
-  if (Cpuid_RegEax >= CPUID_VIR_PHY_ADDRESS_SIZE) {
-AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &Cpuid_RegEax, NULL, NULL, NULL);
-ValidMtrrAddressMask = (LShiftU64 ((UINT64)1, (Cpuid_RegEax & 0xFF)) - 1) 
& (~(UINT64)0x0FFF);
-  } else {
-ValidMtrrAddressMask = (LShiftU64 ((UINT64)1, 36) - 1) & (~(UINT64)0x0FFF);
-  }
+  GetPhysicalAddressBits(NULL, &ValidMtrrAddressMask);
 
   //
   // Check for invalid parameter
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c 
b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index 0700f310b203..78e91e6e9024 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -22,6 +22,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
+#include 
 #include 
 #include "DxeIpl.h"
 #include "VirtualMemory.h"
@@ -733,13 +734,7 @@ CreateIdentityMappingPageTables (
   if (Hob != NULL) {
 PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
   } else {
-AsmCpuid (0x8000, &RegEax, NULL, NULL, NULL);
-if (RegEax >= 0x8008) {
-  AsmCpuid (0x8008, &RegEax, NULL, NULL, NULL);
-  PhysicalAddressBits = (UINT8)RegEax;
-} else {
-  PhysicalAddressBits = 36;
-}
+PhysicalAddressBits = GetPhysicalAddressBits(NULL, NULL);
   }
 
   Page5LevelSupport = FALSE;
diff --git 
a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c 
b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
index 6b44f50bac70..367bf8cdd1e6 100644
--- a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
+++ b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
@@ -10,6 +10,7 @@ Copyright (c) 2017, AMD Incorporated. All rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
+#include 
 #include "ScriptExecute.h"
 
 //
@@ -51,20 +52,9 @@ HookPageFaultHandler (
   IN IA32_IDT_GATE_DESCRIPTOR  *IdtEntry
   )
 {
-  UINT32  RegEax;
-  UINT8