Re: [edk2-devel] [PATCH v2 0/4] RISC-V: Add support for Sstc extension
On Mon, Jan 08, 2024 at 05:06:46PM +0530, Sunil V L wrote: > This series adds the support for RISC-V Sstc extension in EDK2 timer > implementation. Sstc extension allows S-mode software to program the > timer directly without using SBI calls. > > Currently, PCD variable is used to detect whether feature is enabled. By > default the feature is enabled and platforms need to set the PCD to > disable the feature if Sstc is not supported. > > For RiscVVirtQemu, it is disabled by default (until extension discovery > feature is enabled). > > Changes since v1: > 1) Updated "PATCH 3" to address Laszlo's comments. > 2) Updated RB tag for PATCH 4. > > Cc: Andrei Warkentin > Cc: Ard Biesheuvel > Cc: Gerd Hoffmann > Cc: Jiewen Yao > Cc: Laszlo Ersek > Cc: Rahul Kumar > Cc: Ray Ni > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Thank you very much for reviews!. Merged as #5232. Thanks, Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113616): https://edk2.groups.io/g/devel/message/113616 Mute This Topic: https://groups.io/mt/103595207/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 0/4] RISC-V: Add support for Sstc extension
This series adds the support for RISC-V Sstc extension in EDK2 timer implementation. Sstc extension allows S-mode software to program the timer directly without using SBI calls. Currently, PCD variable is used to detect whether feature is enabled. By default the feature is enabled and platforms need to set the PCD to disable the feature if Sstc is not supported. For RiscVVirtQemu, it is disabled by default (until extension discovery feature is enabled). Changes since v1: 1) Updated "PATCH 3" to address Laszlo's comments. 2) Updated RB tag for PATCH 4. Cc: Andrei Warkentin Cc: Ard Biesheuvel Cc: Gerd Hoffmann Cc: Jiewen Yao Cc: Laszlo Ersek Cc: Rahul Kumar Cc: Ray Ni Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Sunil V L (4): MdePkg.dec: RISC-V: Define override bit for Sstc extension MdePkg/BaseLib: RISC-V: Add function to update stimecmp register UefiCpuPkg/CpuTimerDxeRiscV64: Add support for Sstc OvmfPkg/RiscVVirt: Override Sstc extension MdePkg/MdePkg.dec | 2 + OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc | 2 +- .../CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf | 1 + MdePkg/Include/Library/BaseLib.h | 5 ++ .../Include/Register/RiscV64/RiscVEncoding.h | 3 ++ UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h | 2 + UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 49 +-- MdePkg/Library/BaseLib/RiscV64/ReadTimer.S| 7 +++ 8 files changed, 67 insertions(+), 4 deletions(-) -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113381): https://edk2.groups.io/g/devel/message/113381 Mute This Topic: https://groups.io/mt/103595207/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
