[edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib

2020-06-02 Thread Daniel Schaefer
Library provides interfaces to invoke SBI ecalls.

Signed-off-by: Daniel Schaefer 

Cc: Leif Lindholm 
Cc: Gilbert Chen 
Cc: Abner Chang 
Cc: Michael D. Kinney 
---
 Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf |  28 +
 Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h   | 563 

 Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c   | 897 

 3 files changed, 1488 insertions(+)

diff --git 
a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf 
b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
new file mode 100644
index ..665dcbf40e01
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
@@ -0,0 +1,28 @@
+## @file

+# RISC-V Library to call SBI ecalls

+#

+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x0001001b

+  BASE_NAME  = RiscVEdk2SbiLib

+  FILE_GUID  = 0DF1BBBD-F7E5-4E8A-BCF1-9D63D2DD9FDD

+  MODULE_TYPE= BASE

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = RiscVEdk2SbiLib

+

+[Sources]

+  RiscVEdk2SbiLib.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+  Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec

+  Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec

+

+[LibraryClasses]

+  BaseLib

+  RiscVOpensbiLib

diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h 
b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
new file mode 100644
index ..c1ae3176147f
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
@@ -0,0 +1,563 @@
+/** @file

+  Library to call the RISC-V SBI ecalls

+

+  Copyright (c) 2020, Hewlett Packard Development LP. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+  @par Glossary:

+- Hart - Hardware Thread, similar to a CPU core

+**/

+

+#ifndef RISCV_SBI_LIB_H_

+#define RISCV_SBI_LIB_H_

+

+#include 

+#include 

+#include 

+#include 

+

+//

+// EDK2 OpenSBI Firmware extension.

+//

+#define SBI_EDK2_FW_EXT (SBI_EXT_FIRMWARE_CODE_BASE_START | SBI_OPENSBI_IMPID)

+//

+// EDK2 OpenSBI Firmware extension functions.

+//

+#define SBI_EXT_FW_MSCRATCH_FUNC0

+#define SBI_EXT_FW_MSCRATCH_HARTID_FUNC 1

+

+//

+// EDK2 OpenSBI firmware extension return status.

+//

+typedef struct {

+  UINTN Error;   ///< SBI status code

+  UINTN Value;   ///< Value returned

+} SbiRet;

+

+/**

+  Get the implemented SBI specification version

+

+  The minor number of the SBI specification is encoded in the low 24 bits,

+  with the major number encoded in the next 7 bits.  Bit 32 must be 0 and is

+  reserved for future expansion.

+

+  @param[out] SpecVersion  The Version of the SBI specification.

+**/

+VOID

+EFIAPI

+SbiGetSpecVersion (

+  OUT UINTN   *SpecVersion

+  );

+

+/**

+  Get the SBI implementation ID

+

+  This ID is used to idenetify a specific SBI implementation in order to work

+  around any quirks it might have.

+

+  @param[out] ImplId   The ID of the SBI implementation.

+**/

+VOID

+EFIAPI

+SbiGetImplId (

+  OUT UINTN  *ImplId

+  );

+

+/**

+  Get the SBI implementation version

+

+  The version of this SBI implementation.

+  The encoding of this number is determined by the specific SBI implementation.

+

+  @param[out] ImplVersion  The version of the SBI implementation.

+**/

+VOID

+EFIAPI

+SbiGetImplVersion (

+  OUT UINTN   *ImplVersion

+  );

+

+/**

+  Probe whether an SBI extension is available

+

+  ProbeResult is set to 0 if the extension is not available or to an extension

+  specified value if it is available.

+

+  @param[in]  ExtensionId  The extension ID.

+  @param[out] ProbeResult  The return value of the probe.

+**/

+VOID

+EFIAPI

+SbiProbeExtension (

+  IN  INTN ExtensionId,

+  OUT INTN*ProbeResult

+  );

+

+/**

+  Get the CPU's vendor ID

+

+  Reads the mvendorid CSR.

+

+  @param[out] MachineVendorId  The CPU's vendor ID.

+**/

+VOID

+EFIAPI

+SbiGetMachineVendorId (

+  OUT UINTN   *MachineVendorId

+  );

+

+/**

+  Get the CPU's architecture ID

+

+  Reads the marchid CSR.

+

+  @param[out] MachineArchIdThe CPU's architecture ID.

+**/

+VOID

+EFIAPI

+SbiGetMachineArchId (

+  OUT UINTN   *MachineArchId

+  );

+

+/**

+  Get the CPU's implementation ID

+

+  Reads the mimpid CSR.

+

+  @param[out] MachineImplIdThe CPU's implementation ID.

+**/

+VOID

+EFIAPI

+SbiGetMachineImplId (

+  OUT UINTN   *MachineImplId

+  );

+

+/**

+  Politely ask the SBI to start a given hart.

+

+  This call may return before the hart has

Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib

2020-06-02 Thread Michael D Kinney
Hi Daniel,

I see some inconsistence in the names used in these patches.

For example, there should not be a need to use "Edk2" in the
name of a library.  This library is in an edk2 repo.

I see "RiscV" and "Risk-V" used in file paths.  I recommend
you pick one and use it consistently.  In the MdePkg, I see
RiscV64, and macros using RISCV, RISCV32, RISCV64, and RISCV128.
which seems consistent and does not use a '-'.  Perhaps use 
"RiscV" for content that works for 32, 64, and 128 bit and
RiscV32, RiscV64, and RiskV128 for content is specific to the
bit width?

Thanks,

Mike

> -Original Message-
> From: devel@edk2.groups.io  On
> Behalf Of Daniel Schaefer
> Sent: Tuesday, June 2, 2020 9:52 AM
> To: devel@edk2.groups.io
> Cc: Leif Lindholm ; Gilbert Chen
> ; Abner Chang
> ; Kinney, Michael D
> 
> Subject: [edk2-devel] [PATCH v4 1/1]
> ProcessorPkg/Library: Add RiscVEdk2SbiLib
> 
> Library provides interfaces to invoke SBI ecalls.
> 
> Signed-off-by: Daniel Schaefer 
> 
> Cc: Leif Lindholm 
> Cc: Gilbert Chen 
> Cc: Abner Chang 
> Cc: Michael D. Kinney 
> ---
>  Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> nf |  28 +
>  Silicon/RISC-
> V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> | 563 
>  Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
> | 897 
>  3 files changed, 1488 insertions(+)
> 
> diff --git a/Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> nf b/Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> nf
> new file mode 100644
> index ..665dcbf40e01
> --- /dev/null
> +++ b/Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> nf
> @@ -0,0 +1,28 @@
> +## @file
> 
> 
> +# RISC-V Library to call SBI ecalls
> 
> 
> +#
> 
> 
> +#  Copyright (c) 2020, Hewlett Packard Enterprise
> Development LP. All rights reserved.
> 
> 
> +#
> 
> 
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
> +#
> 
> 
> +##
> 
> 
> +
> 
> 
> +[Defines]
> 
> 
> +  INF_VERSION= 0x0001001b
> 
> 
> +  BASE_NAME  = RiscVEdk2SbiLib
> 
> 
> +  FILE_GUID  = 0DF1BBBD-F7E5-4E8A-BCF1-9D63D2DD9FDD
> 
> 
> +  MODULE_TYPE= BASE
> 
> 
> +  VERSION_STRING = 1.0
> 
> 
> +  LIBRARY_CLASS  = RiscVEdk2SbiLib
> 
> 
> +
> 
> 
> +[Sources]
> 
> 
> +  RiscVEdk2SbiLib.c
> 
> 
> +
> 
> 
> +[Packages]
> 
> 
> +  MdePkg/MdePkg.dec
> 
> 
> +  Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
> 
> 
> +  Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
> 
> 
> +
> 
> 
> +[LibraryClasses]
> 
> 
> +  BaseLib
> 
> 
> +  RiscVOpensbiLib
> 
> 
> diff --git a/Silicon/RISC-
> V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> b/Silicon/RISC-
> V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> new file mode 100644
> index ..c1ae3176147f
> --- /dev/null
> +++ b/Silicon/RISC-
> V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> @@ -0,0 +1,563 @@
> +/** @file
> 
> 
> +  Library to call the RISC-V SBI ecalls
> 
> 
> +
> 
> 
> +  Copyright (c) 2020, Hewlett Packard Development LP.
> All rights reserved.
> 
> 
> +
> 
> 
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
> +
> 
> 
> +  @par Glossary:
> 
> 
> +- Hart - Hardware Thread, similar to a CPU core
> 
> 
> +**/
> 
> 
> +
> 
> 
> +#ifndef RISCV_SBI_LIB_H_
> 
> 
> +#define RISCV_SBI_LIB_H_
> 
> 
> +
> 
> 
> +#include 
> 
> 
> +#include 
> 
> 
> +#include 
> 
> 
> +#include 
> 
> 
> +
> 
> 
> +//
> 
> 
> +// EDK2 OpenSBI Firmware extension.
> 
> 
> +//
> 
> 
> +#define SBI_EDK2_FW_EXT
> (SBI_EXT_FIRMWARE_CODE_BASE_START | SBI_OPENSBI_IMPID)
> 
> 
> +//
> 
> 
> +// EDK2 OpenSBI Firmware extension functions.
> 
> 
> +//
> 
> 
> +#define SBI_EXT_FW_MSCRATCH_FUNC0
> 
> 
> +#define SBI_EXT_FW_MSCRATCH_HARTID_FUNC 1
> 
> 
> +
> 
> 
> +//
> 
> 
> +// EDK2 OpenSBI firmware extension return status.
> 
> 
> +//
> 
> 
> +typedef struct {
> 
> 
> +  UINTN Error;   ///< SBI status code
> 
> 
> +  UINTN Value;   ///< Value returned
> 
> 
> +} SbiRet;
> 
> 
> +
> 
> 
> +/**
> 
> 
> +  Get the implemented SBI specification version
> 
> 
> +
> 
> 
> +  The minor n

Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib

2020-06-02 Thread Abner Chang


> -Original Message-
> From: Kinney, Michael D [mailto:michael.d.kin...@intel.com]
> Sent: Wednesday, June 3, 2020 6:00 AM
> To: devel@edk2.groups.io; Schaefer, Daniel (DualStudy)
> ; Kinney, Michael D
> 
> Cc: Leif Lindholm ; Chen, Gilbert
> ; Chang, Abner (HPS SW/FW Technologist)
> 
> Subject: RE: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add
> RiscVEdk2SbiLib
> 
> Hi Daniel,
> 
> I see some inconsistence in the names used in these patches.
> 
> For example, there should not be a need to use "Edk2" in the
> name of a library.  This library is in an edk2 repo.
We currently have two libraries regards to RISC-V SBI spec. One is the wrapper 
to build OpenSBI lib, which is RiscVOpenSbiLib.
Another one is SBI firmware code base extension in which the ABIs are provided 
by system firmware other than the standard ABIs defined in SBI spec. To name it 
with EDK2 makes sense because that is RISC-V EDK2 firmware code base SBI 
extension.
> 
> I see "RiscV" and "Risk-V" used in file paths.  I recommend
> you pick one and use it consistently.  In the MdePkg, I see
> RiscV64, and macros using RISCV, RISCV32, RISCV64, and RISCV128.
> which seems consistent and does not use a '-'.  Perhaps use
> "RiscV" for content that works for 32, 64, and 128 bit and
> RiscV32, RiscV64, and RiskV128 for content is specific to the
> bit width?
For the folders under Silicon and platform, I prefer to use "RISC-V" which is 
the official name of this processor. All other files can use RiscV which 
conform the naming rule. RISCV32, RISCV64, and RISCV128 are used for the 
architectures.

>  
> Thanks,
> 
> Mike
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On
> > Behalf Of Daniel Schaefer
> > Sent: Tuesday, June 2, 2020 9:52 AM
> > To: devel@edk2.groups.io
> > Cc: Leif Lindholm ; Gilbert Chen
> > ; Abner Chang
> > ; Kinney, Michael D
> > 
> > Subject: [edk2-devel] [PATCH v4 1/1]
> > ProcessorPkg/Library: Add RiscVEdk2SbiLib
> >
> > Library provides interfaces to invoke SBI ecalls.
> >
> > Signed-off-by: Daniel Schaefer 
> >
> > Cc: Leif Lindholm 
> > Cc: Gilbert Chen 
> > Cc: Abner Chang 
> > Cc: Michael D. Kinney 
> > ---
> >  Silicon/RISC-
> > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > nf |  28 +
> >  Silicon/RISC-
> > V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> > | 563 
> >  Silicon/RISC-
> > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
> > | 897 
> >  3 files changed, 1488 insertions(+)
> >
> > diff --git a/Silicon/RISC-
> > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > nf b/Silicon/RISC-
> > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > nf
> > new file mode 100644
> > index ..665dcbf40e01
> > --- /dev/null
> > +++ b/Silicon/RISC-
> > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > nf
> > @@ -0,0 +1,28 @@
> > +## @file
> >
> >
> > +# RISC-V Library to call SBI ecalls
> >
> >
> > +#
> >
> >
> > +#  Copyright (c) 2020, Hewlett Packard Enterprise
> > Development LP. All rights reserved.
> >
> >
> > +#
> >
> >
> > +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >
> > +#
> >
> >
> > +##
> >
> >
> > +
> >
> >
> > +[Defines]
> >
> >
> > +  INF_VERSION= 0x0001001b
> >
> >
> > +  BASE_NAME  = RiscVEdk2SbiLib
> >
> >
> > +  FILE_GUID  = 0DF1BBBD-F7E5-4E8A-BCF1-9D63D2DD9FDD
> >
> >
> > +  MODULE_TYPE= BASE
> >
> >
> > +  VERSION_STRING = 1.0
> >
> >
> > +  LIBRARY_CLASS  = RiscVEdk2SbiLib
> >
> >
> > +
> >
> >
> > +[Sources]
> >
> >
> > +  RiscVEdk2SbiLib.c
> >
> >
> > +
> >
> >
> > +[Packages]
> >
> >
> > +  MdePkg/MdePkg.dec
> >
> >
> > +  Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
> >
> >
> > +  Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
> >
> >
> > +
> >
> >
> > +[LibraryClasses]
> >
> >
> > +  BaseLib
> >
> >
> > +  RiscVOpensbiLib
> >
> >
> > diff --git a/Silicon/RISC-
> > V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> > b/Silicon/RISC-
> > V/ProcessorPkg/Include/Library/RiscV

Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib

2020-06-02 Thread Abner Chang


> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Abner Chang
> Sent: Wednesday, June 3, 2020 9:25 AM
> To: Kinney, Michael D ; devel@edk2.groups.io;
> Schaefer, Daniel (DualStudy) 
> Cc: Leif Lindholm ; Chen, Gilbert
> 
> Subject: Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add
> RiscVEdk2SbiLib
> 
> 
> 
> > -Original Message-
> > From: Kinney, Michael D [mailto:michael.d.kin...@intel.com]
> > Sent: Wednesday, June 3, 2020 6:00 AM
> > To: devel@edk2.groups.io; Schaefer, Daniel (DualStudy)
> > ; Kinney, Michael D
> > 
> > Cc: Leif Lindholm ; Chen, Gilbert
> > ; Chang, Abner (HPS SW/FW Technologist)
> > 
> > Subject: RE: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add
> > RiscVEdk2SbiLib
> >
> > Hi Daniel,
> >
> > I see some inconsistence in the names used in these patches.
> >
> > For example, there should not be a need to use "Edk2" in the
> > name of a library.  This library is in an edk2 repo.
> We currently have two libraries regards to RISC-V SBI spec. One is the
> wrapper to build OpenSBI lib, which is RiscVOpenSbiLib.
> Another one is SBI firmware code base extension in which the ABIs are
> provided by system firmware other than the standard ABIs defined in SBI
> spec. To name it with EDK2 makes sense because that is RISC-V EDK2
> firmware code base SBI extension.
More information is in below,
https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
- Firmware Code Base Specific SBI Extension Space, Extension Ids 0x0A00 
through 0x0AFF
> >
> > I see "RiscV" and "Risk-V" used in file paths.  I recommend
> > you pick one and use it consistently.  In the MdePkg, I see
> > RiscV64, and macros using RISCV, RISCV32, RISCV64, and RISCV128.
> > which seems consistent and does not use a '-'.  Perhaps use
> > "RiscV" for content that works for 32, 64, and 128 bit and
> > RiscV32, RiscV64, and RiskV128 for content is specific to the
> > bit width?
> For the folders under Silicon and platform, I prefer to use "RISC-V" which is
> the official name of this processor. All other files can use RiscV which
> conform the naming rule. RISCV32, RISCV64, and RISCV128 are used for the
> architectures.
> 
> >
> > Thanks,
> >
> > Mike
> >
> > > -----Original Message-----
> > > From: devel@edk2.groups.io  On
> > > Behalf Of Daniel Schaefer
> > > Sent: Tuesday, June 2, 2020 9:52 AM
> > > To: devel@edk2.groups.io
> > > Cc: Leif Lindholm ; Gilbert Chen
> > > ; Abner Chang
> > > ; Kinney, Michael D
> > > 
> > > Subject: [edk2-devel] [PATCH v4 1/1]
> > > ProcessorPkg/Library: Add RiscVEdk2SbiLib
> > >
> > > Library provides interfaces to invoke SBI ecalls.
> > >
> > > Signed-off-by: Daniel Schaefer 
> > >
> > > Cc: Leif Lindholm 
> > > Cc: Gilbert Chen 
> > > Cc: Abner Chang 
> > > Cc: Michael D. Kinney 
> > > ---
> > >  Silicon/RISC-
> > > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > > nf |  28 +
> > >  Silicon/RISC-
> > > V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> > > | 563 
> > >  Silicon/RISC-
> > > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
> > > | 897 
> > >  3 files changed, 1488 insertions(+)
> > >
> > > diff --git a/Silicon/RISC-
> > > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > > nf b/Silicon/RISC-
> > > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > > nf
> > > new file mode 100644
> > > index ..665dcbf40e01
> > > --- /dev/null
> > > +++ b/Silicon/RISC-
> > > V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.i
> > > nf
> > > @@ -0,0 +1,28 @@
> > > +## @file
> > >
> > >
> > > +# RISC-V Library to call SBI ecalls
> > >
> > >
> > > +#
> > >
> > >
> > > +#  Copyright (c) 2020, Hewlett Packard Enterprise
> > > Development LP. All rights reserved.
> > >
> > >
> > > +#
> > >
> > >
> > > +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> > >
> > >
> > > +#
> > >
> > >
> > > +##
> > >
> > >
> > > +
> > >
> > >
> > > +[Defines]
> > >
> >

Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib

2020-06-18 Thread Leif Lindholm
On Tue, Jun 02, 2020 at 18:51:52 +0200, Daniel Schaefer wrote:
> Library provides interfaces to invoke SBI ecalls.
> 
> Signed-off-by: Daniel Schaefer 

All of my feedback on previous revision addressed - where to actually
*merge* it remains undecided, but for the contents:
Reviewed-by: Leif Lindholm 

Thanks!

> Cc: Leif Lindholm 
> Cc: Gilbert Chen 
> Cc: Abner Chang 
> Cc: Michael D. Kinney 
> ---
>  Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf |  
> 28 +
>  Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h   | 
> 563 
>  Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c   | 
> 897 
>  3 files changed, 1488 insertions(+)
> 
> diff --git 
> a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf 
> b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
> new file mode 100644
> index ..665dcbf40e01
> --- /dev/null
> +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
> @@ -0,0 +1,28 @@
> +## @file
> +# RISC-V Library to call SBI ecalls
> +#
> +#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
> reserved.
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION= 0x0001001b
> +  BASE_NAME  = RiscVEdk2SbiLib
> +  FILE_GUID  = 0DF1BBBD-F7E5-4E8A-BCF1-9D63D2DD9FDD
> +  MODULE_TYPE= BASE
> +  VERSION_STRING = 1.0
> +  LIBRARY_CLASS  = RiscVEdk2SbiLib
> +
> +[Sources]
> +  RiscVEdk2SbiLib.c
> +
> +[Packages]
> +  MdePkg/MdePkg.dec
> +  Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
> +  Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  RiscVOpensbiLib
> diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h 
> b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> new file mode 100644
> index ..c1ae3176147f
> --- /dev/null
> +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> @@ -0,0 +1,563 @@
> +/** @file
> +  Library to call the RISC-V SBI ecalls
> +
> +  Copyright (c) 2020, Hewlett Packard Development LP. All rights 
> reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +  @par Glossary:
> +- Hart - Hardware Thread, similar to a CPU core
> +**/
> +
> +#ifndef RISCV_SBI_LIB_H_
> +#define RISCV_SBI_LIB_H_
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +//
> +// EDK2 OpenSBI Firmware extension.
> +//
> +#define SBI_EDK2_FW_EXT (SBI_EXT_FIRMWARE_CODE_BASE_START | 
> SBI_OPENSBI_IMPID)
> +//
> +// EDK2 OpenSBI Firmware extension functions.
> +//
> +#define SBI_EXT_FW_MSCRATCH_FUNC0
> +#define SBI_EXT_FW_MSCRATCH_HARTID_FUNC 1
> +
> +//
> +// EDK2 OpenSBI firmware extension return status.
> +//
> +typedef struct {
> +  UINTN Error;   ///< SBI status code
> +  UINTN Value;   ///< Value returned
> +} SbiRet;
> +
> +/**
> +  Get the implemented SBI specification version
> +
> +  The minor number of the SBI specification is encoded in the low 24 bits,
> +  with the major number encoded in the next 7 bits.  Bit 32 must be 0 and is
> +  reserved for future expansion.
> +
> +  @param[out] SpecVersion  The Version of the SBI specification.
> +**/
> +VOID
> +EFIAPI
> +SbiGetSpecVersion (
> +  OUT UINTN   *SpecVersion
> +  );
> +
> +/**
> +  Get the SBI implementation ID
> +
> +  This ID is used to idenetify a specific SBI implementation in order to work
> +  around any quirks it might have.
> +
> +  @param[out] ImplId   The ID of the SBI implementation.
> +**/
> +VOID
> +EFIAPI
> +SbiGetImplId (
> +  OUT UINTN  *ImplId
> +  );
> +
> +/**
> +  Get the SBI implementation version
> +
> +  The version of this SBI implementation.
> +  The encoding of this number is determined by the specific SBI 
> implementation.
> +
> +  @param[out] ImplVersion  The version of the SBI implementation.
> +**/
> +VOID
> +EFIAPI
> +SbiGetImplVersion (
> +  OUT UINTN   *ImplVersion
> +  );
> +
> +/**
> +  Probe whether an SBI extension is available
> +
> +  ProbeResult is set to 0 if the extension is not available or to an 
> extension
> +  specified value if it is available.
> +
> +  @param[in]  ExtensionId  The extension ID.
> +  @param[out] ProbeResult  The return value of the probe.
> +**/
> +VOID
> +EFIAPI
> +SbiProbeExtension (
> +  IN  INTN ExtensionId,
> +  OUT INTN*ProbeResult
> +  );
> +
> +/**
> +  Get the CPU's vendor ID
> +
> +  Reads the mvendorid CSR.
> +
> +  @param[out] MachineVendorId  The CPU's vendor ID.
> +**/
> +VOID
> +EFIAPI
> +SbiGetMachineVendorId (
> +  OUT UINTN   *MachineVendorId
> +  );
> +
> +/**
> +  Get the CPU's architecture ID
> +
> +  Reads the marchid CSR.
> +
> +  @param[out] MachineArchIdThe CPU's architecture ID.
> +**/
> +V

Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add RiscVEdk2SbiLib

2020-06-22 Thread Abner Chang
Thanks for spent time on reviewing this. Yes, we can have further discussions 
on where to merge RISC-V code. For now, we will merge those code to 
edk2-platforms master branch as the temporary home for RISC-V.

Another matter regards to the inconsistent naming of "RISC-V", "RiscV" and etc. 
brought up by Mike, any one else has the same concerns as  Mike of using 
"RISC-V" as folder name, however "RiscV" as the leading in file name?
I still don't think it does matter though, but I would like to see more 
opinions on this.

Thanks
Abner

> -Original Message-
> From: Leif Lindholm [mailto:l...@nuviainc.com]
> Sent: Friday, June 19, 2020 12:50 AM
> To: devel@edk2.groups.io; Schaefer, Daniel (DualStudy)
> 
> Cc: Chen, Gilbert ; Chang, Abner (HPS SW/FW
> Technologist) ; Michael D . Kinney
> 
> Subject: Re: [edk2-devel] [PATCH v4 1/1] ProcessorPkg/Library: Add
> RiscVEdk2SbiLib
> 
> On Tue, Jun 02, 2020 at 18:51:52 +0200, Daniel Schaefer wrote:
> > Library provides interfaces to invoke SBI ecalls.
> >
> > Signed-off-by: Daniel Schaefer 
> 
> All of my feedback on previous revision addressed - where to actually
> *merge* it remains undecided, but for the contents:
> Reviewed-by: Leif Lindholm 
> 
> Thanks!
> 
> > Cc: Leif Lindholm 
> > Cc: Gilbert Chen 
> > Cc: Abner Chang 
> > Cc: Michael D. Kinney 
> > ---
> >  Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf |
> 28 +
> >  Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h   | 
> > 563
> 
> >  Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c   |
> 897 
> >  3 files changed, 1488 insertions(+)
> >
> > diff --git a/Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf b/Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
> > new file mode 100644
> > index ..665dcbf40e01
> > --- /dev/null
> > +++ b/Silicon/RISC-
> V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
> > @@ -0,0 +1,28 @@
> > +## @file
> > +# RISC-V Library to call SBI ecalls
> > +#
> > +#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All
> rights reserved.
> > +#
> > +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +[Defines]
> > +  INF_VERSION= 0x0001001b
> > +  BASE_NAME  = RiscVEdk2SbiLib
> > +  FILE_GUID  = 0DF1BBBD-F7E5-4E8A-BCF1-9D63D2DD9FDD
> > +  MODULE_TYPE= BASE
> > +  VERSION_STRING = 1.0
> > +  LIBRARY_CLASS  = RiscVEdk2SbiLib
> > +
> > +[Sources]
> > +  RiscVEdk2SbiLib.c
> > +
> > +[Packages]
> > +  MdePkg/MdePkg.dec
> > +  Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
> > +  Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
> > +
> > +[LibraryClasses]
> > +  BaseLib
> > +  RiscVOpensbiLib
> > diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> > new file mode 100644
> > index ..c1ae3176147f
> > --- /dev/null
> > +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> > @@ -0,0 +1,563 @@
> > +/** @file
> > +  Library to call the RISC-V SBI ecalls
> > +
> > +  Copyright (c) 2020, Hewlett Packard Development LP. All rights
> reserved.
> > +
> > +  SPDX-License-Identifier: BSD-2-Clause-Patent
> > +
> > +  @par Glossary:
> > +- Hart - Hardware Thread, similar to a CPU core
> > +**/
> > +
> > +#ifndef RISCV_SBI_LIB_H_
> > +#define RISCV_SBI_LIB_H_
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +//
> > +// EDK2 OpenSBI Firmware extension.
> > +//
> > +#define SBI_EDK2_FW_EXT (SBI_EXT_FIRMWARE_CODE_BASE_START |
> SBI_OPENSBI_IMPID)
> > +//
> > +// EDK2 OpenSBI Firmware extension functions.
> > +//
> > +#define SBI_EXT_FW_MSCRATCH_FUNC0
> > +#define SBI_EXT_FW_MSCRATCH_HARTID_FUNC 1
> > +
> > +//
> > +// EDK2 OpenSBI firmware extension return status.
> > +//
> > +typedef struct {
> > +  UINTN Error;   ///< SBI status code
> > +  UINTN Value;   ///< Value returned
> > +} SbiRet;
> > +
> > +/**
> > +  Get the implemented SBI specification version
> > +
> > +  The minor number of the SBI specification is encoded in the low 24 bits,
> > +  with the major number encoded in the next 7 bits.  Bit 32 must be 0 a