[edk2-devel] [PATCH v5 2/2] Platform/SbsaQemu: read GIC base from TF-A

2023-05-11 Thread Marcin Juszkiewicz
Qemu has versioning for sbsa-ref platform. TF-A reads data from provided
DeviceTree and provides as SMC.

This change adds reading GIC base addresses into EDK2.

Signed-off-by: Marcin Juszkiewicz 
---
 .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 24 +++
 .../SbsaQemuPlatformDxe.inf   |  4 
 2 files changed, 28 insertions(+)

diff --git 
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c 
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index 199766c7014a..82c349971625 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -25,6 +25,8 @@
 #define SIP_FUNCTION_ID(n) (SIP_FUNCTION   | (n))
 
 #define SIP_SVC_VERSION  SIP_FUNCTION_ID(1)
+#define SIP_SVC_GET_GICD SIP_FUNCTION_ID(2)
+#define SIP_SVC_GET_GICR SIP_FUNCTION_ID(3)
 
 EFI_STATUS
 EFIAPI
@@ -78,5 +80,27 @@ InitializeSbsaQemuPlatformDxe (
 
   DEBUG ((DEBUG_INFO, "Platform version: %d.%d\n", Arg0, Arg1));
 
+  Result = ArmCallSmc0 (SIP_SVC_GET_GICD, &Arg0, NULL, NULL);
+  if (Result == SMC_ARCH_CALL_SUCCESS)
+  {
+Result = PcdSet32S (PcdGicDistributorBase, Arg0);
+ASSERT_EFI_ERROR (Result);
+  }
+
+  Arg0 = PcdGet32 (PcdGicDistributorBase);
+
+  DEBUG ((DEBUG_INFO, "GICD base: 0x%x\n", Arg0));
+
+  Result = ArmCallSmc0 (SIP_SVC_GET_GICR, &Arg0, NULL, NULL);
+  if (Result == SMC_ARCH_CALL_SUCCESS)
+  {
+Result = PcdSet32S (PcdGicRedistributorsBase, Arg0);
+ASSERT_EFI_ERROR (Result);
+  }
+
+  Arg0 = PcdGet32 (PcdGicRedistributorsBase);
+
+  DEBUG ((DEBUG_INFO, "GICR base: 0x%x\n", Arg0));
+
   return EFI_SUCCESS;
 }
diff --git 
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf 
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
index 1f2c8a9dd6af..545794a8c7ff 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
@@ -41,6 +41,10 @@
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor
 
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase
+
+
 [Depex]
   TRUE
 
-- 
2.40.1



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[edk2-devel] [PATCH v5 2/2] Platform/SbsaQemu: read GIC base from TF-A

2023-05-15 Thread Marcin Juszkiewicz
Qemu has versioning for sbsa-ref platform. TF-A reads data from provided
DeviceTree and provides as SMC.

This change adds reading GIC base addresses into EDK2.

Signed-off-by: Marcin Juszkiewicz 
---
 .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 30 +++
 .../SbsaQemuPlatformDxe.inf   |  4 +++
 2 files changed, 34 insertions(+)

diff --git 
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c 
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index 39f5639d0a28..889270c76344 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -25,6 +25,8 @@
 #define SIP_FUNCTION_ID(n) (SIP_FUNCTION   | (n))
 
 #define SIP_SVC_VERSION  SIP_FUNCTION_ID(1)
+#define SIP_SVC_GET_GICD SIP_FUNCTION_ID(2)
+#define SIP_SVC_GET_GICR SIP_FUNCTION_ID(3)
 
 EFI_STATUS
 EFIAPI
@@ -79,5 +81,33 @@ InitializeSbsaQemuPlatformDxe (
 
   DEBUG ((DEBUG_INFO, "Platform version: %d.%d\n", Arg0, Arg1));
 
+  /* If we are on platform version 0.0 then there is no more data for us in 
DeviceTree */
+  if ((Arg0 == 0) && (Arg1 == 0))
+  {
+return EFI_SUCCESS;
+  }
+
+  SmcResult = ArmCallSmc0 (SIP_SVC_GET_GICD, &Arg0, NULL, NULL);
+  if (SmcResult == SMC_ARCH_CALL_SUCCESS)
+  {
+Result = PcdSet64S (PcdGicDistributorBase, Arg0);
+ASSERT_RETURN_ERROR (Result);
+  }
+
+  Arg0 = PcdGet64 (PcdGicDistributorBase);
+
+  DEBUG ((DEBUG_INFO, "GICD base: 0x%x\n", Arg0));
+
+  SmcResult = ArmCallSmc0 (SIP_SVC_GET_GICR, &Arg0, NULL, NULL);
+  if (SmcResult == SMC_ARCH_CALL_SUCCESS)
+  {
+Result = PcdSet64S (PcdGicRedistributorsBase, Arg0);
+ASSERT_RETURN_ERROR (Result);
+  }
+
+  Arg0 = PcdGet64 (PcdGicRedistributorsBase);
+
+  DEBUG ((DEBUG_INFO, "GICR base: 0x%x\n", Arg0));
+
   return EFI_SUCCESS;
 }
diff --git 
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf 
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
index 1f2c8a9dd6af..545794a8c7ff 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
@@ -41,6 +41,10 @@
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor
 
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase
+
+
 [Depex]
   TRUE
 
-- 
2.40.1



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