RD-V1 platform supports only the platform co-ordinated LPI. So fix the
LPI Level ID value accordingly.
Additionally, as this platform does not support residency counter, clear
the residency counter frequency from _LPI object's control method.
Signed-off-by: Pranav Madhu <pranav.ma...@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
index db9c19780e16..3c9c878dd880 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
@@ -64,14 +64,14 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD",
"ARMSGI",
Name (PLPI, Package () { /* LPI for Processor, support 2 LPI states */
0, // Version
- 1, // Level Index
+ 0, // Level Index
2, // Count
Package () { // WFI for CPU
1, // Min residency (uS)
1, // Wake latency (uS)
1, // Flags
0, // Arch Context lost Flags (no loss)
- 100, // Residency Counter Frequency
+ 0, // Residency Counter Frequency
0, // No parent state
ResourceTemplate () { // Register Entry method
Register (FFixedHW,
@@ -94,8 +94,8 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD",
"ARMSGI",
350, // Wake latency (uS)
1, // Flags
1, // Arch Context lost Flags (Core context lost)
- 100, // Residency Counter Frequency
- 1, // Parent node can be in any shallower state
+ 0, // Residency Counter Frequency
+ 0, // No parent state
ResourceTemplate () { // Register Entry method
Register (FFixedHW,
32, // Bit Width
--
2.25.1
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