Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 05/29] MdePkg/Include: RISC-V definitions.
On Mon, Sep 23, 2019 at 08:31:30AM +0800, Abner Chang wrote:
> Add RISC-V processor related definitions.
>
> Signed-off-by: Abner Chang
Reviewed-by: Leif Lindholm
> ---
> MdePkg/Include/IndustryStandard/PeImage.h | 12 +++
> MdePkg/Include/Protocol/DebugSupport.h| 55
> +++
> MdePkg/Include/Protocol/PxeBaseCode.h | 4 +++
> MdePkg/Include/Uefi/UefiBaseType.h| 13
> MdePkg/Include/Uefi/UefiSpec.h| 5 +++
> 5 files changed, 89 insertions(+)
>
> diff --git a/MdePkg/Include/IndustryStandard/PeImage.h
> b/MdePkg/Include/IndustryStandard/PeImage.h
> index 720bb08..ca3fd0b 100644
> --- a/MdePkg/Include/IndustryStandard/PeImage.h
> +++ b/MdePkg/Include/IndustryStandard/PeImage.h
> @@ -9,6 +9,8 @@
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> +Portions Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development
> LP. All rights reserved.
> +
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -34,6 +36,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #define IMAGE_FILE_MACHINE_X64 0x8664
> #define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2
> #define IMAGE_FILE_MACHINE_ARM64 0xAA64
> +#define IMAGE_FILE_MACHINE_RISCV32 0x5032
> +#define IMAGE_FILE_MACHINE_RISCV64 0x5064
> +#define IMAGE_FILE_MACHINE_RISCV1280x5128
>
> //
> // EXE file formats
> @@ -494,6 +499,13 @@ typedef struct {
> #define EFI_IMAGE_REL_BASED_DIR64 10
>
> ///
> +/// Relocation types of RISC-V processor.
> +///
> +#define EFI_IMAGE_REL_BASED_RISCV_HI20 5
> +#define EFI_IMAGE_REL_BASED_RISCV_LOW12I7
> +#define EFI_IMAGE_REL_BASED_RISCV_LOW12S8
> +
> +///
> /// Line number format.
> ///
> typedef struct {
> diff --git a/MdePkg/Include/Protocol/DebugSupport.h
> b/MdePkg/Include/Protocol/DebugSupport.h
> index 800e771..1a29cc0 100644
> --- a/MdePkg/Include/Protocol/DebugSupport.h
> +++ b/MdePkg/Include/Protocol/DebugSupport.h
> @@ -7,6 +7,7 @@
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> +Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights
> reserved.
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -603,6 +604,59 @@ typedef struct {
>UINT64 FAR; // Fault Address Register
> } EFI_SYSTEM_CONTEXT_AARCH64;
>
> +///
> +/// RISC-V processor exception types.
> +///
> +#define EXCEPT_RISCV_INST_MISALIGNED 0
> +#define EXCEPT_RISCV_INST_ACCESS_FAULT1
> +#define EXCEPT_RISCV_ILLEGAL_INST 2
> +#define EXCEPT_RISCV_BREAKPOINT 3
> +#define EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED 4
> +#define EXCEPT_RISCV_LOAD_ACCESS_FAULT5
> +#define EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED 6
> +#define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7
> +#define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8
> +#define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9
> +#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10
> +#define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11
> +
> +#define EXCEPT_RISCV_SOFTWARE_INT 0x0
> +#define EXCEPT_RISCV_TIMER_INT 0x1
> +
> +typedef struct {
> + UINT64 X0;
> + UINT64 X1;
> + UINT64 X2;
> + UINT64 X3;
> + UINT64 X4;
> + UINT64 X5;
> + UINT64 X6;
> + UINT64 X7;
> + UINT64 X8;
> + UINT64 X9;
> + UINT64 X10;
> + UINT64 X11;
> + UINT64 X12;
> + UINT64 X13;
> + UINT64 X14;
> + UINT64 X15;
> + UINT64 X16;
> + UINT64 X17;
> + UINT64 X18;
> + UINT64 X19;
> + UINT64 X20;
> + UINT64 X21;
> + UINT64 X22;
> + UINT64 X23;
> + UINT64 X24;
> + UINT64 X25;
> + UINT64 X26;
> + UINT64 X27;
> + UINT64 X28;
> + UINT64 X29;
> + UINT64 X30;
> + UINT64 X31;
> +} EFI_SYSTEM_CONTEXT_RISCV64;
>
> ///
> /// Universal EFI_SYSTEM_CONTEXT definition.
> @@ -614,6 +668,7 @@ typedef union {
>EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
>EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
>EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
> + EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;
> } EFI_SYSTEM_CONTEXT;
>
> //
> diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h
> b/MdePkg/Include/Protocol/PxeBaseCode.h
> index b02d270..8a9e4a1 100644
> --- a/MdePkg/Include/Protocol/PxeBaseCode.h
> +++ b/MdePkg/Include/Protocol/PxeBaseCode.h
> @@ -3,6 +3,8 @@
>devices for network access and network booting.
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> +Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All
> rights reserved.
> +
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
>@par Revision Reference:
> @@ -153,6 +155,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT;
> #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE0x000A
> #elif defined
Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 05/29] MdePkg/Include: RISC-V definitions.
CC maintainers.
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Abner Chang
> Sent: Monday, September 23, 2019 8:32 AM
> To: devel@edk2.groups.io
> Cc: Chang, Abner (HPS SW/FW Technologist)
> Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 05/29]
> MdePkg/Include: RISC-V definitions.
>
> Add RISC-V processor related definitions.
>
> Signed-off-by: Abner Chang
> ---
> MdePkg/Include/IndustryStandard/PeImage.h | 12 +++
> MdePkg/Include/Protocol/DebugSupport.h| 55
> +++
> MdePkg/Include/Protocol/PxeBaseCode.h | 4 +++
> MdePkg/Include/Uefi/UefiBaseType.h| 13
> MdePkg/Include/Uefi/UefiSpec.h| 5 +++
> 5 files changed, 89 insertions(+)
>
> diff --git a/MdePkg/Include/IndustryStandard/PeImage.h
> b/MdePkg/Include/IndustryStandard/PeImage.h
> index 720bb08..ca3fd0b 100644
> --- a/MdePkg/Include/IndustryStandard/PeImage.h
> +++ b/MdePkg/Include/IndustryStandard/PeImage.h
> @@ -9,6 +9,8 @@
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> +Portions Copyright (c) 2016 - 2019, Hewlett Packard Enterprise
> +Development LP. All rights reserved.
> +
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -34,6 +36,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #define IMAGE_FILE_MACHINE_X64 0x8664
> #define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2
> #define IMAGE_FILE_MACHINE_ARM64 0xAA64
> +#define IMAGE_FILE_MACHINE_RISCV32 0x5032
> +#define IMAGE_FILE_MACHINE_RISCV64 0x5064
> +#define IMAGE_FILE_MACHINE_RISCV1280x5128
>
> //
> // EXE file formats
> @@ -494,6 +499,13 @@ typedef struct {
> #define EFI_IMAGE_REL_BASED_DIR64 10
>
> ///
> +/// Relocation types of RISC-V processor.
> +///
> +#define EFI_IMAGE_REL_BASED_RISCV_HI20 5
> +#define EFI_IMAGE_REL_BASED_RISCV_LOW12I7
> +#define EFI_IMAGE_REL_BASED_RISCV_LOW12S8
> +
> +///
> /// Line number format.
> ///
> typedef struct {
> diff --git a/MdePkg/Include/Protocol/DebugSupport.h
> b/MdePkg/Include/Protocol/DebugSupport.h
> index 800e771..1a29cc0 100644
> --- a/MdePkg/Include/Protocol/DebugSupport.h
> +++ b/MdePkg/Include/Protocol/DebugSupport.h
> @@ -7,6 +7,7 @@
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> +Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All
> +rights reserved.
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -603,6 +604,59 @@ typedef struct {
>UINT64 FAR; // Fault Address Register } EFI_SYSTEM_CONTEXT_AARCH64;
>
> +///
> +/// RISC-V processor exception types.
> +///
> +#define EXCEPT_RISCV_INST_MISALIGNED 0
> +#define EXCEPT_RISCV_INST_ACCESS_FAULT1
> +#define EXCEPT_RISCV_ILLEGAL_INST 2
> +#define EXCEPT_RISCV_BREAKPOINT 3
> +#define EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED 4
> +#define EXCEPT_RISCV_LOAD_ACCESS_FAULT5
> +#define EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED 6
> +#define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7
> +#define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8
> +#define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9
> +#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10
> +#define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11
> +
> +#define EXCEPT_RISCV_SOFTWARE_INT 0x0
> +#define EXCEPT_RISCV_TIMER_INT 0x1
> +
> +typedef struct {
> + UINT64 X0;
> + UINT64 X1;
> + UINT64 X2;
> + UINT64 X3;
> + UINT64 X4;
> + UINT64 X5;
> + UINT64 X6;
> + UINT64 X7;
> + UINT64 X8;
> + UINT64 X9;
> + UINT64 X10;
> + UINT64 X11;
> + UINT64 X12;
> + UINT64 X13;
> + UINT64 X14;
> + UINT64 X15;
> + UINT64 X16;
> + UINT64 X17;
> + UINT64 X18;
> + UINT64 X19;
> + UINT64 X20;
> + UINT64 X21;
> + UINT64 X22;
> + UINT64 X23;
> + UINT64 X24;
> + UINT64 X25;
> + UINT64 X26;
> + UINT64 X27;
> + UINT64 X28;
> + UINT64 X29;
> + UINT64 X30;
> + UINT64 X31;
> +} EFI_SYSTEM_CONTEXT_RISCV64;
>
> ///
> /// Universal EFI_SYSTEM_CONTEXT definition.
> @@ -614,6 +668,7 @@ typedef union {
>EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
>EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
>EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
> + EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;
> } EFI_SYSTEM_CONTEXT;
>
> //
> diff --git a/MdePkg/I
[edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 05/29] MdePkg/Include: RISC-V definitions.
Add RISC-V processor related definitions.
Signed-off-by: Abner Chang
---
MdePkg/Include/IndustryStandard/PeImage.h | 12 +++
MdePkg/Include/Protocol/DebugSupport.h| 55 +++
MdePkg/Include/Protocol/PxeBaseCode.h | 4 +++
MdePkg/Include/Uefi/UefiBaseType.h| 13
MdePkg/Include/Uefi/UefiSpec.h| 5 +++
5 files changed, 89 insertions(+)
diff --git a/MdePkg/Include/IndustryStandard/PeImage.h
b/MdePkg/Include/IndustryStandard/PeImage.h
index 720bb08..ca3fd0b 100644
--- a/MdePkg/Include/IndustryStandard/PeImage.h
+++ b/MdePkg/Include/IndustryStandard/PeImage.h
@@ -9,6 +9,8 @@
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+Portions Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP.
All rights reserved.
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -34,6 +36,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define IMAGE_FILE_MACHINE_X64 0x8664
#define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2
#define IMAGE_FILE_MACHINE_ARM64 0xAA64
+#define IMAGE_FILE_MACHINE_RISCV32 0x5032
+#define IMAGE_FILE_MACHINE_RISCV64 0x5064
+#define IMAGE_FILE_MACHINE_RISCV1280x5128
//
// EXE file formats
@@ -494,6 +499,13 @@ typedef struct {
#define EFI_IMAGE_REL_BASED_DIR64 10
///
+/// Relocation types of RISC-V processor.
+///
+#define EFI_IMAGE_REL_BASED_RISCV_HI20 5
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12I7
+#define EFI_IMAGE_REL_BASED_RISCV_LOW12S8
+
+///
/// Line number format.
///
typedef struct {
diff --git a/MdePkg/Include/Protocol/DebugSupport.h
b/MdePkg/Include/Protocol/DebugSupport.h
index 800e771..1a29cc0 100644
--- a/MdePkg/Include/Protocol/DebugSupport.h
+++ b/MdePkg/Include/Protocol/DebugSupport.h
@@ -7,6 +7,7 @@
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights
reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -603,6 +604,59 @@ typedef struct {
UINT64 FAR; // Fault Address Register
} EFI_SYSTEM_CONTEXT_AARCH64;
+///
+/// RISC-V processor exception types.
+///
+#define EXCEPT_RISCV_INST_MISALIGNED 0
+#define EXCEPT_RISCV_INST_ACCESS_FAULT1
+#define EXCEPT_RISCV_ILLEGAL_INST 2
+#define EXCEPT_RISCV_BREAKPOINT 3
+#define EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED 4
+#define EXCEPT_RISCV_LOAD_ACCESS_FAULT5
+#define EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED 6
+#define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7
+#define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8
+#define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9
+#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10
+#define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11
+
+#define EXCEPT_RISCV_SOFTWARE_INT 0x0
+#define EXCEPT_RISCV_TIMER_INT 0x1
+
+typedef struct {
+ UINT64 X0;
+ UINT64 X1;
+ UINT64 X2;
+ UINT64 X3;
+ UINT64 X4;
+ UINT64 X5;
+ UINT64 X6;
+ UINT64 X7;
+ UINT64 X8;
+ UINT64 X9;
+ UINT64 X10;
+ UINT64 X11;
+ UINT64 X12;
+ UINT64 X13;
+ UINT64 X14;
+ UINT64 X15;
+ UINT64 X16;
+ UINT64 X17;
+ UINT64 X18;
+ UINT64 X19;
+ UINT64 X20;
+ UINT64 X21;
+ UINT64 X22;
+ UINT64 X23;
+ UINT64 X24;
+ UINT64 X25;
+ UINT64 X26;
+ UINT64 X27;
+ UINT64 X28;
+ UINT64 X29;
+ UINT64 X30;
+ UINT64 X31;
+} EFI_SYSTEM_CONTEXT_RISCV64;
///
/// Universal EFI_SYSTEM_CONTEXT definition.
@@ -614,6 +668,7 @@ typedef union {
EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
+ EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;
} EFI_SYSTEM_CONTEXT;
//
diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h
b/MdePkg/Include/Protocol/PxeBaseCode.h
index b02d270..8a9e4a1 100644
--- a/MdePkg/Include/Protocol/PxeBaseCode.h
+++ b/MdePkg/Include/Protocol/PxeBaseCode.h
@@ -3,6 +3,8 @@
devices for network access and network booting.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All
rights reserved.
+
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
@@ -153,6 +155,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT;
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE0x000A
#elif defined (MDE_CPU_AARCH64)
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE0x000B
+#elif defined (MDE_CPU_RISCV64)
+#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE0x001B
#endif
diff --git a/MdePkg/Include/Uefi/UefiBaseType.h
b/MdePkg/Include/Uefi/UefiBaseType.h
index a62f13d..d979412 100644
--- a/MdePkg/Include/Uefi/UefiBaseType.h
+++ b/MdePkg/Include/Uefi/UefiBaseType.h
@@ -3,6 +3,7 @@
Copyright (c)
