Re: [OMPI devel] Problem with bind-to

2017-04-14 Thread r...@open-mpi.org 
Sorry, but both of your non-working examples work fine for me:

$ mpirun -n 16 -host rhc002:16 --report-bindings /bin/true
[rhc002.cluster:63444] MCW rank 0 bound to socket 0[core 0[hwt 0-1]], socket 
0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
[BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
[rhc002.cluster:63444] MCW rank 1 bound to socket 1[core 12[hwt 0-1]], socket 
1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
[../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
[rhc002.cluster:63444] MCW rank 2 bound to socket 0[core 0[hwt 0-1]], socket 
0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
[BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
[rhc002.cluster:63444] MCW rank 3 bound to socket 1[core 12[hwt 0-1]], socket 
1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
[../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
[rhc002.cluster:63444] MCW rank 4 bound to socket 0[core 0[hwt 0-1]], socket 
0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
[BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
[rhc002.cluster:63444] MCW rank 5 bound to socket 1[core 12[hwt 0-1]], socket 
1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
[../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
[rhc002.cluster:63444] MCW rank 6 bound to socket 0[core 0[hwt 0-1]], socket 
0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
[BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
[rhc002.cluster:63444] MCW rank 7 bound to socket 1[core 12[hwt 0-1]], socket 
1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
[../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
[rhc002.cluster:63444] MCW rank 8 bound to socket 0[core 0[hwt 0-1]], socket 
0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
[BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
[rhc002.cluster:63444] MCW rank 9 bound to socket 1[core 12[hwt 0-1]], socket 
1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
[../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
[rhc002.cluster:63444] MCW rank 10 bound to socket 0[core 0[hwt 0-1]], socket 
0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
9[hwt 0-1]], socket 0[core 10[h

Re: [OMPI devel] Problem with bind-to

2017-04-14 Thread r...@open-mpi.org 
Ah, wait - I had missed your bind-to core directive. With that, it does indeed 
behave poorly, so I can now replicate.

> On Apr 14, 2017, at 2:21 AM, r...@open-mpi.org wrote:
> 
> Sorry, but both of your non-working examples work fine for me:
> 
> $ mpirun -n 16 -host rhc002:16 --report-bindings /bin/true
> [rhc002.cluster:63444] MCW rank 0 bound to socket 0[core 0[hwt 0-1]], socket 
> 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
> socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
> 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
> 9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
> [rhc002.cluster:63444] MCW rank 1 bound to socket 1[core 12[hwt 0-1]], socket 
> 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
> socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
> 0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
> 21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
> [rhc002.cluster:63444] MCW rank 2 bound to socket 0[core 0[hwt 0-1]], socket 
> 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
> socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
> 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
> 9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
> [rhc002.cluster:63444] MCW rank 3 bound to socket 1[core 12[hwt 0-1]], socket 
> 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
> socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
> 0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
> 21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
> [rhc002.cluster:63444] MCW rank 4 bound to socket 0[core 0[hwt 0-1]], socket 
> 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
> socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
> 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
> 9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
> [rhc002.cluster:63444] MCW rank 5 bound to socket 1[core 12[hwt 0-1]], socket 
> 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
> socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
> 0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
> 21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
> [rhc002.cluster:63444] MCW rank 6 bound to socket 0[core 0[hwt 0-1]], socket 
> 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
> socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
> 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
> 9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
> [rhc002.cluster:63444] MCW rank 7 bound to socket 1[core 12[hwt 0-1]], socket 
> 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
> socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
> 0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
> 21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
> [rhc002.cluster:63444] MCW rank 8 bound to socket 0[core 0[hwt 0-1]], socket 
> 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core 3[hwt 0-1]], 
> socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]], socket 0[core 6[hwt 
> 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core 8[hwt 0-1]], socket 0[core 
> 9[hwt 0-1]], socket 0[core 10[hwt 0-1]], socket 0[core 11[hwt 0-1]]: 
> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
> [rhc002.cluster:63444] MCW rank 9 bound to socket 1[core 12[hwt 0-1]], socket 
> 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket 1[core 15[hwt 0-1]], 
> socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt 0-1]], socket 1[core 18[hwt 
> 0-1]], socket 1[core 19[hwt 0-1]], socket 1[core 20[hwt 0-1]], socket 1[core 
> 21[hwt 0-1]], socket 1[core 22[hwt 0-1]], socket 1[core 23[hwt 0-1]]: 
> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
> [rhc002.cluster:63444] MCW ra

Re: [OMPI devel] Problem with bind-to

2017-04-14 Thread Cyril Bordage 
Tested with success.
Thanks guys.


Cyril.

Le 14/04/2017 à 11:39, r...@open-mpi.org a écrit :
> PR https://github.com/open-mpi/ompi/pull/3356
> 
>> On Apr 14, 2017, at 2:22 AM, r...@open-mpi.org
>>  wrote:
>>
>> Ah, wait - I had missed your bind-to core directive. With that, it
>> does indeed behave poorly, so I can now replicate.
>>
>>> On Apr 14, 2017, at 2:21 AM, r...@open-mpi.org
>>>  wrote:
>>>
>>> Sorry, but both of your non-working examples work fine for me:
>>>
>>> $ mpirun -n 16 -host rhc002:16 --report-bindings /bin/true
>>> [rhc002.cluster:63444] MCW rank 0 bound to socket 0[core 0[hwt 0-1]],
>>> socket 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core
>>> 3[hwt 0-1]], socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]],
>>> socket 0[core 6[hwt 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core
>>> 8[hwt 0-1]], socket 0[core 9[hwt 0-1]], socket 0[core 10[hwt 0-1]],
>>> socket 0[core 11[hwt 0-1]]:
>>> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
>>> [rhc002.cluster:63444] MCW rank 1 bound to socket 1[core 12[hwt
>>> 0-1]], socket 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket
>>> 1[core 15[hwt 0-1]], socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt
>>> 0-1]], socket 1[core 18[hwt 0-1]], socket 1[core 19[hwt 0-1]], socket
>>> 1[core 20[hwt 0-1]], socket 1[core 21[hwt 0-1]], socket 1[core 22[hwt
>>> 0-1]], socket 1[core 23[hwt 0-1]]:
>>> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
>>> [rhc002.cluster:63444] MCW rank 2 bound to socket 0[core 0[hwt 0-1]],
>>> socket 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core
>>> 3[hwt 0-1]], socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]],
>>> socket 0[core 6[hwt 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core
>>> 8[hwt 0-1]], socket 0[core 9[hwt 0-1]], socket 0[core 10[hwt 0-1]],
>>> socket 0[core 11[hwt 0-1]]:
>>> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
>>> [rhc002.cluster:63444] MCW rank 3 bound to socket 1[core 12[hwt
>>> 0-1]], socket 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket
>>> 1[core 15[hwt 0-1]], socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt
>>> 0-1]], socket 1[core 18[hwt 0-1]], socket 1[core 19[hwt 0-1]], socket
>>> 1[core 20[hwt 0-1]], socket 1[core 21[hwt 0-1]], socket 1[core 22[hwt
>>> 0-1]], socket 1[core 23[hwt 0-1]]:
>>> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
>>> [rhc002.cluster:63444] MCW rank 4 bound to socket 0[core 0[hwt 0-1]],
>>> socket 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core
>>> 3[hwt 0-1]], socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]],
>>> socket 0[core 6[hwt 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core
>>> 8[hwt 0-1]], socket 0[core 9[hwt 0-1]], socket 0[core 10[hwt 0-1]],
>>> socket 0[core 11[hwt 0-1]]:
>>> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
>>> [rhc002.cluster:63444] MCW rank 5 bound to socket 1[core 12[hwt
>>> 0-1]], socket 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket
>>> 1[core 15[hwt 0-1]], socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt
>>> 0-1]], socket 1[core 18[hwt 0-1]], socket 1[core 19[hwt 0-1]], socket
>>> 1[core 20[hwt 0-1]], socket 1[core 21[hwt 0-1]], socket 1[core 22[hwt
>>> 0-1]], socket 1[core 23[hwt 0-1]]:
>>> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
>>> [rhc002.cluster:63444] MCW rank 6 bound to socket 0[core 0[hwt 0-1]],
>>> socket 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core
>>> 3[hwt 0-1]], socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]],
>>> socket 0[core 6[hwt 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core
>>> 8[hwt 0-1]], socket 0[core 9[hwt 0-1]], socket 0[core 10[hwt 0-1]],
>>> socket 0[core 11[hwt 0-1]]:
>>> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
>>> [rhc002.cluster:63444] MCW rank 7 bound to socket 1[core 12[hwt
>>> 0-1]], socket 1[core 13[hwt 0-1]], socket 1[core 14[hwt 0-1]], socket
>>> 1[core 15[hwt 0-1]], socket 1[core 16[hwt 0-1]], socket 1[core 17[hwt
>>> 0-1]], socket 1[core 18[hwt 0-1]], socket 1[core 19[hwt 0-1]], socket
>>> 1[core 20[hwt 0-1]], socket 1[core 21[hwt 0-1]], socket 1[core 22[hwt
>>> 0-1]], socket 1[core 23[hwt 0-1]]:
>>> [../../../../../../../../../../../..][BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB]
>>> [rhc002.cluster:63444] MCW rank 8 bound to socket 0[core 0[hwt 0-1]],
>>> socket 0[core 1[hwt 0-1]], socket 0[core 2[hwt 0-1]], socket 0[core
>>> 3[hwt 0-1]], socket 0[core 4[hwt 0-1]], socket 0[core 5[hwt 0-1]],
>>> socket 0[core 6[hwt 0-1]], socket 0[core 7[hwt 0-1]], socket 0[core
>>> 8[hwt 0-1]], socket 0[core 9[hwt 0-1]], socket 0[core 10[hwt 0-1]],
>>> socket 0[core 11[hwt 0-1]]:
>>> [BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB/BB][../../../../../../../../../../../..]
>>> [rhc002.cluster:63444] MCW rank 9 bound to socket 1[core 12[hwt
>>> 0-1]], socket 1[core 13[hwt 0-1]], socket 1[core

[OMPI devel] DNS updates

2017-04-14 Thread Jeff Squyres (jsquyres) 
In the "FYI" / full transparency category:

Today, I completed the transfer of 5 of Open MPI's "convenience" domains from 
GoDaddy to Google Domains:

- open-mpi.com
- open-mpi.net
- openmpi.com
- openmpi.net
- openmpi.org

All these domains do is redirect to https://www.open-mpi.org/ (i.e., our main 
domain).

This was the first step in transferring the domains to the control of SPI 
(since the domains are all currently still in my name).

Tomorrow (Saturday), I'll do the transfer of the last domain -- our main domain 
-- open-mpi.org.  I'll do it tomorrow so that it's not a weekday/workday, and 
the DNS disruption will hopefully be less impactful (the disruption typically 
doesn't last long, but might as well do it over the weekend when we can see via 
Google Analytics that there's tremendously less web site traffic on the 
weekends).

Once this is done, all 6 of our domains will be at Google Domains.

After a mandated "quiet period" (I think it's a month?), we'll be able to 
transfer the ownership of these domains to SPI.

-- 
Jeff Squyres
jsquy...@cisco.com

___
devel mailing list
devel@lists.open-mpi.org
https://rfd.newmexicoconsortium.org/mailman/listinfo/devel