Re: RTEMS for ARM Cortex-M1 ?

2015-02-13 Thread Sebastian Huber

On 14/02/15 02:58, Cudmore, Alan P. (GSFC-5820) wrote:

A project is looking at using RTEMS on an FPGA based ARM Cortex-M1 like
the one in the Microsemi ProAsic3L development kit:
http://www.microsemi.com/products/fpga-soc/design-resources/dev-kits/proasi
c3/cortex-m1-enabled-proasic3l-development-kit

Wikipedia says the Cortex-M1 is an ARMv6M architecture.
http://en.wikipedia.org/wiki/ARM_Cortex-M#Cortex-M1

I see that there is ARMv7M support in score, would a similar port be
needed for ARMv6M?

Is an ARMv6M close to anything in RTEMS now?


The ARMv6M has a reduced instruction set compared to ARMv7M. We have an 
ARMv6M multilib, so the GCC part should be fine. You have to fix some 
ARMv7M assembly code in RTEMS (not much). I tried to do this two weeks a 
go, but after 10 minutes I gave up, since it had no priority for me.


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RTEMS for ARM Cortex-M1 ?

2015-02-13 Thread Cudmore, Alan P. (GSFC-5820)
A project is looking at using RTEMS on an FPGA based ARM Cortex-M1 like
the one in the Microsemi ProAsic3L development kit:
http://www.microsemi.com/products/fpga-soc/design-resources/dev-kits/proasi
c3/cortex-m1-enabled-proasic3l-development-kit

Wikipedia says the Cortex-M1 is an ARMv6M architecture.
http://en.wikipedia.org/wiki/ARM_Cortex-M#Cortex-M1

I see that there is ARMv7M support in score, would a similar port be
needed for ARMv6M?

Is an ARMv6M close to anything in RTEMS now?

Thanks,
Alan

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Intermittent connectivity.

2015-02-13 Thread Amar Takhar
I will be rebuilding most of our web services before installing a commercial 
SSL 
certificate.

All of our HTTP and some FTP, Git and other services will be going up/down as I 
work on them.


Amar.
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Re: how patching

2015-02-13 Thread Daniel Gutson
Just to clarify: the ability to provide a new piece of binary
corresponding to a driver and replace the existing one.
Have anybody tried this before?

Thanks!

   Daniel.

On Fri, Feb 13, 2015 at 12:27 PM, Daniel Gutson
 wrote:
> Hi,
>
>is there any current experience / support with hot patching? E.g.
> patching a driver while the whole system is running.
>
> Thanks,
>
>Daniel.
>
> --
>
> Daniel F. Gutson
> Chief Engineering Officer, SPD
>
> San Lorenzo 47, 3rd Floor, Office 5
> Córdoba, Argentina
>
> Phone:   +54 351 4217888 / +54 351 4218211
> Skype:dgutson
> LinkedIn: http://ar.linkedin.com/in/danielgutson



-- 

Daniel F. Gutson
Chief Engineering Officer, SPD

San Lorenzo 47, 3rd Floor, Office 5
Córdoba, Argentina

Phone:   +54 351 4217888 / +54 351 4218211
Skype:dgutson
LinkedIn: http://ar.linkedin.com/in/danielgutson
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open_dev_console.c review

2015-02-13 Thread Joel Sherrill
Hi

I was looking at libcsupport/src/open_dev_console.c and had
a few thoughts.

(1) Since this method is only configured to be used when the
console driver is installed, should we now consider it a fatal
error if the first open() fails? The error decision was made
before we could drop this method out of the initialization
path automatically.

(2) These error codes are arbitrary. Sebastian worked to
make a list of standard codes for fatal errors. Should these
be in that list?

Thanks.

-- 
Joel Sherrill, Ph.D. Director of Research & Development
joel.sherr...@oarcorp.comOn-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
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Updating _Copyright_Notice in copyrt.h

2015-02-13 Thread Joel Sherrill
Hi

I noticed running fileio.exe that _Copyright_Notice is out of date.
I can update the year but should it be changed more?

I don't think this impacts the minimum size.

-- 
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how patching

2015-02-13 Thread Daniel Gutson
Hi,

   is there any current experience / support with hot patching? E.g.
patching a driver while the whole system is running.

Thanks,

   Daniel.

-- 

Daniel F. Gutson
Chief Engineering Officer, SPD

San Lorenzo 47, 3rd Floor, Office 5
Córdoba, Argentina

Phone:   +54 351 4217888 / +54 351 4218211
Skype:dgutson
LinkedIn: http://ar.linkedin.com/in/danielgutson
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Re: [rtems commit] smpcapture02: Add test of functionality to add custom entries to capture trace

2015-02-13 Thread Joel Sherrill

On 2/13/2015 2:54 AM, Chris Johns wrote:
> On 13/02/2015 7:06 pm, Sebastian Huber wrote:
>> On 13/02/15 08:56, Daniel Cederman wrote:
 Daniel(s), could enlighten me why this is needed ? Is this a arch
 constraint or something else ?

 Chris
>>> It is an arch constraint. On SPARC, for example, all memory accesses
>>> needs to a be aligned. From the SPARC V8 manual:
>>>
>>> "Halfword accesses must be aligned on 2-byte boundaries, word accesses
>>> must be aligned on 4-byte boundaries, and doubleword accesses must be
>>> aligned on 8-byte boundaries. An improperly aligned address in a load
>>> or store instruction causes a trap to occur."
>>>
>>> Since the capture engine does a 64-bit write when it writes the time,
>>> the entries needs to be aligned on 8-byte boundaries.
>> If you need this hack in the test, then there is a bug in the caputure
>> engine.
>>
> Agreed, and what I was wondering.
>
> Maybe the capture engine needs a buffer alignment arg so the data 
> transfers match up.
malloc is supposed to return buffers aligned to the strictest requirements
of the architecture. This usually results in 4 or 8 byte alignment. Maybe
the capture engine just needs to follow the same rule.
> Chris
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Re: [rtems commit] smpcapture02: Add test of functionality to add custom entries to capture trace

2015-02-13 Thread Chris Johns

On 13/02/2015 7:06 pm, Sebastian Huber wrote:


On 13/02/15 08:56, Daniel Cederman wrote:

> Daniel(s), could enlighten me why this is needed ? Is this a arch
> constraint or something else ?
>
> Chris

It is an arch constraint. On SPARC, for example, all memory accesses
needs to a be aligned. From the SPARC V8 manual:

"Halfword accesses must be aligned on 2-byte boundaries, word accesses
must be aligned on 4-byte boundaries, and doubleword accesses must be
aligned on 8-byte boundaries. An improperly aligned address in a load
or store instruction causes a trap to occur."

Since the capture engine does a 64-bit write when it writes the time,
the entries needs to be aligned on 8-byte boundaries.


If you need this hack in the test, then there is a bug in the caputure
engine.



Agreed, and what I was wondering.

Maybe the capture engine needs a buffer alignment arg so the data 
transfers match up.


Chris
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Re: [rtems commit] smpcapture02: Add test of functionality to add custom entries to capture trace

2015-02-13 Thread Sebastian Huber


On 13/02/15 08:56, Daniel Cederman wrote:

> Daniel(s), could enlighten me why this is needed ? Is this a arch
> constraint or something else ?
>
> Chris

It is an arch constraint. On SPARC, for example, all memory accesses 
needs to a be aligned. From the SPARC V8 manual:


"Halfword accesses must be aligned on 2-byte boundaries, word accesses 
must be aligned on 4-byte boundaries, and doubleword accesses must be 
aligned on 8-byte boundaries. An improperly aligned address in a load 
or store instruction causes a trap to occur."


Since the capture engine does a 64-bit write when it writes the time, 
the entries needs to be aligned on 8-byte boundaries. 


If you need this hack in the test, then there is a bug in the caputure 
engine.


--
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Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

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Re: [rtems commit] IMFS: Add fine grained configuration

2015-02-13 Thread Sebastian Huber


On 12/02/15 21:55, Joel Sherrill wrote:

Is there any guidance for the (unexpected) user using the
miniIMFS? The configuration parameter just went away.

Can it be an error in confdefs.h?


Yes, good idea, I will add an error to confdefs.h. I am not finished 
with the work, my ultimate goal is to remove the DEVFS and make IMFS the 
only root filesystem for RTEMS.


--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

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