date:20210104

rtems-record-lttng live support

2021-01-04 Thread Ryan Long

Hi,

Can rtems-record-lttng provide a live feed of traces?

Thanks,
Ryan
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Re: [PATCH 1/3] prepared patch

2021-01-04 Thread Sebastian Huber


Hello Robin,

On 04/01/2021 16:10, Robin.Mueller wrote:

I added the weak attribute to some configuration structs so users can can 
supply their own configuration
structs (otherwise I got redeclaration linker errors).
I moved the configuration structures to separate files. This should 
avoid the use of the weak attribute. Could you please update your patch.


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Why do threads start execution from _Thread_Handler?

2021-01-04 Thread Richi Dubey

Hi,

I am debugging a code (tm24
) and
there is a scenario where a thread is blocked on the CPU and a new thread
has to start executing in its place. So, the thread which is getting
blocked (executing thread) executes the _Thread_Do_dispatch and runs the
code until
:
_Context_Switch( >Registers, >Registers ). After this, the
heir thread starts executing from _Thread_Handler. Why is this the case?
Should the heir not start its execution from where the (earlier) executing
thread left the program counter at, i.e. after the _Context_Switch in
_Thread_Do_dispatch?

Please let me know your thoughts.

Thanks,
Richi.
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Re: [PATCH 1/3] prepared patch

2021-01-04 Thread Robin Müller

Patch can also be found here: https://devel.rtems.org/ticket/4209#comment:3

Kind Regards
Robin

On Mon, 4 Jan 2021 at 16:12, Robin.Mueller 
wrote:

> I added the weak attribute to some configuration structs so users can can
> supply their own configuration
> structs (otherwise I got redeclaration linker errors).
> ---
>  bsps/arm/stm32h7/console/console-usart3.c | 23 ++-
>  bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h |  8 +++
>  bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h |  1 +
>  bsps/arm/stm32h7/start/stm32h7-config.c   | 11 ++---
>  bsps/arm/stm32h7/start/system_stm32h7xx.c |  6 +
>  spec/build/bsps/arm/stm32h7/bspstm32h7.yml|  2 ++
>  spec/build/bsps/arm/stm32h7/opth743nucleo.yml | 13 +++
>  7 files changed, 60 insertions(+), 4 deletions(-)
>  create mode 100644 spec/build/bsps/arm/stm32h7/opth743nucleo.yml
>
> diff --git a/bsps/arm/stm32h7/console/console-usart3.c
> b/bsps/arm/stm32h7/console/console-usart3.c
> index 6e0a10fe46..c84f6eb417 100644
> --- a/bsps/arm/stm32h7/console/console-usart3.c
> +++ b/bsps/arm/stm32h7/console/console-usart3.c
> @@ -25,13 +25,33 @@
>   * POSSIBILITY OF SUCH DAMAGE.
>   */
>
> +#ifdef __rtems__
> +#include 
> +#endif
> +
>  #ifdef HAVE_CONFIG_H
>  #include "config.h"
>  #endif
>
>  #include 
>
> -static const stm32h7_uart_config stm32h7_usart3_config = {
> +#if STM32H743ZI_NUCLEO == 1
> +__attribute__((weak)) static const stm32h7_uart_config
> stm32h7_usart3_config = {
> +  .gpio = {
> +.regs = GPIOD,
> +.config = {
> +  .Pin = GPIO_PIN_8 | GPIO_PIN_9,
> +  .Mode = GPIO_MODE_AF_PP,
> +  .Pull = GPIO_NOPULL,
> +  .Speed = GPIO_SPEED_FREQ_LOW,
> +  .Alternate = GPIO_AF7_USART3
> +}
> +  },
> +  .irq = USART3_IRQn,
> +  .device_index = 2
> +};
> +#else
> +__attribute__((weak)) static const stm32h7_uart_config
> stm32h7_usart3_config = {
>.gpio = {
>  .regs = GPIOB,
>  .config = {
> @@ -45,6 +65,7 @@ static const stm32h7_uart_config stm32h7_usart3_config =
> {
>.irq = USART3_IRQn,
>.device_index = 2
>  };
> +#endif
>
>  stm32h7_uart_context stm32h7_usart3_instance = {
>.uart = {
> diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
> b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
> index d423e4f782..7dd73075ba 100644
> --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
> +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
> @@ -21,6 +21,9 @@
>  #ifndef __STM32H7xx_HAL_CONF_H
>  #define __STM32H7xx_HAL_CONF_H
>
> +#ifdef __rtems__
> +#include 
> +#endif /* __rtems__ */
>  #ifdef __cplusplus
>   extern "C" {
>  #endif
> @@ -103,7 +106,12 @@
>*(when HSE is used as system clock source, directly or through
> the PLL).
>*/
>  #if !defined  (HSE_VALUE)
> +#if STM32H743ZI_NUCLEO == 1
> +// HSE for the STM32H743ZI Nucleo
> +#define HSE_VALUE((uint32_t)800)
> +#else
>  #define HSE_VALUE((uint32_t)2500) /*!< Value of the External
> oscillator in Hz : FPGA case fixed to 60MHZ */
> +#endif
>  #endif /* HSE_VALUE */
>
>  #if !defined  (HSE_STARTUP_TIMEOUT)
> diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
> b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
> index e9fecc4aa0..b171f7dac7 100644
> --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
> +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
> @@ -27,6 +27,7 @@ extern "C" {
>
>  /* Includes
> --*/
>  #include "stm32h7xx_hal_def.h"
> +#include "stm32h7xx_hal_dma.h"
>
>  /** @addtogroup STM32H7xx_HAL_Driver
>* @{
> diff --git a/bsps/arm/stm32h7/start/stm32h7-config.c
> b/bsps/arm/stm32h7/start/stm32h7-config.c
> index 874ad047db..22422f2c38 100644
> --- a/bsps/arm/stm32h7/start/stm32h7-config.c
> +++ b/bsps/arm/stm32h7/start/stm32h7-config.c
> @@ -29,12 +29,17 @@
>  #include "config.h"
>  #endif
>
> +#ifdef __rtems__
> +#include 
> +#endif
> +
>  #include 
>
> +
>  const uint32_t stm32h7_config_pwr_regulator_voltagescaling =
>PWR_REGULATOR_VOLTAGE_SCALE0;
>
> -const RCC_OscInitTypeDef stm32h7_config_oscillator = {
> +__attribute__((weak)) const RCC_OscInitTypeDef stm32h7_config_oscillator
> = {
>.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
>  | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48,
>.HSEState = RCC_HSE_ON,
> @@ -54,7 +59,7 @@ const RCC_OscInitTypeDef stm32h7_config_oscillator = {
>.PLL.PLLFRACN = 0
>  };
>
> -const RCC_ClkInitTypeDef stm32h7_config_clocks = {
> +__attribute__((weak)) const RCC_ClkInitTypeDef stm32h7_config_clocks = {
>.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
>  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
>  | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1,
> @@ -69,7 +74,7 @@ const RCC_ClkInitTypeDef stm32h7_config_clocks = {
>
>  const uint32_t stm32h7_config_flash_latency = FLASH_LATENCY_4;
>
> -const RCC_PeriphCLKInitTypeDef stm32h7_config_peripheral_clocks = {
> +__attribute__((weak)) const

[PATCH 1/3] prepared patch

2021-01-04 Thread Robin.Mueller

I added the weak attribute to some configuration structs so users can can 
supply their own configuration
structs (otherwise I got redeclaration linker errors).
---
 bsps/arm/stm32h7/console/console-usart3.c | 23 ++-
 bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h |  8 +++
 bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h |  1 +
 bsps/arm/stm32h7/start/stm32h7-config.c   | 11 ++---
 bsps/arm/stm32h7/start/system_stm32h7xx.c |  6 +
 spec/build/bsps/arm/stm32h7/bspstm32h7.yml|  2 ++
 spec/build/bsps/arm/stm32h7/opth743nucleo.yml | 13 +++
 7 files changed, 60 insertions(+), 4 deletions(-)
 create mode 100644 spec/build/bsps/arm/stm32h7/opth743nucleo.yml

diff --git a/bsps/arm/stm32h7/console/console-usart3.c 
b/bsps/arm/stm32h7/console/console-usart3.c
index 6e0a10fe46..c84f6eb417 100644
--- a/bsps/arm/stm32h7/console/console-usart3.c
+++ b/bsps/arm/stm32h7/console/console-usart3.c
@@ -25,13 +25,33 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifdef __rtems__
+#include 
+#endif
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
 #include 
 
-static const stm32h7_uart_config stm32h7_usart3_config = {
+#if STM32H743ZI_NUCLEO == 1
+__attribute__((weak)) static const stm32h7_uart_config stm32h7_usart3_config = 
{
+  .gpio = {
+.regs = GPIOD,
+.config = {
+  .Pin = GPIO_PIN_8 | GPIO_PIN_9,
+  .Mode = GPIO_MODE_AF_PP,
+  .Pull = GPIO_NOPULL,
+  .Speed = GPIO_SPEED_FREQ_LOW,
+  .Alternate = GPIO_AF7_USART3
+}
+  },
+  .irq = USART3_IRQn,
+  .device_index = 2
+};
+#else
+__attribute__((weak)) static const stm32h7_uart_config stm32h7_usart3_config = 
{
   .gpio = {
 .regs = GPIOB,
 .config = {
@@ -45,6 +65,7 @@ static const stm32h7_uart_config stm32h7_usart3_config = {
   .irq = USART3_IRQn,
   .device_index = 2
 };
+#endif
 
 stm32h7_uart_context stm32h7_usart3_instance = {
   .uart = {
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h 
b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
index d423e4f782..7dd73075ba 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
@@ -21,6 +21,9 @@
 #ifndef __STM32H7xx_HAL_CONF_H
 #define __STM32H7xx_HAL_CONF_H
 
+#ifdef __rtems__
+#include 
+#endif /* __rtems__ */
 #ifdef __cplusplus
  extern "C" {
 #endif
@@ -103,7 +106,12 @@
   *(when HSE is used as system clock source, directly or through the 
PLL).  
   */
 #if !defined  (HSE_VALUE) 
+#if STM32H743ZI_NUCLEO == 1
+// HSE for the STM32H743ZI Nucleo
+#define HSE_VALUE((uint32_t)800)
+#else
 #define HSE_VALUE((uint32_t)2500) /*!< Value of the External 
oscillator in Hz : FPGA case fixed to 60MHZ */
+#endif
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h 
b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
index e9fecc4aa0..b171f7dac7 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
@@ -27,6 +27,7 @@ extern "C" {
 
 /* Includes 
--*/
 #include "stm32h7xx_hal_def.h"
+#include "stm32h7xx_hal_dma.h"
 
 /** @addtogroup STM32H7xx_HAL_Driver
   * @{
diff --git a/bsps/arm/stm32h7/start/stm32h7-config.c 
b/bsps/arm/stm32h7/start/stm32h7-config.c
index 874ad047db..22422f2c38 100644
--- a/bsps/arm/stm32h7/start/stm32h7-config.c
+++ b/bsps/arm/stm32h7/start/stm32h7-config.c
@@ -29,12 +29,17 @@
 #include "config.h"
 #endif
 
+#ifdef __rtems__
+#include 
+#endif
+
 #include 
 
+
 const uint32_t stm32h7_config_pwr_regulator_voltagescaling =
   PWR_REGULATOR_VOLTAGE_SCALE0;
 
-const RCC_OscInitTypeDef stm32h7_config_oscillator = {
+__attribute__((weak)) const RCC_OscInitTypeDef stm32h7_config_oscillator = {
   .OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
 | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48,
   .HSEState = RCC_HSE_ON,
@@ -54,7 +59,7 @@ const RCC_OscInitTypeDef stm32h7_config_oscillator = {
   .PLL.PLLFRACN = 0
 };
 
-const RCC_ClkInitTypeDef stm32h7_config_clocks = {
+__attribute__((weak)) const RCC_ClkInitTypeDef stm32h7_config_clocks = {
   .ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1,
@@ -69,7 +74,7 @@ const RCC_ClkInitTypeDef stm32h7_config_clocks = {
 
 const uint32_t stm32h7_config_flash_latency = FLASH_LATENCY_4;
 
-const RCC_PeriphCLKInitTypeDef stm32h7_config_peripheral_clocks = {
+__attribute__((weak)) const RCC_PeriphCLKInitTypeDef 
stm32h7_config_peripheral_clocks = {
   .PeriphClockSelection = RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART3
 | RCC_PERIPHCLK_FDCAN | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1
 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_FMC | RCC_PERIPHCLK_RNG,
diff --git a/bsps/arm/stm32h7/start/system_stm32h7xx.c 
b/bsps/arm/stm32h7/start/system_stm32h7xx.c
index 092d853720..65c5a65ef0 100644
---

Re: GCC 11 Ada requires

2021-01-04 Thread Joel Sherrill

On Mon, Jan 4, 2021, 4:03 AM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:

> Hello,
>
> the GCC 11 Ada requires :
>
> /tmp/sh/src/rsb/rtems/build/sparc-rtems7-gcc-2e96eec-newlib-415fdd4-x86_64-linux-gnu-1/gnu-mirror-gcc-2e96eec/gcc/ada/s-oscons-tmplt.c:125:10:
>
> fatal error: poll.h: No such file or directory
>125 | #include 
>|  ^~~~
>
> I think we should move this header file to Newlib. It is a POSIX header
> file.
>
I'm fine with this one and the few remaining POSIX headers moving.

>
> --
> embedded brains GmbH
> Herr Sebastian HUBER
> Dornierstr. 4
> 82178 Puchheim
> Germany
> email: sebastian.hu...@embedded-brains.de
> phone: +49-89-18 94 741 - 16
> fax:   +49-89-18 94 741 - 08
>
> Registergericht: Amtsgericht München
> Registernummer: HRB 157899
> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
> Unsere Datenschutzerklärung finden Sie hier:
> https://embedded-brains.de/datenschutzerklaerung/
>
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GCC 11 Ada requires

2021-01-04 Thread Sebastian Huber


Hello,

the GCC 11 Ada requires :

/tmp/sh/src/rsb/rtems/build/sparc-rtems7-gcc-2e96eec-newlib-415fdd4-x86_64-linux-gnu-1/gnu-mirror-gcc-2e96eec/gcc/ada/s-oscons-tmplt.c:125:10: 
fatal error: poll.h: No such file or directory

  125 | #include 
  |  ^~~~

I think we should move this header file to Newlib. It is a POSIX header 
file.


--
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Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

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Registernummer: HRB 157899
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rtems-record-lttng live support

Re: [PATCH 1/3] prepared patch

Why do threads start execution from _Thread_Handler?

Re: [PATCH 1/3] prepared patch

[PATCH 1/3] prepared patch

Re: GCC 11 Ada requires

GCC 11 Ada requires

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