Re: GSoC - Code Formatting and Style Checking for RTEMS score

[Sebastian Huber]

Hello Ida,

On 10/07/2021 01:08, Ida Delphine wrote:
I added the functionality for my script to ignore certain directories 
like /bsps/, /testsuites/, '/cpukit/zlib', '/cpukit/mghttpd'.
https://github.com/Idadelveloper/rtems/blob/master/hooks/pre-commit 


Are there any extra directories I should exclude?

Also open to more suggestions and feedback to make my code better :)


what do I have to do to test this pre-commit hook?

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email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

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Re: GSoC - Code Formatting and Style Checking for RTEMS score

[Kuan-Hsun Chen]

Hello Ida,

It would be great if you make a README.md at
https://github.com/Idadelveloper/rtems/tree/master/hooks to guide potential
users how to use your pre-commit hook and provide some examples.

I tried to find the information from your blog, but the update stopped at
the second week (https://idadelveloper.github.io/blog/2021/05/21/gsoc-week2).
I don't know if the post has been updated by taking the suggestion from
Gedare, e.g., I read that some possible options to pass arguments are
listed, but I see that you have considered Joel's comments for the ignoring
paths. Please make a new post in your blog to summarize the latest status.

Best regards,
Kuan-Hsun


On Mon, Jul 12, 2021 at 9:22 AM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:

> Hello Ida,
>
> On 10/07/2021 01:08, Ida Delphine wrote:
> > I added the functionality for my script to ignore certain directories
> > like /bsps/, /testsuites/, '/cpukit/zlib', '/cpukit/mghttpd'.
> > https://github.com/Idadelveloper/rtems/blob/master/hooks/pre-commit
> > 
> > Are there any extra directories I should exclude?
> >
> > Also open to more suggestions and feedback to make my code better :)
>
> what do I have to do to test this pre-commit hook?
>
> --
> embedded brains GmbH
> Herr Sebastian HUBER
> Dornierstr. 4
> 82178 Puchheim
> Germany
> email: sebastian.hu...@embedded-brains.de
> phone: +49-89-18 94 741 - 16
> fax:   +49-89-18 94 741 - 08
>
> Registergericht: Amtsgericht München
> Registernummer: HRB 157899
> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
> Unsere Datenschutzerklärung finden Sie hier:
> https://embedded-brains.de/datenschutzerklaerung/
> ___
> devel mailing list
> devel@rtems.org
> http://lists.rtems.org/mailman/listinfo/devel



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[PATCH 04/41] rtems: Add rtems_interrupt_cause_on()

[Sebastian Huber]

Document the currently not implemented rtems_interrupt_cause() and
rtems_interrupt_clear().

Update #3269.
---
 cpukit/include/rtems/rtems/intr.h | 162 +++---
 1 file changed, 125 insertions(+), 37 deletions(-)

diff --git a/cpukit/include/rtems/rtems/intr.h 
b/cpukit/include/rtems/rtems/intr.h
index 178cf342df..a8b1b892b5 100644
--- a/cpukit/include/rtems/rtems/intr.h
+++ b/cpukit/include/rtems/rtems/intr.h
@@ -54,6 +54,7 @@
 #ifndef _RTEMS_RTEMS_INTR_H
 #define _RTEMS_RTEMS_INTR_H
 
+#include 
 #include 
 #include 
 #include 
@@ -99,7 +100,7 @@ typedef ISR_Handler rtems_isr;
  * @ingroup RTEMSAPIClassicIntr
  *
  * @brief Interrupt service routines installed by rtems_interrupt_catch() shall
- *   have this function pointer type.
+ *   have this type.
  */
 #if CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE
   typedef ISR_Handler_entry rtems_isr_entry;
@@ -502,42 +503,6 @@ rtems_status_code rtems_interrupt_catch(
  */
 #define rtems_interrupt_is_in_progress() _ISR_Is_in_progress()
 
-/* Generated from spec:/rtems/intr/if/cause */
-
-/**
- * @ingroup RTEMSAPIClassicIntr
- *
- * @brief Causes the interrupt.
- *
- * @param _vector is the vector number of the interrupt to cause.
- *
- * @par Constraints
- * @parblock
- * The following constraints apply to this directive:
- *
- * * The directive is not implemented.
- * @endparblock
- */
-#define rtems_interrupt_cause( _vector ) do { } while ( 0 )
-
-/* Generated from spec:/rtems/intr/if/clear */
-
-/**
- * @ingroup RTEMSAPIClassicIntr
- *
- * @brief Clears the interrupt.
- *
- * @param _vector is the vector number of the interrupt to clear.
- *
- * @par Constraints
- * @parblock
- * The following constraints apply to this directive:
- *
- * * The directive is not implemented.
- * @endparblock
- */
-#define rtems_interrupt_clear( _vector ) do { } while ( 0 )
-
 /* Generated from spec:/rtems/intr/if/lock-initialize */
 
 /**
@@ -909,6 +874,129 @@ rtems_status_code rtems_interrupt_catch(
 #define RTEMS_INTERRUPT_LOCK_REFERENCE( _designator, _target ) \
   ISR_LOCK_REFERENCE( _designator, _target )
 
+/* Generated from spec:/rtems/intr/if/cause */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Causes the interrupt vector.
+ *
+ * @param vector is the number of the interrupt vector to cause.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_ID There was no interrupt vector associated with the
+ *   number specified by ``vector``.
+ *
+ * @retval ::RTEMS_UNSATISFIED The request to cause the interrupt vector has
+ *   not been satisfied.
+ *
+ * @par Notes
+ * The rtems_interrupt_get_attributes() directive may be used to check if an
+ * interrupt vector can be caused.
+ *
+ * @par Constraints
+ * @parblock
+ * The following constraints apply to this directive:
+ *
+ * * The directive may be called from within interrupt context.
+ *
+ * * The directive may be called from within device driver initialization
+ *   context.
+ *
+ * * The directive may be called from within task context.
+ *
+ * * The directive will not cause the calling task to be preempted.
+ * @endparblock
+ */
+rtems_status_code rtems_interrupt_cause( rtems_vector_number vector );
+
+/* Generated from spec:/rtems/intr/if/cause-on */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Causes the interrupt vector on the processor.
+ *
+ * @param vector is the number of the interrupt vector to cause.
+ *
+ * @param cpu_index is the index of the target processor of the interrupt
+ *   vector to cause.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_ID There was no interrupt vector associated with the
+ *   number specified by ``vector``.
+ *
+ * @retval ::RTEMS_NOT_CONFIGURED The processor specified by ``cpu_index`` was
+ *   not configured to be used by the application.
+ *
+ * @retval ::RTEMS_INCORRECT_STATE The processor specified by ``cpu_index`` was
+ *   configured to be used by the application, however, it was not online.
+ *
+ * @retval ::RTEMS_UNSATISFIED The request to cause the interrupt vector has
+ *   not been satisfied.
+ *
+ * @par Notes
+ * The rtems_interrupt_get_attributes() directive may be used to check if an
+ * interrupt vector can be caused on a processor.
+ *
+ * @par Constraints
+ * @parblock
+ * The following constraints apply to this directive:
+ *
+ * * The directive may be called from within interrupt context.
+ *
+ * * The directive may be called from within device driver initialization
+ *   context.
+ *
+ * * The directive may be called from within task context.
+ *
+ * * The directive will not cause the calling task to be preempted.
+ * @endparblock
+ */
+rtems_status_code rtems_interrupt_cause_on(
+  rtems_vector_number vector,
+  uint32_tcpu_index
+);
+
+/* Generated from spec:/rtems/intr/if/clear */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Clears the interrupt vector.
+ *
+ * @param vector is the number

[PATCH 06/41] rtems: Add rtems_interrupt_get_attributes()

[Sebastian Huber]

Add a directive to query the attributes of an interrupt vector.   This
be used for generic tests and system diagnostics.

Update #3269.
---
 cpukit/include/rtems/irq-extension.h | 198 +++
 1 file changed, 198 insertions(+)

diff --git a/cpukit/include/rtems/irq-extension.h 
b/cpukit/include/rtems/irq-extension.h
index 5f24fb502e..d6b5cd5e45 100644
--- a/cpukit/include/rtems/irq-extension.h
+++ b/cpukit/include/rtems/irq-extension.h
@@ -419,6 +419,204 @@ rtems_status_code rtems_interrupt_set_affinity(
   const cpu_set_t*affinity
 );
 
+/* Generated from spec:/rtems/intr/if/signal-variant */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief This enumeration provides interrupt trigger signal variants.
+ */
+typedef enum {
+  /**
+   * @brief This interrupt signal variant indicates that the interrupt trigger
+   *   signal is unspecified.
+   */
+  RTEMS_INTERRUPT_SIGNAL_UNSPECIFIED,
+
+  /**
+   * @brief This interrupt signal variant indicates that the interrupt is
+   *   triggered by a low level signal.
+   */
+  RTEMS_INTERRUPT_SIGNAL_LEVEL_LOW,
+
+  /**
+   * @brief This interrupt signal variant indicates that the interrupt is
+   *   triggered by a high level signal.
+   */
+  RTEMS_INTERRUPT_SIGNAL_LEVEL_HIGH,
+
+  /**
+   * @brief This interrupt signal variant indicates that the interrupt is
+   *   triggered by a falling edge signal.
+   */
+  RTEMS_INTERRUPT_SIGNAL_EDGE_FALLING,
+
+  /**
+   * @brief This interrupt signal variant indicates that the interrupt is
+   *   triggered by a raising edge signal.
+   */
+  RTEMS_INTERRUPT_SIGNAL_EDGE_RAISING
+} rtems_interrupt_signal_variant;
+
+/* Generated from spec:/rtems/intr/if/attributes */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief This structure provides the attributes of an interrupt vector.
+ *
+ * The rtems_interrupt_get_attributes() directive may be used to obtain the
+ * attributes of an interrupt vector.
+ */
+typedef struct {
+  /**
+   * @brief This member is true, if the interrupt vector is maskable by
+   *   rtems_interrupt_local_disable(), otherwise it is false.
+   *
+   * Interrupt vectors which are not maskable by 
rtems_interrupt_local_disable()
+   * should be used with care since they cannot use most operating system
+   * services.
+   */
+  bool is_maskable;
+
+  /**
+   * @brief This member is true, if the interrupt vector is always enabled,
+   *   otherwise it is false.
+   *
+   * For an always enabled interrupt vector it follows that it can be enabled 
and
+   * that it cannot be disabled.
+   */
+  bool always_enabled;
+
+  /**
+   * @brief This member is true, if the interrupt vector can be enabled by
+   *   rtems_interrupt_vector_enable(), otherwise it is false.
+   *
+   * When an interrupt vector can be enabled, this means that the enabled state
+   * can always be changed from disabled to enabled and from enabled to 
enabled.
+   * For an interrupt vector which can be enabled it follows that it may be
+   * enabled.
+   */
+  bool can_enable;
+
+  /**
+   * @brief This member is true, if the interrupt vector may be enabled by
+   *   rtems_interrupt_vector_enable(), otherwise it is false.
+   *
+   * When an interrupt vector may be enabled, this means that the enabled state
+   * may be changed from disabled to enabled and from enabled to enabled.  The
+   * requested enabled state change should be checked by
+   * rtems_interrupt_vector_is_enabled().  Some interrupt vectors may be
+   * optionally avaialable and cannot be enabled on a particular target.
+   */
+  bool maybe_enable;
+
+  /**
+   * @brief This member is true, if the interrupt vector can be disabled by
+   *   rtems_interrupt_vector_disable(), otherwise it is false.
+   *
+   * When an interrupt vector can be disabled, this means that the enabled 
state
+   * can be changed from disabled to disabled and from enabled to disabled.
+   */
+  bool can_disable;
+
+  /**
+   * @brief This member is true, if the interrupt vector can be caused by
+   *   rtems_interrupt_cause(), otherwise it is false.
+   */
+  bool can_cause;
+
+  /**
+   * @brief This member is true, if the interrupt vector can be caused on a
+   *   processor by rtems_interrupt_cause_on(), otherwise it is false.
+   */
+  bool can_cause_on;
+
+  /**
+   * @brief This member is true, if the interrupt vector can be cleared by
+   *   rtems_interrupt_clear(), otherwise it is false.
+   */
+  bool can_clear;
+
+  /**
+   * @brief This member is true, if the pending status of the interrupt
+   *   associated with the interrupt vector is cleared by an interrupt
+   *   acknowledge from the processor, otherwise it is false.
+   */
+  bool cleared_by_acknowledge;
+
+  /**
+   * @brief This member is true, if the affinity set of the interrupt vector 
can
+   *   be obtained by rtems_interrupt_get_affinity(), otherwise it is false.
+   */
+  bool can_get_affinity;
+
+  /**
+   * @brief This member is true, if the affinity set of the interrupt vector 
can
+   

[PATCH 01/41] bsps/irq: Move get/set affinity to separate file

[Sebastian Huber]

Update #3269.
---
 bsps/shared/irq-default-sources.am   |  1 +
 bsps/shared/irq-sources.am   |  1 +
 bsps/shared/irq/irq-affinity.c   | 90 
 bsps/shared/irq/irq-generic.c| 52 ---
 c/src/lib/libbsp/m68k/genmcf548x/Makefile.am |  1 +
 c/src/lib/libbsp/powerpc/ss555/Makefile.am   |  1 +
 spec/build/bsps/m68k/genmcf548x/obj.yml  |  1 +
 spec/build/bsps/objirq.yml   |  1 +
 spec/build/bsps/powerpc/ss555/bspss555.yml   |  1 +
 9 files changed, 97 insertions(+), 52 deletions(-)
 create mode 100644 bsps/shared/irq/irq-affinity.c

diff --git a/bsps/shared/irq-default-sources.am 
b/bsps/shared/irq-default-sources.am
index 1163f77bd8..6b4696dd26 100644
--- a/bsps/shared/irq-default-sources.am
+++ b/bsps/shared/irq-default-sources.am
@@ -1,3 +1,4 @@
+librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-affinity.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-default-handler.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-generic.c
diff --git a/bsps/shared/irq-sources.am b/bsps/shared/irq-sources.am
index a5e8e6ffdf..65c380a2da 100644
--- a/bsps/shared/irq-sources.am
+++ b/bsps/shared/irq-sources.am
@@ -1,3 +1,4 @@
+librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-affinity.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-generic.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-info.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-legacy.c
diff --git a/bsps/shared/irq/irq-affinity.c b/bsps/shared/irq/irq-affinity.c
new file mode 100644
index 00..f750d6b174
--- /dev/null
+++ b/bsps/shared/irq/irq-affinity.c
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief This source file contains the implementation of
+ *   rtems_interrupt_get_affinity() and rtems_interrupt_set_affinity().
+ */
+
+/*
+ * Copyright (C) 2017 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+
+#include 
+
+rtems_status_code rtems_interrupt_set_affinity(
+  rtems_vector_number  vector,
+  size_t   affinity_size,
+  const cpu_set_t *affinity
+)
+{
+  Processor_mask set;
+  Processor_mask_Copy_status status;
+
+  if (!bsp_interrupt_is_valid_vector(vector)) {
+return RTEMS_INVALID_ID;
+  }
+
+  status = _Processor_mask_From_cpu_set_t(&set, affinity_size, affinity);
+  if (status != PROCESSOR_MASK_COPY_LOSSLESS) {
+return RTEMS_INVALID_SIZE;
+  }
+
+#if defined(RTEMS_SMP)
+  bsp_interrupt_set_affinity(vector, &set);
+#endif
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code rtems_interrupt_get_affinity(
+  rtems_vector_number  vector,
+  size_t   affinity_size,
+  cpu_set_t   *affinity
+)
+{
+  Processor_mask set;
+  Processor_mask_Copy_status status;
+
+  if (!bsp_interrupt_is_valid_vector(vector)) {
+return RTEMS_INVALID_ID;
+  }
+
+#if defined(RTEMS_SMP)
+  bsp_interrupt_get_affinity(vector, &set);
+#else
+  _Processor_mask_From_index(&set, 0);
+#endif
+
+  status = _Processor_mask_To_cpu_set_t(&set, affinity_size, affinity);
+  if (status != PROCESSOR_MASK_COPY_LOSSLESS) {
+return RTEMS_INVALID_SIZE;
+  }
+
+  return RTEMS_SUCCESSFUL;
+}
diff --git a/bsps/shared/irq/irq-generic.c b/bsps/shared/irq/irq-generic.c
index 65971fb1b3..bea6612136 100644
--- a/bsps/shared/irq/irq-generic.c
+++ b/bsps/shared/irq/irq-generic.c
@@ -39,7 +39,6 @@
 
 #include 
 
-#include 
 #include 
 
 #ifdef BSP_INTERRUPT_USE

[PATCH 00/41] Document, enhance, and test Interrupt Manager Extension

[Sebastian Huber]

This patch set enhances the Interrupt Manager Extension so that it can be
tested with generic tests.  The following new directives are introduced for
this purpose:

* rtems_interrupt_get_attributes()

* rtems_interrupt_vector_is_enabled()

* rtems_interrupt_vector_enable()

* rtems_interrupt_vector_disable()

* rtems_interrupt_is_pending()

* rtems_interrupt_cause_on()

The documentation and the implementation for the following directives is also
provided:

* rtems_interrupt_cause()

* rtems_interrupt_clear()

A default implementation is provided for all BSPs so that the new test cases
link.  A proper implementation is provided for SPARC BSPs and AArch32/AArch64
BSPs which use the GIC.  I used an i.MX7D BSP to run the tests on real
hardware.  The tests don't run on Qemu currently due to a bug in the GIC
emulation:

https://lists.gnu.org/archive/html/qemu-devel/2021-07/msg02500.html

The following new directives were added to support interrupt handlers which are
managed through user-provided storage (rtems_interrupt_entry):

* rtems_interrupt_entry_initialize()

* rtems_interrupt_entry_install()

* rtems_interrupt_entry_remove()

All directives are documented in the RTEMS Classic API Guide:

https://ftp.rtems.org/pub/rtems/people/sebh/c-user.pdf

See also:

https://lists.rtems.org/pipermail/devel/2019-October/055770.html

https://devel.rtems.org/ticket/3269

Sebastian Huber (41):
  bsps/irq: Move get/set affinity to separate file
  bsps/irq: Canonicalize get/set affinity errors
  bsps/irq: Move handler iterate to separate file
  rtems: Add rtems_interrupt_cause_on()
  rtems: Generate 
  rtems: Add rtems_interrupt_get_attributes()
  rtems: Add rtems_interrupt_vector_enable()
  rtems: Add rtems_interrupt_vector_is_enabled()
  rtems: Add rtems_interrupt_is_pending()
  rtems: Add RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT
  bsps/irq: Add rtems_interrupt_vector_is_enabled()
  bsps/irq: Add rtems_interrupt_cause()
  bsps/irq: Add rtems_interrupt_get_attributes()
  bsps/irq: Add rtems_interrupt_is_pending()
  bsps/irq: bsp_interrupt_vector_enable()
  bsps/irq: bsp_interrupt_vector_disable()
  bsps/irq: bsp_interrupt_get_affinity()
  bsps/irq: bsp_interrupt_set_affinity()
  bsps/irq: Implement new directives for GICv2/3
  sparc/irq: Implement new interrupt directives
  rtems: Add rtems_interrupt_entry_install()
  bsps/irq: Use rtems_interrupt_entry
  bsps/irq: Add bsp_interrupt_check_and_lock()
  bsps/irq: Move bsp_interrupt_handler_is_empty()
  bsps/irq: Add rtems_interrupt_entry_install()
  bsp/raspberrypi: Add interrupt get/set affinity
  validation: Add CallWithinISR()
  validation: HasInterruptVectorEntriesInstalled()
  validation: GetValidInterruptVectorNumber()
  validation: Test rtems_interrupt_get_attributes()
  validation: rtems_interrupt_vector_is_enabled()
  validation: Test rtems_interrupt_vector_enable()
  validation: Test rtems_interrupt_vector_disable()
  validation: Test rtems_interrupt_entry_install()
  validation: Test rtems_interrupt_entry_remove()
  validation: Test rtems_interrupt_cause()
  validation: Test rtems_interrupt_clear()
  validation: Test rtems_interrupt_is_pending()
  validation: Test rtems_interrupt_cause_on()
  validation: Test rtems_interrupt_get_affinity()
  validation: Test rtems_interrupt_set_affinity()

 bsps/arm/beagle/irq/irq.c |   48 +-
 bsps/arm/csb336/irq/irq.c |   50 +-
 bsps/arm/csb337/irq/irq.c |   48 +-
 bsps/arm/edb7312/irq/irq.c|   50 +-
 bsps/arm/gumstix/irq/irq.c|   48 +-
 bsps/arm/lpc24xx/irq/irq.c|   48 +-
 bsps/arm/lpc32xx/irq/irq.c|   50 +-
 bsps/arm/raspberrypi/include/bsp/irq.h|   26 +
 bsps/arm/raspberrypi/irq/irq.c|   59 +-
 bsps/arm/rtl22xx/irq/irq.c|   48 +-
 bsps/arm/shared/irq/irq-armv7m.c  |   48 +-
 bsps/arm/smdk2410/irq/irq.c   |   48 +-
 bsps/arm/tms570/irq/irq.c |   48 +-
 bsps/i386/shared/irq/irq.c|   53 +-
 bsps/include/bsp/irq-generic.h|  429 ++-
 bsps/include/dev/irq/arm-gic-irq.h|7 +-
 bsps/lm32/shared/irq/irq.c|   48 +-
 bsps/m68k/genmcf548x/include/bsp/irq.h|8 +
 bsps/m68k/genmcf548x/irq/irq.c|  188 +-
 bsps/mips/shared/irq/irq.c|   48 +-
 bsps/powerpc/gen5200/irq/irq.c|   50 +-
 bsps/powerpc/gen83xx/irq/irq.c|   50 +-
 bsps/powerpc/mpc55xxevb/start/irq.c   |   48 +-
 bsps/powerpc/mpc8260ads/irq/irq.c |   50 +-
 bsps/powerpc/psim/irq/irq_init.c  |   48 +-
 bsps/powerpc/qemuppc/irq/irq_init.c   |   48 +-
 bsps/powerpc/qoriq/include/bsp/irq.h  |4 +-
 bsps/powerpc/qoriq/irq/irq.c  |  126 +-
 bsps/powerpc/shared/irq/ppc-irq-generic.c |   48 +-
 bsps/powerpc/t32mppc/include/bsp/irq.h|6 +-

[PATCH 02/41] bsps/irq: Canonicalize get/set affinity errors

[Sebastian Huber]

Bring the error conditions and status in line with
rtems_task_get_affinity() and rtems_task_set_affinity().

Update #3269.
---
 bsps/shared/irq/irq-affinity.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/bsps/shared/irq/irq-affinity.c b/bsps/shared/irq/irq-affinity.c
index f750d6b174..d2214cf6ec 100644
--- a/bsps/shared/irq/irq-affinity.c
+++ b/bsps/shared/irq/irq-affinity.c
@@ -47,13 +47,17 @@ rtems_status_code rtems_interrupt_set_affinity(
   Processor_mask set;
   Processor_mask_Copy_status status;
 
+  if ( affinity == NULL ) {
+return RTEMS_INVALID_ADDRESS;
+  }
+
   if (!bsp_interrupt_is_valid_vector(vector)) {
 return RTEMS_INVALID_ID;
   }
 
   status = _Processor_mask_From_cpu_set_t(&set, affinity_size, affinity);
-  if (status != PROCESSOR_MASK_COPY_LOSSLESS) {
-return RTEMS_INVALID_SIZE;
+  if ( !_Processor_mask_Is_at_most_partial_loss( status ) ) {
+return RTEMS_INVALID_NUMBER;
   }
 
 #if defined(RTEMS_SMP)
@@ -71,6 +75,10 @@ rtems_status_code rtems_interrupt_get_affinity(
   Processor_mask set;
   Processor_mask_Copy_status status;
 
+  if ( affinity == NULL ) {
+return RTEMS_INVALID_ADDRESS;
+  }
+
   if (!bsp_interrupt_is_valid_vector(vector)) {
 return RTEMS_INVALID_ID;
   }
-- 
2.26.2

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[PATCH 08/41] rtems: Add rtems_interrupt_vector_is_enabled()

[Sebastian Huber]

Update #3269.
---
 cpukit/include/rtems/irq-extension.h | 50 
 1 file changed, 50 insertions(+)

diff --git a/cpukit/include/rtems/irq-extension.h 
b/cpukit/include/rtems/irq-extension.h
index 2df18b2b0d..4a8f0b7879 100644
--- a/cpukit/include/rtems/irq-extension.h
+++ b/cpukit/include/rtems/irq-extension.h
@@ -315,6 +315,56 @@ rtems_status_code rtems_interrupt_handler_remove(
   void   *arg
 );
 
+/* Generated from spec:/rtems/intr/if/vector-is-enabled */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Checks if the interrupt vector is enabled.
+ *
+ * @param vector is the interrupt vector number.
+ *
+ * @param[out] enabled is the pointer to a ``bool`` object.  When the directive
+ *   call is successful, the enabled status of the interrupt associated with
+ *   the interrupt vector specified by ``vector`` will be stored in this
+ *   object.  When the interrupt was enabled for the processor executing the
+ *   directive call at some time point during the call, the object value will
+ *   be set to true, otherwise to false.
+ *
+ * The directive checks if the interrupt associated with the interrupt vector
+ * specified by ``vector`` was enabled for the processor executing the
+ * directive call at some time point during the call.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_ADDRESS The ``enabled`` parameter was NULL.
+ *
+ * @retval ::RTEMS_INVALID_ID There was no interrupt vector associated with the
+ *   number specified by ``vector``.
+ *
+ * @par Notes
+ * Interrupt vectors may be enabled by rtems_interrupt_vector_enable() and
+ * disabled by rtems_interrupt_vector_disable().
+ *
+ * @par Constraints
+ * @parblock
+ * The following constraints apply to this directive:
+ *
+ * * The directive may be called from within interrupt context.
+ *
+ * * The directive may be called from within device driver initialization
+ *   context.
+ *
+ * * The directive may be called from within task context.
+ *
+ * * The directive will not cause the calling task to be preempted.
+ * @endparblock
+ */
+rtems_status_code rtems_interrupt_vector_is_enabled(
+  rtems_vector_number vector,
+  bool   *enabled
+);
+
 /* Generated from spec:/rtems/intr/if/vector-enable */
 
 /**
-- 
2.26.2

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[PATCH 03/41] bsps/irq: Move handler iterate to separate file

[Sebastian Huber]

Update #3269.
---
 bsps/include/bsp/irq-generic.h   | 57 
 bsps/shared/irq-default-sources.am   |  1 +
 bsps/shared/irq-sources.am   |  1 +
 bsps/shared/irq/irq-generic.c| 86 +-
 bsps/shared/irq/irq-handler-iterate.c| 96 
 c/src/lib/libbsp/m68k/genmcf548x/Makefile.am |  1 +
 c/src/lib/libbsp/powerpc/ss555/Makefile.am   |  1 +
 spec/build/bsps/m68k/genmcf548x/obj.yml  |  1 +
 spec/build/bsps/objirq.yml   |  1 +
 spec/build/bsps/powerpc/ss555/bspss555.yml   |  1 +
 10 files changed, 164 insertions(+), 82 deletions(-)
 create mode 100644 bsps/shared/irq/irq-handler-iterate.c

diff --git a/bsps/include/bsp/irq-generic.h b/bsps/include/bsp/irq-generic.h
index 8f7683c517..72c1d51332 100644
--- a/bsps/include/bsp/irq-generic.h
+++ b/bsps/include/bsp/irq-generic.h
@@ -322,6 +322,63 @@ void bsp_interrupt_lock(void);
 /* For internal use only */
 void bsp_interrupt_unlock(void);
 
+/**
+ * @brief This table contains a bit map which indicates if an entry is unique
+ *   or shared.
+ *
+ * If the bit associated with a vector is set, then the entry is unique,
+ * otherwise it may be shared.  If the bit with index
+ * #BSP_INTERRUPT_HANDLER_TABLE_SIZE is set, then the interrupt support is
+ * initialized, otherwise it is not initialized.
+ */
+extern uint8_t bsp_interrupt_handler_unique_table[];
+
+/**
+ * @brief Checks if the handler entry associated with the hander index is
+ *   unique.
+ *
+ * @param index is the handler index to check.
+ *
+ * @return Returns true, if handler entry associated with the hander index is
+ *   unique, otherwise false.
+ */
+static inline bool bsp_interrupt_is_handler_unique( rtems_vector_number index )
+{
+  rtems_vector_number table_index;
+  uint8_t bit;
+
+  table_index = index / 8;
+  bit = (uint8_t) ( 1U << ( index % 8 ) );
+
+  return ( bsp_interrupt_handler_unique_table[ table_index ] & bit ) != 0;
+}
+
+/**
+ * @brief Checks if the interrupt support is initialized.
+ *
+ * @return Returns true, if the interrupt support is initialized, otherwise
+ *   false.
+ */
+static inline bool bsp_interrupt_is_initialized( void )
+{
+  return bsp_interrupt_is_handler_unique( BSP_INTERRUPT_HANDLER_TABLE_SIZE );
+}
+
+/**
+ * @brief This handler routine is used for empty entries.
+ */
+void bsp_interrupt_handler_empty( void *arg );
+
+/**
+ * @brief Checks if a handler entry is empty.
+ */
+static inline bool bsp_interrupt_is_empty_handler_entry(
+  const bsp_interrupt_handler_entry *entry
+)
+{
+  return entry->handler == bsp_interrupt_handler_empty;
+}
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/bsps/shared/irq-default-sources.am 
b/bsps/shared/irq-default-sources.am
index 6b4696dd26..9f0e4686f7 100644
--- a/bsps/shared/irq-default-sources.am
+++ b/bsps/shared/irq-default-sources.am
@@ -2,6 +2,7 @@ librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-affinity.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-default-handler.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-generic.c
+librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-handler-iterate.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-info.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-lock.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-server.c
diff --git a/bsps/shared/irq-sources.am b/bsps/shared/irq-sources.am
index 65c380a2da..776958dd8f 100644
--- a/bsps/shared/irq-sources.am
+++ b/bsps/shared/irq-sources.am
@@ -1,5 +1,6 @@
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-affinity.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-generic.c
+librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-handler-iterate.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-info.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-legacy.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-lock.c
diff --git a/bsps/shared/irq/irq-generic.c b/bsps/shared/irq/irq-generic.c
index bea6612136..81da647228 100644
--- a/bsps/shared/irq/irq-generic.c
+++ b/bsps/shared/irq/irq-generic.c
@@ -50,14 +50,14 @@ bsp_interrupt_handler_entry bsp_interrupt_handler_table
   [BSP_INTERRUPT_HANDLER_TABLE_SIZE];
 
 /* The last entry indicates if everything is initialized */
-static uint8_t bsp_interrupt_handler_unique_table
-  [(BSP_INTERRUPT_HANDLER_TABLE_SIZE + 7 + 1) / 8];
+uint8_t bsp_interrupt_handler_unique_table
+  [ ( BSP_INTERRUPT_HANDLER_TABLE_SIZE + 7 + 1 ) / 8 ];
 
-static void bsp_interrupt_handler_empty(void *arg)
+void bsp_interrupt_handler_empty( void *arg )
 {
   rtems_vector_number vector = (rtems_vector_number) (uintptr_t) arg;
 
-  bsp_interrupt_handler_default(vector);
+  bsp_interrupt_handler_default( vector );
 }
 
 #

[PATCH 07/41] rtems: Add rtems_interrupt_vector_enable()

[Sebastian Huber]

Add rtems_interrupt_vector_disable().

Update #3269.
---
 bsps/shared/irq-default-sources.am   |  1 +
 bsps/shared/irq-sources.am   |  1 +
 bsps/shared/irq/irq-enable-disable.c | 59 +
 c/src/lib/libbsp/m68k/genmcf548x/Makefile.am |  1 +
 c/src/lib/libbsp/powerpc/ss555/Makefile.am   |  1 +
 cpukit/include/rtems/irq-extension.h | 88 
 spec/build/bsps/m68k/genmcf548x/obj.yml  |  1 +
 spec/build/bsps/objirq.yml   |  1 +
 spec/build/bsps/powerpc/ss555/bspss555.yml   |  1 +
 9 files changed, 154 insertions(+)
 create mode 100644 bsps/shared/irq/irq-enable-disable.c

diff --git a/bsps/shared/irq-default-sources.am 
b/bsps/shared/irq-default-sources.am
index 9f0e4686f7..fe3352f7e5 100644
--- a/bsps/shared/irq-default-sources.am
+++ b/bsps/shared/irq-default-sources.am
@@ -1,6 +1,7 @@
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-affinity.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-default-handler.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-enable-disable.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-generic.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-handler-iterate.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-info.c
diff --git a/bsps/shared/irq-sources.am b/bsps/shared/irq-sources.am
index 776958dd8f..d2536eb56d 100644
--- a/bsps/shared/irq-sources.am
+++ b/bsps/shared/irq-sources.am
@@ -1,4 +1,5 @@
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-affinity.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-enable-disable.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-generic.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-handler-iterate.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-info.c
diff --git a/bsps/shared/irq/irq-enable-disable.c 
b/bsps/shared/irq/irq-enable-disable.c
new file mode 100644
index 00..792f5e60c6
--- /dev/null
+++ b/bsps/shared/irq/irq-enable-disable.c
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief This source file contains the implementation of
+ *   rtems_interrupt_vector_enable() and rtems_interrupt_vector_disable().
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+
+rtems_status_code rtems_interrupt_vector_enable( rtems_vector_number vector )
+{
+  if ( !bsp_interrupt_is_valid_vector( vector ) ) {
+return RTEMS_INVALID_ID;
+  }
+
+  bsp_interrupt_vector_enable( vector );
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code rtems_interrupt_vector_disable( rtems_vector_number vector )
+{
+  if ( !bsp_interrupt_is_valid_vector( vector ) ) {
+return RTEMS_INVALID_ID;
+  }
+
+  bsp_interrupt_vector_disable( vector );
+
+  return RTEMS_SUCCESSFUL;
+}
diff --git a/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am 
b/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
index 88a1ab0e5b..ecc8c99b26 100644
--- a/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
+++ b/c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
@@ -40,6 +40,7 @@ librtemsbsp_a_SOURCES += 
../../../../../../bsps/m68k/genmcf548x/btimer/btimer.c
 # IRQ
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-affinity.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-default-handler.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-enable-disable.c
 librtemsbsp_a_SOURCES += 
../../../../../.

[PATCH 17/41] bsps/irq: bsp_interrupt_get_affinity()

[Sebastian Huber]

Return a status code for bsp_interrupt_get_affinity().

Update #3269.
---
 bsps/include/dev/irq/arm-gic-irq.h | 2 +-
 bsps/powerpc/qoriq/include/bsp/irq.h   | 2 +-
 bsps/powerpc/qoriq/irq/irq.c   | 5 +++--
 bsps/powerpc/t32mppc/include/bsp/irq.h | 3 ++-
 bsps/riscv/griscv/include/bsp/irq.h| 2 +-
 bsps/riscv/griscv/irq/irq.c| 4 +++-
 bsps/riscv/riscv/include/bsp/irq.h | 2 +-
 bsps/riscv/riscv/irq/irq.c | 4 +++-
 bsps/shared/dev/irq/arm-gicv2.c| 3 ++-
 bsps/shared/dev/irq/arm-gicv3.c| 3 ++-
 bsps/shared/irq/irq-affinity.c | 9 -
 bsps/sparc/erc32/include/bsp/irq.h | 3 ++-
 bsps/sparc/leon3/include/bsp/irq.h | 2 +-
 bsps/sparc/leon3/start/eirq.c  | 3 ++-
 bsps/sparc/shared/irq/irq-shared.c | 2 +-
 15 files changed, 33 insertions(+), 16 deletions(-)

diff --git a/bsps/include/dev/irq/arm-gic-irq.h 
b/bsps/include/dev/irq/arm-gic-irq.h
index 5ce9d54684..730d792ce4 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -74,7 +74,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/powerpc/qoriq/include/bsp/irq.h 
b/bsps/powerpc/qoriq/include/bsp/irq.h
index cf46832045..6618d54190 100644
--- a/bsps/powerpc/qoriq/include/bsp/irq.h
+++ b/bsps/powerpc/qoriq/include/bsp/irq.h
@@ -385,7 +385,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/powerpc/qoriq/irq/irq.c b/bsps/powerpc/qoriq/irq/irq.c
index f1b50a7dd8..9ca903496c 100644
--- a/bsps/powerpc/qoriq/irq/irq.c
+++ b/bsps/powerpc/qoriq/irq/irq.c
@@ -64,7 +64,7 @@ void bsp_interrupt_set_affinity(
rtems_interrupt_lock_release(&lock, &lock_context);
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
rtems_vector_number vector,
Processor_mask *affinity
 )
@@ -75,6 +75,7 @@ void bsp_interrupt_get_affinity(
 
ev_int_get_config(vector, &config, &priority, &destination);
_Processor_mask_From_uint32_t(affinity, destination, 0);
+   return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_get_attributes(
@@ -323,7 +324,7 @@ void bsp_interrupt_set_affinity(
src_cfg->dr = _Processor_mask_To_uint32_t(affinity, 0);
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
rtems_vector_number vector,
Processor_mask *affinity
 )
diff --git a/bsps/powerpc/t32mppc/include/bsp/irq.h 
b/bsps/powerpc/t32mppc/include/bsp/irq.h
index 998eadf3df..c0c374edae 100644
--- a/bsps/powerpc/t32mppc/include/bsp/irq.h
+++ b/bsps/powerpc/t32mppc/include/bsp/irq.h
@@ -35,13 +35,14 @@ RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity(
   (void) affinity;
 }
 
-RTEMS_INLINE_ROUTINE void bsp_interrupt_get_affinity(
+RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number  vector,
   Processor_mask  *affinity
 )
 {
   (void) vector;
   _Processor_mask_From_index( affinity, 0 );
+  return RTEMS_SUCCESSFUL;
 }
 
 #ifdef __cplusplus
diff --git a/bsps/riscv/griscv/include/bsp/irq.h 
b/bsps/riscv/griscv/include/bsp/irq.h
index f9e280d5a9..1df7b4b584 100644
--- a/bsps/riscv/griscv/include/bsp/irq.h
+++ b/bsps/riscv/griscv/include/bsp/irq.h
@@ -61,7 +61,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/riscv/griscv/irq/irq.c b/bsps/riscv/griscv/irq/irq.c
index f5b493bd02..1128678d3b 100644
--- a/bsps/riscv/griscv/irq/irq.c
+++ b/bsps/riscv/griscv/irq/irq.c
@@ -156,7 +156,7 @@ rtems_status_code 
bsp_interrupt_vector_disable(rtems_vector_number vector)
   return RTEMS_SUCCESSFUL;
 }
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 )
@@ -171,6 +171,8 @@ void bsp_interrupt_get_affinity(
   _Processor_mask_Set(affinity, cpu_index);
 }
   }
+
+  return RTEMS_SUCCESSFUL;
 }
 
 void bsp_interrupt_set_affinity(
diff --git a/bsps/riscv/riscv/include/bsp/irq.h 
b/bsps/riscv/riscv/include/bsp/irq.h
index 306988d5e3..03fe8ced3a 100644
--- a/bsps/riscv/riscv/include/bsp/irq.h
+++ b/bsps/riscv/riscv/include/bsp/irq.h
@@ -61,7 +61,7 @@ void bsp_interrupt_set_affinity(
   const Processor_mask *affinity
 );
 
-void bsp_interrupt_get_affinity(
+rtems_status_code bsp_interrupt_get_affinity(
   rtems_vector_number vector,
   Processor_mask *affinity
 );
diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c
index 52b14ee9e6..555365b2aa 100644
--- a/bsps/risc

[PATCH 15/41] bsps/irq: bsp_interrupt_vector_enable()

[Sebastian Huber]

Return a status code for bsp_interrupt_vector_enable().

Update #3269.
---
 bsps/arm/beagle/irq/irq.c |  3 ++-
 bsps/arm/csb336/irq/irq.c |  4 +++-
 bsps/arm/csb337/irq/irq.c |  3 ++-
 bsps/arm/edb7312/irq/irq.c|  4 +++-
 bsps/arm/gumstix/irq/irq.c|  3 ++-
 bsps/arm/lpc24xx/irq/irq.c|  3 ++-
 bsps/arm/lpc32xx/irq/irq.c|  4 +++-
 bsps/arm/raspberrypi/irq/irq.c|  3 ++-
 bsps/arm/rtl22xx/irq/irq.c|  3 ++-
 bsps/arm/shared/irq/irq-armv7m.c  |  3 ++-
 bsps/arm/smdk2410/irq/irq.c   |  3 ++-
 bsps/arm/tms570/irq/irq.c |  3 ++-
 bsps/i386/shared/irq/irq.c|  3 ++-
 bsps/include/bsp/irq-generic.h| 16 ++--
 bsps/lm32/shared/irq/irq.c|  3 ++-
 bsps/m68k/genmcf548x/irq/irq.c|  4 +++-
 bsps/mips/shared/irq/irq.c|  3 ++-
 bsps/powerpc/gen5200/irq/irq.c|  4 +++-
 bsps/powerpc/gen83xx/irq/irq.c|  4 +++-
 bsps/powerpc/mpc55xxevb/start/irq.c   |  3 ++-
 bsps/powerpc/mpc8260ads/irq/irq.c |  4 +++-
 bsps/powerpc/psim/irq/irq_init.c  |  3 ++-
 bsps/powerpc/qemuppc/irq/irq_init.c   |  3 ++-
 bsps/powerpc/qoriq/irq/irq.c  |  5 +++--
 bsps/powerpc/shared/irq/ppc-irq-generic.c |  3 ++-
 bsps/powerpc/t32mppc/irq/irq.c|  3 ++-
 bsps/powerpc/tqm8xx/irq/irq.c |  4 +++-
 bsps/powerpc/virtex/irq/irq_init.c|  4 +++-
 bsps/riscv/griscv/irq/irq.c   |  3 ++-
 bsps/riscv/riscv/irq/irq.c|  4 +++-
 bsps/shared/dev/irq/arm-gicv2.c   |  3 ++-
 bsps/shared/dev/irq/arm-gicv3.c   |  4 +++-
 bsps/shared/irq/irq-default.c |  3 ++-
 bsps/shared/irq/irq-enable-disable.c  |  4 +---
 bsps/sparc/leon3/start/eirq.c |  3 ++-
 bsps/sparc/shared/irq/irq-shared.c|  3 ++-
 bsps/x86_64/amd64/interrupts/idt.c|  3 ++-
 37 files changed, 93 insertions(+), 45 deletions(-)

diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c
index e34a89afff..7953a2fe1f 100644
--- a/bsps/arm/beagle/irq/irq.c
+++ b/bsps/arm/beagle/irq/irq.c
@@ -137,7 +137,7 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
   return RTEMS_UNSATISFIED;
 }
 
-void bsp_interrupt_vector_enable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
   uint32_t mask, cur;
   uint32_t mir_reg = omap_get_mir_reg(vector, &mask);
@@ -147,6 +147,7 @@ void bsp_interrupt_vector_enable(rtems_vector_number vector)
   cur = mmio_read(omap_intr.base + mir_reg);
   mmio_write(omap_intr.base + mir_reg, cur & ~mask);
   flush_data_cache();
+  return RTEMS_SUCCESSFUL;
 }
 
 void bsp_interrupt_vector_disable(rtems_vector_number vector)
diff --git a/bsps/arm/csb336/irq/irq.c b/bsps/arm/csb336/irq/irq.c
index 13f094e1fb..d47f0362e8 100644
--- a/bsps/arm/csb336/irq/irq.c
+++ b/bsps/arm/csb336/irq/irq.c
@@ -68,12 +68,14 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
   return RTEMS_UNSATISFIED;
 }
 
-void bsp_interrupt_vector_enable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
 
   if (vector < MC9328MXL_NUM_INTS)
 MC9328MXL_AITC_INTENNUM = vector;
+
+  return RTEMS_SUCCESSFUL;
 }
 
 void bsp_interrupt_vector_disable(rtems_vector_number vector)
diff --git a/bsps/arm/csb337/irq/irq.c b/bsps/arm/csb337/irq/irq.c
index 1b13f0b461..a4bfb1f83b 100644
--- a/bsps/arm/csb337/irq/irq.c
+++ b/bsps/arm/csb337/irq/irq.c
@@ -69,10 +69,11 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
   return RTEMS_UNSATISFIED;
 }
 
-void bsp_interrupt_vector_enable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
   AIC_CTL_REG(AIC_IECR) = 1 << vector;
+  return RTEMS_SUCCESSFUL;
 }
 
 void bsp_interrupt_vector_disable(rtems_vector_number vector)
diff --git a/bsps/arm/edb7312/irq/irq.c b/bsps/arm/edb7312/irq/irq.c
index 75dffdec9f..3cff5bfff2 100644
--- a/bsps/arm/edb7312/irq/irq.c
+++ b/bsps/arm/edb7312/irq/irq.c
@@ -69,7 +69,7 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
   return RTEMS_UNSATISFIED;
 }
 
-void bsp_interrupt_vector_enable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
 
@@ -93,6 +93,8 @@ void bsp_interrupt_vector_enable(rtems_vector_number vector)
 /* interrupt managed by INTMR3 and INTSR3 */
 *EP7312_INTMR3 |= (1 << (vector - 21));
 }
+
+return RTEMS_SUCCESSFUL;
 }
 
 void bsp_interrupt_vector_disable(rtems_vector_number vector)
diff --git a/bsps/arm/gumstix/irq/irq.c b/bsps/arm/gumstix/irq/irq.c
index d28e4c051f..bba91f1d

[PATCH 05/41] rtems: Generate

[Sebastian Huber]

Use  which just provides the data types and avoid a
dependency on  which contains the full chain
implementation.

Change license to BSD-2-Clause according to file histories and
documentation re-licensing agreement.

Update #3269.
Update #3899.
Update #3993.
---
 cpukit/include/rtems/irq-extension.h | 1830 +++---
 1 file changed, 1354 insertions(+), 476 deletions(-)

diff --git a/cpukit/include/rtems/irq-extension.h 
b/cpukit/include/rtems/irq-extension.h
index 915be09e2b..5f24fb502e 100644
--- a/cpukit/include/rtems/irq-extension.h
+++ b/cpukit/include/rtems/irq-extension.h
@@ -1,294 +1,566 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
 /**
  * @file
  *
- * @ingroup rtems_interrupt_extension
+ * @ingroup RTEMSAPIClassicIntr
  *
- * @brief Header file for the Interrupt Manager Extension.
+ * @brief This header file defines the Interrupt Manager Extension API.
+ */
+
+/*
+ * Copyright (C) 2008, 2021 embedded brains GmbH 
(http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
  */
 
 /*
- * Based on concepts of Pavel Pisa, Till Straumann and Eric Valette.
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
  *
- * Copyright (C) 2008, 2020 embedded brains GmbH 
(http://www.embedded-brains.de)
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
  *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * https://docs.rtems.org
  */
 
-#ifndef RTEMS_IRQ_EXTENSION_H
-#define RTEMS_IRQ_EXTENSION_H
+/* Generated from spec:/rtems/intr/if/header-2 */
 
-#include 
-#include 
+#ifndef _RTEMS_IRQ_EXTENSION_H
+#define _RTEMS_IRQ_EXTENSION_H
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
 
 #ifdef __cplusplus
 extern "C" {
-#endif /* __cplusplus */
+#endif
+
+/* Generated from spec:/rtems/intr/if/handler */
 
 /**
- * @defgroup rtems_interrupt_extension Interrupt Manager Extension
- *
  * @ingroup RTEMSAPIClassicIntr
  *
- * In addition to the Classic API interrupt handler with a handle are
- * supported.  You can also install multiple shared handler for one interrupt
- * vector.
+ * @brief Interrupt handler routines shall have this type.
  */
-/**@{**/
+typedef void ( *rtems_interrupt_handler )( void * );
+
+/* Generated from spec:/rtems/intr/if/per-handler-routine */
 
 /**
- * @brief Makes the interrupt handler unique.  Prevents other handler from
- * using the same interrupt vector.
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Visitor routines invoked by rtems_interrupt_handler_iterate() shall
+ *   have this type.
  */
-#define RTEMS_INTERRUPT_UNIQUE ((rtems_option) 0x0001)
+typedef void ( *rtems_interrupt_per_handler_routine )(
+  void *,
+  const char *,
+  rtems_option,
+  rtems_interrupt_handler,
+  void *
+);
+
+/* Generated from spec:/rtems/intr/if/shared */
 
 /**
- * @brief Allows that this interrupt handler may share a common interrupt
- * vector with other handler.
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief This interrupt handler install option allows that the interrupt
+ *   handler may share the interrupt vector with other handler.
  */
-#define RTEMS_

[PATCH 27/41] validation: Add CallWithinISR()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/libvalidation.yml   |   1 +
 testsuites/validation/tx-call-within-isr.c| 134 ++
 testsuites/validation/tx-support.h|  14 ++
 3 files changed, 149 insertions(+)
 create mode 100644 testsuites/validation/tx-call-within-isr.c

diff --git a/spec/build/testsuites/validation/libvalidation.yml 
b/spec/build/testsuites/validation/libvalidation.yml
index d55d4b9e41..54c7ae0ac0 100644
--- a/spec/build/testsuites/validation/libvalidation.yml
+++ b/spec/build/testsuites/validation/libvalidation.yml
@@ -11,6 +11,7 @@ install: []
 install-path: null
 links: []
 source:
+- testsuites/validation/tx-call-within-isr.c
 - testsuites/validation/tx-support.c
 target: validation
 type: build
diff --git a/testsuites/validation/tx-call-within-isr.c 
b/testsuites/validation/tx-call-within-isr.c
new file mode 100644
index 00..226647c0bc
--- /dev/null
+++ b/testsuites/validation/tx-call-within-isr.c
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestSuites
+ *
+ * @brief This source file contains the implementation of CallWithinISR(),
+ *   CallWithinISRSubmit(), and CallWithinISRWait().
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "tx-support.h"
+
+#include 
+#include 
+
+#include 
+
+/* Some target architectures need this variable for  */
+uint32_t Interrupt_nest;
+
+#define _RTEMS_TMTEST27
+
+#include 
+
+typedef struct {
+  Chain_Control pending;
+  RTEMS_INTERRUPT_LOCK_MEMBER( lock )
+} CallWithinISRContext;
+
+static CallWithinISRContext CallWithinISRInstance = {
+#if defined( RTEMS_SMP )
+  .lock = RTEMS_INTERRUPT_LOCK_INITIALIZER( "CallWithinISR" ),
+#endif
+  .pending = CHAIN_INITIALIZER_EMPTY( CallWithinISRInstance.pending )
+};
+
+static void CallWithinISRHandler( rtems_vector_number vector )
+{
+  CallWithinISRContext *ctx;
+
+  (void) vector;
+  ctx = &CallWithinISRInstance;
+
+  while ( true ) {
+rtems_interrupt_lock_context lock_context;
+CallWithinISRRequest*request;
+
+rtems_interrupt_lock_acquire( &ctx->lock, &lock_context );
+request = (CallWithinISRRequest *)
+  _Chain_Get_unprotected( &ctx->pending );
+rtems_interrupt_lock_release( &ctx->lock, &lock_context );
+
+if ( request == NULL ) {
+  break;
+}
+
+( *request->handler )( request->arg );
+_Atomic_Store_uint( &request->done, 1, ATOMIC_ORDER_RELEASE );
+  }
+}
+
+void CallWithinISR( void ( *handler )( void * ), void *arg )
+{
+  CallWithinISRRequest request;
+
+  request.handler = handler;
+  request.arg = arg;
+  CallWithinISRSubmit( &request );
+  CallWithinISRWait( &request );
+}
+
+void CallWithinISRSubmit( CallWithinISRRequest *request )
+{
+  CallWithinISRContext*ctx;
+  rtems_interrupt_lock_context lock_context;
+
+  ctx = &CallWithinISRInstance;
+
+  rtems_interrupt_lock_acquire( &ctx->lock, &lock_context );
+  _Atomic_Store_uint( &request->done, 0, ATOMIC_ORDER_RELAXED );
+  _Chain_Initialize_node( &request->node );
+  _Chain_Append_unprotected( &ctx->pending, &request->node );
+  rtems_interrupt_lock_release( &ctx->lock, &lock_context );
+
+  Cause_tm27_intr();
+}
+
+void CallWithinISRWait( const CallWithinISRRequest *request )
+{
+  while ( _Atomic_Load_uint( &request->done, ATOMIC_ORDER_ACQUIRE ) == 0 ) {
+/* Wait */
+  }
+}
+
+static void CallWithinISRInitialize( void )
+{
+  Install_tm27_vector( CallWithinISRHandler );
+}
+
+RTEMS_SYSINIT_ITEM(
+  CallWithinISRInitialize,
+  RTEMS_SYSINIT_DEVICE_DRIVERS,
+  RTEMS_SYSINIT_ORDER_MIDDLE
+);

[PATCH 11/41] bsps/irq: Add rtems_interrupt_vector_is_enabled()

[Sebastian Huber]

Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.

Update #3269.
---
 bsps/arm/beagle/irq/irq.c | 11 +++
 bsps/arm/csb336/irq/irq.c | 11 +++
 bsps/arm/csb337/irq/irq.c | 11 +++
 bsps/arm/edb7312/irq/irq.c| 11 +++
 bsps/arm/gumstix/irq/irq.c| 11 +++
 bsps/arm/lpc24xx/irq/irq.c| 11 +++
 bsps/arm/lpc32xx/irq/irq.c| 11 +++
 bsps/arm/raspberrypi/irq/irq.c| 11 +++
 bsps/arm/rtl22xx/irq/irq.c| 11 +++
 bsps/arm/shared/irq/irq-armv7m.c  | 11 +++
 bsps/arm/smdk2410/irq/irq.c   | 11 +++
 bsps/arm/tms570/irq/irq.c | 11 +++
 bsps/i386/shared/irq/irq.c| 11 +++
 bsps/include/bsp/irq-generic.h| 23 +++
 bsps/lm32/shared/irq/irq.c| 11 +++
 bsps/m68k/genmcf548x/irq/irq.c| 11 +++
 bsps/mips/shared/irq/irq.c| 11 +++
 bsps/powerpc/gen5200/irq/irq.c| 11 +++
 bsps/powerpc/gen83xx/irq/irq.c| 11 +++
 bsps/powerpc/mpc55xxevb/start/irq.c   | 11 +++
 bsps/powerpc/mpc8260ads/irq/irq.c | 11 +++
 bsps/powerpc/psim/irq/irq_init.c  | 11 +++
 bsps/powerpc/qemuppc/irq/irq_init.c   | 11 +++
 bsps/powerpc/qoriq/irq/irq.c  | 22 ++
 bsps/powerpc/shared/irq/ppc-irq-generic.c | 11 +++
 bsps/powerpc/t32mppc/irq/irq.c| 11 +++
 bsps/powerpc/tqm8xx/irq/irq.c | 11 +++
 bsps/powerpc/virtex/irq/irq_init.c| 11 +++
 bsps/riscv/griscv/irq/irq.c   | 11 +++
 bsps/riscv/riscv/irq/irq.c| 11 +++
 bsps/shared/dev/irq/arm-gicv2.c   | 11 +++
 bsps/shared/dev/irq/arm-gicv3.c   | 11 +++
 bsps/shared/irq/irq-default.c | 11 +++
 bsps/shared/irq/irq-enable-disable.c  | 19 ++-
 bsps/sparc/leon3/start/eirq.c | 11 +++
 bsps/sparc/shared/irq/irq-shared.c| 11 +++
 bsps/x86_64/amd64/interrupts/idt.c| 11 +++
 37 files changed, 437 insertions(+), 1 deletion(-)

diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c
index 8e9294cae9..d0a07d1937 100644
--- a/bsps/arm/beagle/irq/irq.c
+++ b/bsps/arm/beagle/irq/irq.c
@@ -95,6 +95,17 @@ static uint32_t omap_get_mir_reg(rtems_vector_number vector, 
uint32_t *const mas
   return mir_reg;
 }
 
+rtems_status_code bsp_interrupt_vector_is_enabled(
+  rtems_vector_number vector,
+  bool   *enabled
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(enabled != NULL);
+  *enabled = false;
+  return RTEMS_UNSATISFIED;
+}
+
 void bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
   uint32_t mask, cur;
diff --git a/bsps/arm/csb336/irq/irq.c b/bsps/arm/csb336/irq/irq.c
index e5887b9717..80914fe28f 100644
--- a/bsps/arm/csb336/irq/irq.c
+++ b/bsps/arm/csb336/irq/irq.c
@@ -26,6 +26,17 @@ void bsp_interrupt_dispatch(void)
   bsp_interrupt_handler_dispatch(vector);
 }
 
+rtems_status_code bsp_interrupt_vector_is_enabled(
+  rtems_vector_number vector,
+  bool   *enabled
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(enabled != NULL);
+  *enabled = false;
+  return RTEMS_UNSATISFIED;
+}
+
 void bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/csb337/irq/irq.c b/bsps/arm/csb337/irq/irq.c
index 95e93845b9..5276374a1e 100644
--- a/bsps/arm/csb337/irq/irq.c
+++ b/bsps/arm/csb337/irq/irq.c
@@ -27,6 +27,17 @@ void bsp_interrupt_dispatch(void)
   AIC_CTL_REG(AIC_EOICR) = 0;
 }
 
+rtems_status_code bsp_interrupt_vector_is_enabled(
+  rtems_vector_number vector,
+  bool   *enabled
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(enabled != NULL);
+  *enabled = false;
+  return RTEMS_UNSATISFIED;
+}
+
 void bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/edb7312/irq/irq.c b/bsps/arm/edb7312/irq/irq.c
index 1d9151a1bd..d11cbf78c3 100644
--- a/bsps/arm/edb7312/irq/irq.c
+++ b/bsps/arm/edb7312/irq/irq.c
@@ -27,6 +27,17 @@ void edb7312_interrupt_dispatch(rtems_vector_number vector)
   bsp_interrupt_handler_dispatch(vector);
 }
 
+rtems_status_code bsp_interrupt_vector_is_enabled(
+  rtems_vector_number vector,
+  bool   *enabled
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(enabled != NULL);
+  *enabled = false;
+  return RTEMS_UNSATISFIED;
+}
+
 voi

[PATCH 12/41] bsps/irq: Add rtems_interrupt_cause()

[Sebastian Huber]

Add rtems_interrupt_cause_on() and rtems_interrupt_clear().

Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.

Update #3269.
---
 bsps/arm/beagle/irq/irq.c| 12 +++
 bsps/arm/csb336/irq/irq.c| 12 +++
 bsps/arm/csb337/irq/irq.c| 12 +++
 bsps/arm/edb7312/irq/irq.c   | 12 +++
 bsps/arm/gumstix/irq/irq.c   | 12 +++
 bsps/arm/lpc24xx/irq/irq.c   | 12 +++
 bsps/arm/lpc32xx/irq/irq.c   | 12 +++
 bsps/arm/raspberrypi/irq/irq.c   | 23 ++
 bsps/arm/rtl22xx/irq/irq.c   | 12 +++
 bsps/arm/shared/irq/irq-armv7m.c | 12 +++
 bsps/arm/smdk2410/irq/irq.c  | 12 +++
 bsps/arm/tms570/irq/irq.c| 12 +++
 bsps/i386/shared/irq/irq.c   | 12 +++
 bsps/include/bsp/irq-generic.h   | 47 +++
 bsps/lm32/shared/irq/irq.c   | 12 +++
 bsps/m68k/genmcf548x/irq/irq.c   | 12 +++
 bsps/mips/shared/irq/irq.c   | 12 +++
 bsps/powerpc/gen5200/irq/irq.c   | 12 +++
 bsps/powerpc/gen83xx/irq/irq.c   | 12 +++
 bsps/powerpc/mpc55xxevb/start/irq.c  | 12 +++
 bsps/powerpc/mpc8260ads/irq/irq.c| 12 +++
 bsps/powerpc/psim/irq/irq_init.c | 12 +++
 bsps/powerpc/qemuppc/irq/irq_init.c  | 12 +++
 bsps/powerpc/qoriq/irq/irq.c | 46 +++
 bsps/powerpc/shared/irq/ppc-irq-generic.c| 12 +++
 bsps/powerpc/t32mppc/irq/irq.c   | 12 +++
 bsps/powerpc/tqm8xx/irq/irq.c| 12 +++
 bsps/powerpc/virtex/irq/irq_init.c   | 12 +++
 bsps/riscv/griscv/irq/irq.c  | 23 ++
 bsps/riscv/riscv/irq/irq.c   | 23 ++
 bsps/shared/dev/irq/arm-gicv2.c  | 23 ++
 bsps/shared/dev/irq/arm-gicv3.c  | 23 ++
 bsps/shared/irq-default-sources.am   |  1 +
 bsps/shared/irq-sources.am   |  1 +
 bsps/shared/irq/irq-cause-clear.c| 84 
 bsps/shared/irq/irq-default.c| 12 +++
 bsps/sparc/leon3/start/eirq.c| 23 ++
 bsps/sparc/shared/irq/irq-shared.c   | 23 ++
 bsps/x86_64/amd64/interrupts/idt.c   | 12 +++
 c/src/lib/libbsp/m68k/genmcf548x/Makefile.am |  1 +
 c/src/lib/libbsp/powerpc/ss555/Makefile.am   |  1 +
 spec/build/bsps/m68k/genmcf548x/obj.yml  |  1 +
 spec/build/bsps/objirq.yml   |  1 +
 spec/build/bsps/powerpc/ss555/bspss555.yml   |  1 +
 44 files changed, 669 insertions(+)
 create mode 100644 bsps/shared/irq/irq-cause-clear.c

diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c
index d0a07d1937..9ba317f64f 100644
--- a/bsps/arm/beagle/irq/irq.c
+++ b/bsps/arm/beagle/irq/irq.c
@@ -95,6 +95,18 @@ static uint32_t omap_get_mir_reg(rtems_vector_number vector, 
uint32_t *const mas
   return mir_reg;
 }
 
+rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  return RTEMS_UNSATISFIED;
+}
+
+rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  return RTEMS_UNSATISFIED;
+}
+
 rtems_status_code bsp_interrupt_vector_is_enabled(
   rtems_vector_number vector,
   bool   *enabled
diff --git a/bsps/arm/csb336/irq/irq.c b/bsps/arm/csb336/irq/irq.c
index 80914fe28f..4c24c4c09d 100644
--- a/bsps/arm/csb336/irq/irq.c
+++ b/bsps/arm/csb336/irq/irq.c
@@ -26,6 +26,18 @@ void bsp_interrupt_dispatch(void)
   bsp_interrupt_handler_dispatch(vector);
 }
 
+rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  return RTEMS_UNSATISFIED;
+}
+
+rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  return RTEMS_UNSATISFIED;
+}
+
 rtems_status_code bsp_interrupt_vector_is_enabled(
   rtems_vector_number vector,
   bool   *enabled
diff --git a/bsps/arm/csb337/irq/irq.c b/bsps/arm/csb337/irq/irq.c
index 5276374a1e..730b680b6a 100644
--- a/bsps/arm/csb337/irq/irq.c
+++ b/bsps/arm/csb337/irq/irq.c
@@ -27,6 +27,18 @@ void bsp_interrupt_dispatch(void)
   AIC_CTL_REG(AIC_EOICR) = 0;
 }
 
+rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  return RTEMS_UNSATISFIED;
+}
+
+rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  return RTEMS_UNSATISFIED;
+}
+
 rtems_status_code bsp_interrupt_vector_is_enabled(
   rtems_vector_number vector,
   bool   *enabled
diff --git a/bsps/arm/edb7312/irq/irq.c b/bsps/arm/edb7312/irq/irq.c
index d11cbf78c3..6096bf7023 100644
--- a/bs

[PATCH 10/41] rtems: Add RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT

[Sebastian Huber]

Add RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT as the fatal source for
spurious interrupts.  Use the interrupt vector number of the spurious
interrupt for the fatal code.

Update #3269.
---
 bsps/shared/irq/irq-default-handler.c   | 12 +---
 cpukit/include/rtems/score/interr.h |  7 +++
 cpukit/sapi/src/fatalsrctext.c  |  3 ++-
 testsuites/sptests/spinternalerror02/init.c |  2 +-
 4 files changed, 15 insertions(+), 9 deletions(-)

diff --git a/bsps/shared/irq/irq-default-handler.c 
b/bsps/shared/irq/irq-default-handler.c
index cfe91f4202..666d48aaa8 100644
--- a/bsps/shared/irq/irq-default-handler.c
+++ b/bsps/shared/irq/irq-default-handler.c
@@ -10,7 +10,7 @@
  */
 
 /*
- * Copyright (C) 2008, 2012 embedded brains GmbH 
(http://www.embedded-brains.de)
+ * Copyright (C) 2008, 2021 embedded brains GmbH 
(http://www.embedded-brains.de)
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -34,13 +34,11 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include 
-
-#include 
-
 #include 
 
-void bsp_interrupt_handler_default(rtems_vector_number vector)
+#include 
+
+void bsp_interrupt_handler_default( rtems_vector_number vector )
 {
-  printk("spurious interrupt: %" PRIu32 "\n", vector);
+  _Terminate( RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT, vector );
 }
diff --git a/cpukit/include/rtems/score/interr.h 
b/cpukit/include/rtems/score/interr.h
index 33e9524b65..e5a0a62cf6 100644
--- a/cpukit/include/rtems/score/interr.h
+++ b/cpukit/include/rtems/score/interr.h
@@ -143,6 +143,13 @@ typedef enum {
*/
   RTEMS_FATAL_SOURCE_HEAP = 13,
 
+  /**
+   * @brief Fatal source for spurious interrupts.
+   *
+   * The fatal code is the interrupt vector number of the spurious interrupt.
+   */
+  RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT = 14,
+
   /**
* @brief The last available fatal source.
*
diff --git a/cpukit/sapi/src/fatalsrctext.c b/cpukit/sapi/src/fatalsrctext.c
index 6510725e13..636878da4c 100644
--- a/cpukit/sapi/src/fatalsrctext.c
+++ b/cpukit/sapi/src/fatalsrctext.c
@@ -41,7 +41,8 @@ static const char *const fatal_source_text[] = {
   "RTEMS_FATAL_SOURCE_SMP",
   "RTEMS_FATAL_SOURCE_PANIC",
   "RTEMS_FATAL_SOURCE_INVALID_HEAP_FREE",
-  "RTEMS_FATAL_SOURCE_HEAP"
+  "RTEMS_FATAL_SOURCE_HEAP",
+  "RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT"
 };
 
 const char *rtems_fatal_source_text( rtems_fatal_source source )
diff --git a/testsuites/sptests/spinternalerror02/init.c 
b/testsuites/sptests/spinternalerror02/init.c
index 1564061956..30f09de6cc 100644
--- a/testsuites/sptests/spinternalerror02/init.c
+++ b/testsuites/sptests/spinternalerror02/init.c
@@ -53,7 +53,7 @@ static void test_fatal_source_text(void)
 puts( text );
   } while ( text != text_last );
 
-  rtems_test_assert( source - 3 == RTEMS_FATAL_SOURCE_HEAP );
+  rtems_test_assert( source - 3 == RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT );
 }
 
 static void test_status_text(void)
-- 
2.26.2

___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel

[PATCH 25/41] bsps/irq: Add rtems_interrupt_entry_install()

[Sebastian Huber]

Add rtems_interrupt_entry_remove().  Split up irq-generic.c into several files.
In particular, place all functions which use dynamic memory into their own
file.

Add optional macros to let the BSP customize the vector installation after
installing the first entry and the vector removal before removing the last
entry:

* bsp_interrupt_vector_install()

* bsp_interrupt_vector_remove()

Use these new customization options in the m68k/genmcf548x BSP so re-use the
generic interrupt controller support.

Update #3269.
---
 bsps/i386/shared/irq/irq.c   |   8 +-
 bsps/include/bsp/irq-generic.h   | 214 ++--
 bsps/m68k/genmcf548x/include/bsp/irq.h   |   8 +
 bsps/m68k/genmcf548x/irq/irq.c   | 140 +-
 bsps/shared/irq-default-sources.am   |   3 +
 bsps/shared/irq-sources.am   |   3 +
 bsps/shared/irq/irq-entry-remove.c   | 115 +
 bsps/shared/irq/irq-generic.c| 486 ++-
 bsps/shared/irq/irq-handler-install.c| 114 +
 bsps/shared/irq/irq-handler-iterate.c|  21 +-
 bsps/shared/irq/irq-handler-remove.c |  80 +++
 c/src/lib/libbsp/m68k/genmcf548x/Makefile.am |  10 +-
 c/src/lib/libbsp/powerpc/ss555/Makefile.am   |   3 +
 spec/build/bsps/m68k/genmcf548x/grp.yml  |   2 +
 spec/build/bsps/m68k/genmcf548x/obj.yml  |   9 -
 spec/build/bsps/objirq.yml   |   3 +
 spec/build/bsps/powerpc/ss555/bspss555.yml   |   3 +
 17 files changed, 681 insertions(+), 541 deletions(-)
 create mode 100644 bsps/shared/irq/irq-entry-remove.c
 create mode 100644 bsps/shared/irq/irq-handler-install.c
 create mode 100644 bsps/shared/irq/irq-handler-remove.c

diff --git a/bsps/i386/shared/irq/irq.c b/bsps/i386/shared/irq/irq.c
index d0004698e7..25f8fb69b0 100644
--- a/bsps/i386/shared/irq/irq.c
+++ b/bsps/i386/shared/irq/irq.c
@@ -353,13 +353,7 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
 
 static bool bsp_interrupt_handler_is_empty(rtems_vector_number vector)
 {
-  rtems_vector_number index;
-  rtems_interrupt_entry *head;
-
-  index = bsp_interrupt_handler_index(vector);
-  head = &bsp_interrupt_handler_table[index];
-
-  return bsp_interrupt_is_empty_handler_entry(head);
+  return bsp_interrupt_entry_load_first(vector) == NULL;
 }
 
 /*
diff --git a/bsps/include/bsp/irq-generic.h b/bsps/include/bsp/irq-generic.h
index 3b2998f533..6e2f5ed464 100644
--- a/bsps/include/bsp/irq-generic.h
+++ b/bsps/include/bsp/irq-generic.h
@@ -12,7 +12,7 @@
 /*
  * Copyright (C) 2016 Chris Johns 
  *
- * Copyright (C) 2008, 2017 embedded brains GmbH 
(http://www.embedded-brains.de)
+ * Copyright (C) 2008, 2021 embedded brains GmbH 
(http://www.embedded-brains.de)
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -70,20 +70,13 @@ extern "C" {
   #define BSP_INTERRUPT_HANDLER_TABLE_SIZE BSP_INTERRUPT_VECTOR_COUNT
 #endif
 
-/* Internal macros for SMP support, do not use externally */
-#ifdef RTEMS_SMP
-  #define bsp_interrupt_disable(level) do { (void) level; } while (0)
-  #define bsp_interrupt_enable(level) do { } while (0)
-  #define bsp_interrupt_fence(order) _Atomic_Fence(order)
-#else
-  #define bsp_interrupt_disable(level) rtems_interrupt_disable(level)
-  #define bsp_interrupt_enable(level) rtems_interrupt_enable(level)
-  #define bsp_interrupt_fence(order) do { } while (0)
-#endif
-
 #define bsp_interrupt_assert(e) _Assert(e)
 
-extern rtems_interrupt_entry bsp_interrupt_handler_table [];
+/**
+ * @brief Each member of this table references the first installed entry at the
+ *   corresponding interrupt vector or is NULL.
+ */
+extern rtems_interrupt_entry *bsp_interrupt_handler_table[];
 
 #ifdef BSP_INTERRUPT_USE_INDEX_TABLE
   #if BSP_INTERRUPT_HANDLER_TABLE_SIZE < 0x100
@@ -141,6 +134,12 @@ static inline rtems_vector_number 
bsp_interrupt_handler_index(
  * - bsp_interrupt_vector_disable()
  * - bsp_interrupt_handler_default()
  *
+ * Optionally, the BSP may define the following macros to customize the vector
+ * installation after installing the first entry and the vector removal before
+ * removing the last entry:
+ * - bsp_interrupt_vector_install()
+ * - bsp_interrupt_vector_remove()
+ *
  * The following now deprecated functions are provided for backward
  * compatibility:
  * - BSP_get_current_rtems_irq_handler()
@@ -362,14 +361,114 @@ rtems_status_code bsp_interrupt_cause_on(
  */
 rtems_status_code bsp_interrupt_clear( rtems_vector_number vector );
 
+#if defined(RTEMS_SMP)
+/**
+ * @brief Handles a spurious interrupt.
+ *
+ * @param vector is the vector number.
+ */
+void bsp_interrupt_spurious( rtems_vector_number vector );
+#endif
+
+/**
+ * @brief Loads the interrupt entry with atomic acquire semantic.
+ *
+ * @param ptr is the pointer to an ::rtems_interrupt_entry pointer.
+ *
+ * @return Returns the pointer value.
+ */
+static inline rtems_interrupt_entry *bsp_inter

[PATCH 31/41] validation: rtems_interrupt_vector_is_enabled()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 .../validation/tc-intr-vector-is-enabled.c| 627 ++
 2 files changed, 628 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-vector-is-enabled.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index 4e8ecfe1a0..0fbd4d808f 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -16,6 +16,7 @@ source:
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
 - testsuites/validation/tc-intr-get-attributes.c
+- testsuites/validation/tc-intr-vector-is-enabled.c
 - testsuites/validation/tc-message-construct-errors.c
 - testsuites/validation/tc-object.c
 - testsuites/validation/tc-signal-catch.c
diff --git a/testsuites/validation/tc-intr-vector-is-enabled.c 
b/testsuites/validation/tc-intr-vector-is-enabled.c
new file mode 100644
index 00..15f13a132b
--- /dev/null
+++ b/testsuites/validation/tc-intr-vector-is-enabled.c
@@ -0,0 +1,627 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqVectorIsEnabled
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqVectorIsEnabled \
+ *   spec:/rtems/intr/req/vector-is-enabled
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqVectorIsEnabled_Pre_Vector_Valid,
+  RtemsIntrReqVectorIsEnabled_Pre_Vector_Invalid,
+  RtemsIntrReqVectorIsEnabled_Pre_Vector_NA
+} RtemsIntrReqVectorIsEnabled_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqVectorIsEnabled_Pre_Enabled_Obj,
+  RtemsIntrReqVectorIsEnabled_Pre_Enabled_Null,
+  RtemsIntrReqVectorIsEnabled_Pre_Enabled_NA
+} RtemsIntrReqVectorIsEnabled_Pre_Enabled;
+
+typedef enum {
+  RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_Yes,
+  RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_No,
+  RtemsIntrReqVectorIsEnabled_Pre_IsEnabled_NA
+} RtemsIntrReqVectorIsEnabled_Pre_IsEnabled;
+
+typedef enum {
+  RtemsIntrReqVectorIsEnabled_Post_Status_Ok,
+  RtemsIntrReqVectorIsEnabled_Post_Status_InvAddr,
+  RtemsIntrReqVectorIsEnabled_Post_Status_InvId,
+  RtemsIntrReqVectorIsEnabled_Post_Status_NA
+} RtemsIntrReqVectorIsEnabled_Post_Status;
+
+typedef enum {
+  RtemsIntrReqVectorIsEnabled_Post_IsEnabled_Nop,
+  RtemsIntrReqVectorIsEnabled_Post_IsEnabled_Yes,
+  RtemsIntrReqVectorIsEnabled_Post_IsEnabled_No,
+  RtemsIntrReqVectorIsEnabled_Post_IsEnabled_NA
+} RtemsIntrReqVectorIsEnabled_Post_IsEnabled;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/vector-is-enabled test case.
+ */
+typedef struct {
+  /**
+   * @brief If this member is true, then an interrupt occurred.
+   */
+  bool interrupt_occurred;
+
+  /**
+   * @brief This member contain

[PATCH 20/41] sparc/irq: Implement new interrupt directives

[Sebastian Huber]

Update #3269.
---
 bsps/sparc/leon3/start/eirq.c  | 86 +++---
 bsps/sparc/shared/irq/irq-shared.c | 17 --
 2 files changed, 91 insertions(+), 12 deletions(-)

diff --git a/bsps/sparc/leon3/start/eirq.c b/bsps/sparc/leon3/start/eirq.c
index d6373bf00a..4f5f910106 100644
--- a/bsps/sparc/leon3/start/eirq.c
+++ b/bsps/sparc/leon3/start/eirq.c
@@ -66,6 +66,19 @@ rtems_status_code bsp_interrupt_get_attributes(
   rtems_interrupt_attributes *attributes
 )
 {
+  bool is_standard_interrupt;
+
+  is_standard_interrupt = (vector <= BSP_INTERRUPT_VECTOR_MAX_STD);
+  attributes->is_maskable = (vector != 15);
+  attributes->can_enable = true;
+  attributes->maybe_enable = true;
+  attributes->can_disable = true;
+  attributes->can_cause = true;
+  attributes->can_cause_on = is_standard_interrupt;
+  attributes->can_clear = true;
+  attributes->cleared_by_acknowledge = true;
+  attributes->can_get_affinity = is_standard_interrupt;
+  attributes->can_set_affinity = is_standard_interrupt;
   return RTEMS_SUCCESSFUL;
 }
 
@@ -74,16 +87,56 @@ rtems_status_code bsp_interrupt_is_pending(
   bool   *pending
 )
 {
+#if defined(RTEMS_SMP)
+  rtems_interrupt_level level;
+  uint32_t bit;
+
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
   bsp_interrupt_assert(pending != NULL);
-  *pending = false;
-  return RTEMS_UNSATISFIED;
+  bit = 1U << vector;
+
+  rtems_interrupt_local_disable(level);
+  *pending = (LEON3_IrqCtrl_Regs->ipend & bit) != 0 ||
+(LEON3_IrqCtrl_Regs->force[rtems_scheduler_get_processor()] & bit) != 0;
+  rtems_interrupt_local_enable(level);
+  return RTEMS_SUCCESSFUL;
+#else
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  *pending = !BSP_Is_interrupt_pending(vector);
+  return RTEMS_SUCCESSFUL;
+#endif
 }
 
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
+  uint32_t bit;
+
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+  bit = 1U << vector;
+
+  if ( vector <= BSP_INTERRUPT_VECTOR_MAX_STD ) {
+uint32_t cpu_count;
+uint32_t cpu_index;
+
+cpu_count = rtems_scheduler_get_processor_maximum();
+
+for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) {
+  LEON3_IrqCtrl_Regs->force[cpu_index] = bit;
+}
+  } else {
+rtems_interrupt_lock_context lock_context;
+
+/*
+ * This is a very dangerous operation and should only be used for test
+ * software.  We may accidentally clear the pending state set by
+ * peripherals with this read-modify-write operation.
+ */
+LEON3_IRQCTRL_ACQUIRE(&lock_context);
+LEON3_IrqCtrl_Regs->ipend |= bit;
+LEON3_IRQCTRL_RELEASE(&lock_context);
+  }
+
+  return RTEMS_SUCCESSFUL;
 }
 
 #if defined(RTEMS_SMP)
@@ -93,14 +146,31 @@ rtems_status_code bsp_interrupt_cause_on(
 )
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+  bsp_interrupt_assert(cpu_index < rtems_scheduler_get_processor_maximum());
+
+  if ( vector > BSP_INTERRUPT_VECTOR_MAX_STD ) {
+return RTEMS_UNSATISFIED;
+  }
+
+  LEON3_IrqCtrl_Regs->force[cpu_index] = 1U << vector;
+  return RTEMS_SUCCESSFUL;
 }
 #endif
 
 rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
 {
+  uint32_t bit;
+
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+  bit = 1U << vector;
+
+  LEON3_IrqCtrl_Regs->iclear = bit;
+
+  if (vector <= BSP_INTERRUPT_VECTOR_MAX_STD) {
+LEON3_IrqCtrl_Regs->force[rtems_scheduler_get_processor()] = bit << 16;
+  }
+
+  return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_vector_is_enabled(
@@ -109,9 +179,9 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
 )
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  bsp_interrupt_assert(enabled != NULL);
-  *enabled = false;
-  return RTEMS_UNSATISFIED;
+  *enabled =
+!BSP_Cpu_Is_interrupt_masked(vector, _LEON3_Get_current_processor());
+  return RTEMS_SUCCESSFUL;
 }
 
 #if defined(RTEMS_SMP)
diff --git a/bsps/sparc/shared/irq/irq-shared.c 
b/bsps/sparc/shared/irq/irq-shared.c
index aa1d412be0..d0b77bddbb 100644
--- a/bsps/sparc/shared/irq/irq-shared.c
+++ b/bsps/sparc/shared/irq/irq-shared.c
@@ -37,6 +37,13 @@ rtems_status_code bsp_interrupt_get_attributes(
   rtems_interrupt_attributes *attributes
 )
 {
+  attributes->is_maskable = vector != 15;
+  attributes->can_enable = true;
+  attributes->can_disable = true;
+  attributes->can_cause = true;
+  attributes->can_cause_on = true;
+  attributes->can_clear = true;
+  attributes->can_set_affinity = true;
   return RTEMS_SUCCESSFUL;
 }
 
@@ -54,7 +61,8 @@ rtems_status_code bsp_interrupt_is_pending(
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+  BSP_Force_interrupt(vector);
+  return RTEMS_SUCCESSFUL;
 }
 
 #if defined(RTEMS_SMP)
@@ -71,7 +79,8 @@ rtems_status_

[PATCH 19/41] bsps/irq: Implement new directives for GICv2/3

[Sebastian Huber]

Update #3269.
---
 bsps/include/dev/irq/arm-gic-irq.h |   3 +
 bsps/shared/dev/irq/arm-gicv2.c|  93 +---
 bsps/shared/dev/irq/arm-gicv3.c| 131 -
 3 files changed, 194 insertions(+), 33 deletions(-)

diff --git a/bsps/include/dev/irq/arm-gic-irq.h 
b/bsps/include/dev/irq/arm-gic-irq.h
index 68e0247fd8..398fd8bceb 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -46,6 +46,9 @@ extern "C" {
 #define ARM_GIC_IRQ_SGI_13 13
 #define ARM_GIC_IRQ_SGI_14 14
 #define ARM_GIC_IRQ_SGI_15 15
+#define ARM_GIC_IRQ_SGI_LAST 15
+
+#define ARM_GIC_IRQ_PPI_LAST 31
 
 #define ARM_GIC_DIST ((volatile gic_dist *) BSP_ARM_GIC_DIST_BASE)
 
diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c
index a1ba5e9112..6f5d4015e4 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013, 2019 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2013, 2021 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Dornierstr. 4
@@ -69,6 +69,28 @@ rtems_status_code bsp_interrupt_get_attributes(
   rtems_interrupt_attributes *attributes
 )
 {
+  attributes->is_maskable = true;
+  attributes->maybe_enable = true;
+
+  if ( vector <= ARM_GIC_IRQ_SGI_LAST ) {
+attributes->always_enabled = true;
+attributes->can_enable = true;
+attributes->can_cause = true;
+attributes->can_cause_on = true;
+attributes->cleared_by_acknowledge = true;
+  } else {
+attributes->can_disable = true;
+attributes->can_cause = true;
+attributes->can_clear = true;
+
+if ( vector > ARM_GIC_IRQ_PPI_LAST ) {
+  /* SPI */
+  attributes->can_enable = true;
+  attributes->can_get_affinity = true;
+  attributes->can_set_affinity = true;
+}
+  }
+
   return RTEMS_SUCCESSFUL;
 }
 
@@ -77,16 +99,25 @@ rtems_status_code bsp_interrupt_is_pending(
   bool   *pending
 )
 {
-  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  bsp_interrupt_assert(pending != NULL);
-  *pending = false;
-  return RTEMS_UNSATISFIED;
+  volatile gic_dist *dist = ARM_GIC_DIST;
+
+  *pending = gic_id_is_pending(dist, vector);
+  return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+arm_gic_trigger_sgi(vector, 1U << _SMP_Get_current_processor());
+  } else {
+volatile gic_dist *dist = ARM_GIC_DIST;
+
+gic_id_set_pending(dist, vector);
+  }
+
+  return RTEMS_SUCCESSFUL;
 }
 
 #if defined(RTEMS_SMP)
@@ -95,15 +126,27 @@ rtems_status_code bsp_interrupt_cause_on(
   uint32_tcpu_index
 )
 {
-  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+  if (vector >= 16) {
+return RTEMS_UNSATISFIED;
+  }
+
+  arm_gic_trigger_sgi(vector, 1U << cpu_index);
+  return RTEMS_SUCCESSFUL;
 }
 #endif
 
 rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
 {
+  volatile gic_dist *dist = ARM_GIC_DIST;
+
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+return RTEMS_UNSATISFIED;
+  }
+
+  gic_id_clear_pending(dist, vector);
+  return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_vector_is_enabled(
@@ -113,8 +156,16 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
   bsp_interrupt_assert(enabled != NULL);
-  *enabled = false;
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+*enabled = true;
+  } else {
+volatile gic_dist *dist = ARM_GIC_DIST;
+
+*enabled = gic_id_is_enabled(dist, vector);
+  }
+
+  return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
@@ -133,6 +184,11 @@ rtems_status_code 
bsp_interrupt_vector_disable(rtems_vector_number vector)
 
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
 
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+/* SGI cannot be disabled */
+return RTEMS_UNSATISFIED;
+  }
+
   gic_id_disable(dist, vector);
   return RTEMS_SUCCESSFUL;
 }
@@ -207,8 +263,8 @@ BSP_START_TEXT_SECTION void 
arm_gic_irq_initialize_secondary_cpu(void)
   dist->icdigr[0] = 0x;
 #endif
 
-  /* Initialize Peripheral Private Interrupts (PPIs) */
-  for (id = 0; id < 32; ++id) {
+  /* Initialize priority of SGIs and PPIs */
+  for (id = 0; id <= ARM_GIC_IRQ_PPI_LAST; ++id) {
 gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
   }
 
@@ -300,6 +356,10 @@ rtems_status_code bsp_interrupt_set_affinity(
   volatile gic_dist *dist = ARM_GIC_DIST;
   uint8_t targets = (uint8_t) _Processor_mask_To_uint32_t(affinity, 0);
 
+  if ( vector <= ARM_GIC_IRQ_PPI_LAST ) {
+return RTEMS_UNSATISFIED;
+  }
+
 

[PATCH 34/41] validation: Test rtems_interrupt_entry_install()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|1 +
 testsuites/validation/tc-intr-entry-install.c | 1222 +
 2 files changed, 1223 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-entry-install.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index 78633bebe5..c536779f2d 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -15,6 +15,7 @@ source:
 - testsuites/validation/tc-barrier-delete.c
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
+- testsuites/validation/tc-intr-entry-install.c
 - testsuites/validation/tc-intr-get-attributes.c
 - testsuites/validation/tc-intr-vector-disable.c
 - testsuites/validation/tc-intr-vector-enable.c
diff --git a/testsuites/validation/tc-intr-entry-install.c 
b/testsuites/validation/tc-intr-entry-install.c
new file mode 100644
index 00..3ba8452226
--- /dev/null
+++ b/testsuites/validation/tc-intr-entry-install.c
@@ -0,0 +1,1222 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqEntryInstall
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqEntryInstall \
+ *   spec:/rtems/intr/req/entry-install
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqEntryInstall_Pre_Vector_Valid,
+  RtemsIntrReqEntryInstall_Pre_Vector_Invalid,
+  RtemsIntrReqEntryInstall_Pre_Vector_NA
+} RtemsIntrReqEntryInstall_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqEntryInstall_Pre_Options_Unique,
+  RtemsIntrReqEntryInstall_Pre_Options_Shared,
+  RtemsIntrReqEntryInstall_Pre_Options_Replace,
+  RtemsIntrReqEntryInstall_Pre_Options_NA
+} RtemsIntrReqEntryInstall_Pre_Options;
+
+typedef enum {
+  RtemsIntrReqEntryInstall_Pre_Entry_Obj,
+  RtemsIntrReqEntryInstall_Pre_Entry_Null,
+  RtemsIntrReqEntryInstall_Pre_Entry_NA
+} RtemsIntrReqEntryInstall_Pre_Entry;
+
+typedef enum {
+  RtemsIntrReqEntryInstall_Pre_Routine_Valid,
+  RtemsIntrReqEntryInstall_Pre_Routine_Null,
+  RtemsIntrReqEntryInstall_Pre_Routine_NA
+} RtemsIntrReqEntryInstall_Pre_Routine;
+
+typedef enum {
+  RtemsIntrReqEntryInstall_Pre_Init_Yes,
+  RtemsIntrReqEntryInstall_Pre_Init_No,
+  RtemsIntrReqEntryInstall_Pre_Init_NA
+} RtemsIntrReqEntryInstall_Pre_Init;
+
+typedef enum {
+  RtemsIntrReqEntryInstall_Pre_ISR_Yes,
+  RtemsIntrReqEntryInstall_Pre_ISR_No,
+  RtemsIntrReqEntryInstall_Pre_ISR_NA
+} RtemsIntrReqEntryInstall_Pre_ISR;
+
+typedef enum {
+  RtemsIntrReqEntryInstall_Pre_Installed_None,
+  RtemsIntrReqEntryInstall_Pre_Installed_Unique,
+  RtemsIntrReqEntryInstall_Pre_Installed_Other,
+  RtemsIntrReqEntryInstall_Pre_Installed_EqRoutine,
+  RtemsIntrReqEntryInstall_Pre_Insta

[PATCH 36/41] validation: Test rtems_interrupt_cause()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 testsuites/validation/tc-intr-cause.c | 577 ++
 2 files changed, 578 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-cause.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index 08ef145c82..fc7b2830e4 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -15,6 +15,7 @@ source:
 - testsuites/validation/tc-barrier-delete.c
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
+- testsuites/validation/tc-intr-cause.c
 - testsuites/validation/tc-intr-entry-install.c
 - testsuites/validation/tc-intr-entry-remove.c
 - testsuites/validation/tc-intr-get-attributes.c
diff --git a/testsuites/validation/tc-intr-cause.c 
b/testsuites/validation/tc-intr-cause.c
new file mode 100644
index 00..00ea2c8415
--- /dev/null
+++ b/testsuites/validation/tc-intr-cause.c
@@ -0,0 +1,577 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqCause
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqCause spec:/rtems/intr/req/cause
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqCause_Pre_Vector_Valid,
+  RtemsIntrReqCause_Pre_Vector_Invalid,
+  RtemsIntrReqCause_Pre_Vector_NA
+} RtemsIntrReqCause_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqCause_Pre_CanCause_Yes,
+  RtemsIntrReqCause_Pre_CanCause_No,
+  RtemsIntrReqCause_Pre_CanCause_NA
+} RtemsIntrReqCause_Pre_CanCause;
+
+typedef enum {
+  RtemsIntrReqCause_Post_Status_Ok,
+  RtemsIntrReqCause_Post_Status_InvId,
+  RtemsIntrReqCause_Post_Status_Unsat,
+  RtemsIntrReqCause_Post_Status_NA
+} RtemsIntrReqCause_Post_Status;
+
+typedef enum {
+  RtemsIntrReqCause_Post_Pending_Yes,
+  RtemsIntrReqCause_Post_Pending_No,
+  RtemsIntrReqCause_Post_Pending_NA
+} RtemsIntrReqCause_Post_Pending;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/cause test case.
+ */
+typedef struct {
+  /**
+   * @brief This member contains the count of serviced interrupts.
+   */
+  volatile uint32_t interrupt_count;
+
+  /**
+   * @brief If this member is true, then the interrupt shall be cleared.
+   */
+  bool do_clear;
+
+  /**
+   * @brief This member contains the current vector number.
+   */
+  rtems_vector_number vector;
+
+  /**
+   * @brief If this member is true, then the ``vector`` parameter shall be
+   *   valid.
+   */
+  bool valid_vector;
+
+  /**
+   * @brief This member contains the return value of the
+   *   rtems_interrupt_cause() call.
+   */
+  rtems_status_code status;
+
+  /**
+   * @brief This member defines the pre-condition states for the next action.

[PATCH 38/41] validation: Test rtems_interrupt_is_pending()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 testsuites/validation/tc-intr-is-pending.c| 630 ++
 2 files changed, 631 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-is-pending.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index c47cd93234..f432b89191 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -20,6 +20,7 @@ source:
 - testsuites/validation/tc-intr-entry-install.c
 - testsuites/validation/tc-intr-entry-remove.c
 - testsuites/validation/tc-intr-get-attributes.c
+- testsuites/validation/tc-intr-is-pending.c
 - testsuites/validation/tc-intr-vector-disable.c
 - testsuites/validation/tc-intr-vector-enable.c
 - testsuites/validation/tc-intr-vector-is-enabled.c
diff --git a/testsuites/validation/tc-intr-is-pending.c 
b/testsuites/validation/tc-intr-is-pending.c
new file mode 100644
index 00..8eba1e82d6
--- /dev/null
+++ b/testsuites/validation/tc-intr-is-pending.c
@@ -0,0 +1,630 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqIsPending
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqIsPending spec:/rtems/intr/req/is-pending
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqIsPending_Pre_Vector_Valid,
+  RtemsIntrReqIsPending_Pre_Vector_Invalid,
+  RtemsIntrReqIsPending_Pre_Vector_NA
+} RtemsIntrReqIsPending_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqIsPending_Pre_Pending_Obj,
+  RtemsIntrReqIsPending_Pre_Pending_Null,
+  RtemsIntrReqIsPending_Pre_Pending_NA
+} RtemsIntrReqIsPending_Pre_Pending;
+
+typedef enum {
+  RtemsIntrReqIsPending_Pre_IsPending_Yes,
+  RtemsIntrReqIsPending_Pre_IsPending_No,
+  RtemsIntrReqIsPending_Pre_IsPending_NA
+} RtemsIntrReqIsPending_Pre_IsPending;
+
+typedef enum {
+  RtemsIntrReqIsPending_Post_Status_Ok,
+  RtemsIntrReqIsPending_Post_Status_InvAddr,
+  RtemsIntrReqIsPending_Post_Status_InvId,
+  RtemsIntrReqIsPending_Post_Status_NA
+} RtemsIntrReqIsPending_Post_Status;
+
+typedef enum {
+  RtemsIntrReqIsPending_Post_IsPending_Nop,
+  RtemsIntrReqIsPending_Post_IsPending_Yes,
+  RtemsIntrReqIsPending_Post_IsPending_No,
+  RtemsIntrReqIsPending_Post_IsPending_NA
+} RtemsIntrReqIsPending_Post_IsPending;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/is-pending test case.
+ */
+typedef struct {
+  /**
+   * @brief This member contains the count of serviced interrupts.
+   */
+  volatile uint32_t interrupt_count;
+
+  /**
+   * @brief If this member is true, then the interrupt shall be cleared.
+   */
+  bool do_clear;
+
+  /**
+   * @brief This member contains the current vector number.
+   */
+  rtems_vector_num

[PATCH 13/41] bsps/irq: Add rtems_interrupt_get_attributes()

[Sebastian Huber]

Add a default implementation which clears the attributes to zero and
just returns RTEMS_SUCCESSFUL for valid parameters.

Update #3269.
---
 bsps/arm/beagle/irq/irq.c |  8 ++
 bsps/arm/csb336/irq/irq.c |  8 ++
 bsps/arm/csb337/irq/irq.c |  8 ++
 bsps/arm/edb7312/irq/irq.c|  8 ++
 bsps/arm/gumstix/irq/irq.c|  8 ++
 bsps/arm/lpc24xx/irq/irq.c|  8 ++
 bsps/arm/lpc32xx/irq/irq.c|  8 ++
 bsps/arm/raspberrypi/irq/irq.c|  8 ++
 bsps/arm/rtl22xx/irq/irq.c|  8 ++
 bsps/arm/shared/irq/irq-armv7m.c  |  8 ++
 bsps/arm/smdk2410/irq/irq.c   |  8 ++
 bsps/arm/tms570/irq/irq.c |  8 ++
 bsps/i386/shared/irq/irq.c|  8 ++
 bsps/include/bsp/irq-generic.h| 17 
 bsps/lm32/shared/irq/irq.c|  8 ++
 bsps/m68k/genmcf548x/irq/irq.c|  8 ++
 bsps/mips/shared/irq/irq.c|  8 ++
 bsps/powerpc/gen5200/irq/irq.c|  8 ++
 bsps/powerpc/gen83xx/irq/irq.c|  8 ++
 bsps/powerpc/mpc55xxevb/start/irq.c   |  8 ++
 bsps/powerpc/mpc8260ads/irq/irq.c |  8 ++
 bsps/powerpc/psim/irq/irq_init.c  |  8 ++
 bsps/powerpc/qemuppc/irq/irq_init.c   |  8 ++
 bsps/powerpc/qoriq/irq/irq.c  | 16 +++
 bsps/powerpc/shared/irq/ppc-irq-generic.c |  8 ++
 bsps/powerpc/t32mppc/irq/irq.c|  8 ++
 bsps/powerpc/tqm8xx/irq/irq.c |  8 ++
 bsps/powerpc/virtex/irq/irq_init.c|  8 ++
 bsps/riscv/griscv/irq/irq.c   |  8 ++
 bsps/riscv/riscv/irq/irq.c|  8 ++
 bsps/shared/dev/irq/arm-gicv2.c   |  8 ++
 bsps/shared/dev/irq/arm-gicv3.c   |  8 ++
 bsps/shared/irq/irq-default.c |  8 ++
 bsps/shared/irq/irq-enable-disable.c  | 33 +--
 bsps/sparc/leon3/start/eirq.c |  8 ++
 bsps/sparc/shared/irq/irq-shared.c|  8 ++
 bsps/x86_64/amd64/interrupts/idt.c|  9 +++
 37 files changed, 337 insertions(+), 2 deletions(-)

diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c
index 9ba317f64f..d54b49f0ca 100644
--- a/bsps/arm/beagle/irq/irq.c
+++ b/bsps/arm/beagle/irq/irq.c
@@ -95,6 +95,14 @@ static uint32_t omap_get_mir_reg(rtems_vector_number vector, 
uint32_t *const mas
   return mir_reg;
 }
 
+rtems_status_code bsp_interrupt_get_attributes(
+  rtems_vector_number vector,
+  rtems_interrupt_attributes *attributes
+)
+{
+  return RTEMS_SUCCESSFUL;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/csb336/irq/irq.c b/bsps/arm/csb336/irq/irq.c
index 4c24c4c09d..2cc4f5bb5c 100644
--- a/bsps/arm/csb336/irq/irq.c
+++ b/bsps/arm/csb336/irq/irq.c
@@ -26,6 +26,14 @@ void bsp_interrupt_dispatch(void)
   bsp_interrupt_handler_dispatch(vector);
 }
 
+rtems_status_code bsp_interrupt_get_attributes(
+  rtems_vector_number vector,
+  rtems_interrupt_attributes *attributes
+)
+{
+  return RTEMS_SUCCESSFUL;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/csb337/irq/irq.c b/bsps/arm/csb337/irq/irq.c
index 730b680b6a..1679b89dc3 100644
--- a/bsps/arm/csb337/irq/irq.c
+++ b/bsps/arm/csb337/irq/irq.c
@@ -27,6 +27,14 @@ void bsp_interrupt_dispatch(void)
   AIC_CTL_REG(AIC_EOICR) = 0;
 }
 
+rtems_status_code bsp_interrupt_get_attributes(
+  rtems_vector_number vector,
+  rtems_interrupt_attributes *attributes
+)
+{
+  return RTEMS_SUCCESSFUL;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/edb7312/irq/irq.c b/bsps/arm/edb7312/irq/irq.c
index 6096bf7023..573e4f015d 100644
--- a/bsps/arm/edb7312/irq/irq.c
+++ b/bsps/arm/edb7312/irq/irq.c
@@ -27,6 +27,14 @@ void edb7312_interrupt_dispatch(rtems_vector_number vector)
   bsp_interrupt_handler_dispatch(vector);
 }
 
+rtems_status_code bsp_interrupt_get_attributes(
+  rtems_vector_number vector,
+  rtems_interrupt_attributes *attributes
+)
+{
+  return RTEMS_SUCCESSFUL;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/gumstix/irq/irq.c b/bsps/arm/gumstix/irq/irq.c
index dc69274df3..9a185e247b 100644
--- a/bsps/arm/gumstix/irq/irq.c
+++ b/bsps/arm/gumstix/irq/irq.c
@@ -24,6 +24,14 @@ void bsp_interrupt_dispatch(void)
   bsp_interrupt_handler_dispatch(vector);
 }
 
+rtems_status_code bsp_interrupt_get_attributes(
+  rtems_vector_number vector,
+  rtems_interrupt_attributes *attributes
+)
+{
+  retu

[PATCH 18/41] bsps/irq: bsp_interrupt_set_affinity()

[Sebastian Huber]

Return a status code for bsp_interrupt_set_affinity().

Update #3269.
---
 bsps/include/dev/irq/arm-gic-irq.h | 2 +-
 bsps/powerpc/qoriq/include/bsp/irq.h   | 2 +-
 bsps/powerpc/qoriq/irq/irq.c   | 5 +++--
 bsps/powerpc/t32mppc/include/bsp/irq.h | 3 ++-
 bsps/riscv/griscv/include/bsp/irq.h| 2 +-
 bsps/riscv/griscv/irq/irq.c| 4 +++-
 bsps/riscv/riscv/include/bsp/irq.h | 2 +-
 bsps/riscv/riscv/irq/irq.c | 8 +---
 bsps/shared/dev/irq/arm-gicv2.c| 3 ++-
 bsps/shared/dev/irq/arm-gicv3.c| 3 ++-
 bsps/shared/irq/irq-affinity.c | 5 +++--
 bsps/sparc/erc32/include/bsp/irq.h | 3 ++-
 bsps/sparc/leon3/include/bsp/irq.h | 2 +-
 bsps/sparc/leon3/start/eirq.c  | 3 ++-
 14 files changed, 29 insertions(+), 18 deletions(-)

diff --git a/bsps/include/dev/irq/arm-gic-irq.h 
b/bsps/include/dev/irq/arm-gic-irq.h
index 730d792ce4..68e0247fd8 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -69,7 +69,7 @@ rtems_status_code arm_gic_irq_get_group(
   gic_group *group
 );
 
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
   rtems_vector_number vector,
   const Processor_mask *affinity
 );
diff --git a/bsps/powerpc/qoriq/include/bsp/irq.h 
b/bsps/powerpc/qoriq/include/bsp/irq.h
index 6618d54190..cd642fa00b 100644
--- a/bsps/powerpc/qoriq/include/bsp/irq.h
+++ b/bsps/powerpc/qoriq/include/bsp/irq.h
@@ -380,7 +380,7 @@ rtems_status_code qoriq_pic_set_priority(
   int *old_priority
 );
 
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
   rtems_vector_number vector,
   const Processor_mask *affinity
 );
diff --git a/bsps/powerpc/qoriq/irq/irq.c b/bsps/powerpc/qoriq/irq/irq.c
index 9ca903496c..6856b5d39a 100644
--- a/bsps/powerpc/qoriq/irq/irq.c
+++ b/bsps/powerpc/qoriq/irq/irq.c
@@ -45,7 +45,7 @@ RTEMS_INTERRUPT_LOCK_DEFINE(static, lock, "QorIQ IRQ")
 
 #ifdef QORIQ_IS_HYPERVISOR_GUEST
 
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
 )
@@ -62,6 +62,7 @@ void bsp_interrupt_set_affinity(
ev_int_get_config(vector, &config, &priority, &destination);
ev_int_set_config(vector, config, priority, new_destination);
rtems_interrupt_lock_release(&lock, &lock_context);
+   return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_get_affinity(
@@ -314,7 +315,7 @@ rtems_status_code qoriq_pic_set_priority(
return sc;
 }
 
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
 )
diff --git a/bsps/powerpc/t32mppc/include/bsp/irq.h 
b/bsps/powerpc/t32mppc/include/bsp/irq.h
index c0c374edae..dc3f55b296 100644
--- a/bsps/powerpc/t32mppc/include/bsp/irq.h
+++ b/bsps/powerpc/t32mppc/include/bsp/irq.h
@@ -26,13 +26,14 @@ extern "C" {
 
 #define BSP_INTERRUPT_VECTOR_COUNT 1
 
-RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity(
+RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_set_affinity(
   rtems_vector_number   vector,
   const Processor_mask *affinity
 )
 {
   (void) vector;
   (void) affinity;
+  return RTEMS_SUCCESSFUL;
 }
 
 RTEMS_INLINE_ROUTINE rtems_status_code bsp_interrupt_get_affinity(
diff --git a/bsps/riscv/griscv/include/bsp/irq.h 
b/bsps/riscv/griscv/include/bsp/irq.h
index 1df7b4b584..634fee4d01 100644
--- a/bsps/riscv/griscv/include/bsp/irq.h
+++ b/bsps/riscv/griscv/include/bsp/irq.h
@@ -56,7 +56,7 @@
 
 #define BSP_INTERRUPT_VECTOR_COUNT 
RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS)
 
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
   rtems_vector_number vector,
   const Processor_mask *affinity
 );
diff --git a/bsps/riscv/griscv/irq/irq.c b/bsps/riscv/griscv/irq/irq.c
index 1128678d3b..123658f744 100644
--- a/bsps/riscv/griscv/irq/irq.c
+++ b/bsps/riscv/griscv/irq/irq.c
@@ -175,7 +175,7 @@ rtems_status_code bsp_interrupt_get_affinity(
   return RTEMS_SUCCESSFUL;
 }
 
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
   rtems_vector_number vector,
   const Processor_mask *affinity
 )
@@ -196,4 +196,6 @@ void bsp_interrupt_set_affinity(
   } else {
 GRLIB_Disable_interrupt_broadcast(vector);
   }
+
+  return RTEMS_SUCCESSFUL;
 }
diff --git a/bsps/riscv/riscv/include/bsp/irq.h 
b/bsps/riscv/riscv/include/bsp/irq.h
index 03fe8ced3a..1b67c4e046 100644
--- a/bsps/riscv/riscv/include/bsp/irq.h
+++ b/bsps/riscv/riscv/include/bsp/irq.h
@@ -56,7 +56,7 @@
 
 #define BSP_INTERRUPT_VECTOR_COUNT 
RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS)
 
-void bsp_interrupt_set_affinity(
+rtems_status_code bsp_interrupt_set_affinity(
   rtems_vector_number vector,
   const Processor_mask *affinity
 );
diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c
index 555365b2aa..33ef9fbb35 100644
--

[PATCH 22/41] bsps/irq: Use rtems_interrupt_entry

[Sebastian Huber]

Update #3269.
---
 bsps/include/bsp/irq-generic.h| 15 +++
 bsps/shared/irq/irq-generic.c | 24 
 bsps/shared/irq/irq-handler-iterate.c |  2 +-
 3 files changed, 16 insertions(+), 25 deletions(-)

diff --git a/bsps/include/bsp/irq-generic.h b/bsps/include/bsp/irq-generic.h
index 68332d20b9..b553ac30bf 100644
--- a/bsps/include/bsp/irq-generic.h
+++ b/bsps/include/bsp/irq-generic.h
@@ -83,16 +83,7 @@ extern "C" {
 
 #define bsp_interrupt_assert(e) _Assert(e)
 
-struct bsp_interrupt_handler_entry {
-  rtems_interrupt_handler handler;
-  void *arg;
-  const char *info;
-  struct bsp_interrupt_handler_entry *next;
-};
-
-typedef struct bsp_interrupt_handler_entry bsp_interrupt_handler_entry;
-
-extern bsp_interrupt_handler_entry bsp_interrupt_handler_table [];
+extern rtems_interrupt_entry bsp_interrupt_handler_table [];
 
 #ifdef BSP_INTERRUPT_USE_INDEX_TABLE
   #if BSP_INTERRUPT_HANDLER_TABLE_SIZE < 0x100
@@ -386,7 +377,7 @@ static inline void bsp_interrupt_handler_dispatch_unchecked(
   rtems_vector_number vector
 )
 {
-  const bsp_interrupt_handler_entry *e;
+  const rtems_interrupt_entry *e;
 
   e = &bsp_interrupt_handler_table[ bsp_interrupt_handler_index( vector ) ];
 
@@ -494,7 +485,7 @@ void bsp_interrupt_handler_empty( void *arg );
  * @brief Checks if a handler entry is empty.
  */
 static inline bool bsp_interrupt_is_empty_handler_entry(
-  const bsp_interrupt_handler_entry *entry
+  const rtems_interrupt_entry *entry
 )
 {
   return entry->handler == bsp_interrupt_handler_empty;
diff --git a/bsps/shared/irq/irq-generic.c b/bsps/shared/irq/irq-generic.c
index 81da647228..a7e8c1163f 100644
--- a/bsps/shared/irq/irq-generic.c
+++ b/bsps/shared/irq/irq-generic.c
@@ -46,7 +46,7 @@
 [BSP_INTERRUPT_VECTOR_COUNT];
 #endif
 
-bsp_interrupt_handler_entry bsp_interrupt_handler_table
+rtems_interrupt_entry bsp_interrupt_handler_table
   [BSP_INTERRUPT_HANDLER_TABLE_SIZE];
 
 /* The last entry indicates if everything is initialized */
@@ -87,7 +87,7 @@ static inline void bsp_interrupt_set_initialized(void)
 }
 
 static inline void bsp_interrupt_clear_handler_entry(
-  bsp_interrupt_handler_entry *e,
+  rtems_interrupt_entry *e,
   rtems_vector_number vector
 )
 {
@@ -108,7 +108,7 @@ static inline bool bsp_interrupt_allocate_handler_index(
 
 /* The first entry will remain empty */
 for (i = 1; i < BSP_INTERRUPT_HANDLER_TABLE_SIZE; ++i) {
-  const bsp_interrupt_handler_entry *e = &bsp_interrupt_handler_table [i];
+  const rtems_interrupt_entry *e = &bsp_interrupt_handler_table [i];
   if (bsp_interrupt_is_empty_handler_entry(e)) {
 *index = i;
 return true;
@@ -164,7 +164,7 @@ static rtems_status_code bsp_interrupt_handler_install(
 {
   rtems_interrupt_level level;
   rtems_vector_number index = 0;
-  bsp_interrupt_handler_entry *head = NULL;
+  rtems_interrupt_entry *head = NULL;
   bool enable_vector = false;
   bool replace = RTEMS_INTERRUPT_IS_REPLACE(options);
 
@@ -218,9 +218,9 @@ static rtems_status_code bsp_interrupt_handler_install(
 /* This is the first handler so enable the vector later */
 enable_vector = true;
   } else {
-bsp_interrupt_handler_entry *current = head;
-bsp_interrupt_handler_entry *tail = NULL;
-bsp_interrupt_handler_entry *match = NULL;
+rtems_interrupt_entry *current = head;
+rtems_interrupt_entry *tail = NULL;
+rtems_interrupt_entry *match = NULL;
 
 /* Ensure that a unique handler remains unique */
 if (
@@ -327,10 +327,10 @@ static rtems_status_code bsp_interrupt_handler_remove(
 {
   rtems_interrupt_level level;
   rtems_vector_number index = 0;
-  bsp_interrupt_handler_entry *head = NULL;
-  bsp_interrupt_handler_entry *current = NULL;
-  bsp_interrupt_handler_entry *previous = NULL;
-  bsp_interrupt_handler_entry *match = NULL;
+  rtems_interrupt_entry *head = NULL;
+  rtems_interrupt_entry *current = NULL;
+  rtems_interrupt_entry *previous = NULL;
+  rtems_interrupt_entry *match = NULL;
 
   /* Check parameters and system state */
   if (!bsp_interrupt_is_initialized()) {
@@ -454,7 +454,7 @@ rtems_status_code rtems_interrupt_handler_remove(
 bool bsp_interrupt_handler_is_empty(rtems_vector_number vector)
 {
   rtems_vector_number index = 0;
-  bsp_interrupt_handler_entry *head = NULL;
+  rtems_interrupt_entry *head = NULL;
   bool empty;
 
   /* For use in interrupts so no lock. */
diff --git a/bsps/shared/irq/irq-handler-iterate.c 
b/bsps/shared/irq/irq-handler-iterate.c
index 8adbdb4679..3c642b075e 100644
--- a/bsps/shared/irq/irq-handler-iterate.c
+++ b/bsps/shared/irq/irq-handler-iterate.c
@@ -52,7 +52,7 @@ static rtems_status_code bsp_interrupt_handler_iterate(
   void *arg
 )
 {
-  bsp_interrupt_handler_entry *current = NULL;
+  rtems_interrupt_entry *current = NULL;
   rtems_option options = 0;
   rtems_vector_number index = 0;
 
-- 
2.26.2

___
devel mailing list
devel@rtems.org
http://lists.r

[PATCH 21/41] rtems: Add rtems_interrupt_entry_install()

[Sebastian Huber]

Add RTEMS_INTERRUPT_ENTRY_INITIALIZER(),
rtems_interrupt_entry_initialize(), and
rtems_interrupt_entry_remove().  This allows to install interrupt
handlers using user-provides storage as an alternative to
rtems_interrupt_handler_install() which has to allocate memory.

Update #3269.
---
 cpukit/include/rtems/irq-extension.h | 237 +++
 1 file changed, 237 insertions(+)

diff --git a/cpukit/include/rtems/irq-extension.h 
b/cpukit/include/rtems/irq-extension.h
index c96dfd7d5c..c012a26452 100644
--- a/cpukit/include/rtems/irq-extension.h
+++ b/cpukit/include/rtems/irq-extension.h
@@ -166,6 +166,243 @@ typedef void ( *rtems_interrupt_per_handler_routine )(
 #define RTEMS_INTERRUPT_IS_REPLACE( _options ) \
   ( ( _options ) & RTEMS_INTERRUPT_REPLACE )
 
+/* Generated from spec:/rtems/intr/if/entry */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief This structure represents an interrupt entry.
+ *
+ * @par Notes
+ * This structure shall be treated as an opaque data type from the API point of
+ * view.  Members shall not be accessed directly.  An entry may be initialized
+ * by RTEMS_INTERRUPT_ENTRY_INITIALIZER() or
+ * rtems_interrupt_entry_initialize().  It may be installed for an interrupt
+ * vector with rtems_interrupt_entry_install() and removed from an interrupt
+ * vector by rtems_interrupt_entry_remove().
+ */
+typedef struct rtems_interrupt_entry {
+  /**
+   * @brief This member is the interrupt handler routine.
+   */
+  rtems_interrupt_handler handler;
+
+  /**
+   * @brief This member is the interrupt handler argument.
+   */
+  void *arg;
+
+  /**
+   * @brief This member is the reference to the next entry or NULL.
+   */
+  struct rtems_interrupt_entry *next;
+
+  /**
+   * @brief This member is the descriptive information of the entry
+   */
+  const char *info;
+} rtems_interrupt_entry;
+
+/* Generated from spec:/rtems/intr/if/entry-initializer */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Statically initializes an interrupt entry object.
+ *
+ * @param _routine is the interrupt handler routine for the entry.
+ *
+ * @param _arg is the interrupt handler argument for the entry.
+ *
+ * @param _info is the descriptive information for the entry.
+ *
+ * @par Notes
+ * Alternatively, rtems_interrupt_entry_initialize() may be used to dynamically
+ * initialize an interrupt entry.
+ */
+#define RTEMS_INTERRUPT_ENTRY_INITIALIZER( _routine, _arg, _info ) \
+  { _routine,  _arg, NULL, _info }
+
+/* Generated from spec:/rtems/intr/if/entry-initialize */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Initializes the interrupt entry.
+ *
+ * @param[out] entry is the interrupt entry to initialize.
+ *
+ * @param routine is the interrupt handler routine for the entry.
+ *
+ * @param arg is the interrupt handler argument for the entry.
+ *
+ * @param info is the descriptive information for the entry.
+ *
+ * @par Notes
+ * Alternatively, RTEMS_INTERRUPT_ENTRY_INITIALIZER() may be used to statically
+ * initialize an interrupt entry.
+ *
+ * @par Constraints
+ * @parblock
+ * The following constraints apply to this directive:
+ *
+ * * The directive may be called from within any runtime context.
+ *
+ * * The directive will not cause the calling task to be preempted.
+ * @endparblock
+ */
+static inline void rtems_interrupt_entry_initialize(
+  rtems_interrupt_entry  *entry,
+  rtems_interrupt_handler routine,
+  void   *arg,
+  const char *info
+)
+{
+  entry->handler = routine;
+  entry->arg = arg;
+  entry->next = NULL;
+  entry->info = info;
+}
+
+/* Generated from spec:/rtems/intr/if/entry-install */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Installs the interrupt entry at the interrupt vector.
+ *
+ * @param vector is the interrupt vector number.
+ *
+ * @param options is the interrupt entry install option set.
+ *
+ * @param entry is the interrupt entry to install
+ *
+ * One of the following mutually exclusive options
+ *
+ * * #RTEMS_INTERRUPT_UNIQUE, and
+ *
+ * * #RTEMS_INTERRUPT_SHARED
+ *
+ * shall be set in the ``options`` parameter.
+ *
+ * The handler routine of the entry specified by ``entry`` will be called with
+ * the handler argument of the entry when dispatched.  The order in which
+ * shared interrupt handlers are dispatched for one vector is defined by the
+ * installation order.  The first installed handler is dispatched first.
+ *
+ * If the option #RTEMS_INTERRUPT_UNIQUE is set, then it will be ensured that
+ * the handler will be the only one for the interrupt vector.
+ *
+ * If the option #RTEMS_INTERRUPT_SHARED is set, then multiple handler may be
+ * installed for the interrupt vector.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_ADDRESS The ``entry`` parameter was NULL.
+ *
+ * @retval ::RTEMS_INCORRECT_STATE The service was not initialized.
+ *
+ * @retval ::RTEMS_INVALID_ADDRESS The handler routine of the entry was NULL.
+ *
+

[PATCH 16/41] bsps/irq: bsp_interrupt_vector_disable()

[Sebastian Huber]

Return a status code for bsp_interrupt_vector_disable().

Update #3269.
---
 bsps/arm/beagle/irq/irq.c |  3 ++-
 bsps/arm/csb336/irq/irq.c |  4 +++-
 bsps/arm/csb337/irq/irq.c |  3 ++-
 bsps/arm/edb7312/irq/irq.c|  4 +++-
 bsps/arm/gumstix/irq/irq.c|  3 ++-
 bsps/arm/lpc24xx/irq/irq.c|  3 ++-
 bsps/arm/lpc32xx/irq/irq.c|  4 +++-
 bsps/arm/raspberrypi/irq/irq.c|  3 ++-
 bsps/arm/rtl22xx/irq/irq.c|  3 ++-
 bsps/arm/shared/irq/irq-armv7m.c  |  3 ++-
 bsps/arm/smdk2410/irq/irq.c   |  3 ++-
 bsps/arm/tms570/irq/irq.c |  3 ++-
 bsps/i386/shared/irq/irq.c|  3 ++-
 bsps/include/bsp/irq-generic.h| 16 ++--
 bsps/lm32/shared/irq/irq.c|  3 ++-
 bsps/m68k/genmcf548x/irq/irq.c|  4 +++-
 bsps/mips/shared/irq/irq.c|  3 ++-
 bsps/powerpc/gen5200/irq/irq.c|  4 +++-
 bsps/powerpc/gen83xx/irq/irq.c|  4 +++-
 bsps/powerpc/mpc55xxevb/start/irq.c   |  3 ++-
 bsps/powerpc/mpc8260ads/irq/irq.c |  4 +++-
 bsps/powerpc/psim/irq/irq_init.c  |  3 ++-
 bsps/powerpc/qemuppc/irq/irq_init.c   |  3 ++-
 bsps/powerpc/qoriq/irq/irq.c  |  5 +++--
 bsps/powerpc/shared/irq/ppc-irq-generic.c |  3 ++-
 bsps/powerpc/t32mppc/irq/irq.c|  3 ++-
 bsps/powerpc/tqm8xx/irq/irq.c |  4 +++-
 bsps/powerpc/virtex/irq/irq_init.c|  4 +++-
 bsps/riscv/griscv/irq/irq.c   |  3 ++-
 bsps/riscv/riscv/irq/irq.c|  4 +++-
 bsps/shared/dev/irq/arm-gicv2.c   |  3 ++-
 bsps/shared/dev/irq/arm-gicv3.c   |  4 +++-
 bsps/shared/irq/irq-default.c |  3 ++-
 bsps/shared/irq/irq-enable-disable.c  |  4 +---
 bsps/sparc/leon3/start/eirq.c |  3 ++-
 bsps/sparc/shared/irq/irq-shared.c|  3 ++-
 bsps/x86_64/amd64/interrupts/idt.c|  3 ++-
 37 files changed, 93 insertions(+), 45 deletions(-)

diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c
index 7953a2fe1f..7db3428499 100644
--- a/bsps/arm/beagle/irq/irq.c
+++ b/bsps/arm/beagle/irq/irq.c
@@ -150,7 +150,7 @@ rtems_status_code 
bsp_interrupt_vector_enable(rtems_vector_number vector)
   return RTEMS_SUCCESSFUL;
 }
 
-void bsp_interrupt_vector_disable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
 {
   uint32_t mask, cur;
   uint32_t mir_reg = omap_get_mir_reg(vector, &mask);
@@ -160,6 +160,7 @@ void bsp_interrupt_vector_disable(rtems_vector_number 
vector)
   cur = mmio_read(omap_intr.base + mir_reg);
   mmio_write(omap_intr.base + mir_reg, cur | mask);
   flush_data_cache();
+  return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_facility_initialize(void)
diff --git a/bsps/arm/csb336/irq/irq.c b/bsps/arm/csb336/irq/irq.c
index d47f0362e8..2cf142100a 100644
--- a/bsps/arm/csb336/irq/irq.c
+++ b/bsps/arm/csb336/irq/irq.c
@@ -78,12 +78,14 @@ rtems_status_code 
bsp_interrupt_vector_enable(rtems_vector_number vector)
   return RTEMS_SUCCESSFUL;
 }
 
-void bsp_interrupt_vector_disable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
 
   if (vector < MC9328MXL_NUM_INTS)
 MC9328MXL_AITC_INTDISNUM = vector;
+
+  return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_facility_initialize(void)
diff --git a/bsps/arm/csb337/irq/irq.c b/bsps/arm/csb337/irq/irq.c
index a4bfb1f83b..b999841751 100644
--- a/bsps/arm/csb337/irq/irq.c
+++ b/bsps/arm/csb337/irq/irq.c
@@ -76,10 +76,11 @@ rtems_status_code 
bsp_interrupt_vector_enable(rtems_vector_number vector)
   return RTEMS_SUCCESSFUL;
 }
 
-void bsp_interrupt_vector_disable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
   AIC_CTL_REG(AIC_IDCR) = 1 << vector;
+  return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_facility_initialize(void)
diff --git a/bsps/arm/edb7312/irq/irq.c b/bsps/arm/edb7312/irq/irq.c
index 3cff5bfff2..ec50443775 100644
--- a/bsps/arm/edb7312/irq/irq.c
+++ b/bsps/arm/edb7312/irq/irq.c
@@ -97,7 +97,7 @@ rtems_status_code 
bsp_interrupt_vector_enable(rtems_vector_number vector)
 return RTEMS_SUCCESSFUL;
 }
 
-void bsp_interrupt_vector_disable(rtems_vector_number vector)
+rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
 {
 bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
 
@@ -121,6 +121,8 @@ void bsp_interrupt_vector_disable(rtems_vector_number 
vector)
 /* interrupt managed by INTMR3 and INTSR3 */
 *EP7312_INTMR3 &= ~(1 << (vector - 21));
 }
+
+return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_facility_initialize(void)
d

[PATCH 23/41] bsps/irq: Add bsp_interrupt_check_and_lock()

[Sebastian Huber]

Return RTEMS_INCORRECT_STATE instead of RTEMS_INCORRECT_STATE in case the
interrupt support is not initialized.  This is similar to
rtems_timer_server_fire_after() for example.

Update #3269.
---
 bsps/include/bsp/irq-generic.h| 25 +++
 bsps/shared/irq/irq-generic.c | 60 ---
 bsps/shared/irq/irq-handler-iterate.c | 51 +++
 3 files changed, 75 insertions(+), 61 deletions(-)

diff --git a/bsps/include/bsp/irq-generic.h b/bsps/include/bsp/irq-generic.h
index b553ac30bf..9babc4cfb5 100644
--- a/bsps/include/bsp/irq-generic.h
+++ b/bsps/include/bsp/irq-generic.h
@@ -434,6 +434,31 @@ void bsp_interrupt_lock(void);
 /* For internal use only */
 void bsp_interrupt_unlock(void);
 
+/**
+ * @brief Checks the vector and routine.  When the checks were successful, the
+ *   interrupt support lock will be obtained.
+ *
+ * @param vector is the interrupt vector number to check.
+ *
+ * @param routine is the routine to check.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INCORRECT_STATE The interrupt support was not initialized.
+ *
+ * @retval ::RTEMS_CALLED_FROM_ISR The function was called from within
+ *   interrupt context.
+ *
+ * @retval ::RTEMS_INVALID_ADDRESS The ``routine`` parameter was NULL.
+ *
+ * @retval ::RTEMS_INVALID_ID There was no interrupt vector associated with the
+ *   number specified by ``vector``.
+ */
+rtems_status_code bsp_interrupt_check_and_lock(
+  rtems_vector_number vector,
+  rtems_interrupt_handler handler
+);
+
 /**
  * @brief This table contains a bit map which indicates if an entry is unique
  *   or shared.
diff --git a/bsps/shared/irq/irq-generic.c b/bsps/shared/irq/irq-generic.c
index a7e8c1163f..59963182ab 100644
--- a/bsps/shared/irq/irq-generic.c
+++ b/bsps/shared/irq/irq-generic.c
@@ -122,6 +122,32 @@ static inline bool bsp_interrupt_allocate_handler_index(
   #endif
 }
 
+rtems_status_code bsp_interrupt_check_and_lock(
+  rtems_vector_number vector,
+  rtems_interrupt_handler handler
+)
+{
+  if ( !bsp_interrupt_is_initialized() ) {
+return RTEMS_INCORRECT_STATE;
+  }
+
+  if ( handler == NULL ) {
+return RTEMS_INVALID_ADDRESS;
+  }
+
+  if ( !bsp_interrupt_is_valid_vector( vector ) ) {
+return RTEMS_INVALID_ID;
+  }
+
+  if ( rtems_interrupt_is_in_progress() ) {
+return RTEMS_CALLED_FROM_ISR;
+  }
+
+  bsp_interrupt_lock();
+
+  return RTEMS_SUCCESSFUL;
+}
+
 void bsp_interrupt_initialize(void)
 {
   rtems_status_code sc = RTEMS_SUCCESSFUL;
@@ -162,25 +188,18 @@ static rtems_status_code bsp_interrupt_handler_install(
   void *arg
 )
 {
+  rtems_status_code sc;
   rtems_interrupt_level level;
   rtems_vector_number index = 0;
   rtems_interrupt_entry *head = NULL;
   bool enable_vector = false;
   bool replace = RTEMS_INTERRUPT_IS_REPLACE(options);
 
-  /* Check parameters and system state */
-  if (!bsp_interrupt_is_initialized()) {
-return RTEMS_INTERNAL_ERROR;
-  } else if (!bsp_interrupt_is_valid_vector(vector)) {
-return RTEMS_INVALID_ID;
-  } else if (handler == NULL) {
-return RTEMS_INVALID_ADDRESS;
-  } else if (rtems_interrupt_is_in_progress()) {
-return RTEMS_CALLED_FROM_ISR;
-  }
+  sc = bsp_interrupt_check_and_lock( vector, handler );
 
-  /* Lock */
-  bsp_interrupt_lock();
+  if ( sc != RTEMS_SUCCESSFUL ) {
+return sc;
+  }
 
   /* Get handler table index */
   index = bsp_interrupt_handler_index(vector);
@@ -325,6 +344,7 @@ static rtems_status_code bsp_interrupt_handler_remove(
   void *arg
 )
 {
+  rtems_status_code sc;
   rtems_interrupt_level level;
   rtems_vector_number index = 0;
   rtems_interrupt_entry *head = NULL;
@@ -332,19 +352,11 @@ static rtems_status_code bsp_interrupt_handler_remove(
   rtems_interrupt_entry *previous = NULL;
   rtems_interrupt_entry *match = NULL;
 
-  /* Check parameters and system state */
-  if (!bsp_interrupt_is_initialized()) {
-return RTEMS_INTERNAL_ERROR;
-  } else if (!bsp_interrupt_is_valid_vector(vector)) {
-return RTEMS_INVALID_ID;
-  } else if (handler == NULL) {
-return RTEMS_INVALID_ADDRESS;
-  } else if (rtems_interrupt_is_in_progress()) {
-return RTEMS_CALLED_FROM_ISR;
-  }
+  sc = bsp_interrupt_check_and_lock( vector, handler );
 
-  /* Lock */
-  bsp_interrupt_lock();
+  if ( sc != RTEMS_SUCCESSFUL ) {
+return sc;
+  }
 
   /* Get handler table index */
   index = bsp_interrupt_handler_index(vector);
diff --git a/bsps/shared/irq/irq-handler-iterate.c 
b/bsps/shared/irq/irq-handler-iterate.c
index 3c642b075e..385cb8db2d 100644
--- a/bsps/shared/irq/irq-handler-iterate.c
+++ b/bsps/shared/irq/irq-handler-iterate.c
@@ -36,39 +36,26 @@
 
 #include 
 
-/**
- * @brief Iterates over all installed interrupt handler of a vector.
- *
- * @ingroup bsp_interrupt
- *
- * @return In addition to the standard status codes this function returns
- * RTEMS_INTERNAL_ERROR if the BSP interrupt support is not initialized.
- *
- * @see rtems_interrupt_

[PATCH 29/41] validation: GetValidInterruptVectorNumber()

[Sebastian Huber]

Update #3269.
---
 testsuites/validation/tx-interrupt.c | 26 ++
 testsuites/validation/tx-support.h   |  5 +
 2 files changed, 31 insertions(+)

diff --git a/testsuites/validation/tx-interrupt.c 
b/testsuites/validation/tx-interrupt.c
index d056af5abc..0ff5ec017f 100644
--- a/testsuites/validation/tx-interrupt.c
+++ b/testsuites/validation/tx-interrupt.c
@@ -43,6 +43,32 @@
 #include 
 #include 
 
+#include 
+
+rtems_vector_number GetValidInterruptVectorNumber(
+  const rtems_interrupt_attributes *required
+)
+{
+  rtems_vector_number vector;
+
+  for ( vector = 0; vector < BSP_INTERRUPT_VECTOR_COUNT; ++vector ) {
+rtems_status_code  sc;
+rtems_interrupt_attributes attr;
+
+sc = rtems_interrupt_get_attributes( vector, &attr );
+
+if (
+  sc == RTEMS_SUCCESSFUL &&
+( required == NULL ||
+  !required->can_get_affinity || attr.can_get_affinity )
+  ) {
+  break;
+}
+  }
+
+  return vector;
+}
+
 static void HasInstalled(
   void   *arg,
   const char *info,
diff --git a/testsuites/validation/tx-support.h 
b/testsuites/validation/tx-support.h
index 378e98ee3f..20006f5dd8 100644
--- a/testsuites/validation/tx-support.h
+++ b/testsuites/validation/tx-support.h
@@ -38,6 +38,7 @@
 #define _TX_SUPPORT_H
 
 #include 
+#include 
 #include 
 
 #ifdef __cplusplus
@@ -113,6 +114,10 @@ void CallWithinISRSubmit( CallWithinISRRequest *request );
 
 void CallWithinISRWait( const CallWithinISRRequest *request );
 
+rtems_vector_number GetValidInterruptVectorNumber(
+  const rtems_interrupt_attributes *required
+);
+
 bool HasInterruptVectorEntriesInstalled( rtems_vector_number vector );
 
 /** @} */
-- 
2.26.2

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[PATCH 24/41] bsps/irq: Move bsp_interrupt_handler_is_empty()

[Sebastian Huber]

This function is only used by one BSP.

Update #3269.
---
 bsps/i386/shared/irq/irq.c | 11 +++
 bsps/include/bsp/irq-generic.h | 11 ---
 bsps/shared/irq/irq-generic.c  | 19 ---
 3 files changed, 11 insertions(+), 30 deletions(-)

diff --git a/bsps/i386/shared/irq/irq.c b/bsps/i386/shared/irq/irq.c
index 9aab9d27f2..d0004698e7 100644
--- a/bsps/i386/shared/irq/irq.c
+++ b/bsps/i386/shared/irq/irq.c
@@ -351,6 +351,17 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
   return RTEMS_SUCCESSFUL;
 }
 
+static bool bsp_interrupt_handler_is_empty(rtems_vector_number vector)
+{
+  rtems_vector_number index;
+  rtems_interrupt_entry *head;
+
+  index = bsp_interrupt_handler_index(vector);
+  head = &bsp_interrupt_handler_table[index];
+
+  return bsp_interrupt_is_empty_handler_entry(head);
+}
+
 /*
  * Global so the asm handler can call it.
  */
diff --git a/bsps/include/bsp/irq-generic.h b/bsps/include/bsp/irq-generic.h
index 9babc4cfb5..3b2998f533 100644
--- a/bsps/include/bsp/irq-generic.h
+++ b/bsps/include/bsp/irq-generic.h
@@ -415,17 +415,6 @@ static inline void bsp_interrupt_handler_dispatch( 
rtems_vector_number vector )
   }
 }
 
-/**
- * @brief Is interrupt handler empty.
- *
- * This routine returns true if the handler is empty and has not been
- * initialised else false is returned. The interrupt lock is not used
- * so this call can be used from within interrupts.
- *
- * @return If empty true shall be returned else false is returned.
- */
-bool bsp_interrupt_handler_is_empty(rtems_vector_number vector);
-
 /** @} */
 
 /* For internal use only */
diff --git a/bsps/shared/irq/irq-generic.c b/bsps/shared/irq/irq-generic.c
index 59963182ab..df57c99ae3 100644
--- a/bsps/shared/irq/irq-generic.c
+++ b/bsps/shared/irq/irq-generic.c
@@ -462,22 +462,3 @@ rtems_status_code rtems_interrupt_handler_remove(
 {
   return bsp_interrupt_handler_remove(vector, handler, arg);
 }
-
-bool bsp_interrupt_handler_is_empty(rtems_vector_number vector)
-{
-  rtems_vector_number index = 0;
-  rtems_interrupt_entry *head = NULL;
-  bool empty;
-
-  /* For use in interrupts so no lock. */
-
-  /* Get handler table index */
-  index = bsp_interrupt_handler_index(vector);
-
-  /* Get head entry of the handler list for the vector */
-  head = &bsp_interrupt_handler_table [index];
-
-  empty = bsp_interrupt_is_empty_handler_entry(head);
-
-  return empty;
-}
-- 
2.26.2

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[PATCH 30/41] validation: Test rtems_interrupt_get_attributes()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 .../validation/tc-intr-get-attributes.c   | 445 ++
 2 files changed, 446 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-get-attributes.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index 653872320c..4e8ecfe1a0 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -15,6 +15,7 @@ source:
 - testsuites/validation/tc-barrier-delete.c
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
+- testsuites/validation/tc-intr-get-attributes.c
 - testsuites/validation/tc-message-construct-errors.c
 - testsuites/validation/tc-object.c
 - testsuites/validation/tc-signal-catch.c
diff --git a/testsuites/validation/tc-intr-get-attributes.c 
b/testsuites/validation/tc-intr-get-attributes.c
new file mode 100644
index 00..f5ce962b2b
--- /dev/null
+++ b/testsuites/validation/tc-intr-get-attributes.c
@@ -0,0 +1,445 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqGetAttributes
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqGetAttributes \
+ *   spec:/rtems/intr/req/get-attributes
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqGetAttributes_Pre_Vector_Valid,
+  RtemsIntrReqGetAttributes_Pre_Vector_Invalid,
+  RtemsIntrReqGetAttributes_Pre_Vector_NA
+} RtemsIntrReqGetAttributes_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqGetAttributes_Pre_Attributes_Obj,
+  RtemsIntrReqGetAttributes_Pre_Attributes_Null,
+  RtemsIntrReqGetAttributes_Pre_Attributes_NA
+} RtemsIntrReqGetAttributes_Pre_Attributes;
+
+typedef enum {
+  RtemsIntrReqGetAttributes_Post_Status_Ok,
+  RtemsIntrReqGetAttributes_Post_Status_InvAddr,
+  RtemsIntrReqGetAttributes_Post_Status_InvId,
+  RtemsIntrReqGetAttributes_Post_Status_NA
+} RtemsIntrReqGetAttributes_Post_Status;
+
+typedef enum {
+  RtemsIntrReqGetAttributes_Post_Attributes_Nop,
+  RtemsIntrReqGetAttributes_Post_Attributes_Zero,
+  RtemsIntrReqGetAttributes_Post_Attributes_Set,
+  RtemsIntrReqGetAttributes_Post_Attributes_NA
+} RtemsIntrReqGetAttributes_Post_Attributes;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/get-attributes test case.
+ */
+typedef struct {
+  /**
+   * @brief This member provides the rtems_interrupt_attributes object.
+   */
+  rtems_interrupt_attributes attributes_obj;
+
+  /**
+   * @brief If this member is true, then the ``vector`` parameter shall be
+   *   valid.
+   */
+  bool valid_vector;
+
+  /**
+   * @brief This member specifies if the ``attributes`` parameter value.
+   */
+  rtems_interrupt_attributes *attributes;;
+
+  /**
+   * @brief This member con

[PATCH 28/41] validation: HasInterruptVectorEntriesInstalled()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/libvalidation.yml   |  1 +
 testsuites/validation/tx-interrupt.c  | 79 +++
 testsuites/validation/tx-support.h|  2 +
 3 files changed, 82 insertions(+)
 create mode 100644 testsuites/validation/tx-interrupt.c

diff --git a/spec/build/testsuites/validation/libvalidation.yml 
b/spec/build/testsuites/validation/libvalidation.yml
index 54c7ae0ac0..98dd2e3623 100644
--- a/spec/build/testsuites/validation/libvalidation.yml
+++ b/spec/build/testsuites/validation/libvalidation.yml
@@ -12,6 +12,7 @@ install-path: null
 links: []
 source:
 - testsuites/validation/tx-call-within-isr.c
+- testsuites/validation/tx-interrupt.c
 - testsuites/validation/tx-support.c
 target: validation
 type: build
diff --git a/testsuites/validation/tx-interrupt.c 
b/testsuites/validation/tx-interrupt.c
new file mode 100644
index 00..d056af5abc
--- /dev/null
+++ b/testsuites/validation/tx-interrupt.c
@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestSuites
+ *
+ * @brief This source file contains the implementation of
+ *   HasInterruptVectorEntriesInstalled().
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "tx-support.h"
+
+#include 
+#include 
+
+static void HasInstalled(
+  void   *arg,
+  const char *info,
+  rtems_optionoptions,
+  rtems_interrupt_handler handler_routine,
+  void   *handler_arg
+)
+{
+  bool *has_installed_entries;
+
+  (void) info;
+  (void) options;
+  (void) handler_routine;
+  (void) handler_arg;
+
+  has_installed_entries = arg;
+  *has_installed_entries = true;
+}
+
+bool HasInterruptVectorEntriesInstalled( rtems_vector_number vector )
+{
+  bool  has_installed_entries;
+  rtems_status_code sc;
+
+  has_installed_entries = false;
+  sc = rtems_interrupt_handler_iterate(
+vector,
+HasInstalled,
+&has_installed_entries
+  );
+  T_quiet_rsc_success( sc );
+
+  return has_installed_entries;
+}
diff --git a/testsuites/validation/tx-support.h 
b/testsuites/validation/tx-support.h
index 9d5a51e461..378e98ee3f 100644
--- a/testsuites/validation/tx-support.h
+++ b/testsuites/validation/tx-support.h
@@ -113,6 +113,8 @@ void CallWithinISRSubmit( CallWithinISRRequest *request );
 
 void CallWithinISRWait( const CallWithinISRRequest *request );
 
+bool HasInterruptVectorEntriesInstalled( rtems_vector_number vector );
+
 /** @} */
 
 #ifdef __cplusplus
-- 
2.26.2

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[PATCH 14/41] bsps/irq: Add rtems_interrupt_is_pending()

[Sebastian Huber]

Add a default implementation which just returns RTEMS_UNSATISFIED.

Update #3269.
---
 bsps/arm/beagle/irq/irq.c | 11 ++
 bsps/arm/csb336/irq/irq.c | 11 ++
 bsps/arm/csb337/irq/irq.c | 11 ++
 bsps/arm/edb7312/irq/irq.c| 11 ++
 bsps/arm/gumstix/irq/irq.c| 11 ++
 bsps/arm/lpc24xx/irq/irq.c| 11 ++
 bsps/arm/lpc32xx/irq/irq.c| 11 ++
 bsps/arm/raspberrypi/irq/irq.c| 11 ++
 bsps/arm/rtl22xx/irq/irq.c| 11 ++
 bsps/arm/shared/irq/irq-armv7m.c  | 11 ++
 bsps/arm/smdk2410/irq/irq.c   | 11 ++
 bsps/arm/tms570/irq/irq.c | 11 ++
 bsps/i386/shared/irq/irq.c| 11 ++
 bsps/include/bsp/irq-generic.h| 26 +++
 bsps/lm32/shared/irq/irq.c| 11 ++
 bsps/m68k/genmcf548x/irq/irq.c| 11 ++
 bsps/mips/shared/irq/irq.c| 11 ++
 bsps/powerpc/gen5200/irq/irq.c| 11 ++
 bsps/powerpc/gen83xx/irq/irq.c| 11 ++
 bsps/powerpc/mpc55xxevb/start/irq.c   | 11 ++
 bsps/powerpc/mpc8260ads/irq/irq.c | 11 ++
 bsps/powerpc/psim/irq/irq_init.c  | 11 ++
 bsps/powerpc/qemuppc/irq/irq_init.c   | 11 ++
 bsps/powerpc/qoriq/irq/irq.c  | 22 +++
 bsps/powerpc/shared/irq/ppc-irq-generic.c | 11 ++
 bsps/powerpc/t32mppc/irq/irq.c| 11 ++
 bsps/powerpc/tqm8xx/irq/irq.c | 11 ++
 bsps/powerpc/virtex/irq/irq_init.c| 11 ++
 bsps/riscv/griscv/irq/irq.c   | 11 ++
 bsps/riscv/riscv/irq/irq.c| 11 ++
 bsps/shared/dev/irq/arm-gicv2.c   | 11 ++
 bsps/shared/dev/irq/arm-gicv3.c   | 11 ++
 bsps/shared/irq/irq-cause-clear.c | 16 ++
 bsps/shared/irq/irq-default.c | 11 ++
 bsps/sparc/leon3/start/eirq.c | 11 ++
 bsps/sparc/shared/irq/irq-shared.c| 11 ++
 bsps/x86_64/amd64/interrupts/idt.c| 11 ++
 37 files changed, 438 insertions(+)

diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c
index d54b49f0ca..e34a89afff 100644
--- a/bsps/arm/beagle/irq/irq.c
+++ b/bsps/arm/beagle/irq/irq.c
@@ -103,6 +103,17 @@ rtems_status_code bsp_interrupt_get_attributes(
   return RTEMS_SUCCESSFUL;
 }
 
+rtems_status_code bsp_interrupt_is_pending(
+  rtems_vector_number vector,
+  bool   *pending
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(pending != NULL);
+  *pending = false;
+  return RTEMS_UNSATISFIED;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/csb336/irq/irq.c b/bsps/arm/csb336/irq/irq.c
index 2cc4f5bb5c..13f094e1fb 100644
--- a/bsps/arm/csb336/irq/irq.c
+++ b/bsps/arm/csb336/irq/irq.c
@@ -34,6 +34,17 @@ rtems_status_code bsp_interrupt_get_attributes(
   return RTEMS_SUCCESSFUL;
 }
 
+rtems_status_code bsp_interrupt_is_pending(
+  rtems_vector_number vector,
+  bool   *pending
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(pending != NULL);
+  *pending = false;
+  return RTEMS_UNSATISFIED;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/csb337/irq/irq.c b/bsps/arm/csb337/irq/irq.c
index 1679b89dc3..1b13f0b461 100644
--- a/bsps/arm/csb337/irq/irq.c
+++ b/bsps/arm/csb337/irq/irq.c
@@ -35,6 +35,17 @@ rtems_status_code bsp_interrupt_get_attributes(
   return RTEMS_SUCCESSFUL;
 }
 
+rtems_status_code bsp_interrupt_is_pending(
+  rtems_vector_number vector,
+  bool   *pending
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(pending != NULL);
+  *pending = false;
+  return RTEMS_UNSATISFIED;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
diff --git a/bsps/arm/edb7312/irq/irq.c b/bsps/arm/edb7312/irq/irq.c
index 573e4f015d..75dffdec9f 100644
--- a/bsps/arm/edb7312/irq/irq.c
+++ b/bsps/arm/edb7312/irq/irq.c
@@ -35,6 +35,17 @@ rtems_status_code bsp_interrupt_get_attributes(
   return RTEMS_SUCCESSFUL;
 }
 
+rtems_status_code bsp_interrupt_is_pending(
+  rtems_vector_number vector,
+  bool   *pending
+)
+{
+  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  bsp_interrupt_assert(pending != NULL);
+  *pending = false;
+  return RTEMS_UNSATISFIED;
+}
+
 rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
 {
   bsp_interrupt_assert(

[PATCH 33/41] validation: Test rtems_interrupt_vector_disable()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 .../validation/tc-intr-vector-disable.c   | 608 ++
 2 files changed, 609 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-vector-disable.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index 36d2a0f388..78633bebe5 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -16,6 +16,7 @@ source:
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
 - testsuites/validation/tc-intr-get-attributes.c
+- testsuites/validation/tc-intr-vector-disable.c
 - testsuites/validation/tc-intr-vector-enable.c
 - testsuites/validation/tc-intr-vector-is-enabled.c
 - testsuites/validation/tc-message-construct-errors.c
diff --git a/testsuites/validation/tc-intr-vector-disable.c 
b/testsuites/validation/tc-intr-vector-disable.c
new file mode 100644
index 00..a926febf73
--- /dev/null
+++ b/testsuites/validation/tc-intr-vector-disable.c
@@ -0,0 +1,608 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqVectorDisable
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqVectorDisable \
+ *   spec:/rtems/intr/req/vector-disable
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqVectorDisable_Pre_Vector_Valid,
+  RtemsIntrReqVectorDisable_Pre_Vector_Invalid,
+  RtemsIntrReqVectorDisable_Pre_Vector_NA
+} RtemsIntrReqVectorDisable_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqVectorDisable_Pre_IsEnabled_Yes,
+  RtemsIntrReqVectorDisable_Pre_IsEnabled_No,
+  RtemsIntrReqVectorDisable_Pre_IsEnabled_NA
+} RtemsIntrReqVectorDisable_Pre_IsEnabled;
+
+typedef enum {
+  RtemsIntrReqVectorDisable_Pre_CanDisable_Yes,
+  RtemsIntrReqVectorDisable_Pre_CanDisable_No,
+  RtemsIntrReqVectorDisable_Pre_CanDisable_NA
+} RtemsIntrReqVectorDisable_Pre_CanDisable;
+
+typedef enum {
+  RtemsIntrReqVectorDisable_Post_Status_Ok,
+  RtemsIntrReqVectorDisable_Post_Status_InvId,
+  RtemsIntrReqVectorDisable_Post_Status_Unsat,
+  RtemsIntrReqVectorDisable_Post_Status_NA
+} RtemsIntrReqVectorDisable_Post_Status;
+
+typedef enum {
+  RtemsIntrReqVectorDisable_Post_IsEnabled_Nop,
+  RtemsIntrReqVectorDisable_Post_IsEnabled_No,
+  RtemsIntrReqVectorDisable_Post_IsEnabled_NA
+} RtemsIntrReqVectorDisable_Post_IsEnabled;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/vector-disable test case.
+ */
+typedef struct {
+  /**
+   * @brief If this member is true, then an interrupt occurred.
+   */
+  bool interrupt_occurred;
+
+  /**
+   * @brief This member contains the current vector number.
+   */
+  rtems_vector_number vector;
+
+  /**
+   * @brief

[PATCH 09/41] rtems: Add rtems_interrupt_is_pending()

[Sebastian Huber]

Update #3269.
---
 cpukit/include/rtems/irq-extension.h | 54 
 1 file changed, 54 insertions(+)

diff --git a/cpukit/include/rtems/irq-extension.h 
b/cpukit/include/rtems/irq-extension.h
index 4a8f0b7879..c96dfd7d5c 100644
--- a/cpukit/include/rtems/irq-extension.h
+++ b/cpukit/include/rtems/irq-extension.h
@@ -453,6 +453,60 @@ rtems_status_code rtems_interrupt_vector_enable( 
rtems_vector_number vector );
  */
 rtems_status_code rtems_interrupt_vector_disable( rtems_vector_number vector );
 
+/* Generated from spec:/rtems/intr/if/is-pending */
+
+/**
+ * @ingroup RTEMSAPIClassicIntr
+ *
+ * @brief Checks if the interrupt is pending.
+ *
+ * @param vector is the interrupt vector number.
+ *
+ * @param[out] pending is the pointer to a ``bool`` object.  When the directive
+ *   call is successful, the pending status of the interrupt associated with
+ *   the interrupt vector specified by ``vector`` will be stored in this
+ *   object.  When the interrupt was pending for the processor executing the
+ *   directive call at some time point during the call, the object value will
+ *   be set to true, otherwise to false.
+ *
+ * The directive checks if the interrupt associated with the interrupt vector
+ * specified by ``vector`` was pending for the processor executing the
+ * directive call at some time point during the call.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_ADDRESS The ``pending`` parameter was NULL.
+ *
+ * @retval ::RTEMS_INVALID_ID There was no interrupt vector associated with the
+ *   number specified by ``vector``.
+ *
+ * @retval ::RTEMS_UNSATISFIED The request to get the pending status has not
+ *   been satisfied.
+ *
+ * @par Notes
+ * Interrupts may be made pending by calling the rtems_interrupt_cause() or
+ * rtems_interrupt_cause_on() directives or due to exernal signals or messages.
+ * The pending state may be cleared by rtems_interrupt_clear().
+ *
+ * @par Constraints
+ * @parblock
+ * The following constraints apply to this directive:
+ *
+ * * The directive may be called from within interrupt context.
+ *
+ * * The directive may be called from within device driver initialization
+ *   context.
+ *
+ * * The directive may be called from within task context.
+ *
+ * * The directive will not cause the calling task to be preempted.
+ * @endparblock
+ */
+rtems_status_code rtems_interrupt_is_pending(
+  rtems_vector_number vector,
+  bool   *pending
+);
+
 /* Generated from spec:/rtems/intr/if/get-affinity */
 
 /**
-- 
2.26.2

___
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[PATCH 40/41] validation: Test rtems_interrupt_get_affinity()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 testsuites/validation/tc-intr-get-affinity.c  | 639 ++
 2 files changed, 640 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-get-affinity.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index eba0954182..89c0f408d6 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -20,6 +20,7 @@ source:
 - testsuites/validation/tc-intr-clear.c
 - testsuites/validation/tc-intr-entry-install.c
 - testsuites/validation/tc-intr-entry-remove.c
+- testsuites/validation/tc-intr-get-affinity.c
 - testsuites/validation/tc-intr-get-attributes.c
 - testsuites/validation/tc-intr-is-pending.c
 - testsuites/validation/tc-intr-vector-disable.c
diff --git a/testsuites/validation/tc-intr-get-affinity.c 
b/testsuites/validation/tc-intr-get-affinity.c
new file mode 100644
index 00..43d8c75fec
--- /dev/null
+++ b/testsuites/validation/tc-intr-get-affinity.c
@@ -0,0 +1,639 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqGetAffinity
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqGetAffinity \
+ *   spec:/rtems/intr/req/get-affinity
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqGetAffinity_Pre_Vector_Valid,
+  RtemsIntrReqGetAffinity_Pre_Vector_Invalid,
+  RtemsIntrReqGetAffinity_Pre_Vector_NA
+} RtemsIntrReqGetAffinity_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqGetAffinity_Pre_CPUSetSize_Valid,
+  RtemsIntrReqGetAffinity_Pre_CPUSetSize_TooSmall,
+  RtemsIntrReqGetAffinity_Pre_CPUSetSize_Askew,
+  RtemsIntrReqGetAffinity_Pre_CPUSetSize_NA
+} RtemsIntrReqGetAffinity_Pre_CPUSetSize;
+
+typedef enum {
+  RtemsIntrReqGetAffinity_Pre_CPUSet_Valid,
+  RtemsIntrReqGetAffinity_Pre_CPUSet_Null,
+  RtemsIntrReqGetAffinity_Pre_CPUSet_NA
+} RtemsIntrReqGetAffinity_Pre_CPUSet;
+
+typedef enum {
+  RtemsIntrReqGetAffinity_Pre_CanGetAffinity_Yes,
+  RtemsIntrReqGetAffinity_Pre_CanGetAffinity_No,
+  RtemsIntrReqGetAffinity_Pre_CanGetAffinity_NA
+} RtemsIntrReqGetAffinity_Pre_CanGetAffinity;
+
+typedef enum {
+  RtemsIntrReqGetAffinity_Post_Status_Ok,
+  RtemsIntrReqGetAffinity_Post_Status_InvAddr,
+  RtemsIntrReqGetAffinity_Post_Status_InvId,
+  RtemsIntrReqGetAffinity_Post_Status_InvSize,
+  RtemsIntrReqGetAffinity_Post_Status_Unsat,
+  RtemsIntrReqGetAffinity_Post_Status_NA
+} RtemsIntrReqGetAffinity_Post_Status;
+
+typedef enum {
+  RtemsIntrReqGetAffinity_Post_CPUSetObj_Set,
+  RtemsIntrReqGetAffinity_Post_CPUSetObj_Nop,
+  RtemsIntrReqGetAffinity_Post_CPUSetObj_NA
+} RtemsIntrReqGetAffinity_Post_CPUSetObj;
+
+/**
+ * @brief Test context for spec:/rtems/int

[PATCH 41/41] validation: Test rtems_interrupt_set_affinity()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 testsuites/validation/tc-intr-set-affinity.c  | 670 ++
 2 files changed, 671 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-set-affinity.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index 89c0f408d6..6778a5ec25 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -23,6 +23,7 @@ source:
 - testsuites/validation/tc-intr-get-affinity.c
 - testsuites/validation/tc-intr-get-attributes.c
 - testsuites/validation/tc-intr-is-pending.c
+- testsuites/validation/tc-intr-set-affinity.c
 - testsuites/validation/tc-intr-vector-disable.c
 - testsuites/validation/tc-intr-vector-enable.c
 - testsuites/validation/tc-intr-vector-is-enabled.c
diff --git a/testsuites/validation/tc-intr-set-affinity.c 
b/testsuites/validation/tc-intr-set-affinity.c
new file mode 100644
index 00..b2b47baea8
--- /dev/null
+++ b/testsuites/validation/tc-intr-set-affinity.c
@@ -0,0 +1,670 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqSetAffinity
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqSetAffinity \
+ *   spec:/rtems/intr/req/set-affinity
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqSetAffinity_Pre_Vector_Valid,
+  RtemsIntrReqSetAffinity_Pre_Vector_Invalid,
+  RtemsIntrReqSetAffinity_Pre_Vector_NA
+} RtemsIntrReqSetAffinity_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqSetAffinity_Pre_CPUSetKind_Valid,
+  RtemsIntrReqSetAffinity_Pre_CPUSetKind_Huge,
+  RtemsIntrReqSetAffinity_Pre_CPUSetKind_Askew,
+  RtemsIntrReqSetAffinity_Pre_CPUSetKind_NA
+} RtemsIntrReqSetAffinity_Pre_CPUSetKind;
+
+typedef enum {
+  RtemsIntrReqSetAffinity_Pre_CPUSet_Valid,
+  RtemsIntrReqSetAffinity_Pre_CPUSet_Null,
+  RtemsIntrReqSetAffinity_Pre_CPUSet_NA
+} RtemsIntrReqSetAffinity_Pre_CPUSet;
+
+typedef enum {
+  RtemsIntrReqSetAffinity_Pre_CanSetAffinity_Yes,
+  RtemsIntrReqSetAffinity_Pre_CanSetAffinity_No,
+  RtemsIntrReqSetAffinity_Pre_CanSetAffinity_NA
+} RtemsIntrReqSetAffinity_Pre_CanSetAffinity;
+
+typedef enum {
+  RtemsIntrReqSetAffinity_Post_Status_Ok,
+  RtemsIntrReqSetAffinity_Post_Status_InvAddr,
+  RtemsIntrReqSetAffinity_Post_Status_InvId,
+  RtemsIntrReqSetAffinity_Post_Status_InvNum,
+  RtemsIntrReqSetAffinity_Post_Status_Unsat,
+  RtemsIntrReqSetAffinity_Post_Status_NA
+} RtemsIntrReqSetAffinity_Post_Status;
+
+typedef enum {
+  RtemsIntrReqSetAffinity_Post_SetAffinity_Yes,
+  RtemsIntrReqSetAffinity_Post_SetAffinity_Nop,
+  RtemsIntrReqSetAffinity_Post_SetAffinity_NA
+} RtemsIntrReqSetAffinity_Post_SetAffinity;
+
+/**
+ * @brief Test context for spec:/rtems

[PATCH 35/41] validation: Test rtems_interrupt_entry_remove()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|1 +
 testsuites/validation/tc-intr-entry-remove.c  | 1302 +
 2 files changed, 1303 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-entry-remove.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index c536779f2d..08ef145c82 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -16,6 +16,7 @@ source:
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
 - testsuites/validation/tc-intr-entry-install.c
+- testsuites/validation/tc-intr-entry-remove.c
 - testsuites/validation/tc-intr-get-attributes.c
 - testsuites/validation/tc-intr-vector-disable.c
 - testsuites/validation/tc-intr-vector-enable.c
diff --git a/testsuites/validation/tc-intr-entry-remove.c 
b/testsuites/validation/tc-intr-entry-remove.c
new file mode 100644
index 00..90f3701ef0
--- /dev/null
+++ b/testsuites/validation/tc-intr-entry-remove.c
@@ -0,0 +1,1302 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqEntryRemove
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqEntryRemove \
+ *   spec:/rtems/intr/req/entry-remove
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_Vector_Valid,
+  RtemsIntrReqEntryRemove_Pre_Vector_Invalid,
+  RtemsIntrReqEntryRemove_Pre_Vector_NA
+} RtemsIntrReqEntryRemove_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_Entry_Obj,
+  RtemsIntrReqEntryRemove_Pre_Entry_Null,
+  RtemsIntrReqEntryRemove_Pre_Entry_NA
+} RtemsIntrReqEntryRemove_Pre_Entry;
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_Routine_Valid,
+  RtemsIntrReqEntryRemove_Pre_Routine_Null,
+  RtemsIntrReqEntryRemove_Pre_Routine_NA
+} RtemsIntrReqEntryRemove_Pre_Routine;
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_EntryObj_Installed,
+  RtemsIntrReqEntryRemove_Pre_EntryObj_Match,
+  RtemsIntrReqEntryRemove_Pre_EntryObj_NoMatch,
+  RtemsIntrReqEntryRemove_Pre_EntryObj_NA
+} RtemsIntrReqEntryRemove_Pre_EntryObj;
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_Init_Yes,
+  RtemsIntrReqEntryRemove_Pre_Init_No,
+  RtemsIntrReqEntryRemove_Pre_Init_NA
+} RtemsIntrReqEntryRemove_Pre_Init;
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_ISR_Yes,
+  RtemsIntrReqEntryRemove_Pre_ISR_No,
+  RtemsIntrReqEntryRemove_Pre_ISR_NA
+} RtemsIntrReqEntryRemove_Pre_ISR;
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_First_Yes,
+  RtemsIntrReqEntryRemove_Pre_First_No,
+  RtemsIntrReqEntryRemove_Pre_First_NA
+} RtemsIntrReqEntryRemove_Pre_First;
+
+typedef enum {
+  RtemsIntrReqEntryRemove_Pre_Last_Yes,
+  RtemsIntrReqEntryRemove_Pre_Last_No,

[PATCH 37/41] validation: Test rtems_interrupt_clear()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 testsuites/validation/tc-intr-clear.c | 586 ++
 2 files changed, 587 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-clear.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index fc7b2830e4..c47cd93234 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -16,6 +16,7 @@ source:
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
 - testsuites/validation/tc-intr-cause.c
+- testsuites/validation/tc-intr-clear.c
 - testsuites/validation/tc-intr-entry-install.c
 - testsuites/validation/tc-intr-entry-remove.c
 - testsuites/validation/tc-intr-get-attributes.c
diff --git a/testsuites/validation/tc-intr-clear.c 
b/testsuites/validation/tc-intr-clear.c
new file mode 100644
index 00..6fc917e2ad
--- /dev/null
+++ b/testsuites/validation/tc-intr-clear.c
@@ -0,0 +1,586 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqClear
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqClear spec:/rtems/intr/req/clear
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqClear_Pre_Vector_Valid,
+  RtemsIntrReqClear_Pre_Vector_Invalid,
+  RtemsIntrReqClear_Pre_Vector_NA
+} RtemsIntrReqClear_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqClear_Pre_CanClear_Yes,
+  RtemsIntrReqClear_Pre_CanClear_No,
+  RtemsIntrReqClear_Pre_CanClear_NA
+} RtemsIntrReqClear_Pre_CanClear;
+
+typedef enum {
+  RtemsIntrReqClear_Post_Status_Ok,
+  RtemsIntrReqClear_Post_Status_InvId,
+  RtemsIntrReqClear_Post_Status_Unsat,
+  RtemsIntrReqClear_Post_Status_NA
+} RtemsIntrReqClear_Post_Status;
+
+typedef enum {
+  RtemsIntrReqClear_Post_Cleared_Yes,
+  RtemsIntrReqClear_Post_Cleared_No,
+  RtemsIntrReqClear_Post_Cleared_NA
+} RtemsIntrReqClear_Post_Cleared;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/clear test case.
+ */
+typedef struct {
+  /**
+   * @brief This member contains the count of serviced interrupts.
+   */
+  volatile uint32_t interrupt_count;
+
+  /**
+   * @brief If this member is true, then the interrupt shall be cleared.
+   */
+  bool do_clear;
+
+  /**
+   * @brief This member contains the current vector number.
+   */
+  rtems_vector_number vector;
+
+  /**
+   * @brief If this member is true, then the ``vector`` parameter shall be
+   *   valid.
+   */
+  bool valid_vector;
+
+  /**
+   * @brief This member contains the return value of the
+   *   rtems_interrupt_clear() call.
+   */
+  rtems_status_code status;
+
+  /**
+   * @brief This member defines the pre-condition states for the next action.
+  

[PATCH 39/41] validation: Test rtems_interrupt_cause_on()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 testsuites/validation/tc-intr-cause-on.c  | 710 ++
 testsuites/validation/ts-default.h|  12 +-
 testsuites/validation/ts-validation-0.c   |   2 +-
 4 files changed, 723 insertions(+), 2 deletions(-)
 create mode 100644 testsuites/validation/tc-intr-cause-on.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index f432b89191..eba0954182 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -16,6 +16,7 @@ source:
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
 - testsuites/validation/tc-intr-cause.c
+- testsuites/validation/tc-intr-cause-on.c
 - testsuites/validation/tc-intr-clear.c
 - testsuites/validation/tc-intr-entry-install.c
 - testsuites/validation/tc-intr-entry-remove.c
diff --git a/testsuites/validation/tc-intr-cause-on.c 
b/testsuites/validation/tc-intr-cause-on.c
new file mode 100644
index 00..d404a255e7
--- /dev/null
+++ b/testsuites/validation/tc-intr-cause-on.c
@@ -0,0 +1,710 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqCauseOn
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqCauseOn spec:/rtems/intr/req/cause-on
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqCauseOn_Pre_Vector_Valid,
+  RtemsIntrReqCauseOn_Pre_Vector_Invalid,
+  RtemsIntrReqCauseOn_Pre_Vector_NA
+} RtemsIntrReqCauseOn_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqCauseOn_Pre_CPU_Online,
+  RtemsIntrReqCauseOn_Pre_CPU_NotOnline,
+  RtemsIntrReqCauseOn_Pre_CPU_NotConf,
+  RtemsIntrReqCauseOn_Pre_CPU_NA
+} RtemsIntrReqCauseOn_Pre_CPU;
+
+typedef enum {
+  RtemsIntrReqCauseOn_Pre_CanCauseOn_Yes,
+  RtemsIntrReqCauseOn_Pre_CanCauseOn_No,
+  RtemsIntrReqCauseOn_Pre_CanCauseOn_NA
+} RtemsIntrReqCauseOn_Pre_CanCauseOn;
+
+typedef enum {
+  RtemsIntrReqCauseOn_Post_Status_Ok,
+  RtemsIntrReqCauseOn_Post_Status_InvId,
+  RtemsIntrReqCauseOn_Post_Status_NotConf,
+  RtemsIntrReqCauseOn_Post_Status_IncStat,
+  RtemsIntrReqCauseOn_Post_Status_Unsat,
+  RtemsIntrReqCauseOn_Post_Status_NA
+} RtemsIntrReqCauseOn_Post_Status;
+
+typedef enum {
+  RtemsIntrReqCauseOn_Post_Pending_Yes,
+  RtemsIntrReqCauseOn_Post_Pending_No,
+  RtemsIntrReqCauseOn_Post_Pending_NA
+} RtemsIntrReqCauseOn_Post_Pending;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/cause-on test case.
+ */
+typedef struct {
+  /**
+   * @brief This member contains the count of serviced interrupts.
+   */
+  volatile uint32_t interrupt_count;
+
+  /**
+   * @brief If this member is true, then the interrupt shall be cleared.
+   */
+  bool 

[PATCH 26/41] bsp/raspberrypi: Add interrupt get/set affinity

[Sebastian Huber]

Add default implementations for bsp_interrupt_get_affinity() and
bsp_interrupt_set_affinity() which are required to link all tests in SMP
configurations.

Update #3269.
---
 bsps/arm/raspberrypi/include/bsp/irq.h | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/bsps/arm/raspberrypi/include/bsp/irq.h 
b/bsps/arm/raspberrypi/include/bsp/irq.h
index a363e7ce90..6801b01d84 100644
--- a/bsps/arm/raspberrypi/include/bsp/irq.h
+++ b/bsps/arm/raspberrypi/include/bsp/irq.h
@@ -25,6 +25,10 @@
 #include 
 #include 
 
+#if defined(RTEMS_SMP)
+#include 
+#endif
+
 /**
  * @defgroup raspberrypi_interrupt Interrrupt Support
  *
@@ -74,5 +78,27 @@
 
 #define BSP_IRQ_COUNT   (BCM2835_INTC_TOTAL_IRQ)
 
+#if defined(RTEMS_SMP)
+static inline rtems_status_code bsp_interrupt_set_affinity(
+  rtems_vector_number   vector,
+  const Processor_mask *affinity
+)
+{
+  (void) vector;
+  (void) affinity;
+  return RTEMS_UNSATISFIED;
+}
+
+static inline rtems_status_code bsp_interrupt_get_affinity(
+  rtems_vector_number  vector,
+  Processor_mask  *affinity
+)
+{
+  (void) vector;
+  _Processor_mask_From_index( affinity, 0 );
+  return RTEMS_UNSATISFIED;
+}
+#endif
+
 #endif /* ASM */
 #endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */
-- 
2.26.2

___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel

[PATCH 32/41] validation: Test rtems_interrupt_vector_enable()

[Sebastian Huber]

Update #3269.
---
 .../testsuites/validation/validation-0.yml|   1 +
 testsuites/validation/tc-intr-vector-enable.c | 641 ++
 2 files changed, 642 insertions(+)
 create mode 100644 testsuites/validation/tc-intr-vector-enable.c

diff --git a/spec/build/testsuites/validation/validation-0.yml 
b/spec/build/testsuites/validation/validation-0.yml
index 0fbd4d808f..36d2a0f388 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -16,6 +16,7 @@ source:
 - testsuites/validation/tc-barrier-release.c
 - testsuites/validation/tc-barrier-wait.c
 - testsuites/validation/tc-intr-get-attributes.c
+- testsuites/validation/tc-intr-vector-enable.c
 - testsuites/validation/tc-intr-vector-is-enabled.c
 - testsuites/validation/tc-message-construct-errors.c
 - testsuites/validation/tc-object.c
diff --git a/testsuites/validation/tc-intr-vector-enable.c 
b/testsuites/validation/tc-intr-vector-enable.c
new file mode 100644
index 00..47f53b4728
--- /dev/null
+++ b/testsuites/validation/tc-intr-vector-enable.c
@@ -0,0 +1,641 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsIntrReqVectorEnable
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+#include 
+#include 
+
+#include "tx-support.h"
+
+#include 
+
+/**
+ * @defgroup RTEMSTestCaseRtemsIntrReqVectorEnable \
+ *   spec:/rtems/intr/req/vector-enable
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @{
+ */
+
+typedef enum {
+  RtemsIntrReqVectorEnable_Pre_Vector_Valid,
+  RtemsIntrReqVectorEnable_Pre_Vector_Invalid,
+  RtemsIntrReqVectorEnable_Pre_Vector_NA
+} RtemsIntrReqVectorEnable_Pre_Vector;
+
+typedef enum {
+  RtemsIntrReqVectorEnable_Pre_IsEnabled_Yes,
+  RtemsIntrReqVectorEnable_Pre_IsEnabled_No,
+  RtemsIntrReqVectorEnable_Pre_IsEnabled_NA
+} RtemsIntrReqVectorEnable_Pre_IsEnabled;
+
+typedef enum {
+  RtemsIntrReqVectorEnable_Pre_CanEnable_Yes,
+  RtemsIntrReqVectorEnable_Pre_CanEnable_Maybe,
+  RtemsIntrReqVectorEnable_Pre_CanEnable_No,
+  RtemsIntrReqVectorEnable_Pre_CanEnable_NA
+} RtemsIntrReqVectorEnable_Pre_CanEnable;
+
+typedef enum {
+  RtemsIntrReqVectorEnable_Post_Status_Ok,
+  RtemsIntrReqVectorEnable_Post_Status_InvId,
+  RtemsIntrReqVectorEnable_Post_Status_Unsat,
+  RtemsIntrReqVectorEnable_Post_Status_NA
+} RtemsIntrReqVectorEnable_Post_Status;
+
+typedef enum {
+  RtemsIntrReqVectorEnable_Post_IsEnabled_Nop,
+  RtemsIntrReqVectorEnable_Post_IsEnabled_Yes,
+  RtemsIntrReqVectorEnable_Post_IsEnabled_Maybe,
+  RtemsIntrReqVectorEnable_Post_IsEnabled_NA
+} RtemsIntrReqVectorEnable_Post_IsEnabled;
+
+/**
+ * @brief Test context for spec:/rtems/intr/req/vector-enable test case.
+ */
+typedef struct {
+  /**
+   * @brief If this member is true, then an interrupt occurred.
+   */
+  bool interrupt_occurred;
+
+  /**
+   * @brief This member contains the current vector number.
+   *

Re: [PATCH rtems-libbsd v2 1/2] freebsd/if_cgem: Fail probe for unterminated MII

[Kinsey Moore]

On 7/11/2021 19:47, Chris Johns wrote:

On 10/7/21 12:53 am, Kinsey Moore wrote:

When the MII bus is unterminated on unused interfaces, it results in PHY
read timeouts which manifest as spurious PHYs during the attach call.
Detect these timeouts during the probe so the device can be ignored.
---
  freebsd/sys/dev/cadence/if_cgem.c | 18 ++
  1 file changed, 18 insertions(+)

diff --git a/freebsd/sys/dev/cadence/if_cgem.c 
b/freebsd/sys/dev/cadence/if_cgem.c
index 34df7ac7..51e0bd6d 100644
--- a/freebsd/sys/dev/cadence/if_cgem.c
+++ b/freebsd/sys/dev/cadence/if_cgem.c
@@ -1955,6 +1955,24 @@ cgem_probe(device_t dev)
return (ENXIO);
  #endif /* __rtems__ */
  
+	struct cgem_softc *sc = device_get_softc(dev);

+   int val, rid = 0;
+
+   /* Check for PHY read timeouts which indicate an unterminated MII bus */
+   sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+RF_ACTIVE);
+
+   val = cgem_miibus_readreg(dev, 0, MII_BMSR);
+   if (val == -1) {
+   bus_release_resource(dev, SYS_RES_MEMORY, &rid,
+sc->mem_res);
+   sc->mem_res = NULL;
+   return (ENXIO);
+   }
+   bus_release_resource(dev, SYS_RES_MEMORY, &rid,
+sc->mem_res);
+   sc->mem_res = NULL;

Should this change be in an "#else /* __rtems__ */" section until merged 
upstream?

Otherwise this change is looking good.

Chris


+
device_set_desc(dev, "Cadence CGEM Gigabit Ethernet Interface");
return (0);
  }


I'll wrap it in the #else block before commit, thanks.


Kinsey

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[PATCH v1] Reports: Convert to C++

[Ryan Long]

---
 tester/covoar/ReportsBase.cc |  296 ++--
 tester/covoar/ReportsBase.h  |  118 +++--
 tester/covoar/ReportsHtml.cc | 1074 +-
 tester/covoar/ReportsHtml.h  |   94 ++--
 tester/covoar/ReportsText.cc |  261 +-
 tester/covoar/ReportsText.h  |   34 +-
 6 files changed, 838 insertions(+), 1039 deletions(-)

diff --git a/tester/covoar/ReportsBase.cc b/tester/covoar/ReportsBase.cc
index 328980d..7fd3422 100644
--- a/tester/covoar/ReportsBase.cc
+++ b/tester/covoar/ReportsBase.cc
@@ -4,6 +4,9 @@
 #include 
 #include 
 
+#include 
+#include 
+
 #include "ReportsBase.h"
 #include "app_common.h"
 #include "CoverageRanges.h"
@@ -20,7 +23,7 @@
 
 namespace Coverage {
 
-ReportsBase::ReportsBase( time_t timestamp, std::string symbolSetName ):
+ReportsBase::ReportsBase( time_t timestamp, const std::string& symbolSetName ):
   reportExtension_m(""),
   symbolSetName_m(symbolSetName),
   timestamp_m( timestamp )
@@ -31,13 +34,13 @@ ReportsBase::~ReportsBase()
 {
 }
 
-FILE* ReportsBase::OpenFile(
-  const char* const fileName,
-  const char* const symbolSetName
+void ReportsBase::OpenFile(
+  const std::string& fileName,
+  const std::string& symbolSetName,
+  std::ofstream& aFile
 )
 {
   int  sc;
-  FILE*aFile;
   std::string  file;
 
   std::string symbolSetOutputDirectory;
@@ -54,120 +57,131 @@ FILE* ReportsBase::OpenFile(
   sc = mkdir( symbolSetOutputDirectory.c_str(),0755 );
 #endif
   if ( (sc == -1) && (errno != EEXIST) ) {
-fprintf(
-  stderr,
-  "Unable to create output directory %s\n",
-  symbolSetOutputDirectory.c_str()
+throw rld::error(
+  "Unable to create output directory",
+  "ReportsBase::OpenFile"
 );
-return NULL;
+return;
   }
 
   file = symbolSetOutputDirectory;
   rld::path::path_join(file, fileName, file);
 
   // Open the file.
-  aFile = fopen( file.c_str(), "w" );
-  if ( !aFile ) {
-fprintf( stderr, "Unable to open %s\n", file.c_str() );
+  aFile.open( file );
+  if ( !aFile.is_open() ) {
+std::cerr << "Unable to open " << file << std::endl;
   }
-  return aFile;
+  return;
 }
 
 void ReportsBase::WriteIndex(
-  const char* const fileName
+  const std::string& fileName
 )
 {
 }
 
-FILE* ReportsBase::OpenAnnotatedFile(
-  const char* const fileName
+void ReportsBase::OpenAnnotatedFile(
+  const std::string& fileName,
+  std::ofstream& aFile
 )
 {
-  return OpenFile(fileName, symbolSetName_m.c_str());
+  OpenFile(fileName, symbolSetName_m, aFile);
+  return;
 }
 
-FILE* ReportsBase::OpenBranchFile(
-  const char* const fileName,
-  bool  hasBranches
+void ReportsBase::OpenBranchFile(
+  const std::string& fileName,
+  bool   hasBranches,
+  std::ofstream& aFile
 )
 {
-  return OpenFile(fileName, symbolSetName_m.c_str());
+  OpenFile(fileName, symbolSetName_m, aFile);
+  return;
 }
 
-FILE* ReportsBase::OpenCoverageFile(
-  const char* const fileName
+void ReportsBase::OpenCoverageFile(
+  const std::string& fileName,
+  std::ofstream& aFile
 )
 {
-  return OpenFile(fileName, symbolSetName_m.c_str());
+  OpenFile(fileName, symbolSetName_m, aFile);
+  return;
 }
 
-FILE* ReportsBase::OpenNoRangeFile(
-  const char* const fileName
+void ReportsBase::OpenNoRangeFile(
+  const std::string& fileName,
+  std::ofstream& aFile
 )
 {
-  return OpenFile(fileName, symbolSetName_m.c_str());
+  OpenFile(fileName, symbolSetName_m, aFile);
+  return;
 }
 
 
-FILE* ReportsBase::OpenSizeFile(
-  const char* const fileName
+void ReportsBase::OpenSizeFile(
+  const std::string& fileName,
+  std::ofstream& aFile
 )
 {
-  return OpenFile(fileName, symbolSetName_m.c_str());
+  OpenFile(fileName, symbolSetName_m, aFile);
+  return;
 }
 
-FILE* ReportsBase::OpenSymbolSummaryFile(
-  const char* const fileName
+void ReportsBase::OpenSymbolSummaryFile(
+  const std::string& fileName,
+  std::ofstream& aFile
 )
 {
-  return OpenFile(fileName, symbolSetName_m.c_str());
+  OpenFile(fileName, symbolSetName_m, aFile);
+  return;
 }
 
 void ReportsBase::CloseFile(
-  FILE*  aFile
+  std::ofstream& aFile
 )
 {
-  fclose( aFile );
+  aFile.close();
 }
 
 void ReportsBase::CloseAnnotatedFile(
-  FILE*  aFile
+  std::ofstream& aFile
 )
 {
   CloseFile( aFile );
 }
 
 void ReportsBase::CloseBranchFile(
-  FILE*  aFile,
-  bool   hasBranches
+  std::ofstream& aFile,
+  bool   hasBranches
 )
 {
   CloseFile( aFile );
 }
 
 void  ReportsBase::CloseCoverageFile(
-  FILE*  aFile
+  std::ofstream& aFile
 )
 {
   CloseFile( aFile );
 }
 
 void  ReportsBase::CloseNoRangeFile(
-  FILE*  aFile
+  std::ofstream& aFile
 )
 {
   CloseFile( aFile );
 }
 
 void  ReportsBase::CloseSizeFile(
-  FILE*  aFile
+  std::ofstream& aFile
 )
 {
   CloseFile( aFile );
 }
 
 void  ReportsBase::CloseSymbolSummaryFile(
-  FILE*  aFile
+  std::ofstream& aFile
 )
 {
   CloseFile( aFile );
@@ -195,18 +209,23 @@ std::string expand_tabs(const std::string& in) {
  *  Write annotated repo

Re: GSoC - Code Formatting and Style Checking for RTEMS score

[Ida Delphine]

Hello,
What I did was copy and paste the script into my local
rtems/.git/hooks/pre-commit file, intentionally made some wrong style
changes in some files and tried making a commit. I have documented how it
works here
https://github.com/Idadelveloper/rtems-docs/commit/a30407e159726ce745df7ab4813c5b3a58b34f93
Will love feedback to also make it better.

On Mon, Jul 12, 2021 at 8:22 AM Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:

> Hello Ida,
>
> On 10/07/2021 01:08, Ida Delphine wrote:
> > I added the functionality for my script to ignore certain directories
> > like /bsps/, /testsuites/, '/cpukit/zlib', '/cpukit/mghttpd'.
> > https://github.com/Idadelveloper/rtems/blob/master/hooks/pre-commit
> > 
> > Are there any extra directories I should exclude?
> >
> > Also open to more suggestions and feedback to make my code better :)
>
> what do I have to do to test this pre-commit hook?
>
> --
> embedded brains GmbH
> Herr Sebastian HUBER
> Dornierstr. 4
> 82178 Puchheim
> Germany
> email: sebastian.hu...@embedded-brains.de
> phone: +49-89-18 94 741 - 16
> fax:   +49-89-18 94 741 - 08
>
> Registergericht: Amtsgericht München
> Registernummer: HRB 157899
> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
> Unsere Datenschutzerklärung finden Sie hier:
> https://embedded-brains.de/datenschutzerklaerung/
>
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[PATCH rtems-libbsd v1] nexus: Added SDHCI driver to ZynqMP

[Stephen Clark]

Made ZynqMP build with the SDHCI driver.
---
 rtemsbsd/include/bsp/nexus-devices.h  |  4 +++
 .../include/machine/rtems-bsd-nexus-bus.h | 29 +++
 2 files changed, 33 insertions(+)

diff --git a/rtemsbsd/include/bsp/nexus-devices.h 
b/rtemsbsd/include/bsp/nexus-devices.h
index 5b51de7e..fdc845c1 100644
--- a/rtemsbsd/include/bsp/nexus-devices.h
+++ b/rtemsbsd/include/bsp/nexus-devices.h
@@ -119,6 +119,10 @@ 
RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM3(ZYNQMP_IRQ_ETHERNET_3);
 RTEMS_BSD_DRIVER_E1000PHY;
 RTEMS_BSD_DRIVER_UKPHY;
 
+RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI0;
+RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI1;
+RTEMS_BSD_DRIVER_MMC;
+
 #elif defined(LIBBSP_ARM_ATSAM_BSP_H)
 
 RTEMS_BSD_DRIVER_USB;
diff --git a/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h 
b/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h
index ccf8efa6..103d5b1d 100644
--- a/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h
+++ b/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h
@@ -139,6 +139,35 @@ extern "C" {
   &zynqmp_slcr_res[0])
 #endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SLCR */
 
+/*
+ * Xilinx ZynqMP Arasan SDIO Driver.
+ */
+#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI)
+  #define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI(_num, _base, _irq)  
   \
+static const rtems_bsd_device_resource arasan_sdhci ## _num ## _res[] = {  
 \
+  {
 \
+.type = RTEMS_BSD_RES_MEMORY,  
 \
+.start_request = 0,
 \
+.start_actual = (_base)
 \
+  }, { 
 \
+.type = RTEMS_BSD_RES_IRQ, 
 \
+.start_request = 0,
 \
+.start_actual = (_irq) 
 \
+  }
 \
+}; 
 \
+RTEMS_BSD_DEFINE_NEXUS_DEVICE(arasan_sdhci, _num,  
 \
+  RTEMS_ARRAY_SIZE(arasan_sdhci ## _num ## 
_res),  \
+  &arasan_sdhci ## _num ## _res[0])
+#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI */
+#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI0)
+  #define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI0\
+RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI(0, 0xFF16, 80) 
+#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI0 */
+#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI1)
+  #define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI1\
+RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI(1, 0xFF17, 81)
+#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI1 */
+
 /*
  * Xilinx Zynq Arasan SDIO Driver.
  */
-- 
2.27.0

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Re: [PATCH 19/41] bsps/irq: Implement new directives for GICv2/3

[Kinsey Moore]

Comments inline below.

On 7/12/2021 07:49, Sebastian Huber wrote:

Update #3269.
---
  bsps/include/dev/irq/arm-gic-irq.h |   3 +
  bsps/shared/dev/irq/arm-gicv2.c|  93 +---
  bsps/shared/dev/irq/arm-gicv3.c| 131 -
  3 files changed, 194 insertions(+), 33 deletions(-)

diff --git a/bsps/include/dev/irq/arm-gic-irq.h 
b/bsps/include/dev/irq/arm-gic-irq.h
index 68e0247fd8..398fd8bceb 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -46,6 +46,9 @@ extern "C" {
  #define ARM_GIC_IRQ_SGI_13 13
  #define ARM_GIC_IRQ_SGI_14 14
  #define ARM_GIC_IRQ_SGI_15 15
+#define ARM_GIC_IRQ_SGI_LAST 15
+
+#define ARM_GIC_IRQ_PPI_LAST 31
  
  #define ARM_GIC_DIST ((volatile gic_dist *) BSP_ARM_GIC_DIST_BASE)
  
diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c

index a1ba5e9112..6f5d4015e4 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -1,5 +1,5 @@
  /*
- * Copyright (c) 2013, 2019 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2013, 2021 embedded brains GmbH.  All rights reserved.
   *
   *  embedded brains GmbH
   *  Dornierstr. 4
@@ -69,6 +69,28 @@ rtems_status_code bsp_interrupt_get_attributes(
rtems_interrupt_attributes *attributes
  )
  {
+  attributes->is_maskable = true;
+  attributes->maybe_enable = true;
+
+  if ( vector <= ARM_GIC_IRQ_SGI_LAST ) {
+attributes->always_enabled = true;


As far as I'm aware, SGIs can be enabled or disabled using 
GICD_ISENABLER0 just like


PPI or SPI interrupts for both GICv2 and GICv3. Section 3.1.2 of the 
GICv2 architecture


spec (IHI0048B) references this, though I have seen implementations 
where certain SGI


and PPI interrupts are hard-wired enabled or disabled and that state 
can't be changed


(which is also covered in this section).


+attributes->can_enable = true;
+attributes->can_cause = true;
+attributes->can_cause_on = true;
+attributes->cleared_by_acknowledge = true;
+  } else {
+attributes->can_disable = true;
+attributes->can_cause = true;
+attributes->can_clear = true;
+
+if ( vector > ARM_GIC_IRQ_PPI_LAST ) {
+  /* SPI */
+  attributes->can_enable = true;
+  attributes->can_get_affinity = true;
+  attributes->can_set_affinity = true;
+}
+  }
+
return RTEMS_SUCCESSFUL;
  }
  
@@ -77,16 +99,25 @@ rtems_status_code bsp_interrupt_is_pending(

bool   *pending
  )
  {
-  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  bsp_interrupt_assert(pending != NULL);
-  *pending = false;
-  return RTEMS_UNSATISFIED;
+  volatile gic_dist *dist = ARM_GIC_DIST;
+
+  *pending = gic_id_is_pending(dist, vector);
+  return RTEMS_SUCCESSFUL;
  }
  
  rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)

  {
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+arm_gic_trigger_sgi(vector, 1U << _SMP_Get_current_processor());
+  } else {
+volatile gic_dist *dist = ARM_GIC_DIST;
+
+gic_id_set_pending(dist, vector);
+  }
+
+  return RTEMS_SUCCESSFUL;
  }
  
  #if defined(RTEMS_SMP)

@@ -95,15 +126,27 @@ rtems_status_code bsp_interrupt_cause_on(
uint32_tcpu_index
  )
  {
-  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+  if (vector >= 16) {
+return RTEMS_UNSATISFIED;
+  }
+
+  arm_gic_trigger_sgi(vector, 1U << cpu_index);
+  return RTEMS_SUCCESSFUL;
  }
  #endif
  
  rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)

  {
+  volatile gic_dist *dist = ARM_GIC_DIST;
+
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+return RTEMS_UNSATISFIED;
+  }
+
+  gic_id_clear_pending(dist, vector);
+  return RTEMS_SUCCESSFUL;
  }
  
  rtems_status_code bsp_interrupt_vector_is_enabled(

@@ -113,8 +156,16 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
  {
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(enabled != NULL);
-  *enabled = false;
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+*enabled = true;
+  } else {
+volatile gic_dist *dist = ARM_GIC_DIST;
+
+*enabled = gic_id_is_enabled(dist, vector);
+  }
+
+  return RTEMS_SUCCESSFUL;
  }
  
  rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)

@@ -133,6 +184,11 @@ rtems_status_code 
bsp_interrupt_vector_disable(rtems_vector_number vector)
  
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
  
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {

+/* SGI cannot be disabled */
+return RTEMS_UNSATISFIED;
+  }
+
gic_id_disable(dist, vector);
return RTEMS_SUCCESSFUL;
  }
@@ -207,8 +263,8 @@ BSP_START_TEXT_SECTION void 
arm_gic_irq_initialize_secondary_cpu(void)
dist->icdigr[0] = 0xf

Re: [PATCH 19/41] bsps/irq: Implement new directives for GICv2/3

[Sebastian Huber]

On 13/07/2021 04:46, Kinsey Moore wrote:

index a1ba5e9112..6f5d4015e4 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -1,5 +1,5 @@
  /*
- * Copyright (c) 2013, 2019 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2013, 2021 embedded brains GmbH.  All rights reserved.
   *
   *  embedded brains GmbH
   *  Dornierstr. 4
@@ -69,6 +69,28 @@ rtems_status_code bsp_interrupt_get_attributes(
    rtems_interrupt_attributes *attributes
  )
  {
+  attributes->is_maskable = true;
+  attributes->maybe_enable = true;
+
+  if ( vector <= ARM_GIC_IRQ_SGI_LAST ) {
+    attributes->always_enabled = true;


As far as I'm aware, SGIs can be enabled or disabled using 
GICD_ISENABLER0 just like


PPI or SPI interrupts for both GICv2 and GICv3. Section 3.1.2 of the 
GICv2 architecture


spec (IHI0048B) references this, though I have seen implementations 
where certain SGI


and PPI interrupts are hard-wired enabled or disabled and that state 
can't be changed


(which is also covered in this section).


Ok, on Qemu and the i.MX7D the SGI are always enabled. I would keep the 
attributes like this until we have a system which is different. I will 
remove the check in bsp_interrupt_vector_enable/disable(). So, in the 
worst case, the attributes are wrong.





+    attributes->can_enable = true;
+    attributes->can_cause = true;
+    attributes->can_cause_on = true;
+    attributes->cleared_by_acknowledge = true;
+  } else {
+    attributes->can_disable = true;
+    attributes->can_cause = true;
+    attributes->can_clear = true;
+
+    if ( vector > ARM_GIC_IRQ_PPI_LAST ) {
+  /* SPI */
+  attributes->can_enable = true;
+  attributes->can_get_affinity = true;
+  attributes->can_set_affinity = true;
+    }
+  }
+
    return RTEMS_SUCCESSFUL;
  }
@@ -77,16 +99,25 @@ rtems_status_code bsp_interrupt_is_pending(
    bool   *pending
  )
  {
-  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  bsp_interrupt_assert(pending != NULL);
-  *pending = false;
-  return RTEMS_UNSATISFIED;
+  volatile gic_dist *dist = ARM_GIC_DIST;
+
+  *pending = gic_id_is_pending(dist, vector);
+  return RTEMS_SUCCESSFUL;
  }
  rtems_status_code bsp_interrupt_cause(rtems_vector_number vector)
  {
    bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+    arm_gic_trigger_sgi(vector, 1U << _SMP_Get_current_processor());
+  } else {
+    volatile gic_dist *dist = ARM_GIC_DIST;
+
+    gic_id_set_pending(dist, vector);
+  }
+
+  return RTEMS_SUCCESSFUL;
  }
  #if defined(RTEMS_SMP)
@@ -95,15 +126,27 @@ rtems_status_code bsp_interrupt_cause_on(
    uint32_t    cpu_index
  )
  {
-  bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+  if (vector >= 16) {
+    return RTEMS_UNSATISFIED;
+  }
+
+  arm_gic_trigger_sgi(vector, 1U << cpu_index);
+  return RTEMS_SUCCESSFUL;
  }
  #endif
  rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
  {
+  volatile gic_dist *dist = ARM_GIC_DIST;
+
    bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+    return RTEMS_UNSATISFIED;
+  }
+
+  gic_id_clear_pending(dist, vector);
+  return RTEMS_SUCCESSFUL;
  }
  rtems_status_code bsp_interrupt_vector_is_enabled(
@@ -113,8 +156,16 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
  {
    bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
    bsp_interrupt_assert(enabled != NULL);
-  *enabled = false;
-  return RTEMS_UNSATISFIED;
+
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+    *enabled = true;
+  } else {
+    volatile gic_dist *dist = ARM_GIC_DIST;
+
+    *enabled = gic_id_is_enabled(dist, vector);
+  }
+
+  return RTEMS_SUCCESSFUL;
  }
  rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number 
vector)
@@ -133,6 +184,11 @@ rtems_status_code 
bsp_interrupt_vector_disable(rtems_vector_number vector)

    bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+  if (vector <= ARM_GIC_IRQ_SGI_LAST) {
+    /* SGI cannot be disabled */
+    return RTEMS_UNSATISFIED;
+  }
+


I will remove this check here.


    gic_id_disable(dist, vector);
    return RTEMS_SUCCESSFUL;
  }
@@ -207,8 +263,8 @@ BSP_START_TEXT_SECTION void 
arm_gic_irq_initialize_secondary_cpu(void)

    dist->icdigr[0] = 0x;
  #endif
-  /* Initialize Peripheral Private Interrupts (PPIs) */
-  for (id = 0; id < 32; ++id) {
+  /* Initialize priority of SGIs and PPIs */
+  for (id = 0; id <= ARM_GIC_IRQ_PPI_LAST; ++id) {
  gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
    }
@@ -300,6 +356,10 @@ rtems_status_code bsp_interrupt_set_affinity(
    volatile gic_dist *dist = ARM_GIC_DIST;
    uint8_t targets = (uint8_t) _Processor_mask_To_uint32_t(affinity, 0);
+  if ( vector <= ARM_GIC_IRQ_PPI_LAST ) {
+    return RTEMS_UNSATISFIED;
+  }
+
    gic_id_set_targets(dist, vector,