[PATCH rtems-lwip 4/5] lwip.py: Add STM32 lwIP port to build

[Duc Doan]

---
 lwip.py | 20 +++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/lwip.py b/lwip.py
index 84eef2c..d806b64 100644
--- a/lwip.py
+++ b/lwip.py
@@ -92,6 +92,17 @@ common_source_files = [
 'rtemslwip/bsd_compat/rtems-kernel-program.c'
 ]
 
+stm32f4_drv_incl = [
+'rtemslwip/stm32f4',
+'stm32',
+'stm32/driver'
+]
+
+stm32f4_drv_src = [
+'stm32',
+'stm32/driver'
+]
+
 
 def build(bld):
 source_files = []
@@ -150,13 +161,20 @@ def build(bld):
 driver_source.extend(walk_sources('rtemslwip/zynqmp_hardware'))
 driver_source.extend(xilinx_aarch64_driver_source)
 drv_incl.extend(xilinx_aarch64_drv_incl)
+
+# These files will only compile for STM32F4 BSPs
+if bld.env.RTEMS_ARCH_BSP.startswith('arm-rtems6-stm32f4'):
+driver_source.extend(walk_sources('rtemslwip/stm32f4'))
+drv_incl.extend(stm32f4_drv_incl)
+for s in stm32f4_drv_src:
+driver_source.extend(walk_sources(s))
 
 lwip_obj_incl = []
 lwip_obj_incl.extend(drv_incl)
 lwip_obj_incl.extend(bsd_compat_incl)
 lwip_obj_incl.extend(common_includes)
 
-bld(features='c',
+bld(features ='c',
 target='lwip_obj',
 cflags='-g -Wall -O0',
 includes=' '.join(lwip_obj_incl),
-- 
2.37.2

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[PATCH rtems-lwip 1/5] Add STM32 Ethernet source

[Duc Doan]

This patch adds ST's Ethernet and lwIP port and DP83848 driver. The
files are generated using STM32CubeIDE with STM32F4 Cube FW v1.27.1,
under no RTOS mode.
---
 stm32/driver/dp83848.c | 664 +
 stm32/driver/dp83848.h | 436 
 stm32/ethernetif.c | 737 +
 stm32/ethernetif.h |  45 +++
 stm32/lwip.c   | 260 +++
 stm32/lwip.h   |  76 +
 6 files changed, 2218 insertions(+)
 create mode 100644 stm32/driver/dp83848.c
 create mode 100644 stm32/driver/dp83848.h
 create mode 100644 stm32/ethernetif.c
 create mode 100644 stm32/ethernetif.h
 create mode 100644 stm32/lwip.c
 create mode 100644 stm32/lwip.h

diff --git a/stm32/driver/dp83848.c b/stm32/driver/dp83848.c
new file mode 100644
index 000..2c5d59b
--- /dev/null
+++ b/stm32/driver/dp83848.c
@@ -0,0 +1,664 @@
+/**
+  
**
+  * @filedp83848.c
+  * @author  MCD Application Team
+  * @brief   This file provides a set of functions needed to manage the DP83848
+  *  PHY devices.
+  
**
+  * @attention
+  *
+  *  Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *opensource.org/licenses/BSD-3-Clause
+  *
+  
**
+  */
+
+/* Includes 
--*/
+#include "dp83848.h"
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup Component
+  * @{
+  */
+
+/** @defgroup DP83848 DP83848
+  * @{
+  */
+
+/* Private typedef 
---*/
+/* Private define 
*/
+/** @defgroup DP83848_Private_Defines DP83848 Private Defines
+  * @{
+  */
+#define DP83848_SW_RESET_TO((uint32_t)500U)
+#define DP83848_INIT_TO((uint32_t)2000U)
+#define DP83848_MAX_DEV_ADDR   ((uint32_t)31U)
+/**
+  * @}
+  */
+
+/* Private macro 
-*/
+/* Private variables 
-*/
+/* Private function prototypes 
---*/
+/* Private functions 
-*/
+/** @defgroup DP83848_Private_Functions DP83848 Private Functions
+  * @{
+  */
+
+/**
+  * @brief  Register IO functions to component object
+  * @param  pObj: device object  of DP83848_Object_t.
+  * @param  ioctx: holds device IO functions.
+  * @retval DP83848_STATUS_OK  if OK
+  * DP83848_STATUS_ERROR if missing mandatory function
+  */
+int32_t  DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
+{
+  if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
+  {
+return DP83848_STATUS_ERROR;
+  }
+
+  pObj->IO.Init = ioctx->Init;
+  pObj->IO.DeInit = ioctx->DeInit;
+  pObj->IO.ReadReg = ioctx->ReadReg;
+  pObj->IO.WriteReg = ioctx->WriteReg;
+  pObj->IO.GetTick = ioctx->GetTick;
+
+  return DP83848_STATUS_OK;
+}
+
+/**
+  * @brief  Initialize the DP83848 and configure the needed hardware resources
+  * @param  pObj: device object DP83848_Object_t.
+  * @retval DP83848_STATUS_OK  if OK
+  * DP83848_STATUS_ADDRESS_ERROR if cannot find device address
+  * DP83848_STATUS_READ_ERROR if connot read register
+  * DP83848_STATUS_WRITE_ERROR if connot write to register
+  * DP83848_STATUS_RESET_TIMEOUT if cannot perform a software reset
+  */
+ int32_t DP83848_Init(dp83848_Object_t *pObj)
+ {
+   uint32_t tickstart = 0, regvalue = 0, addr = 0;
+   int32_t status = DP83848_STATUS_OK;
+
+   if(pObj->Is_Initialized == 0)
+   {
+ if(pObj->IO.Init != 0)
+ {
+   /* GPIO and Clocks initialization */
+   pObj->IO.Init();
+ }
+
+ /* for later check */
+ pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
+
+ /* Get the device address from special mode register */
+ for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
+ {
+   if(pObj->IO.ReadReg(addr, DP83848_SMR, ) < 0)
+   {
+ status = DP83848_STATUS_READ_ERROR;
+ /* Can't read from this device address
+continue with next address */
+ continue;
+   }
+
+   if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
+   {
+ pObj->DevAddr = addr;
+ status = DP83848_STATUS_OK;
+ break;
+   }
+ }
+
+ if(pObj->DevAddr > DP83848_MAX_DEV_ADDR)
+ {
+   status = DP83848_STATUS_ADDRESS_ERROR;
+ }
+
+ /* if device address is matched */
+ 

[PATCH rtems-lwip 3/5] RTEMS port of lwIP for STM32 and STM32F4 BSP

[Duc Doan]

---
 rtemslwip/stm32f4/lwipopts.h |  24 ++-
 rtemslwip/stm32f4/netstart.c |  29 +++-
 rtemslwip/stm32f4/stm32f4_lwip.c |  14 ++
 rtemslwip/stm32f4/stm32f4_lwip.h |   9 +
 stm32/ethernetif.c   | 288 +--
 stm32/ethernetif.h   |  14 +-
 stm32/lwip.c | 103 +++
 stm32/lwip.h |   2 +
 8 files changed, 374 insertions(+), 109 deletions(-)
 create mode 100644 rtemslwip/stm32f4/stm32f4_lwip.c
 create mode 100644 rtemslwip/stm32f4/stm32f4_lwip.h

diff --git a/rtemslwip/stm32f4/lwipopts.h b/rtemslwip/stm32f4/lwipopts.h
index 49a19e4..41cc68f 100644
--- a/rtemslwip/stm32f4/lwipopts.h
+++ b/rtemslwip/stm32f4/lwipopts.h
@@ -28,7 +28,7 @@
 
 /* Within 'USER CODE' section, code will be kept by default at each generation 
*/
 /* USER CODE BEGIN 0 */
-
+#include 
 /* USER CODE END 0 */
 
 #ifdef __cplusplus
@@ -38,7 +38,7 @@
 /* STM32CubeMX Specific Parameters (not defined in opt.h) 
-*/
 /* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
 /*- WITH_RTOS disabled (Since FREERTOS is not set) -*/
-#define WITH_RTOS 0
+#define WITH_RTOS 1
 /*- CHECKSUM_BY_HARDWARE disabled -*/
 #define CHECKSUM_BY_HARDWARE 0
 
/*-*/
@@ -50,11 +50,11 @@
 /*- Value in opt.h for NO_SYS: 0 -*/
 #define NO_SYS 0
 /*- Value in opt.h for SYS_LIGHTWEIGHT_PROT: 1 -*/
-#define SYS_LIGHTWEIGHT_PROT 0
+#define SYS_LIGHTWEIGHT_PROT 1
 /*- Value in opt.h for MEM_ALIGNMENT: 1 -*/
 #define MEM_ALIGNMENT 4
 /*- Default Value for H7 devices: 0x30044000 -*/
-#define LWIP_RAM_HEAP_POINTER 0x20017f58
+//#define LWIP_RAM_HEAP_POINTER 0x20017f58
 /*- Value supported for H7 devices: 1 -*/
 #define LWIP_SUPPORT_CUSTOM_PBUF 1
 /*- Value in opt.h for LWIP_ETHERNET: LWIP_ARP || PPPOE_SUPPORT -*/
@@ -70,13 +70,13 @@
 /*- Value in opt.h for TCP_WND_UPDATE_THRESHOLD: LWIP_MIN(TCP_WND/4, 
TCP_MSS*4) -*/
 #define TCP_WND_UPDATE_THRESHOLD 536
 /*- Value in opt.h for LWIP_NETIF_LINK_CALLBACK: 0 -*/
-#define LWIP_NETIF_LINK_CALLBACK 1
+//#define LWIP_NETIF_LINK_CALLBACK 0
 /*- Value in opt.h for LWIP_NETCONN: 1 -*/
 #define LWIP_NETCONN 1
 /*- Value in opt.h for LWIP_SOCKET: 1 -*/
 #define LWIP_SOCKET 1
 /*- Value in opt.h for RECV_BUFSIZE_DEFAULT: INT_MAX -*/
-#define RECV_BUFSIZE_DEFAULT 20
+//#define RECV_BUFSIZE_DEFAULT 20
 /*- Value in opt.h for LWIP_STATS: 1 -*/
 #define LWIP_STATS 0
 /*- Value in opt.h for CHECKSUM_GEN_IP: 1 -*/
@@ -115,9 +115,19 @@
 #define LWIP_IPV6   1
 
 #define LWIP_TCPIP_CORE_LOCKING 1
+#define TCPIP_THREAD_STACKSIZE 1024
+#define TCPIP_THREAD_PRIO 24
+#define TCPIP_MBOX_SIZE 6
+#define SLIPIF_THREAD_STACKSIZE 1024
+#define SLIPIF_THREAD_PRIO 3
+#define DEFAULT_THREAD_STACKSIZE 1024
+#define DEFAULT_THREAD_PRIO 3
+#define DEFAULT_UDP_RECVMBOX_SIZE 6
+#define DEFAULT_TCP_RECVMBOX_SIZE 6
+#define DEFAULT_ACCEPTMBOX_SIZE 6
 
 #define LWIP_DHCP   1
-#define DHCP_DOES_ARP_CHECK 0
+#define DHCP_DOES_ARP_CHECK 1
 
 #define LWIP_DNS1
 
diff --git a/rtemslwip/stm32f4/netstart.c b/rtemslwip/stm32f4/netstart.c
index 88e846a..6ddcc81 100644
--- a/rtemslwip/stm32f4/netstart.c
+++ b/rtemslwip/stm32f4/netstart.c
@@ -26,7 +26,10 @@
 
 #include 
 #include 
-#include 
+#include "lwip.h"
+#include "lwip/init.h"
+#include "lwip/netif.h"
+#include "ethernetif.h"
 
 int start_networking(
   struct netif  *net_interface,
@@ -38,15 +41,35 @@ int start_networking(
 {
   tcpip_init( NULL, NULL );
   
-  netif_add(net_interface, ipaddr, netmask, gw, NULL, _init, 
_input);
+  set_mac_addr(mac_ethernet_address);
+
+  netif_add(
+net_interface, 
+>u_addr.ip4, 
+>u_addr.ip4, 
+>u_addr.ip4, 
+NULL, 
+ethernetif_init, 
+tcpip_input
+  );
   
   netif_set_default(net_interface);
   
   if (netif_is_link_up(net_interface)) {
 netif_set_up(net_interface);
+
+sys_thread_new(
+  "stm32f4_ethernet_link_thread",
+  ethernet_link_thread,
+  net_interface,
+  1024,
+  DEFAULT_THREAD_PRIO
+);
+
+return 0;
   } else {
 netif_set_down(net_interface);
   }
 
-  return 0;
+  return -1;
 }
diff --git a/rtemslwip/stm32f4/stm32f4_lwip.c b/rtemslwip/stm32f4/stm32f4_lwip.c
new file mode 100644
index 000..1f4f07e
--- /dev/null
+++ b/rtemslwip/stm32f4/stm32f4_lwip.c
@@ -0,0 +1,14 @@
+#include "stm32f4_lwip.h"
+
+extern ETH_HandleTypeDef heth;
+
+__attribute__((weak)) void Error_Handler(void) {
+__disable_irq();
+while (1)
+{
+}
+}
+
+void ETH_IRQHandler(void) {
+HAL_ETH_IRQHandler();
+}
diff --git a/rtemslwip/stm32f4/stm32f4_lwip.h b/rtemslwip/stm32f4/stm32f4_lwip.h
new file mode 100644
index 000..8a2b03a
--- /dev/null
+++ b/rtemslwip/stm32f4/stm32f4_lwip.h
@@ -0,0 

[PATCH rtems-lwip 0/5] lwIP port for STM32F4 BSP

[Duc Doan]

This patch set aims to port RTEMS lwIP for STM32F4 BSP. It also contains
generic drivers for STM32 chips in general. It is tested with a TCP echo
server application on STM32F407 Discovery Board.

Prerequisite: this patch set requires my STM32F4 patches to be applied 
because it uses STM32 HAL.

Duc Doan (5):
  Add STM32 Ethernet source
  rtemslwip: Add STM32F4 lwipopts.h and netstart.c
  RTEMS port of lwIP for STM32 and STM32F4 BSP
  lwip.py: Add STM32 lwIP port to build
  stm32: Convert to Unix line endings

 lwip.py  |  20 +-
 rtemslwip/stm32f4/lwipopts.h | 151 +
 rtemslwip/stm32f4/netstart.c |  75 +++
 rtemslwip/stm32f4/stm32f4_lwip.c |  14 +
 rtemslwip/stm32f4/stm32f4_lwip.h |   9 +
 stm32/driver/dp83848.c   | 664 +
 stm32/driver/dp83848.h   | 436 ++
 stm32/ethernetif.c   | 989 +++
 stm32/ethernetif.h   |  53 ++
 stm32/lwip.c | 207 +++
 stm32/lwip.h |  78 +++
 11 files changed, 2695 insertions(+), 1 deletion(-)
 create mode 100644 rtemslwip/stm32f4/lwipopts.h
 create mode 100644 rtemslwip/stm32f4/netstart.c
 create mode 100644 rtemslwip/stm32f4/stm32f4_lwip.c
 create mode 100644 rtemslwip/stm32f4/stm32f4_lwip.h
 create mode 100644 stm32/driver/dp83848.c
 create mode 100644 stm32/driver/dp83848.h
 create mode 100644 stm32/ethernetif.c
 create mode 100644 stm32/ethernetif.h
 create mode 100644 stm32/lwip.c
 create mode 100644 stm32/lwip.h

-- 
2.37.2

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[PATCH rtems-lwip 2/5] rtemslwip: Add STM32F4 lwipopts.h and netstart.c

[Duc Doan]

---
 rtemslwip/stm32f4/lwipopts.h | 141 +++
 rtemslwip/stm32f4/netstart.c |  52 +
 2 files changed, 193 insertions(+)
 create mode 100644 rtemslwip/stm32f4/lwipopts.h
 create mode 100644 rtemslwip/stm32f4/netstart.c

diff --git a/rtemslwip/stm32f4/lwipopts.h b/rtemslwip/stm32f4/lwipopts.h
new file mode 100644
index 000..49a19e4
--- /dev/null
+++ b/rtemslwip/stm32f4/lwipopts.h
@@ -0,0 +1,141 @@
+/* USER CODE BEGIN Header */
+/**
+  
**
+  * File Name  : Target/lwipopts.h
+  * Description: This file overrides LwIP stack default configuration
+  *  done in opt.h file.
+  
**
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  
**
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion 
--*/
+#ifndef __LWIPOPTS__H__
+#define __LWIPOPTS__H__
+
+/*-*/
+/* Current version of LwIP supported by CubeMx: 2.1.2 -*/
+/*-*/
+
+/* Within 'USER CODE' section, code will be kept by default at each generation 
*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* STM32CubeMX Specific Parameters (not defined in opt.h) 
-*/
+/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
+/*- WITH_RTOS disabled (Since FREERTOS is not set) -*/
+#define WITH_RTOS 0
+/*- CHECKSUM_BY_HARDWARE disabled -*/
+#define CHECKSUM_BY_HARDWARE 0
+/*-*/
+
+/* LwIP Stack Parameters (modified compared to initialization value in opt.h) 
-*/
+/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
+/*- Default value in ETH configuration GUI in CubeMx: 1524 -*/
+#define ETH_RX_BUFFER_SIZE 1536
+/*- Value in opt.h for NO_SYS: 0 -*/
+#define NO_SYS 0
+/*- Value in opt.h for SYS_LIGHTWEIGHT_PROT: 1 -*/
+#define SYS_LIGHTWEIGHT_PROT 0
+/*- Value in opt.h for MEM_ALIGNMENT: 1 -*/
+#define MEM_ALIGNMENT 4
+/*- Default Value for H7 devices: 0x30044000 -*/
+#define LWIP_RAM_HEAP_POINTER 0x20017f58
+/*- Value supported for H7 devices: 1 -*/
+#define LWIP_SUPPORT_CUSTOM_PBUF 1
+/*- Value in opt.h for LWIP_ETHERNET: LWIP_ARP || PPPOE_SUPPORT -*/
+#define LWIP_ETHERNET 1
+/*- Value in opt.h for LWIP_DNS_SECURE: (LWIP_DNS_SECURE_RAND_XID | 
LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING | LWIP_DNS_SECURE_RAND_SRC_PORT) -*/
+#define LWIP_DNS_SECURE 7
+/*- Value in opt.h for TCP_SND_QUEUELEN: (4*TCP_SND_BUF + (TCP_MSS - 
1))/TCP_MSS -*/
+#define TCP_SND_QUEUELEN 9
+/*- Value in opt.h for TCP_SNDLOWAT: LWIP_MIN(LWIP_MAX(((TCP_SND_BUF)/2), 
(2 * TCP_MSS) + 1), (TCP_SND_BUF) - 1) -*/
+#define TCP_SNDLOWAT 1071
+/*- Value in opt.h for TCP_SNDQUEUELOWAT: LWIP_MAX(TCP_SND_QUEUELEN)/2, 5) 
-*/
+#define TCP_SNDQUEUELOWAT 5
+/*- Value in opt.h for TCP_WND_UPDATE_THRESHOLD: LWIP_MIN(TCP_WND/4, 
TCP_MSS*4) -*/
+#define TCP_WND_UPDATE_THRESHOLD 536
+/*- Value in opt.h for LWIP_NETIF_LINK_CALLBACK: 0 -*/
+#define LWIP_NETIF_LINK_CALLBACK 1
+/*- Value in opt.h for LWIP_NETCONN: 1 -*/
+#define LWIP_NETCONN 1
+/*- Value in opt.h for LWIP_SOCKET: 1 -*/
+#define LWIP_SOCKET 1
+/*- Value in opt.h for RECV_BUFSIZE_DEFAULT: INT_MAX -*/
+#define RECV_BUFSIZE_DEFAULT 20
+/*- Value in opt.h for LWIP_STATS: 1 -*/
+#define LWIP_STATS 0
+/*- Value in opt.h for CHECKSUM_GEN_IP: 1 -*/
+#define CHECKSUM_GEN_IP 0
+/*- Value in opt.h for CHECKSUM_GEN_UDP: 1 -*/
+#define CHECKSUM_GEN_UDP 0
+/*- Value in opt.h for CHECKSUM_GEN_TCP: 1 -*/
+#define CHECKSUM_GEN_TCP 0
+/*- Value in opt.h for CHECKSUM_GEN_ICMP: 1 -*/
+#define CHECKSUM_GEN_ICMP 0
+/*- Value in opt.h for CHECKSUM_GEN_ICMP6: 1 -*/
+#define CHECKSUM_GEN_ICMP6 0
+/*- Value in opt.h for CHECKSUM_CHECK_IP: 1 -*/
+#define CHECKSUM_CHECK_IP 0
+/*- Value in opt.h for CHECKSUM_CHECK_UDP: 1 -*/
+#define CHECKSUM_CHECK_UDP 0
+/*- Value in opt.h for CHECKSUM_CHECK_TCP: 1 -*/
+#define CHECKSUM_CHECK_TCP 0
+/*- Value in opt.h for CHECKSUM_CHECK_ICMP: 1 -*/
+#define CHECKSUM_CHECK_ICMP 0
+/*- Value in opt.h for CHECKSUM_CHECK_ICMP6: 1 -*/
+#define CHECKSUM_CHECK_ICMP6 0
+/*- Default Value for ETHARP_DEBUG: LWIP_DBG_OFF 

RE: RPi 4B MMU seems to be enabled but throwing aarch64-default-exception error

[Alan Cudmore]

Hi Noor,Nice blog entry on the JTAG setup. I ordered the FT232H board like yours to see if I can get the same setup working. I have my Pi 4 running the bare metal OS examples, and I have built your branch, so I hope to start looking at the code.What needs to be in the MMU table? I see different entries in the Aarch64 BSPs. For example the Xilinx-versal BSP has entries for the GIC, peripherals, and memory. Can you cover RAM and I/O space on the Pi 4 with just one entry?Looking at the RT-Thread OS, they have the following Pi4/Aarch64 MMU table:https://github.com/RT-Thread/rt-thread/blob/master/bsp/raspberry-pi/raspi4-64/driver/board.c#L25 AlanFrom: Noor AmanSent: Friday, September 2, 2022 2:18 PMTo: Alan CudmoreCc: Hesham Moustafa; William Moore; rtems-de...@rtems.orgSubject: Re: RPi 4B MMU seems to be enabled but throwing aarch64-default-exception error Openocd connection is on my website. Here's the link to that. https://0xnoor.hashnode.dev/setup-openocd-with-jtag-uart-on-raspberry-pi-4-using-ft232h I pushed the code to my github repo. Be sure to checkout noor-dev branch. Here's the link for that. https://github.com/0xnoor/rtems And yes the code looks bad as of now, I'll do optimization and everything soon.  Thanks On Fri, 2 Sept 2022 at 23:31, Alan Cudmore  wrote:Hi Noor,Can you describe the setup you use for testing the BSP?I can set up my Pi 4 to try running your code as you update it. How do you setup the OCD connection? Thanks,Alan On Fri, Sep 2, 2022 at 11:48 AM Noor Aman  wrote:Hey all,Raspberry Pi 4B MMU seems to be enabled, as reported by openocd but gdb is showing to run in a loop from aarch64-defaulit-exception.S file starting from code line number 143 to 220. From what I can gather, it is being caused by the wrong MMU address. Here's a RAM and MMU allocation sizes and base   MEMORY {  RAM_MMU  : ORIGIN = 0x0, LENGTH = (0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES})  RAM      : ORIGIN = 0x8, LENGTH = 1024M  } Relevant Openocd info  bcm2711.cpu0 halted in AArch64 state due to debug-request, current mode: EL1Tcpsr: 0x23c4 pc: 0x8e208MMU: enabled, D-Cache: enabled, I-Cache: enabledInfo : New GDB Connection: 1, Target bcm2711.cpu0, state: halted Any ideas? Thanks,Noor 
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