[PATCH] build: Let the get-integer action return None

[Sebastian Huber]

If used with the format-and-define action, this will result in an
undefined define.
---
 wscript | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/wscript b/wscript
index c8481d4fde..595dc09efd 100755
--- a/wscript
+++ b/wscript
@@ -1011,6 +1011,8 @@ class OptionItem(Item):
 value = self.default_value(conf.env.ENABLE)
 if value is None:
 return value
+if not value:
+return None
 try:
 return eval(value)
 except Exception as e:
-- 
2.35.3

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Re: [PATCH v2 0/4] Add ZynqMP Cortex-R5 BSP

[Kinsey Moore]

Philip,
When you get a chance, could you verify that this refactoring meets your
expectations as far as functionality? I'm especially interested in whether
the timer interrupts behave as you expect them to on hardware. I don't mind
getting the Xilinx support code updates committed, but I'd like some
feedback on the BSP itself.

Kinsey

On Thu, Oct 12, 2023 at 12:02 PM Kinsey Moore 
wrote:

> Changes from v1 (originally submitted by Philip Kirkpatrick):
> Refactoring:
> * import Xilinx code before modification
> * better use the existing Xilinx support code
> Other:
> * An additional patch to add cache support (also from Philip) has been
>   integrated and refactored
>
> This has been tested on Xilinx's QEMU with Xilinx's device tree
> definitions using the following command line options to QEMU:
> -no-reboot -nographic -M arm-generic-fdt -serial null -serial mon:stdio \
> -device loader,file=,cpu-num=4 \
> -device loader,addr=0xff5e023c,data=0x80088fde,data-len=4 \
> -device loader,addr=0xff9a,data=0x8218,data-len=4 \
> -hw-dtb /LATEST/SINGLE_ARCH/board-zynqmp-zcu102.dtb \
> -m 4096 -display none
>
> hello.exe and ts-validation-cache.exe operated as expected. Ticker
> produced output, but the timing and content was incorrect on QEMU.
>
>
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[PATCH 2/2] bsps/xnandpsu: Always wrap page to device size

[Kinsey Moore]

The xnandpsu driver conditionally tries to wrap page index to NAND chip
size causing an off-by-one error where the first page of the second chip
is not wrapped correctly. This removes the conditional so that page
index is always wrapped.
---
 bsps/shared/dev/nand/xnandpsu.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/bsps/shared/dev/nand/xnandpsu.c b/bsps/shared/dev/nand/xnandpsu.c
index 5aeee90084..db4e625e5a 100644
--- a/bsps/shared/dev/nand/xnandpsu.c
+++ b/bsps/shared/dev/nand/xnandpsu.c
@@ -1482,7 +1482,11 @@ s32 XNandPsu_Write(XNandPsu *InstancePtr, u64 Offset, 
u64 Length, u8 *SrcBuf)
}
 
Target = (u32) (OffsetVar/InstancePtr->Geometry.TargetSize);
+#ifdef __rtems__
+   {
+#else
if (Page > InstancePtr->Geometry.NumTargetPages) {
+#endif
Page %= InstancePtr->Geometry.NumTargetPages;
}
 
@@ -1597,7 +1601,11 @@ s32 XNandPsu_Read(XNandPsu *InstancePtr, u64 Offset, u64 
Length, u8 *DestBuf)
}
 
Target = (u32) (OffsetVar/InstancePtr->Geometry.TargetSize);
+#ifdef __rtems__
+   {
+#else
if (Page > InstancePtr->Geometry.NumTargetPages) {
+#endif
Page %= InstancePtr->Geometry.NumTargetPages;
}
/* Check if partial read */
-- 
2.39.2

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[PATCH 1/2] bsps/xnandpsu: Avoid loop counter reset

[Kinsey Moore]

On configurations where multiple NAND chips are in use, the erasure
loop in XNandPsu_Erase() can reset the loop counter variable once it
gets to blocks in the second chip causing an infinite loop overwriting
parts of the first chip. This change ensures that the loop counter is
not accidentally reset.
---
 bsps/shared/dev/nand/xnandpsu.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/bsps/shared/dev/nand/xnandpsu.c b/bsps/shared/dev/nand/xnandpsu.c
index e140364ce8..5aeee90084 100644
--- a/bsps/shared/dev/nand/xnandpsu.c
+++ b/bsps/shared/dev/nand/xnandpsu.c
@@ -1714,13 +1714,21 @@ s32 XNandPsu_Erase(XNandPsu *InstancePtr, u64 Offset, 
u64 Length)
 
for (Block = StartBlock; Block < (StartBlock + NumBlocks); Block++) {
Target = Block/InstancePtr->Geometry.NumTargetBlocks;
+#ifdef __rtems__
+   u32 ModBlock = Block % InstancePtr->Geometry.NumTargetBlocks;
+#else
Block %= InstancePtr->Geometry.NumTargetBlocks;
+#endif
/* Don't erase bad block */
if (XNandPsu_IsBlockBad(InstancePtr, Block) ==
XST_SUCCESS)
continue;
/* Block Erase */
+#ifdef __rtems__
+   Status = XNandPsu_EraseBlock(InstancePtr, Target, ModBlock);
+#else
Status = XNandPsu_EraseBlock(InstancePtr, Target, Block);
+#endif
if (Status != XST_SUCCESS)
goto Out;
 
-- 
2.39.2

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Re: [PATCH] build: Let the get-integer action return None

[Chris Johns]

OK

Thanks
Chris

On 20/10/2023 10:16 pm, Sebastian Huber wrote:
> If used with the format-and-define action, this will result in an
> undefined define.
> ---
>  wscript | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/wscript b/wscript
> index c8481d4fde..595dc09efd 100755
> --- a/wscript
> +++ b/wscript
> @@ -1011,6 +1011,8 @@ class OptionItem(Item):
>  value = self.default_value(conf.env.ENABLE)
>  if value is None:
>  return value
> +if not value:
> +return None
>  try:
>  return eval(value)
>  except Exception as e:
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[PATCH] fixed warning related to spstdc17

[zack liang]

---
 cpukit/include/rtems/score/isrlock.h   | 1 +
 cpukit/include/rtems/score/scheduler.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/cpukit/include/rtems/score/isrlock.h 
b/cpukit/include/rtems/score/isrlock.h
index 7586624f9d..612f17a34d 100644
--- a/cpukit/include/rtems/score/isrlock.h
+++ b/cpukit/include/rtems/score/isrlock.h
@@ -70,6 +70,7 @@ extern "C" {
  * size of zero.  In C++ empty structures have a non-zero size.
  */
 typedef struct {
+void * dummy; 
 #if defined( RTEMS_SMP )
   SMP_lock_Control Lock;
 #endif
diff --git a/cpukit/include/rtems/score/scheduler.h 
b/cpukit/include/rtems/score/scheduler.h
index d0fe2a8626..fc6fde6252 100644
--- a/cpukit/include/rtems/score/scheduler.h
+++ b/cpukit/include/rtems/score/scheduler.h
@@ -316,6 +316,7 @@ typedef struct {
  * this structure at the begin of its context structure.
  */
 typedef struct Scheduler_Context {
+void * dummy;
 #if defined(RTEMS_SMP)
   /**
* @brief Lock to protect this scheduler instance.
-- 
2.42.0

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