Re: [PATCH v2] user: Add docu for use of Rust with RTEMS
On 16/3/2024 1:14 am, Frank Kühndel wrote: > Ping! > > The last discussion of this patch was > https://lists.rtems.org/pipermail/devel/2024-February/077289.html > > Does the fact that I recive no further comments to this patch mean it can be > pushed to the RTEMS User Manual as it is? Sorry Frank, I have been busy with other changes. It is on my list but I have will need to reread the thread when I have time. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: RTEMS 7 GDB Build Failure on FreeBSD 13
On 19/3/2024 1:27 am, Joel Sherrill wrote: > I am going through the logs on the test sweep VMs to see why some builds are > failing. This is due to gdb's requirement for GMP and MPFR. What's the > recommended way to address this? Load native packages? No, we need to add support to build them. We have to because other hosts like MacOS do not have a standard package system. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/5] bsps: Use bsps/aarch64/xilinx-zynqmp
Does this patch series build at the per commit level? Chris On 19/3/2024 3:30 am, Sebastian Huber wrote: > --- > spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml| 6 +- > spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml | 6 +- > spec/build/cpukit/optsmp.yml | 6 +- > 3 files changed, 3 insertions(+), 15 deletions(-) > > diff --git a/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml > b/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml > index 5338538de0..44d2671eb6 100644 > --- a/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml > +++ b/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml > @@ -15,11 +15,7 @@ default: >- aarch64/xilinx_versal_aiedge >- aarch64/xilinx_versal_qemu >- aarch64/xilinx_versal_vck190 > - - aarch64/xilinx_zynqmp_ilp32_qemu > - - aarch64/xilinx_zynqmp_ilp32_zu3eg > - - aarch64/xilinx_zynqmp_lp64_cfc400x > - - aarch64/xilinx_zynqmp_lp64_qemu > - - aarch64/xilinx_zynqmp_lp64_zu3eg > + - bsps/aarch64/xilinx-zynqmp >value: null > - enabled-by: true >value: 0x0002 > diff --git a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml > b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml > index fbc2dd9227..9b552c3f96 100644 > --- a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml > +++ b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml > @@ -15,11 +15,7 @@ default: >- aarch64/xilinx_versal_aiedge >- aarch64/xilinx_versal_qemu >- aarch64/xilinx_versal_vck190 > - - aarch64/xilinx_zynqmp_ilp32_qemu > - - aarch64/xilinx_zynqmp_ilp32_zu3eg > - - aarch64/xilinx_zynqmp_lp64_cfc400x > - - aarch64/xilinx_zynqmp_lp64_qemu > - - aarch64/xilinx_zynqmp_lp64_zu3eg > + - bsps/aarch64/xilinx-zynqmp >value: null > - enabled-by: true >value: 0x0001 > diff --git a/spec/build/cpukit/optsmp.yml b/spec/build/cpukit/optsmp.yml > index 45d41299da..f78558d6eb 100644 > --- a/spec/build/cpukit/optsmp.yml > +++ b/spec/build/cpukit/optsmp.yml > @@ -13,11 +13,6 @@ default: > description: | >Enable the Symmetric Multiprocessing (SMP) support > enabled-by: > -- aarch64/xilinx_zynqmp_ilp32_qemu > -- aarch64/xilinx_zynqmp_ilp32_zu3eg > -- aarch64/xilinx_zynqmp_lp64_cfc400x > -- aarch64/xilinx_zynqmp_lp64_qemu > -- aarch64/xilinx_zynqmp_lp64_zu3eg > - arm/altcycv_devkit > - arm/fvp_cortex_r52 > - arm/imx7 > @@ -33,6 +28,7 @@ enabled-by: > - arm/xilinx_zynq_picozed > - arm/xilinx_zynq_pynq > - arm/xilinx_zynq_microzed > +- bsps/aarch64/xilinx-zynqmp > - i386/pc386 > - i386/pc486 > - i386/pc586 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 3/5] xilinx-zynqmp-rpu: Remove URLs from copyrights
On 19/3/2024 3:30 am, Sebastian Huber wrote:
> ---
> spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml| 2 +-
> spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml | 2 +-
> spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml | 2 +-
> spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
> b/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
> index ba70c44d7d..06795eb416 100644
> --- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
> +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
> @@ -5,7 +5,7 @@ actions:
> - env-append: null
> build-type: option
> copyrights:
> -- Copyright (C) 2023 Reflex Aerospace GmbH (
> https://www.reflexaerospace.com/ )
> +- Copyright (C) 2023 Reflex Aerospace GmbH
Why this change?
Chris
> default:
> - enabled-by: true
>value:
> diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
> b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
> index d08f048060..3fa210d8e7 100644
> --- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
> +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
> @@ -4,7 +4,7 @@ bsp: xilinx_zynqmp_mercuryxu5_rpu
> build-type: bsp
> cflags: []
> copyrights:
> -- Copyright (C) 2023 Reflex Aerospace GmbH (
> https://www.reflexaerospace.com/ )
> +- Copyright (C) 2023 Reflex Aerospace GmbH
> cppflags: []
> enabled-by: true
> family: xilinx-zynqmp-rpu
> diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
> b/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
> index a3654f3f42..9c8a6d1cd6 100644
> --- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
> +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
> @@ -38,7 +38,7 @@ content: |
>_stack_end = bsp_section_stack_end;
>__undef_stack = bsp_section_stack_begin;
> copyrights:
> -- Copyright (C) 2023 Reflex Aerospace GmbH (
> https://www.reflexaerospace.com/ )
> +- Copyright (C) 2023 Reflex Aerospace GmbH
> enabled-by: true
> install-path: ${BSP_LIBDIR}
> links: []
> diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
> b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
> index 09a3965906..d684f5a06d 100644
> --- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
> +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
> @@ -4,7 +4,7 @@ actions:
> - define-condition: null
> build-type: option
> copyrights:
> -- Copyright (C) 2023 Reflex Aerospace GmbH (
> https://www.reflexaerospace.com/ )
> +- Copyright (C) 2023 Reflex Aerospace GmbH
> default:
> - enabled-by: true
>value: true
___
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Re: [PATCH] bsps: Add BSP_FLUSH_KERNEL_CHAR_OUTPUT option
On 19/3/2024 3:49 am, Sebastian Huber wrote:
> Make the kernel I/O output character device flushing configurable. The
> bsp_reset() function should reset the unit and do nothing else.
> ---
> bsps/aarch64/xilinx-zynqmp/console/console.c | 3 ++-
> bsps/aarch64/xilinx-zynqmp/include/bsp.h | 2 --
> .../console/console-config.c | 3 ++-
> bsps/arm/xilinx-zynqmp-rpu/include/bsp.h | 2 --
> bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c | 3 ---
> .../xilinx-zynqmp/console/console-config.c| 2 +-
> bsps/arm/xilinx-zynqmp/include/bsp.h | 2 --
> bsps/arm/xilinx-zynqmp/start/bspreset.c | 4 +---
> bsps/include/bsp/bootcard.h | 5 +
> bsps/shared/start/bspfatal-default.c | 4
> spec/build/bsps/bspopts.yml | 2 ++
> spec/build/bsps/optflushkerncharout.yml | 20 +++
> 12 files changed, 37 insertions(+), 15 deletions(-)
> create mode 100644 spec/build/bsps/optflushkerncharout.yml
>
> diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c
> b/bsps/aarch64/xilinx-zynqmp/console/console.c
> index 9ce0b1da63..d1b2850952 100644
> --- a/bsps/aarch64/xilinx-zynqmp/console/console.c
> +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
> @@ -41,6 +41,7 @@
> #include
>
> #include
> +#include
> #include
> #include
>
> @@ -234,7 +235,7 @@ rtems_status_code console_initialize(
>return RTEMS_SUCCESSFUL;
> }
>
> -void zynqmp_debug_console_flush(void)
> +void bsp_flush_kernel_char_output(void)
> {
>zynq_uart_reset_tx_flush(_uart_instances[BSP_CONSOLE_MINOR]);
> }
> diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> index 0ccca8b196..d36abde415 100644
> --- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> +++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
> @@ -86,8 +86,6 @@ BSP_START_TEXT_SECTION void
> zynqmp_setup_mmu_and_cache(void);
> */
> BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void );
>
> -void zynqmp_debug_console_flush(void);
> -
> uint32_t zynqmp_clock_i2c0(void);
>
> uint32_t zynqmp_clock_i2c1(void);
> diff --git a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
> b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
> index f52e008f2b..196b2dec58 100644
> --- a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
> +++ b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
> @@ -35,6 +35,7 @@
> #include
> #include
>
> +#include
> #include
> #include
>
> @@ -79,7 +80,7 @@ rtems_status_code console_initialize(
>return RTEMS_SUCCESSFUL;
> }
>
> -void zynqmp_debug_console_flush(void)
> +void bsp_flush_kernel_char_output(void)
> {
>zynq_uart_reset_tx_flush(_uart_instances[BSP_CONSOLE_MINOR]);
> }
> diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
> b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
> index e386bd4b26..060147967c 100644
> --- a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
> +++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
> @@ -83,8 +83,6 @@ extern "C" {
> */
> BSP_START_TEXT_SECTION void zynqmp_setup_mpu_and_cache(void);
>
> -void zynqmp_debug_console_flush(void);
> -
> #ifdef __cplusplus
> }
> #endif /* __cplusplus */
> diff --git a/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
> b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
> index eecb4da838..a894f55f6e 100644
> --- a/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
> +++ b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
> @@ -30,13 +30,10 @@
> * POSSIBILITY OF SUCH DAMAGE.
> */
>
> -#include
> #include
>
> void bsp_reset(void)
> {
> - zynqmp_debug_console_flush();
Why remove the call here?
> -
>while (true) {
> /* Wait */
>}
> diff --git a/bsps/arm/xilinx-zynqmp/console/console-config.c
> b/bsps/arm/xilinx-zynqmp/console/console-config.c
> index eadd7f11a2..360d193ba2 100644
> --- a/bsps/arm/xilinx-zynqmp/console/console-config.c
> +++ b/bsps/arm/xilinx-zynqmp/console/console-config.c
> @@ -81,7 +81,7 @@ rtems_status_code console_initialize(
>return RTEMS_SUCCESSFUL;
> }
>
> -void zynqmp_debug_console_flush(void)
> +void bsp_flush_kernel_char_output(void)
> {
>zynq_uart_reset_tx_flush(_uart_instances[BSP_CONSOLE_MINOR]);
> }
> diff --git a/bsps/arm/xilinx-zynqmp/include/bsp.h
> b/bsps/arm/xilinx-zynqmp/include/bsp.h
> index a08a5feee9..2785e4c2e0 100644
> --- a/bsps/arm/xilinx-zynqmp/include/bsp.h
> +++ b/bsps/arm/xilinx-zynqmp/include/bsp.h
> @@ -79,8 +79,6 @@ extern "C" {
> */
> BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void);
>
> -void zynqmp_debug_console_flush(void);
> -
> #ifdef __cplusplus
> }
> #endif /* __cplusplus */
> diff --git a/bsps/arm/xilinx-zynqmp/start/bspreset.c
> b/bsps/arm/xilinx-zynqmp/start/bspreset.c
> index b43b19b05f..ed2f4da83a 100644
> --- a/bsps/arm/xilinx-zynqmp/start/bspreset.c
> +++ b/bsps/arm/xilinx-zynqmp/start/bspreset.c
> @@ -30,12 +30,10 @@
> * POSSIBILITY OF SUCH DAMAGE.
> */
>
>
Re: [PATCH] improved error checking in ticks per timeslice
No. Just a lesson to remember -- Everyone along the path should have built rtems with all tests enabled. This is something that should never happen after the upcoming transition to GitLab. It definitely shows we need to build at least one BSP with tests enabled. On Mon, Mar 18, 2024, 7:45 PM zack leung wrote: > Do I need to do anything? > > > On Mon, 18 Mar 2024 at 16:38, Kinsey Moore > wrote: > >> Sorry, I didn't realize I had tests turned off in my local build when I >> checked this. The test is now gated behind NEEDS_CLOCK_DRIVER as well. >> >> Kinsey >> >> On Mon, Mar 18, 2024 at 4:15 AM Sebastian Huber < >> sebastian.hu...@embedded-brains.de> wrote: >> >>> This patch breaks the build: >>> >>> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >>> from >>> ../../../testsuites/rhealstone/rhdeadlockbrk/deadlockbrk.c:215: >>> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >>> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >>> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >>> zero" >>>|^ >>> >>> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >>> from >>> ../../../testsuites/rhealstone/rhmlatency/mlatency.c:158: >>> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >>> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >>> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >>> zero" >>>|^ >>> >>> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >>> from >>> ../../../testsuites/rhealstone/rhtaskswitch/taskswitch.c:122: >>> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >>> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >>> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >>> zero" >>>|^ >>> >>> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >>> from >>> ../../../testsuites/rhealstone/rhilatency/ilatency.c:29: >>> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >>> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >>> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >>> zero" >>>|^ >>> >>> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >>> from >>> ../../../testsuites/rhealstone/rhtaskpreempt/taskpreempt.c:120: >>> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >>> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >>> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >>> zero" >>>|^ >>> >>> -- >>> embedded brains GmbH & Co. KG >>> Herr Sebastian HUBER >>> Dornierstr. 4 >>> 82178 Puchheim >>> Germany >>> email: sebastian.hu...@embedded-brains.de >>> phone: +49-89-18 94 741 - 16 >>> fax: +49-89-18 94 741 - 08 >>> >>> Registergericht: Amtsgericht München >>> Registernummer: HRB 157899 >>> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler >>> Unsere Datenschutzerklärung finden Sie hier: >>> https://embedded-brains.de/datenschutzerklaerung/ >>> ___ >>> devel mailing list >>> devel@rtems.org >>> http://lists.rtems.org/mailman/listinfo/devel >> >> ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH] improved error checking in ticks per timeslice
Do I need to do anything? On Mon, 18 Mar 2024 at 16:38, Kinsey Moore wrote: > Sorry, I didn't realize I had tests turned off in my local build when I > checked this. The test is now gated behind NEEDS_CLOCK_DRIVER as well. > > Kinsey > > On Mon, Mar 18, 2024 at 4:15 AM Sebastian Huber < > sebastian.hu...@embedded-brains.de> wrote: > >> This patch breaks the build: >> >> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >> from >> ../../../testsuites/rhealstone/rhdeadlockbrk/deadlockbrk.c:215: >> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >> zero" >>|^ >> >> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >> from >> ../../../testsuites/rhealstone/rhmlatency/mlatency.c:158: >> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >> zero" >>|^ >> >> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >> from >> ../../../testsuites/rhealstone/rhtaskswitch/taskswitch.c:122: >> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >> zero" >>|^ >> >> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >> from >> ../../../testsuites/rhealstone/rhilatency/ilatency.c:29: >> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >> zero" >>|^ >> >> In file included from ../../../cpukit/include/rtems/confdefs.h:64, >> from >> ../../../testsuites/rhealstone/rhtaskpreempt/taskpreempt.c:120: >> ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error >> "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" >> 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than >> zero" >>|^ >> >> -- >> embedded brains GmbH & Co. KG >> Herr Sebastian HUBER >> Dornierstr. 4 >> 82178 Puchheim >> Germany >> email: sebastian.hu...@embedded-brains.de >> phone: +49-89-18 94 741 - 16 >> fax: +49-89-18 94 741 - 08 >> >> Registergericht: Amtsgericht München >> Registernummer: HRB 157899 >> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler >> Unsere Datenschutzerklärung finden Sie hier: >> https://embedded-brains.de/datenschutzerklaerung/ >> ___ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel > > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH] improved error checking in ticks per timeslice
Sorry, I didn't realize I had tests turned off in my local build when I checked this. The test is now gated behind NEEDS_CLOCK_DRIVER as well. Kinsey On Mon, Mar 18, 2024 at 4:15 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > This patch breaks the build: > > In file included from ../../../cpukit/include/rtems/confdefs.h:64, > from > ../../../testsuites/rhealstone/rhdeadlockbrk/deadlockbrk.c:215: > ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error > "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" > 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than > zero" >|^ > > In file included from ../../../cpukit/include/rtems/confdefs.h:64, > from > ../../../testsuites/rhealstone/rhmlatency/mlatency.c:158: > ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error > "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" > 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than > zero" >|^ > > In file included from ../../../cpukit/include/rtems/confdefs.h:64, > from > ../../../testsuites/rhealstone/rhtaskswitch/taskswitch.c:122: > ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error > "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" > 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than > zero" >|^ > > In file included from ../../../cpukit/include/rtems/confdefs.h:64, > from > ../../../testsuites/rhealstone/rhilatency/ilatency.c:29: > ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error > "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" > 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than > zero" >|^ > > In file included from ../../../cpukit/include/rtems/confdefs.h:64, > from > ../../../testsuites/rhealstone/rhtaskpreempt/taskpreempt.c:120: > ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error > "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" > 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than > zero" >|^ > > -- > embedded brains GmbH & Co. KG > Herr Sebastian HUBER > Dornierstr. 4 > 82178 Puchheim > Germany > email: sebastian.hu...@embedded-brains.de > phone: +49-89-18 94 741 - 16 > fax: +49-89-18 94 741 - 08 > > Registergericht: Amtsgericht München > Registernummer: HRB 157899 > Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler > Unsere Datenschutzerklärung finden Sie hier: > https://embedded-brains.de/datenschutzerklaerung/ > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: utf32 support
I think it would be wchar_t support in newlib. On Mon, Mar 18, 2024 at 11:56 AM Joel Sherrill wrote: > > What does support for UTF-32 entail? Do you have an idea what software > functions you are looking for? > > I see the International Components for Unicode (ICU) has a converter > (https://icu.unicode.org/download) which looks it might be part of a solution. > > Multibyte character methods defined by POSIX would be in newlib. > > I'm not well versed in this area so have questions but I think it basically > comes down to what software libraries an application needs and porting those > to RTEMS -- assuming the license is ok. > > --joel > > On Mon, Mar 18, 2024 at 12:15 PM John Howard wrote: >> >> I want to add utf32 support. >> >> Where do I start? >> >> — John >> ___ >> devel mailing list >> devel@rtems.org >> http://lists.rtems.org/mailman/listinfo/devel > > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: utf32 support
What does support for UTF-32 entail? Do you have an idea what software functions you are looking for? I see the International Components for Unicode (ICU) has a converter ( https://icu.unicode.org/download) which looks it might be part of a solution. Multibyte character methods defined by POSIX would be in newlib. I'm not well versed in this area so have questions but I think it basically comes down to what software libraries an application needs and porting those to RTEMS -- assuming the license is ok. --joel On Mon, Mar 18, 2024 at 12:15 PM John Howard wrote: > I want to add utf32 support. > > Where do I start? > > — John > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
utf32 support
I want to add utf32 support. Where do I start? — John ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] bsps: Add BSP_FLUSH_KERNEL_CHAR_OUTPUT option
Make the kernel I/O output character device flushing configurable. The
bsp_reset() function should reset the unit and do nothing else.
---
bsps/aarch64/xilinx-zynqmp/console/console.c | 3 ++-
bsps/aarch64/xilinx-zynqmp/include/bsp.h | 2 --
.../console/console-config.c | 3 ++-
bsps/arm/xilinx-zynqmp-rpu/include/bsp.h | 2 --
bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c | 3 ---
.../xilinx-zynqmp/console/console-config.c| 2 +-
bsps/arm/xilinx-zynqmp/include/bsp.h | 2 --
bsps/arm/xilinx-zynqmp/start/bspreset.c | 4 +---
bsps/include/bsp/bootcard.h | 5 +
bsps/shared/start/bspfatal-default.c | 4
spec/build/bsps/bspopts.yml | 2 ++
spec/build/bsps/optflushkerncharout.yml | 20 +++
12 files changed, 37 insertions(+), 15 deletions(-)
create mode 100644 spec/build/bsps/optflushkerncharout.yml
diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c
b/bsps/aarch64/xilinx-zynqmp/console/console.c
index 9ce0b1da63..d1b2850952 100644
--- a/bsps/aarch64/xilinx-zynqmp/console/console.c
+++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
@@ -41,6 +41,7 @@
#include
#include
+#include
#include
#include
@@ -234,7 +235,7 @@ rtems_status_code console_initialize(
return RTEMS_SUCCESSFUL;
}
-void zynqmp_debug_console_flush(void)
+void bsp_flush_kernel_char_output(void)
{
zynq_uart_reset_tx_flush(_uart_instances[BSP_CONSOLE_MINOR]);
}
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h
b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
index 0ccca8b196..d36abde415 100644
--- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h
+++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h
@@ -86,8 +86,6 @@ BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void);
*/
BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void );
-void zynqmp_debug_console_flush(void);
-
uint32_t zynqmp_clock_i2c0(void);
uint32_t zynqmp_clock_i2c1(void);
diff --git a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
index f52e008f2b..196b2dec58 100644
--- a/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
+++ b/bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
@@ -35,6 +35,7 @@
#include
#include
+#include
#include
#include
@@ -79,7 +80,7 @@ rtems_status_code console_initialize(
return RTEMS_SUCCESSFUL;
}
-void zynqmp_debug_console_flush(void)
+void bsp_flush_kernel_char_output(void)
{
zynq_uart_reset_tx_flush(_uart_instances[BSP_CONSOLE_MINOR]);
}
diff --git a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
index e386bd4b26..060147967c 100644
--- a/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
+++ b/bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
@@ -83,8 +83,6 @@ extern "C" {
*/
BSP_START_TEXT_SECTION void zynqmp_setup_mpu_and_cache(void);
-void zynqmp_debug_console_flush(void);
-
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
index eecb4da838..a894f55f6e 100644
--- a/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
+++ b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
@@ -30,13 +30,10 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include
#include
void bsp_reset(void)
{
- zynqmp_debug_console_flush();
-
while (true) {
/* Wait */
}
diff --git a/bsps/arm/xilinx-zynqmp/console/console-config.c
b/bsps/arm/xilinx-zynqmp/console/console-config.c
index eadd7f11a2..360d193ba2 100644
--- a/bsps/arm/xilinx-zynqmp/console/console-config.c
+++ b/bsps/arm/xilinx-zynqmp/console/console-config.c
@@ -81,7 +81,7 @@ rtems_status_code console_initialize(
return RTEMS_SUCCESSFUL;
}
-void zynqmp_debug_console_flush(void)
+void bsp_flush_kernel_char_output(void)
{
zynq_uart_reset_tx_flush(_uart_instances[BSP_CONSOLE_MINOR]);
}
diff --git a/bsps/arm/xilinx-zynqmp/include/bsp.h
b/bsps/arm/xilinx-zynqmp/include/bsp.h
index a08a5feee9..2785e4c2e0 100644
--- a/bsps/arm/xilinx-zynqmp/include/bsp.h
+++ b/bsps/arm/xilinx-zynqmp/include/bsp.h
@@ -79,8 +79,6 @@ extern "C" {
*/
BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void);
-void zynqmp_debug_console_flush(void);
-
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/arm/xilinx-zynqmp/start/bspreset.c
b/bsps/arm/xilinx-zynqmp/start/bspreset.c
index b43b19b05f..ed2f4da83a 100644
--- a/bsps/arm/xilinx-zynqmp/start/bspreset.c
+++ b/bsps/arm/xilinx-zynqmp/start/bspreset.c
@@ -30,12 +30,10 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include
+#include
void bsp_reset(void)
{
- zynqmp_debug_console_flush();
-
while (true) {
/* Wait */
}
diff --git a/bsps/include/bsp/bootcard.h b/bsps/include/bsp/bootcard.h
index 5f339d65f8..dfdc3ae7e0 100644
--- a/bsps/include/bsp/bootcard.h
+++ b/bsps/include/bsp/bootcard.h
@@ -94,6 +94,11 @@ struct Per_CPU_Control;
*/
void
[PATCH] arm: Move _CPU_ISR_install_vector()
The use of this function is optional. Newer BSPs do not use it.
---
.../score/cpu/arm/armv4-isr-install-vector.c | 75 +++
cpukit/score/cpu/arm/cpu.c| 28 +--
spec/build/cpukit/cpuarm.yml | 1 +
3 files changed, 77 insertions(+), 27 deletions(-)
create mode 100644 cpukit/score/cpu/arm/armv4-isr-install-vector.c
diff --git a/cpukit/score/cpu/arm/armv4-isr-install-vector.c
b/cpukit/score/cpu/arm/armv4-isr-install-vector.c
new file mode 100644
index 00..739b02f8bf
--- /dev/null
+++ b/cpukit/score/cpu/arm/armv4-isr-install-vector.c
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUARM
+ *
+ * @brief This source file contains the ARM-specific _CPU_ISR_install_vector().
+ */
+
+/*
+ * COPYRIGHT (c) 2000 Canon Research Centre France SA.
+ * Emmanuel Raguet, mailto:rag...@crf.canon.fr
+ *
+ * Copyright (c) 2002 Advent Networks, Inc
+ * Jay Monkman
+ *
+ * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include
+
+#ifdef ARM_MULTILIB_ARCH_V4
+
+void _CPU_ISR_install_vector(
+ uint32_t vector,
+ CPU_ISR_handler new_handler,
+ CPU_ISR_handler *old_handler
+)
+{
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Warray-bounds"
+ /* Redirection table starts at the end of the vector table */
+ CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
+
+ CPU_ISR_handler current_handler = table [vector];
+
+ /* The current handler is now the old one */
+ if (old_handler != NULL) {
+*old_handler = current_handler;
+ }
+
+ /* Write only if necessary to avoid writes to a maybe read-only memory */
+ if (current_handler != new_handler) {
+table [vector] = new_handler;
+ }
+#pragma GCC diagnostic pop
+}
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c
index 65f1ad2014..c27f4de9f9 100644
--- a/cpukit/score/cpu/arm/cpu.c
+++ b/cpukit/score/cpu/arm/cpu.c
@@ -8,8 +8,7 @@
* @brief This source file contains static assertions to ensure the consistency
* of interfaces used in C and assembler and it contains the ARM-specific
* implementation of _CPU_Initialize(), _CPU_ISR_Get_level(),
- * _CPU_ISR_Set_level(), _CPU_ISR_install_vector(),
- * _CPU_Context_Initialize(), and _CPU_Fatal_halt().
+ * _CPU_ISR_Set_level(), _CPU_Context_Initialize(), and _CPU_Fatal_halt().
*/
/*
@@ -160,31 +159,6 @@ uint32_t _CPU_ISR_Get_level( void )
return ( level & ARM_PSR_I ) != 0;
}
-void _CPU_ISR_install_vector(
- uint32_t vector,
- CPU_ISR_handler new_handler,
- CPU_ISR_handler *old_handler
-)
-{
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Warray-bounds"
- /* Redirection table starts at the end of the vector table */
- CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
-
- CPU_ISR_handler current_handler = table [vector];
-
- /* The current handler is now the old one */
- if (old_handler != NULL) {
-*old_handler = current_handler;
- }
-
- /* Write only if necessary to avoid writes to a maybe read-only memory */
- if (current_handler != new_handler) {
-table [vector] = new_handler;
- }
-#pragma GCC diagnostic pop
-}
-
void _CPU_Initialize( void )
{
/* Do nothing */
diff --git a/spec/build/cpukit/cpuarm.yml b/spec/build/cpukit/cpuarm.yml
index 5b140e46bb..88f84fd361 100644
--- a/spec/build/cpukit/cpuarm.yml
+++ b/spec/build/cpukit/cpuarm.yml
@@ -41,6 +41,7 @@ source:
- cpukit/score/cpu/arm/arm_exc_interrupt.S
-
[PATCH 4/5] bsps: Add xilinx_zynq_rpu BSP variant
Add a BSP variant without a board-specific name.
---
.../arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml | 87 +--
.../bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml | 17
spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml | 69 +++
spec/build/bsps/arm/xilinx-zynqmp-rpu/obj.yml | 42 +
4 files changed, 132 insertions(+), 83 deletions(-)
create mode 100644 spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml
create mode 100644 spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml
create mode 100644 spec/build/bsps/arm/xilinx-zynqmp-rpu/obj.yml
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
index 3fa210d8e7..f6c228c79d 100644
--- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
+++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
@@ -8,89 +8,10 @@ copyrights:
cppflags: []
enabled-by: true
family: xilinx-zynqmp-rpu
-includes:
-- bsps/include/xil/
-- bsps/include/xil/${XIL_SUPPORT_PATH}/
-install:
-- destination: ${BSP_INCLUDEDIR}
- source:
- - bsps/arm/xilinx-zynqmp-rpu/include/bsp.h
-- destination: ${BSP_INCLUDEDIR}/bsp
- source:
- - bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h
-- destination: ${BSP_INCLUDEDIR}/peripheral_maps
- source:
- - bsps/include/peripheral_maps/xilinx_zynqmp.h
+includes: []
+install: []
links:
- role: build-dependency
- uid: ../grp
-- role: build-dependency
- uid: ../start
-- role: build-dependency
- uid: abi
-- role: build-dependency
- uid: optclkfastidle
-- role: build-dependency
- uid: optclkuart
-- role: build-dependency
- uid: optconirq
-- role: build-dependency
- uid: ../../optconminor
-- role: build-dependency
- uid: optint0len
-- role: build-dependency
- uid: optint0ori
-- role: build-dependency
- uid: optint1len
-- role: build-dependency
- uid: optint1ori
-- role: build-dependency
- uid: optramlen
-- role: build-dependency
- uid: optramori
-- role: build-dependency
- uid: optresetvec
-- role: build-dependency
- uid: optnocachelen
-- role: build-dependency
- uid: ../../obj
-- role: build-dependency
- uid: ../../objirq
-- role: build-dependency
- uid: ../../objdevserialzynq
-- role: build-dependency
- uid: ../../objdevspizynq
-- role: build-dependency
- uid: ../../objdevspixil
-- role: build-dependency
- uid: ../../objmem
-- role: build-dependency
- uid: ../../opto0
-- role: build-dependency
- uid: linkcmds
-- role: build-dependency
- uid: ../../bspopts
-- role: build-dependency
- uid: ../../objxilinxsupport
-source:
-- bsps/shared/cache/nocache.c
-- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
-- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
-- bsps/arm/shared/start/bsp-start-memcpy.S
-- bsps/arm/xilinx-zynqmp-rpu/console/console-config.c
-- bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
-- bsps/arm/xilinx-zynqmp-rpu/start/bspstart.c
-- bsps/arm/xilinx-zynqmp-rpu/start/bspstarthooks.c
-- bsps/arm/xilinx-zynqmp-rpu/start/bspstartmpu.c
-- bsps/shared/dev/clock/xil-ttc.c
-- bsps/shared/dev/btimer/btimer-cpucounter.c
-- bsps/shared/dev/getentropy/getentropy-cpucounter.c
-- bsps/shared/dev/irq/arm-gicv2.c
-- bsps/shared/dev/irq/arm-gicv2-zynqmp.c
-- bsps/shared/dev/serial/console-termios.c
-- bsps/shared/irq/irq-default-handler.c
-- bsps/shared/start/bspfatal-default.c
-- bsps/shared/start/gettargethash-default.c
-- bsps/shared/start/sbrk.c
-- bsps/shared/start/stackalloc.c
+ uid: grp
+source: []
type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml
b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml
new file mode 100644
index 00..d4073d8248
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: xilinx_zynqmp_rpu
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH
+cppflags: []
+enabled-by: true
+family: xilinx-zynqmp-rpu
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: grp
+source: []
+type: build
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml
b/spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml
new file mode 100644
index 00..b886948d47
--- /dev/null
+++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml
@@ -0,0 +1,69 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+cflags: []
+copyrights:
+- Copyright (C) 2023 Reflex Aerospace GmbH
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes:
+- bsps/include/xil
+- bsps/include/xil/${XIL_SUPPORT_PATH}
+install: []
+ldflags: []
+links:
+- role: build-dependency
+ uid: ../grp
+- role: build-dependency
+ uid: ../start
+- role: build-dependency
+ uid: abi
+- role: build-dependency
+ uid: optclkfastidle
+- role: build-dependency
+ uid: optclkuart
+- role: build-dependency
+ uid: optconirq
+- role: build-dependency
+ uid: ../../optconminor
+- role: build-dependency
+ uid: optint0len
+- role: build-dependency
+ uid: optint0ori
+- role:
[PATCH 1/5] bsps: Use bsps/aarch64/xilinx-zynqmp
--- spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml| 6 +- spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml | 6 +- spec/build/cpukit/optsmp.yml | 6 +- 3 files changed, 3 insertions(+), 15 deletions(-) diff --git a/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml b/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml index 5338538de0..44d2671eb6 100644 --- a/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml +++ b/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml @@ -15,11 +15,7 @@ default: - aarch64/xilinx_versal_aiedge - aarch64/xilinx_versal_qemu - aarch64/xilinx_versal_vck190 - - aarch64/xilinx_zynqmp_ilp32_qemu - - aarch64/xilinx_zynqmp_ilp32_zu3eg - - aarch64/xilinx_zynqmp_lp64_cfc400x - - aarch64/xilinx_zynqmp_lp64_qemu - - aarch64/xilinx_zynqmp_lp64_zu3eg + - bsps/aarch64/xilinx-zynqmp value: null - enabled-by: true value: 0x0002 diff --git a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml index fbc2dd9227..9b552c3f96 100644 --- a/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml +++ b/spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml @@ -15,11 +15,7 @@ default: - aarch64/xilinx_versal_aiedge - aarch64/xilinx_versal_qemu - aarch64/xilinx_versal_vck190 - - aarch64/xilinx_zynqmp_ilp32_qemu - - aarch64/xilinx_zynqmp_ilp32_zu3eg - - aarch64/xilinx_zynqmp_lp64_cfc400x - - aarch64/xilinx_zynqmp_lp64_qemu - - aarch64/xilinx_zynqmp_lp64_zu3eg + - bsps/aarch64/xilinx-zynqmp value: null - enabled-by: true value: 0x0001 diff --git a/spec/build/cpukit/optsmp.yml b/spec/build/cpukit/optsmp.yml index 45d41299da..f78558d6eb 100644 --- a/spec/build/cpukit/optsmp.yml +++ b/spec/build/cpukit/optsmp.yml @@ -13,11 +13,6 @@ default: description: | Enable the Symmetric Multiprocessing (SMP) support enabled-by: -- aarch64/xilinx_zynqmp_ilp32_qemu -- aarch64/xilinx_zynqmp_ilp32_zu3eg -- aarch64/xilinx_zynqmp_lp64_cfc400x -- aarch64/xilinx_zynqmp_lp64_qemu -- aarch64/xilinx_zynqmp_lp64_zu3eg - arm/altcycv_devkit - arm/fvp_cortex_r52 - arm/imx7 @@ -33,6 +28,7 @@ enabled-by: - arm/xilinx_zynq_picozed - arm/xilinx_zynq_pynq - arm/xilinx_zynq_microzed +- bsps/aarch64/xilinx-zynqmp - i386/pc386 - i386/pc486 - i386/pc586 -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 3/5] xilinx-zynqmp-rpu: Remove URLs from copyrights
---
spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml| 2 +-
spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml | 2 +-
spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml | 2 +-
spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
b/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
index ba70c44d7d..06795eb416 100644
--- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
+++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml
@@ -5,7 +5,7 @@ actions:
- env-append: null
build-type: option
copyrights:
-- Copyright (C) 2023 Reflex Aerospace GmbH ( https://www.reflexaerospace.com/ )
+- Copyright (C) 2023 Reflex Aerospace GmbH
default:
- enabled-by: true
value:
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
index d08f048060..3fa210d8e7 100644
--- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
+++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml
@@ -4,7 +4,7 @@ bsp: xilinx_zynqmp_mercuryxu5_rpu
build-type: bsp
cflags: []
copyrights:
-- Copyright (C) 2023 Reflex Aerospace GmbH ( https://www.reflexaerospace.com/ )
+- Copyright (C) 2023 Reflex Aerospace GmbH
cppflags: []
enabled-by: true
family: xilinx-zynqmp-rpu
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
b/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
index a3654f3f42..9c8a6d1cd6 100644
--- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
+++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml
@@ -38,7 +38,7 @@ content: |
_stack_end = bsp_section_stack_end;
__undef_stack = bsp_section_stack_begin;
copyrights:
-- Copyright (C) 2023 Reflex Aerospace GmbH ( https://www.reflexaerospace.com/ )
+- Copyright (C) 2023 Reflex Aerospace GmbH
enabled-by: true
install-path: ${BSP_LIBDIR}
links: []
diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
index 09a3965906..d684f5a06d 100644
--- a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
+++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml
@@ -4,7 +4,7 @@ actions:
- define-condition: null
build-type: option
copyrights:
-- Copyright (C) 2023 Reflex Aerospace GmbH ( https://www.reflexaerospace.com/ )
+- Copyright (C) 2023 Reflex Aerospace GmbH
default:
- enabled-by: true
value: true
--
2.35.3
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[PATCH 5/5] bsps: Add xilinx_zynqmp_lp64_a53 BSP variant
Add a BSP variant without a board-specific name. --- .../bsps/aarch64/xilinx-zynqmp/bspa53lp64.yml | 21 +++ .../bsps/aarch64/xilinx-zynqmp/optloadoff.yml | 1 + .../bsps/aarch64/xilinx-zynqmp/optramori.yml | 1 + spec/build/bsps/objxilinxsupportlp64.yml | 1 + spec/build/bsps/optxilsupportpath.yml | 1 + 5 files changed, 25 insertions(+) create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/bspa53lp64.yml diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/bspa53lp64.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/bspa53lp64.yml new file mode 100644 index 00..42316db4d3 --- /dev/null +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/bspa53lp64.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: aarch64 +bsp: xilinx_zynqmp_lp64_a53 +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2024 embedded brains GmbH +cppflags: [] +enabled-by: true +family: xilinx-zynqmp +includes: [] +install: [] +links: +- role: build-dependency + uid: grp +- role: build-dependency + uid: linkcmds_lp64 +- role: build-dependency + uid: objfdtzynqmp +source: [] +type: build diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml index 869181a95e..3a78b9af38 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml @@ -9,6 +9,7 @@ copyrights: - Copyright (C) 2020 On-Line Applications Research (OAR) default: - enabled-by: + - aarch64/xilinx_zynqmp_lp64_a53 - aarch64/xilinx_zynqmp_ilp32_zu3eg - aarch64/xilinx_zynqmp_lp64_cfc400x - aarch64/xilinx_zynqmp_lp64_zu3eg diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml index c4d33094fb..33f0946532 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml @@ -9,6 +9,7 @@ copyrights: - Copyright (C) 2020 On-Line Applications Research (OAR) default: - enabled-by: + - aarch64/xilinx_zynqmp_lp64_a53 - aarch64/xilinx_zynqmp_ilp32_zu3eg - aarch64/xilinx_zynqmp_lp64_cfc400x - aarch64/xilinx_zynqmp_lp64_zu3eg diff --git a/spec/build/bsps/objxilinxsupportlp64.yml b/spec/build/bsps/objxilinxsupportlp64.yml index 330ffc34fd..252851a5aa 100644 --- a/spec/build/bsps/objxilinxsupportlp64.yml +++ b/spec/build/bsps/objxilinxsupportlp64.yml @@ -7,6 +7,7 @@ cppflags: [] cxxflags: [] enabled-by: - bsps/aarch64/xilinx_versal +- aarch64/xilinx_zynqmp_lp64_a53 - aarch64/xilinx_zynqmp_lp64_cfc400x - aarch64/xilinx_zynqmp_lp64_qemu - aarch64/xilinx_zynqmp_lp64_zu3eg diff --git a/spec/build/bsps/optxilsupportpath.yml b/spec/build/bsps/optxilsupportpath.yml index 298f9d5286..a90e6d3418 100644 --- a/spec/build/bsps/optxilsupportpath.yml +++ b/spec/build/bsps/optxilsupportpath.yml @@ -20,6 +20,7 @@ default: - aarch64/xilinx_zynqmp_ilp32_zu3eg value: arm/ARMv8/32bit - enabled-by: + - aarch64/xilinx_zynqmp_lp64_a53 - aarch64/xilinx_zynqmp_lp64_cfc400x - aarch64/xilinx_zynqmp_lp64_qemu - aarch64/xilinx_zynqmp_lp64_zu3eg -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 2/5] bsps: Use bsps/arm/xilinx-zynqmp-rpu
---
spec/build/bsps/objxilinxsupportr5.yml | 3 +--
spec/build/bsps/optxilsupportpath.yml | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/spec/build/bsps/objxilinxsupportr5.yml
b/spec/build/bsps/objxilinxsupportr5.yml
index d800b83247..25221c5e0d 100644
--- a/spec/build/bsps/objxilinxsupportr5.yml
+++ b/spec/build/bsps/objxilinxsupportr5.yml
@@ -5,8 +5,7 @@ copyrights:
- Copyright (C) 2022 On-Line Applications Research (OAR)
cppflags: []
cxxflags: []
-enabled-by:
-- arm/xilinx_zynqmp_mercuryxu5_rpu
+enabled-by: bsps/arm/xilinx-zynqmp-rpu
includes: []
install:
- destination: ${BSP_INCLUDEDIR}
diff --git a/spec/build/bsps/optxilsupportpath.yml
b/spec/build/bsps/optxilsupportpath.yml
index 85bcc7e059..298f9d5286 100644
--- a/spec/build/bsps/optxilsupportpath.yml
+++ b/spec/build/bsps/optxilsupportpath.yml
@@ -7,7 +7,7 @@ copyrights:
- Copyright (C) 2022 On-Line Applications Research (OAR)
default:
- enabled-by:
- - arm/xilinx_zynqmp_mercuryxu5_rpu
+ - bsps/arm/xilinx-zynqmp-rpu
value: arm/cortexr5
- enabled-by: bsps/microblaze/microblaze_fpga
value: microblaze
--
2.35.3
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RTEMS 7 GDB Build Failure on FreeBSD 13
Hi I am going through the logs on the test sweep VMs to see why some builds are failing. This is due to gdb's requirement for GMP and MPFR. What's the recommended way to address this? Load native packages? checking for the correct version of gmp.h... yes checking for the correct version of mpfr.h... no configure: error: Building GDB requires GMP 4.2+, and MPFR 3.1.0+. Try the --with-gmp and/or --with-mpfr options to specify their locations. If you obtained GMP and/or MPFR from a vendor distribution package, make sure that you have installed both the libraries and the header files. They may be located in separate packages. shell cmd failed: /bin/sh -ex /usr/home/tester/rtems-cron-7/rtems-source-builde Thanks. --joel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH] improved error checking in ticks per timeslice
This patch breaks the build: In file included from ../../../cpukit/include/rtems/confdefs.h:64, from ../../../testsuites/rhealstone/rhdeadlockbrk/deadlockbrk.c:215: ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" |^ In file included from ../../../cpukit/include/rtems/confdefs.h:64, from ../../../testsuites/rhealstone/rhmlatency/mlatency.c:158: ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" |^ In file included from ../../../cpukit/include/rtems/confdefs.h:64, from ../../../testsuites/rhealstone/rhtaskswitch/taskswitch.c:122: ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" |^ In file included from ../../../cpukit/include/rtems/confdefs.h:64, from ../../../testsuites/rhealstone/rhilatency/ilatency.c:29: ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" |^ In file included from ../../../cpukit/include/rtems/confdefs.h:64, from ../../../testsuites/rhealstone/rhtaskpreempt/taskpreempt.c:120: ../../../cpukit/include/rtems/confdefs/clock.h:74:4: error: #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" 74 | #error "CONFIGURE_TICKS_PER_TIMESLICE shall be greater than zero" |^ -- embedded brains GmbH & Co. KG Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
