[PATCH] README for raspberry pi 4 AArch64 BSP

2023-04-09 Thread Mohd Noor Aman
The readme file includes all links and steps for setting up developping
environment for the raspberry pi 4. Added cheap JTAG adapters list which are
tried and tested. Links for references for raspberry pi 4 are also added.
---
 bsps/aarch64/raspberrypi/README | 86 +
 1 file changed, 86 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/README

diff --git a/bsps/aarch64/raspberrypi/README b/bsps/aarch64/raspberrypi/README
new file mode 100644
index 00..9c6465fd5e
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/README
@@ -0,0 +1,86 @@
+BSP for the Raspberry Pi aarch64 ArmV8 board
+
+It currently supports the following peripheral: 
+-- Console using the PL011 UART0 Raspberry Pi 4 has 6 UARTs, 5 PL011 based and 
1
+   miniuart based. Only PL011 UART0 is supported. No support for Mini-UART. The
+   console driver only works with polled mode right now.
+
+-- The clock driver uses the ARM Generic Timer.
+
+-- GIC-400 is compatible with gicv2 headers and is supported by bsp
+
+
+How to boot: Steps on how to boot RTEMS on raspberry pi 4B is given here.
+
+
https://docs.rtems.org/branches/master/user/bsps/bsps-aarch64.html#raspberry-pi-4b
+
+
+To do list: It would be nice to get support in the BSP for the following:
+-- SD card
+-- SPI
+-- I2C
+-- GPIO 
+-- Graphics console 
+-- Sound
+
+
+JTAG debugging: OpenOCD supports bcm2711 as a target. Many interfaces are
+supported to work with bcm2711. A few of them which I have tested personally
+are. 
+
+FT232H: Nice and cheap adapter which supports SPI, I2C JTAG using MPSSE engine.
+It can either be used as a UART-to-USB or JTAG adapter at a time.
+
+Esp-prog: its just a FT2232H breakout board which can connect using FT2232H
+derivatives cfg
+
+Raspberry Pi SBC: Yes, you can use a raspberry pi to debug another raspberry pi
+
+Raspberry Pi Pico: As of now, openocd support for Raspberry pi Pico is under
+review, in the meantime you can just build forked version of OpenOCD, and use
+pico-dirtyJTAG.uf2 for raspberry pi pico.
+https://sourceforge.net/u/phdussud/openocd
+https://github.com/phdussud/pico-dirtyJtag
+
+Some of the interfaces which I have not used personally but can most probably 
be
+used are:
+
+FT2XXXH series :  They are of same family as FT232H, just have different amount
+of MPSSE engine, Which determines how many many protocols can be ran
+simultaneously.
+
+BeagleBone Black: It can be used with OpenOCDs am335xgpio drivers to be used as
+JTAG/SWD programmer
+
+Almost every SBC with GPIO: It can be used by openOCD through libgpiod library
+
+
+Openocd compilation steps for Raspberry pi:
+
+git clone http://openocd.zylin.com/openocd
+cd openocd
+./bootstrap
+./configure --enable-sysfsgpio --enable-bcm2835gpio
+make -j$(nproc)
+
+
+Credits and links:
+
+  A bare metal example which includes examples for interrupts, SMP, bluetooth
+  https://github.com/isometimes/rpi4-osdev/
+
+  A Raspberry pi 4 port for RT-Thread which support Ethernet, mailbox and UARTs
+  https://github.com/RT-Thread/rt-thread/tree/master/bsp/raspberry-pi/raspi4-64
+
+  Vxworks is a Real-Time OS which has a public SDK for development,not open
+  source. The steps for booting Vxworks is given here.
+  
https://labs.windriver.com/downloads/wrsdk-vxworks7-docs/2203/README_raspberrypi4b.html
+
+  s-matyukevich has done a great job for baremetal examples for raspberry pi 
3B,
+  and rhythm16 port all that code for raspberry pi 4B. Worth checking out.
+  https://s-matyukevich.github.io/raspberry-pi-os/
+  https://github.com/rhythm16/rpi4-bare-metal/
+
+  There are also some examples from valvers about bare metal for raspberrypi
+  family
+  
https://www.valvers.com/open-software/raspberry-pi/bare-metal-programming-in-c-part-1/
\ No newline at end of file
-- 
2.40.0

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[PATCH rtems-docs] user/aarch64/raspberrypi4: Boot mechanism explained and updated config.txt

2022-10-08 Thread Mohd Noor Aman
---
 user/bsps/aarch64/raspberrypi4.rst | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/user/bsps/aarch64/raspberrypi4.rst 
b/user/bsps/aarch64/raspberrypi4.rst
index 729d71b..efb09b6 100644
--- a/user/bsps/aarch64/raspberrypi4.rst
+++ b/user/bsps/aarch64/raspberrypi4.rst
@@ -34,10 +34,14 @@ raspberrypi hardware. Mini-uart is not supported.
 Preparing to boot
 --
 
-Raspberry Pi uses a different mechanism to boot. First the GPU initializes,
-loads the bootloader and then looks for the kernel img. By default the arm64
-mode looks for the ``kernel8.img``. Any other kernel can be loaded by adding
-``kernel=`` to the ``config.txt`` file.
+Raspberry Pi uses a different mechanism to boot when compared with any ARM SoC.
+First the GPU initializes, loads the bootloader (Raspberry pi firmware) and 
then
+looks for the kernel img. This whole process is done by the GPU (VideoCore IV)
+till the kernel is loaded. More information can be found on the `Raspberry pi
+documentation page
+`_.
+By default the arm64 mode looks for the ``kernel8.img``. Any other kernel can 
be
+loaded by adding ``kernel=`` to the ``config.txt`` file.
 
 The Firmware files are required in order to boot RTEMS. The latest firmware can
 be downloaded from the `Raspberry Pi Firmware Repository
@@ -56,6 +60,9 @@ default Mini-uart.
 
 .. code-block:: none
 
+  # if user wants to enable GIC, uncomment the next line
+  # enable_gic=1
+  arm_64bit=1
   dtoverlay = disable-bt
   enable_uart=1
 
-- 
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[PATCH rtems-docs v4] raspberrypi4.rst: Documentation for the new AArch64 Raspberry pi 4B BSP

2022-10-06 Thread Mohd Noor Aman
This patch adds the relevant documentations required for booting the new BSP.
JTAG support is added for debugging. I have built the HTML docs and verified
them.
---
 user/bsps/aarch64/raspberrypi4.rst | 111 +
 user/bsps/bsps-aarch64.rst |   1 +
 2 files changed, 112 insertions(+)
 create mode 100644 user/bsps/aarch64/raspberrypi4.rst

diff --git a/user/bsps/aarch64/raspberrypi4.rst 
b/user/bsps/aarch64/raspberrypi4.rst
new file mode 100644
index 000..b36d47b
--- /dev/null
+++ b/user/bsps/aarch64/raspberrypi4.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: CC-BY-SA-4.0
+
+.. Copyright (C) 2022 Mohd Noor Aman
+
+.. _BSP_aarch64_Raspberrypi_4:
+
+Raspberry Pi 4B
+===
+
+The 'raspberrypi4b' BSP currently supports only the LP64 ABI. ILP32 is not
+supported. Raspberry pi 4B all variants and Raspberry Pi 400  are supported. 
The
+default bootloader which is used by the Raspbian OS or other OS can be used to
+boot RTEMS. SMP is currently not supported. 
+
+Raspberry Pi 4B has 2 types of interrupt controller, GIC-400 (GICv2) and ARM
+legacy generic controller. Both are supported. By default, raspberrypi 4B uses
+ARM legacy generic controller. Set ``enable_gic=1`` in the ``config.txt`` file
+to enable GIC.
+
+Clock Driver
+
+
+The clock driver uses the `ARM Generic Timer`. 
+
+Console Driver
+--
+
+Raspberry pi 4B has 2 types of UARTs, ARM PL011 and Mini-uart. The PL011 is a
+capable, broadly 16550-compatible UART, while the mini UART has a reduced
+feature set. The console driver supports the default Qemu emulated ARM PL011
+PrimeCell UART as well as the physical ARM PL011 PrimeCell UART in the
+raspberrypi hardware. Mini-uart is not supported.
+
+Preparing to boot
+--
+
+Raspberry Pi uses a different mechanism to boot when compared with any ARM SoC.
+First the GPU initializes, loads the bootloader (Raspberry pi firmware) and 
then
+looks for the kernel img. This whole process is done by the GPU (VideoCore IV)
+till the kernel is loaded. More information can be found on the `Raspberry pi
+documentation page
+<https://www.raspberrypi.com/documentation/computers/raspberry-pi.html#boot-sequence>`_.
+By default the arm64 mode looks for the ``kernel8.img``. Any other kernel can 
be
+loaded by adding ``kernel=`` to the ``config.txt`` file.
+
+The Firmware files are required in order to boot RTEMS. The latest firmware can
+be downloaded from the `Raspberry Pi Firmware Repository
+<https://github.com/raspberrypi/firmware/>`_. USB boot is supported. All the
+files (Firmwares and kernel) must be place in the FAT32 partition only. Add
+``arm_64bit=1`` in the ``config.txt`` file in order to boot the BSP in 64bit
+kernel mode. 
+
+
+UART Setup
+^^
+
+Connect your serial device to the GPIO15 and GPIO14. Add the following to the
+``config.txt`` file in order to use the PL011 UART0 and thus disabling the
+default Mini-uart.
+
+.. code-block:: none
+
+  # if user wants to enable GIC, uncomment the next line
+  # enable_gic=1
+  arm_64bit=1
+  dtoverlay = disable-bt
+  enable_uart=1
+
+.. note:: 
+  The Raspberry Pi 4B and 400 have an additional four PL011 UARTs. They are 
not 
+  supported.
+
+Generating kernel image 
+^^^
+
+The following steps show how to run ``hello.exe`` on the BSP. Other executables
+can be processed in a similar way.
+
+To create the kernel image:
+
+.. code-block:: shell
+
+  $ aarch64-rtems@rtems-ver-major@-objcopy -Obinary hello.exe kernel8.img
+
+Copy the kernel image to the SD card.
+
+JTAG Setup
+--
+
+The Raspberry Pi 4 doesn't have dedicated JTAG pins. Instead, you must 
configure
+the GPIO pins (GPIO22-GPIO27) to activate the JTAG functionality. The RPi 4
+documentation refers to this as Alt4 functions of those pins. Alt5 does exist
+too, which goes from GPIO4, 5, 6, 12 and 13. you can check this out from
+`pinout.xyz <https://pinout.xyz/pinout/jtag#>`_ or `eLinux
+<https://elinux.org/RPi_BCM2835_GPIOs>`_
+
+One more thing to note on JTAG with Raspberry pi 4B is that, by default, All 
the
+GPIO pins are pulled down, according to the `BCM2711 documentation
+<https://datasheets.raspberrypi.com/bcm2711/bcm2711-peripherals.pdf>`_. This
+wasn't the case in the earlier models. So in order to let the data flow freely,
+we will have to disable them.
+
+.. code-block:: none
+
+  # Disable pull downs
+  gpio=22-27=np
+
+  # Enable jtag pins (i.e. GPIO22-GPIO27)
+  enable_jtag_gpio=1
+
+
diff --git a/user/bsps/bsps-aarch64.rst b/user/bsps/bsps-aarch64.rst
index 933370f..f3aa15c 100644
--- a/user/bsps/bsps-aarch64.rst
+++ b/user/bsps/bsps-aarch64.rst
@@ -9,3 +9,4 @@ aarch64 (AArch64)
 .. include:: aarch64/a72.rst
 .. include:: aarch64/xilinx-versal.rst
 .. include:: aarch64/xilinx-zynqmp.rst
+.. include:: aarch64/raspberrypi4.rst
\ No newline at end of file
-- 
2.38.0

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[PATCH rtems-docs v3] raspberrypi4.rst: Documentation for the new AArch64 Raspberry pi 4B BSP

2022-10-06 Thread Mohd Noor Aman
This patch adds the relevant documentations required for booting the new BSP.
JTAG support is added for debugging. I have built the HTML docs and verified
them.
---
 user/bsps/aarch64/raspberrypi4.rst | 104 +
 user/bsps/bsps-aarch64.rst |   1 +
 2 files changed, 105 insertions(+)
 create mode 100644 user/bsps/aarch64/raspberrypi4.rst

diff --git a/user/bsps/aarch64/raspberrypi4.rst 
b/user/bsps/aarch64/raspberrypi4.rst
new file mode 100644
index 000..274ade9
--- /dev/null
+++ b/user/bsps/aarch64/raspberrypi4.rst
@@ -0,0 +1,104 @@
+.. SPDX-License-Identifier: CC-BY-SA-4.0
+
+.. Copyright (C) 2022 Mohd Noor Aman
+
+.. _BSP_aarch64_Raspberrypi_4:
+
+Raspberry Pi 4B
+===
+
+The 'raspberrypi4b' BSP currently supports only the LP64 ABI. ILP32 is not
+supported. Raspberry pi 4B all variants and Raspberry Pi 400  are supported. 
The
+default bootloader which is used by the Raspbian OS or other OS can be used to
+boot RTEMS. SMP is currently not supported. 
+
+Raspberry Pi 4B has 2 types of interrupt controller, GIC-400 (GICv2) and ARM
+legacy generic controller. Both are supported. By default, raspberrypi 4B uses
+ARM legacy generic controller. Set ``enable_gic=1`` in the ``config.txt`` file
+to enable GIC.
+
+Clock Driver
+
+
+The clock driver uses the `ARM Generic Timer`. 
+
+Console Driver
+--
+
+Raspberry pi 4B has 2 types of UARTs, ARM PL011 and Mini-uart. The PL011 is a
+capable, broadly 16550-compatible UART, while the mini UART has a reduced
+feature set. The console driver supports the default Qemu emulated ARM PL011
+PrimeCell UART as well as the physical ARM PL011 PrimeCell UART in the
+raspberrypi hardware. Mini-uart is not supported.
+
+Preparing to boot
+--
+
+Raspberry Pi uses a different mechanism to boot. First the GPU initializes,
+loads the bootloader and then looks for the kernel img. By default the arm64
+mode looks for the ``kernel8.img``. Any other kernel can be loaded by adding
+``kernel=`` to the ``config.txt`` file.
+
+The Firmware files are required in order to boot RTEMS. The latest firmware can
+be downloaded from the `Raspberry Pi Firmware Repository
+<https://github.com/raspberrypi/firmware/>`_. USB boot is supported. All the
+files (Firmwares and kernel) must be place in the FAT32 partition only. Add
+``arm_64bit=1`` in the ``config.txt`` file in order to boot the BSP in 64bit
+kernel mode. 
+
+
+UART Setup
+^^
+
+Connect your serial device to the GPIO15 and GPIO14. Add the following to the
+``config.txt`` file in order to use the PL011 UART0 and thus disabling the
+default Mini-uart.
+
+.. code-block:: none
+
+  dtoverlay = disable-bt
+  enable_uart=1
+
+.. note:: 
+  The Raspberry Pi 4B and 400 have an additional four PL011 UARTs. They are 
not 
+  supported.
+
+Generating kernel image 
+^^^
+
+The following steps show how to run ``hello.exe`` on the BSP. Other executables
+can be processed in a similar way.
+
+To create the kernel image:
+
+.. code-block:: shell
+
+  $ aarch64-rtems@rtems-ver-major@-objcopy -Obinary hello.exe kernel8.img
+
+Copy the kernel image to the SD card.
+
+JTAG Setup
+--
+
+The Raspberry Pi 4 doesn't have dedicated JTAG pins. Instead, you must 
configure
+the GPIO pins (GPIO22-GPIO27) to activate the JTAG functionality. The RPi 4
+documentation refers to this as Alt4 functions of those pins. Alt5 does exist
+too, which goes from GPIO4, 5, 6, 12 and 13. you can check this out from
+`pinout.xyz <https://pinout.xyz/pinout/jtag#>`_ or `eLinux
+<https://elinux.org/RPi_BCM2835_GPIOs>`_
+
+One more thing to note on JTAG with Raspberry pi 4B is that, by default, All 
the
+GPIO pins are pulled down, according to the `BCM2711 documentation
+<https://datasheets.raspberrypi.com/bcm2711/bcm2711-peripherals.pdf>`_. This
+wasn't the case in the earlier models. So in order to let the data flow freely,
+we will have to disable them.
+
+.. code-block:: none
+
+  # Disable pull downs
+  gpio=22-27=np
+
+  # Enable jtag pins (i.e. GPIO22-GPIO27)
+  enable_jtag_gpio=1
+
+
diff --git a/user/bsps/bsps-aarch64.rst b/user/bsps/bsps-aarch64.rst
index 933370f..f3aa15c 100644
--- a/user/bsps/bsps-aarch64.rst
+++ b/user/bsps/bsps-aarch64.rst
@@ -9,3 +9,4 @@ aarch64 (AArch64)
 .. include:: aarch64/a72.rst
 .. include:: aarch64/xilinx-versal.rst
 .. include:: aarch64/xilinx-zynqmp.rst
+.. include:: aarch64/raspberrypi4.rst
\ No newline at end of file
-- 
2.38.0

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[PATCH rtems-docs v2] raspberrypi4.rst: Added Documentation for the new AArch64 Raspberry pi 4B BSP

2022-10-04 Thread Mohd Noor Aman
This patch adds the relevant documentations required for booting the new BSP.
JTAG support is added for debugging. I have built the HTML docs and verified
them.
---
 user/bsps/aarch64/raspberrypi4.rst | 99 ++
 user/bsps/bsps-aarch64.rst |  1 +
 2 files changed, 100 insertions(+)
 create mode 100644 user/bsps/aarch64/raspberrypi4.rst

diff --git a/user/bsps/aarch64/raspberrypi4.rst 
b/user/bsps/aarch64/raspberrypi4.rst
new file mode 100644
index 000..5a45c65
--- /dev/null
+++ b/user/bsps/aarch64/raspberrypi4.rst
@@ -0,0 +1,99 @@
+.. SPDX-License-Identifier: CC-BY-SA-4.0
+
+.. Copyright (C) 2022 Mohd Noor Aman
+
+.. _BSP_aarch64_Raspberrypi_4:
+
+Raspberry Pi 4B
+===
+
+The 'raspberrypi4b' BSP currently supports only the LP64 ABI. ILP32 is not
+supported. Raspberry pi 4B all variants and Raspberry Pi 400  are supported. 
The
+default bootloader which is used by the Raspbian OS or other OS can be used to
+boot the RTEMS. Currently, QEMU emulation is not supported. 
+
+Clock Driver
+
+
+The clock driver uses the `ARM Generic Timer`.
+
+Console Driver
+--
+
+Raspberry pi 4B has 2 types of UARTs, ARM PL011 and Mini-uart. The PL011 is a
+capable, broadly 16550-compatible UART, while the mini UART has a reduced
+feature set. The console driver supports the default Qemu emulated ARM PL011
+PrimeCell UART as well as the physical ARM PL011 PrimeCell UART in the
+raspberrypi hardware. Mini-uart is not supported.
+
+Preparing to boot
+--
+
+Raspberry Pi uses a different mechanism to boot. First the GPU initializes,
+loads the bootloader and then looks for the kernel img. By default the arm64
+mode looks for the ``kernel8.img``. Any other kernel can be loaded by adding
+`kernel=` to the ``config.txt``.
+
+The Firmware files are required in order to boot RTEMS. The latest firmware can
+be downloaded from the `Raspberry Pi Firmware Repository
+<https://github.com/raspberrypi/firmware/>`_. USB boot is supported. All the
+files (Firmwares and kernel) must be place in the FAT32 partition only. Add
+``arm_64bit=1`` in the config.txt file in order to boot the BSP in 64bit kernel
+mode. 
+
+
+UART Setup
+^^
+
+Connect your serial device to the GPIO15 and GPIO14. Add the following to the
+config.txt file in order to use the PL011 UART0 and thus disabling the default
+Mini-uart.
+
+.. code-block:: none
+
+  dtoverlay = disable-bt
+  enable_uart=1
+
+.. note:: 
+  The Raspberry Pi 4B and 400 have an additional four PL011 UARTs. They are 
not 
+  supported.
+
+Generating kernel image 
+^^^
+
+The following steps show how to run ``hello.exe`` on the BSP. Other executables
+can be processed in a similar way.
+
+To create the kernel image:
+
+.. code-block:: shell
+
+  $ aarch64-rtems@rtems-ver-major@-objcopy -Obinary hello.exe kernel8.img
+
+Copy the kernel image to the SD card.
+
+JTAG Setup
+--
+
+The Raspberry Pi 4 doesn't have dedicated JTAG pins. Instead, you must 
configure
+the GPIO pins (GPIO22-GPIO27) to activate the JTAG functionality. The RPi 4
+documentation refers to this as Alt4 functions of those pins. Alt5 does exist
+too, which goes from GPIO4, 5, 6, 12 and 13. you can check this out from
+`pinout.xyz <https://pinout.xyz/pinout/jtag#>`_ or `eLinux
+<https://elinux.org/RPi_BCM2835_GPIOs>`_
+
+One more thing to note on JTAG with Raspberry pi 4B is that, by default, All 
the
+GPIO pins are pulled down, according to the `BCM2711 documentation
+<https://datasheets.raspberrypi.com/bcm2711/bcm2711-peripherals.pdf>`_. This
+wasn't the case in the earlier models. So in order to let the data flow freely,
+we will have to disable them.
+
+.. code-block:: none
+
+  # Disable pull downs
+  gpio=22-27=np
+
+  # Enable jtag pins (i.e. GPIO22-GPIO27)
+  enable_jtag_gpio=1
+
+
diff --git a/user/bsps/bsps-aarch64.rst b/user/bsps/bsps-aarch64.rst
index 933370f..f3aa15c 100644
--- a/user/bsps/bsps-aarch64.rst
+++ b/user/bsps/bsps-aarch64.rst
@@ -9,3 +9,4 @@ aarch64 (AArch64)
 .. include:: aarch64/a72.rst
 .. include:: aarch64/xilinx-versal.rst
 .. include:: aarch64/xilinx-zynqmp.rst
+.. include:: aarch64/raspberrypi4.rst
\ No newline at end of file
-- 
2.37.3

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[PATCH v3] bsp/aarch64: Add new Raspberry Pi 4B BSP

2022-10-04 Thread Mohd Noor Aman
This patch adds new Raspberry pi 4B AArch64 BSP to the RTEMS Family. Currently
only LP64 ABI is supported. ILP32 is not supported. RAM starts from 0x8 in
64Bit kernel mode and MMU from 0x0. All Raspberrypi Pi 4B models and Raspberry
Pi 400 are supported. All the IRQs are similiar to the older Raspberry pi 2 ARM
BSP.

Raspberry Pi 4B has 2 types of UARTs. Only PL011 serial is supported currently.
Mini-UART is not supported. Mini-UART is default UART on the board so it needs
to be disabled by adding "dtoverlay=disable-bt" to the config.txt. No support
for additional 4 PL011-UARTs on the board.

The raspberrypi.h includes many of the address required for the future
development of the RPi 4B BSP. This includes peripherals, ARM Timer, VideoCore
Timer, Watchdog, Mailbox, AUX, FIQs and IRQs.
---
 bsps/aarch64/raspberrypi/console/console.c|  69 +++
 bsps/aarch64/raspberrypi/include/bsp.h|  76 +++
 bsps/aarch64/raspberrypi/include/bsp/irq.h| 109 
 .../raspberrypi/include/bsp/raspberrypi.h | 471 ++
 bsps/aarch64/raspberrypi/include/tm27.h   |  46 ++
 bsps/aarch64/raspberrypi/start/bspstart.c |  49 ++
 .../aarch64/raspberrypi/start/bspstarthooks.c |  53 ++
 bsps/aarch64/raspberrypi/start/bspstartmmu.c  |  84 
 spec/build/bsps/aarch64/raspberrypi/abi.yml   |  21 +
 .../aarch64/raspberrypi/bspraspberrypi4.yml   |  81 +++
 .../bsps/aarch64/raspberrypi/linkercmds.yml   |  76 +++
 11 files changed, 1135 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/console/console.c
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp.h
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp/irq.h
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
 create mode 100644 bsps/aarch64/raspberrypi/include/tm27.h
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstart.c
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstarthooks.c
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstartmmu.c
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/abi.yml
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/bspraspberrypi4.yml
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/linkercmds.yml

diff --git a/bsps/aarch64/raspberrypi/console/console.c 
b/bsps/aarch64/raspberrypi/console/console.c
new file mode 100644
index 00..73bb0036ff
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/console/console.c
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64Raspberrypi4
+ *
+ * @brief Console Configuration
+ */
+
+/*
+ * Copyright (C) 2022 Mohd Noor Aman
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+arm_pl011_context raspberrypi_4_context = {
+  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
+  .regs = (volatile pl011 *) BSP_RPI4_PL011_BASE,
+  .initial_baud = 115200
+};
+
+const console_device console_device_table[] = {
+  {
+.device_file = "/dev/ttyS0",
+.probe = console_device_probe_default,
+.handler = _pl011_fns,
+.context = _4_context.base
+  }
+};
+
+const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
+
+static void output_char( char c )
+{
+  arm_pl011_write_polled(_4_context.base, c);
+}
+
+BSP_output_char_function_type BSP_output_char = output_char;
+
+BSP_polling_getchar_function_type BSP_poll_char = NULL;
diff --git a/bsps/aarch64/raspberrypi/include/bsp.h 
b/bsps/aarch64/raspberrypi/include/bsp.h
new file mode 100644
index 00..4fa81edd40
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/include/bsp.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Iden

[PATCH rtems-docs] raspberrypi4.rst: Added Documentation for the new AArch64 Raspberry pi 4B BSP

2022-09-26 Thread Mohd Noor Aman
This patch adds the relevant documentations required for booting the new BSP. 
JTAG support is added for debugging. I have built the HTML docs and verified 
them.
---
 user/bsps/aarch64/raspberrypi4.rst | 92 ++
 user/bsps/bsps-aarch64.rst |  1 +
 2 files changed, 93 insertions(+)
 create mode 100644 user/bsps/aarch64/raspberrypi4.rst

diff --git a/user/bsps/aarch64/raspberrypi4.rst 
b/user/bsps/aarch64/raspberrypi4.rst
new file mode 100644
index 000..94daacf
--- /dev/null
+++ b/user/bsps/aarch64/raspberrypi4.rst
@@ -0,0 +1,92 @@
+.. SPDX-License-Identifier: CC-BY-SA-4.0
+
+.. Copyright (C) 2022 Mohd Noor Aman
+
+.. _BSP_aarch64_Raspberrypi_4:
+
+Raspberry Pi 4B
+===
+
+The 'raspberrypi4b' BSP currently supports only the LP64 ABI. Raspberry pi 4B
+and Raspberry Pi 400  are supported. The default bootloader which is used by 
the
+Raspbian OS or other OS can be used to boot the RTEMS. Currently, QEMU is not
+supported. This BSP supports the GICv2 interrupt controller.
+
+Clock Driver
+
+
+The clock driver uses the `ARM Generic Timer`.
+
+Console Driver
+--
+
+The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART
+as well as the physical ARM PL011 PrimeCell UART in the raspberrypi hardware.
+Only UART0 is supported as of now.
+
+Preparing to boot
+--
+
+Raspberry Pi uses a different mechanism to boot. First the GPU initializes,
+loads the bootloader and then looks for the kernel img. By default the arm64
+mode looks for the ``kernel8.img``. Any other kernel can be loaded by adding
+`kernel=` to the ``config.txt``.
+
+The Firmware files are required in order to boot RTEMS. The latest firmware can
+be downloaded from the `Raspberry Pi Firmware Repository
+<https://github.com/raspberrypi/firmware/>`_. USB boot is supported. All the
+files (Firmwares and kernel) must be place in the FAT32 partition only. Add
+``arm_64bit=1`` in the config.txt file in order to boot the BSP in 64bit kernel
+mode. 
+
+
+UART Setup
+^^
+
+Connect your serial device to the GPIO15 and GPIO14. Add the following to the
+config.txt file in order to use the PL011 UART0.
+
+.. code-block:: none
+
+  dtoverlay = disable-bt
+  enable_uart=1
+
+Generating kernel image 
+^^^
+
+The following steps show how to run ``hello.exe`` on the BSP. Other executables
+can be processed in a similar way.
+
+To create the kernel image:
+
+.. code-block:: shell
+
+  $ aarch64-rtems@rtems-ver-major@-objcopy -Obinary hello.exe kernel8.img
+
+Copy the kernel image to the SD card.
+
+JTAG Setup
+--
+
+The Raspberry Pi 4 doesn't have dedicated JTAG pins. Instead, you must 
configure
+the GPIO pins (GPIO22-GPIO27) to activate the JTAG functionality. The RPi 4
+documentation refers to this as Alt4 functions of those pins. Alt5 does exist
+too, which goes from GPIO4, 5, 6, 12 and 13. you can check this out from
+`pinout.xyz <https://pinout.xyz/pinout/jtag#>`_ or `eLinux
+<https://elinux.org/RPi_BCM2835_GPIOs>`_
+
+One more thing to note on JTAG with Raspberry pi 4B is that, by default, All 
the
+GPIO pins are pulled down, according to the `BCM2711 documentation
+<https://datasheets.raspberrypi.com/bcm2711/bcm2711-peripherals.pdf>`_. This
+wasn't the case in the earlier models. So in order to let the data flow freely,
+we will have to disable them.
+
+.. code-block:: none
+
+  # Disable pull downs
+  gpio=22-27=np
+
+  # Enable jtag pins (i.e. GPIO22-GPIO27)
+  enable_jtag_gpio=1
+
+
diff --git a/user/bsps/bsps-aarch64.rst b/user/bsps/bsps-aarch64.rst
index 933370f..f3aa15c 100644
--- a/user/bsps/bsps-aarch64.rst
+++ b/user/bsps/bsps-aarch64.rst
@@ -9,3 +9,4 @@ aarch64 (AArch64)
 .. include:: aarch64/a72.rst
 .. include:: aarch64/xilinx-versal.rst
 .. include:: aarch64/xilinx-zynqmp.rst
+.. include:: aarch64/raspberrypi4.rst
\ No newline at end of file
-- 
2.34.1

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[PATCH v2] bsp/aarch64: New entry for Raspberry pi 4B AArch64 BSP

2022-09-24 Thread Mohd Noor Aman
This patch adds new Raspberry pi 4B AArch64 BSP to the RTEMS Family. Currently 
only IPL64 ABI is supported. IPL32 Supported will be added in the near future. 
RAM starts from 0x8 in the arm64 bit mode for Raspberry pi 4B, RAM extends 
to 1GB and MMU starts from 0x0.
All the IRQs are similiar to the older Raspberry pi 2 ARM BSP. Although newer 
GIC-400 related IRQs would be required in the near future.
Only PL011 serial is supported as of now and that's too only for UART0. You'll 
need to disable default miniuart in order for that to work.
The raspberrypi.h includes many of the address required for the future 
development of the RPi 4B BSP. This includes peripherals, ARM Timer, VideoCore 
Timer, Watchdog, Mailbox, AUX, FIQs and IRQs.
---
 bsps/aarch64/raspberrypi/console/console.c|  69 +++
 bsps/aarch64/raspberrypi/include/bsp.h|  73 +++
 bsps/aarch64/raspberrypi/include/bsp/irq.h| 109 
 .../raspberrypi/include/bsp/raspberrypi.h | 471 ++
 bsps/aarch64/raspberrypi/include/tm27.h   |  46 ++
 bsps/aarch64/raspberrypi/start/bspstart.c |  49 ++
 .../aarch64/raspberrypi/start/bspstarthooks.c |  53 ++
 bsps/aarch64/raspberrypi/start/bspstartmmu.c  |  84 
 spec/build/bsps/aarch64/raspberrypi/abi.yml   |  21 +
 .../aarch64/raspberrypi/bspraspberrypi4.yml   |  81 +++
 .../bsps/aarch64/raspberrypi/linkercmds.yml   |  76 +++
 11 files changed, 1132 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/console/console.c
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp.h
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp/irq.h
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
 create mode 100644 bsps/aarch64/raspberrypi/include/tm27.h
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstart.c
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstarthooks.c
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstartmmu.c
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/abi.yml
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/bspraspberrypi4.yml
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/linkercmds.yml

diff --git a/bsps/aarch64/raspberrypi/console/console.c 
b/bsps/aarch64/raspberrypi/console/console.c
new file mode 100644
index 00..73bb0036ff
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/console/console.c
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64Raspberrypi4
+ *
+ * @brief Console Configuration
+ */
+
+/*
+ * Copyright (C) 2022 Mohd Noor Aman
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+arm_pl011_context raspberrypi_4_context = {
+  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
+  .regs = (volatile pl011 *) BSP_RPI4_PL011_BASE,
+  .initial_baud = 115200
+};
+
+const console_device console_device_table[] = {
+  {
+.device_file = "/dev/ttyS0",
+.probe = console_device_probe_default,
+.handler = _pl011_fns,
+.context = _4_context.base
+  }
+};
+
+const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
+
+static void output_char( char c )
+{
+  arm_pl011_write_polled(_4_context.base, c);
+}
+
+BSP_output_char_function_type BSP_output_char = output_char;
+
+BSP_polling_getchar_function_type BSP_poll_char = NULL;
diff --git a/bsps/aarch64/raspberrypi/include/bsp.h 
b/bsps/aarch64/raspberrypi/include/bsp.h
new file mode 100644
index 00..d94a0432d5
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/include/bsp.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingrou

[PATCH 7/7] bsp/aarch64: Console initialization for Raspberry Pi 4B AArch64 BSP

2022-09-22 Thread Mohd Noor Aman
This commit adds console initialization for the BSP using Polled mode. This is 
similar to the QEMU-A72 and QEMU-A53 console initialization.
---
 bsps/aarch64/raspberrypi/console/console.c | 69 ++
 1 file changed, 69 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/console/console.c

diff --git a/bsps/aarch64/raspberrypi/console/console.c 
b/bsps/aarch64/raspberrypi/console/console.c
new file mode 100644
index 00..73bb0036ff
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/console/console.c
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64Raspberrypi4
+ *
+ * @brief Console Configuration
+ */
+
+/*
+ * Copyright (C) 2022 Mohd Noor Aman
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+arm_pl011_context raspberrypi_4_context = {
+  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
+  .regs = (volatile pl011 *) BSP_RPI4_PL011_BASE,
+  .initial_baud = 115200
+};
+
+const console_device console_device_table[] = {
+  {
+.device_file = "/dev/ttyS0",
+.probe = console_device_probe_default,
+.handler = _pl011_fns,
+.context = _4_context.base
+  }
+};
+
+const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
+
+static void output_char( char c )
+{
+  arm_pl011_write_polled(_4_context.base, c);
+}
+
+BSP_output_char_function_type BSP_output_char = output_char;
+
+BSP_polling_getchar_function_type BSP_poll_char = NULL;
-- 
2.34.1

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[PATCH 6/7] bsp/aarch64: Starthooks and MMU Sections for Raspberry pi 4B AArch64 BSP

2022-09-22 Thread Mohd Noor Aman
This commit add starthooks and MMU files for the BSP. The MMU sections include 
peripheral, ARM Local regs, FIQs-IRQs, Watchdog, Videocore Timer, System Timer, 
GIC Timer, EMMC and UART Addresses.
---
 bsps/aarch64/raspberrypi/start/bspstart.c |  49 
 .../aarch64/raspberrypi/start/bspstarthooks.c |  53 
 bsps/aarch64/raspberrypi/start/bspstartmmu.c  | 119 ++
 3 files changed, 221 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstart.c
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstarthooks.c
 create mode 100644 bsps/aarch64/raspberrypi/start/bspstartmmu.c

diff --git a/bsps/aarch64/raspberrypi/start/bspstart.c 
b/bsps/aarch64/raspberrypi/start/bspstart.c
new file mode 100644
index 00..56f52a2231
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/start/bspstart.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64Raspberrypi4
+ *
+ * @brief BSP Startup
+ */
+
+/*
+ * Copyright (C) 2022 Mohd Noor Aman
+ * 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+void bsp_start( void )
+{
+  bsp_interrupt_initialize();
+  rtems_cache_coherent_add_area(
+bsp_section_nocacheheap_begin,
+(uintptr_t) bsp_section_nocacheheap_size
+  );
+}
diff --git a/bsps/aarch64/raspberrypi/start/bspstarthooks.c 
b/bsps/aarch64/raspberrypi/start/bspstarthooks.c
new file mode 100644
index 00..fe0fe77c09
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/start/bspstarthooks.c
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64Raspberrypi4
+ *
+ * @brief BSP Startup Hooks
+ */
+
+/*
+ * Copyright (C) 2022 Mohd Noor Aman
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
+{
+  /* Do nothing */
+}
+
+BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
+{
+  AArch64_start_set_vector_base();
+  bsp_start_copy_sections();
+  raspberrypi_4_setup_mmu_and_cache();
+  bsp_start_clear_bss();
+}
\ No newline at end of file
diff --git a/bsps/aarch64/raspberrypi/start/bspstartmmu.c 
b/bsps/aarch64/raspberrypi/start/bspstartmmu.c
new file mode 100644
index 00..cdf8b39d2d
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/start/bspstartmmu.c
@@ -0,0 +1,119 @@
+/* SPDX-Licen

[PATCH 5/7] bsp/aarch64: Raspberry pi headers for the BCM2711 SoC

2022-09-22 Thread Mohd Noor Aman
This file included many of the address required for the future development of 
the RPi 4B BSP. This includes peripherals, ARM Timer, VideoCore Timer, 
Watchdog, Mailbox, AUX, FIQs and IRQs.
---
 .../raspberrypi/include/bsp/raspberrypi.h | 471 ++
 1 file changed, 471 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h

diff --git a/bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h 
b/bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
new file mode 100644
index 00..2cd851b5a2
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
@@ -0,0 +1,471 @@
+/**
+ * @file
+ *
+ * @ingroup raspberrypi_4_regs
+ *
+ * @brief Register definitions.
+ */
+
+/*
+ *  Copyright (c) 2022 Mohd Noor Aman
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.rtems.org/license/LICENSE
+ *
+ */
+
+
+#ifndef LIBBSP_AARCH64_RASPBERRYPI_RASPBERRYPI_4_H
+#define LIBBSP_AARCH64_RASPBERRYPI_RASPBERRYPI_4_H
+
+
+#include 
+#include 
+#include 
+
+
+/**
+ * @defgroup raspberrypi_reg Register Definitions
+ *
+ * @ingroup RTEMSBSPsARMRaspberryPi
+ *
+ * @brief Register Definitions
+ *
+ * @{
+ */
+
+/**
+ * @name Register Macros
+ *
+ * @{
+ */
+
+#define BCM2711_REG(x)   (*(volatile uint64_t *)(x))
+#define BCM2711_BIT(n)   (1 << (n))
+
+/** @} */
+
+/**
+ * @name Peripheral Base Register Address
+ *
+ * @{
+ */
+
+#define RPI_PERIPHERAL_BASE 0xFE00
+#define BASE_OFFSET 0xFE00
+#define RPI_PERIPHERAL_SIZE 0x0180
+
+/**
+ * @name Bus to Physical address translation
+ *   Macro.
+ * @{
+ */
+#define BUS_TO_PHY(x)((x) - BASE_OFFSET)
+
+/** @} */
+
+/**
+ * @name Internal ARM Timer Registers
+ *
+ * @{
+ */
+
+#define BCM2711_CLOCK_FREQ   25000
+
+#define BCM2711_TIMER_BASE   (RPI_PERIPHERAL_BASE + 0xB400)
+
+#define BCM2711_TIMER_LOD(BCM2711_TIMER_BASE + 0x00)
+#define BCM2711_TIMER_VAL(BCM2711_TIMER_BASE + 0x04)
+#define BCM2711_TIMER_CTL(BCM2711_TIMER_BASE + 0x08)
+#define BCM2711_TIMER_CLI(BCM2711_TIMER_BASE + 0x0C)
+#define BCM2711_TIMER_RIS(BCM2711_TIMER_BASE + 0x10)
+#define BCM2711_TIMER_MIS(BCM2711_TIMER_BASE + 0x14)
+#define BCM2711_TIMER_RLD(BCM2711_TIMER_BASE + 0x18)
+#define BCM2711_TIMER_DIV(BCM2711_TIMER_BASE + 0x1C)
+#define BCM2711_TIMER_CNT(BCM2711_TIMER_BASE + 0x20)
+
+#define BCM2711_TIMER_PRESCALE0xF9
+
+/** @} */
+
+/**
+ * @name Power Management and Watchdog  Registers
+ *
+ * @{
+ */
+
+#define BCM2711_PM_PASSWD_MAGIC  0x5a00
+
+#define BCM2711_PM_BASE  (RPI_PERIPHERAL_BASE + 0x10)
+
+#define BCM2711_PM_GNRIC (BCM2711_PM_BASE + 0x00)
+#define BCM2711_PM_GNRIC_POWUP   0x0001
+#define BCM2711_PM_GNRIC_POWOK   0x0002
+#define BCM2711_PM_GNRIC_ISPOW   0x0004
+#define BCM2711_PM_GNRIC_MEMREP  0x0008
+#define BCM2711_PM_GNRIC_MRDONE  0x0010
+#define BCM2711_PM_GNRIC_ISFUNC  0x0020
+#define BCM2711_PM_GNRIC_RSTN0x0fc0
+#define BCM2711_PM_GNRIC_ENAB0x1000
+#define BCM2711_PM_GNRIC_CFG 0x007f
+
+#define BCM2711_PM_AUDIO (BCM2711_PM_BASE + 0x04)
+#define BCM2711_PM_AUDIO_APSM0x000f
+#define BCM2711_PM_AUDIO_CTRLEN  0x0010
+#define BCM2711_PM_AUDIO_RSTN0x0020
+
+#define BCM2711_PM_STATUS(BCM2711_PM_BASE + 0x18)
+
+#define BCM2711_PM_RSTC  (BCM2711_PM_BASE + 0x1c)
+#define BCM2711_PM_RSTC_DRCFG0x0003
+#define BCM2711_PM_RSTC_WRCFG0x0030
+#define BCM2711_PM_RSTC_WRCFG_FULL   0x0020
+#define BCM2711_PM_RSTC_SRCFG0x0300
+#define BCM2711_PM_RSTC_QRCFG0x3000
+#define BCM2711_PM_RSTC_FRCFG0x0003
+#define BCM2711_PM_RSTC_HRCFG0x0030
+
+#define BCM2711_PM_RSTS  (BCM2711_PM_BASE + 0x20)
+#define BCM2711_PM_RSTS_HADDRQ   0x0001
+#define BCM2711_PM_RSTS_HADDRF   0x0002
+#define BCM2711_PM_RSTS_HADDRH   0x0004
+#define BCM2711_PM_RSTS_HADWRQ   0x0010
+#define BCM2711_PM_RSTS_HADWRF   0x002
+#define BCM2711_PM_RSTS_HADWRH   0x0040
+#define BCM2711_PM_RSTS_HADSRQ   0x0100
+#define BCM2711_PM_RSTS_HADSRF   0x0200
+#define BCM2711_PM_RSTS_HADSRH   0x0400
+#define BCM2711_PM_RSTS_HADPOR   0x1000
+
+#define BCM2711_PM_WDOG  (BCM2711_PM_BASE + 0x24)
+
+/** @} */
+
+
+/** @} */
+
+/**
+ * @name AUX Registers
+ *
+ * @{
+ */
+
+#define BCM2711_AUX_BASE (RPI_PERIPHERAL_BASE + 0x215000)
+
+#define AUX_ENABLES  (BCM2711_AUX_BASE + 0x04)
+#define AUX_MU_IO_REG(BCM2711_AUX_BASE + 0x40)
+#define AUX_MU_IER_REG   (BCM2711_AUX_BASE + 0x44)
+#define AUX_MU_IIR_REG   (BCM2711_AUX_BASE + 0x48)
+#define AUX_MU_LCR_REG   (BCM2711_AUX_BASE + 0x4C)
+#define AUX_MU_MCR_REG   (BCM2711_AUX_BASE + 0x50)
+#define AUX_MU_LSR_REG   (BCM2711_AUX_BASE 

[PATCH 4/7] bsp/aarch64: BSP and TM27 headers for the Raspberry pi 4B AArch64 BSP

2022-09-22 Thread Mohd Noor Aman
This commits includes tm27 and bsp headers. Only GIC-400 and UART1 address is 
defined in the bsp.h . Other UARTS addresses would be included soon in future.
---
 bsps/aarch64/raspberrypi/include/bsp.h  | 73 +
 bsps/aarch64/raspberrypi/include/tm27.h | 46 
 2 files changed, 119 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp.h
 create mode 100644 bsps/aarch64/raspberrypi/include/tm27.h

diff --git a/bsps/aarch64/raspberrypi/include/bsp.h 
b/bsps/aarch64/raspberrypi/include/bsp.h
new file mode 100644
index 00..d94a0432d5
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/include/bsp.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64Raspberrypi4
+ *
+ * @brief Core BSP definitions
+ */
+
+/*
+ * Copyright (C) 2022 Mohd Noor Aman
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H
+#define LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H
+
+/**
+ * @addtogroup RTEMSBSPsAArch64
+ *
+ * @{
+ */
+
+#include 
+
+#ifndef ASM
+
+#include 
+#include 
+
+#include 
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define BSP_ARM_GIC_CPUIF_BASE 0xFF842000
+#define BSP_ARM_GIC_DIST_BASE 0xFF841000
+
+#define BSP_RPI4_PL011_BASE 0xFE201000
+#define BSP_RPI4_PL011_LENGTH 0x200
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+/** @} */
+
+#endif /* LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H */
diff --git a/bsps/aarch64/raspberrypi/include/tm27.h 
b/bsps/aarch64/raspberrypi/include/tm27.h
new file mode 100644
index 00..653f88ed01
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/include/tm27.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64Raspberrypi4
+ *
+ * @brief BSP tm27 header
+ */
+
+/*
+ * Copyright (C) 2022 Mohd Noor Aman
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+#include 
+
+#endif /* __tm27_h */
\ No newline at end of file
-- 
2.34.1

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[PATCH 3/7] bsp/aarch64: IRQ headers for raspberry pi 4B

2022-09-22 Thread Mohd Noor Aman
These are same IRQs from the rapsberry pi 3. All the IRQs are same as of now. 
More GIC-400 related interrupts would be required in future but currently these 
are enough for basic BSP.
---
 bsps/aarch64/raspberrypi/include/bsp/irq.h | 109 +
 1 file changed, 109 insertions(+)
 create mode 100644 bsps/aarch64/raspberrypi/include/bsp/irq.h

diff --git a/bsps/aarch64/raspberrypi/include/bsp/irq.h 
b/bsps/aarch64/raspberrypi/include/bsp/irq.h
new file mode 100644
index 00..effec1b040
--- /dev/null
+++ b/bsps/aarch64/raspberrypi/include/bsp/irq.h
@@ -0,0 +1,109 @@
+/**
+ * @file
+ *
+ * @ingroup raspberrypi_interrupt
+ *
+ * @brief Interrupt definitions.
+ */
+
+/**
+ * Copyright (c) 2013 Alan Cudmore
+ * Copyright (c) 2022 Mohd Noor Aman
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.rtems.org/license/LICENSE
+ *
+ */
+
+#ifndef LIBBSP_ARM_RASPBERRYPI_IRQ_H
+#define LIBBSP_ARM_RASPBERRYPI_IRQ_H
+
+#ifndef ASM
+
+#include 
+#include 
+#include 
+#include 
+
+#if defined(RTEMS_SMP)
+#include 
+#endif
+
+/**
+ * @defgroup raspberrypi_interrupt Interrrupt Support
+ *
+ * @ingroup RTEMSBSPsARMRaspberryPi
+ *
+ * @brief Interrupt support.
+ */
+
+#define BCM2835_INTC_TOTAL_IRQ   (64 + 8)
+
+#define BCM2835_IRQ_SET1_MIN 0
+#define BCM2835_IRQ_SET2_MIN 32
+
+#define BCM2835_IRQ_ID_GPU_TIMER_M0  0
+#define BCM2835_IRQ_ID_GPU_TIMER_M1  1
+#define BCM2835_IRQ_ID_GPU_TIMER_M2  2
+#define BCM2835_IRQ_ID_GPU_TIMER_M3  3
+
+#define BCM2835_IRQ_ID_USB   9
+#define BCM2835_IRQ_ID_AUX   29
+#define BCM2835_IRQ_ID_SPI_SLAVE 43
+#define BCM2835_IRQ_ID_PWA0  45
+#define BCM2835_IRQ_ID_PWA1  46
+#define BCM2835_IRQ_ID_SMI   48
+#define BCM2835_IRQ_ID_GPIO_049
+#define BCM2835_IRQ_ID_GPIO_150
+#define BCM2835_IRQ_ID_GPIO_251
+#define BCM2835_IRQ_ID_GPIO_352
+#define BCM2835_IRQ_ID_I2C   53
+#define BCM2835_IRQ_ID_SPI   54
+#define BCM2835_IRQ_ID_PCM   55
+#define BCM2835_IRQ_ID_UART  57
+#define BCM2835_IRQ_ID_SD62
+
+#define BCM2835_IRQ_ID_BASIC_BASE_ID 64
+#define BCM2835_IRQ_ID_TIMER_0   64
+#define BCM2835_IRQ_ID_MAILBOX_0 65
+#define BCM2835_IRQ_ID_DOORBELL_066
+#define BCM2835_IRQ_ID_DOORBELL_167
+#define BCM2835_IRQ_ID_GPU0_HALTED   68
+#define BCM2835_IRQ_ID_GPU1_HALTED   69
+#define BCM2835_IRQ_ID_ILL_ACCESS_1  70
+#define BCM2835_IRQ_ID_ILL_ACCESS_0  71
+#define BSP_TIMER_VIRT_PPI 27
+#define BSP_TIMER_PHYS_NS_PPI 30
+#define BSP_VPL011_SPI 32
+
+#define BSP_INTERRUPT_VECTOR_COUNTBCM2835_INTC_TOTAL_IRQ
+#define BSP_INTERRUPT_VECTOR_INVALID (UINT32_MAX)
+
+#define BSP_IRQ_COUNT   (BCM2835_INTC_TOTAL_IRQ)
+
+#if defined(RTEMS_SMP)
+static inline rtems_status_code bsp_interrupt_set_affinity(
+  rtems_vector_number   vector,
+  const Processor_mask *affinity
+)
+{
+  (void) vector;
+  (void) affinity;
+  return RTEMS_UNSATISFIED;
+}
+
+static inline rtems_status_code bsp_interrupt_get_affinity(
+  rtems_vector_number  vector,
+  Processor_mask  *affinity
+)
+{
+  (void) vector;
+  _Processor_mask_From_index( affinity, 0 );
+  return RTEMS_UNSATISFIED;
+}
+#endif
+
+#endif /* ASM */
+#endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */
-- 
2.34.1

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[PATCH 2/7] bsp/aarch64: Linker file for Raspberry pi 4B AArch64 BSP

2022-09-22 Thread Mohd Noor Aman
Linker sections for RAM and MMU is added. RAM starts from 0x8 in the arm64 
bit mode for Raspberry pi 4B and MMU from 0x0.
---
 .../bsps/aarch64/raspberrypi/linkercmds.yml   | 76 +++
 1 file changed, 76 insertions(+)
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/linkercmds.yml

diff --git a/spec/build/bsps/aarch64/raspberrypi/linkercmds.yml 
b/spec/build/bsps/aarch64/raspberrypi/linkercmds.yml
new file mode 100644
index 00..8598b89cba
--- /dev/null
+++ b/spec/build/bsps/aarch64/raspberrypi/linkercmds.yml
@@ -0,0 +1,76 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+  /* SPDX-License-Identifier: BSD-2-Clause */
+
+  /*
+   * Copyright (C) 2022 Mohd Noor Aman 
+   *
+   * Redistribution and use in source and binary forms, with or without
+   * modification, are permitted provided that the following conditions
+   * are met:
+   * 1. Redistributions of source code must retain the above copyright
+   *notice, this list of conditions and the following disclaimer.
+   * 2. Redistributions in binary form must reproduce the above copyright
+   *notice, this list of conditions and the following disclaimer in the
+   *documentation and/or other materials provided with the distribution.
+   *
+   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 
IS"
+   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+   * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   * POSSIBILITY OF SUCH DAMAGE.
+   */
+
+  MEMORY {
+  RAM_MMU  : ORIGIN = 0x0, LENGTH = (0x1000 * 
${AARCH64_MMU_TRANSLATION_TABLE_PAGES})
+  RAM  : ORIGIN = 0x8, LENGTH = 1024M
+  }
+
+  REGION_ALIAS ("REGION_START",  RAM);
+  REGION_ALIAS ("REGION_VECTOR", RAM);
+  REGION_ALIAS ("REGION_TEXT",   RAM);
+  REGION_ALIAS ("REGION_TEXT_LOAD",  RAM);
+  REGION_ALIAS ("REGION_RODATA", RAM);
+  REGION_ALIAS ("REGION_RODATA_LOAD",RAM);
+  REGION_ALIAS ("REGION_DATA",   RAM);
+  REGION_ALIAS ("REGION_DATA_LOAD",  RAM);
+  REGION_ALIAS ("REGION_FAST_TEXT",  RAM);
+  REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+  REGION_ALIAS ("REGION_FAST_DATA",  RAM);
+  REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+  REGION_ALIAS ("REGION_BSS",RAM);
+  REGION_ALIAS ("REGION_WORK",   RAM);
+  REGION_ALIAS ("REGION_STACK",  RAM);
+  REGION_ALIAS ("REGION_NOCACHE",RAM);
+  REGION_ALIAS ("REGION_NOCACHE_LOAD",   RAM);
+
+  bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 
1024;
+
+  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? 
bsp_section_rwbarrier_align : 1M;
+
+  bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? 
bsp_stack_exception_size : 1024;
+
+  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? 
bsp_section_rwbarrier_align : 1M;
+
+  bsp_vector_table_in_start_section = 1;
+  bsp_translation_table_base = ORIGIN (RAM_MMU);
+  bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+  OUTPUT_FORMAT ("elf64-littleaarch64")
+  OUTPUT_ARCH (aarch64)
+
+  INCLUDE linkcmds.base
+copyrights:
+- Copyright (C) 2022 Mohd Noor Aman
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
-- 
2.34.1

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[PATCH 1/7] bsp/aarch64: New entry for Raspberry pi 4B AArch64 BSP

2022-09-22 Thread Mohd Noor Aman
This commit adds new Raspberry pi 4B AArch64 BSP to the RTEMS Family. Currently 
only IPL64 ABI is supported. IPL32 Supported will be added in the near future.
---
 spec/build/bsps/aarch64/raspberrypi/abi.yml   | 21 +
 .../aarch64/raspberrypi/bspraspberrypi4.yml   | 78 +++
 2 files changed, 99 insertions(+)
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/abi.yml
 create mode 100644 spec/build/bsps/aarch64/raspberrypi/bspraspberrypi4.yml

diff --git a/spec/build/bsps/aarch64/raspberrypi/abi.yml 
b/spec/build/bsps/aarch64/raspberrypi/abi.yml
new file mode 100644
index 00..9ed4a961a7
--- /dev/null
+++ b/spec/build/bsps/aarch64/raspberrypi/abi.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) Copyright (C) 2022 Mohd Noor Aman
+default:
+- -mcpu=cortex-a72
+- -march=armv8-a 
+
+default-by-variant: []
+includes: []
+description: |
+  ABI flags
+links: []
+enabled-by: true
+name: ABI_FLAGS
+type: build
+ 
\ No newline at end of file
diff --git a/spec/build/bsps/aarch64/raspberrypi/bspraspberrypi4.yml 
b/spec/build/bsps/aarch64/raspberrypi/bspraspberrypi4.yml
new file mode 100644
index 00..8b4447db46
--- /dev/null
+++ b/spec/build/bsps/aarch64/raspberrypi/bspraspberrypi4.yml
@@ -0,0 +1,78 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: aarch64
+bsp: raspberrypi4b
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2022 Mohd Noor Aman
+cppflags: []
+enabled-by: true
+family: raspberrypi
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/aarch64/raspberrypi/include/bsp.h
+  - bsps/aarch64/raspberrypi/include/tm27.h
+
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/aarch64/raspberrypi/include/bsp/irq.h
+  - bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
+
+source:
+- bsps/aarch64/raspberrypi/console/console.c
+- bsps/aarch64/raspberrypi/start/bspstart.c
+- bsps/aarch64/raspberrypi/start/bspstarthooks.c
+- bsps/aarch64/raspberrypi/start/bspstartmmu.c
+- bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
+- bsps/aarch64/shared/cache/cache.c
+- bsps/shared/dev/clock/arm-generic-timer.c
+- bsps/shared/dev/irq/arm-gicv2.c
+- bsps/shared/dev/irq/arm-gicv2-get-attributes.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/dev/serial/arm-pl011.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/irq/irq-handler-install.c
+- bsps/shared/irq/irq-generic.c
+- bsps/shared/irq/irq-lock.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspreset-arm-psci.c
+- bsps/shared/start/gettargethash-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/wkspaceinitone.c
+- bsps/shared/start/mallocinitmulti.c
+- bsps/shared/start/bspgetworkarea-default.c
+
+links:
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../start
+- role: build-dependency
+  uid: ../optmmupages
+- role: build-dependency
+  uid: ../optgtusevirt
+- role: build-dependency
+  uid: ../optgtuseps
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: ../../optcachedata
+- role: build-dependency
+  uid: ../../optcacheinst
+- role: build-dependency
+  uid: ../../opto2
+- role: build-dependency
+  uid: ../../bspopts
+- role: build-dependency
+  uid: linkercmds
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+  
+type: build
+
+
-- 
2.34.1

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