Re: [PATCH 1/2] bsp/stm32f4xxxx_rcc.h: Fix RCC register defines

2022-10-20 Thread Matthew Joyce 
RCC_CFGR_PPRE2 is defined twice, on lines 240 and 241. Based on the 
other defines, I think 241 should have been RCC_CFGR_PPRE2_MSK. Is that 
what you're referring to? Thanks!


On 19.10.22 14:48, Joel Sherrill wrote:

I don't see the name defined twice. Are they functionally equivalent?

On Wed, Oct 19, 2022, 5:57 AM Matthew Joyce 
 wrote:


From: Matt Joyce 

Fix a double define of RCC_CFGR_PPRE2 and add RCC_CFGR_PPRE1_MSK.
---
 bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
b/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
index 7dadfbe756..dc4a7f0edd 100644
--- a/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
+++ b/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
@@ -231,6 +231,7 @@ typedef struct {
 #define RCC_CFGR_HPRE_BY_512 BSP_FLD32( 15, 4, 7 )

 #define RCC_CFGR_PPRE1 10
+#define RCC_CFGR_PPRE1_MSK BSP_MSK32( 10, 12 )
 #define RCC_CFGR_PPRE1_BY_1 0
 #define RCC_CFGR_PPRE1_BY_2 BSP_FLD32( 4, 10, 12 )
 #define RCC_CFGR_PPRE1_BY_4 BSP_FLD32( 5, 10, 12 )
@@ -238,7 +239,7 @@ typedef struct {
 #define RCC_CFGR_PPRE1_BY_16 BSP_FLD32( 7, 10, 12 )

 #define RCC_CFGR_PPRE2 13
-#define RCC_CFGR_PPRE2 BSP_MSK32( 13, 15 )
+#define RCC_CFGR_PPRE2_MSK BSP_MSK32( 13, 15 )
 #define RCC_CFGR_PPRE2_BY_1 0
 #define RCC_CFGR_PPRE2_BY_2 BSP_FLD32( 4, 13, 15 )
 #define RCC_CFGR_PPRE2_BY_4 BSP_FLD32( 5, 13, 15 )
-- 
2.31.1


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Re: [PATCH 1/2] bsp/stm32f4xxxx_rcc.h: Fix RCC register defines

2022-10-19 Thread Joel Sherrill 
I don't see the name defined twice. Are they functionally equivalent?

On Wed, Oct 19, 2022, 5:57 AM Matthew Joyce <
matthew.jo...@embedded-brains.de> wrote:

> From: Matt Joyce 
>
> Fix a double define of RCC_CFGR_PPRE2 and add RCC_CFGR_PPRE1_MSK.
> ---
>  bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
> b/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
> index 7dadfbe756..dc4a7f0edd 100644
> --- a/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
> +++ b/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
> @@ -231,6 +231,7 @@ typedef struct {
>  #define RCC_CFGR_HPRE_BY_512 BSP_FLD32( 15, 4, 7 )
>
>  #define RCC_CFGR_PPRE1 10
> +#define RCC_CFGR_PPRE1_MSK BSP_MSK32( 10, 12 )
>  #define RCC_CFGR_PPRE1_BY_1 0
>  #define RCC_CFGR_PPRE1_BY_2 BSP_FLD32( 4, 10, 12 )
>  #define RCC_CFGR_PPRE1_BY_4 BSP_FLD32( 5, 10, 12 )
> @@ -238,7 +239,7 @@ typedef struct {
>  #define RCC_CFGR_PPRE1_BY_16 BSP_FLD32( 7, 10, 12 )
>
>  #define RCC_CFGR_PPRE2 13
> -#define RCC_CFGR_PPRE2 BSP_MSK32( 13, 15 )
> +#define RCC_CFGR_PPRE2_MSK BSP_MSK32( 13, 15 )
>  #define RCC_CFGR_PPRE2_BY_1 0
>  #define RCC_CFGR_PPRE2_BY_2 BSP_FLD32( 4, 13, 15 )
>  #define RCC_CFGR_PPRE2_BY_4 BSP_FLD32( 5, 13, 15 )
> --
> 2.31.1
>
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[PATCH 1/2] bsp/stm32f4xxxx_rcc.h: Fix RCC register defines

2022-10-19 Thread Matthew Joyce 
From: Matt Joyce 

Fix a double define of RCC_CFGR_PPRE2 and add RCC_CFGR_PPRE1_MSK.
---
 bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h 
b/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
index 7dadfbe756..dc4a7f0edd 100644
--- a/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
+++ b/bsps/arm/stm32f4/include/bsp/stm32f4_rcc.h
@@ -231,6 +231,7 @@ typedef struct {
 #define RCC_CFGR_HPRE_BY_512 BSP_FLD32( 15, 4, 7 )
 
 #define RCC_CFGR_PPRE1 10
+#define RCC_CFGR_PPRE1_MSK BSP_MSK32( 10, 12 )
 #define RCC_CFGR_PPRE1_BY_1 0
 #define RCC_CFGR_PPRE1_BY_2 BSP_FLD32( 4, 10, 12 )
 #define RCC_CFGR_PPRE1_BY_4 BSP_FLD32( 5, 10, 12 )
@@ -238,7 +239,7 @@ typedef struct {
 #define RCC_CFGR_PPRE1_BY_16 BSP_FLD32( 7, 10, 12 )
 
 #define RCC_CFGR_PPRE2 13
-#define RCC_CFGR_PPRE2 BSP_MSK32( 13, 15 )
+#define RCC_CFGR_PPRE2_MSK BSP_MSK32( 13, 15 )
 #define RCC_CFGR_PPRE2_BY_1 0
 #define RCC_CFGR_PPRE2_BY_2 BSP_FLD32( 4, 13, 15 )
 #define RCC_CFGR_PPRE2_BY_4 BSP_FLD32( 5, 13, 15 )
-- 
2.31.1

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