Re: [PATCH 1/2] spec/build/riscv: Default all BSPs to medany cmodel
On 21.12.22 12:21, Hesham Almatary wrote: Would it still be fine to default all RV64 BSPs to medany (and remove medlow) so that we start all of RISC-V BSPs at 0x8000? If so I'll submit modified patches and edit the ticket accordingly. Yes, this makes sense. It seems that the medlow model has limited use for RV64. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/2] spec/build/riscv: Default all BSPs to medany cmodel
On Mon, 19 Dec 2022 at 16:29, Sebastian Huber wrote: > > Hello Hesham, > > On 18/12/2022 15:27, heshamelmat...@gmail.com wrote: > > From: Hesham Almatary > > > > Currently generic RISC-V BSPs (riscv/riscv) that start with rv* and not > > rv*_medany will start at 0x7000. This adds high maintenance overhead > > and deviates from almost all other RISC-V-based OSes and baremetal programs > > that start at 0x8000. Further, testing now has to account for an extra > > parameter (medany or not) that doubles the number of BSPs need to be > > tested. > > > > This commit defaults all BSPs to use medany code model to allow starting > > all BSPs at 0x8000. BSPs that require different code models and/or > > start addresses are custom and need to add their own entries. > > > > Updates #4775 > > why do we need the medany variants for RV32? I thought medlow can access > addresses in the range -2GiB to +2GiB which is the complete 32-bit > address space? > You're right, I confused RV32 with RV64. Would it still be fine to default all RV64 BSPs to medany (and remove medlow) so that we start all of RISC-V BSPs at 0x8000? If so I'll submit modified patches and edit the ticket accordingly. > -- > embedded brains GmbH > Herr Sebastian HUBER > Dornierstr. 4 > 82178 Puchheim > Germany > email: sebastian.hu...@embedded-brains.de > phone: +49-89-18 94 741 - 16 > fax: +49-89-18 94 741 - 08 > > Registergericht: Amtsgericht München > Registernummer: HRB 157899 > Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler > Unsere Datenschutzerklärung finden Sie hier: > https://embedded-brains.de/datenschutzerklaerung/ -- Hesham ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/2] spec/build/riscv: Default all BSPs to medany cmodel
Hello Hesham, On 18/12/2022 15:27, heshamelmat...@gmail.com wrote: From: Hesham Almatary Currently generic RISC-V BSPs (riscv/riscv) that start with rv* and not rv*_medany will start at 0x7000. This adds high maintenance overhead and deviates from almost all other RISC-V-based OSes and baremetal programs that start at 0x8000. Further, testing now has to account for an extra parameter (medany or not) that doubles the number of BSPs need to be tested. This commit defaults all BSPs to use medany code model to allow starting all BSPs at 0x8000. BSPs that require different code models and/or start addresses are custom and need to add their own entries. Updates #4775 why do we need the medany variants for RV32? I thought medlow can access addresses in the range -2GiB to +2GiB which is the complete 32-bit address space? -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 1/2] spec/build/riscv: Default all BSPs to medany cmodel
From: Hesham Almatary Currently generic RISC-V BSPs (riscv/riscv) that start with rv* and not rv*_medany will start at 0x7000. This adds high maintenance overhead and deviates from almost all other RISC-V-based OSes and baremetal programs that start at 0x8000. Further, testing now has to account for an extra parameter (medany or not) that doubles the number of BSPs need to be tested. This commit defaults all BSPs to use medany code model to allow starting all BSPs at 0x8000. BSPs that require different code models and/or start addresses are custom and need to add their own entries. Updates #4775 --- spec/build/bsps/riscv/riscv/abi.yml | 19 --- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/spec/build/bsps/riscv/riscv/abi.yml b/spec/build/bsps/riscv/riscv/abi.yml index 3ef8b0681d..f4eb6cc6d2 100644 --- a/spec/build/bsps/riscv/riscv/abi.yml +++ b/spec/build/bsps/riscv/riscv/abi.yml @@ -9,6 +9,7 @@ copyrights: default: - -march=rv32imac - -mabi=ilp32 +- -mcmodel=medany default-by-variant: - value: - -march=rv64imafdc @@ -21,21 +22,17 @@ default-by-variant: - -mabi=lp64d - -mcmodel=medany variants: - - riscv/rv64imafdc_medany -- value: - - -march=rv64imafdc - - -mabi=lp64d - variants: - riscv/rv64imafdc - value: - -march=rv64imafd - -mabi=lp64d - -mcmodel=medany variants: - - riscv/rv64imafd_medany + - riscv/rv64imafd - value: - -march=rv64imafd - -mabi=lp64d + - -mcmodel=medany variants: - riscv/rv64imafd - value: @@ -43,11 +40,6 @@ default-by-variant: - -mabi=lp64 - -mcmodel=medany variants: - - riscv/rv64imac_medany -- value: - - -march=rv64imac - - -mabi=lp64 - variants: - riscv/rv64imac - value: [] variants: @@ -55,26 +47,31 @@ default-by-variant: - value: - -march=rv32imafd - -mabi=ilp32d + - -mcmodel=medany variants: - riscv/rv32imafd - value: - -march=rv32imafc - -mabi=ilp32f + - -mcmodel=medany variants: - riscv/rv32imafc - value: - -march=rv32im - -mabi=ilp32 + - -mcmodel=medany variants: - riscv/rv32im - value: - -march=rv32iac - -mabi=ilp32 + - -mcmodel=medany variants: - riscv/rv32iac - value: - -march=rv32i - -mabi=ilp32 + - -mcmodel=medany variants: - riscv/rv32i description: | -- 2.25.1 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
