Re: [PATCH 1/3] bsps/stm32h7: import MT25TL01G QSPI memory low-level driver
On 1/30/23 16:13, Gedare Bloom wrote: On Fri, Jan 27, 2023 at 11:41 AM Karel Gardas wrote: Sponsored-By: Precidata --- No issue with the patch, but I think it is awkward to have this "Sponsored-By" in an import patch. Was also thinking about that. Whole work was sponsored including import of this code, but code obviously was not. I'll remove that remark indeed. Thanks! Karel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 1/3] bsps/stm32h7: import MT25TL01G QSPI memory low-level driver
On Fri, Jan 27, 2023 at 11:41 AM Karel Gardas wrote:
>
> Sponsored-By: Precidata
> ---
No issue with the patch, but I think it is awkward to have this
"Sponsored-By" in an import patch.
> .../stm/Components/mt25tl01g/mt25tl01g.c | 1046 +
> .../stm/Components/mt25tl01g/mt25tl01g.h | 362 ++
> .../stm/Components/mt25tl01g/mt25tl01g_conf.h | 68 ++
> 3 files changed, 1476 insertions(+)
> create mode 100644
> bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
> create mode 100644
> bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.h
> create mode 100644
> bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g_conf.h
>
> diff --git a/bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
> b/bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
> new file mode 100644
> index 00..740cdbbd27
> --- /dev/null
> +++ b/bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
> @@ -0,0 +1,1046 @@
> +/* SPDX-License-Identifier: BSD-3-Clause */
> +/**
> +
> **
> + * @fileMT25TL01G.c
> + * @author MCD Application Team
> + * @brief This file provides the MT25TL01G QSPI driver.
> +
> **
> + * @attention
> + *
> + * Copyright (c) 2016 STMicroelectronics.
> + * All rights reserved.
> + *
> + * This software component is licensed by ST under BSD 3-Clause license,
> + * the "License"; You may not use this file except in compliance with the
> + * License. You may obtain a copy of the License at:
> + *opensource.org/licenses/BSD-3-Clause
> + *
> +
> **
> + */
> +/* Includes
> --*/
> +#include "mt25tl01g.h"
> +/** @addtogroup BSP
> + * @{
> + */
> +
> +/** @addtogroup Components
> + * @{
> + */
> +
> +/** @addtogroup MT25TL01G
> + * @brief This file provides a set of functions needed to drive the
> + * MT25TL01G QSPI memory.
> + * @{
> + */
> +/** @defgroup MT25TL01G_Exported_Functions MT25TL01G Exported Functions
> + * @{
> + */
> +
> +/**
> + * @brief Return the configuration of the QSPI memory.
> + * @param pInfo pointer on the configuration structure
> + * @retval QSPI memory status
> + */
> +int32_t MT25TL01G_GetFlashInfo(MT25TL01G_Info_t *pInfo)
> +{
> + pInfo->FlashSize = MT25TL01G_FLASH_SIZE;
> + pInfo->EraseSectorSize= (2 * MT25TL01G_SUBSECTOR_SIZE);
> + pInfo->ProgPageSize = MT25TL01G_PAGE_SIZE;
> + pInfo->EraseSectorsNumber = (MT25TL01G_FLASH_SIZE/pInfo->EraseSectorSize);
> + pInfo->ProgPagesNumber= (MT25TL01G_FLASH_SIZE/pInfo->ProgPageSize);
> + return MT25TL01G_OK;
> +}
> +
> +/**
> + * @brief This function set the QSPI memory in 4-byte address mode
> + * SPI/QPI; 1-0-1/4-0-4
> + * @param Ctx Component object pointer
> + * @param Mode Interface mode
> + * @retval QSPI memory status
> + */
> +int32_t MT25TL01G_Enter4BytesAddressMode(QSPI_HandleTypeDef *Ctx,
> MT25TL01G_Interface_t Mode)
> +{
> + QSPI_CommandTypeDef s_command;
> +
> + /* Initialize the command */
> + s_command.InstructionMode = (Mode == MT25TL01G_QPI_MODE) ?
> QSPI_INSTRUCTION_4_LINES : QSPI_INSTRUCTION_1_LINE;
> + s_command.Instruction = MT25TL01G_ENTER_4_BYTE_ADDR_MODE_CMD;
> + s_command.AddressMode = QSPI_ADDRESS_NONE;
> + s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
> + s_command.DataMode = QSPI_DATA_NONE;
> + s_command.DummyCycles = 0;
> + s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
> + s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
> + s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
> +
> + /*write enable */
> + if( MT25TL01G_WriteEnable(Ctx,Mode)!=MT25TL01G_OK)
> + {
> +return MT25TL01G_ERROR_COMMAND;
> + }
> + /* Send the command */
> + if (HAL_QSPI_Command(Ctx, _command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) !=
> HAL_OK)
> + {
> +return MT25TL01G_ERROR_COMMAND;
> + }
> +
> + /* Configure automatic polling mode to wait the memory is ready */
> + else if(MT25TL01G_AutoPollingMemReady(Ctx,Mode)!=MT25TL01G_OK)
> + {
> +return MT25TL01G_ERROR_COMMAND;
> + }
> +
> + return MT25TL01G_OK;
> +}
> +
> +/**
> + * @brief Flash exit 4 Byte address mode. Effect 3/4 address byte commands
> only.
> + * SPI/QPI; 1-0-0/4-0-0
> + * @param Ctx Component object pointer
> + * @param Mode Interface mode
> + * @retval QSPI memory status
> + */
> +int32_t MT25TL01G_Exit4BytesAddressMode(QSPI_HandleTypeDef *Ctx,
> MT25TL01G_Interface_t Mode)
> +{
> + QSPI_CommandTypeDef s_command;
> +
> + /* Initialize the command */
> + s_command.InstructionMode = (Mode == MT25TL01G_QPI_MODE) ?
> QSPI_INSTRUCTION_4_LINES : QSPI_INSTRUCTION_1_LINE;
> +
[PATCH 1/3] bsps/stm32h7: import MT25TL01G QSPI memory low-level driver
Sponsored-By: Precidata
---
.../stm/Components/mt25tl01g/mt25tl01g.c | 1046 +
.../stm/Components/mt25tl01g/mt25tl01g.h | 362 ++
.../stm/Components/mt25tl01g/mt25tl01g_conf.h | 68 ++
3 files changed, 1476 insertions(+)
create mode 100644 bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
create mode 100644 bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.h
create mode 100644
bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g_conf.h
diff --git a/bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
b/bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
new file mode 100644
index 00..740cdbbd27
--- /dev/null
+++ b/bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c
@@ -0,0 +1,1046 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/**
+
**
+ * @fileMT25TL01G.c
+ * @author MCD Application Team
+ * @brief This file provides the MT25TL01G QSPI driver.
+
**
+ * @attention
+ *
+ * Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *opensource.org/licenses/BSD-3-Clause
+ *
+
**
+ */
+/* Includes
--*/
+#include "mt25tl01g.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup MT25TL01G
+ * @brief This file provides a set of functions needed to drive the
+ * MT25TL01G QSPI memory.
+ * @{
+ */
+/** @defgroup MT25TL01G_Exported_Functions MT25TL01G Exported Functions
+ * @{
+ */
+
+/**
+ * @brief Return the configuration of the QSPI memory.
+ * @param pInfo pointer on the configuration structure
+ * @retval QSPI memory status
+ */
+int32_t MT25TL01G_GetFlashInfo(MT25TL01G_Info_t *pInfo)
+{
+ pInfo->FlashSize = MT25TL01G_FLASH_SIZE;
+ pInfo->EraseSectorSize= (2 * MT25TL01G_SUBSECTOR_SIZE);
+ pInfo->ProgPageSize = MT25TL01G_PAGE_SIZE;
+ pInfo->EraseSectorsNumber = (MT25TL01G_FLASH_SIZE/pInfo->EraseSectorSize);
+ pInfo->ProgPagesNumber= (MT25TL01G_FLASH_SIZE/pInfo->ProgPageSize);
+ return MT25TL01G_OK;
+}
+
+/**
+ * @brief This function set the QSPI memory in 4-byte address mode
+ * SPI/QPI; 1-0-1/4-0-4
+ * @param Ctx Component object pointer
+ * @param Mode Interface mode
+ * @retval QSPI memory status
+ */
+int32_t MT25TL01G_Enter4BytesAddressMode(QSPI_HandleTypeDef *Ctx,
MT25TL01G_Interface_t Mode)
+{
+ QSPI_CommandTypeDef s_command;
+
+ /* Initialize the command */
+ s_command.InstructionMode = (Mode == MT25TL01G_QPI_MODE) ?
QSPI_INSTRUCTION_4_LINES : QSPI_INSTRUCTION_1_LINE;
+ s_command.Instruction = MT25TL01G_ENTER_4_BYTE_ADDR_MODE_CMD;
+ s_command.AddressMode = QSPI_ADDRESS_NONE;
+ s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ s_command.DataMode = QSPI_DATA_NONE;
+ s_command.DummyCycles = 0;
+ s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
+ s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /*write enable */
+ if( MT25TL01G_WriteEnable(Ctx,Mode)!=MT25TL01G_OK)
+ {
+return MT25TL01G_ERROR_COMMAND;
+ }
+ /* Send the command */
+ if (HAL_QSPI_Command(Ctx, _command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) !=
HAL_OK)
+ {
+return MT25TL01G_ERROR_COMMAND;
+ }
+
+ /* Configure automatic polling mode to wait the memory is ready */
+ else if(MT25TL01G_AutoPollingMemReady(Ctx,Mode)!=MT25TL01G_OK)
+ {
+return MT25TL01G_ERROR_COMMAND;
+ }
+
+ return MT25TL01G_OK;
+}
+
+/**
+ * @brief Flash exit 4 Byte address mode. Effect 3/4 address byte commands
only.
+ * SPI/QPI; 1-0-0/4-0-0
+ * @param Ctx Component object pointer
+ * @param Mode Interface mode
+ * @retval QSPI memory status
+ */
+int32_t MT25TL01G_Exit4BytesAddressMode(QSPI_HandleTypeDef *Ctx,
MT25TL01G_Interface_t Mode)
+{
+ QSPI_CommandTypeDef s_command;
+
+ /* Initialize the command */
+ s_command.InstructionMode = (Mode == MT25TL01G_QPI_MODE) ?
QSPI_INSTRUCTION_4_LINES : QSPI_INSTRUCTION_1_LINE;
+ s_command.Instruction = MT25TL01G_EXIT_4_BYTE_ADDR_MODE_CMD;
+ s_command.AddressMode = QSPI_ADDRESS_NONE;
+ s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ s_command.DataMode = QSPI_DATA_NONE;
+ s_command.DummyCycles = 0;
+ s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
+ s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ s_command.SIOOMode =
