date:20150927

Re: [PATCH] ARM: dts: mt8135-evbp1: remove regulator-compatible usage

2015-09-27 Thread Matthias Brugger




On 25/09/15 15:46, Javier Martinez Canillas wrote:

The regulator-compatible property from the regulator DT binding was
deprecated and the correct approach is to use the node's name.

This patch has no functional changes since the values of the node's
name and the regulator-compatible match for all the regulators.

Signed-off-by: Javier Martinez Canillas 


Applied, thanks.



---

  arch/arm/boot/dts/mt8135-evbp1.dts | 23 ---
  1 file changed, 23 deletions(-)

diff --git a/arch/arm/boot/dts/mt8135-evbp1.dts 
b/arch/arm/boot/dts/mt8135-evbp1.dts
index 357a91fc2d1d..460db6d05952 100644
--- a/arch/arm/boot/dts/mt8135-evbp1.dts
+++ b/arch/arm/boot/dts/mt8135-evbp1.dts
@@ -32,7 +32,6 @@
compatible = "mediatek,mt6397-regulator";

mt6397_vpca15_reg: buck_vpca15 {
-   regulator-compatible = "buck_vpca15";
regulator-name = "vpca15";
regulator-min-microvolt = < 85>;
regulator-max-microvolt = <135>;
@@ -41,7 +40,6 @@
};

mt6397_vpca7_reg: buck_vpca7 {
-   regulator-compatible = "buck_vpca7";
regulator-name = "vpca7";
regulator-min-microvolt = < 85>;
regulator-max-microvolt = <135>;
@@ -50,7 +48,6 @@
};

mt6397_vsramca15_reg: buck_vsramca15 {
-   regulator-compatible = "buck_vsramca15";
regulator-name = "vsramca15";
regulator-min-microvolt = < 85>;
regulator-max-microvolt = <135>;
@@ -59,7 +56,6 @@
};

mt6397_vsramca7_reg: buck_vsramca7 {
-   regulator-compatible = "buck_vsramca7";
regulator-name = "vsramca7";
regulator-min-microvolt = < 85>;
regulator-max-microvolt = <135>;
@@ -68,7 +64,6 @@
};

mt6397_vcore_reg: buck_vcore {
-   regulator-compatible = "buck_vcore";
regulator-name = "vcore";
regulator-min-microvolt = < 85>;
regulator-max-microvolt = <135>;
@@ -77,7 +72,6 @@
};

mt6397_vgpu_reg: buck_vgpu {
-   regulator-compatible = "buck_vgpu";
regulator-name = "vgpu";
regulator-min-microvolt = < 70>;
regulator-max-microvolt = <135>;
@@ -86,7 +80,6 @@
};

mt6397_vdrm_reg: buck_vdrm {
-   regulator-compatible = "buck_vdrm";
regulator-name = "vdrm";
regulator-min-microvolt = <120>;
regulator-max-microvolt = <140>;
@@ -95,7 +88,6 @@
};

mt6397_vio18_reg: buck_vio18 {
-   regulator-compatible = "buck_vio18";
regulator-name = "vio18";
regulator-min-microvolt = <162>;
regulator-max-microvolt = <198>;
@@ -104,19 +96,16 @@
};

mt6397_vtcxo_reg: ldo_vtcxo {
-   regulator-compatible = "ldo_vtcxo";
regulator-name = "vtcxo";
regulator-always-on;
};

mt6397_va28_reg: ldo_va28 {
-   regulator-compatible = "ldo_va28";
regulator-name = "va28";
regulator-always-on;
};

mt6397_vcama_reg: ldo_vcama {
-   regulator-compatible = "ldo_vcama";
regulator-name = "vcama";
regulator-min-microvolt = <150>;
regulator-max-microvolt = <280>;
@@ -124,18 +113,15 @@
};

mt6397_vio28_reg: ldo_vio28 {
-   regulator-compatible = "ldo_vio28";
regulator-name = "vio28";
regulator-always-on;
};

mt6397_vusb_reg: ldo_vusb {
-

Re: [PATCH] arm64: dts: mediatek: mt8173 PSCI-1.0 support

2015-09-27 Thread Matthias Brugger




On 28/08/15 04:11, fan.c...@mediatek.com wrote:

From: Fan Chen 

This patch adds psci comatible properties to support all mandatory
functions of PSCI-1.0, PSCI-0.2 and PSCI-0.1, and system suspend
can be supported in PSCI-1.0.

Signed-off-by: Fan Chen 
---
Because PSCI-1.0 patches hadn't landed on mainline, this patch is
based on three patch sets below:
[0] http://www.spinics.net/lists/arm-kernel/msg425793.html
 PSCI: system suspend support
[1] git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git
 psci/unification
[2] http://www.spinics.net/lists/devicetree/msg82017.html
 [PATCH 0/6] drivers: firmware: psci: add basic v1.0 support

Before they are merged in, this patch still works fine with psci-0.2
support in current mainline.
---
  arch/arm64/boot/dts/mediatek/mt8173.dtsi |2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..b9b4205 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -95,7 +95,7 @@
};

psci {
-   compatible = "arm,psci";
+   compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";


As this binding is not yet upstream, I prefer not to take the patch. 
Most probably the binding will have the name you indicated, but as DTS 
bindings are representing an external API, we should be really careful 
in changing them.


Cheers,
Matthias


method = "smc";
cpu_suspend   = <0x8401>;
cpu_off   = <0x8402>;


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Re: [PATCH v2 1/3] gpio: Use __gpiod_request directly

2015-09-27 Thread Markus Pargmann

Hi,

On Thu, Sep 24, 2015 at 10:49:57AM -0700, Linus Walleij wrote:
> On Tue, Sep 22, 2015 at 9:25 PM, Alexandre Courbot  wrote:
> > On Sun, Aug 30, 2015 at 4:44 PM, Markus Pargmann  
> > wrote:
> >> There is no reason to find out chip and hwnum to use to request a gpio
> >> and get another gpio descriptor. We already have the descriptor we want
> >> to use so we can directly use it.
> >>
> >> Signed-off-by: Markus Pargmann 
> >> ---
> >>  drivers/gpio/gpiolib.c | 17 ++---
> >>  1 file changed, 6 insertions(+), 11 deletions(-)
> >>
> >> diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
> >> index 79a0b41ce57b..872fdd3617c1 100644
> >> --- a/drivers/gpio/gpiolib.c
> >> +++ b/drivers/gpio/gpiolib.c
> >> @@ -2189,25 +2189,20 @@ EXPORT_SYMBOL_GPL(__gpiod_get_index_optional);
> >>  int gpiod_hog(struct gpio_desc *desc, const char *name,
> >>   unsigned long lflags, enum gpiod_flags dflags)
> >>  {
> >> -   struct gpio_chip *chip;
> >> -   struct gpio_desc *local_desc;
> >> -   int hwnum;
> >> int status;
> >>
> >> -   chip = gpiod_to_chip(desc);
> >> -   hwnum = gpio_chip_hwgpio(desc);
> >> -
> >> -   local_desc = gpiochip_request_own_desc(chip, hwnum, name);
> >> -   if (IS_ERR(local_desc)) {
> >> +   status = __gpiod_request(desc, name);
> >> +   if (status) {
> >> pr_err("requesting hog GPIO %s (chip %s, offset %d) 
> >> failed\n",
> >> -  name, chip->label, hwnum);
> >> -   return PTR_ERR(local_desc);
> >> +  name, gpiod_to_chip(desc)->label,
> >> +  gpio_chip_hwgpio(desc));
> >> +   return status;
> >> }
> >>
> >> status = gpiod_configure_flags(desc, name, lflags, dflags);
> >> if (status < 0) {
> >> pr_err("setup of hog GPIO %s (chip %s, offset %d) 
> >> failed\n",
> >> -  name, chip->label, hwnum);
> >> +  name, gpiod_to_chip(desc)->label, 
> >> gpio_chip_hwgpio(desc));
> >> gpiochip_free_own_desc(desc);
> >
> > Mmm I should have reviewed this patch earlier, but what bothers me a
> > bit is that it breaks the symetry that we had by calling
> > request_own_desc() and free_own_desc() in the failing case (as well as
> > in gpiochip_free_hogs). And in the end you still need to call
> > gpiod_to_chip() so I am not sure what the benefit is.
> >
> > Sure, the code is less verbose, but at the same time it has become
> > slightly harder to understand. Semantically speaking
> > "request_own_desc()" is exactly the action we want to convey.
> > __gpiod_request() is more ambiguous.
> >
> > Note that this is not a reject, I just wanted to stress that "less
> > code" is not necessarily the same as "easier to read".
> 
> OK I dropped this patch for now.
> 
> Markus can you live without this patch for 2/3 and 3/3?

Yes, that's fine. I will remove it and rebase the others.

Best Regards,

Markus

> 
> Yours,
> Linus Walleij
> 

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Re: [PATCH] arm64: mt8173.dtsi: correct i2c node names

2015-09-27 Thread Matthias Brugger




On 16/09/15 15:34, Daniel Kurtz wrote:

On Wed, Sep 16, 2015 at 9:35 AM, Yingjoe Chen  wrote:

Node name in device tree should describe general class of the
device. Correct incorrect i2c node names.

Signed-off-by: Yingjoe Chen 


Reviewed-by: Daniel Kurtz 



Applied, thanks.


---
This is based on v4.3-rc1.
All the other i2c node names are correct.
---
  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..7f360b7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,7 +365,7 @@
 status = "disabled";
 };

-   i2c3: i2c3@1101 {
+   i2c3: i2c@1101 {
 compatible = "mediatek,mt8173-i2c";
 reg = <0 0x1101 0 0x70>,
   <0 0x11000280 0 0x80>;
@@ -381,7 +381,7 @@
 status = "disabled";
 };

-   i2c4: i2c4@11011000 {
+   i2c4: i2c@11011000 {
 compatible = "mediatek,mt8173-i2c";
 reg = <0 0x11011000 0 0x70>,
   <0 0x11000300 0 0x80>;
@@ -397,7 +397,7 @@
 status = "disabled";
 };

-   i2c6: i2c6@11013000 {
+   i2c6: i2c@11013000 {
 compatible = "mediatek,mt8173-i2c";
 reg = <0 0x11013000 0 0x70>,
   <0 0x1180 0 0x80>;
--
1.9.1


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Re: [PATCH v2 2/3] gpiolib: gpiod_hog remove separate name argument

2015-09-27 Thread Markus Pargmann

On Thu, Sep 24, 2015 at 10:52:55AM -0700, Linus Walleij wrote:
> On Wed, Sep 23, 2015 at 11:39 PM, Markus Pargmann  wrote:
> 
> >> - Fixed that but noted that it just alters the call to gpiod_hog()
> >>   in of_gpiochip_scan_hogs(), there is a local const char *name that
> >>   should be removed too.
> >
> > The local const char *name is temporarily used in
> > of_gpiochip_scan_hogs() to get the name from DT and assign it to the
> > descriptor:
> > desc = of_parse_own_gpio(np, , , );
> > ...
> > else
> > desc->name = name;
> 
> OK the problem is that this series is dependent on the
> named GPIOs series. I want this series to stand alone,
> because this series is not as controversial, and I want to
> merge these initvals first.

OK, I think I won't get this completely independent but it shouldn't be
a problem to get this before the controversial patches. Will do that.

Best Regards,

Markus

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Re: [PATCH 1/3] iio:adc: add iio driver for Palmas (twl6035/7) gpadc

2015-09-27 Thread Jonathan Cameron

On 23/09/15 13:48, H. Nikolaus Schaller wrote:
> This driver code was found as:
> 
> https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/staging/iio/adc
> 
> Fixed various compilation issues and test this driver on omap5 evm.
> 
> Signed-off-by: Pradeep Goudagunta 
> Signed-off-by: H. Nikolaus Schaller 
> Signed-off-by: Marek Belisko 
Various bits inline.

Jonathan
> ---
> drivers/iio/adc/Kconfig|   9 +
> drivers/iio/adc/Makefile   |   1 +
> drivers/iio/adc/palmas_gpadc.c | 797 +
> include/linux/mfd/palmas.h |  59 ++-
> 4 files changed, 862 insertions(+), 4 deletions(-)
> create mode 100644 drivers/iio/adc/palmas_gpadc.c
> 
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index eb0cd89..f6df9db 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -242,6 +242,15 @@ config NAU7802
> To compile this driver as a module, choose M here: the
> module will be called nau7802.
> 
> +config PALMAS_GPADC
> + tristate "TI Palmas General Purpose ADC"
> + depends on MFD_PALMAS
> + help
> +   Palmas series pmic chip by texas Instruments (twl6035/6037)
> +   is used in smartphones and tablets and supports a 16 channel
> +   general purpose ADC. Add iio driver to read different channel
> +   of the GPADCs.
> +
> config QCOM_SPMI_IADC
>   tristate "Qualcomm SPMI PMIC current ADC"
>   depends on SPMI
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index a096210..716f112 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -26,6 +26,7 @@ obj-$(CONFIG_MCP320X) += mcp320x.o
> obj-$(CONFIG_MCP3422) += mcp3422.o
> obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
> obj-$(CONFIG_NAU7802) += nau7802.o
> +obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o
> obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
> obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
> obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
> diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c
> new file mode 100644
> index 000..17abb28
> --- /dev/null
> +++ b/drivers/iio/adc/palmas_gpadc.c
> @@ -0,0 +1,797 @@
> +/*
> + * palmas-adc.c -- TI PALMAS GPADC.
> + *
> + * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
> + *
> + * Author: Pradeep Goudagunta 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation version 2.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define MOD_NAME "palmas-gpadc"
> +#define ADC_CONVERSION_TIMEOUT   (msecs_to_jiffies(5000))
> +#define TO_BE_CALCULATED 0
> +
> +struct palmas_gpadc_info {
> +/* calibration codes and regs */
Full docs on this would be appreciated.
> + int x1;
> + int x2;
> + int v1;
> + int v2;
> + u8 trim1_reg;
> + u8 trim2_reg;
> + int gain;
> + int offset;
> + int gain_error;
> + bool is_correct_code;
> +};
> +
> +#define PALMAS_ADC_INFO(_chan, _x1, _x2, _v1, _v2, _t1, _t2, 
> _is_correct_code)\
> +[PALMAS_ADC_CH_##_chan] = {  \
> + .x1 = _x1,  \
> + .x2 = _x2,  \
> + .v1 = _v1,  \
> + .v2 = _v2,  \
> + .gain = TO_BE_CALCULATED,   \
> + .offset = TO_BE_CALCULATED, \
> + .gain_error = TO_BE_CALCULATED, \
> + .trim1_reg = PALMAS_GPADC_TRIM##_t1,\
> + .trim2_reg = PALMAS_GPADC_TRIM##_t2,\
> + .is_correct_code = _is_correct_code \
> + }
> +
> +static struct palmas_gpadc_info palmas_gpadc_info[] = {
> + PALMAS_ADC_INFO(IN0, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN1, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN2, 2064, 3112, 1260, 1900, 3, 4, false),
> + PALMAS_ADC_INFO(IN3, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN4, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN5, 2064, 3112, 630, 950, 1, 2, false),
> + PALMAS_ADC_INFO(IN6, 2064, 3112, 2520, 3800, 5, 6, false),
> + PALMAS_ADC_INFO(IN7, 2064, 3112, 2520, 3800, 7, 8, false),
> + PALMAS_ADC_INFO(IN8, 2064, 3112, 3150, 4750, 9, 10, false),
> + PALMAS_ADC_INFO(IN9, 2064, 3112, 5670, 8550, 11, 12, false),
> +

Re: [PATCH 1/2] arm64: mediatek: enable MTK_TIMER

2015-09-27 Thread Matthias Brugger




On 16/09/15 04:21, Yingjoe Chen wrote:

On Wed, 2015-09-16 at 10:04 +0800, Yingjoe Chen wrote:

Enable MTK_TIMER for MediaTek plaform, which will be used as
schedule clock.


Sorry, sending this series too early without cover letter and removing
Change-Id. Here's the cover letter:


This is actually v3 of "add GPT timer support for mt8173" series. This
is based on v4.3-rc1 + clockevents-4.4[1] and James's mediatek-clk
tree[2].

Changes compare to previous version[3]:
- the first two mtk_timer related changes are removed because they are
replaced/accepted in clockevents tree.
- Remove 'add 13mhz clock for MT8173' because it is accepted in
mediatek-clk tree.
- Kconfig.platforms path change.

So we only have 2 patches left here.
Matthias, can you take these and help to remove the Change-Id?


Yes I can take this two patches, but I don't see the mediatek-clk tree 
accepted by the maintainers yet. As far as I can see, without the 13 MHz 
clock [1], the sched clock won't work.


[1] 
https://github.com/jamesjjliao/linux/commit/add5e89d657fa6c0e5a517890f996c796b768064





Daniel Kurtz (1):
   arm64: dts: mt8173: add timer node

Yingjoe Chen (1):
   arm64: mediatek: enable MTK_TIMER



[1]
https://git.linaro.org/people/daniel.lezcano/linux.git clockevents/4.4
[2]
http://lists.infradead.org/pipermail/linux-mediatek/2015-August/002069.html
[3]
http://lists.infradead.org/pipermail/linux-mediatek/2015-July/001544.html





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Re: [PATCHv2 1/2] iio: adc: Add TI ADS868X

2015-09-27 Thread Jonathan Cameron

On 27/09/15 15:38, Jonathan Cameron wrote:
> On 25/09/15 07:29, Sean Nyekjaer wrote:
>> This patch adds support for the Texas Intruments ADS868x ADC.
>>
>> Signed-off-by: Sean Nyekjaer 
>> Reviewed-by: Martin Hundebøll 
> Hi
> 
> The driver is fundamentally good, but I think a few small changes would make
> it less complex to read which is always a good thing!
> 
> Comments inline.
> 
> Jonathan
I forgot to mention the general preference (we aren't as strict
as we should be on this) to not have wild cards in the name. TI might
be good and never release a new part that matches your string but not
the interface, but I think that is overly optimistic!

Hence, pick a part from your initially supported list and name it after
that (including all prefixes etc).

If you want an example of the sort of silliness that can occur with part
numbering take a look at the max1363 driver and imagine we'd slowly
generalized the naming of that using wildcards as new parts were added!

I suspect we'd now have maxx :)

Jonathan
>> ---
>> Changes since v1:
>> - Now possible to read and write the actual offset and scale values
>> - Removed unused includes
>> - Removed unused buffer references
>>
>>  drivers/iio/adc/Kconfig  |  10 +
>>  drivers/iio/adc/Makefile |   1 +
>>  drivers/iio/adc/ti-ads868x.c | 456 
>> +++
>>  3 files changed, 467 insertions(+)
>>  create mode 100644 drivers/iio/adc/ti-ads868x.c
>>
>> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
>> index deea62c..39924d5 100644
>> --- a/drivers/iio/adc/Kconfig
>> +++ b/drivers/iio/adc/Kconfig
>> @@ -322,6 +322,16 @@ config TI_ADC128S052
>>This driver can also be built as a module. If so, the module will be
>>called ti-adc128s052.
>>  
>> +config TI_ADS868X
>> +tristate "Texas Instruments ADS8684/8"
>> +depends on SPI && OF
>> +help
>> +  If you say yes here you get support for Texas Instruments ADS8684 and
>> +  and ADS8688 ADC chips
>> +
>> +  This driver can also be built as a module. If so, the module will be
>> +  called ti-ads868x.
>> +
>>  config TI_AM335X_ADC
>>  tristate "TI's AM335X ADC driver"
>>  depends on MFD_TI_AM335X_TSCADC
>> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
>> index fa5723a..75170d2 100644
>> --- a/drivers/iio/adc/Makefile
>> +++ b/drivers/iio/adc/Makefile
>> @@ -31,6 +31,7 @@ obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
>>  obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
>>  obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
>>  obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
>> +obj-$(CONFIG_TI_ADS868X) += ti-ads868x.o
>>  obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
>>  obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
>>  obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
>> diff --git a/drivers/iio/adc/ti-ads868x.c b/drivers/iio/adc/ti-ads868x.c
>> new file mode 100644
>> index 000..66d9b64
>> --- /dev/null
>> +++ b/drivers/iio/adc/ti-ads868x.c
>> @@ -0,0 +1,456 @@
>> +/*
>> + * Copyright (C) 2015 Prevas A/S
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include 
>> +#include 
>> +
>> +#define ADS868X_CMD_REG(x)  (x << 8)
>> +#define ADS868X_CMD_REG_NOOP0x00
>> +#define ADS868X_CMD_REG_RST 0x85
>> +#define ADS868X_CMD_REG_MAN_CH(chan)(0xC0 | (4 * chan))
>> +#define ADS868X_CMD_DONT_CARE_BITS  16
>> +
>> +#define ADS868X_PROG_REG(x) (x << 9)
>> +#define ADS868X_PROG_REG_RANGE_CH(chan) (0x05 + chan)
>> +#define ADS868X_PROG_WR_BIT BIT(8)
>> +#define ADS868X_PROG_DONT_CARE_BITS 8
>> +
>> +#define ADS868X_VREF_MV 4096
>> +#define ADS868X_REALBITS16
>> +
>> +struct ads868x_chip_info {
>> +unsigned int id;
>> +const struct iio_chan_spec *channels;
>> +unsigned int num_channels;
>> +unsigned int flags;
> flags isn't used that I can see.
>> +const struct iio_info *iio_info;
> Why bother? Right now you only have one iio_info structure for both
> supported parts.  Just use it directly and drop it form this structure.
>> +};
>> +
>> +struct ads868x_state {
>> +const struct ads868x_chip_info  *chip_info;
>> +struct spi_device   *spi;
>> +struct regulator*reg;
>> +unsigned intvref_mv;
> prefer u8 type to a char as it clearly isn't actually a character.
> 
> See below for more detail, but I'd suggest having a contiguous enum to
> reference into the below ranges structure then store that in your
> device instance specific structure rather than these values.
> It avoids a fair bit of searching!

Re: [PATCH v7 09/15] power: bq24257: Add SW-based approach for Power Good determination

2015-09-27 Thread Sebastian Reichel

Hi,

On Fri, Sep 25, 2015 at 10:54:14AM -0500, Andreas Dannenberg wrote:
> @@ -651,15 +670,18 @@ static int bq24257_power_supply_init(struct 
> bq24257_device *bq)
>   return PTR_ERR_OR_ZERO(bq->charger);
>  }
>  
> -static int bq24257_pg_gpio_probe(struct bq24257_device *bq)
> +static void bq24257_pg_gpio_probe(struct bq24257_device *bq)
>  {
> - bq->pg = devm_gpiod_get_index(bq->dev, BQ24257_PG_GPIO, 0, GPIOD_IN);
> + bq->pg = devm_gpiod_get_optional(bq->dev, BQ24257_PG_GPIO, GPIOD_IN);
> +
>   if (IS_ERR(bq->pg)) {
> - dev_err(bq->dev, "could not probe PG pin\n");
> - return PTR_ERR(bq->pg);
> + dev_err(bq->dev, "error probing PG pin\n");
> + bq->pg = NULL;
> + return;
>   }

You should handle -EPROBE_DEFER here.

-- Sebastian


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Description: PGP signature

Re: [STLinux Kernel] [PATCH 0/3] ARM: dts: Various STi DT clean-ups

2015-09-27 Thread Peter Griffin

Hi Maxime,

On Wed, 23 Sep 2015, Maxime Coquelin wrote:

> This series cleans the STi407 family DTs, by factorizing common nodes between
> STiH407 and STiH410, and also by only enabling PWM and USB nodes at board
> level, as they could not be exposed on some boards.

For the series: -

Acked-by: Peter Griffin 

regards,

Peter.
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Re: [RESEND PATCH 0/2] ST PLL fixes for 4.3-rc2

2015-09-27 Thread Peter Griffin

Hi Gabriel,

On Wed, 16 Sep 2015, Gabriel Fernandez wrote:

> This patch set fixes a kernel crash :

For the series: -

Acked-by: Peter Griffin 

regards,

Peter
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Re: [PATCH 0/3] mailbox: rockchip: Add mailbox driver for Rockchip platform

2015-09-27 Thread Caesar Wang


Hello Jassi,

Friendly Ping!

Could you review this series patchs if you have free time?


在 2015年09月14日 19:06, Caesar Wang 写道:

Mailbox is used by the Rockchip CPU cores to communicate
requests to MCU processorm.

This driver is found on RK3368 SoCs.

The Mailbox module is a simple APB peripheral that allows both
the Cortex-A53 MCU system to communicate by writing operation to
generate interrupt.
The registers are accessible by both CPU via APB interface.

Tested on RK3368 SDK board.



Caesar Wang (3):
   dt-bindings: Add document of Rockchip mailbox
   mailbox: rockchip: Add Rockchip mailbox driver
   ARM64: dts: rk3368: Add mailbox device nodes

  .../bindings/mailbox/rockchip-mailbox.txt  |  33 +++
  arch/arm64/boot/dts/rockchip/rk3368.dtsi   |  13 +
  drivers/mailbox/Kconfig|   9 +
  drivers/mailbox/Makefile   |   2 +
  drivers/mailbox/rockchip-mailbox.c | 317 +
  5 files changed, 374 insertions(+)
  create mode 100644 
Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
  create mode 100644 drivers/mailbox/rockchip-mailbox.c



--
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Caesar

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Re: [PATCH v3 5/5] gpio: tps65912: Add GPIO driver for the TPS65912 PMIC

2015-09-27 Thread Alexandre Courbot

On Thu, Sep 24, 2015 at 11:52 PM, Andrew F. Davis  wrote:
> This patch adds support for the TPS65912 PMIC GPIOs.
>
> TPS65912 has five configurable GPIOs that can be used for several
> purposes.
>
> Signed-off-by: Andrew F. Davis 
> ---
>  drivers/gpio/Kconfig |   6 ++
>  drivers/gpio/Makefile|   1 +
>  drivers/gpio/gpio-tps65912.c | 138 
> +++
>  3 files changed, 145 insertions(+)
>  create mode 100644 drivers/gpio/gpio-tps65912.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index fb28483..82218fa 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -838,6 +838,12 @@ config GPIO_TPS65910
>   Select this option to enable GPIO driver for the TPS65910
>   chip family.
>
> +config GPIO_TPS65912
> +   tristate "TI TPS65912 GPIO"
> +   depends on MFD_TPS65912
> +   help
> + This driver supports TPS65912 gpio chip
> +
>  config GPIO_TWL4030
> tristate "TWL4030, TWL5030, and TPS659x0 GPIOs"
> depends on TWL4030_CORE
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 605bf89..f79a7c4 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -96,6 +96,7 @@ obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o
>  obj-$(CONFIG_GPIO_PALMAS)  += gpio-palmas.o
>  obj-$(CONFIG_GPIO_TPS6586X)+= gpio-tps6586x.o
>  obj-$(CONFIG_GPIO_TPS65910)+= gpio-tps65910.o
> +obj-$(CONFIG_GPIO_TPS65912)+= gpio-tps65912.o
>  obj-$(CONFIG_GPIO_TS5500)  += gpio-ts5500.o
>  obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
>  obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o
> diff --git a/drivers/gpio/gpio-tps65912.c b/drivers/gpio/gpio-tps65912.c
> new file mode 100644
> index 000..4707e62
> --- /dev/null
> +++ b/drivers/gpio/gpio-tps65912.c
> @@ -0,0 +1,138 @@
> +/*
> + * TI TPS65912x GPIO Driver
> + *
> + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
> + *
> + * Author: Andrew F. Davis 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
> + * kind, whether expressed or implied; without even the implied warranty
> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License version 2 for more details.
> + *
> + * Based on the Arizona GPIO driver and the previous TPS65912 driver by
> + * Margarita Olaya Cabrera 
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +struct tps65912_gpio {
> +   struct tps65912 *tps;
> +   struct gpio_chip gpio_chip;

Nit: I'd suggest to put gpio_chip as the first member of your struct
so that to_gpio() resolves to the same address. This may make the
generated code neglectably smaller and faster.

> +};
> +
> +#define to_gpio(gc) container_of(gc, struct tps65912_gpio, gpio_chip)

Nit2: Maybe a more specific name (like tps_gpio()) would be better?
It's local to this file though, so not a big deal.

> +
> +static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset)
> +{
> +   struct tps65912_gpio *gpio = to_gpio(gc);
> +   int ret, val;
> +
> +   ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, );
> +   if (ret < 0)
> +   return ret;
> +
> +   return val & GPIO_STS_MASK;
> +}
> +
> +static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset,
> + int value)
> +{
> +   struct tps65912_gpio *gpio = to_gpio(gc);
> +
> +   regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,
> +  GPIO_SET_MASK, value ? GPIO_SET_MASK : 0);
> +}
> +
> +static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset,
> +   int value)
> +{
> +   struct tps65912_gpio *gpio = to_gpio(gc);
> +
> +   /* Set the initial value */
> +   tps65912_gpio_set(gc, offset, value);
> +
> +   return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,
> + GPIO_CFG_MASK, GPIO_CFG_MASK);
> +}
> +
> +static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset)
> +{
> +   struct tps65912_gpio *gpio = to_gpio(gc);
> +
> +   return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,
> + GPIO_CFG_MASK, 0);
> +}
> +
> +static const struct of_device_id tps65912_gpio_of_match_table[] = {
> +   { .compatible = "ti,tps65912-gpio", },
> +   { /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, tps65912_gpio_of_match_table);
> +
> +static struct gpio_chip template_chip = {
> +   .label  = "tps65912-gpio",
> +   .owner  = THIS_MODULE,
> +   .direction_input=

Re: [PATCH v8 3/5] usb: phy: add usb3.0 phy driver for mt65xx SoCs

2015-09-27 Thread chunfeng yun

hi,
On Fri, 2015-09-18 at 12:12 +0530, Kishon Vijay Abraham I wrote:
> Hi,
> 
> On Wednesday 16 September 2015 12:14 PM, Chunfeng Yun wrote:
> > support usb3.0 phy of mt65xx SoCs
> few nitpicks:
> 
> change $subject. This driver is no longer in usb directory.
> 
> It can be just "phy: add usb3.0 phy driver for mt65xx SoCs".
Ok

> > 
> > Signed-off-by: Chunfeng Yun 
> > ---
> >  drivers/phy/Kconfig   |   9 +
> >  drivers/phy/Makefile  |   1 +
> >  drivers/phy/phy-mt65xx-usb3.c | 456 
> > ++
> >  3 files changed, 466 insertions(+)
> >  create mode 100644 drivers/phy/phy-mt65xx-usb3.c
> > 
> > diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> > index 47da573..ec436c1 100644
> > --- a/drivers/phy/Kconfig
> > +++ b/drivers/phy/Kconfig
> > @@ -206,6 +206,15 @@ config PHY_HIX5HD2_SATA
> > help
> >   Support for SATA PHY on Hisilicon hix5hd2 Soc.
> >  
> > +config PHY_MT65XX_USB3
> > +   tristate "Mediatek USB3.0 PHY Driver"
> > +   depends on ARCH_MEDIATEK && OF
> > +   select GENERIC_PHY
> > +   help
> > + Say 'Y' here to add support for Mediatek USB3.0 PHY driver
> > + for mt65xx SoCs. it supports two usb2.0 ports and
> > + one usb3.0 port.
> > +
> >  config PHY_SUN4I_USB
> > tristate "Allwinner sunxi SoC USB PHY driver"
> > depends on ARCH_SUNXI && HAS_IOMEM && OF
> > diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> > index a5b18c1..a7cc629 100644
> > --- a/drivers/phy/Makefile
> > +++ b/drivers/phy/Makefile
> > @@ -23,6 +23,7 @@ obj-$(CONFIG_TI_PIPE3)+= 
> > phy-ti-pipe3.o
> >  obj-$(CONFIG_TWL4030_USB)  += phy-twl4030-usb.o
> >  obj-$(CONFIG_PHY_EXYNOS5250_SATA)  += phy-exynos5250-sata.o
> >  obj-$(CONFIG_PHY_HIX5HD2_SATA) += phy-hix5hd2-sata.o
> > +obj-$(CONFIG_PHY_MT65XX_USB3)  += phy-mt65xx-usb3.o
> >  obj-$(CONFIG_PHY_SUN4I_USB)+= phy-sun4i-usb.o
> >  obj-$(CONFIG_PHY_SUN9I_USB)+= phy-sun9i-usb.o
> >  obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o
> > diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
> > new file mode 100644
> > index 000..1f00b05
> > --- /dev/null
> > +++ b/drivers/phy/phy-mt65xx-usb3.c
> > @@ -0,0 +1,456 @@
> > +/*
> > + * Copyright (c) 2015 MediaTek Inc.
> > + * Author: Chunfeng Yun 
> > + *
> > + * This software is licensed under the terms of the GNU General Public
> > + * License version 2, as published by the Free Software Foundation, and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +/*
> > + * for sifslv2 register, but exclude port's;
> > + * relative to USB3_SIF2_BASE base address
> > + */
> > +#define SSUSB_SIFSLV_SPLLC 0x
> > +
> > +/* offsets of sub-segment in each port registers */
> > +#define SSUSB_SIFSLV_U2PHY_COM_BASE0x
> > +#define SSUSB_SIFSLV_U3PHYD_BASE   0x0100
> > +#define SSUSB_USB30_PHYA_SIV_B_BASE0x0300
> > +#define SSUSB_SIFSLV_U3PHYA_DA_BASE0x0400
> > +
> > +#define U3P_USBPHYACR0 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x)
> > +#define PA0_RG_U2PLL_FORCE_ON  BIT(15)
> > +
> > +#define U3P_USBPHYACR2 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0008)
> > +#define PA2_RG_SIF_U2PLL_FORCE_EN  BIT(18)
> > +
> > +#define U3P_USBPHYACR5 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0014)
> > +#define PA5_RG_U2_HSTX_SRCTRL  GENMASK(14, 12)
> > +#define PA5_RG_U2_HSTX_SRCTRL_VAL(x)   ((0x7 & (x)) << 12)
> > +#define PA5_RG_U2_HS_100U_U3_ENBIT(11)
> > +
> > +#define U3P_USBPHYACR6 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0018)
> > +#define PA6_RG_U2_ISO_EN   BIT(31)
> > +#define PA6_RG_U2_BC11_SW_EN   BIT(23)
> > +#define PA6_RG_U2_OTG_VBUSCMP_EN   BIT(20)
> > +
> > +#define U3P_U2PHYACR4  (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0020)
> > +#define P2C_RG_USB20_GPIO_CTL  BIT(9)
> > +#define P2C_USB20_GPIO_MODEBIT(8)
> > +#define P2C_U2_GPIO_CTR_MSK(P2C_RG_USB20_GPIO_CTL | 
> > P2C_USB20_GPIO_MODE)
> > +
> > +#define U3D_U2PHYDCR0  (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0060)
> > +#define P2C_RG_SIF_U2PLL_FORCE_ON  BIT(24)
> > +
> > +#define U3P_U2PHYDTM0  (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0068)
> > +#define P2C_FORCE_UART_EN  BIT(26)
> > +#define P2C_FORCE_DATAIN   BIT(23)
> > +#define P2C_FORCE_DM_PULLDOWN  BIT(21)
> > +#define P2C_FORCE_DP_PULLDOWN

Re: [PATCH v7 5/6] Documentation: dt-bindings: pci: altera pcie device tree binding

2015-09-27 Thread Ley Foon Tan

On Sat, Sep 26, 2015 at 11:55 AM, Rob Herring  wrote:
>
> On 09/20/2015 09:13 PM, Ley Foon Tan wrote:
> > This patch adds the bindings for Altera PCIe host controller driver and
> > Altera PCIe MSI driver.
> >
> > Signed-off-by: Ley Foon Tan 
> > ---
> >  .../devicetree/bindings/pci/altera-pcie-msi.txt| 28 +
> >  .../devicetree/bindings/pci/altera-pcie.txt| 49 
> > ++
> >  2 files changed, 77 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
> >  create mode 100644 Documentation/devicetree/bindings/pci/altera-pcie.txt
> >
> > diff --git a/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt 
> > b/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
> > new file mode 100644
> > index 000..53ad2388
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt
> > @@ -0,0 +1,28 @@
> > +* Altera PCIe MSI controller
> > +
> > +Required properties:
> > +- compatible:should contain "altr,msi-1.0"
> > +- reg:   specifies the physical base address of the controller 
> > and
> > + the length of the memory mapped region.
> > +- reg-names: must include the following entries:
> > + "csr": CSR registers
> > + "vector_slave": vectors slave port region
> > +- interrupt-parent:  interrupt source phandle.
> > +- interrupts:specifies the interrupt source of the parent interrupt
> > + controller. The format of the interrupt specifier depends on 
> > the
> > + parent interrupt controller.
> > +- num-vectors:   number of vectors, range 1 to 32.
> > +- msi-controller:indicates that this is MSI controller node
> > +
> > +
> > +Example
> > +msi0: msi@0xFF20 {
> > + compatible = "altr,msi-1.0";
> > + reg = <0xFF20 0x0010
> > + 0xFF200010 0x0080>;
> > + reg-names = "csr", "vector_slave";
> > + interrupt-parent = <_0_arm_gic_0>;
> > + interrupts = <0 42 4>;
> > + msi-controller = <1>;
>
> This should not have a value.
Okay.

>
> > + num-vectors = <32>;
> > +};
> > diff --git a/Documentation/devicetree/bindings/pci/altera-pcie.txt 
> > b/Documentation/devicetree/bindings/pci/altera-pcie.txt
> > new file mode 100644
> > index 000..4440db1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/altera-pcie.txt
> > @@ -0,0 +1,49 @@
> > +* Altera PCIe controller
> > +
> > +Required properties:
> > +- compatible :   should contain "altr,pcie-root-port-1.0"
> > +- reg:   a list of physical base address and length for TXS 
> > and CRA.
> > +- reg-names: must include the following entries:
> > + "Txs" or "txs": TX slave port region
> > + "Cra" or "cra": Control register access region
>
> Why both cases? Can we please just have one (or none is better IMO).
The PCIe IP on different device families use different register names.
And our device tree generator will auto generate the register names
based on the hardware description name. Too bad we can't change the
hardware description names now.
>
> txs contains the config space?
It is not the config space, but a memory slave port.

>
> > +- interrupt-parent:  interrupt source phandle.
> > +- interrupts:specifies the interrupt source of the parent 
> > interrupt controller.
> > + The format of the interrupt specifier depends on the parent 
> > interrupt
> > + controller.
> > +- device_type:   must be "pci"
> > +- #address-cells:set to <3>
> > +- #size-cells:   set to <2>
> > +- #interrupt-cells:  set to <1>
> > +- ranges:describes the translation of addresses for root ports 
> > and standard
> > + PCI regions.
> > +- interrupt-map-mask and interrupt-map: standard PCI properties to define 
> > the
> > + mapping of the PCIe interface to interrupt numbers.
> > +
> > +Optional properties:
> > +- msi-parent:Link to the hardware entity that serves as the MSI 
> > controller for this PCIe
> > + controller.
> > +- bus-range: PCI bus numbers covered
> > +
> > +Example
> > + pcie_0: pcie@0xc {
> > + compatible = "altr,pcie-root-port-1.0";
> > + reg = <0xc000 0x2000>,
> > + <0xff22 0x4000>;
> > + reg-names = "Txs", "Cra";
> > + interrupt-parent = <_0_arm_gic_0>;
> > + interrupts = <0 40 4>;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + bus-range = <0x0 0xFF>;
> > + device_type = "pci";
> > + msi-parent = <_to_gic_gen_0>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + interrupt-map-mask = <0 0 0 7>;
> > + interrupt-map = <0 0 0 1 _0 1>,
> > + <0 0 0 2 _0 2>,
> > +

Re: [PATCH v2 0/2] ASoC: atmel-classd: add driver for Atmel CLASSD

2015-09-27 Thread Wu, Songjun




On 9/26/2015 02:07, Mark Brown wrote:

On Thu, Sep 24, 2015 at 01:41:25PM +0800, Songjun Wu wrote:


Songjun Wu (2):
   ASoC: atmel-classd: add the Audio Class D Amplifier
   ASoC: atmel-classd: DT binding for Class D audio amplifier driver


I don't seem to have the second patch with the binding documentation.


Sorry, I use the patman to send the patch this time.
And the patman will sent the patch automatically.
I didn't check, and it missed you.
I will forward to you at once.
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RE: [PATCH] powerpc/dts: Add DT alias for Freescale eSPI controller

2015-09-27 Thread Hou Zhiqiang

Hi Rob,

Could you please help to apply this patch, no comment for a month.

Thanks,
Zhiqiang

> -Original Message-
> From: Hou Zhiqiang-B48286
> Sent: 2015年9月15日 15:51
> To: Hou Zhiqiang-B48286; devicetree@vger.kernel.org; ga...@codeaurora.org;
> robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk
> Cc: Hu Mingkai-B21284
> Subject: RE: [PATCH] powerpc/dts: Add DT alias for Freescale eSPI
> controller
> 
> Hi,
> 
> Any response, please comment.
> 
> > -Original Message-
> > From: Zhiqiang Hou [mailto:b48...@freescale.com]
> > Sent: 2015年8月19日 19:55
> > To: devicetree@vger.kernel.org; ga...@codeaurora.org;
> > robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> > ijc+devicet...@hellion.org.uk
> > Cc: Hu Mingkai-B21284; Hou Zhiqiang-B48286
> > Subject: [PATCH] powerpc/dts: Add DT alias for Freescale eSPI
> > controller
> >
> > From: Hou Zhiqiang 
> >
> > Add aliases for eSPI device node to assign the alias id to the bus
> > number of spi_master.
> >
> > For the platforms used the device tree, the bus numbers are
> > dynamically assigned and are not predictable. However, sometimes it
> > must be figured out, e.g. using mtdparts in cmdline to specify the
> layout of spi flash.
> >
> > Signed-off-by: Hou Zhiqiang 
> > ---
> >  arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/b4si-post.dtsi  | 2 +-
> >  arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 2 +-
> > arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi  | 1 +
> >  arch/powerpc/boot/dts/fsl/p1020si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p1021si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p1022si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p1023si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p2041si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p3041si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p4080si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p5020si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/p5040si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/t1023si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/t1040si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/t2081si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi| 1 +
> >  arch/powerpc/boot/dts/fsl/t4240si-post.dtsi   | 2 +-
> >  arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi| 1 +
> >  31 files changed, 31 insertions(+), 15 deletions(-)
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
> > b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
> > index 338af7e..7e164da 100644
> > --- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
> > +++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
> > @@ -54,6 +54,7 @@
> > dma0 = 
> > dma1 = 
> > sdhc = 
> > +   spi0 = 
> > };
> >
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
> > b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
> > index 1948f73..b6e1724 100644
> > --- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
> > +++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
> > @@ -54,6 +54,7 @@
> > dma0 = 
> > dma1 = 
> > sdhc = 
> > +   spi0 = 
> > };
> >
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> > b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> > index 603910a..6fbd651 100644
> > --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> > +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> > @@ -439,7 +439,7 @@
> > };
> >
> >  /include/ "qoriq-espi-0.dtsi"
> > -   spi@11 {
> > +   spi0: spi@11 {
> > fsl,espi-num-chipselects = <4>;
> > };
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
> > b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
> > index c8b2daa..1c1c1fe 100644
> > --- a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
> > +++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
> > @@ -164,7 +164,7 @@
> >  /include/ "pq3-duart-0.dtsi"
> >
> >  /include/ "pq3-espi-0.dtsi"
> > -   spi@7000 {
> > +   spi0: spi@7000 {
> > fsl,espi-num-chipselects = <4>;
> > };
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
> > b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
> > index 152906f..8a6b7e7

[RESEND PATCH v2 0/2] ASoC: atmel-classd: add driver for Atmel CLASSD

2015-09-27 Thread Songjun Wu

The Audio Class D Amplifier driver includes two parts.
1) Driver code to implement the Audio Class D Amplifier function.
2) Device tree binding document, it describes how to add the Audio
   Class D Amplifier in device tree.

Changes in v2:
- Change the "Mono", "Swap" and "Deemphasis" controls to
  "Mono Switch", "Swap Switch" and "Deemphasis Switch".
- Merge "EQ Bass", "EQ Medium" and "EQ Treble" controls
  into one "EQ" control.
- Change the "single-ended" and "differential" to
  "Single ended", "Differential".
- Merge separate left and right controls into one single
  stereo control.
- Add a warning if the user trys to specify an invalid
  value in function "atmel_classd_codec_probe".
- Use the "dev_get_regmap()" in function
  "atmel_classd_codec_get_remap".
- Check for errors when invoking the "clk_prepare_enable".
- Remove the "dev_info" in function "atmel_classd_probe".
- Add some code to create a sound card in function
  "atmel_classd_probe".
- Remove the DT node "Sound" and the related code.
- Delete the device node "Sound" in dts.

Songjun Wu (2):
  ASoC: atmel-classd: add the Audio Class D Amplifier
  SoC: atmel-classd: DT binding for Class D audio amplifier driver

 .../devicetree/bindings/sound/atmel-classd.txt |   52 ++
 sound/soc/atmel/Kconfig|9 +
 sound/soc/atmel/Makefile   |2 +
 sound/soc/atmel/atmel-classd.c |  680 
 sound/soc/atmel/atmel-classd.h |  120 
 5 files changed, 863 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/atmel-classd.txt
 create mode 100644 sound/soc/atmel/atmel-classd.c
 create mode 100644 sound/soc/atmel/atmel-classd.h

-- 
1.7.9.5

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[RESEND PATCH v2 2/2] SoC: atmel-classd: DT binding for Class D audio amplifier driver

2015-09-27 Thread Songjun Wu

DT binding documentation for this new ASoC driver.

Signed-off-by: Songjun Wu 
---

Changes in v2:
- Delete the device node "Sound" in dts.

 .../devicetree/bindings/sound/atmel-classd.txt |   52 
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/atmel-classd.txt

diff --git a/Documentation/devicetree/bindings/sound/atmel-classd.txt 
b/Documentation/devicetree/bindings/sound/atmel-classd.txt
new file mode 100644
index 000..0018451
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/atmel-classd.txt
@@ -0,0 +1,52 @@
+* Atmel ClassD driver under ALSA SoC architecture
+
+Required properties:
+- compatible
+   Should be "atmel,sama5d2-classd".
+- reg
+   Should contain ClassD registers location and length.
+- interrupts
+   Should contain the IRQ line for the ClassD.
+- dmas
+   One DMA specifiers as described in atmel-dma.txt and dma.txt files.
+- dma-names
+   Must be "tx".
+- clock-names
+   Tuple listing input clock names.
+   Required elements: "pclk", "gclk" and "aclk".
+- clocks
+   Please refer to clock-bindings.txt.
+
+Optional properties:
+- pinctrl-names, pinctrl-0
+   Please refer to pinctrl-bindings.txt.
+- atmel,model
+   The user-visible name of this sound complex.
+   The default value is "CLASSD".
+- atmel,pwm-type
+   PWM modulation type, "single" or "diff".
+   The default value is "single".
+- atmel,non-overlap-time
+   Set non-overlapping time, the unit is nanosecond(ns).
+   There are four values,
+   <5>, <10>, <15>, <20>, the default value is <10>.
+   Non-overlapping will be disabled if not specified.
+
+Example:
+classd: classd@fc048000 {
+   compatible = "atmel,sama5d2-classd";
+   reg = <0xfc048000 0x100>;
+   interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
+   dmas = <
+   (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+   | AT91_XDMAC_DT_PERID(47))>;
+   dma-names = "tx";
+   clocks = <_clk>, <_gclk>, <_pll_pmc>;
+   clock-names = "pclk", "gclk", "aclk";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_classd_default>;
+   atmel,model = "classd @ SAMA5D2-Xplained";
+   atmel,pwm-type = "diff";
+   atmel,non-overlap-time = <10>;
+};
-- 
1.7.9.5

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Re: [PATCH v7] arm64: dts: Add spi bus dts

2015-09-27 Thread Matthias Brugger




On 08/09/15 10:59, Nicolas Boichat wrote:

On Mon, Aug 31, 2015 at 9:44 PM, Leilk Liu  wrote:

This patch adds MT8173 spi bus controllers into device tree.


The corresponding SPI driver has already been merged in
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git .


Signed-off-by: Leilk Liu 


Reviewed-and-Tested-by: Nicolas Boichat 


Applied, thanks.




---
Change in this patch:
1. fix spi clock flow usage error.
---
  arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++
  arch/arm64/boot/dts/mediatek/mt8173.dtsi| 13 +
  2 files changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts 
b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 4be66ca..811cb76 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -387,6 +387,24 @@
 };
  };

+ {
+   spi_pins_a: spi0 {
+   pins_spi {
+   pinmux = ,
+   ,
+   ,
+   ;
+   };
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+   mediatek,pad-select = <0>;
+   status = "okay";
+};
+
   {
 status = "okay";
  };
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..fcb4860 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,19 @@
 status = "disabled";
 };

+   spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = < CLK_TOP_SYSPLL3_D2>,
+< CLK_TOP_SPI_SEL>,
+< CLK_PERI_SPI0>;
+   clock-names = "parent-clk", "sel-clk", "spi-clk";
+   status = "disabled";
+   };
+
 i2c3: i2c3@1101 {
 compatible = "mediatek,mt8173-i2c";
 reg = <0 0x1101 0 0x70>,
--
1.8.1.1.dirty


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Re: [PATCHv2 2/2] iio: ti-ads868x: Add DT binding documentation

2015-09-27 Thread Jonathan Cameron

On 25/09/15 07:29, Sean Nyekjaer wrote:
> Adding binding documentation for Texas Instruments ADS868X ADC.
> 
> Signed-off-by: Sean Nyekjaer 
> Reviewed-by: Martin Hundebøll 
> ---
>  .../devicetree/bindings/iio/adc/ti-ads868x.txt | 18 
> ++
>  1 file changed, 18 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/ti-ads868x.txt
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/ti-ads868x.txt 
> b/Documentation/devicetree/bindings/iio/adc/ti-ads868x.txt
> new file mode 100644
> index 000..bc3c305
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/ti-ads868x.txt
> @@ -0,0 +1,18 @@
> +* Texas Instruments' ADS8684 and ADS8688 ADC chip
> +
> +Required properties:
> + - compatible: Should be "ti,ads8684" or "ti,ads8688"
> + - reg: spi chip select number for the device
> + - vref-supply: The regulator supply for ADC reference voltage
In the driver it appears that this is optional rather than required.
Whether it is provided or not controls whether the external or internal
reference is used.
> +
> +Recommended properties:
> + - spi-max-frequency: Definition as per
> + Documentation/devicetree/bindings/spi/spi-bus.txt
> +
> +Example:
> +adc@0 {
> + compatible = "ti,ads8688";
> + reg = <0>;
> + vref-supply = <_supply>;
> + spi-max-frequency = <100>;
> +};
> 

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Re: [PATCHv2 1/2] iio: adc: Add TI ADS868X

2015-09-27 Thread Jonathan Cameron

On 25/09/15 07:29, Sean Nyekjaer wrote:
> This patch adds support for the Texas Intruments ADS868x ADC.
> 
> Signed-off-by: Sean Nyekjaer 
> Reviewed-by: Martin Hundebøll 
Hi

The driver is fundamentally good, but I think a few small changes would make
it less complex to read which is always a good thing!

Comments inline.

Jonathan
> ---
> Changes since v1:
> - Now possible to read and write the actual offset and scale values
> - Removed unused includes
> - Removed unused buffer references
> 
>  drivers/iio/adc/Kconfig  |  10 +
>  drivers/iio/adc/Makefile |   1 +
>  drivers/iio/adc/ti-ads868x.c | 456 
> +++
>  3 files changed, 467 insertions(+)
>  create mode 100644 drivers/iio/adc/ti-ads868x.c
> 
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index deea62c..39924d5 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -322,6 +322,16 @@ config TI_ADC128S052
> This driver can also be built as a module. If so, the module will be
> called ti-adc128s052.
>  
> +config TI_ADS868X
> + tristate "Texas Instruments ADS8684/8"
> + depends on SPI && OF
> + help
> +   If you say yes here you get support for Texas Instruments ADS8684 and
> +   and ADS8688 ADC chips
> +
> +   This driver can also be built as a module. If so, the module will be
> +   called ti-ads868x.
> +
>  config TI_AM335X_ADC
>   tristate "TI's AM335X ADC driver"
>   depends on MFD_TI_AM335X_TSCADC
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index fa5723a..75170d2 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -31,6 +31,7 @@ obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
>  obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
>  obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
>  obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
> +obj-$(CONFIG_TI_ADS868X) += ti-ads868x.o
>  obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
>  obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
>  obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
> diff --git a/drivers/iio/adc/ti-ads868x.c b/drivers/iio/adc/ti-ads868x.c
> new file mode 100644
> index 000..66d9b64
> --- /dev/null
> +++ b/drivers/iio/adc/ti-ads868x.c
> @@ -0,0 +1,456 @@
> +/*
> + * Copyright (C) 2015 Prevas A/S
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#define ADS868X_CMD_REG(x)   (x << 8)
> +#define ADS868X_CMD_REG_NOOP 0x00
> +#define ADS868X_CMD_REG_RST  0x85
> +#define ADS868X_CMD_REG_MAN_CH(chan) (0xC0 | (4 * chan))
> +#define ADS868X_CMD_DONT_CARE_BITS   16
> +
> +#define ADS868X_PROG_REG(x)  (x << 9)
> +#define ADS868X_PROG_REG_RANGE_CH(chan)  (0x05 + chan)
> +#define ADS868X_PROG_WR_BIT  BIT(8)
> +#define ADS868X_PROG_DONT_CARE_BITS  8
> +
> +#define ADS868X_VREF_MV  4096
> +#define ADS868X_REALBITS 16
> +
> +struct ads868x_chip_info {
> + unsigned int id;
> + const struct iio_chan_spec *channels;
> + unsigned int num_channels;
> + unsigned int flags;
flags isn't used that I can see.
> + const struct iio_info *iio_info;
Why bother? Right now you only have one iio_info structure for both
supported parts.  Just use it directly and drop it form this structure.
> +};
> +
> +struct ads868x_state {
> + const struct ads868x_chip_info  *chip_info;
> + struct spi_device   *spi;
> + struct regulator*reg;
> + unsigned intvref_mv;
prefer u8 type to a char as it clearly isn't actually a character.

See below for more detail, but I'd suggest having a contiguous enum to
reference into the below ranges structure then store that in your
device instance specific structure rather than these values.
It avoids a fair bit of searching!  That would also change the type
of this to be an array of enums rather than u8/chars.

> + charrange[8];
> + union {
> + __be32 d32;
> + u8 d8[4];
> + } data[2] cacheline_aligned;
> +};
> +
> +enum ads868x_id {
> + ID_ADS8684,
> + ID_ADS8688,
> +};
> +
> +enum ads868x_range {
> + ADS868X_PLUSMINUS25VREF = 0x00,
> + ADS868X_PLUSMINUS125VREF= 0x01,
> + ADS868X_PLUSMINUS0625VREF   = 0x02,
> + ADS868X_PLUS25VREF  = 0x05,
> + ADS868X_PLUS125VREF = 0x06,
> +};
> +
> +struct ads868x_ranges {
> + enum ads868x_range range;
> + unsigned int scale;
> + int offset;
> +};
> +
const
> +static struct ads868x_ranges ads868x_range_def[5] = {
> +

Re: [PATCH 2/3] iio:adc:palmas: add DT support

2015-09-27 Thread Jonathan Cameron

On 23/09/15 13:49, H. Nikolaus Schaller wrote:
> From: Marek Belisko 
> 
> Code was found at:
> https://android.googlesource.com/kernel/tegra/+/a90856a6626d502d42c6e7abccbdf9d730b36270%5E%21/#F1
> 
> Signed-off-by: Laxman Dewangan 
> [Fixed minor typos + add channels list to documentation]
> Signed-off-by: Marek Belisko 
Various commments inline.  You've run into the region of previous arguments
over driver bindings...  Mark Rutland, one for you to comment on as I know
you love our bindings ;) and yes we haven't done anything about them in two
years or so since you last moaned about them to me :(

> ---
> .../devicetree/bindings/iio/adc/palmas-gpadc.txt   |  67 +++
> drivers/iio/adc/palmas_gpadc.c | 130 +
> 2 files changed, 175 insertions(+), 22 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt 
> b/Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt
> new file mode 100644
> index 000..a5a33ba
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/palmas-gpadc.txt
> @@ -0,0 +1,67 @@
> +* Palmas general purpose ADC IP block devicetree bindings
> +
> +Channels list:
> + 0 battery type
> +1 battery temp NTC
tab vs space fun.
> + 2 GP
> + 3 temp (with ext. diode)
> + 4 GP
> + 5 GP
> + 6 VBAT_SENSE
> + 7 VCC_SENSE
> + 8 Backup Battery voltage
> + 9 external charger (VCHG)
> + 10 VBUS
> + 11 DC-DC current probe (how does this work?)
> + 12 internal die temp
> + 13 internal die temp
> + 14 USB ID pin voltage
> + 15 test network
> +
> +Required properties:
> +- compatible : Must be "ti,palmas-gpadc".
> +
> +Optional sub-nodes:
> +ti,channel0-current-microamp: Channel 0 current in uA.
> + Valid values 0uA, 5uA, 15uA, 20uA.
> +ti,channel3-current-microamp: Channel 3 current in uA.
> + Valid value 0uA, 10uA, 400uA, 800uA.
> +ti,enable-channel3-dual-current: Enable dual current on channel 3.
> +ti,enable-extended-delay: Enable extended delay.
> +
> +Optional sub-node:
> +The Palmas ADC node has optional subnode to define the iio mapping.
> +It is the name with "iio_map". This node has again subnode to define
> +the property of the channel. The sub subnode has following properties:
> +- ti,adc-channel-number: ADC channel number.
> +- ti,adc-consumer-device: Consumer device name.
> +- ti,adc-consumer-channel: ADC consumer channel name.
> +
> +Example:
> +
> +pmic {
> + compatible = "ti,twl6035-pmic", "ti,palmas-pmic";
> + ...
> + gpadc {
> + compatible = "ti,palmas-gpadc";
> + interrupts = <18 0
> +   16 0
> +   17 0>;
> + ti,channel0-current-microamp = <5>;
> + ti,channel3-current-microamp = <10>;
> + iio_map {
> + ch1 {
> + ti,adc-channel-number = <1>;
> + ti,adc-consumer-device = 
> "generic-adc-thermal.0";
> + ti,adc-consumer-channel ="battery-temp-channel";
> + };
> +
> + ch6 {
> + ti,adc-channel-number = <6>;
> + ti,adc-consumer-device = "palmas-battery";
> + ti,adc-consumer-channel ="vbat_channel";
> + };
See comments below.  There is an existing iio-consumer binding.
Various uses of it have caused complaints from the device tree guys in the
past.  I'd be interested to get their feedback on this use case.
> + };
> + };
> + ...
> +};
> diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c
> index 17abb28..bc4db43 100644
> --- a/drivers/iio/adc/palmas_gpadc.c
> +++ b/drivers/iio/adc/palmas_gpadc.c
> @@ -20,6 +20,8 @@
> #include 
> #include 
> #include 
> +#include 
> +#include 
> #include 
> #include 
> #include 
> @@ -434,20 +436,97 @@ static const struct iio_chan_spec 
> palmas_gpadc_iio_channel[] = {
>   PALMAS_ADC_CHAN_IIO(IN15, IIO_VOLTAGE),
> };
> 
> +static int palmas_gpadc_get_adc_dt_data(struct platform_device *pdev,
> + struct palmas_gpadc_platform_data **gpadc_pdata)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct palmas_gpadc_platform_data *gp_data;
> + struct device_node *map_node;
> + struct device_node *child;
> + struct iio_map *palmas_iio_map;
> + int ret;
> + u32 pval;
> + int nmap, nvalid_map;
> +
> + gp_data = devm_kzalloc(>dev, sizeof(*gp_data), GFP_KERNEL);
> + if (!gp_data)
> + return -ENOMEM;
> +
> + ret = of_property_read_u32(np, "ti,channel0-current-microamp", );
> + if (!ret)
> + gp_data->ch0_current = pval;
> +
> + ret = of_property_read_u32(np,

Re: [PATCH v2] ARM: dts: sunxi: Add regulators for LeMaker BananaPi

2015-09-27 Thread Maxime Ripard

On Fri, Sep 25, 2015 at 05:05:58PM +0200, Timo Sigurdsson wrote:
> Hi Kevin,
> 
> Kevin Hilman schrieb am 25. Sept 2015 01:57:
> 
> > On Tue, Aug 18, 2015 at 8:36 AM, Maxime Ripard
> >  wrote:
> >> On Sun, Aug 02, 2015 at 06:18:25PM +0200, Timo Sigurdsson wrote:
> >>> sun7i-a20-bananapi.dts doesn't contain regulator nodes for the AXP209
> >>> PMU
> >>> driver, so add them to allow for voltage-scaling with cpufreq-dt.
> >>>
> >>> Signed-off-by: Timo Sigurdsson 
> >>
> >> Queued, thanks!
> >> Maxime
> > 
> > kernelci.org started finding boot faiulres[1] on bananapi linux-next
> > around next-20150918, but it was only failing in some labs and not
> > others.  I finally bisected it down to this patch, which landed in
> > linux-next in the form of 2d665a8a8350 ARM: dts: sunxi: Add regulators
> > for LeMaker BananaPi.  Reverting that commit on top of next-20150923
> > gets my bananapi booting again.
> > 
> > Note it's kind of an interesting boot failure.  The kernel boots fully
> > to a shell, but panics after running a few commands.  In particular
> > 'dmesg -n1' seems to trigger it usually[2].
> > 
> > Kevin
> > 
> > [1]
> > http://kernelci.org/boot/sun7i-a20-bananapi/job/next/kernel/next-20150923/defconfig/multi_v7_defconfig/lab/lab-khilman/?_id=5602504359b514be146c326f
> > [2]
> > http://storage.kernelci.org/next/next-20150923/arm-multi_v7_defconfig/lab-khilman/boot-sun7i-a20-bananapi.html
> > 
> 
> Thanks for your feedback. I'm traveling at the moment, so I can't do
> any testing but just guess wildly. I know, though, that I used dmesg
> frequently when I did my own testing before submitting the patch and
> could not see such behavior.
> 
> Before this commit, the CPU of your BananaPi runs at 1.4 volts
> constantly. With this commit applied, the CPU voltage should vary
> between 1.0-1.4 volts depending on the frequency and defined
> operating points. Hence, one of my guesses would be that your CPU is
> not stable at the lower voltages. Could you modify the voltages for
> the defined frequencies in sun7i-a20.dtsi and test if that solves
> your issue? Say, raise the voltage by 0.1 volts for each operating
> point (but no higher than 1.4). I actually had a different patch
> that applied slightly higher voltages taken from the original fex
> for by LeMaker, but the feedback was, unless there are actual
> reports about boards not running stable at the current settings, we
> just keep them instead. So, I'm curious if you happen to have a
> board that requires slightly higher voltages to run stable.

I've dropped the patch waiting for you to come back from your holidays
when we will have more time to figure out what's wrong.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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Re: [PATCH net-next v3] net: Fix Hisilicon Network Subsystem Support Compilation

2015-09-27 Thread huangdaode


On 2015/9/26 12:42, David Miller wrote:

From: huangdaode 
Date: Fri, 25 Sep 2015 16:29:50 +0800


@@ -191,9 +191,12 @@ static void hns_rcb_ring_init(struct ring_pair_cb 
*ring_pair, int ring_type)
if (ring_type == RX_RING) {
dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_L_REG,
   (u32)dma);
+#ifdef CONFIG_64BIT
dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_H_REG,
   (u32)(dma >> 32));
-
+#else
+   dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_H_REG, 0);
+#endif
dsaf_write_dev(q, RCB_RING_RX_RING_BD_LEN_REG,
   bd_size_type);
dsaf_write_dev(q, RCB_RING_RX_RING_BD_NUM_REG,

CONFIG_64BIT doesn't tell you if _DMA_ addresses are 64-bit or not.

Furthermore there is a portable way to shift a 32-bit value down
32-bits whilst avoiding warnings.

(x >> 31) >> 1

So you should definitely use that instead of the CONFIG_64BIT test.

.


agreed.



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[PATCH v4] ARM: sun7i: dt: Add new Olimex A20 EVB device

2015-09-27 Thread codekipper

From: Marcus Cooper 

The A20-SOM-EVB is a reference design of a 2-layer board for the
A20-SOM.
It expands the features of A20-SOM by adding VGA connector, HDMI
connector, audio In/Out, LCD connector, 2 Mpix camera, gigabit
Ethernet, SATA, USB-OTG and 2 USB hosts.

Signed-off-by: Marcus Cooper 
---
Changes since v3:
- removed i2c1 as it's not used
- removed axp_ipsout regulator
Changes since v2:
- changed dcdc2 to have max voltage of 1.4V
Changes since v1:
- renamed dts from sun7i-a20-olinuxino-evb to sun7i-a20-olimex-som-evb
- added "axp209 dtsi"
- change regulator settings
---
 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 202 +
 2 files changed, 203 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 1c5f225..0e87a54 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -618,6 +618,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-i12-tvbox.dtb \
sun7i-a20-m3.dtb \
sun7i-a20-mk808c.dtb \
+   sun7i-a20-olimex-som-evb.dtb \
sun7i-a20-olinuxino-lime.dtb \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-micro.dtb \
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts 
b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
new file mode 100644
index 000..3317c22
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -0,0 +1,202 @@
+/*
+ * Copyright 2015 - Marcus Cooper 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun7i-a20.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include 
+#include 
+#include 
+
+/ {
+   model = "Olimex A20-Olimex-SOM-EVB";
+   compatible = "olimex,a20-olimex-som-evb", "allwinner,sun7i-a20";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   leds {
+   compatible = "gpio-leds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_olimex_som_evb>;
+
+   green {
+   label = "a20-olimex-som-evb:green:usr";
+   gpios = < 7 2 GPIO_ACTIVE_HIGH>;
+   default-state = "on";
+   };
+   };
+};
+
+ {
+   target-supply = <_ahci_5v>;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_rgmii_a>;
+   phy = <>;
+   phy-mode = "rgmii";
+   status = "okay";
+
+   phy1: ethernet-phy@1 {
+   reg = <1>;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+   status = "okay";
+
+   axp209: pmic@34 {
+   reg = <0x34>;
+   interrupt-parent = <_intc>;
+   interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+   };

[PATCH net-next v4] net: Fix Hisilicon Network Subsystem Support Compilation

2015-09-27 Thread huangdaode

This patch fixes the compilation error with arm allmodconfig, this error
generated due to unavailability of readq() on 32-bit platform which was
found during net-next daily compilation. In the same time, fix all the
hns drivers compilation warnings.

Signed-off-by: huangdaode 
Signed-off-by: zhaungyuzeng 
Signed-off-by: kenneth Lee 
Signed-off-by: yankejian 
---
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c   |  2 +-
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h  |  4 ++--
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c   |  6 ++
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h   |  2 +-
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c |  1 +
 drivers/net/ethernet/hisilicon/hns/hns_enet.c   | 17 -
 6 files changed, 7 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c
index a8bd27b..95bf42a 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c
@@ -86,7 +86,7 @@ int hns_mac_get_sfp_prsnt(struct hns_mac_cb *mac_cb, int 
*sfp_prsnt)
if (!mac_cb->cpld_vaddr)
return -ENODEV;
 
-   *sfp_prsnt = !dsaf_read_b((u64)mac_cb->cpld_vaddr
+   *sfp_prsnt = !dsaf_read_b((u8 *)mac_cb->cpld_vaddr
+ MAC_SFP_PORT_OFFSET);
 
return 0;
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
index e0417c0..315b07e 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
@@ -43,7 +43,7 @@ struct hns_mac_cb;
 #define DSAF_DUMP_REGS_NUM 504
 #define DSAF_STATIC_NUM 28
 
-#define DSAF_STATS_READ(p, offset) (*((u64 *)((u64)(p) + (offset
+#define DSAF_STATS_READ(p, offset) (*((u64 *)((u8 *)(p) + (offset
 
 enum hal_dsaf_mode {
HRD_DSAF_NO_DSAF_MODE   = 0x0,
@@ -302,7 +302,7 @@ struct dsaf_device {
 
 static inline void *hns_dsaf_dev_priv(const struct dsaf_device *dsaf_dev)
 {
-   return (void *)((u64)dsaf_dev + sizeof(*dsaf_dev));
+   return (void *)((u8 *)dsaf_dev + sizeof(*dsaf_dev));
 }
 
 struct dsaf_drv_tbl_tcam_key {
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c
index 50f3427..05ea244 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c
@@ -192,8 +192,7 @@ static void hns_rcb_ring_init(struct ring_pair_cb 
*ring_pair, int ring_type)
dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_L_REG,
   (u32)dma);
dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_H_REG,
-  (u32)(dma >> 32));
-
+  (u32)((dma >> 31) >> 1));
dsaf_write_dev(q, RCB_RING_RX_RING_BD_LEN_REG,
   bd_size_type);
dsaf_write_dev(q, RCB_RING_RX_RING_BD_NUM_REG,
@@ -204,8 +203,7 @@ static void hns_rcb_ring_init(struct ring_pair_cb 
*ring_pair, int ring_type)
dsaf_write_dev(q, RCB_RING_TX_RING_BASEADDR_L_REG,
   (u32)dma);
dsaf_write_dev(q, RCB_RING_TX_RING_BASEADDR_H_REG,
-  (u32)(dma >> 32));
-
+  (u32)((dma >> 31) >> 1));
dsaf_write_dev(q, RCB_RING_TX_RING_BD_LEN_REG,
   bd_size_type);
dsaf_write_dev(q, RCB_RING_TX_RING_BD_NUM_REG,
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
index 6fc58ba..b475e1b 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
@@ -967,6 +967,6 @@ static inline u32 dsaf_get_reg_field(void *base, u32 reg, 
u32 mask, u32 shift)
readb((__iomem unsigned char *)(addr))
 
 #define hns_mac_reg_read64(drv, offset) \
-   readq((__iomem void *)(((u64)(drv)->io_base + 0xc00 + (offset
+   readq((__iomem void *)(((u8 *)(drv)->io_base + 0xc00 + (offset
 
 #endif /* _DSAF_REG_H */
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c 
b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c
index fe7fa1d..dab5ecf 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c
@@ -7,6 +7,7 @@
  * (at your option) any later version.
  */
 
+#include 
 #include 
 #include "hns_dsaf_main.h"
 #include "hns_dsaf_mac.h"
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_enet.c 
b/drivers/net/ethernet/hisilicon/hns/hns_enet.c
index 0713ced..ce7f2e0 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_enet.c
+++

Re: [PATCH] soc: mediatek: Fix random hang up issue while kernel init

2015-09-27 Thread Matthias Brugger




On 25/09/15 10:26, Lucas Stach wrote:

Am Freitag, den 25.09.2015, 14:31 +0800 schrieb James Liao:

In kernel late init, it turns off all unused clocks, which
needs to access subsystem registers such as VENC and VENC_LT.

Accessing MT8173 VENC registers needs two top clocks, mm_sel and
venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel.
So we need to keep these clocks on before accessing their registers.

This patch keeps venc_sel / venclt_sel clock on when
VENC / VENC_LT's power is on, to prevent system hang up while
accessing its registeres.


This changes the binding of an existing driver, so it needs some more
consideration. Are VENC_SEL and VENC_LT_SEL really direct clock inputs
to the VENC module, or are they some kind of parent clock for one of the
existing clocks used by the old VENC binding?

If they are direct clock inputs to the VENC module, changing the binding
might be still ok at that point, as there shouldn't be many users of
that yet. But then we at least need a corresponding change to the
binding documentation.



Yes, we will need a really good reason to change the bindings. Apart 
from that we would need to find a solution which works with the old (and 
wrong bindings) as well.


Apart from that, please send the dtsi part as a seperate patch.

Thanks,
Matthias


Regards,
Lucas


Signed-off-by: James Liao 
---

This patch is based on v4.3-rc2, to fix system hanging up issue
while disabling unused clocks.

  arch/arm64/boot/dts/mediatek/mt8173.dtsi |  6 ++-
  drivers/soc/mediatek/mtk-scpsys.c| 67 +---
  2 files changed, 48 insertions(+), 25 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..188917f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -227,8 +227,10 @@
#power-domain-cells = <1>;
reg = <0 0x10006000 0 0x1000>;
clocks = <>,
-< CLK_TOP_MM_SEL>;
-   clock-names = "mfg", "mm";
+< CLK_TOP_MM_SEL>,
+< CLK_TOP_VENC_SEL>,
+< CLK_TOP_VENC_LT_SEL>;
+   clock-names = "mfg", "mm", "venc", "venc_lt";
infracfg = <>;
};

diff --git a/drivers/soc/mediatek/mtk-scpsys.c 
b/drivers/soc/mediatek/mtk-scpsys.c
index 164a7d8..06032ba 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -54,12 +54,16 @@
  #define PWR_STATUS_USBBIT(25)

  enum clk_id {
+   MT8173_CLK_NONE,
MT8173_CLK_MM,
MT8173_CLK_MFG,
-   MT8173_CLK_NONE,
-   MT8173_CLK_MAX = MT8173_CLK_NONE,
+   MT8173_CLK_VENC,
+   MT8173_CLK_VENC_LT,
+   MT8173_CLK_MAX,
  };

+#define MAX_CLKS   2
+
  struct scp_domain_data {
const char *name;
u32 sta_mask;
@@ -67,7 +71,7 @@ struct scp_domain_data {
u32 sram_pdn_bits;
u32 sram_pdn_ack_bits;
u32 bus_prot_mask;
-   enum clk_id clk_id;
+   enum clk_id clk_id[MAX_CLKS];
  };

  static const struct scp_domain_data scp_domain_data[] __initconst = {
@@ -77,7 +81,7 @@ static const struct scp_domain_data scp_domain_data[] 
__initconst = {
.ctl_offs = SPM_VDE_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
-   .clk_id = MT8173_CLK_MM,
+   .clk_id = {MT8173_CLK_MM},
},
[MT8173_POWER_DOMAIN_VENC] = {
.name = "venc",
@@ -85,7 +89,7 @@ static const struct scp_domain_data scp_domain_data[] 
__initconst = {
.ctl_offs = SPM_VEN_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
-   .clk_id = MT8173_CLK_MM,
+   .clk_id = {MT8173_CLK_MM, MT8173_CLK_VENC},
},
[MT8173_POWER_DOMAIN_ISP] = {
.name = "isp",
@@ -93,7 +97,7 @@ static const struct scp_domain_data scp_domain_data[] 
__initconst = {
.ctl_offs = SPM_ISP_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(13, 12),
-   .clk_id = MT8173_CLK_MM,
+   .clk_id = {MT8173_CLK_MM},
},
[MT8173_POWER_DOMAIN_MM] = {
.name = "mm",
@@ -101,7 +105,7 @@ static const struct scp_domain_data scp_domain_data[] 
__initconst = {
.ctl_offs = SPM_DIS_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
-   .clk_id = MT8173_CLK_MM,
+   .clk_id = {MT8173_CLK_MM},
.bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 |

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