[[PATCH v2] 1/2] Altera Modular ADC driver device binding

[Chee Nouk Phoo]

From: Chee Nouk Phoon 

Altera Modular ADC is soft IP that wraps the hardened ADC block in a Max10
device. It can be configured to dual ADC mode that supports two channel
synchronous sampling or independent single ADCs. ADC sampled values will be
written into memory slots in sequence determined by a user configurable
sequencer block.

This patch adds Altera Modular ADC driver device tree binding

Signed-off-by: Chee Nouk Phoon 
---
 .../bindings/iio/adc/altr,modular-adc.txt  |   63 
 1 files changed, 63 insertions(+), 0 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt

diff --git a/Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt 
b/Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt
new file mode 100644
index 000..faafcac
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt
@@ -0,0 +1,63 @@
+Altera Modular (Dual) ADC
+
+This binding document describes both Altera Modular ADC and Altera Modular Dual
+ADC. Both options can be configured during generation time in Qsys. This driver
+only supports standard sequencer with Avalon-MM sample storage with up to 64
+memory slots.
+
+Required properties:
+- compatible: must be one of the following strings
+  "altr,modular-adc-1.0": single ADC configuration
+  "altr,modular-dual-adc-1.0": dual ADC configuration
+
+- reg: Address and length of the register set for the device. It contains the
+  information of registers in the same order as described by reg-names
+
+- reg-names: Should contain the reg names
+  "sequencer_csr": register region for adc sequencer block
+  "sample_store_csr": register region for sample store block
+
+- interrupts: interrupt line for ADC
+
+- altr,adc-mode : ADC configuration
+  1: single ADC mode
+  2: dual ADC mode
+
+- altr,adc-slot-count : specify number of conversion slot in use
+
+- altr,adc-slot-sequence-: specify ADC channel
+  conversion sequence
+  : instantiated ADC number
+  : slot index for ADC memory slot
+
+- altr,adc-number : specify ADC number when single ADC mode is selected
+  1: 1st ADC
+  2: 2nd ACD
+
+Example: single ADC
+modular_adc_0: adc@0x2200 {
+  compatible = "altr,modular-adc";
+  reg = <0x2000 0x0008>,
+<0x2200 0x0200>;
+  reg-names = "sequencer_csr", "sample_store_csr";
+  interrupt-parent = <&cpu>;
+  interrupts = <8>;
+  altr,adc-mode = <1>;
+  altr,adc-slot-count = <2>;
+  altr,adc1-slot-sequence-1 = <1>;
+  altr,adc-number = <1>;
+};
+
+Example: dual ADC
+modular_adc_1: adc@0x18002200 {
+  compatible = "altr,modular-dual-adc";
+  reg = <0x18002000 0x0008>,
+<0x18002200 0x0200>;
+  reg-names = "sequencer_csr", "sample_store_csr";
+  interrupt-parent = <&cpu>;
+  interrupts = <8>;
+  altr,adc-mode = <2>;
+  altr,adc-slot-count = <1>;
+  altr,adc1-slot-sequence-1 = <6>;
+  altr,adc2-slot-sequence-1 = <6>;
+};
\ No newline at end of file
-- 
1.7.1

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[[PATCH v2] 0/2] Add Altera Modular ADC Driver

[Chee Nouk Phoo]

From: Chee Nouk Phoon 

This is 2nd version of the patch set to add support for Altera Modular ADC and
Altera Modular Dual ADC in MAX10 device family. This patch combines two separate
patches of driver and device tree binding. 

v1->v2 changes:
- update compatibility string
- update macros naming
- remove Nios2 arch dependency
- using snprintf instead of sprintf
- improve error handing
- parse resource using reg-name instead of index
- use _relaxed version of writel and readl
- remove uncessary private data

History:

[v1]https://lkml.org/lkml/2015/8/27/32
https://lkml.org/lkml/2015/8/20/227

Chee Nouk Phoon (2):
  Altera Modular ADC driver device binding
  Altera Modular ADC driver support

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[[PATCH v2] 2/2] Altera Modular ADC driver support

[Chee Nouk Phoo]

From: Chee Nouk Phoon 

Altera Modular ADC is soft IP that wraps the hardened ADC block in a Max10
device. It can be configured to dual ADC mode that supports two channel
synchronous sampling or independent single ADCs. ADC sampled values will be
written into memory slots in sequence determined by a user configurable
sequencer block.

This patch adds Altera Modular ADC driver support

Signed-off-by: Chee Nouk Phoon 
---
 drivers/iio/adc/Kconfig   |   11 ++
 drivers/iio/adc/Makefile  |1 +
 drivers/iio/adc/alt_modular_adc.c |  322 +
 3 files changed, 334 insertions(+), 0 deletions(-)
 mode change 100644 => 100755 drivers/iio/adc/Kconfig
 create mode 100755 drivers/iio/adc/alt_modular_adc.c

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
old mode 100644
new mode 100755
index 50c103d..e1a67cb
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -118,6 +118,17 @@ config AD799X
  To compile this driver as a module, choose M here: the module will be
  called ad799x.
 
+config ALT_MODULAR_ADC
+   tristate "Altera Modular ADC driver"
+   select ANON_INODES
+
+   help
+ Say yes here to have support for Altera Modular ADC. The driver
+ supports both Altera Modular ADC and Altera Modular Dual ADC.
+
+ The driver can also be build as a module. If so the module will be
+ called alt_modular_adc.
+
 config AT91_ADC
tristate "Atmel AT91 ADC"
depends on ARCH_AT91
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index a096210..d7f10e0 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_VF610_ADC) += vf610_adc.o
 obj-$(CONFIG_VIPERBOARD_ADC) += viperboard_adc.o
 xilinx-xadc-y := xilinx-xadc-core.o xilinx-xadc-events.o
 obj-$(CONFIG_XILINX_XADC) += xilinx-xadc.o
+obj-$(CONFIG_ALT_MODULAR_ADC) += alt_modular_adc.o
diff --git a/drivers/iio/adc/alt_modular_adc.c 
b/drivers/iio/adc/alt_modular_adc.c
new file mode 100755
index 000..3d2d870
--- /dev/null
+++ b/drivers/iio/adc/alt_modular_adc.c
@@ -0,0 +1,322 @@
+/*
+ * Copyright (C) 2015 Altera Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/* Constant Definitions */
+#define MAX_SLOT   64
+#define MAX_ADC2
+#define MAX_CHANNEL18
+#define MODE_SINGLE_ADC1
+#define MODE_DUAL_ADC  2
+#define ADC_BITS   12
+#define ADC_STORE_BITS 16
+#define ADC_MAX_STR_SIZE20
+
+/* Register Definitions */
+#define ADC_CMD_REG0x0
+#define ADC_IER_REG0x100
+#define ADC_ISR_REG0x104
+
+#define ADC_RUN_MSK0x1
+#define ADC_SINGLE_MKS 0x2
+#define ADC_STOP_MSK   0x0
+#define ADC_LOW_MSK0xFFF
+#define ADC_HIGH_MSK   0xFFF
+
+struct altera_adc {
+   void __iomem*seq_regs;
+   void __iomem*sample_regs;
+
+   unsigned intmode;
+   unsigned intslot_count;
+   unsigned intslot_sequence[MAX_ADC][MAX_SLOT];
+   unsigned intadc_number;
+};
+
+static int alt_modular_adc_read_raw(struct iio_dev *indio_dev,
+   struct iio_chan_spec const *chan,
+   int *val,
+   int *val2,
+   long mask)
+{
+   struct altera_adc *adc = iio_priv(indio_dev);
+   int ret = -EINVAL;
+   u32 value;
+
+   if (mask != IIO_CHAN_INFO_RAW)
+   return -EINVAL;
+
+   value = readl_relaxed(adc->sample_regs + (chan->address * 4));
+
+   if (adc->mode == MODE_SINGLE_ADC) {
+   *val = (value & ADC_LOW_MSK);
+   ret = IIO_VAL_INT;
+   } else if (adc->mode == MODE_DUAL_ADC) {
+   *val = (value & ADC_LOW_MSK);
+   *val2 = ((value & ADC_HIGH_MSK) >> 16);
+   ret = IIO_VAL_INT_MULTIPLE;
+   }
+
+   return ret;
+}
+
+static const struct iio_info adc_iio_info = {
+   .read_raw = &alt_modular_adc_read_raw,
+   .driver_module = THIS_MODULE,
+};
+
+static int alt_modular_adc_channel_init(struct iio_dev *indio_dev)
+{
+   struct altera_adc *a

[PATCH] Altera Modular ADC driver support

[Chee Nouk Phoo]

From: Chee Nouk Phoon 

Altera Modular ADC is soft IP that wraps the hardened ADC block in a Max10
device. It can be configured to dual ADC mode that supports two channel
synchronous sampling or independent single ADCs. ADC sampled values will be
written into memory slots in sequence determined by a user configurable
sequencer block.

This patch adds Altera Modular ADC driver support

Signed-off-by: Chee Nouk Phoon 
---
 drivers/iio/adc/Kconfig   |   12 ++
 drivers/iio/adc/Makefile  |1 +
 drivers/iio/adc/alt_modular_adc.c |  307 +
 3 files changed, 320 insertions(+), 0 deletions(-)
 create mode 100644 drivers/iio/adc/alt_modular_adc.c

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index eb0cd89..b0b1cff 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -117,6 +117,18 @@ config AD799X
  i2c analog to digital converters (ADC). Provides direct access
  via sysfs.
 
+config ALT_MODULAR_ADC
+   tristate "Altera Modular ADC driver"
+   depends on NIOS2
+   select ANON_INODES
+
+   help
+ Say yes here to have support for Altera Modular ADC. The driver
+ supports both Altera Modular ADC and Altera Modular Dual ADC.
+
+ The driver can also be build as a module. If so the module will be
+ called alt_modular_adc.
+
 config AT91_ADC
tristate "Atmel AT91 ADC"
depends on ARCH_AT91
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index a096210..d7f10e0 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_VF610_ADC) += vf610_adc.o
 obj-$(CONFIG_VIPERBOARD_ADC) += viperboard_adc.o
 xilinx-xadc-y := xilinx-xadc-core.o xilinx-xadc-events.o
 obj-$(CONFIG_XILINX_XADC) += xilinx-xadc.o
+obj-$(CONFIG_ALT_MODULAR_ADC) += alt_modular_adc.o
diff --git a/drivers/iio/adc/alt_modular_adc.c 
b/drivers/iio/adc/alt_modular_adc.c
new file mode 100644
index 000..a5649d7
--- /dev/null
+++ b/drivers/iio/adc/alt_modular_adc.c
@@ -0,0 +1,307 @@
+/*
+ * Copyright (C) 2015 Altera Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/* Constant Definitions */
+#define MODE_MAX_SLOT  64
+#define MODE_MAX_ADC   2
+#define MODE_MAX_CHANNEL   18
+#define MODE_SINGLE_ADC1
+#define MODE_DUAL_ADC  2
+#define MODE_ADC_BITS  12
+#define MODE_ADC_STORE_BITS16
+
+/* Register Definitions */
+#define ADC_CMD_REG0x0
+#define ADC_IER_REG0x100
+#define ADC_ISR_REG0x104
+
+#define ADC_RUN_MSK0x1
+#define ADC_SINGLE_MKS 0x2
+#define ADC_STOP_MSK   0x0
+#define ADC_LOW_MSK0xFFF
+#define ADC_HIGH_MSK   0xFFF
+
+struct altera_adc {
+   void __iomem*seq_regs;
+   void __iomem*sample_regs;
+
+   unsigned intmode;
+   unsigned intslot_count;
+   unsigned intslot_sequence[MODE_MAX_ADC][MODE_MAX_SLOT];
+   unsigned intadc_number;
+
+   u32 value;
+   u32 address;
+};
+
+static int alt_modular_adc_read_raw(struct iio_dev *indio_dev,
+   struct iio_chan_spec const *chan,
+   int *val,
+   int *val2,
+   long mask)
+{
+   struct altera_adc *adc = iio_priv(indio_dev);
+   int ret = -EINVAL;
+
+   if (mask != IIO_CHAN_INFO_RAW)
+   return -EINVAL;
+
+   adc->value = readl(adc->sample_regs + (chan->address * 4));
+
+   if (adc->mode == MODE_SINGLE_ADC) {
+   *val = (adc->value & ADC_LOW_MSK);
+   ret = IIO_VAL_INT;
+   } else if (adc->mode == MODE_DUAL_ADC) {
+   *val = (adc->value & ADC_LOW_MSK);
+   *val2 = ((adc->value & ADC_HIGH_MSK) >> 16);
+   ret = IIO_VAL_INT_MULTIPLE;
+   }
+
+   return ret;
+}
+
+static const struct iio_info adc_iio_info = {
+   .read_raw = &alt_modular_adc_read_raw,
+   .driver_module = THIS_MODULE,
+};
+
+static int alt_modular_adc_channel_init(struct iio_dev *indio_dev)
+{
+   struct altera_adc *adc = iio_priv(indio_dev)

[PATCH] Altera Modular ADC driver device tree binding

[Chee Nouk Phoo]

From: Chee Nouk Phoon 

Altera Modular ADC is soft IP that wraps the hardened ADC block in a Max1
device. It can be configured to dual ADC mode that supports two channel
synchronous sampling or independent single ADCs. ADC sampled values will be
written into memory slots in sequence determined by a user configurable
sequencer block.

This patch adds device tree binding for Altera Modular ADC driver

Signed-off-by: Chee Nouk Phoon 
---
 .../bindings/iio/adc/altr,modular-adc.txt  |   63 
 1 files changed, 63 insertions(+), 0 deletions(-)
 create mode 100755 
Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt

diff --git a/Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt 
b/Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt
new file mode 100755
index 000..4106cb4
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/altr,modular-adc.txt
@@ -0,0 +1,63 @@
+Altera Modular (Dual) ADC
+
+This binding document describes both Altera Modular ADC and Altera Modular Dual
+ADC. Both options can be configured during generation time in Qsys. This driver
+only support standard sequencer with Avalon-MM sample storage with up to 64
+memory slots.
+
+Required properties:
+- compatible: must be one of the following strings
+  "altr,modular-adc": single ADC configuration
+  "altr,modular-dual-adc": dual ADC configuration
+
+- reg: Address and length of the register set for the device. It contains the
+  information of registers in the same order as described by reg-names
+
+- reg-names: Should contain the reg names
+  "sequencer_csr": register region for adc sequencer block
+  "sample_store_csr": register region for sample store block
+
+- interrupts: interrupt line for ADC
+
+- altr,adc-mode : ADC configuration
+  1: single ADC mode
+  2: dual ADC mode
+
+- altr,adc-slot-count : specify number of conversion slot in use
+
+- altr,adc-slot-sequence-: specify ADC channel 
+  conversion sequence
+  : instantiated ADC number
+  : slot index for ADC memory slot
+
+- altr,adc-number : specify ADC number when single ADC mode is selected
+  1: 1st ADC
+  2: 2nd ACD
+
+Example: single ADC
+modular_adc_0: adc@0x2200 {
+  compatible = "altr,modular-adc";
+  reg = <0x2000 0x0008>,
+<0x2200 0x0200>;
+  reg-names = "sequencer_csr", "sample_store_csr";
+  interrupt-parent = <&cpu>;
+  interrupts = <8>;
+  altr,adc-mode = <1>;
+  altr,adc-slot-count = <2>;
+  altr,adc1-slot-sequence-1 = <1>;
+  altr,adc-number = <1>;
+};
+
+Example: dual ADC
+modular_adc_1: adc@0x18002200 {
+  compatible = "altr,modular-dual-adc";
+  reg = <0x18002000 0x0008>,
+<0x18002200 0x0200>;
+  reg-names = "sequencer_csr", "sample_store_csr";
+  interrupt-parent = <&cpu>;
+  interrupts = <8>;
+  altr,adc-mode = <2>;
+  altr,adc-slot-count = <1>;
+  altr,adc1-slot-sequence-1 = <6>;
+  altr,adc2-slot-sequence-1 = <6>;
+};
\ No newline at end of file
-- 
1.7.1

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