Re: [PATCH] mmc: host: arasan: sdhci-of-arasan: Remove no-hispd and no-cmd23 quirks for sdhci-arasan4.9a
Hi,
On 01/05/2016 07:25 PM, Rameshwar Sahu wrote:
> Hi Ulf,
>
> On Wed, Dec 23, 2015 at 6:59 PM, Rameshswar Prasad Sahu wrote:
>> From: Rameshwar Prasad Sahu
>>
>> The Arason SD host controller supports set block count command (cmd23)
>> and high speed mode. This patch re-enable both of these features that
>> was disabled. For device that doesn't support high speed, it should
>> configure its capability register accordingly instead disables it
>> explicitly.
>>
>> Signed-off-by: Rameshwar Prasad Sahu
>> ---
>> drivers/mmc/host/sdhci-of-arasan.c |5 -
>> 1 files changed, 0 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-of-arasan.c
>> b/drivers/mmc/host/sdhci-of-arasan.c
>> index 75379cb..5d9fdb3 100644
>> --- a/drivers/mmc/host/sdhci-of-arasan.c
>> +++ b/drivers/mmc/host/sdhci-of-arasan.c
>> @@ -172,11 +172,6 @@ static int sdhci_arasan_probe(struct platform_device
>> *pdev)
>> goto clk_disable_all;
>> }
>>
>> - if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a"))
>> {
>> - host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
>> - host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
I'm not sure what's correct since i didn't have any information for arasan.
But in case of exynos, SDHCI_QUIRK_NO_HISPD_BIT is used because that bit is
used as other purpose.
If your SoC is not used anymore, i think this patch looks good.
Best Regards,
Jaehoon Chung
>> - }
>> -
>> sdhci_get_of_property(pdev);
>> pltfm_host = sdhci_priv(host);
>> pltfm_host->priv = sdhci_arasan;
>> --
>> 1.7.1
>>
>
> Any comment on this patch ??
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>
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Re: [RFC PATCH v8 10/10] arm: zx_defconfig: remove CONFIG_MMC_DW_IDMAC
Hi, All. Is there any other opinion about this patch? Best Regards, Jaehoon Chung On 09/16/2015 03:43 PM, Shawn Lin wrote: > DesignWare MMC Controller's transfer mode should be decided > at runtime instead of compile-time. So we remove this config > option and read dw_mmc's register to select DMA master. > > Signed-off-by: Shawn Lin > --- > > Changes in v8: None > Changes in v7: None > Changes in v6: None > Changes in v5: None > Changes in v4: None > Changes in v3: None > Changes in v2: None > > arch/arm/configs/zx_defconfig | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm/configs/zx_defconfig b/arch/arm/configs/zx_defconfig > index b200bb0..ab683fb 100644 > --- a/arch/arm/configs/zx_defconfig > +++ b/arch/arm/configs/zx_defconfig > @@ -83,7 +83,6 @@ CONFIG_MMC=y > CONFIG_MMC_UNSAFE_RESUME=y > CONFIG_MMC_BLOCK_MINORS=16 > CONFIG_MMC_DW=y > -CONFIG_MMC_DW_IDMAC=y > CONFIG_EXT2_FS=y > CONFIG_EXT4_FS=y > CONFIG_EXT4_FS_POSIX_ACL=y > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH v8 09/10] arm: multi_v7_defconfig: remove CONFIG_MMC_DW_IDMAC
Hi, All. Is there any other opinion about this patch? Best Regards, Jaehoon Chung On 09/16/2015 03:43 PM, Shawn Lin wrote: > DesignWare MMC Controller's transfer mode should be decided > at runtime instead of compile-time. So we remove this config > option and read dw_mmc's register to select DMA master. > > Signed-off-by: Shawn Lin > --- > > Changes in v8: None > Changes in v7: None > Changes in v6: None > Changes in v5: None > Changes in v4: None > Changes in v3: None > Changes in v2: None > > arch/arm/configs/multi_v7_defconfig | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm/configs/multi_v7_defconfig > b/arch/arm/configs/multi_v7_defconfig > index 03deb7f..ad929ea 100644 > --- a/arch/arm/configs/multi_v7_defconfig > +++ b/arch/arm/configs/multi_v7_defconfig > @@ -539,7 +539,6 @@ CONFIG_MMC_ATMELMCI=y > CONFIG_MMC_MVSDIO=y > CONFIG_MMC_SDHI=y > CONFIG_MMC_DW=y > -CONFIG_MMC_DW_IDMAC=y > CONFIG_MMC_DW_PLTFM=y > CONFIG_MMC_DW_EXYNOS=y > CONFIG_MMC_DW_ROCKCHIP=y > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support
Hi, Anand. On 10/14/2015 12:58 PM, Anand Moon wrote: > hi Krzysztof, > > On 14 October 2015 at 05:29, Krzysztof Kozlowski > wrote: >> On 14.10.2015 01:27, Anand Moon wrote: >>> Hi Krzysztof, >>> >>> On 13 October 2015 at 09:13, Krzysztof Kozlowski >>> wrote: >>>> >>>> On 13.10.2015 12:08, Anand Moon wrote: >>>>> Hi Krzysztof, >>>>> >>>>> On 13 October 2015 at 05:44, Krzysztof Kozlowski >>>>> wrote: >>>>>> On 13.10.2015 00:32, Anand Moon wrote: >>>>>>> Hi Krzysztof, >>>>>>> >>>>>>> On 12 October 2015 at 11:14, Krzysztof Kozlowski >>>>>>> wrote: >>>>>>>> On 12.10.2015 00:46, Anand Moon wrote: >>>>>>>>> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s >>>>>>>>> (SDR104) >>>>>>>> >>>>>>>> This description is not entirely correct. The MMC driver already >>>>>>>> supports these UHS speeds (you did not any code) so you rather enabled >>>>>>>> it (description of bindings says "is supported"). >>>>>>>> >>>>>>>> You mentioned DDR50 but I don't see respective property below. >>>>>>>> >>>>>>>> How do you know that these modes are really supported? I don't know. >>>>>>>> Can >>>>>>>> you convince me? >>>>>>> >>>>>>> Setting this DDR50 capability give me this error. That's the reason to >>>>>>> drop this capability. >>>>>> >>>>>> But you mentioned it in commit message! "Added support for UHS-I ... >>>>>> (DDR50)" >>>>>> >>>>>> In the same time dropping DDR50 is not an sufficient proof that "SDR50 >>>>>> and SDR104 are really supported". >>>>>> >>>>> >>>>> These changes are related to the microSD card capabilities. >>>>> So SDR50 have better frequency over DDR50. On the same Sandisk card. >>>>> >>>>> When the card select the capability for DDR50 >>>>> --- >>>>> [4.001477] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot >>>>> req 5000Hz, actual 5000HZ div = 0) >>>>> [4.001604] mmc1: new ultra high speed DDR50 SDHC card at address >>>>> [4.004505] mmcblk0: mmc1: SL32G 29.7 GiB >>>>> [4.009179] mmcblk0: error -110 sending status command, retrying >>>>> [4.009271] mmcblk0: error -115 sending stop command, original cmd >>>>> response 0x900, card status 0x900 >>>>> [4.009275] mmcblk0: error -84 transferring data, sector 0, nr 8, >>>>> cmd response 0x900, card status 0x0 >>>>> [4.025563] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot >>>>> req 40Hz, actual 396825HZ div = 63) >>>>> [4.067770] Console: switching to colour frame buffer device 274x77 >>>>> [4.098782] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot >>>>> req 5000Hz, actual 5000HZ div = 0) >>>>> [4.099692] mmc1: tried to reset card >>>>> [4.101332] mmcblk0: p1 p2 I found this issue that produced on your board. I will send the patch and test DDR50 on your board. Best Regards, Jaehoon Chung >>>>> >>>>> >>>>> When the card select the capability for SDR50 >>>>> - >>>>> [ 2.439806] mmc_host mmc1: Bus speed (slot 0) = 1Hz (slot req >>>>> 1Hz, actual 1HZ div = 0) >>>>> [ 2.449729] mmc1: new ultra high speed SDR50 SDHC card at address >>>>> [ 2.455984] mmcblk0: mmc1: SL32G 29.7 GiB >>>>> [ 2.461743] mmcblk0: p1 p2 >>>>> >>>>> Which will relate to better read/write speed. >>>> >>>> Which is not an answer to my question. To none of my previous questions. >>>> >>> >>> Basically UHS-I capability (sd-uhs-sdr12, sd-uhs-sdr25, sd-uhs-sdr50, >>> sd-uhs-sdr104) help tune speed supported for mmc >>> >>> I have tired to compare the speed on high speed UHS-I vs ul
Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support
On 10/14/2015 10:15 AM, Krzysztof Kozlowski wrote: > On 14.10.2015 10:06, Alim Akhtar wrote: >> +Doug >> Hello, >> AFAIR, dw_mmc host controller does support UHS-I [1], specially SDR50 >> and SDR104 modes. >> >> [1]: http://www.spinics.net/lists/linux-mmc/msg28186.html >> >> What I remember is, one need to set "broken-cd" property also in order >> to make it work because of the vqmmc and vmmc connection on board. I >> didn't find the link right now, but you can search on the web, there >> was a long discussion about handling this. >> Have not checked it recently, so not sure if this got broken somehow. >> > > Please, don't top post. > > I am not a SD/MMC specialist (I do not feel enough confident in its > internals) but the datasheet for 5422 does not mention UHS. However it > mentions "High Speed DDR Mode with 200 MHz clock rate (HS400)". This > does not look like UHS... You're right. It's not UHS mode. it mentions eMMC's HS400 mode. UHS and HS400 are difference mode. eMMC mode are supported > https://www.sdcard.org/developers/overview/bus_speed/ > This of course is not a definite proof that 5422 does not support UHS. I > am just saying that I couldn't find any information that *it does*. Well, I think you want to know whether it supported or not. Then you can find the information at User manual. In mobile storage part of User manual, it described the overview. Mobile storage host supports these specification: - Secure Digital memory (SD memory version 3.0) - Secure Digital I/O SDIO (SDIO version 3.0) - etc... SD3.0 is supported UHS-I mode. If user manual of exynos5422 is mentioned this specification, it should be supported UHS-I mode. If my understanding is wrong, let me know, plz. Best Regards, Jaehoon Chung > > Best regards, > Krzysztof > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] ARM: dts: use vmmc-supply of emmc/sd for exynos5422-odroidxu3
s value from? It looks wrong... My datasheet does
>>>>>>> not have 12000 uV/uS.
>>>>>>
>>>>>
>>>>>> Anand,
>>>>>>
>>>>>> We have actually been here:
>>>>>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/351601.html
>>>>>>
>>>>>> That time you used 8000. I asked the same question - how did you figure
>>>>>> out the exact value.
>>>>>>
>>>>>> Now we have the same question - why 12000?
>>>>>>
>>>>>> It is completely fine to make a mistake (I do a lot of them) but please
>>>>>> try not to make the same mistake again.
>>>>>>
>>>>>> BR,
>>>>>> Krzysztof
>>>>>
>>>>> I will focus more in the future to clamp down my mistakes to minimal.
>>>>>
>>>>>>
>>>>>>>
>>>>>>>> };
>>>>>>>>
>>>>>>>> ldo24_reg: LDO24 {
>>>>>>>> @@ -338,6 +341,7 @@
>>>>>>>> samsung,dw-mshc-ddr-timing = <0 2>;
>>>>>>>> samsung,dw-mshc-hs400-timing = <0 2>;
>>>>>>>> samsung,read-strobe-delay = <90>;
>>>>>>>> +vmmc-supply = <&ldo3_reg>;
>>>>>>>> pinctrl-names = "default";
>>>>>>>> pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8
>>>>>>>> &sd0_cd &sd0_rclk>;
>>>>>>>> bus-width = <8>;
>>>>>>>> @@ -352,6 +356,8 @@
>>>>>>>> samsung,dw-mshc-ciu-div = <3>;
>>>>>>>> samsung,dw-mshc-sdr-timing = <0 4>;
>>>>>>>> samsung,dw-mshc-ddr-timing = <0 2>;
>>>>>>>> +vmmc-supply = <&ldo19_reg>;
>>>>>>>> +vqmmc-supply = <&ldo13_reg>;
>>>>>>>
>>>>>>> It looks wrong. LDO13 is used in one place as VQMMC and in other as
>>>>>>> VMMC. How did you figure out which regulator supplies which power
>>>>>>> domain?
>>>>>>>
>>>>>
>>>>> I refer Schematics diagram to XU4_MAIN_REV0.1.pdf
>>>>>
>>>>> From the PWR_PMCI_S2MPS11_LDO_CTRL document it LDO13 point to VDDQ_MMC2.
>>>>>
>>>>
>>>> Aaa right, by mistake I thought that you put LDO13 here and in the node
>>>> before, but there is LDO3, not 13. You did this correctly.
>>>>
>>>> But I have two other questions:
>>>> 1. Maybe these regulators now should not be always-enabled?
>>>
>>> regulator-always-on can be removed: I have tested this.
>>>
>>>> 2. Why changing minimum voltage of LDO13 to 1.8V? The schematics says 2.8V.
>>>>
>>>
>>> In the schematics diagram to XU4_MAIN_REV0.1.pdf
>>>
>>> >From the EXYNOS5422 MMC UFS diagram CH2 range is VDDQ_MMC2 (1.8V/2.8V).
>>
>> Okay, so try to setting it to 1.8V (min and max) and see if it works
>> correctly.
>>
>> On the same diagram few lines below:
>> VDDQ_MMC2: 2.8V 250mA
>>
>
> You are correct.
> While working on this issue I tent to encounter make bugs.
> -
> [4.713553] random: nonblocking pool is initialized
> [4.718423] 1453.hdmi supply hdmi-en not found, using dummy regulator
> [4.726206] exynos-drm exynos-drm: bound 1440.fimd (ops
> fimd_component_ops)
> [4.732555] exynos-drm exynos-drm: bound 1445.mixer (ops
> mixer_component_ops)
> [4.740180] exynos-drm exynos-drm: bound 1453.hdmi (ops
> hdmi_component_ops)
> [4.746936] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [4.753428] [drm] No driver support for vblank timestamp query.
> [4.940794] Console: switching to colour frame buffer device 274x77
> [4.995344] exynos-drm exynos-drm: fb0: frame buffer device
> [5.024573] [drm] Initialized exynos 1.0.0 20110530 on minor 0
> [5.031164] exynos-dwc3 usb@1200: no suspend clk specified
> [5.054571] usb 2-1: new full-speed USB device number 2 using exynos-ohci
> [5.159527] dwmmc_exynos 1222.mmc: Busy; trying anyway
> [5.163705] mmc_host mmc1: Timeout sending command (cmd 0x202000
> arg 0x0 status 0x0)
> -
> This is one bug. related to this changes. It stops booting waiting for
> the mmc1 card.
It seems that it failed to switch voltage.
Best Regards,
Jaehoon Chung
>
> -Anand Moon
>
>> Best regards,
>> Krzysztof
>
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Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support
On 10/12/2015 10:16 PM, Krzysztof Kozlowski wrote:
> W dniu 12.10.2015 o 22:04, Jaehoon Chung pisze:
>> On 10/12/2015 09:42 PM, Krzysztof Kozlowski wrote:
>>> W dniu 12.10.2015 o 19:46, Anand Moon pisze:
>>>> Hi Krzysztof,
>>>>
>>>> On 12 October 2015 at 11:14, Krzysztof Kozlowski
>>>> wrote:
>>>>> On 12.10.2015 00:46, Anand Moon wrote:
>>>>>> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104)
>>>>>
>>>>> This description is not entirely correct. The MMC driver already
>>>>> supports these UHS speeds (you did not any code) so you rather enabled
>>>>> it (description of bindings says "is supported").
>>>>>
>>>>> You mentioned DDR50 but I don't see respective property below.
>>>> Looks like I missed it, I will add this in the next patch,
>>>>>
>>>>> How do you know that these modes are really supported? I don't know. Can
>>>>> you convince me?
>>>
>>> That part was not answered...
>>
>> In my experiment, it needs two requirements.
>> One is that Host controller supported UHS-I mode or others, other is SD-card.
>> In Anand's commit message, there is no information for this.
>>
>> And 50MB/s or 104MB/s is not real performance. (Just theoretical values)
>> It seems that can get those performances.
>
> Right. But do you know if the host actually supports these?
Actually, it needs to check the User Manual for SoC.
If i can't check the User manual, i can't also know whether it supports or not.
Especially, there is no register that can be known which SD specification
version at dw-mmc controller.
Well, if i miss something, let me know. I will also check more.
Best Regards,
Jaehoon Chung
>
>>
>>>
>>>>>
>>>>
>>>>>>
>>>>>> Signed-off-by: Anand Moon
>>>>>>
>>>>>> ---
>>>>>> Changes based on
>>>>>> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
>>>>>> v4.4-next/dt-samsung branch
>>>>>>
>>>>>> Changes Fixed the UHS-I bus speed detedtion on cold boot.
>>>>>
>>>>> I don't get what is exactly fixed here. What was the error? What is the
>>>>> outcome of this fix? The log below is before or after?
>>>>>
>>>>> Best regards,
>>>>> Krzysztof
>>>>>
>>>>>>
>>>>>> [2.439806] mmc_host mmc1: Bus speed (slot 0) = 1Hz (slot req
>>>>>> 1Hz, actual 1HZ div = 0)
>>>>>> [2.449729] mmc1: new ultra high speed SDR50 SDHC card at address
>>>>>> [2.455984] mmcblk0: mmc1: SL32G 29.7 GiB
>>>>>> [2.461743] mmcblk0: p1 p2
>>>>>
>>>>>> ---
>>>>>> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 4
>>>>>> 1 file changed, 4 insertions(+)
>>>>>>
>>>>>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>>>> b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>>>> index 58c06d3..ba4a87b 100644
>>>>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>>>> @@ -364,6 +364,10 @@
>>>>>> pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
>>>>>> bus-width = <4>;
>>>>>> cap-sd-highspeed;
>>>>>> + sd-uhs-sdr12;
>>>>>> + sd-uhs-sdr25;
>>>>>> + sd-uhs-sdr50;
>>>>>> + sd-uhs-sdr104;
>>>>>> };
>>>>>>
>>>>>> &pinctrl_0 {
>>>>>>
>>>>>
>>>>
>>>> Changes were made to support Sandisk Ultra UHS-I class 10 card support.
>>>> OdroidXU3/XU4 board would not boot up using this card.
>>>>
>>>> Depending on the capability of the UHS-I card, the speed of the card
>>>> is selected.
>>>> I have just added the enhance capability feature to support them.
>>>
>>> So without these capabilities mentioned microSD card cannot be used? So
>>> I have a UHS-I card, that one exactly:
>>> http://www.samsung.com/us/support/owners/product/M
Re: [PATCH 1/3] ARM: dts: exynos5422-odroidxu3: use cd-gpio method to detect sd-card
Dear, Anand.
On 10/13/2015 09:12 AM, Krzysztof Kozlowski wrote:
> On 12.10.2015 23:47, Anand Moon wrote:
>>>
>>> Anand,
>>>
>>> You essentially reverted here af6ad88acbd6 ("ARM: dts: Mux XMMCnDATA[0]
>>> pad correctly for Exynos5420 boards"). Why? There is no explanation in
>>> the commit message about this.
>>
>> I don't remember to send the patch relevant to this. Hmm...
>> Well, Is this patch really signed-off by me?
>>
>> Best Regards,
>>
>> Jaehoon Chung
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>
>>>
>>
>>
>> Some how I don't receive these mail on my email id.
>>
>> I have picked up these changes from tizen repository for OdroidXU3.
>> I have tested with this changes to detect UHS-I micro cd cards.
>> That's the reason for this email.
It seems to make manually, right?
I have checked the tizen repository.
The below is
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -335,7 +335,9 @@
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
pinctrl-names = "default";
- pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
+ cd-gpios = <&gpc2 2 0>;
+ cd-inverted;
+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
bus-width = <4>;
cap-sd-highspeed;
};
Yours
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -352,8 +352,10 @@
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
+ cd-gpios = <&gpc2 2 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
pinctrl-names = "default";
- pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
Did you know what differ? :)
Best Regards,
Jaehoon Chung
>
> ... and you applied it blindly without looking at actual existing
> contents and at previous commits.
>
> That is not how patches from different repositories should be cherry picked.
>
> Best regards,
> Krzysztof
>
>
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Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support
On 10/12/2015 09:42 PM, Krzysztof Kozlowski wrote:
> W dniu 12.10.2015 o 19:46, Anand Moon pisze:
>> Hi Krzysztof,
>>
>> On 12 October 2015 at 11:14, Krzysztof Kozlowski
>> wrote:
>>> On 12.10.2015 00:46, Anand Moon wrote:
>>>> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104)
>>>
>>> This description is not entirely correct. The MMC driver already
>>> supports these UHS speeds (you did not any code) so you rather enabled
>>> it (description of bindings says "is supported").
>>>
>>> You mentioned DDR50 but I don't see respective property below.
>> Looks like I missed it, I will add this in the next patch,
>>>
>>> How do you know that these modes are really supported? I don't know. Can
>>> you convince me?
>
> That part was not answered...
In my experiment, it needs two requirements.
One is that Host controller supported UHS-I mode or others, other is SD-card.
In Anand's commit message, there is no information for this.
And 50MB/s or 104MB/s is not real performance. (Just theoretical values)
It seems that can get those performances.
>
>>>
>>
>>>>
>>>> Signed-off-by: Anand Moon
>>>>
>>>> ---
>>>> Changes based on
>>>> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
>>>> v4.4-next/dt-samsung branch
>>>>
>>>> Changes Fixed the UHS-I bus speed detedtion on cold boot.
>>>
>>> I don't get what is exactly fixed here. What was the error? What is the
>>> outcome of this fix? The log below is before or after?
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>>>
>>>> [2.439806] mmc_host mmc1: Bus speed (slot 0) = 1Hz (slot req
>>>> 1Hz, actual 1HZ div = 0)
>>>> [2.449729] mmc1: new ultra high speed SDR50 SDHC card at address
>>>> [2.455984] mmcblk0: mmc1: SL32G 29.7 GiB
>>>> [2.461743] mmcblk0: p1 p2
>>>
>>>> ---
>>>> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 4
>>>> 1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>> b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>> index 58c06d3..ba4a87b 100644
>>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>>> @@ -364,6 +364,10 @@
>>>> pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
>>>> bus-width = <4>;
>>>> cap-sd-highspeed;
>>>> + sd-uhs-sdr12;
>>>> + sd-uhs-sdr25;
>>>> + sd-uhs-sdr50;
>>>> + sd-uhs-sdr104;
>>>> };
>>>>
>>>> &pinctrl_0 {
>>>>
>>>
>>
>> Changes were made to support Sandisk Ultra UHS-I class 10 card support.
>> OdroidXU3/XU4 board would not boot up using this card.
>>
>> Depending on the capability of the UHS-I card, the speed of the card
>> is selected.
>> I have just added the enhance capability feature to support them.
>
> So without these capabilities mentioned microSD card cannot be used? So
> I have a UHS-I card, that one exactly:
> http://www.samsung.com/us/support/owners/product/MB-MP32D/APC
>
> It works:
> [2.628365] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot req
> 5000Hz, actual 5000HZ div = 0)
> [2.693296] mmc1: new high speed SDHC card at address 0001
> [2.703867] mmcblk0: mmc1:0001 0 29.8 GiB
> [2.708406] mmcblk0: p1 p2
>
> This is just HS mode.
>
> In the same time isn't UHS-I backward compatible? Your report seems
> surprising.
Right. it's not issue. just working as lower mode than its capability.
Best Regards,
Jaehoon Chung
>
> Best regards,
> Krzysztof
>
>>
>> On warm boot: i.e reboot of the board.
>> [4.649073] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot
>> req 5000Hz, actual 5000HZ div = 0)
>> [4.657555] mmc1: new high speed SDHC card at address
>> [4.663787] mmcblk0: mmc1: SL32G 29.7 GiB
>> [4.669206] mmcblk0: p1 p2
>>
>> On cold boot:: ie: power on the board.
>>
>> [4.630237] mmc_host mmc1: Bus speed (slot 0) = 1Hz (slot
>> req 1Hz, actual 1HZ div = 0)
>> [4.639820] mmc1: new ultra high speed SDR50 SDHC card at address
>> [4.646266] mmcblk0: mmc1: SL32G 29.7 GiB
>> [4.650293] IRQ56 no longer affine to CPU7
>> [4.650581] CPU7: shutdown
>> [4.658293] mmcblk0: p1 p2
>>
>> Note: Their is need to reset the PMIC
>> S2MPS11_REG_L13CTRL/S2MPS11_REG_L19CTRL registers
>> to support this feature consistently on every reboot.
>>
>> -Anand Moon
>> --
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>>
>
>
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Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support
On 10/12/2015 07:46 PM, Anand Moon wrote:
> Hi Krzysztof,
>
> On 12 October 2015 at 11:14, Krzysztof Kozlowski
> wrote:
>> On 12.10.2015 00:46, Anand Moon wrote:
>>> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104)
>>
>> This description is not entirely correct. The MMC driver already
>> supports these UHS speeds (you did not any code) so you rather enabled
>> it (description of bindings says "is supported").
>>
>> You mentioned DDR50 but I don't see respective property below.
> Looks like I missed it, I will add this in the next patch,
>>
>> How do you know that these modes are really supported? I don't know. Can
>> you convince me?
>>
>
>>>
>>> Signed-off-by: Anand Moon
>>>
>>> ---
>>> Changes based on
>>> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
>>> v4.4-next/dt-samsung branch
>>>
>>> Changes Fixed the UHS-I bus speed detedtion on cold boot.
>>
>> I don't get what is exactly fixed here. What was the error? What is the
>> outcome of this fix? The log below is before or after?
>>
>> Best regards,
>> Krzysztof
>>
>>>
>>> [2.439806] mmc_host mmc1: Bus speed (slot 0) = 1Hz (slot req
>>> 1Hz, actual 1HZ div = 0)
>>> [2.449729] mmc1: new ultra high speed SDR50 SDHC card at address
>>> [2.455984] mmcblk0: mmc1: SL32G 29.7 GiB
>>> [2.461743] mmcblk0: p1 p2
>>
>>> ---
>>> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 4
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> index 58c06d3..ba4a87b 100644
>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>>> @@ -364,6 +364,10 @@
>>> pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
>>> bus-width = <4>;
>>> cap-sd-highspeed;
>>> + sd-uhs-sdr12;
>>> + sd-uhs-sdr25;
>>> + sd-uhs-sdr50;
>>> + sd-uhs-sdr104;
>>> };
>>>
>>> &pinctrl_0 {
>>>
>>
>
> Changes were made to support Sandisk Ultra UHS-I class 10 card support.
> OdroidXU3/XU4 board would not boot up using this card.
>
> Depending on the capability of the UHS-I card, the speed of the card
> is selected.
> I have just added the enhance capability feature to support them.
>
> On warm boot: i.e reboot of the board.
> [4.649073] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot
> req 5000Hz, actual 5000HZ div = 0)
> [4.657555] mmc1: new high speed SDHC card at address
> [4.663787] mmcblk0: mmc1: SL32G 29.7 GiB
> [4.669206] mmcblk0: p1 p2
>
> On cold boot:: ie: power on the board.
>
> [4.630237] mmc_host mmc1: Bus speed (slot 0) = 10000Hz (slot
> req 1Hz, actual 1HZ div = 0)
> [4.639820] mmc1: new ultra high speed SDR50 SDHC card at address
> [4.646266] mmcblk0: mmc1: SL32G 29.7 GiB
> [4.650293] IRQ56 no longer affine to CPU7
> [4.650581] CPU7: shutdown
> [4.658293] mmcblk0: p1 p2
>
> Note: Their is need to reset the PMIC
> S2MPS11_REG_L13CTRL/S2MPS11_REG_L19CTRL registers
> to support this feature consistently on every reboot.
I don't understand...why needs to reset?
I know it needs to switch the voltage, doesn't it?
Best Regards,
Jaehoon Chung
>
> -Anand Moon
>
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Re: [PATCH 1/3] ARM: dts: exynos5422-odroidxu3: use cd-gpio method to detect sd-card
Hi,
On 10/12/2015 01:29 PM, Krzysztof Kozlowski wrote:
> On 12.10.2015 00:46, Anand Moon wrote:
>> From: Jaehoon Chung
>>
>> To detect sd-card use the cd-gpio method.
>> It can decrease the interrupt for detecting sd-card.
>>
>> Signed-off-by: Jaehoon Chung
>> Signed-off-by: Anand Moon
>>
>> ---
>> Changes based on
>> git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
>> v4.4-next/dt-samsung branch
>> ---
>> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> index 1af5bdc..26decbd 100644
>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> @@ -352,8 +352,10 @@
>> samsung,dw-mshc-ciu-div = <3>;
>> samsung,dw-mshc-sdr-timing = <0 4>;
>> samsung,dw-mshc-ddr-timing = <0 2>;
>> +cd-gpios = <&gpc2 2 GPIO_ACTIVE_HIGH>;
>> +cd-inverted;
>> pinctrl-names = "default";
>> -pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
>> +pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
Don't do change this.
>
> Anand,
>
> You essentially reverted here af6ad88acbd6 ("ARM: dts: Mux XMMCnDATA[0]
> pad correctly for Exynos5420 boards"). Why? There is no explanation in
> the commit message about this.
I don't remember to send the patch relevant to this. Hmm...
Well, Is this patch really signed-off by me?
Best Regards,
Jaehoon Chung
>
> Best regards,
> Krzysztof
>
>
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Re: [RFC PATCH v8 0/10] Add external dma support for Synopsys MSHC
Hi, Shawn. On 10/02/2015 06:49 PM, Shawn Lin wrote: > On 2015/10/1 17:14, Jaehoon Chung wrote: >> Dear, All. >> >> I will apply patch 01-03 at my repository on today. >> But i don't know better how i do about other patches relevant to config file. >> > > Thanks, Jaehoon. :) > > I guess it would be acceptable to pick the config changes, already they were > acked by the soc maintainers, via dw_mmc tree when ulf merge dw_mmc tree into > his mmc-tree. Some patches didn't get the maintainer's acked-by. I will wait for that..until this week. How about? Best Regards, Jaehoon Chung > > >> Best Regards, >> Jaehoon Chung >> >> On 09/16/2015 03:40 PM, Shawn Lin wrote: >>> Synopsys DesignWare mobile storage host controller supports three >>> types of transfer mode: pio, internal dma and external dma. However, >>> dw_mmc can only supports pio and internal dma now. Thus some platforms >>> using dw-mshc integrated with generic dma can't work in dma mode. So we >>> submit this patch to achieve it. >>> >>> And the config option, CONFIG_MMC_DW_IDMAC, was added by Will Newton >>> (commit:f95f3850) for the first version of dw_mmc and never be touched since >>> then. At that time dt-bindings hadn't been introduced into dw_mmc yet means >>> we should select CONFIG_MMC_DW_IDMAC to enable internal dma mode at compile >>> time. Nowadays, device-tree helps us to support a variety of boards with one >>> kernel. That's why we need to remove it and decide the transfer mode by >>> reading >>> dw_mmc's HCON reg at runtime. >>> >>> This RFC patch needs lots of ACKs. I know it's hard, but it does need >>> someone >>> to make the running. >>> >>> Patch does the following things: >>> - remove CONFIG_MMC_DW_IDMAC config option >>> - add bindings for edmac used by synopsys-dw-mshc >>>at runtime >>> - add edmac support for synopsys-dw-mshc >>> >>> Patch is based on next of git://git.linaro.org/people/ulf.hansson/mmc >>> >>> Test emmc throughput on my platform with edmac support and without edmac >>> support(pio only) >>> iozone -L64 -S32 -azecwI -+n -r4k -r64k -r128k -s1g -i0 -i1 -i2 -f datafile >>> -Rb out.xls > /mnt/result.txt >>> (light cpu loading, Direct IO, fixed line size, all pattern recycle, 1GB >>> data in total) >>> ___ >>> | external dma mode | >>> |---| >>> |blksz | Random Read | Random Write | Seq Read | Seq Write| >>> |---| >>> |4kB | 13953kB/s |8602kB/s | 13672kB/s | 9785kB/s| >>> |---| >>> |64kB | 46058kB/s | 24794kB/s | 48058kB/s | 25418kB/s| >>> |---| >>> |128kB | 57026kB/s | 35117kB/s | 57375kB/s | 35183kB/s| >>> |---| >>> VS >>> ___ >>> | pio mode | >>> |---| >>> |blksz | Random Read | Random Write | Seq Read | Seq Write| >>> |---| >>> |4kB | 11720kB/s | 8644kB/s | 11549kB/s | 9624kB/s| >>> |---| >>> |64kB | 21869kB/s | 24414kB/s | 22031kB/s | 27986kB/s| >>> |---| >>> |128kB | 23718kB/s | 34495kB/s | 24698kB/s | 34637kB/s| >>> |---| >>> >>> >>> Changes in v8: >>> - remove trans_mode variable >>> - remove unnecessary dma_ops check >>> - remove unnecessary comment >>> - fix coding style based on latest ulf's next >>> - add Acked-by: Jaehoon Chung >>>for HCON's changes >>> >>> Changes in v7: >>> - rebased on Ulf's next >>> - combine condition state >>> - elaborate more about DMA_INTERFACE >>> - define some macro for DMA_INERFACE value >>> - spilt HCON ops' changes into another patch >>>
Re: [RFC PATCH v8 0/10] Add external dma support for Synopsys MSHC
Dear, All. I will apply patch 01-03 at my repository on today. But i don't know better how i do about other patches relevant to config file. Best Regards, Jaehoon Chung On 09/16/2015 03:40 PM, Shawn Lin wrote: > Synopsys DesignWare mobile storage host controller supports three > types of transfer mode: pio, internal dma and external dma. However, > dw_mmc can only supports pio and internal dma now. Thus some platforms > using dw-mshc integrated with generic dma can't work in dma mode. So we > submit this patch to achieve it. > > And the config option, CONFIG_MMC_DW_IDMAC, was added by Will Newton > (commit:f95f3850) for the first version of dw_mmc and never be touched since > then. At that time dt-bindings hadn't been introduced into dw_mmc yet means > we should select CONFIG_MMC_DW_IDMAC to enable internal dma mode at compile > time. Nowadays, device-tree helps us to support a variety of boards with one > kernel. That's why we need to remove it and decide the transfer mode by > reading > dw_mmc's HCON reg at runtime. > > This RFC patch needs lots of ACKs. I know it's hard, but it does need someone > to make the running. > > Patch does the following things: > - remove CONFIG_MMC_DW_IDMAC config option > - add bindings for edmac used by synopsys-dw-mshc > at runtime > - add edmac support for synopsys-dw-mshc > > Patch is based on next of git://git.linaro.org/people/ulf.hansson/mmc > > Test emmc throughput on my platform with edmac support and without edmac > support(pio only) > iozone -L64 -S32 -azecwI -+n -r4k -r64k -r128k -s1g -i0 -i1 -i2 -f datafile > -Rb out.xls > /mnt/result.txt > (light cpu loading, Direct IO, fixed line size, all pattern recycle, 1GB data > in total) > ___ > | external dma mode | > |---| > |blksz | Random Read | Random Write | Seq Read | Seq Write| > |---| > |4kB | 13953kB/s |8602kB/s | 13672kB/s | 9785kB/s| > |---| > |64kB | 46058kB/s | 24794kB/s | 48058kB/s | 25418kB/s| > |---| > |128kB | 57026kB/s | 35117kB/s | 57375kB/s | 35183kB/s| > |---| >VS > ___ > | pio mode | > |---| > |blksz | Random Read | Random Write | Seq Read | Seq Write| > |---| > |4kB | 11720kB/s |8644kB/s | 11549kB/s | 9624kB/s| > |---| > |64kB | 21869kB/s | 24414kB/s | 22031kB/s | 27986kB/s| > |---| > |128kB | 23718kB/s | 34495kB/s | 24698kB/s | 34637kB/s| > |-------| > > > Changes in v8: > - remove trans_mode variable > - remove unnecessary dma_ops check > - remove unnecessary comment > - fix coding style based on latest ulf's next > - add Acked-by: Jaehoon Chung > for HCON's changes > > Changes in v7: > - rebased on Ulf's next > - combine condition state > - elaborate more about DMA_INTERFACE > - define some macro for DMA_INERFACE value > - spilt HCON ops' changes into another patch > > Changes in v6: > - add trans_mode condition for IDMAC initialization > suggested by Heiko > - re-test my patch on rk3188 platform and update commit msg > - update performance of pio vs edmac in cover letter > > Changes in v5: > - add the title of cover letter > - fix typo of comment > - add macro for reading HCON register > - add "Acked-by: Krzysztof Kozlowski " for > exynos_defconfig patch > - add "Acked-by: Vineet Gupta " for axs10x_defconfig > patch > - add "Acked-by: Govindraj Raja " and > "Acked-by: Ralf Baechle " for pistachio_defconfig patch > - add "Acked-by: Joachim Eastwood " for lpc18xx_defconfig > patch > - add "Acked-by: Wei Xu " for hisi_defconfig patch > - rebase on "https://github.com/jh80chung/dw-mmc.git > tags/dw-mmc-for-ulf-v4.2" for merging easily > > Changes in v4: > - remove "host->trans_mode" and use "host->use_dma" to indicate > transfer mode. > - remove all bt-bindings' changes since we don't nee
Re: [RFC PATCH v7 02/10] mmc: dw_mmc: use macro for HCON register operations
Hi, Shawn.
Looks good to me.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 08/24/2015 10:25 AM, Shawn Lin wrote:
> This patch add some macros for HCON register operations
> to make code more readable.
>
> Signed-off-by: Shawn Lin
> ---
>
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> drivers/mmc/host/dw_mmc.c | 6 +++---
> drivers/mmc/host/dw_mmc.h | 3 +++
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 9c91983..0a3c63c 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -2678,7 +2678,7 @@ static void dw_mci_init_dma(struct dw_mci *host)
> * Check ADDR_CONFIG bit in HCON to find
> * IDMAC address bus width
> */
> - addr_config = (mci_readl(host, HCON) >> 27) & 0x01;
> + addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON));
>
> if (addr_config == 1) {
> /* host supports IDMAC in 64-bit address mode */
> @@ -3060,7 +3060,7 @@ int dw_mci_probe(struct dw_mci *host)
>* Get the host data width - this assumes that HCON has been set with
>* the correct values.
>*/
> - i = (mci_readl(host, HCON) >> 7) & 0x7;
> + i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON));
> if (!i) {
> host->push_data = dw_mci_push_data16;
> host->pull_data = dw_mci_pull_data16;
> @@ -3142,7 +3142,7 @@ int dw_mci_probe(struct dw_mci *host)
> if (host->pdata->num_slots)
> host->num_slots = host->pdata->num_slots;
> else
> - host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
> + host->num_slots = SDMMC_GET_SLOT_NUM(mci_readl(host, HCON));
>
> /*
>* Enable interrupts for command done, data over, data empty,
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 811d467..f2a88d4 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -154,6 +154,9 @@
> #define DMA_INTERFACE_GDMA (0x2)
> #define DMA_INTERFACE_NODMA (0x3)
> #define SDMMC_GET_TRANS_MODE(x) (((x)>>16) & 0x3)
> +#define SDMMC_GET_SLOT_NUM(x)x)>>1) & 0x1F) + 1)
> +#define SDMMC_GET_HDATA_WIDTH(x) (((x)>>7) & 0x7)
> +#define SDMMC_GET_ADDR_CONFIG(x) (((x)>>27) & 0x1)
> /* Internal DMAC interrupt defines */
> #define SDMMC_IDMAC_INT_AI BIT(9)
> #define SDMMC_IDMAC_INT_NI BIT(8)
>
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Re: [RFC PATCH v7 01/10] mmc: dw_mmc: Add external dma interface support
ce, Generic DMA Interface has a
> + * simpler request/acknowledge handshake mechanism and both of them
> + * are regarded as external dma master for dw_mmc.
> + * Note: host->use_dma can't take HCON[17:16] value directly for the
> + * the reason mentioned above.
> + */
trans_mode can't take HCON value, but trans_mode reassigned to
"TRANS_MODE_IDMAC" or "TRANS_MODE_EDMAC"..
It's reassigned to host->use_dma...why can't use the host->use_dma?
Your code..
1. trans_mode <- HCON value
2. Check trans_mode which interface use.
then trans_mode <- TRANS_MODE_IDMAC/EDMAC/PIO
3. host->use_dma <- trans_mode
isn't?
It can be replaced to "host->use_dma" instead of "trans_mode".
> + trans_mode = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON));
> + if (trans_mode == DMA_INTERFACE_IDMA) {
> + trans_mode = TRANS_MODE_IDMAC;
> + } else if (trans_mode == DMA_INTERFACE_DWDMA ||
> +trans_mode == DMA_INTERFACE_GDMA) {
> + trans_mode = TRANS_MODE_EDMAC;
> + } else {
> + trans_mode = TRANS_MODE_PIO;
> goto no_dma;
> }
>
> /* Determine which DMA interface to use */
> -#ifdef CONFIG_MMC_DW_IDMAC
> - host->dma_ops = &dw_mci_idmac_ops;
> - dev_info(host->dev, "Using internal DMA controller.\n");
> -#endif
> + if (trans_mode == TRANS_MODE_IDMAC) {
> + /*
> + * Check ADDR_CONFIG bit in HCON to find
> + * IDMAC address bus width
> + */
> + addr_config = (mci_readl(host, HCON) >> 27) & 0x01;
> +
> + if (addr_config == 1) {
> + /* host supports IDMAC in 64-bit address mode */
> + host->dma_64bit_address = 1;
> + dev_info(host->dev,
> + "IDMAC supports 64-bit address mode.\n");
> + if (!dma_set_mask(host->dev, DMA_BIT_MASK(64)))
> + dma_set_coherent_mask(host->dev,
> + DMA_BIT_MASK(64));
> + } else {
> + /* host supports IDMAC in 32-bit address mode */
> + host->dma_64bit_address = 0;
> + dev_info(host->dev,
> + "IDMAC supports 32-bit address mode.\n");
> + }
> +
> + /* Alloc memory for sg translation */
> + host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE,
> +&host->sg_dma, GFP_KERNEL);
> + if (!host->sg_cpu) {
> + dev_err(host->dev,
> + "%s: could not alloc DMA memory\n",
> + __func__);
> + goto no_dma;
> + }
> +
> + host->dma_ops = &dw_mci_idmac_ops;
> + dev_info(host->dev, "Using internal DMA controller.\n");
> + } else {
> + /* TRANS_MODE_EDMAC: check dma bindings again */
> + if ((of_property_count_strings(np, "dma-names") < 0) ||
> + (!of_find_property(np, "dmas", NULL))) {
> + trans_mode = TRANS_MODE_PIO;
> + goto no_dma;
> + }
> + host->dma_ops = &dw_mci_edmac_ops;
> + dev_info(host->dev, "Using external DMA controller.\n");
> + }
>
> if (!host->dma_ops)
> goto no_dma;
This checking seems unnecessary, after applied your code.
Best Regards,
Jaehoon Chung
> @@ -2562,12 +2733,12 @@ static void dw_mci_init_dma(struct dw_mci *host)
> goto no_dma;
> }
>
> - host->use_dma = 1;
> + host->use_dma = trans_mode;
> return;
>
> no_dma:
> dev_info(host->dev, "Using PIO mode.\n");
> - host->use_dma = 0;
> + host->use_dma = trans_mode;
> }
>
> static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset)
> @@ -2650,10 +2821,9 @@ static bool dw_mci_reset(struct dw_mci *host)
> }
> }
>
> -#if IS_ENABLED(CONFIG_MMC_DW_IDMAC)
> - /* It is also recommended that we reset and reprogram idmac */
> - dw_mci_idmac_reset(host);
> -#endif
> + if (host->use_dma == TRANS_MODE_IDMAC)
> + /* It is also recommended that we reset and reprogram idmac */
> + dw_mci_idmac_reset(host);
>
> ret = true;
>
> @@ -3067,6 +3237,9
Re: [PATCH] ARM: dts: use vqmmc-supply of emmc/sd for exynos4412-odroid-common
On 08/27/2015 09:26 PM, Krzysztof Kozlowski wrote:
> W dniu 27.08.2015 o 18:29, Jaehoon Chung pisze:
>> Currently vmmc's property is wrong.
>> If it needs to control two supplies, then it has to use vmmc/vqmmc-supply.
>> (Card supply power and I/O Line supply Power.)
>>
>> Signed-off-by: Jaehoon Chung
>> ---
>> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 7 ---
>> 1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> index ca7d168..4ddabfd 100644
>> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> @@ -461,10 +461,10 @@
>> &mshc_0 {
>> pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
>> pinctrl-names = "default";
>> -vmmc-supply = <&ldo20_reg &buck8_reg>;
>> +vmmc-supply = <&ldo20_reg>;
>> +vqmmc-supply = <&buck8_reg>;
>
> Shouldn't this be reversed? LDO20 has 1.8V and it goes to MMC connector,
> so it should be VQMMC?
If my schematics is right thing, buck8 is used LAN card power.
I will send after removing buck8_reg. how about?
Anyway, Thanks for pointing out. :)
I don't know who this regulator applied. I have guessed that it used for eMMC.
Sorry for guessing.
Best Regards,
Jaehoon Chung
>
> In the same time I can't find on schematics where BUCK8 goes...
>
> The SDHCI_2 node below looks good.
>
> Best regards,
> Krzysztof
>
>> mmc-pwrseq = <&emmc_pwrseq>;
>> status = "okay";
>> -
>> num-slots = <1>;
>> broken-cd;
>> card-detect-delay = <200>;
>> @@ -485,7 +485,8 @@
>> bus-width = <4>;
>> pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
>> pinctrl-names = "default";
>> -vmmc-supply = <&ldo4_reg &ldo21_reg>;
>> +vmmc-supply = <&ldo21_reg>;
>> +vqmmc-supply = <&ldo4_reg>;
>> cd-gpios = <&gpk2 2 0>;
>> cd-inverted;
>> status = "okay";
>>
>
>
>
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[PATCH] ARM: dts: use vqmmc-supply of emmc/sd for exynos4412-odroid-common
Currently vmmc's property is wrong.
If it needs to control two supplies, then it has to use vmmc/vqmmc-supply.
(Card supply power and I/O Line supply Power.)
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index ca7d168..4ddabfd 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -461,10 +461,10 @@
&mshc_0 {
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
- vmmc-supply = <&ldo20_reg &buck8_reg>;
+ vmmc-supply = <&ldo20_reg>;
+ vqmmc-supply = <&buck8_reg>;
mmc-pwrseq = <&emmc_pwrseq>;
status = "okay";
-
num-slots = <1>;
broken-cd;
card-detect-delay = <200>;
@@ -485,7 +485,8 @@
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
pinctrl-names = "default";
- vmmc-supply = <&ldo4_reg &ldo21_reg>;
+ vmmc-supply = <&ldo21_reg>;
+ vqmmc-supply = <&ldo4_reg>;
cd-gpios = <&gpk2 2 0>;
cd-inverted;
status = "okay";
--
1.9.1
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Re: [RFC PATCH v6 1/9] mmc: dw_mmc: Add external dma interface support
On 08/21/2015 04:27 PM, Shawn Lin wrote:
> On 2015/8/21 14:35, Jaehoon Chung wrote:
>> On 08/21/2015 03:30 PM, Shawn Lin wrote:
>>> On 2015/8/21 14:27, Jaehoon Chung wrote:
>>>> Hi, Shawn.
>>>>
>>>> Is this based on Ulf's repository?
>>>
>>>
>>> no, it's based on "https://github.com/jh80chung/dw-mmc.git
>>> tags/dw-mmc-for-ulf-v4.2" ：）
>>
>> Oh..I will rebase to Ulf's next branch on this weekend.
>> Then could you rebase this patch? And i added more comments at below.. :)
>>
>
> Okay, I will rebase to Ulf's next.
>
>> Best Regards,
>> Jaehoon Chung
>>
>>>
>
> [...]
>
>>>>> index ec6dbcd..7e1d13b 100644
>>>>> --- a/drivers/mmc/host/dw_mmc-pltfm.c
>>>>> +++ b/drivers/mmc/host/dw_mmc-pltfm.c
>>>>> @@ -59,6 +59,8 @@ int dw_mci_pltfm_register(struct platform_device *pdev,
>>>>>host->pdata = pdev->dev.platform_data;
>>>>>
>>>>>regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>>>> +/* Get registers' physical base address */
>>>>> +host->phy_regs = (void *)(regs->start);
>>>>>host->regs = devm_ioremap_resource(&pdev->dev, regs);
>>>>>if (IS_ERR(host->regs))
>>>>>return PTR_ERR(host->regs);
>>>>
>>>> Is this board specific code? If so, separate the patch.
>
> It's might not board specific code.
> dmaengine need dw_mmc's *physical* fifo address for data transfer, so I get
> controller physical address here in order to calculate physical fifo address.
>
> regs is from dt-bindings, for instance:
> dwmmc0@1220 {
> compatible = "snps,dw-mshc";
> clocks = <&clock 351>, <&clock 132>;
> clock-names = "biu", "ciu";
> reg = <0x1220 0x1000>;
> interrupts = <0 75 0>;
> #address-cells = <1>;
> #size-cells = <0>;
> };
>
> so, host->phy_regs will be 0x1220 .
>
> [...]
>
>>>>> +static void dw_mci_dmac_complete_dma(void *arg)
>>>>>{
>>>>> +struct dw_mci *host = arg;
>>>>>struct mmc_data *data = host->data;
>>>>>
>>>>>dev_vdbg(host->dev, "DMA complete\n");
>>>>>
>>>>> +if (host->use_dma == TRANS_MODE_EDMAC)
>>>>> +if (data && (data->flags & MMC_DATA_READ))
>>>>
>>>> Combine one condition.
>
> okay.
>
> [...]
>
>>>>> +u32 fifo_offset = host->fifo_reg - host->regs;
>>>>> +int ret = 0;
>>>>> +
>>>>> +/* Set external dma config: burst size, burst width */
>>>>> +cfg.dst_addr = (dma_addr_t)(host->phy_regs + fifo_offset);
>>>>
>>>> host->phy_regs is not assigned?
>
> we got it at dw_mci_pltfm_register. See comments above. :)
>
> [...]
>
>>>>>mmc->max_blk_count = mmc->max_req_size / 512;
>>>>> +} else if (host->use_dma == TRANS_MODE_EDMAC) {
>>>>> +mmc->max_segs = 64;
>>>>> +mmc->max_blk_size = 65536;
>>>>> +mmc->max_blk_count = 65535;
>>>>> +mmc->max_req_size =
>>>>> +mmc->max_blk_size * mmc->max_blk_count;
>>>>> +mmc->max_seg_size = mmc->max_req_size;
>>>>
>>>> Fix the indention
>
> Hmm..I check it attentively but can't find the indention . Might it's because
> you apply it against Ulf's repo?
>
>>>>
>
> [...]
>
>>>>>
>>>>> -/* Alloc memory for sg translation */
>>>>> -host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE,
>>>>> - &host->sg_dma, GFP_KERNEL);
>>>>> -if (!host->sg_cpu) {
>>>>> -dev_err(host->dev, "%s: could not alloc DMA memory\n",
>>>>> -__func__);
>>>>> +/* Check tansfer mode */
>>>>> +trans_mode = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON));
>>>>> +if (trans_mode == 0) {
>>>>
Re: [RFC PATCH v6 1/9] mmc: dw_mmc: Add external dma interface support
On 08/21/2015 03:30 PM, Shawn Lin wrote: > On 2015/8/21 14:27, Jaehoon Chung wrote: >> Hi, Shawn. >> >> Is this based on Ulf's repository? > > > no, it's based on "https://github.com/jh80chung/dw-mmc.git > tags/dw-mmc-for-ulf-v4.2" ：） Oh..I will rebase to Ulf's next branch on this weekend. Then could you rebase this patch? And i added more comments at below.. :) Best Regards, Jaehoon Chung > >> >> On 08/20/2015 05:43 PM, Shawn Lin wrote: >>> DesignWare MMC Controller can supports two types of DMA >>> mode: external dma and internal dma. We get a RK312x platform >>> integrated dw_mmc and ARM pl330 dma controller. This patch add >>> edmac ops to support these platforms. I've tested it on RK31xx >>> platform with edmac mode and RK3288 platform with idmac mode. >>> >>> Signed-off-by: Shawn Lin >>> >>> --- >>> >>> Changes in v6: >>> - add trans_mode condition for IDMAC initialization >>>suggested by Heiko >>> - re-test my patch on rk3188 platform and update commit msg >>> - update performance of pio vs edmac in cover letter >>> >>> Changes in v5: >>> - add the title of cover letter >>> - fix typo of comment >>> - add macro for reading HCON register >>> - add "Acked-by: Krzysztof Kozlowski " for >>> exynos_defconfig patch >>> - add "Acked-by: Vineet Gupta " for axs10x_defconfig >>> patch >>> - add "Acked-by: Govindraj Raja " and >>>"Acked-by: Ralf Baechle " for pistachio_defconfig >>> patch >>> - add "Acked-by: Joachim Eastwood " for >>> lpc18xx_defconfig patch >>> - add "Acked-by: Wei Xu " for hisi_defconfig patch >>> - rebase on "https://github.com/jh80chung/dw-mmc.git >>> tags/dw-mmc-for-ulf-v4.2" for merging easily >>> >>> Changes in v4: >>> - remove "host->trans_mode" and use "host->use_dma" to indicate >>>transfer mode. >>> - remove all bt-bindings' changes since we don't need new properities. >>> - check transfer mode at runtime by reading HCON reg >>> - spilt defconfig changes for each sub-architecture >>> - fix the title of cover letter >>> - reuse some code for reducing code size >>> >>> Changes in v3: >>> - choose transfer mode at runtime >>> - remove all CONFIG_MMC_DW_IDMAC config option >>> - add supports-idmac property for some platforms >>> >>> Changes in v2: >>> - Fix typo of dev_info msg >>> - remove unused dmach from declaration of dw_mci_dma_slave >>> >>> drivers/mmc/host/Kconfig| 11 +- >>> drivers/mmc/host/dw_mmc-pltfm.c | 2 + >>> drivers/mmc/host/dw_mmc.c | 264 >>> >>> drivers/mmc/host/dw_mmc.h | 5 + >>> include/linux/mmc/dw_mmc.h | 27 +++- >>> 5 files changed, 242 insertions(+), 67 deletions(-) >>> >>> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig >>> index 6a0f9c7..a86c0eb 100644 >>> --- a/drivers/mmc/host/Kconfig >>> +++ b/drivers/mmc/host/Kconfig >>> @@ -607,15 +607,7 @@ config MMC_DW >>> help >>> This selects support for the Synopsys DesignWare Mobile Storage IP >>> block, this provides host support for SD and MMC interfaces, in both >>> - PIO and external DMA modes. >>> - >>> -config MMC_DW_IDMAC >>> -bool "Internal DMAC interface" >>> -depends on MMC_DW >>> -help >>> - This selects support for the internal DMAC block within the Synopsys >>> - Designware Mobile Storage IP block. This disables the external DMA >>> - interface. >>> + PIO, internal DMA mode and external DMA modes. >>> >>> config MMC_DW_PLTFM >>> tristate "Synopsys Designware MCI Support as platform device" >>> @@ -644,7 +636,6 @@ config MMC_DW_K3 >>> tristate "K3 specific extensions for Synopsys DW Memory Card >>> Interface" >>> depends on MMC_DW >>> select MMC_DW_PLTFM >>> -select MMC_DW_IDMAC >>> help >>> This selects support for Hisilicon K3 SoC specific extensions to the >>> Synopsys DesignWare Memory Card Interface driver. Select this option >>> diff --git a/driv
Re: [RFC PATCH v6 1/9] mmc: dw_mmc: Add external dma interface support
gt; +
> + if (addr_config == 1) {
> + /* host supports IDMAC in 64-bit address mode */
> + host->dma_64bit_address = 1;
> + dev_info(host->dev,
> + "IDMAC supports 64-bit address mode.\n");
> + if (!dma_set_mask(host->dev, DMA_BIT_MASK(64)))
> + dma_set_coherent_mask(host->dev,
> + DMA_BIT_MASK(64));
> + } else {
> + /* host supports IDMAC in 32-bit address mode */
> + host->dma_64bit_address = 0;
> + dev_info(host->dev,
> + "IDMAC supports 32-bit address mode.\n");
> + }
> +
> + /* Alloc memory for sg translation */
> + host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE,
> +&host->sg_dma, GFP_KERNEL);
> + if (!host->sg_cpu) {
> + dev_err(host->dev,
> + "%s: could not alloc DMA memory\n",
> + __func__);
> + goto no_dma;
> + }
> +
> + host->dma_ops = &dw_mci_idmac_ops;
> + dev_info(host->dev, "Using internal DMA controller.\n");
> + } else {
> + /* TRANS_MODE_EDMAC: check dma bindings again */
> + if ((of_property_count_strings(np, "dma-names") < 0) ||
> + (!of_find_property(np, "dmas", NULL))) {
> + trans_mode = TRANS_MODE_PIO;
> + goto no_dma;
> + }
> + host->dma_ops = &dw_mci_edmac_ops;
> + dev_info(host->dev, "Using external DMA controller.\n");
> + }
>
> if (!host->dma_ops)
> goto no_dma;
> @@ -2562,12 +2720,12 @@ static void dw_mci_init_dma(struct dw_mci *host)
> goto no_dma;
> }
>
> - host->use_dma = 1;
> + host->use_dma = trans_mode;
Also confuse, if trans_mode is assigned host->use_dma, can mode value be
directly assigned to host->use_dma?
trans_mode = TRAMS_MODE_PIO;
host->use_dma = trans_mode;
-> host->use_dma = TRAMS_MODE_PIO;
Then trans_mode can be removed.
> return;
>
> no_dma:
> dev_info(host->dev, "Using PIO mode.\n");
> - host->use_dma = 0;
> + host->use_dma = trans_mode;
> }
>
> static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset)
> @@ -2650,10 +2808,9 @@ static bool dw_mci_reset(struct dw_mci *host)
> }
> }
>
> -#if IS_ENABLED(CONFIG_MMC_DW_IDMAC)
> - /* It is also recommended that we reset and reprogram idmac */
> - dw_mci_idmac_reset(host);
> -#endif
> + if (host->use_dma == TRANS_MODE_IDMAC)
> + /* It is also recommended that we reset and reprogram idmac */
> + dw_mci_idmac_reset(host);
>
> ret = true;
>
> @@ -2890,7 +3047,7 @@ int dw_mci_probe(struct dw_mci *host)
>* Get the host data width - this assumes that HCON has been set with
>* the correct values.
>*/
> - i = (mci_readl(host, HCON) >> 7) & 0x7;
> + i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON));
This is not related with supporting external dma interface.
Separate this.
> if (!i) {
> host->push_data = dw_mci_push_data16;
> host->pull_data = dw_mci_pull_data16;
> @@ -2972,7 +3129,7 @@ int dw_mci_probe(struct dw_mci *host)
> if (host->pdata->num_slots)
> host->num_slots = host->pdata->num_slots;
> else
> - host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
> + host->num_slots = SDMMC_GET_SLOT_NUM(mci_readl(host, HCON));
Ditto. (with above.)
>
> /*
>* Enable interrupts for command done, data over, data empty,
> @@ -3067,6 +3224,9 @@ EXPORT_SYMBOL(dw_mci_remove);
> */
> int dw_mci_suspend(struct dw_mci *host)
> {
> + if (host->use_dma && host->dma_ops->exit)
> + host->dma_ops->exit(host);
> +
> return 0;
> }
> EXPORT_SYMBOL(dw_mci_suspend);
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 8ce4674..c453e94 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -148,6 +148,11 @@
> #define SDMMC_SET_FIFOTH(m, r, t)(((m) & 0x7) << 28 | \
>((r) & 0xFFF) << 16 | \
>((t) & 0xFFF))
> +/* HCON register defines */
> +#define SDMMC_GET_SLOT_NUM(x)x)>>1) & 0x1F) + 1)
> +#define SDMMC_GET_HDATA_WIDTH(x) (((x)>>7) & 0x7)
> +#define SDMMC_GET_TRANS_MODE(x) (((x)>>16) & 0x3)
> +#define SDMMC_GET_ADDR_CONFIG(x) (((x)>>27) & 0x1)
> /* Internal DMAC interrupt defines */
> #define SDMMC_IDMAC_INT_AI BIT(9)
> #define SDMMC_IDMAC_INT_NI BIT(8)
> diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
> index c846f42..6a2b83c 100644
> --- a/include/linux/mmc/dw_mmc.h
> +++ b/include/linux/mmc/dw_mmc.h
> @@ -16,6 +16,7 @@
>
> #include
> #include
> +#include
>
> #define MAX_MCI_SLOTS2
>
> @@ -40,6 +41,17 @@ enum {
>
> struct mmc_data;
>
> +enum {
> + TRANS_MODE_PIO = 0,
> + TRANS_MODE_IDMAC,
> + TRANS_MODE_EDMAC
> +};
> +
> +struct dw_mci_dma_slave {
> + struct dma_chan *ch;
> + enum dma_transfer_direction direction;
> +};
> +
> /**
> * struct dw_mci - MMC controller state shared between all slots
> * @lock: Spinlock protecting the queue and associated data.
> @@ -154,11 +166,16 @@ struct dw_mci {
> dma_addr_t sg_dma;
> void*sg_cpu;
> const struct dw_mci_dma_ops *dma_ops;
> -#ifdef CONFIG_MMC_DW_IDMAC
> + /* For idmac */
> unsigned intring_size;
> -#else
> +
> + /* For edmac */
> + struct dw_mci_dma_slave *dms;
> + /* Registers's physical base address */
> + void*phy_regs;
> +
> struct dw_mci_dma_data *dma_data;
> -#endif
> +
On ulf's repository, this point should be conflicted.
Best Regards,
Jaehoon Chung
> u32 cmd_status;
> u32 data_status;
> u32 stop_cmdr;
> @@ -212,8 +229,8 @@ struct dw_mci {
> struct dw_mci_dma_ops {
> /* DMA Ops */
> int (*init)(struct dw_mci *host);
> - void (*start)(struct dw_mci *host, unsigned int sg_len);
> - void (*complete)(struct dw_mci *host);
> + int (*start)(struct dw_mci *host, unsigned int sg_len);
> + void (*complete)(void *host);
> void (*stop)(struct dw_mci *host);
> void (*cleanup)(struct dw_mci *host);
> void (*exit)(struct dw_mci *host);
>
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Re: [RFC PATCH v4 0/9]
On 08/06/2015 04:31 PM, Shawn Lin wrote: > 在 2015/8/6 15:08, Jaehoon Chung 写道: >> Hi, Shawn. >> >> I remembered that Krzysztof has mentioned "Fix the title of cover letter." >> Your cover letter's title is nothing.. "[RFC PATCH v4 0/9] " ?? >> [RFC PATCH v4 0/9] your title... > Sorry, I forgot it, and will fix in next version... No problem :) At next time, add the title at your cover-letter, plz. Best Regards, Jaehoon Chung > >> Best Regards, >> Jaehoon Chung >> >> On 08/06/2015 03:44 PM, Shawn Lin wrote: >>> Add external dma support for Synopsys MSHC >>> >>> Synopsys DesignWare mobile storage host controller supports three >>> types of transfer mode: pio, internal dma and external dma. However, >>> dw_mmc can only supports pio and internal dma now. Thus some platforms >>> using dw-mshc integrated with generic dma can't work in dma mode. So we >>> submit this patch to achieve it. >>> >>> And the config option, CONFIG_MMC_DW_IDMAC, was added by Will Newton >>> (commit:f95f3850) for the first version of dw_mmc and never be touched since >>> then. At that time dt-bindings hadn't been introduced into dw_mmc yet means >>> we should select CONFIG_MMC_DW_IDMAC to enable internal dma mode at compile >>> time. Nowadays, device-tree helps us to support a variety of boards with one >>> kernel. That's why we need to remove it and decide the transfer mode by >>> reading >>> dw_mmc's HCON reg at runtime. >>> >>> This RFC patch needs lots of ACKs. I know it's hard, but it does need >>> someone >>> to make the running. >>> >>> Patch does the following things: >>> - remove CONFIG_MMC_DW_IDMAC config option >>> - add bindings for edmac used by synopsys-dw-mshc >>>at runtime >>> - add edmac support for synopsys-dw-mshc >>> >>> Patch is based on next of git://git.linaro.org/people/ulf.hansson/mmc >>> >>> >>> Changes in v4: >>> - remove "host->trans_mode" and use "host->use_dma" to indicate >>>transfer mode. >>> - remove all bt-bindings' changes since we don't need new properities. >>> - check transfer mode at runtime by reading HCON reg >>> - spilt defconfig changes for each sub-architecture >>> - fix the title of cover letter >>> - reuse some code for reducing code size >>> >>> Changes in v3: >>> - choose transfer mode at runtime >>> - remove all CONFIG_MMC_DW_IDMAC config option >>> - add supports-idmac property for some platforms >>> >>> Changes in v2: >>> - Fix typo of dev_info msg >>> - remove unused dmach from declaration of dw_mci_dma_slave >>> >>> Shawn Lin (9): >>>mmc: dw_mmc: Add external dma interface support >>>Documentation: synopsys-dw-mshc: add bindings for idmac and edmac >>>mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC >>>arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC >>>arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC >>>arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC >>>arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC >>>arm: multi_v7_defconfig: remove CONFIG_MMC_DW_IDMAC >>>arm: zx_defconfig: remove CONFIG_MMC_DW_IDMAC >>> >>> .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 25 ++ >>> arch/arc/configs/axs101_defconfig | 1 - >>> arch/arc/configs/axs103_defconfig | 1 - >>> arch/arc/configs/axs103_smp_defconfig | 1 - >>> arch/arm/configs/exynos_defconfig | 1 - >>> arch/arm/configs/hisi_defconfig| 1 - >>> arch/arm/configs/lpc18xx_defconfig | 1 - >>> arch/arm/configs/multi_v7_defconfig| 1 - >>> arch/arm/configs/zx_defconfig | 1 - >>> arch/mips/configs/pistachio_defconfig | 1 - >>> drivers/mmc/host/Kconfig | 11 +- >>> drivers/mmc/host/dw_mmc-pltfm.c| 2 + >>> drivers/mmc/host/dw_mmc.c | 258 >>> + >>> include/linux/mmc/dw_mmc.h | 27 ++- >>> 14 files changed, 257 insertions(+), 75 deletions(-) >>> >> >> >> > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH v4 0/9]
Hi, Shawn. I remembered that Krzysztof has mentioned "Fix the title of cover letter." Your cover letter's title is nothing.. "[RFC PATCH v4 0/9] " ?? [RFC PATCH v4 0/9] your title... Best Regards, Jaehoon Chung On 08/06/2015 03:44 PM, Shawn Lin wrote: > Add external dma support for Synopsys MSHC > > Synopsys DesignWare mobile storage host controller supports three > types of transfer mode: pio, internal dma and external dma. However, > dw_mmc can only supports pio and internal dma now. Thus some platforms > using dw-mshc integrated with generic dma can't work in dma mode. So we > submit this patch to achieve it. > > And the config option, CONFIG_MMC_DW_IDMAC, was added by Will Newton > (commit:f95f3850) for the first version of dw_mmc and never be touched since > then. At that time dt-bindings hadn't been introduced into dw_mmc yet means > we should select CONFIG_MMC_DW_IDMAC to enable internal dma mode at compile > time. Nowadays, device-tree helps us to support a variety of boards with one > kernel. That's why we need to remove it and decide the transfer mode by > reading > dw_mmc's HCON reg at runtime. > > This RFC patch needs lots of ACKs. I know it's hard, but it does need someone > to make the running. > > Patch does the following things: > - remove CONFIG_MMC_DW_IDMAC config option > - add bindings for edmac used by synopsys-dw-mshc > at runtime > - add edmac support for synopsys-dw-mshc > > Patch is based on next of git://git.linaro.org/people/ulf.hansson/mmc > > > Changes in v4: > - remove "host->trans_mode" and use "host->use_dma" to indicate > transfer mode. > - remove all bt-bindings' changes since we don't need new properities. > - check transfer mode at runtime by reading HCON reg > - spilt defconfig changes for each sub-architecture > - fix the title of cover letter > - reuse some code for reducing code size > > Changes in v3: > - choose transfer mode at runtime > - remove all CONFIG_MMC_DW_IDMAC config option > - add supports-idmac property for some platforms > > Changes in v2: > - Fix typo of dev_info msg > - remove unused dmach from declaration of dw_mci_dma_slave > > Shawn Lin (9): > mmc: dw_mmc: Add external dma interface support > Documentation: synopsys-dw-mshc: add bindings for idmac and edmac > mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC > arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC > arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC > arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC > arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC > arm: multi_v7_defconfig: remove CONFIG_MMC_DW_IDMAC > arm: zx_defconfig: remove CONFIG_MMC_DW_IDMAC > > .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 25 ++ > arch/arc/configs/axs101_defconfig | 1 - > arch/arc/configs/axs103_defconfig | 1 - > arch/arc/configs/axs103_smp_defconfig | 1 - > arch/arm/configs/exynos_defconfig | 1 - > arch/arm/configs/hisi_defconfig| 1 - > arch/arm/configs/lpc18xx_defconfig | 1 - > arch/arm/configs/multi_v7_defconfig| 1 - > arch/arm/configs/zx_defconfig | 1 - > arch/mips/configs/pistachio_defconfig | 1 - > drivers/mmc/host/Kconfig | 11 +- > drivers/mmc/host/dw_mmc-pltfm.c| 2 + > drivers/mmc/host/dw_mmc.c | 258 > + > include/linux/mmc/dw_mmc.h | 27 ++- > 14 files changed, 257 insertions(+), 75 deletions(-) > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH] mmc: sprd: add MMC host driver for Spreadtrum SoC
Hi,
Is sdhost based on SDHCI controller?
Why don't use sdhci.c? Is there any reason?
Best Regards,
Jaehoon Chung
On 07/01/2015 04:12 PM, Chunyan Zhang wrote:
> From: Billows Wu
>
> The Spreadtrum MMC host driver is used to support EMMC, SD, and
> SDIO types of memory cards.
>
> Signed-off-by: Billows Wu
> Reviewed-by: Orson Zhai
> Signed-off-by: Chunyan Zhang
> ---
> drivers/mmc/host/sprd_sdhost.c | 1270
>
> drivers/mmc/host/sprd_sdhost.h | 507 +
> drivers/mmc/host/sprd_sdhost_debugfs.c | 213 ++
> drivers/mmc/host/sprd_sdhost_debugfs.h | 27 +
> 6 files changed, 2027 insertions(+)
> create mode 100644 drivers/mmc/host/sprd_sdhost.c
> create mode 100644 drivers/mmc/host/sprd_sdhost.h
> create mode 100644 drivers/mmc/host/sprd_sdhost_debugfs.c
> create mode 100644 drivers/mmc/host/sprd_sdhost_debugfs.h
>
> diff --git a/drivers/mmc/host/sprd_sdhost.c b/drivers/mmc/host/sprd_sdhost.c
> new file mode 100644
> index 000..e7a66e8
> --- /dev/null
> +++ b/drivers/mmc/host/sprd_sdhost.c
> @@ -0,0 +1,1270 @@
> +/*
> + * linux/drivers/mmc/host/sprd_sdhost.c - Secure Digital Host Controller
> + * Interface driver
> + *
> + * Copyright (C) 2015 Spreadtrum corporation.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or (at
> + * your option) any later version.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "sprd_sdhost.h"
> +#include "sprd_sdhost_debugfs.h"
> +
> +#define DRIVER_NAME "sdhost"
> +#define SDHOST_CAPS \
> + (MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | \
> + MMC_CAP_ERASE | MMC_CAP_UHS_SDR50 | \
> + MMC_CAP_CMD23 | MMC_CAP_HW_RESET)
> +
> +struct sdhost_caps_data {
> + char *name;
> + uint32_t ocr_avail;
> + uint32_t caps;
> + uint32_t caps2;
> + uint32_t pm_caps;
> + /* TODO: we will obtain these values from regulator and clock
> + * phandles after LDO and clock function is OK
> + */
> + uint32_t base_clk;
> + uint32_t signal_default_voltage;
> +};
> +
> +struct sdhost_caps_data sd_caps_info = {
> + .name = "sd",
> + .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31,
> + .caps = SDHOST_CAPS,
> + .caps2 = MMC_CAP2_HC_ERASE_SZ,
> + .pm_caps = MMC_PM_WAKE_SDIO_IRQ,
> + .base_clk = 19200,
> + .signal_default_voltage = 300,
> +};
> +
> +struct sdhost_caps_data wifi_caps_info = {
> + .name = "wifi",
> + .ocr_avail = MMC_VDD_165_195 | MMC_VDD_29_30 |
> + MMC_VDD_30_31 | MMC_VDD_32_33 | MMC_VDD_33_34,
> + .caps = SDHOST_CAPS | MMC_CAP_POWER_OFF_CARD | MMC_CAP_UHS_SDR12,
> + .pm_caps = MMC_PM_KEEP_POWER | MMC_PM_IGNORE_PM_NOTIFY,
> + .base_clk = 7600,
> +};
> +
> +struct sdhost_caps_data emmc_caps_info = {
> + .name = "emmc",
> + .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31,
> + .caps = SDHOST_CAPS |
> + MMC_CAP_8_BIT_DATA | MMC_CAP_UHS_SDR12 |
> + MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_DDR50 | MMC_CAP_MMC_HIGHSPEED,
> + .caps2 = MMC_CAP2_FULL_PWR_CYCLE | MMC_CAP2_HC_ERASE_SZ,
> + .pm_caps = MMC_PM_WAKE_SDIO_IRQ,
> + .base_clk = 19200,
> + .signal_default_voltage = 180,
> +};
> +
> +const struct of_device_id sdhost_of_match[] = {
> + {.compatible = "sprd,sd-sdhost-3.0", .data = &sd_caps_info,},
> + {.compatible = "sprd,wifi-sdhost-3.0", .data = &wifi_caps_info,},
> + {.compatible = "sprd,emmc-sdhost-3.0", .data = &emmc_caps_info,},
> + { /* sentinel */ }
> +};
> +
> +void _reset_ios(struct sdhost_host *host)
> +{
> + _sdhost_disable_all_int(host->ioaddr);
> +
> + host->ios.clock = 0;
> + host->ios.vdd = 0;
> + /* host->ios.bus_mode= MMC_BUSMODE_OPENDRAIN; */
> + /* host->ios.chip_select = MMC_CS_DONTCARE; */
> + host->ios.power_mode = MMC_POWER_OFF;
> + host->ios.bus_width = MMC_BUS_WIDTH_1;
> + host->ios.timing = MMC_TIMING_LEGACY;
> + host->ios.signal_voltage = MMC_SIGNAL_VOLTAGE_330;
> + /*host->ios.drv_type= MMC_SET_DRIVER_TYPE_B; */
> +
> + _sdhost_reset(host->ioaddr, _RST_ALL);
> + _sdhost_set_delay(host->io
Re: [PATCH v2 2/3] leds: ktd2692: add device tree bindings for ktd2692
On 03/17/2015 05:45 PM, Ingi Kim wrote:
> This patch adds the device tree bindings for ktd2692 flash LEDs.
> Add optional properties 'flash-timeout-us' to control flash timeout
> and 'vin-supply' for flash-led regulator
>
> Signed-off-by: Ingi Kim
> ---
> .../devicetree/bindings/leds/leds-ktd2692.txt | 37
> ++
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/leds/leds-ktd2692.txt
>
> diff --git a/Documentation/devicetree/bindings/leds/leds-ktd2692.txt
> b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt
> new file mode 100644
> index 000..1b44225
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt
> @@ -0,0 +1,37 @@
> +* Kinetic Technologies - KTD2692 Flash LED Driver
> +
> +KTD2692 is the ideal power solution for high-power flash LEDs.
> +It uses ExpressWire single-wire programming for maximum flexibility.
> +
> +The ExpressWire interface through CTRL pin can control LED on/off and
> +enable/disable the IC, Movie/Flash mode current, Flash timeout,
> +LVP(low voltage protection).
> +
> +Required properties:
> + - compatible: "kinetic,ktd2692"
> + - ctrl-gpio : gpio pin in order control ktd2692 flash led.
> + There is an internal 300kOhm pull-down resistor at this pin
> + - supply : "vin" LED supply
> +
> +Optional property:
> + - flash-timeout-us : Maximum flash timeout in microseconds.
> + flash timeout ranges from 0 to 1835000us and
> + default is 1049000us.
> +
> +Example:
> +
> +vbat: fixedregulator@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "vbat-supply";
> + regulator-min-microvolt = <500>;
> + regulator-max-microvolt = <500>;
> + gpio = <>;
gpio = <> ? What do you mean?
And this is described at
Documentation/devicetree/bindings/regulator/fixed-regulator.txt
I'm not sure whether this example really needs.
Best Regards,
Jaehoon Chung
> + regulator-always-on;
> +};
> +
> +flash-led {
> + compatible = "kinetic,ktd2692";
> + ctrl-gpio = <&gpc0 1 0>;
> + flash-timeout-us = <1835000>;
> + vin-supply = <&vbat>;
> +};
>
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Re: [PATCH V5 1/2] mmc: dw_mmc: exynos: Support eMMC's HS400 mode
Dear, Rob. On 02/25/2015 11:38 PM, Rob Herring wrote: > On Wed, Jan 28, 2015 at 8:41 PM, Alim Akhtar wrote: >> From: Seungwon Jeon >> >> Implements HS400 mode support for exynos host driver. >> This also include some updates as new mode is added. >> >> Signed-off-by: Seungwon Jeon >> Signed-off-by: Alim Akhtar >> [Alim: addressed review comments] >> --- >> .../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 + >> drivers/mmc/host/dw_mmc-exynos.c | 185 >> >> drivers/mmc/host/dw_mmc-exynos.h | 19 +- >> drivers/mmc/host/dw_mmc.c | 16 +- >> drivers/mmc/host/dw_mmc.h |2 + >> 5 files changed, 195 insertions(+), 34 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt >> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt >> index ee4fc05..aad9844 100644 >> --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt >> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt >> @@ -36,6 +36,8 @@ Required Properties: >>in transmit mode and CIU clock phase shift value in receive mode for >> double >>data rate mode operation. Refer notes below for the order of the cells >> and the >>valid values. >> +* samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock >> phase >> + shift value for hs400 mode operation. > > What are the units? Do you means what is "sumsung,dw-mshci-hs400-timing" unit? It's timing value for eMMC/SD/SDIO clock phase.(It's exynos specific value.) Using timing value can shift the H/W clock phase. If invalid timing value is set, eMMC/SD/SDIO can produce the CRC error. Do you think it can't include into device-tree? I want to know your thinking. let me know, plz. Best Regards, Jaehoon Chung > > Rob > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V5 2/2] ARM: dts: Add HS400 support for exynos5420 and exynos5800
Hi, Alim.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 01/29/2015 11:41 AM, Alim Akhtar wrote:
> From: Seungwon Jeon
>
> HS400 timing values are added for SMDK5420, exynos5420-peach-pit
> and exynos5800-peach-pi boards.
> This also adds RCLK GPIO line, this gpio should be in pull-down
> state.
> This also enables HS400 on peach-pi and this updates the clock frequency
> to 800MHz to be set as input clock to controller.
>
> Signed-off-by: Seungwon Jeon
> Signed-off-by: Alim Akhtar
> [Alim: addressed review comments]
> ---
> arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +++-
> arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 +++
> arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +++-
> arch/arm/boot/dts/exynos5800-peach-pi.dts |7 +--
> 4 files changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
> b/arch/arm/boot/dts/exynos5420-peach-pit.dts
> index 9a050e1..f7a44a4 100644
> --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
> @@ -569,8 +569,10 @@
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <0 4>;
> samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> + samsung,read-strobe-delay = <90>;
> pinctrl-names = "default";
> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
> bus-width = <8>;
> };
>
> diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> index ba686e4..8b15316 100644
> --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> @@ -201,6 +201,13 @@
> samsung,pin-drv = <3>;
> };
>
> + sd0_rclk: sd0-rclk {
> + samsung,pins = "gpc0-7";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <1>;
> + samsung,pin-drv = <3>;
> + };
> +
> sd1_cmd: sd1-cmd {
> samsung,pins = "gpc1-1";
> samsung,pin-function = <2>;
> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
> b/arch/arm/boot/dts/exynos5420-smdk5420.dts
> index 8be3d7b..2078a1f 100644
> --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
> @@ -80,8 +80,10 @@
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <0 4>;
> samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> + samsung,read-strobe-delay = <90>;
> pinctrl-names = "default";
> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
> bus-width = <8>;
> cap-mmc-highspeed;
> };
> diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
> b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> index e8fdda8..96f0d61 100644
> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> @@ -550,15 +550,18 @@
> num-slots = <1>;
> broken-cd;
> mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> cap-mmc-highspeed;
> non-removable;
> card-detect-delay = <200>;
> - clock-frequency = <4>;
> + clock-frequency = <8>;
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <0 4>;
> samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> + samsung,read-strobe-delay = <90>;
> pinctrl-names = "default";
> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
> bus-width = <8>;
> };
>
>
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Re: [PATCH V5 1/2] mmc: dw_mmc: exynos: Support eMMC's HS400 mode
Hi, Alim.
Tested-by: Jaehoon Chung
Acked-by: Jaehoon Chung
I will include this patch into my tree, and i will request pull to Ulf.
Thanks!
Best Regards,
Jaehoon Chung
On 01/29/2015 11:41 AM, Alim Akhtar wrote:
> From: Seungwon Jeon
>
> Implements HS400 mode support for exynos host driver.
> This also include some updates as new mode is added.
>
> Signed-off-by: Seungwon Jeon
> Signed-off-by: Alim Akhtar
> [Alim: addressed review comments]
> ---
> .../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 +
> drivers/mmc/host/dw_mmc-exynos.c | 185
>
> drivers/mmc/host/dw_mmc-exynos.h | 19 +-
> drivers/mmc/host/dw_mmc.c | 16 +-
> drivers/mmc/host/dw_mmc.h |2 +
> 5 files changed, 195 insertions(+), 34 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> index ee4fc05..aad9844 100644
> --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> @@ -36,6 +36,8 @@ Required Properties:
>in transmit mode and CIU clock phase shift value in receive mode for double
>data rate mode operation. Refer notes below for the order of the cells and
> the
>valid values.
> +* samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock
> phase
> + shift value for hs400 mode operation.
>
>Notes for the sdr-timing and ddr-timing values:
>
> @@ -50,6 +52,9 @@ Required Properties:
>- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
> phase shift clocks should be 0.
>
> +* samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode
> + (Latency value for delay line in Read path)
> +
> Required properties for a slot (Deprecated - Recommend to use one slot per
> host):
>
> * gpios: specifies a list of gpios used for command, clock and data bus. The
> @@ -82,5 +87,7 @@ Example:
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <2 3>;
> samsung,dw-mshc-ddr-timing = <1 2>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> + samsung,read-strobe-delay = <90>;
> bus-width = <8>;
> };
> diff --git a/drivers/mmc/host/dw_mmc-exynos.c
> b/drivers/mmc/host/dw_mmc-exynos.c
> index fe32948..0a56d76 100644
> --- a/drivers/mmc/host/dw_mmc-exynos.c
> +++ b/drivers/mmc/host/dw_mmc-exynos.c
> @@ -40,7 +40,12 @@ struct dw_mci_exynos_priv_data {
> u8 ciu_div;
> u32 sdr_timing;
> u32 ddr_timing;
> + u32 hs400_timing;
> + u32 tuned_sample;
> u32 cur_speed;
> + u32 dqs_delay;
> + u32 saved_dqs_en;
> + u32 saved_strobe_ctrl;
> };
>
> static struct dw_mci_exynos_compatible {
> @@ -71,6 +76,21 @@ static struct dw_mci_exynos_compatible {
> },
> };
>
> +static inline u8 dw_mci_exynos_get_ciu_div(struct dw_mci *host)
> +{
> + struct dw_mci_exynos_priv_data *priv = host->priv;
> +
> + if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4412)
> + return EXYNOS4412_FIXED_CIU_CLK_DIV;
> + else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4210)
> + return EXYNOS4210_FIXED_CIU_CLK_DIV;
> + else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
> + priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
> + return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL64)) + 1;
> + else
> + return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL)) + 1;
> +}
> +
> static int dw_mci_exynos_priv_init(struct dw_mci *host)
> {
> struct dw_mci_exynos_priv_data *priv = host->priv;
> @@ -85,6 +105,16 @@ static int dw_mci_exynos_priv_init(struct dw_mci *host)
> SDMMC_MPSCTRL_NON_SECURE_WRITE_BIT);
> }
>
> + if (priv->ctrl_type >= DW_MCI_TYPE_EXYNOS5420) {
> + priv->saved_strobe_ctrl = mci_readl(host, HS400_DLINE_CTRL);
> + priv->saved_dqs_en = mci_readl(host, HS400_DQS_EN);
> + priv->saved_dqs_en |= AXI_NON_BLOCKING_WR;
> + mci_writel(host, HS400_DQS_EN, priv->saved_dqs_en);
> + if (!priv->dqs_delay)
> + priv->dqs_delay =
> +
Re: [PATCH v2 1/2] mmc: dw_mmc: fix bug that cause 'Timeout sending command'
Hi, Addy.
On 02/09/2015 04:25 PM, Addy Ke wrote:
> Because of some uncertain factors, such as worse card or worse hardware,
> DAT[3:0](the data lines) may be pulled down by card, and mmc controller
> will be in busy state. This should not happend when mmc controller
> send command to update card clocks. If this happends, mci_send_cmd will
> be failed and we will get 'Timeout sending command', and then system will
> be blocked. To avoid this, we need reset mmc controller.
>
> Signed-off-by: Addy Ke
> ---
> drivers/mmc/host/dw_mmc.c | 28
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 4d2e3c2..b0b57e3 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -100,6 +100,7 @@ struct idmac_desc {
> };
> #endif /* CONFIG_MMC_DW_IDMAC */
>
> +static int dw_mci_card_busy(struct mmc_host *mmc);
> static bool dw_mci_reset(struct dw_mci *host);
> static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset);
>
> @@ -888,6 +889,31 @@ static void mci_send_cmd(struct dw_mci_slot *slot, u32
> cmd, u32 arg)
> cmd, arg, cmd_status);
> }
>
> +static void dw_mci_wait_busy(struct dw_mci_slot *slot)
> +{
> + struct dw_mci *host = slot->host;
> + unsigned long timeout = jiffies + msecs_to_jiffies(500);
> +
> + do {
> + if (!dw_mci_card_busy(slot->mmc))
> + return;
> + cpu_relax();
> + } while (time_before(jiffies, timeout));
> +
> + dev_err(host->dev, "Data busy (status %#x)\n",
> + mci_readl(slot->host, STATUS));
> +
> + /*
> + * Data busy, this should not happend when mmc controller send command
> + * to update card clocks in non-volt-switch state. If it happends, we
> + * should reset controller to avoid getting "Timeout sending command".
> + */
> + dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS);
If reset is failed, then dw_mci_ctrl_reset should return "false".
ret = dw_mci_ctrl_reset();
WARN_ON(!ret || dw_mci_card_busy(slot->mmc));
Is it right?
In my experiment, if reset is failed or card is busy, eMMC can't work
anymore..right?
I think this patch is reasonable to prevent blocking issue.
Best Regards,
Jaehoon Chung
> +
> + /* Fail to reset controller or still data busy, WARN_ON! */
> + WARN_ON(dw_mci_card_busy(slot->mmc));
> +}
> +
> static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
> {
> struct dw_mci *host = slot->host;
> @@ -899,6 +925,8 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
> bool force_clkinit)
> /* We must continue to set bit 28 in CMD until the change is complete */
> if (host->state == STATE_WAITING_CMD11_DONE)
> sdmmc_cmd_bits |= SDMMC_CMD_VOLT_SWITCH;
> + else
> + dw_mci_wait_busy(slot);
>
> if (!clock) {
> mci_writel(host, CLKENA, 0);
>
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Re: [PATCH] mmc: dw_mmc: fix bug that cause 'Timeout sending command'
On 02/09/2015 03:56 PM, Addy wrote:
>
>
> On 2015.02.09 12:51, Ulf Hansson wrote:
>> On 5 February 2015 at 12:13, Addy Ke wrote:
>>> Because of some uncertain factors, such as worse card or worse hardware,
>>> DAT[3:0](the data lines) may be pulled down by card, and mmc controller
>>> will be in busy state. This should not happend when mmc controller
>>> send command to update card clocks. If this happends, mci_send_cmd will
>>> be failed and we will get 'Timeout sending command', and then system will
>>> be blocked. To avoid this, we need reset mmc controller.
I know that it needs to check whether card is busy or not, before clock-off.
This patch seems to related with it. right?
Best Regards,
Jaehoon Chung
>>>
>>> Signed-off-by: Addy Ke
>>
>> Hi Addy,
>>
>> Should I consider $subject patch as a better option to the one below?
> No:
> This patch fix the bug, which can be found by script:
> cd /sys/bus/platform/drivers/dwmmc_rockchip
> for i in $(seq 1 1); do
> echo "" $i
> echo ff0c.dwmmc > unbind
> sleep .5
> echo ff0c.dwmmc > bind
> sleep 2
> done
>
>> [PATCH] mmc: dw_mmc: rockchip: Add DW_MCI_QUIRK_RETRY_DELAY
> This patch is for tuning issue: we should delay until card go to idle state,
> when the previous command return error.
>> https://lkml.org/lkml/2015/1/13/562
>>
>> Kind regards
>> Uffe
>>
>>
>>> ---
>>> drivers/mmc/host/dw_mmc.c | 23 +++
>>> 1 file changed, 23 insertions(+)
>>>
>>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>>> index 4d2e3c2..b1d6dfb 100644
>>> --- a/drivers/mmc/host/dw_mmc.c
>>> +++ b/drivers/mmc/host/dw_mmc.c
>>> @@ -100,6 +100,7 @@ struct idmac_desc {
>>> };
>>> #endif /* CONFIG_MMC_DW_IDMAC */
>>>
>>> +static int dw_mci_card_busy(struct mmc_host *mmc);
>>> static bool dw_mci_reset(struct dw_mci *host);
>>> static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset);
>>>
>>> @@ -888,6 +889,26 @@ static void mci_send_cmd(struct dw_mci_slot *slot, u32
>>> cmd, u32 arg)
>>> cmd, arg, cmd_status);
>>> }
>>>
>>> +static void dw_mci_wait_busy(struct dw_mci_slot *slot)
>>> +{
>>> + struct dw_mci *host = slot->host;
>>> + unsigned long timeout = jiffies + msecs_to_jiffies(500);
>>> +
>>> + while (time_before(jiffies, timeout)) {
>>> + if (!dw_mci_card_busy(slot->mmc))
>>> + return;
>>> + }
>>> + dev_err(host->dev, "Data busy (status %#x)\n",
>>> + mci_readl(slot->host, STATUS));
>>> +
>>> + /*
>>> +* Data busy, this should not happend when mmc controller send
>>> command
>>> +* to update card clocks in non-volt-switch state. If it happends,
>>> we
>>> +* should reset controller to avoid getting "Timeout sending
>>> command".
>>> +*/
>>> + dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS);
>>> +}
>>> +
>>> static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
>>> {
>>> struct dw_mci *host = slot->host;
>>> @@ -899,6 +920,8 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
>>> bool force_clkinit)
>>> /* We must continue to set bit 28 in CMD until the change is
>>> complete */
>>> if (host->state == STATE_WAITING_CMD11_DONE)
>>> sdmmc_cmd_bits |= SDMMC_CMD_VOLT_SWITCH;
>>> + else
>>> + dw_mci_wait_busy(slot);
>>>
>>> if (!clock) {
>>> mci_writel(host, CLKENA, 0);
>>> --
>>> 1.8.3.2
>>>
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
>>> the body of a message to majord...@vger.kernel.org
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>>
>>
>
>
>
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Re: [PATCH v5 0/2] mmc: dw_mmc: exynos: Add HS400 support
Hi, Vivek. On 02/06/2015 02:52 PM, Vivek Gautam wrote: > Hi Jaehoon, > > > On Fri, Feb 6, 2015 at 6:48 AM, Jaehoon Chung wrote: >> Hi, Alim. >> >> On my board, this patch isn't working fine. >> So when i complete to test on my board(exynos5), i will reply with comments. >> Sorry for late testing. > > I tested this series on linux-next, on Exynos5800-peach-pi board, and HS400 > seems to be working fine. > I can see the card getting detected as HS400, and then i ran iozone as well. > The iozone numbers are also as required. > > On peach-pit board too, the HS200 mode seems to be working good. > > What are the observations you saw on your board ? Thanks for testing on your board. I have exynos5422 and exynos5433.(One is eMMC5.0, other is eMMC5.1) I want to see that it's working fine on my board. I should miss something..so i will check more detail after complete my other job, or on this weekend. (It failed for hs400 tuning sequence..I needs to check that it has the board dependency) Best Regards, Jaehoon Chung > >> >> Best Regards, >> Jaehoon Chung >> >> On 01/29/2015 11:41 AM, Alim Akhtar wrote: >>> This adds HS400 mode support for exynos dw_mmc host controller. >>> >>> Currently tested on Exynos5800-peach-pi and Exyons7 platform for HS400 mode. >>> Tested HS200 mode with this series applied, HS200 still works. >>> >>> Appreciate testing on other exynos5/7 platform which supports emmc5.0 >>> >>> Changes in V5: >>> * Enable HS400 on Exynos5800-peach-pi boards >>> * Addressed other review comments from Jaehoon Chung >>> >>> Changes in V4: >>> * drop the idea of changing existing binding for ciu_div as per [1] >>> * addressed comments from Jaehoon Chung [2] >>> >>> [1] http://www.spinics.net/lists/linux-samsung-soc/msg40923.html >>> [2] http://www.spinics.net/lists/devicetree/msg64373.html >>> >>> Changes in V3: >>> rebased on ulf's next (commit: 607b448 mmc: core: Make tuning block >>> patterns static) >>> >>> Seungwon Jeon (2): >>> mmc: dw_mmc: exynos: Support eMMC's HS400 mode >>> ARM: dts: Add HS400 support for exynos5420 and exynos5800 >>> >>> .../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 + >>> arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +- >>> arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 + >>> arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +- >>> arch/arm/boot/dts/exynos5800-peach-pi.dts |7 +- >>> drivers/mmc/host/dw_mmc-exynos.c | 185 >>> >>> drivers/mmc/host/dw_mmc-exynos.h | 19 +- >>> drivers/mmc/host/dw_mmc.c | 16 +- >>> drivers/mmc/host/dw_mmc.h |2 + >>> 9 files changed, 213 insertions(+), 38 deletions(-) >>> >> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" >> in >> the body of a message to majord...@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html > > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 0/2] mmc: dw_mmc: exynos: Add HS400 support
Hi, Alim. On my board, this patch isn't working fine. So when i complete to test on my board(exynos5), i will reply with comments. Sorry for late testing. Best Regards, Jaehoon Chung On 01/29/2015 11:41 AM, Alim Akhtar wrote: > This adds HS400 mode support for exynos dw_mmc host controller. > > Currently tested on Exynos5800-peach-pi and Exyons7 platform for HS400 mode. > Tested HS200 mode with this series applied, HS200 still works. > > Appreciate testing on other exynos5/7 platform which supports emmc5.0 > > Changes in V5: > * Enable HS400 on Exynos5800-peach-pi boards > * Addressed other review comments from Jaehoon Chung > > Changes in V4: > * drop the idea of changing existing binding for ciu_div as per [1] > * addressed comments from Jaehoon Chung [2] > > [1] http://www.spinics.net/lists/linux-samsung-soc/msg40923.html > [2] http://www.spinics.net/lists/devicetree/msg64373.html > > Changes in V3: > rebased on ulf's next (commit: 607b448 mmc: core: Make tuning block > patterns static) > > Seungwon Jeon (2): > mmc: dw_mmc: exynos: Support eMMC's HS400 mode > ARM: dts: Add HS400 support for exynos5420 and exynos5800 > > .../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 + > arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +- > arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 + > arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +- > arch/arm/boot/dts/exynos5800-peach-pi.dts |7 +- > drivers/mmc/host/dw_mmc-exynos.c | 185 > > drivers/mmc/host/dw_mmc-exynos.h | 19 +- > drivers/mmc/host/dw_mmc.c | 16 +- > drivers/mmc/host/dw_mmc.h |2 + > 9 files changed, 213 insertions(+), 38 deletions(-) > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] mmc: dw_mmc-exynos: add support for controlling emmc reset pin
Hi, Marek.
your patch should be conflicted with
"https://patchwork.kernel.org/patch/5698421/";
On 01/27/2015 05:11 PM, Marek Szyprowski wrote:
> There are boards (like Hardkernel's Odroid boards) on which eMMC card's
> reset line is connected to SoC GPIO line instead of the hardware reset
> logic. In case of such boards, before performing system reboot,
> additional reset of eMMC card is required to boot again properly.
> This patch adds code for handling such cases.
mmc core supported to hw_reset function.
So i think we can use it. It's called at only initial time to clear the
previous status.
But i think it can be called at reboot time. (it needs to implement codes.)
how about?
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Marek Szyprowski
> ---
> .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 6 +++
> drivers/mmc/host/dw_mmc-exynos.c | 43
> +-
> 2 files changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> index ee4fc0576c7d..fc53d335e7db 100644
> --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> @@ -50,6 +50,12 @@ Required Properties:
>- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
> phase shift clocks should be 0.
>
> +Optional properties:
> +
> +* dw-mshc-reset-gpios: optional property specifying gpio for the eMMC nreset
> + line, it will be triggered on system reboot to properly reset eMMC card for
> + next system boot.
> +
> Required properties for a slot (Deprecated - Recommend to use one slot per
> host):
>
> * gpios: specifies a list of gpios used for command, clock and data bus. The
> diff --git a/drivers/mmc/host/dw_mmc-exynos.c
> b/drivers/mmc/host/dw_mmc-exynos.c
> index 509365cb22c6..2add5a93859d 100644
> --- a/drivers/mmc/host/dw_mmc-exynos.c
> +++ b/drivers/mmc/host/dw_mmc-exynos.c
> @@ -12,12 +12,14 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> #include
> #include
> #include
> +#include
>
> #include "dw_mmc.h"
> #include "dw_mmc-pltfm.h"
> @@ -77,8 +79,23 @@ struct dw_mci_exynos_priv_data {
> u32 sdr_timing;
> u32 ddr_timing;
> u32 cur_speed;
> + struct gpio_desc*reset_gpio;
> + struct notifier_block reset_nb;
> };
>
> +static int dw_mci_restart_handler(struct notifier_block *this,
> + unsigned long mode, void *cmd)
> +{
> + struct dw_mci_exynos_priv_data *data;
> + data = container_of(this, struct dw_mci_exynos_priv_data, reset_nb);
> +
> + gpiod_direction_output(data->reset_gpio, 0);
> + mdelay(150);
> + gpiod_direction_output(data->reset_gpio, 1);
> +
> + return NOTIFY_DONE;
> +}
> +
> static struct dw_mci_exynos_compatible {
> char*compatible;
> enum dw_mci_exynos_type ctrl_type;
> @@ -295,7 +312,20 @@ static int dw_mci_exynos_parse_dt(struct dw_mci *host)
> return ret;
>
> priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div);
> +
> + priv->reset_gpio = devm_gpiod_get_optional(host->dev,
> +"samsung,dw-mshc-reset",
> +GPIOD_OUT_HIGH);
> + if (!IS_ERR_OR_NULL(priv->reset_gpio)) {
> + priv->reset_nb.notifier_call = dw_mci_restart_handler;
> + priv->reset_nb.priority = 255;
> + ret = register_restart_handler(&priv->reset_nb);
> + if (ret)
> + dev_err(host->dev, "cannot register restart handler\n");
> + }
> +
> host->priv = priv;
> +
> return 0;
> }
>
> @@ -490,6 +520,17 @@ static int dw_mci_exynos_probe(struct platform_device
> *pdev)
> return dw_mci_pltfm_register(pdev, drv_data);
> }
>
> +static int dw_mci_exynos_remove(struct platform_device *pdev)
> +{
> + struct dw_mci *host = platform_get_drvdata(pdev);
> + struct dw_mci_exynos_priv_data *priv = host->priv;
> +
> + if (priv->reset_gpio)
> + unregister_restart_handler(&priv->reset_nb);
> +
> + return dw_mci_pltfm_remove(pdev);
> +}
> +
> static const struct dev_pm_ops dw_mci_exynos_pmops = {
> SET_SYS
Re: [PATCH] ARM: dts: Add sd0_rst pinctrl node to exynos5420
Hi, On 01/24/2015 12:59 AM, Javier Martinez Canillas wrote: > Hello Sjoerd, > > On Fri, Jan 23, 2015 at 4:47 PM, Sjoerd Simons > wrote: >>> >>> If this pin is used by the Odroid XU3 board, shouldn't be defined in >>> the exynos5422-odroidxu3.dts instead? >> >> It's not just used by the XU3 though, it's also hooked up on the peach >> pi chromebook for example and i would expect it to be hooked up on most >> board with an eMMC >> >> This change is consistent with most of the special purpose GPIO pins >> defined in that file, so i don't see the problem with including it in >> that pinctrl file > > In that case I completely agree that it should be defined in the .dtsi > but that is not what the commit message said though :-) I will resend the patch with obvious commit message. Thanks for review. Best Regards, Jaehoon Chung > > Best regards, > Javier > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: Add sd0_rst pinctrl node to exynos5420
Add sd0_rst node to exynos5420-pinctrl.dtsi.
(It's used on odroid-xu3 board)
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index ba686e4..315cad7 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -194,6 +194,11 @@
samsung,pin-drv = <3>;
};
+ sd0_rst: sd0-rst {
+ samsung,pins = "gpd1-0";
+ samsung,pin-function = <1>;
+ };
+
sd1_clk: sd1-clk {
samsung,pins = "gpc1-0";
samsung,pin-function = <2>;
--
1.7.9.5
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Re: [PATCH v4 2/2] ARM: dts: Add HS400 support for exynos5420 and exynos5800
Hi.
On 01/21/2015 11:12 PM, Alim Akhtar wrote:
> Hi Jaehoon
>
> On Wed, Jan 21, 2015 at 4:32 AM, Jaehoon Chung wrote:
>> Hi,
>>
>> If you want to enable the hs400 mode, need to add "mmc-hs400-1_8v" or
>> "mmc-hs400-1_2v".
>> But this patch didn't add them. do you have any other plan?
>>
> Yes, right, plan is to send separate patch to enable hs400, as of now
> I am not sure if all the 5800-peach-pi boards are populated with
> emmc5.0 device or not. So I will enable HS400 after confirming this
> point.
I know if card is not support hs400, then it should be enabled to other bus
mode.
Best Regards,
Jaehoon Chung
>> On 01/14/2015 07:30 PM, Alim Akhtar wrote:
>>> From: Seungwon Jeon
>>>
>>> HS400 timing values are added for SMDK5420, exynos5420-peach-pit
>>> and exynos5800-peach-pi boards.
>>> This also adds RCLK GPIO line, this gpio should be in pull-down
>>> state.
>>>
>>> Signed-off-by: Seungwon Jeon
>>> Signed-off-by: Alim Akhtar
>>> [Alim: addressed review comments]
>>> ---
>>> arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +++-
>>> arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 +++
>>> arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +++-
>>> arch/arm/boot/dts/exynos5800-peach-pi.dts |4 +++-
>>> 4 files changed, 16 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
>>> b/arch/arm/boot/dts/exynos5420-peach-pit.dts
>>> index 9a050e1..7ffaba8 100644
>>> --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
>>> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
>>> @@ -569,8 +569,10 @@
>>> samsung,dw-mshc-ciu-div = <3>;
>>> samsung,dw-mshc-sdr-timing = <0 4>;
>>> samsung,dw-mshc-ddr-timing = <0 2>;
>>> + samsung,dw-mshc-hs400-timing = <0 2>;
>>> + read-strobe-delay = <90>;
>>> pinctrl-names = "default";
>>> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
>>> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
>>> bus-width = <8>;
>>> };
>>>
>>> diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
>>> b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
>>> index ba686e4..8b15316 100644
>>> --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
>>> +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
>>> @@ -201,6 +201,13 @@
>>> samsung,pin-drv = <3>;
>>> };
>>>
>>> + sd0_rclk: sd0-rclk {
>>
>> I know it used to "sd0_rdqs", not "sd0_rclk".
>> Change name.
>>
> Ok, I will change as per UM of 5800/5420,
>
>> Best Regards,
>> Jaehoon Chung
>>> + samsung,pins = "gpc0-7";
>>> + samsung,pin-function = <2>;
>>> + samsung,pin-pud = <1>;
>>> + samsung,pin-drv = <3>;
>>> + };
>>> +
>>> sd1_cmd: sd1-cmd {
>>> samsung,pins = "gpc1-1";
>>> samsung,pin-function = <2>;
>>> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
>>> b/arch/arm/boot/dts/exynos5420-smdk5420.dts
>>> index 8be3d7b..5290e79 100644
>>> --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
>>> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
>>> @@ -80,8 +80,10 @@
>>> samsung,dw-mshc-ciu-div = <3>;
>>> samsung,dw-mshc-sdr-timing = <0 4>;
>>> samsung,dw-mshc-ddr-timing = <0 2>;
>>> + samsung,dw-mshc-hs400-timing = <0 2>;
>>> + read-strobe-delay = <90>;
>>> pinctrl-names = "default";
>>> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
>>> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
>>> bus-width = <8>;
>>> cap-mmc-highspeed;
>>> };
>>> diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
>>> b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>>> index e8fdda8..fa1c858 100644
>>> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
>>> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>>> @@ -557,8 +557,10 @@
>>> samsung,dw-mshc-ciu-div = <3>;
>>> samsung,dw-mshc-sdr-timing = <0 4>;
>>> samsung,dw-mshc-ddr-timing = <0 2>;
>>> + samsung,dw-mshc-hs400-timing = <0 2>;
>>> + read-strobe-delay = <90>;
>>> pinctrl-names = "default";
>>> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
>>> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
>>> bus-width = <8>;
>>> };
>>>
>>>
>>
>
>
>
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Re: [PATCH v4 2/2] ARM: dts: Add HS400 support for exynos5420 and exynos5800
Hi,
If you want to enable the hs400 mode, need to add "mmc-hs400-1_8v" or
"mmc-hs400-1_2v".
But this patch didn't add them. do you have any other plan?
On 01/14/2015 07:30 PM, Alim Akhtar wrote:
> From: Seungwon Jeon
>
> HS400 timing values are added for SMDK5420, exynos5420-peach-pit
> and exynos5800-peach-pi boards.
> This also adds RCLK GPIO line, this gpio should be in pull-down
> state.
>
> Signed-off-by: Seungwon Jeon
> Signed-off-by: Alim Akhtar
> [Alim: addressed review comments]
> ---
> arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +++-
> arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 +++
> arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +++-
> arch/arm/boot/dts/exynos5800-peach-pi.dts |4 +++-
> 4 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
> b/arch/arm/boot/dts/exynos5420-peach-pit.dts
> index 9a050e1..7ffaba8 100644
> --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
> @@ -569,8 +569,10 @@
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <0 4>;
> samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> + read-strobe-delay = <90>;
> pinctrl-names = "default";
> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
> bus-width = <8>;
> };
>
> diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> index ba686e4..8b15316 100644
> --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> @@ -201,6 +201,13 @@
> samsung,pin-drv = <3>;
> };
>
> + sd0_rclk: sd0-rclk {
I know it used to "sd0_rdqs", not "sd0_rclk".
Change name.
Best Regards,
Jaehoon Chung
> + samsung,pins = "gpc0-7";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <1>;
> + samsung,pin-drv = <3>;
> + };
> +
> sd1_cmd: sd1-cmd {
> samsung,pins = "gpc1-1";
> samsung,pin-function = <2>;
> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts
> b/arch/arm/boot/dts/exynos5420-smdk5420.dts
> index 8be3d7b..5290e79 100644
> --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
> @@ -80,8 +80,10 @@
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <0 4>;
> samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> + read-strobe-delay = <90>;
> pinctrl-names = "default";
> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
> bus-width = <8>;
> cap-mmc-highspeed;
> };
> diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts
> b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> index e8fdda8..fa1c858 100644
> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> @@ -557,8 +557,10 @@
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <0 4>;
> samsung,dw-mshc-ddr-timing = <0 2>;
> + samsung,dw-mshc-hs400-timing = <0 2>;
> + read-strobe-delay = <90>;
> pinctrl-names = "default";
> - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8 &sd0_rclk>;
> bus-width = <8>;
> };
>
>
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Re: [PATCH v4 1/2] mmc: dw_mmc: exynos: Support eMMC's HS400 mode
ret = clk_set_rate(host->ciu_clk, wanted * div);
> + if (ret)
> + dev_warn(host->dev,
> + "failed to set clk-rate %u error: %d\n",
> + wanted * div, ret);
> + actual = clk_get_rate(host->ciu_clk);
> + host->bus_hz = actual / div;
> + priv->cur_speed = wanted;
> + host->current_speed = 0;
> +}
> +
> +static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
> +{
> + struct dw_mci_exynos_priv_data *priv = host->priv;
> + unsigned int wanted = ios->clock;
> + u32 timing = ios->timing, clksel;
> +
> + switch (timing) {
> + case MMC_TIMING_MMC_HS400:
> + /* Update tuned sample timing */
> + clksel = SDMMC_CLKSEL_UP_SAMPLE(
> + priv->hs400_timing, priv->tuned_sample);
> + wanted <<= 1;
> + break;
> + case MMC_TIMING_MMC_DDR52:
> + clksel = priv->ddr_timing;
> + /* Should be double rate for DDR mode */
> + if (ios->bus_width == MMC_BUS_WIDTH_8)
> + wanted <<= 1;
> + break;
> + default:
> + clksel = priv->sdr_timing;
> }
> +
> + /* Set clock timing for the requested speed mode*/
> + dw_mci_exynos_set_clksel_timing(host, clksel);
> +
> + /* Configure setting for HS400 */
> + dw_mci_exynos_config_hs400(host, timing);
> +
> + /* Configure clock rate */
> + dw_mci_exynos_adjust_clock(host, wanted);
> }
>
> static int dw_mci_exynos_parse_dt(struct dw_mci *host)
> @@ -260,6 +353,16 @@ static int dw_mci_exynos_parse_dt(struct dw_mci *host)
> return ret;
>
> priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div);
> +
> + ret = of_property_read_u32_array(np,
> + "samsung,dw-mshc-hs400-timing", timing, 2);
> + if (!ret && of_property_read_u32(np,
> + "read-strobe-delay", &priv->dqs_delay))
> + dev_info(host->dev,
> + "read-strobe-delay is not found, assuming usage of
> default value\n");
Need the message?
> +
> + priv->hs400_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1],
> + HS400_FIXED_CIU_CLK_DIV);
Why useed the HS400_FIXED_CIU_CLK_DIV? always set to 1?
Best Regards,
Jaehoon Chung
> host->priv = priv;
> return 0;
> }
> @@ -285,7 +388,7 @@ static inline void dw_mci_exynos_set_clksmpl(struct
> dw_mci *host, u8 sample)
> clksel = mci_readl(host, CLKSEL64);
> else
> clksel = mci_readl(host, CLKSEL);
> - clksel = (clksel & ~0x7) | SDMMC_CLKSEL_CCLK_SAMPLE(sample);
> + clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
> if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
> priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
> mci_writel(host, CLKSEL64, clksel);
> @@ -304,13 +407,16 @@ static inline u8 dw_mci_exynos_move_next_clksmpl(struct
> dw_mci *host)
> clksel = mci_readl(host, CLKSEL64);
> else
> clksel = mci_readl(host, CLKSEL);
> +
> sample = (clksel + 1) & 0x7;
> - clksel = (clksel & ~0x7) | sample;
> + clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
> +
> if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
> priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
> mci_writel(host, CLKSEL64, clksel);
> else
> mci_writel(host, CLKSEL, clksel);
> +
> return sample;
> }
>
> @@ -343,6 +449,7 @@ out:
> static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot)
> {
> struct dw_mci *host = slot->host;
> + struct dw_mci_exynos_priv_data *priv = host->priv;
> struct mmc_host *mmc = slot->mmc;
> u8 start_smpl, smpl, candiates = 0;
> s8 found = -1;
> @@ -360,14 +467,27 @@ static int dw_mci_exynos_execute_tuning(struct
> dw_mci_slot *slot)
> } while (start_smpl != smpl);
>
> found = dw_mci_exynos_get_best_clksmpl(candiates);
> - if (found >= 0)
> + if (found >= 0) {
> dw_mci_exynos_set_clksmpl(host, found);
> - else
> + priv->tuned_sample = found;
> + } else {
> ret = -EIO;
> + }
>
> return ret;
> }
>
> +int dw_mci_exynos_prepare_hs400_tuning(struct dw_mci *host,
> + struct mmc_ios *ios)
> +{
> + struct dw_mci_exynos_p
Re: [PATCH v4 0/2] mmc: dw_mmc: exynos: Add HS400 support
Hi, Alim. On 01/14/2015 07:30 PM, Alim Akhtar wrote: > This adds HS400 mode support for exynos dw_mmc host controller. > > Currently tested on Exynos5800-peach-pi platform for HS400 mode. > Tested HS200 mode with this series applied, HS200 still works. > > Appreciate testing on other exynos5/7 platform which supports emmc5.0 I will test this patch on exynos5/7 board. Best Regards, Jaehoon Chung > > Changes in V4: > * drop the idea of changing existing binding for ciu_div as per [1] > * addressed comments from Jaehoon Chung [2] > > [1] http://www.spinics.net/lists/linux-samsung-soc/msg40923.html > [2] http://www.spinics.net/lists/devicetree/msg64373.html > > Changes in V3: > rebased on ulf's next (commit: 607b448 mmc: core: Make tuning block > patterns static) > > Seungwon Jeon (2): > mmc: dw_mmc: exynos: Support eMMC's HS400 mode > ARM: dts: Add HS400 support for exynos5420 and exynos5800 > > .../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 + > arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +- > arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 + > arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +- > arch/arm/boot/dts/exynos5800-peach-pi.dts |4 +- > drivers/mmc/host/dw_mmc-exynos.c | 187 > > drivers/mmc/host/dw_mmc-exynos.h | 19 +- > drivers/mmc/host/dw_mmc.c | 16 +- > drivers/mmc/host/dw_mmc.h |2 + > 9 files changed, 212 insertions(+), 38 deletions(-) > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5] mmc: dw_mmc: add quirk for broken data transfer over scheme
Hi, Addy.
On 01/05/2015 05:21 PM, Addy Ke wrote:
> This patch add a new quirk to add a s/w timer to notify the driver
> to terminate current transfer and report a data timeout to the core,
> if DTO interrupt does NOT come within the given time.
>
> dw_mmc call mmc_request_done func to finish transfer depends on
> DTO interrupt. If DTO interrupt does not come in sending data state,
> the current transfer will be blocked.
>
> We got the reply from synopsys:
> There are two counters but both use the same value of [31:8] bits.
> Data timeout counter doesn't wait for stop clock and you should get
> DRTO even when the clock is not stopped.
> Host Starvation timeout counter is triggered with stop clock condition.
>
> This means that host should get DRTO and DTO interrupt.
>
> But this case really exists, when driver reads tuning data from
> card on RK3288-pink2 board. I measured waveforms by oscilloscope
> and found that card clock was always on and data lines were always
> holded high level in sending data state.
>
> There are two possibility that data over interrupt doesn't come in
> reading data state on RK3X SoCs:
> - get command done interrupt, but doesn't get any data-related interrupt.
> - get data error interrupt, but doesn't get data over interrupt.
>
> We don't know why we have this problem, but we need it to fix this problem
> now.
> And I will post a follow up change when we find the root cause.
>
> Signed-off-by: Addy Ke
> ---
> Changes in v2:
> - fix some typo.
> - remove extra timeout value (250ms).
> - remove dw_mci_dto_start_monitor func.
> - use "broken-dto" for new quirk and change Subject for it.
>
> Changes in v3:
> - Remove dts for broken-dto, just add this quirk in dw_mci_rockchip_init
>
> Changes in v4:
> - fix bug that may cause 32 bit overflow by (drto_clks * 1000).
> - doesn't call mod_timer in writing data state, becase TMOUT register only
> for reading data.
>
> Changes in v5:
> - fix some typo.
> - add a buffer for drto_ms.
> - move drto_ms related code to a helper function.
>
> drivers/mmc/host/dw_mmc-rockchip.c | 3 ++
> drivers/mmc/host/dw_mmc.c | 71
> --
> include/linux/mmc/dw_mmc.h | 5 +++
> 3 files changed, 77 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
> b/drivers/mmc/host/dw_mmc-rockchip.c
> index 5650ac4..ba92ebd 100644
> --- a/drivers/mmc/host/dw_mmc-rockchip.c
> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
> @@ -73,6 +73,9 @@ static int dw_mci_rockchip_init(struct dw_mci *host)
> /* It is slot 8 on Rockchip SoCs */
> host->sdio_id0 = 8;
>
> + /* It needs this quirk on all Rockchip SoCs */
> + host->pdata->quirks |= DW_MCI_QUIRK_BROKEN_DTO;
> +
> return 0;
> }
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 6e4d864..ace4b40 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -1468,6 +1468,20 @@ static int dw_mci_data_complete(struct dw_mci *host,
> struct mmc_data *data)
> return data->error;
> }
>
> +static unsigned int dw_mci_get_drto_ms(struct dw_mci *host)
> +{
> + unsigned int drto_clks;
> + unsigned int drto_ms;
> +
> + drto_clks = mci_readl(host, TMOUT) >> 8;
> + drto_ms = DIV_ROUND_UP(drto_clks, host->bus_hz / 1000);
> +
> + /* add a buffer */
> + drto_ms += 10;
Add a buffer? What means?
> +
> + return drto_ms;
> +}
dw_mci_set_drto() instead of dw_mci_get_drto_ms().
Then you can include the codes relevant to broken-dto.
static unsigned int (or void) dw_mci_set_drto(struct dw_mci *host) {
if (!(host->quirks & DW_MCI_QUIRK_BROKEN_DTO))
return;
...
add codes relevant to broken-dtop (mod_timer) at here.
}
If you need to start timer, you have only to call dw_mci_set_drto().
how about?
Best Regards,
Jaehoon Chung
> +
> static void dw_mci_tasklet_func(unsigned long priv)
> {
> struct dw_mci *host = (struct dw_mci *)priv;
> @@ -1477,6 +1491,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
> enum dw_mci_state state;
> enum dw_mci_state prev_state;
> unsigned int err;
> + unsigned int drto_ms;
>
> spin_lock(&host->lock);
>
> @@ -1542,8 +1557,19 @@ static void dw_mci_tasklet_func(unsigned long priv)
> }
>
> if (!test_and_clear_bit(EVENT_XFER_COMPLETE,
> - &host->pending_events))
> +
Re: [PATCH v3 2/4] mmc: dw_mmc: exynos: support eMMC's HS400 mode
iming;
> }
> +
> + /* Set clock timing for the requested speed mode*/
> + dw_mci_exynos_set_clksel_timing(host, clksel);
> +
> + /* Configure setting for HS400 */
> + dw_mci_exynos_config_hs400(host, timing);
> +
> + /* Configure clock rate */
> + dw_mci_exynos_adjust_clock(host, wanted);
> }
>
> static int dw_mci_exynos_dt_populate_timing(struct dw_mci *host,
> @@ -294,6 +367,14 @@ static int dw_mci_exynos_parse_dt(struct dw_mci *host)
>
> dw_mci_exynos_dt_populate_timing(host, priv->ctrl_type,
> "samsung,dw-mshc-hs200-timing", &priv->hs200_timing);
> +
> + ret = dw_mci_exynos_dt_populate_timing(host, priv->ctrl_type,
> + "samsung,dw-mshc-hs400-timing", &priv->hs400_timing);
> + if (!ret && of_property_read_u32(np,
> + "read-strobe-delay", &priv->dqs_delay))
> + dev_info(host->dev,
> + "read-strobe-delay is not found, assuming usage of
> default value\n");
> +
> host->priv = priv;
>
> return 0;
> @@ -320,7 +401,9 @@ static inline void dw_mci_exynos_set_clksmpl(struct
> dw_mci *host, u8 sample)
> clksel = mci_readl(host, CLKSEL64);
> else
> clksel = mci_readl(host, CLKSEL);
> - clksel = (clksel & ~0x7) | SDMMC_CLKSEL_CCLK_SAMPLE(sample);
> +
> + clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
> +
> if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
> priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
> mci_writel(host, CLKSEL64, clksel);
> @@ -339,13 +422,16 @@ static inline u8 dw_mci_exynos_move_next_clksmpl(struct
> dw_mci *host)
> clksel = mci_readl(host, CLKSEL64);
> else
> clksel = mci_readl(host, CLKSEL);
> +
> sample = (clksel + 1) & 0x7;
> - clksel = (clksel & ~0x7) | sample;
> + clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
> +
> if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
> priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
> mci_writel(host, CLKSEL64, clksel);
> else
> mci_writel(host, CLKSEL, clksel);
> +
> return sample;
> }
>
> @@ -378,6 +464,7 @@ out:
> static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot)
> {
> struct dw_mci *host = slot->host;
> + struct dw_mci_exynos_priv_data *priv = host->priv;
> struct mmc_host *mmc = slot->mmc;
> u8 start_smpl, smpl, candiates = 0;
> s8 found = -1;
> @@ -395,14 +482,27 @@ static int dw_mci_exynos_execute_tuning(struct
> dw_mci_slot *slot)
> } while (start_smpl != smpl);
>
> found = dw_mci_exynos_get_best_clksmpl(candiates);
> - if (found >= 0)
> + if (found >= 0) {
> dw_mci_exynos_set_clksmpl(host, found);
> - else
> + priv->tuned_sample = found;
> + } else {
> ret = -EIO;
> + }
>
> return ret;
> }
>
> +int dw_mci_exynos_prepare_hs400_tuning(struct dw_mci *host,
> + struct mmc_ios *ios)
> +{
> + struct dw_mci_exynos_priv_data *priv = host->priv;
> +
> + dw_mci_exynos_set_clksel_timing(host, priv->hs400_timing);
> + dw_mci_exynos_adjust_clock(host, (ios->clock) << 1);
> +
> + return 0;
> +}
> +
> /* Common capabilities of Exynos4/Exynos5 SoC */
> static unsigned long exynos_dwmmc_caps[4] = {
> MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23,
> @@ -419,6 +519,7 @@ static const struct dw_mci_drv_data exynos_drv_data = {
> .set_ios= dw_mci_exynos_set_ios,
> .parse_dt = dw_mci_exynos_parse_dt,
> .execute_tuning = dw_mci_exynos_execute_tuning,
> + .prepare_hs400_tuning = dw_mci_exynos_prepare_hs400_tuning,
> };
>
> static const struct of_device_id dw_mci_exynos_match[] = {
> diff --git a/drivers/mmc/host/dw_mmc-exynos.h
> b/drivers/mmc/host/dw_mmc-exynos.h
> index c04ecef..e7faffe 100644
> --- a/drivers/mmc/host/dw_mmc-exynos.h
> +++ b/drivers/mmc/host/dw_mmc-exynos.h
> @@ -12,21 +12,36 @@
> #ifndef _DW_MMC_EXYNOS_H_
> #define _DW_MMC_EXYNOS_H_
>
> -/* Extended Register's Offset */
> #define SDMMC_CLKSEL 0x09C
> #define SDMMC_CLKSEL64 0x0A8
>
> +/* Extended Register's Offset */
> +#define SDMMC_HS400_DQS_EN 0x180
> +#define SDMMC_HS400_ASYNC_FIFO_CTRL 0x184
> +#define SDMMC_HS400_DLINE_CTRL 0
Re: [PATCH v3 1/4] mmc: dw_mmc: exynos: incorporate ciu_div into timing property
return EXYNOS4412_FIXED_CIU_CLK_DIV;
case DW_MCI_TYPE_EXYNOS4210:
return EXYNOS4210_FIXED_CIU_CLK_DIV;
case DW_MCI_TYPE_EXYNOS7:
case DW_MCI_TYPE_EXYNOS7_SMU:
return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL64)) + 1;
default:
return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL)) + 1;
}
> +}
> +
> static int dw_mci_exynos_priv_init(struct dw_mci *host)
> {
> struct dw_mci_exynos_priv_data *priv = host->priv;
> @@ -85,6 +101,8 @@ static int dw_mci_exynos_priv_init(struct dw_mci *host)
> SDMMC_MPSCTRL_NON_SECURE_WRITE_BIT);
> }
>
> + priv->ciu_div = dw_mci_exynos_get_ciu_div(host);
> +
> return 0;
> }
>
> @@ -92,7 +110,7 @@ static int dw_mci_exynos_setup_clock(struct dw_mci *host)
> {
> struct dw_mci_exynos_priv_data *priv = host->priv;
>
> - host->bus_hz /= (priv->ciu_div + 1);
> + host->bus_hz /= priv->ciu_div;
>
> return 0;
> }
> @@ -177,9 +195,14 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host,
> struct mmc_ios *ios)
> struct dw_mci_exynos_priv_data *priv = host->priv;
> unsigned int wanted = ios->clock;
> unsigned long actual;
> - u8 div = priv->ciu_div + 1;
>
> - if (ios->timing == MMC_TIMING_MMC_DDR52) {
> + if (ios->timing == MMC_TIMING_MMC_HS200) {
> + if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
> + priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
> + mci_writel(host, CLKSEL64, priv->hs200_timing);
> + else
> + mci_writel(host, CLKSEL, priv->hs200_timing);
> + } else if (ios->timing == MMC_TIMING_MMC_DDR52) {
> if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
> priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
> mci_writel(host, CLKSEL64, priv->ddr_timing);
> @@ -208,6 +231,7 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host,
> struct mmc_ios *ios)
> wanted = EXYNOS_CCLKIN_MIN;
>
> if (wanted != priv->cur_speed) {
> + u8 div = dw_mci_exynos_get_ciu_div(host);
> int ret = clk_set_rate(host->ciu_clk, wanted * div);
> if (ret)
> dev_warn(host->dev,
> @@ -220,14 +244,34 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host,
> struct mmc_ios *ios)
> }
> }
>
> +static int dw_mci_exynos_dt_populate_timing(struct dw_mci *host,
> + unsigned int ctrl_type,
> + const char *propname,
> + u32 *out_values)
> +{
> + struct device_node *np = host->dev->of_node;
> + u32 timing[3];
> + int ret;
> +
> + ret = of_property_read_u32_array(np, propname, timing, 3);
> + if (ret)
> + return ret;
> +
> + if (ctrl_type == DW_MCI_TYPE_EXYNOS4412 ||
> + ctrl_type == DW_MCI_TYPE_EXYNOS4210)
> + timing[2] = 0;
Is it set to 0 into dt-file?
> +
> + *out_values = SDMMC_CLKSEL_TIMING(timing[0], timing[1], timing[2]);
> +
> + return 0;
> +}
> +
> +
> static int dw_mci_exynos_parse_dt(struct dw_mci *host)
> {
> struct dw_mci_exynos_priv_data *priv;
> struct device_node *np = host->dev->of_node;
> - u32 timing[2];
> - u32 div = 0;
> - int idx;
> - int ret;
> + int idx, ret;
>
> priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
> if (!priv)
> @@ -238,29 +282,20 @@ static int dw_mci_exynos_parse_dt(struct dw_mci *host)
> priv->ctrl_type = exynos_compat[idx].ctrl_type;
> }
>
> - if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4412)
> - priv->ciu_div = EXYNOS4412_FIXED_CIU_CLK_DIV - 1;
> - else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4210)
> - priv->ciu_div = EXYNOS4210_FIXED_CIU_CLK_DIV - 1;
> - else {
> - of_property_read_u32(np, "samsung,dw-mshc-ciu-div", &div);
> - priv->ciu_div = div;
> - }
> -
> - ret = of_property_read_u32_array(np,
> - "samsung,dw-mshc-sdr-timing", timing, 2);
> + ret = dw_mci_exynos_dt_populate_timing(host, priv->ctrl_type,
> + "samsung,dw-mshc-sdr-timing", &priv->sdr_timing);
> if (ret)
> return ret;
>
> - priv->sdr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div);
> -
> -
Re: [PATCH] mmc: dw_mmc: try pick the exact same voltage as vmmc for vqmmc
On 11/21/2014 09:06 PM, Ulf Hansson wrote: > [...] > >> Sure >> If the first card is sd2.0 since startup, dw_mci_switch_voltage will not be >> called, > > That can't be right. mmc_power_up() should trigger > dw_mci_switch_voltage() to be invoked. Since dw_mci_switch_voltage() is invoked, voltage is changed from 1.8v to 2.7v (minimum value 2.7-3.6v), isn't? > >> and card can be identified. But if UHS card is pulgged in first, the vqmmc >> will be down to 1.8v. >> >> when sd2.0 card is pulgged in, mmc core will call dw_mci_switch_voltage to >> change vqmmc to 3.3v >> (MMC_SINGLE_VOTAGE_330). So vqmmc will be set 2.7v, if we request 2.7-3.6v. >> >> But vmmc is always 3.3v,becuase it be set min_volt = max_volt = 3.3v in dt >> tables. vmmc is fixed voltage? >> >> So the result: >> vmmc = 3.3v and vqmmc = 2.7v, and sd2.0 card is failed to identify in my >> test. > > Hmm. I wonder why it works the first time? Could it be that your > regulator have voltage ramp up time that isn't properly considered? if oscilloscope can use, can we know more exactly? Best Regards, Jaehoon Chung > > Kind regards > Uffe > -- > To unsubscribe from this list: send the line "unsubscribe linux-mmc" in > the body of a message to majord...@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mmc: dw_mmc: add quirk for data over interrupt timeout
Hi, Addy.
On 11/20/2014 06:33 PM, addy ke wrote:
> Hi, Jaehoon
>
> On 2014/11/19 13:56, addy ke wrote:
>> Hi Jaehoon
>>
>> On 2014/11/19 09:22, Jaehoon Chung Wrote:
>>> Hi, Addy.
>>>
>>> On 11/18/2014 09:32 AM, Addy wrote:
>>>>
>>>> On 2014年11月14日 21:18, Jaehoon Chung wrote:
>>>>> Hi, Addy.
>>>>>
>>>>> Did you use the DW_MCI_QUIRK_IDMAC_DTO?
>>>>> I'm not sure, but i wonder if you get what result when you use above
>>>>> quirk.
>>>>
>>>> DW_MCI_QUIRK_IDMAC_DTO is only for version2.0 or below.
>>>> /*
>>>> * DTO fix - version 2.10a and below, and only if internal DMA
>>>> * is configured.
>>>> */
>>>> if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) {
>>>> if (!pending &&
>>>> ((mci_readl(host, STATUS) >> 17) & 0x1fff))
>>>> pending |= SDMMC_INT_DATA_OVER;
>>>> }
>>>>
>>>> It meams that if interrupt comes, but pending = 0 && FIFO_COUNT(bit17-29)
>>>> !=0,
>>>> then force to set SDMMC_INT_DATA_OVER.
>>>> But in our case, FIFO_COUNT = 0 (STATUS register value is 0xad06). This is
>>>> because that the card does not send data to host. So there is no
>>>> interrupts come,
>>>> and interrupt handle function(dw_mci_interrupt) will not be called. So we
>>>> need a
>>>> timer to handle this case.
>>>>
>>>> So I think SDMMC_INT_DATA_OVER is not suitable for this case, and we need
>>>> a new
>>>> quirk.
>>>>
>>>>>
>>>>> And i will check more this patch at next week.
>>>>>
>>>>> Thanks for your efforts.
>>>>>
>>>>> Best Regards,
>>>>> Jaehoon Chung
>>>>>
>>>>> On 11/14/2014 10:05 PM, Addy Ke wrote:
>>>>>> From: Addy
>>>>>>
>>>>>> This patch add a new quirk to notify the driver to teminate
>>>>>> current transfer and report a data timeout to the core,
>>>>>> if data over interrupt does NOT come within the given time.
>>>>>>
>>>>>> dw_mmc call mmc_request_done func to finish transfer depends on
>>>>>> data over interrupt. If data over interrupt does not come in
>>>>>> sending data state, the current transfer will be blocked.
>>>>>>
>>>>>> But this case really exists, when driver reads tuning data from
>>>>>> card on rk3288-pink2 board. I measured waveforms by oscilloscope
>>>>>> and found that card clock was always on and data lines were always
>>>>>> holded high level in sending data state. This is the cause that
>>>>>> card does NOT send data to host.
>>>>>>
>>>>>> According to synopsys designware databook, the timeout counter is
>>>>>> started only after the card clock is stopped.
>>>>>>
>>>>>> So if card clock is always on, data read timeout interrupt will NOT come,
>>>>>> and if data lines are always holded high level, all data-related
>>>>>> interrupt such as start-bit error, data crc error, data over interrupt,
>>>>>> end-bit error, and so on, will NOT come too.
>>>>>>
>>>>>> So driver can't get the current state, it can do nothing but wait for.
>>>>>>
>>>>>> This patch is based on https://patchwork.kernel.org/patch/5227941/
>>>>>>
>>>>>> Signed-off-by: Addy
>>>>>> ---
>>>>>> drivers/mmc/host/dw_mmc.c | 47
>>>>>> +-
>>>>>> include/linux/mmc/dw_mmc.h | 5 +
>>>>>> 2 files changed, 51 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>>>>>> index b4c3044..3960fc3 100644
>>>>>> --- a/drivers/mmc/host/dw_mmc.c
>>>>>> +++ b/drivers/mmc/host/dw_mmc.c
>>>>>> @@ -1448,6 +1448,17 @@ static int dw_mci_data_complete(struct dw_mci
>>>>>> *host, struct mmc_data *data)
>>>>>> return data->error;
>>>>>&g
Re: [PATCH] mmc: dw_mmc: add quirk for data over interrupt timeout
Hi, Addy.
On 11/18/2014 09:32 AM, Addy wrote:
>
> On 2014年11月14日 21:18, Jaehoon Chung wrote:
>> Hi, Addy.
>>
>> Did you use the DW_MCI_QUIRK_IDMAC_DTO?
>> I'm not sure, but i wonder if you get what result when you use above quirk.
>
> DW_MCI_QUIRK_IDMAC_DTO is only for version2.0 or below.
> /*
> * DTO fix - version 2.10a and below, and only if internal DMA
> * is configured.
> */
> if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) {
> if (!pending &&
> ((mci_readl(host, STATUS) >> 17) & 0x1fff))
> pending |= SDMMC_INT_DATA_OVER;
> }
>
> It meams that if interrupt comes, but pending = 0 && FIFO_COUNT(bit17-29) !=0,
> then force to set SDMMC_INT_DATA_OVER.
> But in our case, FIFO_COUNT = 0 (STATUS register value is 0xad06). This is
> because that the card does not send data to host. So there is no interrupts
> come,
> and interrupt handle function(dw_mci_interrupt) will not be called. So we
> need a
> timer to handle this case.
>
> So I think SDMMC_INT_DATA_OVER is not suitable for this case, and we need a
> new
> quirk.
>
>>
>> And i will check more this patch at next week.
>>
>> Thanks for your efforts.
>>
>> Best Regards,
>> Jaehoon Chung
>>
>> On 11/14/2014 10:05 PM, Addy Ke wrote:
>>> From: Addy
>>>
>>> This patch add a new quirk to notify the driver to teminate
>>> current transfer and report a data timeout to the core,
>>> if data over interrupt does NOT come within the given time.
>>>
>>> dw_mmc call mmc_request_done func to finish transfer depends on
>>> data over interrupt. If data over interrupt does not come in
>>> sending data state, the current transfer will be blocked.
>>>
>>> But this case really exists, when driver reads tuning data from
>>> card on rk3288-pink2 board. I measured waveforms by oscilloscope
>>> and found that card clock was always on and data lines were always
>>> holded high level in sending data state. This is the cause that
>>> card does NOT send data to host.
>>>
>>> According to synopsys designware databook, the timeout counter is
>>> started only after the card clock is stopped.
>>>
>>> So if card clock is always on, data read timeout interrupt will NOT come,
>>> and if data lines are always holded high level, all data-related
>>> interrupt such as start-bit error, data crc error, data over interrupt,
>>> end-bit error, and so on, will NOT come too.
>>>
>>> So driver can't get the current state, it can do nothing but wait for.
>>>
>>> This patch is based on https://patchwork.kernel.org/patch/5227941/
>>>
>>> Signed-off-by: Addy
>>> ---
>>> drivers/mmc/host/dw_mmc.c | 47
>>> +-
>>> include/linux/mmc/dw_mmc.h | 5 +
>>> 2 files changed, 51 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>>> index b4c3044..3960fc3 100644
>>> --- a/drivers/mmc/host/dw_mmc.c
>>> +++ b/drivers/mmc/host/dw_mmc.c
>>> @@ -1448,6 +1448,17 @@ static int dw_mci_data_complete(struct dw_mci *host,
>>> struct mmc_data *data)
>>> return data->error;
>>> }
>>> +static inline void dw_mci_dto_start_monitor(struct dw_mci *host)
>>> +{
>>> +unsigned int data_tmout_clks;
>>> +unsigned int data_tmout_ms;
>>> +
>>> +data_tmout_clks = (mci_readl(host, TMOUT) >> 8);
>>> +data_tmout_ms = (data_tmout_clks * 1000 / host->bus_hz) + 250;
What's 250? And how about using the DIV_ROUND_UP?
>>> +
>>> +mod_timer(&host->dto_timer, jiffies + msecs_to_jiffies(data_tmout_ms));
>>> +}
>>> +
>>> static void dw_mci_tasklet_func(unsigned long priv)
>>> {
>>> struct dw_mci *host = (struct dw_mci *)priv;
>>> @@ -1522,8 +1533,11 @@ static void dw_mci_tasklet_func(unsigned long priv)
>>> }
>>> if (!test_and_clear_bit(EVENT_XFER_COMPLETE,
>>> -&host->pending_events))
>>> +&host->pending_events)) {
>>> +if (host->quirks & DW_MCI_QUIRK_DTO_TIMER)
>>> +dw_mci_dto_start_monitor(host);
if timer is starting at only here, dw_mci_dto_start_monitor() doesn
Re: [PATCH v4] mmc: dw_mmc: add support for the other bit of sdio interrupt
On 11/14/2014 03:58 AM, Doug Anderson wrote: > Addy, > > On Tue, Nov 4, 2014 at 6:03 AM, Addy Ke wrote: >> The bit of sdio interrupt is 16 in designware implementation, >> but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the >> number of slot0 in the SDIO interrupt registers. >> >> Signed-off-by: Addy Ke >> --- >> Changes in v2: >> - rebase on http://git.linaro.org/git/people/ulf.hansson/mmc.git, next branch >> Changes in v3: >> - Remove dts for sdio_id0, just replace this with 8, suggested by Doug >> - Change to support all Rockchip Socs, suggested by Heiko >> Changes in v4: >> - use init-hook to set sdio_id0, suggested by Jaehoon >> >> drivers/mmc/host/dw_mmc-rockchip.c | 10 ++ >> drivers/mmc/host/dw_mmc.c | 12 +++- >> drivers/mmc/host/dw_mmc.h | 2 ++ >> include/linux/mmc/dw_mmc.h | 3 +++ >> 4 files changed, 22 insertions(+), 5 deletions(-) > > Reviewed-by: Doug Anderson > Acked-by: Jaehoon Chung Best Regards, Jaehoon Chung -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mmc: dw_mmc: add quirk for data over interrupt timeout
Hi, Addy.
Did you use the DW_MCI_QUIRK_IDMAC_DTO?
I'm not sure, but i wonder if you get what result when you use above quirk.
And i will check more this patch at next week.
Thanks for your efforts.
Best Regards,
Jaehoon Chung
On 11/14/2014 10:05 PM, Addy Ke wrote:
> From: Addy
>
> This patch add a new quirk to notify the driver to teminate
> current transfer and report a data timeout to the core,
> if data over interrupt does NOT come within the given time.
>
> dw_mmc call mmc_request_done func to finish transfer depends on
> data over interrupt. If data over interrupt does not come in
> sending data state, the current transfer will be blocked.
>
> But this case really exists, when driver reads tuning data from
> card on rk3288-pink2 board. I measured waveforms by oscilloscope
> and found that card clock was always on and data lines were always
> holded high level in sending data state. This is the cause that
> card does NOT send data to host.
>
> According to synopsys designware databook, the timeout counter is
> started only after the card clock is stopped.
>
> So if card clock is always on, data read timeout interrupt will NOT come,
> and if data lines are always holded high level, all data-related
> interrupt such as start-bit error, data crc error, data over interrupt,
> end-bit error, and so on, will NOT come too.
>
> So driver can't get the current state, it can do nothing but wait for.
>
> This patch is based on https://patchwork.kernel.org/patch/5227941/
>
> Signed-off-by: Addy
> ---
> drivers/mmc/host/dw_mmc.c | 47
> +-
> include/linux/mmc/dw_mmc.h | 5 +
> 2 files changed, 51 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index b4c3044..3960fc3 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -1448,6 +1448,17 @@ static int dw_mci_data_complete(struct dw_mci *host,
> struct mmc_data *data)
> return data->error;
> }
>
> +static inline void dw_mci_dto_start_monitor(struct dw_mci *host)
> +{
> + unsigned int data_tmout_clks;
> + unsigned int data_tmout_ms;
> +
> + data_tmout_clks = (mci_readl(host, TMOUT) >> 8);
> + data_tmout_ms = (data_tmout_clks * 1000 / host->bus_hz) + 250;
> +
> + mod_timer(&host->dto_timer, jiffies + msecs_to_jiffies(data_tmout_ms));
> +}
> +
> static void dw_mci_tasklet_func(unsigned long priv)
> {
> struct dw_mci *host = (struct dw_mci *)priv;
> @@ -1522,8 +1533,11 @@ static void dw_mci_tasklet_func(unsigned long priv)
> }
>
> if (!test_and_clear_bit(EVENT_XFER_COMPLETE,
> - &host->pending_events))
> + &host->pending_events)) {
> + if (host->quirks & DW_MCI_QUIRK_DTO_TIMER)
> + dw_mci_dto_start_monitor(host);
> break;
> + }
>
> set_bit(EVENT_XFER_COMPLETE, &host->completed_events);
>
> @@ -2115,6 +2129,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void
> *dev_id)
> }
>
> if (pending & SDMMC_INT_DATA_OVER) {
> + if (host->quirks & DW_MCI_QUIRK_DTO_TIMER)
> + del_timer(&host->dto_timer);
> +
> mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);
> if (!host->data_status)
> host->data_status = pending;
> @@ -2502,6 +2519,28 @@ ciu_out:
> return ret;
> }
>
> +static void dw_mci_dto_timer(unsigned long arg)
> +{
> + struct dw_mci *host = (struct dw_mci *)arg;
> +
> + switch (host->state) {
> + case STATE_SENDING_DATA:
> + case STATE_DATA_BUSY:
> + /*
> + * If data over interrupt does NOT come in sending data state,
> + * we should notify the driver to teminate current transfer
> + * and report a data timeout to the core.
> + */
> + host->data_status = SDMMC_INT_DRTO;
> + set_bit(EVENT_DATA_ERROR, &host->pending_events);
> + set_bit(EVENT_DATA_COMPLETE, &host->pending_events);
> + tasklet_schedule(&host->tasklet);
> + break;
> + default:
> + break;
> + }
> +}
> +
> #ifdef CONFIG_OF
> static struct dw_mci_of_quirks {
> char *quirk;
> @@ -2513,6 +2552,9 @@ static struc
Re: [PATCH v3] mmc: dw_mmc: add support for the other bit of sdio interrupt
Dear Heiko.
On 11/03/2014 07:23 PM, Heiko Stübner wrote:
> Hi Jaehoon,
>
> Am Montag, 3. November 2014, 17:59:58 schrieb Jaehoon Chung:
>> Hi, Addy.
>>
>> On 11/03/2014 10:20 AM, Addy Ke wrote:
>>> The bit of sdio interrupt is 16 in designware implementation,
>>> but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the
>>> number of slot0 in the SDIO interrupt registers.
>>>
>>> Signed-off-by: Addy Ke
>>> ---
>>> Changes in v2:
>>> - rebase on http://git.linaro.org/git/people/ulf.hansson/mmc.git, next
>>> branch Changes in v3:
>>> - Remove dts for sdio_id0, just replace this with 8, suggested by Doug
>>> - Change to support all Rockchip Socs, suggested by Heiko
>>>
>>> drivers/mmc/host/dw_mmc-rockchip.c | 10 ++
>>> drivers/mmc/host/dw_mmc.c | 12 +++-
>>> drivers/mmc/host/dw_mmc.h | 2 ++
>>> include/linux/mmc/dw_mmc.h | 3 +++
>>> 4 files changed, 22 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
>>> b/drivers/mmc/host/dw_mmc-rockchip.c index bbb4ec3..b997c8f 100644
>>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>>> @@ -68,14 +68,24 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host,
>>> struct mmc_ios *ios)>
>>> }
>>>
>>> }
>>>
>>> +static int dw_mci_rockchip_parse_dt(struct dw_mci *host)
>>> +{
>>> + /* It is slot 8 on Rockchip SoCs */
>>> + host->sdio_id0 = 8;
>>> +
>>> + return 0;
>>> +}
>>
>> Well, function is "__parse_dt__", but this function don't parse anything.
>> If All rockchip soc is supported, i think that it can be located to other
>> place.
>
> do you have a suggestion for a location?
>
> The only alternative I can see right now would be using the init-hook in
> dw_mci_drv_data or adding a new field to it holding the slot-offset.
> [with using the init-hook being my personal preference of the two]
init-hook can be used, then, in future, it can also included other specific
code for rock-chip.
Best Regards,
Jaehoon Chung
>
>
> Heiko
>
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Re: [PATCH v3] mmc: dw_mmc: add support for the other bit of sdio interrupt
Dear, Addy.
On 11/03/2014 07:23 PM, addy ke wrote:
> Hi, Jaehoo
>
> On 2014/11/3 16:59, Jaehoon Chung wrote:
>> Hi, Addy.
>>
>> On 11/03/2014 10:20 AM, Addy Ke wrote:
>>> The bit of sdio interrupt is 16 in designware implementation,
>>> but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the
>>> number of slot0 in the SDIO interrupt registers.
>>>
>>> Signed-off-by: Addy Ke
>>> ---
>>> Changes in v2:
>>> - rebase on http://git.linaro.org/git/people/ulf.hansson/mmc.git, next
>>> branch
>>> Changes in v3:
>>> - Remove dts for sdio_id0, just replace this with 8, suggested by Doug
>>> - Change to support all Rockchip Socs, suggested by Heiko
>>>
>>> drivers/mmc/host/dw_mmc-rockchip.c | 10 ++
>>> drivers/mmc/host/dw_mmc.c | 12 +++-
>>> drivers/mmc/host/dw_mmc.h | 2 ++
>>> include/linux/mmc/dw_mmc.h | 3 +++
>>> 4 files changed, 22 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
>>> b/drivers/mmc/host/dw_mmc-rockchip.c
>>> index bbb4ec3..b997c8f 100644
>>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>>> @@ -68,14 +68,24 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host,
>>> struct mmc_ios *ios)
>>> }
>>> }
>>>
>>> +static int dw_mci_rockchip_parse_dt(struct dw_mci *host)
>>> +{
>>> + /* It is slot 8 on Rockchip SoCs */
>>> + host->sdio_id0 = 8;
>>> +
>>> + return 0;
>>> +}
>>
>> Well, function is "__parse_dt__", but this function don't parse anything.
>> If All rockchip soc is supported, i think that it can be located to other
>> place.
>>
> Can add it in "init" function? like this:
> int dw_mci_rockchip_init(struct dw_mci *host)
> {
> /* It is slot 8 on Rockchip SoCs */
> host->sdio_id0 = 8;
>
> return 0;
> }
> static const struct dw_mci_drv_data {
>
> .init = dw_mci_rockchip_init,
> };
I think good this solution is used. "init-hook" can be also used in future.
When you resend the patch, i will reply with my-ack.
Best Regards,
Jaehoon Chung
>
>
>> Best Regards,
>> Jaehoon Chung
>>
>>> +
>>> static const struct dw_mci_drv_data rk2928_drv_data = {
>>> .prepare_command= dw_mci_rockchip_prepare_command,
>>> + .parse_dt = dw_mci_rockchip_parse_dt,
>>> };
>>>
>>> static const struct dw_mci_drv_data rk3288_drv_data = {
>>> .prepare_command= dw_mci_rockchip_prepare_command,
>>> .set_ios= dw_mci_rk3288_set_ios,
>>> .setup_clock= dw_mci_rk3288_setup_clock,
>>> + .parse_dt = dw_mci_rockchip_parse_dt,
>>> };
>>>
>>> static const struct of_device_id dw_mci_rockchip_match[] = {
>>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>>> index bb46b1b..a633b58 100644
>>> --- a/drivers/mmc/host/dw_mmc.c
>>> +++ b/drivers/mmc/host/dw_mmc.c
>>> @@ -823,7 +823,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
>>> bool force_clkinit)
>>>
>>> /* enable clock; only low power if no SDIO */
>>> clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
>>> - if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
>>> + if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->sdio_id)))
>>> clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
>>> mci_writel(host, CLKENA, clk_en_a);
>>>
>>> @@ -1184,10 +1184,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
>>> *mmc, int enb)
>>> dw_mci_disable_low_power(slot);
>>>
>>> mci_writel(host, INTMASK,
>>> - (int_mask | SDMMC_INT_SDIO(slot->id)));
>>> + (int_mask | SDMMC_INT_SDIO(slot->sdio_id)));
>>> } else {
>>> mci_writel(host, INTMASK,
>>> - (int_mask & ~SDMMC_INT_SDIO(slot->id)));
>>> + (int_mask & ~SDMMC_INT_SDIO(slot->sdio_id)));
>>> }
>>> }
>>>
>>> @@ -2056,8 +2056,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void
>>> *dev_id)
>>> /* Handle SDIO
Re: [PATCH v3] mmc: dw_mmc: add support for the other bit of sdio interrupt
Hi, Addy.
On 11/03/2014 10:20 AM, Addy Ke wrote:
> The bit of sdio interrupt is 16 in designware implementation,
> but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the
> number of slot0 in the SDIO interrupt registers.
>
> Signed-off-by: Addy Ke
> ---
> Changes in v2:
> - rebase on http://git.linaro.org/git/people/ulf.hansson/mmc.git, next branch
> Changes in v3:
> - Remove dts for sdio_id0, just replace this with 8, suggested by Doug
> - Change to support all Rockchip Socs, suggested by Heiko
>
> drivers/mmc/host/dw_mmc-rockchip.c | 10 ++
> drivers/mmc/host/dw_mmc.c | 12 +++-
> drivers/mmc/host/dw_mmc.h | 2 ++
> include/linux/mmc/dw_mmc.h | 3 +++
> 4 files changed, 22 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
> b/drivers/mmc/host/dw_mmc-rockchip.c
> index bbb4ec3..b997c8f 100644
> --- a/drivers/mmc/host/dw_mmc-rockchip.c
> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
> @@ -68,14 +68,24 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host,
> struct mmc_ios *ios)
> }
> }
>
> +static int dw_mci_rockchip_parse_dt(struct dw_mci *host)
> +{
> + /* It is slot 8 on Rockchip SoCs */
> + host->sdio_id0 = 8;
> +
> + return 0;
> +}
Well, function is "__parse_dt__", but this function don't parse anything.
If All rockchip soc is supported, i think that it can be located to other place.
Best Regards,
Jaehoon Chung
> +
> static const struct dw_mci_drv_data rk2928_drv_data = {
> .prepare_command= dw_mci_rockchip_prepare_command,
> + .parse_dt = dw_mci_rockchip_parse_dt,
> };
>
> static const struct dw_mci_drv_data rk3288_drv_data = {
> .prepare_command= dw_mci_rockchip_prepare_command,
> .set_ios= dw_mci_rk3288_set_ios,
> .setup_clock= dw_mci_rk3288_setup_clock,
> + .parse_dt = dw_mci_rockchip_parse_dt,
> };
>
> static const struct of_device_id dw_mci_rockchip_match[] = {
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index bb46b1b..a633b58 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -823,7 +823,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
> bool force_clkinit)
>
> /* enable clock; only low power if no SDIO */
> clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
> - if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
> + if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->sdio_id)))
> clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
> mci_writel(host, CLKENA, clk_en_a);
>
> @@ -1184,10 +1184,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
> *mmc, int enb)
> dw_mci_disable_low_power(slot);
>
> mci_writel(host, INTMASK,
> -(int_mask | SDMMC_INT_SDIO(slot->id)));
> +(int_mask | SDMMC_INT_SDIO(slot->sdio_id)));
> } else {
> mci_writel(host, INTMASK,
> -(int_mask & ~SDMMC_INT_SDIO(slot->id)));
> +(int_mask & ~SDMMC_INT_SDIO(slot->sdio_id)));
> }
> }
>
> @@ -2056,8 +2056,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void
> *dev_id)
> /* Handle SDIO Interrupts */
> for (i = 0; i < host->num_slots; i++) {
> struct dw_mci_slot *slot = host->slot[i];
> - if (pending & SDMMC_INT_SDIO(i)) {
> - mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i));
> + if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
> + mci_writel(host, RINTSTS,
> +SDMMC_INT_SDIO(slot->sdio_id));
> mmc_signal_sdio_irq(slot->mmc);
> }
> }
> @@ -2145,6 +2146,7 @@ static int dw_mci_init_slot(struct dw_mci *host,
> unsigned int id)
>
> slot = mmc_priv(mmc);
> slot->id = id;
> + slot->sdio_id = host->sdio_id0 + id;
> slot->mmc = mmc;
> slot->host = host;
> host->slot[id] = slot;
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 71d4995..0562f10 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -214,6 +214,7 @@ extern int dw_mci_resume(struct dw_mci *host);
> * with CONFIG_MMC_CLKGATE.
> * @flags: Random state bits associated with the slot.
> * @id: Number of th
Re: [PATCH v2] mmc: dw_mmc: add support for the other bit of sdio interrupt
Hi, Addy.
On 10/31/2014 12:50 PM, Addy Ke wrote:
> The bit of sdio interrupt is 16 in designware implementation,
> but it is 24 in RK3288. This patch add sdio_id0 for the number
> of slot0 in the SDIO interrupt registers, which can be set in
> platform DT table, such as:
> - rockchip,sdio-interrupt-slot0 = <8>;
I have a question. (It's not important question)
You mentioned the sdio-irq bit used from 24 to 31, right?
Then what interrupts are used from 16 to 23 at RK3288? Just reserved?
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Addy Ke
> ---
> Changes in v2:
> - rebase on http://git.linaro.org/git/people/ulf.hansson/mmc.git, next branch
>
> drivers/mmc/host/dw_mmc-rockchip.c | 13 +
> drivers/mmc/host/dw_mmc.c | 12 +++-
> drivers/mmc/host/dw_mmc.h | 2 ++
> include/linux/mmc/dw_mmc.h | 3 +++
> 4 files changed, 25 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
> b/drivers/mmc/host/dw_mmc-rockchip.c
> index bbb4ec3..1cb3bc6 100644
> --- a/drivers/mmc/host/dw_mmc-rockchip.c
> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
> @@ -68,6 +68,18 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host,
> struct mmc_ios *ios)
> }
> }
>
> +static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
> +{
> + struct device_node *np = host->dev->of_node;
> + int sdio_id0;
> +
> + if (!of_property_read_u32(np, "rockchip,sdio-interrupt-slot0",
> + &sdio_id0))
> + host->sdio_id0 = sdio_id0;
> +
> + return 0;
> +}
> +
> static const struct dw_mci_drv_data rk2928_drv_data = {
> .prepare_command= dw_mci_rockchip_prepare_command,
> };
> @@ -76,6 +88,7 @@ static const struct dw_mci_drv_data rk3288_drv_data = {
> .prepare_command= dw_mci_rockchip_prepare_command,
> .set_ios= dw_mci_rk3288_set_ios,
> .setup_clock= dw_mci_rk3288_setup_clock,
> + .parse_dt = dw_mci_rk3288_parse_dt,
> };
>
> static const struct of_device_id dw_mci_rockchip_match[] = {
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index bb46b1b..a633b58 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -823,7 +823,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
> bool force_clkinit)
>
> /* enable clock; only low power if no SDIO */
> clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
> - if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
> + if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->sdio_id)))
> clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
> mci_writel(host, CLKENA, clk_en_a);
>
> @@ -1184,10 +1184,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
> *mmc, int enb)
> dw_mci_disable_low_power(slot);
>
> mci_writel(host, INTMASK,
> -(int_mask | SDMMC_INT_SDIO(slot->id)));
> +(int_mask | SDMMC_INT_SDIO(slot->sdio_id)));
> } else {
> mci_writel(host, INTMASK,
> -(int_mask & ~SDMMC_INT_SDIO(slot->id)));
> +(int_mask & ~SDMMC_INT_SDIO(slot->sdio_id)));
> }
> }
>
> @@ -2056,8 +2056,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void
> *dev_id)
> /* Handle SDIO Interrupts */
> for (i = 0; i < host->num_slots; i++) {
> struct dw_mci_slot *slot = host->slot[i];
> - if (pending & SDMMC_INT_SDIO(i)) {
> - mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i));
> + if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
> + mci_writel(host, RINTSTS,
> +SDMMC_INT_SDIO(slot->sdio_id));
> mmc_signal_sdio_irq(slot->mmc);
> }
> }
> @@ -2145,6 +2146,7 @@ static int dw_mci_init_slot(struct dw_mci *host,
> unsigned int id)
>
> slot = mmc_priv(mmc);
> slot->id = id;
> + slot->sdio_id = host->sdio_id0 + id;
> slot->mmc = mmc;
> slot->host = host;
> host->slot[id] = slot;
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 71d4995..0562f10 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -214,6 +214,7 @@ extern int dw_mci_resume(struct dw_mci *host);
> *
Re: [PATCH] mmc: dw_mmc: add support for the other bit of sdio interrupt
Hi,
On 10/31/2014 09:46 AM, addy ke wrote:
> Hi, Jaehoon
>
> On 2014/10/30 19:02, Jaehoon Chung wrote:
>> Hi, Addy.
>>
>> This patch is conflicted..Could you rebase on latest Ulf's tree?
> I have not found ulf's tree in git.kernel.org.
> I can't 'git clone git://git.kernel.org/pub/scm/linux/kernel/git/ulf/xxx.git'.
> So my patch is based on kernel-3.18.
> I will send patch v2 for this.
> Would you please give me a git url for it?
http://git.linaro.org/git/people/ulf.hansson/mmc.git
I'm checking with next branch.
Best Regards,
Jaehoon Chung
> Thank you.
>
>>
>> Best Regards,
>> Jaehoon Chung
>>
>> On 10/30/2014 07:50 PM, Addy Ke wrote:
>>> The bit of sdio interrupt is 16 in designware implementation,
>>> but it is 24 in RK3288. This patch add sdio_id0 for the number
>>> of slot0 in the SDIO interrupt registers, which can be set in
>>> platform DT table, such as:
>>> - rockchip,sdio-interrupt-slot0 = <8>;
>>>
>>> Signed-off-by: Addy Ke
>>> ---
>>> drivers/mmc/host/dw_mmc-rockchip.c | 13 +
>>> drivers/mmc/host/dw_mmc.c | 12 +++-
>>> drivers/mmc/host/dw_mmc.h | 2 ++
>>> include/linux/mmc/dw_mmc.h | 3 +++
>>> 4 files changed, 25 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
>>> b/drivers/mmc/host/dw_mmc-rockchip.c
>>> index f0c2cb1..54655e7 100644
>>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>>> @@ -65,6 +65,18 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host,
>>> struct mmc_ios *ios)
>>> }
>>> }
>>>
>>> +static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
>>> +{
>>> + struct device_node *np = host->dev->of_node;
>>> + int sdio_id0;
>>> +
>>> + if (!of_property_read_u32(np, "rockchip,sdio-interrupt-slot0",
>>> + &sdio_id0))
>>> + host->sdio_id0 = sdio_id0;
>>> +
>>> + return 0;
>>> +}
>>> +
>>> static const struct dw_mci_drv_data rk2928_drv_data = {
>>> .prepare_command= dw_mci_rockchip_prepare_command,
>>> };
>>> @@ -73,6 +85,7 @@ static const struct dw_mci_drv_data rk3288_drv_data = {
>>> .prepare_command= dw_mci_rockchip_prepare_command,
>>> .set_ios= dw_mci_rk3288_set_ios,
>>> .setup_clock= dw_mci_rk3288_setup_clock,
>>> + .parse_dt = dw_mci_rk3288_parse_dt,
>>> };
>>>
>>> static const struct of_device_id dw_mci_rockchip_match[] = {
>>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>>> index 69f0cc6..2ea7467 100644
>>> --- a/drivers/mmc/host/dw_mmc.c
>>> +++ b/drivers/mmc/host/dw_mmc.c
>>> @@ -819,7 +819,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
>>> bool force_clkinit)
>>>
>>> /* enable clock; only low power if no SDIO */
>>> clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
>>> - if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
>>> + if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->sdio_id)))
>>> clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
>>> mci_writel(host, CLKENA, clk_en_a);
>>>
>>> @@ -1180,10 +1180,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
>>> *mmc, int enb)
>>> dw_mci_disable_low_power(slot);
>>>
>>> mci_writel(host, INTMASK,
>>> - (int_mask | SDMMC_INT_SDIO(slot->id)));
>>> + (int_mask | SDMMC_INT_SDIO(slot->sdio_id)));
>>> } else {
>>> mci_writel(host, INTMASK,
>>> - (int_mask & ~SDMMC_INT_SDIO(slot->id)));
>>> + (int_mask & ~SDMMC_INT_SDIO(slot->sdio_id)));
>>> }
>>> }
>>>
>>> @@ -2035,8 +2035,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void
>>> *dev_id)
>>> /* Handle SDIO Interrupts */
>>> for (i = 0; i < host->num_slots; i++) {
>>> struct dw_mci_slot *slot = host->slot[i];
>>> - if (pending & SDMMC_INT_SDIO(i)) {
>>> - mci_writel(
Re: [PATCH] mmc: dw_mmc: add support for the other bit of sdio interrupt
On 10/30/2014 08:11 PM, Ulf Hansson wrote:
> On 30 October 2014 11:50, Addy Ke wrote:
>> The bit of sdio interrupt is 16 in designware implementation,
>> but it is 24 in RK3288. This patch add sdio_id0 for the number
>> of slot0 in the SDIO interrupt registers, which can be set in
>> platform DT table, such as:
>> - rockchip,sdio-interrupt-slot0 = <8>;
>
> No, this shouldn't be information in DT.
>
> Instead this can be kept in the driver, depending on what version of
> the mmc controller that is being used. Right!?
sdio-interrupt slot doesn't depend on IP version.
maybe it depends on rock-chip board.
Best Regards,
Jaehoon Chung
>
> Kind regards
> Uffe
>
>>
>> Signed-off-by: Addy Ke
>> ---
>> drivers/mmc/host/dw_mmc-rockchip.c | 13 +
>> drivers/mmc/host/dw_mmc.c | 12 +++-
>> drivers/mmc/host/dw_mmc.h | 2 ++
>> include/linux/mmc/dw_mmc.h | 3 +++
>> 4 files changed, 25 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
>> b/drivers/mmc/host/dw_mmc-rockchip.c
>> index f0c2cb1..54655e7 100644
>> --- a/drivers/mmc/host/dw_mmc-rockchip.c
>> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
>> @@ -65,6 +65,18 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host,
>> struct mmc_ios *ios)
>> }
>> }
>>
>> +static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
>> +{
>> + struct device_node *np = host->dev->of_node;
>> + int sdio_id0;
>> +
>> + if (!of_property_read_u32(np, "rockchip,sdio-interrupt-slot0",
>> + &sdio_id0))
>> + host->sdio_id0 = sdio_id0;
>> +
>> + return 0;
>> +}
>> +
>> static const struct dw_mci_drv_data rk2928_drv_data = {
>> .prepare_command= dw_mci_rockchip_prepare_command,
>> };
>> @@ -73,6 +85,7 @@ static const struct dw_mci_drv_data rk3288_drv_data = {
>> .prepare_command= dw_mci_rockchip_prepare_command,
>> .set_ios= dw_mci_rk3288_set_ios,
>> .setup_clock= dw_mci_rk3288_setup_clock,
>> + .parse_dt = dw_mci_rk3288_parse_dt,
>> };
>>
>> static const struct of_device_id dw_mci_rockchip_match[] = {
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 69f0cc6..2ea7467 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -819,7 +819,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
>> bool force_clkinit)
>>
>> /* enable clock; only low power if no SDIO */
>> clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
>> - if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
>> + if (!(mci_readl(host, INTMASK) &
>> SDMMC_INT_SDIO(slot->sdio_id)))
>> clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
>> mci_writel(host, CLKENA, clk_en_a);
>>
>> @@ -1180,10 +1180,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
>> *mmc, int enb)
>> dw_mci_disable_low_power(slot);
>>
>> mci_writel(host, INTMASK,
>> - (int_mask | SDMMC_INT_SDIO(slot->id)));
>> + (int_mask | SDMMC_INT_SDIO(slot->sdio_id)));
>> } else {
>> mci_writel(host, INTMASK,
>> - (int_mask & ~SDMMC_INT_SDIO(slot->id)));
>> + (int_mask & ~SDMMC_INT_SDIO(slot->sdio_id)));
>> }
>> }
>>
>> @@ -2035,8 +2035,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void
>> *dev_id)
>> /* Handle SDIO Interrupts */
>> for (i = 0; i < host->num_slots; i++) {
>> struct dw_mci_slot *slot = host->slot[i];
>> - if (pending & SDMMC_INT_SDIO(i)) {
>> - mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i));
>> + if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
>> + mci_writel(host, RINTSTS,
>> + SDMMC_INT_SDIO(slot->sdio_id));
>> mmc_signal_sdio_irq(slot->mmc);
>> }
>> }
>> @@ -2206,6 +2207,7 @@ static int dw_mci_init_slot(struct dw_mci *host,
>> unsigned int id)
Re: [PATCH] mmc: dw_mmc: add support for the other bit of sdio interrupt
Hi, Addy.
This patch is conflicted..Could you rebase on latest Ulf's tree?
Best Regards,
Jaehoon Chung
On 10/30/2014 07:50 PM, Addy Ke wrote:
> The bit of sdio interrupt is 16 in designware implementation,
> but it is 24 in RK3288. This patch add sdio_id0 for the number
> of slot0 in the SDIO interrupt registers, which can be set in
> platform DT table, such as:
> - rockchip,sdio-interrupt-slot0 = <8>;
>
> Signed-off-by: Addy Ke
> ---
> drivers/mmc/host/dw_mmc-rockchip.c | 13 +
> drivers/mmc/host/dw_mmc.c | 12 +++-
> drivers/mmc/host/dw_mmc.h | 2 ++
> include/linux/mmc/dw_mmc.h | 3 +++
> 4 files changed, 25 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc-rockchip.c
> b/drivers/mmc/host/dw_mmc-rockchip.c
> index f0c2cb1..54655e7 100644
> --- a/drivers/mmc/host/dw_mmc-rockchip.c
> +++ b/drivers/mmc/host/dw_mmc-rockchip.c
> @@ -65,6 +65,18 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host,
> struct mmc_ios *ios)
> }
> }
>
> +static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
> +{
> + struct device_node *np = host->dev->of_node;
> + int sdio_id0;
> +
> + if (!of_property_read_u32(np, "rockchip,sdio-interrupt-slot0",
> + &sdio_id0))
> + host->sdio_id0 = sdio_id0;
> +
> + return 0;
> +}
> +
> static const struct dw_mci_drv_data rk2928_drv_data = {
> .prepare_command= dw_mci_rockchip_prepare_command,
> };
> @@ -73,6 +85,7 @@ static const struct dw_mci_drv_data rk3288_drv_data = {
> .prepare_command= dw_mci_rockchip_prepare_command,
> .set_ios= dw_mci_rk3288_set_ios,
> .setup_clock= dw_mci_rk3288_setup_clock,
> + .parse_dt = dw_mci_rk3288_parse_dt,
> };
>
> static const struct of_device_id dw_mci_rockchip_match[] = {
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 69f0cc6..2ea7467 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -819,7 +819,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
> bool force_clkinit)
>
> /* enable clock; only low power if no SDIO */
> clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
> - if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
> + if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->sdio_id)))
> clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
> mci_writel(host, CLKENA, clk_en_a);
>
> @@ -1180,10 +1180,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
> *mmc, int enb)
> dw_mci_disable_low_power(slot);
>
> mci_writel(host, INTMASK,
> -(int_mask | SDMMC_INT_SDIO(slot->id)));
> +(int_mask | SDMMC_INT_SDIO(slot->sdio_id)));
> } else {
> mci_writel(host, INTMASK,
> -(int_mask & ~SDMMC_INT_SDIO(slot->id)));
> +(int_mask & ~SDMMC_INT_SDIO(slot->sdio_id)));
> }
> }
>
> @@ -2035,8 +2035,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void
> *dev_id)
> /* Handle SDIO Interrupts */
> for (i = 0; i < host->num_slots; i++) {
> struct dw_mci_slot *slot = host->slot[i];
> - if (pending & SDMMC_INT_SDIO(i)) {
> - mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i));
> + if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
> + mci_writel(host, RINTSTS,
> +SDMMC_INT_SDIO(slot->sdio_id));
> mmc_signal_sdio_irq(slot->mmc);
> }
> }
> @@ -2206,6 +2207,7 @@ static int dw_mci_init_slot(struct dw_mci *host,
> unsigned int id)
>
> slot = mmc_priv(mmc);
> slot->id = id;
> + slot->sdio_id = host->sdio_id0 + id;
> slot->mmc = mmc;
> slot->host = host;
> host->slot[id] = slot;
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 01b99e8..3e966a9 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -214,6 +214,7 @@ extern int dw_mci_resume(struct dw_mci *host);
> * with CONFIG_MMC_CLKGATE.
> * @flags: Random state bits associated with the slot.
> * @id: Number of this slot.
> + * @sdio_id: Number of this slot in the SDIO interrupt registers.
> * @last_detect_state: Most re
Re: [PATCH] mmc: dw_mmc: add a quirk for the defferent bit of sdio interrupt
Hi, Addy.
On 10/30/2014 11:21 AM, Addy Ke wrote:
> This patch add a quirk: DW_MCI_QUIRK_SDIO_INT_24BIT.
>
> The bit of sdio interrupt is 16 in designware implementation, but
> is 24 in RK3288. To support RK3288 mmc controller, we need add
> a quirk for it.
>
> Signed-off-by: Addy Ke
> ---
> drivers/mmc/host/dw_mmc.c | 32 +++-
> drivers/mmc/host/dw_mmc.h | 1 +
> include/linux/mmc/dw_mmc.h | 2 ++
> 3 files changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 69f0cc6..db29621 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -778,6 +778,12 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
> bool force_clkinit)
> u32 div;
> u32 clk_en_a;
> u32 sdmmc_cmd_bits = SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT;
> + u32 sdio_int_bit;
> +
> + if (host->quirks & DW_MCI_QUIRK_SDIO_INT_24BIT)
I want to change the quirk naming.
If rockchip may use the other bit for sdio_int in future,
then you need to add the DW_MCI_QUIRK_SDIO_INT_xxBIT.?
How about DW_MCI_BROKEN_SDIO_INT_BIT?
And Could you consider to control with more general method than now?
Best Regards,
Jaehoon Chung
> + sdio_int_bit = SDMMC_INT_SDIO_24BIT(slot->id);
> + else
> + sdio_int_bit = SDMMC_INT_SDIO(slot->id);
>
> /* We must continue to set bit 28 in CMD until the change is complete */
> if (host->state == STATE_WAITING_CMD11_DONE)
> @@ -819,7 +825,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
> bool force_clkinit)
>
> /* enable clock; only low power if no SDIO */
> clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
> - if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
> + if (!(mci_readl(host, INTMASK) & sdio_int_bit))
> clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
> mci_writel(host, CLKENA, clk_en_a);
>
> @@ -1167,6 +1173,12 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
> *mmc, int enb)
> struct dw_mci_slot *slot = mmc_priv(mmc);
> struct dw_mci *host = slot->host;
> u32 int_mask;
> + u32 sdio_int_bit;
> +
> + if (host->quirks & DW_MCI_QUIRK_SDIO_INT_24BIT)
> + sdio_int_bit = SDMMC_INT_SDIO_24BIT(slot->id);
> + else
> + sdio_int_bit = SDMMC_INT_SDIO(slot->id);
>
> /* Enable/disable Slot Specific SDIO interrupt */
> int_mask = mci_readl(host, INTMASK);
> @@ -1180,10 +1192,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host
> *mmc, int enb)
> dw_mci_disable_low_power(slot);
>
> mci_writel(host, INTMASK,
> -(int_mask | SDMMC_INT_SDIO(slot->id)));
> +(int_mask | sdio_int_bit));
> } else {
> mci_writel(host, INTMASK,
> -(int_mask & ~SDMMC_INT_SDIO(slot->id)));
> +(int_mask & ~sdio_int_bit));
> }
> }
>
> @@ -2035,8 +2047,15 @@ static irqreturn_t dw_mci_interrupt(int irq, void
> *dev_id)
> /* Handle SDIO Interrupts */
> for (i = 0; i < host->num_slots; i++) {
> struct dw_mci_slot *slot = host->slot[i];
> - if (pending & SDMMC_INT_SDIO(i)) {
> - mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i));
> + u32 sdio_int_bit;
> +
> + if (host->quirks & DW_MCI_QUIRK_SDIO_INT_24BIT)
> + sdio_int_bit = SDMMC_INT_SDIO_24BIT(i);
> + else
> + sdio_int_bit = SDMMC_INT_SDIO(i);
> +
> + if (pending & sdio_int_bit) {
> + mci_writel(host, RINTSTS, sdio_int_bit);
> mmc_signal_sdio_irq(slot->mmc);
> }
> }
> @@ -2452,6 +2471,9 @@ static struct dw_mci_of_quirks {
> }, {
> .quirk = "disable-wp",
> .id = DW_MCI_QUIRK_NO_WRITE_PROTECT,
> + }, {
> + .quirk = "sdio-int-24bit",
> + .id = DW_MCI_QUIRK_SDIO_INT_24BIT,
> },
> };
>
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 01b99e8..6a48015 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -92,6 +92,7 @@
> #define SDMMC_CTYPE_4BIT BIT(0)
> #define SDMMC_CTYPE_1BIT 0
>
Re: [PATCHv2 1/2] ARM: dts: socfpga: Fix SD card detect
On 10/21/2014 07:41 AM, Mark Rutland wrote: > On Mon, Oct 20, 2014 at 08:26:55PM +0100, Doug Anderson wrote: >> Mark, >> >> On Mon, Oct 20, 2014 at 11:41 AM, Mark Rutland wrote: >>> On Mon, Oct 20, 2014 at 04:31:18PM +0100, dingu...@opensource.altera.com >>> wrote: >>>> From: Dinh Nguyen >>>> >>>> Without this patch, the booting the SOCFPGA platform would hang at the >>>> SDMMC driver loading. There were 2 patches that caused this to happen: >>>> >>>> - Patch 9795a846e10 "mmc: dw_mmc: remove dw_mci_of_cd_gpio/wp_gpio()" >>>> removed >>>> looking for "cd-gpios", since mmc_of_parse was getting called. >>>> - Patch 3cf890fc42b "mmc: dw_mmc: Pass back errors from mmc_of_parse()" >>>> would >>>> hang the system at the SDMMC driver loading. >>> >>> Regardless of which patches caused the issue, the existing DTB should >>> continue to function. This is a kernel bug, not a DTB bug. >> >> Right. The kernel bug is that there is no "dtb fixup" stage of the >> kernel to fix up old dtbs with this dtb bug. >> >> Said another way: >> >> 1. The old dtb was (possibly) not specifying the cd-gpio properly. >> >> 2. The kernel had a bug where it was ignoring that error. Things may >> have been working because of some other side effect (maybe polling was >> working). >> >> 3. If we fix the kernel bug, what should we do? The only sensible >> thing (if we need to support old DTB with no changes) is to add a DTB >> fixup stage. >> >> ...or did someone add that stage and I missed it? > > Unfortunately, we have no generic DTB fixup stage currently. > > What exactly was wrong with this cd-gpios description that previously > allowed it to function? Can we not print a warning and fall back to the > old behaviour in this case? I think this is Dinh's mistake. Doug found the reason of this problem, and it seems that Dinh has checked after fixing. He didn't enable the gpio controller. Best Regards, Jaehoon Chung > > Thanks, > Mark > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] ARM: dts: socfpga: Add a 3.3V fixed regulator node
Hi, Dinh.
On 10/17/2014 06:03 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Without the 3.3V regulator node, the SDMMC driver will give these warnings:
>
> dw_mmc ff704000.dwmmc0: No vmmc regulator found
> dw_mmc ff704000.dwmmc0: No vqmmc regulator found
>
> This patch adds the regulator node, and points the SD/MMC to the regulator.
>
> Signed-off-by: Dinh Nguyen
> ---
> arch/arm/boot/dts/socfpga_arria5.dtsi | 11 ++-
> arch/arm/boot/dts/socfpga_arria5_socdk.dts| 5 +
> arch/arm/boot/dts/socfpga_cyclone5.dtsi | 9 +
> arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 2 ++
> arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 5 +
> 5 files changed, 31 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
> b/arch/arm/boot/dts/socfpga_arria5.dtsi
> index 03e8268..8093781 100644
> --- a/arch/arm/boot/dts/socfpga_arria5.dtsi
> +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
> @@ -29,7 +29,7 @@
> };
> };
>
> - dwmmc0@ff704000 {
> + mmc0: dwmmc0@ff704000 {
> num-slots = <1>;
> broken-cd;
> bus-width = <4>;
> @@ -41,4 +41,13 @@
> cpu1-start-addr = <0xffd080c4>;
> };
> };
> +
> + regulator_3_3v_hps: fixed_3_3v_hps_regulator@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "HPS 3.3V";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + regulator-boot-on;
> + regulator-always-on;
Always-on is right?
> + };
> };
> diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
> b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
> index 27d551c..b7e4023 100644
> --- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
> +++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
> @@ -68,6 +68,11 @@
> };
> };
>
> +&mmc0 {
> + vmmc-supply = <®ulator_3_3v_hps>;
> + vqmmc-supply = <®ulator_3_3v_hps>;
> +};
> +
> &usb1 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
> b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
> index 28c05e7..743bc3b 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
> +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
> @@ -48,4 +48,13 @@
> cpu1-start-addr = <0xffd080c4>;
> };
> };
> +
> + regulator_3_3v_hps: fixed_3_3v_hps_regulator@0 {
> + compatible = "regulator-fixed";
> + regulator-name = "HPS 3.3V";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> };
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> index 739c3b7..e1f56ba 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> @@ -70,6 +70,8 @@
>
> &mmc0 {
> cd = <&gpio1 18 0>;
> + vmmc-supply = <®ulator_3_3v_hps>;
> + vqmmc-supply = <®ulator_3_3v_hps>;
Is vmmc and vqmmc used the common supply?
Best Regards,
Jaehoon Chung
> };
>
> &usb1 {
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
> b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
> index d26f155..ea0c454 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
> @@ -53,6 +53,11 @@
> rxc-skew-ps = <2000>;
> };
>
> +&mmc0 {
> + vmmc-supply = <®ulator_3_3v_hps>;
> + vqmmc-supply = <®ulator_3_3v_hps>;
> +};
> +
> &usb1 {
> status = "okay";
> };
>
--
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Re: [PATCHv10 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
Hi, On 08/26/2014 07:19 PM, Pavel Machek wrote: > Hi! > >>>> Would you elaborate? >>>> >>>> If I have a device like a phone, I may want to put one "slot" inside >>>> phone for basic system, and offer second slot for user expansion >>>> (initially empty). >>> >>> if multiple slot is supported, then a mmcqd should be processing for >>> multiple slots. >>> It's too inefficient, and affect the whole performance reduction. >> Sorry, Discard this comment. it means dwmci, not mmcqd. > > Well, that's a Linux problem, and for many applications, not even > problem at all. > > Device tree should describe hardware, and hardware can do multiple > slots per controller, so device tree should describe multiple slots > per controller. > > Now, the configuration may be uncommon, but you are moving from good > hardware description to bad hardware description. Well, i don't think it's bad hardware description. And this policy is suggested by other mmc developers and maintainers. At first time, I had also suggested same opinion with yours. Refer to below.. https://patchwork.kernel.org/patch/4276481/ Best Regards, Jaehoon Chung > > Pavel > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv10 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
On 08/25/2014 09:09 PM, Jaehoon Chung wrote: > On 08/25/2014 08:37 PM, Pavel Machek wrote: >> On Mon 2014-08-25 20:28:21, Jaehoon Chung wrote: >>> On 08/25/2014 08:21 PM, Pavel Machek wrote: >>>> On Thu 2014-08-07 16:37:57, Jaehoon Chung wrote: >>>>> Since used the mmc_of_parse(), didn't parse the sub-node. >>>>> So we can remove the sub-node, because almost SoC used the only one card >>>>> per a host. >>>>> And supports-highspeed can be replaced with "cap-mmc/sd-highspeed" >>>>> property. >>>> >>>> Would it be better to fix parsing of the device tree, and not to >>>> change all the device trees? >>>> >>>> Someone will want to do two slots sooner or later... >>>> >>> >>> First, I had considered that controller can be supported the multiple slot. >>> But MMC maintainers and other people suggested that consider the only one >>> card per a host. >>> Two slots or more don't have any benefit, (power or performance, etc). >> >> Would you elaborate? >> >> If I have a device like a phone, I may want to put one "slot" inside >> phone for basic system, and offer second slot for user expansion >> (initially empty). > > if multiple slot is supported, then a mmcqd should be processing for multiple > slots. > It's too inefficient, and affect the whole performance reduction. Sorry, Discard this comment. it means dwmci, not mmcqd. > > If want to offer the second slot for user expansion, add the host for > expansion slot. > Almost All SoC didn't use the multiple slot per a host controller for > eMMC/SD/SDIO. > > If Some device(Phone) supports the SD-card and eMMC, then there are two Host > IP. > One Host IP is used for eMMC, other is used for SD-card. > > this is H/W design issue. > > a) You means the below, > > One Host IP eMMC > | > SD > | > SDIO > > b) We means the below > One Host IP eMMC > One Host IP SD > One Host IP SDIO > > In now, I knew every SoC have used like b) type. I didn't see a) type > (especially, dwmmc's case). > > If i missed something, let me know, plz. > > Best Regards, > Jaehoon Chung > >> >> Or I may want to have internal slot with a card to boot from and have >> external slot (initially empty) for system update for embedded system. >> >> I see quite an obvious benefit there. >> Pavel >> > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv10 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
On 08/25/2014 08:37 PM, Pavel Machek wrote: > On Mon 2014-08-25 20:28:21, Jaehoon Chung wrote: >> On 08/25/2014 08:21 PM, Pavel Machek wrote: >>> On Thu 2014-08-07 16:37:57, Jaehoon Chung wrote: >>>> Since used the mmc_of_parse(), didn't parse the sub-node. >>>> So we can remove the sub-node, because almost SoC used the only one card >>>> per a host. >>>> And supports-highspeed can be replaced with "cap-mmc/sd-highspeed" >>>> property. >>> >>> Would it be better to fix parsing of the device tree, and not to >>> change all the device trees? >>> >>> Someone will want to do two slots sooner or later... >>> >> >> First, I had considered that controller can be supported the multiple slot. >> But MMC maintainers and other people suggested that consider the only one >> card per a host. >> Two slots or more don't have any benefit, (power or performance, etc). > > Would you elaborate? > > If I have a device like a phone, I may want to put one "slot" inside > phone for basic system, and offer second slot for user expansion > (initially empty). if multiple slot is supported, then a mmcqd should be processing for multiple slots. It's too inefficient, and affect the whole performance reduction. If want to offer the second slot for user expansion, add the host for expansion slot. Almost All SoC didn't use the multiple slot per a host controller for eMMC/SD/SDIO. If Some device(Phone) supports the SD-card and eMMC, then there are two Host IP. One Host IP is used for eMMC, other is used for SD-card. this is H/W design issue. a) You means the below, One Host IP eMMC | SD | SDIO b) We means the below One Host IP ---- eMMC One Host IP SD One Host IP SDIO In now, I knew every SoC have used like b) type. I didn't see a) type (especially, dwmmc's case). If i missed something, let me know, plz. Best Regards, Jaehoon Chung > > Or I may want to have internal slot with a card to boot from and have > external slot (initially empty) for system update for embedded system. > > I see quite an obvious benefit there. > Pavel > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv10 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
On 08/25/2014 08:21 PM, Pavel Machek wrote: > On Thu 2014-08-07 16:37:57, Jaehoon Chung wrote: >> Since used the mmc_of_parse(), didn't parse the sub-node. >> So we can remove the sub-node, because almost SoC used the only one card per >> a host. >> And supports-highspeed can be replaced with "cap-mmc/sd-highspeed" >> property. > > Would it be better to fix parsing of the device tree, and not to > change all the device trees? > > Someone will want to do two slots sooner or later... > First, I had considered that controller can be supported the multiple slot. But MMC maintainers and other people suggested that consider the only one card per a host. Two slots or more don't have any benefit, (power or performance, etc). Best Regards, Jaehoon Chung -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] mmc: dw_mmc: move rockchip related code to a separate file
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 08/19/2014 01:36 PM, Addy Ke wrote:
> To support HS200 and UHS-1, we need add a big hunk of code,
> as shown in the following patches. So a separate file for
> rockchip SOCs is suitable.
>
> Signed-off-by: Addy Ke
> ---
> Changes in v2:
> - Kconfig: depend on ARCH_ROCKCHIP, suggested by Bartlomiej Zolnierkiewicz
> - Kconfig: depend on OF, suggested by Doug Anderson
> - Not change suspend/resume code, suggested by Doug Anderson
> - If pdev->dev.of_node is NULL, then return -ENODEV, suggested by Heiko
> Stübner
>
> drivers/mmc/host/Kconfig | 9 +++
> drivers/mmc/host/Makefile | 1 +
> drivers/mmc/host/dw_mmc-pltfm.c| 57
> drivers/mmc/host/dw_mmc-rockchip.c | 136
> +
> 4 files changed, 146 insertions(+), 57 deletions(-)
> create mode 100644 drivers/mmc/host/dw_mmc-rockchip.c
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index a565254..f6095f6 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -621,6 +621,15 @@ config MMC_DW_PCI
>
> If unsure, say N.
>
> +config MMC_DW_ROCKCHIP
> + tristate "Rockchip specific extensions for Synopsys DW Memory Card
> Interface"
> + depends on MMC_DW && ARCH_ROCKCHIP && OF
> + select MMC_DW_PLTFM
> + help
> + This selects support for Rockchip SoC specific extensions to the
> + Synopsys DesignWare Memory Card Interface driver. Select this option
> + for platforms based on RK3066, RK3188 and RK3288 SoC's.
> +
> config MMC_SH_MMCIF
> tristate "SuperH Internal MMCIF support"
> depends on MMC_BLOCK
> diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> index 7f81ddf..5fce465 100644
> --- a/drivers/mmc/host/Makefile
> +++ b/drivers/mmc/host/Makefile
> @@ -45,6 +45,7 @@ obj-$(CONFIG_MMC_DW_PLTFM) += dw_mmc-pltfm.o
> obj-$(CONFIG_MMC_DW_EXYNOS) += dw_mmc-exynos.o
> obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o
> obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o
> +obj-$(CONFIG_MMC_DW_ROCKCHIP)+= dw_mmc-rockchip.o
> obj-$(CONFIG_MMC_SH_MMCIF) += sh_mmcif.o
> obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
> obj-$(CONFIG_MMC_VUB300) += vub300.o
> diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
> index b547f7a..0c56c41 100644
> --- a/drivers/mmc/host/dw_mmc-pltfm.c
> +++ b/drivers/mmc/host/dw_mmc-pltfm.c
> @@ -26,64 +26,11 @@
> #include "dw_mmc.h"
> #include "dw_mmc-pltfm.h"
>
> -#define RK3288_CLKGEN_DIV2
> -
> static void dw_mci_pltfm_prepare_command(struct dw_mci *host, u32 *cmdr)
> {
> *cmdr |= SDMMC_CMD_USE_HOLD_REG;
> }
>
> -static int dw_mci_rk3288_setup_clock(struct dw_mci *host)
> -{
> - host->bus_hz /= RK3288_CLKGEN_DIV;
> -
> - return 0;
> -}
> -
> -static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
> -{
> - int ret;
> - unsigned int cclkin;
> - u32 bus_hz;
> -
> - /*
> - * cclkin: source clock of mmc controller.
> - * bus_hz: card interface clock generated by CLKGEN.
> - * bus_hz = cclkin / RK3288_CLKGEN_DIV;
> - * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div))
> - *
> - * Note: div can only be 0 or 1
> - * if DDR50 8bit mode(only emmc work in 8bit mode),
> - * div must be set 1
> - */
> - if ((ios->bus_width == MMC_BUS_WIDTH_8) &&
> - (ios->timing == MMC_TIMING_MMC_DDR52))
> - cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV;
> - else
> - cclkin = ios->clock * RK3288_CLKGEN_DIV;
> -
> - ret = clk_set_rate(host->ciu_clk, cclkin);
> - if (ret)
> - dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
> -
> - bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV;
> - if (bus_hz != host->bus_hz) {
> - host->bus_hz = bus_hz;
> - /* force dw_mci_setup_bus() */
> - host->current_speed = 0;
> - }
> -}
> -
> -static const struct dw_mci_drv_data rk2928_drv_data = {
> - .prepare_command= dw_mci_pltfm_prepare_command,
> -};
> -
> -static const struct dw_mci_drv_data rk3288_drv_data = {
> - .prepare_command= dw_mci_pltfm_prepare_command,
> - .set_ios= dw_mci_rk3288_set_ios,
> - .setup_clock= dw_mci_rk3288_setup_clock,
> -};
> -
> static const struct dw_mci_drv_data socfpga_drv_data = {
> .pr
Re: [PATCHv10 3/5] ARM: dts: exynos: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
Hi, Kukjin On 08/19/2014 01:54 AM, Kukjin Kim wrote: > On 08/18/14 09:10, Andreas Färber wrote: >> Hi Jaehoon, >> >> Am 18.08.2014 14:23, schrieb Jaehoon Chung: >>> Socfpga and Rockchip were queued into each SoC tree. >>> I want to know whether this patch is queued or not into Samsung-Soc tree. >>> Do you have any other plan for this patch? >> >> It isn't applied in his tree: >> >> http://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/ >> >> In fact Kukjin has not applied any patches for 3 weeks now, which likely >> means he's on vacation. I am hoping he will review this and the other >> pending conflicting patches to decide on a merge order and fix any >> trivial conflicts himself. ;) >> > Oh, I thought it has been queued in previous merge window with my ack. > > OK, I've applied this in my tree for 3.18. Thanks! Best Regards, Jaehoon Chung > > Thanks, > Kukjin > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv10 3/5] ARM: dts: exynos: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
Hi, Kukjin.
Socfpga and Rockchip were queued into each SoC tree.
I want to know whether this patch is queued or not into Samsung-Soc tree.
Do you have any other plan for this patch?
Best Regards,
Jaehoon Chung
On 08/07/2014 04:38 PM, Jaehoon Chung wrote:
> dw-mmc controller can support multiple slots.
> But, there are no use-cases anywhere. So we don't need to support the
> slot-node for dw-mmc controller.
> And "supports-highspeed" property in dw-mmc is deprecated.
> "supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
>
> Signed-off-by: Jaehoon Chung
> Reviewed-by: Tushar Behera
> Reviewed-by: Ulf Hansson
> Tested-by: Sachin Kamat
> ---
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi |8 ++--
> arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
> arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
> arch/arm/boot/dts/exynos5250-arndale.dts| 18 +---
> arch/arm/boot/dts/exynos5250-cros-common.dtsi | 25
> +++
> arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +---
> arch/arm/boot/dts/exynos5250-snow.dts |6 ++
> arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 +---
> arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +---
> arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
> arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 ---
> arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
> arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
> 13 files changed, 51 insertions(+), 140 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> index 6d6d23c..f5c0f81 100644
> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> @@ -54,17 +54,13 @@
> status = "okay";
>
> num-slots = <1>;
> - supports-highspeed;
> broken-cd;
> card-detect-delay = <200>;
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <2 3>;
> samsung,dw-mshc-ddr-timing = <1 2>;
> -
> - slot@0 {
> - reg = <0>;
> - bus-width = <8>;
> - };
> + bus-width = <8>;
> + cap-mmc-highspeed;
> };
>
> watchdog@1006 {
> diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
> b/arch/arm/boot/dts/exynos4412-origen.dts
> index e925c9f..de15114 100644
> --- a/arch/arm/boot/dts/exynos4412-origen.dts
> +++ b/arch/arm/boot/dts/exynos4412-origen.dts
> @@ -137,17 +137,13 @@
> status = "okay";
>
> num-slots = <1>;
> - supports-highspeed;
> broken-cd;
> card-detect-delay = <200>;
> samsung,dw-mshc-ciu-div = <3>;
> samsung,dw-mshc-sdr-timing = <2 3>;
> samsung,dw-mshc-ddr-timing = <1 2>;
> -
> - slot@0 {
> - reg = <0>;
> - bus-width = <8>;
> - };
> + bus-width = <8>;
> + cap-mmc-highspeed;
> };
>
> codec@1340 {
> diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
> b/arch/arm/boot/dts/exynos4412-trats2.dts
> index 11967f4..5e066cd 100644
> --- a/arch/arm/boot/dts/exynos4412-trats2.dts
> +++ b/arch/arm/boot/dts/exynos4412-trats2.dts
> @@ -520,7 +520,6 @@
>
> mmc@1255 {
> num-slots = <1>;
> - supports-highspeed;
> broken-cd;
> non-removable;
> card-detect-delay = <200>;
> @@ -532,11 +531,8 @@
> pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
> pinctrl-names = "default";
> status = "okay";
> -
> - slot@0 {
> - reg = <0>;
> - bus-width = <8>;
> - };
> + bus-width = <8>;
> + cap-mmc-highspeed;
> };
>
> serial@1380 {
> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
> b/arch/arm/boot/dts/exynos5250-arndale.dts
> index d0de1f5..42a3590 100644
> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
&
Re: [PATCH] mmc: dw_mmc: add support for RK3288
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 07/31/2014 03:01 PM, Addy Ke wrote:
> This patch focuses on clock setting for RK3288 mmc controller.
>
> In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
> and if DDR 8bit mode, CLKDIV register must be set 1.
>
> Reported-by Doug Anderson
> Suggested-by: Jaehoon Chung
> Suggested-by: Doug Anderson
> Signed-off-by: Addy Ke
> ---
> changes since v1:
> - dw_mci_rk3288_setup_clock: do not call clk_get_rate(), just use the
> host->bus_hz which is already called by dw_mmc.c, suggested by Jaehoon Chung
>
> changes since v2:
> - merge from ChromiumOS tree, fix up clock settting bug,
> which cause DDR50 mode for emmc not to work, reported by Doug Anderson
> - remove MMC_TIMING_UHS_DDR50 condition, because on RK3288 only emmc can work
> in 8bit mode, suggested by Doug Anderson
>
> .../devicetree/bindings/mmc/rockchip-dw-mshc.txt | 6 ++-
> drivers/mmc/host/dw_mmc-pltfm.c| 56
> +-
> 2 files changed, 58 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
> b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
> index c559f3f..c327c2d 100644
> --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
> +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
> @@ -10,12 +10,14 @@ extensions to the Synopsys Designware Mobile Storage Host
> Controller.
> Required Properties:
>
> * compatible: should be
> - - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following
> + - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
> + before RK3288
> + - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
>
> Example:
>
> rkdwmmc0@1220 {
> - compatible = "rockchip,rk2928-dw-mshc";
> + compatible = "rockchip,rk3288-dw-mshc";
> reg = <0x1220 0x1000>;
> interrupts = <0 75 0>;
> #address-cells = <1>;
> diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
> index d4a47a9..b547f7a 100644
> --- a/drivers/mmc/host/dw_mmc-pltfm.c
> +++ b/drivers/mmc/host/dw_mmc-pltfm.c
> @@ -21,17 +21,67 @@
> #include
> #include
> #include
> +#include
>
> #include "dw_mmc.h"
> #include "dw_mmc-pltfm.h"
>
> +#define RK3288_CLKGEN_DIV2
> +
> static void dw_mci_pltfm_prepare_command(struct dw_mci *host, u32 *cmdr)
> {
> *cmdr |= SDMMC_CMD_USE_HOLD_REG;
> }
>
> -static const struct dw_mci_drv_data rockchip_drv_data = {
> +static int dw_mci_rk3288_setup_clock(struct dw_mci *host)
> +{
> + host->bus_hz /= RK3288_CLKGEN_DIV;
> +
> + return 0;
> +}
> +
> +static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
> +{
> + int ret;
> + unsigned int cclkin;
> + u32 bus_hz;
> +
> + /*
> + * cclkin: source clock of mmc controller.
> + * bus_hz: card interface clock generated by CLKGEN.
> + * bus_hz = cclkin / RK3288_CLKGEN_DIV;
> + * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div))
> + *
> + * Note: div can only be 0 or 1
> + * if DDR50 8bit mode(only emmc work in 8bit mode),
> + * div must be set 1
> + */
> + if ((ios->bus_width == MMC_BUS_WIDTH_8) &&
> + (ios->timing == MMC_TIMING_MMC_DDR52))
> + cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV;
> + else
> + cclkin = ios->clock * RK3288_CLKGEN_DIV;
> +
> + ret = clk_set_rate(host->ciu_clk, cclkin);
> + if (ret)
> + dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
> +
> + bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV;
> + if (bus_hz != host->bus_hz) {
> + host->bus_hz = bus_hz;
> + /* force dw_mci_setup_bus() */
> + host->current_speed = 0;
> + }
> +}
> +
> +static const struct dw_mci_drv_data rk2928_drv_data = {
> + .prepare_command= dw_mci_pltfm_prepare_command,
> +};
> +
> +static const struct dw_mci_drv_data rk3288_drv_data = {
> .prepare_command= dw_mci_pltfm_prepare_command,
> + .set_ios= dw_mci_rk3288_set_ios,
> + .setup_clock= dw_mci_rk3288_setup_clock,
> };
>
> static const struct dw_mci_drv_data socfpga_drv_data = {
> @@ -95,7 +145,9 @@ EXPORT_SYMBOL_GPL(dw_mci_pltfm_pmops);
> static const struc
Re: [PATCH v3 0/4] Add eMMC and SD card support for rk3288-evb
Hi, Doug. Acked-by: Jaehoon Chung On 08/07/2014 02:09 AM, Doug Anderson wrote: > This series adds basic eMMC and SD card support for the rk3288-evb > board based on Addy's posted dw_mmc patch from: > https://patchwork.kernel.org/patch/4653631/ > > The series is a little tricky because: > * Jaehoon has some outstanding patches to remove the slot node. Since > those haven't landed yet, I've posted my original patch with the > slot node and then some future patches that can land with Jaehoon's > patches. > > So just to be explicit: > - Patch #1 and #2 can land after Addy's patch lands. > - Patch #3 and #4 can land after Jaehoon's patch lands, though there's > no huge hurry since Jaehoon's patch supports the old mode (it just > prints a warning). > > Note that we don't have regulators specified yet (no regulator driver > for rk808-based board). We also don't yet support UHS modes or MMC > DDR50 (which require regulator support plus dw_mmc driver support for > tuning). Those features can come later. > > Changes in v3: > - Removed DDR50 mode since it needs tuning, which isn't there yet. > > Changes in v2: > - New patchwork link for Addy's patch > - Squashed in the DDR50 mode since Addy spun his patch. > - Refer to the new title of Jaehoon's patch > > Doug Anderson (4): > ARM: dts: Add emmc and sdmmc to the rk3288 device tree > ARM: dts: Enable emmc and sdmmc on the rk3288-evb boards > ARM: dts: Take the mmc slot node out of rk3288-evb > ARM: dts: mmc slot node gone on rk3288 => no more address / size cells > > arch/arm/boot/dts/rk3288-evb.dtsi | 24 > arch/arm/boot/dts/rk3288.dtsi | 18 ++ > 2 files changed, 42 insertions(+) > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv10 5/5] ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 15 ---
arch/arm/boot/dts/rk3188-radxarock.dts |7 ++-
2 files changed, 6 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index 042f821d..665dd56 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -150,12 +150,8 @@
num-slots = <1>;
status = "okay";
vmmc-supply = <&vcc_sd0>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
&mmc1 { /* wifi */
@@ -166,11 +162,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
&uart0 {
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts
b/arch/arm/boot/dts/rk3188-radxarock.dts
index 171b610..ef72faf 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -181,11 +181,8 @@
status = "okay";
vmmc-supply = <&vcc_sd0>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
&pinctrl {
--
1.7.9.5
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[PATCHv10 4/5] ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
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[PATCHv10 2/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost all SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Reviewed-by: Doug Anderson
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..6cd3525 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+(Deprecated - Refer to
Documentation/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = <1>;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
- <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
- <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
- <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
- <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
- };
+ bus-width = <8>;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = <1>;
vmmc-supply = <&ldo12>;
fifo-depth = <0x100>;
- supports-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- cd-gpios = <&gpio10 3 0>;
- };
+ bus-width = <4>;
+ disable-wp;
+ cd-gpios = <&gpio10 3 0>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use "cap-mmc-highspeed" or "cap-sd-highspeed"
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = <4>;
clock-freq-min-max = <40 2>;
num-slots = <1>;
- supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay =
[PATCHv10 3/5] ARM: dts: exynos: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts| 18 +---
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 25 +++
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +---
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 +---
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 140 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 6d6d23c..f5c0f81 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -54,17 +54,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
watchdog@1006 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
codec@1340 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 11967f4..5e066cd 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -520,7 +520,6 @@
mmc@1255 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
non-removable;
card-detect-delay = <200>;
@@ -532,11 +531,8 @@
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
serial@1380 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..42a3590 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -401,7 +401,6 @@
mmc_0: mmc@1220 {
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
@@ -410,17 +409,13 @@
vmmc-supply = <&mmc_reg>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-high
[PATCHv10 1/5] mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
Slot quirks "disable-wp" is deprecated.
Instead, use the host quirk "disable-wp".
(Because the slot-node is removed in dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
---
drivers/mmc/host/dw_mmc.c | 11 +--
include/linux/mmc/dw_mmc.h |2 ++
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..47b52cc 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,8 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if ((slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT) ||
+ (slot->host->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT))
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2021,8 +2022,11 @@ static int dw_mci_of_get_slot_quirks(struct device *dev,
u8 slot)
/* get quirks */
for (idx = 0; idx < ARRAY_SIZE(of_slot_quirks); idx++)
- if (of_get_property(np, of_slot_quirks[idx].quirk, NULL))
+ if (of_get_property(np, of_slot_quirks[idx].quirk, NULL)) {
+ dev_warn(dev, "Slot quirk %s is deprecated\n",
+ of_slot_quirks[idx].quirk);
quirks |= of_slot_quirks[idx].id;
+ }
return quirks;
}
@@ -2238,6 +2242,9 @@ static struct dw_mci_of_quirks {
{
.quirk = "broken-cd",
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ }, {
+ .quirk = "disable-wp",
+ .id = DW_MCI_QUIRK_NO_WRITE_PROTECT,
},
};
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index babaea9..29ce014 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -213,6 +213,8 @@ struct dw_mci_dma_ops {
#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
/* Unreliable card detection */
#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
+/* No write protect */
+#define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4)
/* Slot level quirks */
/* This slot has no write protect */
--
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[PATCHv10 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced with "cap-mmc/sd-highspeed" property. Changelog V10: - Rebased for next. - Remove conflict Changelog V9: - Fix typos. - Relocated the warning message. - Change patch's sequence. Changelog V8: - Add the warning message to notice that slot-node was removed. (As Doug's suggestion) Changelog V7: - Fixed typo and modified the commit message. Changelog V6: - Fixed Wrong bit control for host's quirks and rename. - Add "Acked-by" for each SoC maintainers. Changelog V5: - Rebased on v3.16-rc4. - Add Acked-by. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot->host->quirks instead of brq->quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to host's quirk" Jaehoon Chung (5): mmc: dw_mmc: Slot quirk "disable-wp" is deprecated. mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecate the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 -- .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 -- arch/arm/boot/dts/exynos4412-odroid-common.dtsi|8 ++- arch/arm/boot/dts/exynos4412-origen.dts|8 ++- arch/arm/boot/dts/exynos4412-trats2.dts|8 ++- arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 25 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 - arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 - arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 - arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 - arch/arm/boot/dts/rk3066a-bqcurie2.dts | 15 arch/arm/boot/dts/rk3188-radxarock.dts |7 ++ arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 11 +++-- include/linux/mmc/dw_mmc.h |2 ++ 23 files changed, 92 insertions(+), 202 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv9 1/5] mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
Hi, All. It seems too late that this patch-set is merged into linux-3.16. Also there are some conflicts in device-tree. (I will remove the conflicts) So if everybody is ok, I will rebase on linux-next after released linux-3.16. At that time, i will send this patch-set to stable kernel, too. how about? And I want to know who can apply this patch-set(#3~#5). Best Regards, Jaehoon Chung On 08/01/2014 03:36 AM, Kukjin Kim wrote: > On 08/01/14 01:02, Doug Anderson wrote: >> Jaehoon >> >> On Wed, Jul 30, 2014 at 10:35 PM, Jaehoon Chung >> wrote: >>> Slot quirks "disable-wp" is deprecated. >>> Instead, use the host quirk "disable-wp". >>> (Because the slot-node is removed in dt-file.) >>> >>> Signed-off-by: Jaehoon Chung >>> Tested-by: Sachin Kamat >>> Acked-by: Seungwon Jeon >>> --- >>> drivers/mmc/host/dw_mmc.c | 11 +-- >>> include/linux/mmc/dw_mmc.h |2 ++ >>> 2 files changed, 11 insertions(+), 2 deletions(-) >> >> Thanks for taking my suggestion and making it backward compatible. >> This looks great to me. It tested this in both the backward >> compatible way (with the warning) and the non-backward compatible way. >> I think we should land and patch #2 ASAP and then we can land the rest >> of the series as SoC maintainers see fit. >> > Yes, right if we don't want to see useless merge conflicts... > > When I sent ack on exynos stuff, there was no conflict with my tree but > happens it now. > > - Kukjin > > >> Reviewed-by: Doug Anderson >> Tested-by: Doug Anderson > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv9 4/5] ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
1.7.9.5
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[PATCHv9 2/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost all SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Reviewed-by: Doug Anderson
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..6cd3525 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+(Deprecated - Refer to
Documentation/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = <1>;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
- <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
- <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
- <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
- <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
- };
+ bus-width = <8>;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = <1>;
vmmc-supply = <&ldo12>;
fifo-depth = <0x100>;
- supports-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- cd-gpios = <&gpio10 3 0>;
- };
+ bus-width = <4>;
+ disable-wp;
+ cd-gpios = <&gpio10 3 0>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use "cap-mmc-highspeed" or "cap-sd-highspeed"
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = <4>;
clock-freq-min-max = <40 2>;
num-slots = <1>;
- supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay =
[PATCHv9 5/5] ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
vmmc-supply = <&vcc_sd0>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
gpio-keys {
--
1.7.9.5
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[PATCHv9 3/5] ARM: dts: exynos: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced with "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts | 18 +
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 +++--
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts| 18 +
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts| 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 141 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 31db28a..778aec6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -45,17 +45,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
regulator_p3v3 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
codec@1340 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 7787844..65ab885 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -520,7 +520,6 @@
mmc@1255 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
non-removable;
card-detect-delay = <200>;
@@ -532,11 +531,8 @@
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
serial@1380 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..42a3590 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -401,7 +401,6 @@
mmc_0: mmc@1220 {
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
@@ -410,17 +409,13 @@
vmmc-supply = <&mmc_reg>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
[PATCHv9 1/5] mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
Slot quirks "disable-wp" is deprecated.
Instead, use the host quirk "disable-wp".
(Because the slot-node is removed in dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c | 11 +--
include/linux/mmc/dw_mmc.h |2 ++
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..47b52cc 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,8 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if ((slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT) ||
+ (slot->host->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT))
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2021,8 +2022,11 @@ static int dw_mci_of_get_slot_quirks(struct device *dev,
u8 slot)
/* get quirks */
for (idx = 0; idx < ARRAY_SIZE(of_slot_quirks); idx++)
- if (of_get_property(np, of_slot_quirks[idx].quirk, NULL))
+ if (of_get_property(np, of_slot_quirks[idx].quirk, NULL)) {
+ dev_warn(dev, "Slot quirk %s is deprecated\n",
+ of_slot_quirks[idx].quirk);
quirks |= of_slot_quirks[idx].id;
+ }
return quirks;
}
@@ -2238,6 +2242,9 @@ static struct dw_mci_of_quirks {
{
.quirk = "broken-cd",
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ }, {
+ .quirk = "disable-wp",
+ .id = DW_MCI_QUIRK_NO_WRITE_PROTECT,
},
};
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index babaea9..29ce014 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -213,6 +213,8 @@ struct dw_mci_dma_ops {
#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
/* Unreliable card detection */
#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
+/* No write protect */
+#define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4)
/* Slot level quirks */
/* This slot has no write protect */
--
1.7.9.5
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[PATCHv9 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced with "cap-mmc/sd-highspeed" property. Changelog V9: - Fix typos. - Relocated the warning message. - Change patch's sequence. Changelog V8: - Add the warning message to notice that slot-node was removed. (As Doug's suggestion) Changelog V7: - Fixed typo and modified the commit message. Changelog V6: - Fixed Wrong bit control for host's quirks and rename. - Add "Acked-by" for each SoC maintainers. Changelog V5: - Rebased on v3.16-rc4. - Add Acked-by. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot->host->quirks instead of brq->quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to host's quirk" Jaehoon Chung (5): mmc: dw_mmc: Slot quirk "disable-wp" is deprecated. mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecate the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 11 +++-- include/linux/mmc/dw_mmc.h |2 ++ 22 files changed, 90 insertions(+), 199 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv8 1/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..6cd3525 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+(Deprecated - Refer to
Documentation/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = <1>;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
- <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
- <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
- <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
- <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
- };
+ bus-width = <8>;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = <1>;
vmmc-supply = <&ldo12>;
fifo-depth = <0x100>;
- supports-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- cd-gpios = <&gpio10 3 0>;
- };
+ bus-width = <4>;
+ disable-wp;
+ cd-gpios = <&gpio10 3 0>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use "cap-mmc-highspeed" or "cap-sd-highspeed"
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = <4>;
clock-freq-min-max = <40 2>;
num-slots = <1>;
- supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
vmmc-supply
[PATCHv8 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to "cap-mmc/sd-highspeed" property. Changelog V8: - Add the warning message to notice that slot-node was removed. (As Doug's suggestion) Changelog V7: - Fixed typo and modified the commit message. Changelog V6: - Fixed Wrong bit control for host's quirks and rename. - Add "Acked-by" for each SoC maintainers. Changelog V5: - Rebased on v3.16-rc4. - Add Acked-by. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot->host->quirks instead of brq->quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to host's quirk" Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace "disable-wp" from slot's quirk to host's quirk .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c |8 +- include/linux/mmc/dw_mmc.h |2 ++ 22 files changed, 88 insertions(+), 198 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv8 5/5] mmc: dw_mmc: replace "disable-wp" from slot's quirk to host's quirk
Replaced the "disable-wp" into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c |8 +++-
include/linux/mmc/dw_mmc.h |2 ++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..8d9edc6 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,10 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT) {
+ dev_warn(slot->host->dev, "Recommend not to use 'disable-wp'"
+ "into slot-node. Change your dt-file!!");
+ } else if (slot->host->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2238,6 +2241,9 @@ static struct dw_mci_of_quirks {
{
.quirk = "broken-cd",
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ }, {
+ .quirk = "disable-wp",
+ .id = DW_MCI_QUIRK_NO_WRITE_PROTECT,
},
};
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index babaea9..29ce014 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -213,6 +213,8 @@ struct dw_mci_dma_ops {
#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
/* Unreliable card detection */
#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
+/* No write protect */
+#define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4)
/* Slot level quirks */
/* This slot has no write protect */
--
1.7.9.5
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[PATCHv8 3/5] ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
1.7.9.5
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[PATCHv8 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
vmmc-supply = <&vcc_sd0>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
gpio-keys {
--
1.7.9.5
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[PATCHv8 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts | 18 +
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 +++--
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts| 18 +
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts| 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 141 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 31db28a..778aec6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -45,17 +45,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
regulator_p3v3 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
codec@1340 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 7787844..65ab885 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -520,7 +520,6 @@
mmc@1255 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
non-removable;
card-detect-delay = <200>;
@@ -532,11 +531,8 @@
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
serial@1380 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..42a3590 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -401,7 +401,6 @@
mmc_0: mmc@1220 {
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
@@ -410,17 +409,13 @@
vmmc-supply = <&mmc_reg>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
Re: [PATCHv7 5/5] mmc: dw_mmc: replace "disable-wp" from slot's quirk to host's quirk
Hi, Doug.
Thanks for review.
On 07/30/2014 03:01 AM, Doug Anderson wrote:
> Jaehoon,
>
> On Sun, Jul 27, 2014 at 7:29 PM, Jaehoon Chung wrote:
>> Replaced the "disable-wp" into host's quirks.
>> (Because the slot-node is removed at dt-file.)
>>
>> Signed-off-by: Jaehoon Chung
>> Tested-by: Sachin Kamat
>> Acked-by: Seungwon Jeon
>> ---
>> drivers/mmc/host/dw_mmc.c | 12 +---
>> include/linux/mmc/dw_mmc.h |6 ++
>> 2 files changed, 7 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 1ac227c..4a4f66f 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
>> int gpio_ro = mmc_gpio_get_ro(mmc);
>>
>> /* Use platform get_ro function, else try on board write protect */
>> - if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
>> + if (slot->host->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT)
>
> It doesn't seem like it would be hard to include support for the old
> binding (and just print a warning). Then this could land ahead of the
> device tree changes.
>
> Generally I think we're supposed to keep support for old device trees
> if possible (except in extreme cases).
Ok, I see. I will add the Warning message like this. ("Recommend not to use the
slot-node...")
Then Developers can change the device-tree, right.
Today, i will send the patch. If you have any other comment, let me know, plz.
I want to merge this patch-set into 3.16.
Best Regards,
Jaehoon Chung
>
> -Doug
>
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[PATCHv7 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts | 18 +
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 +++--
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts| 18 +
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts| 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 141 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 31db28a..778aec6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -45,17 +45,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
regulator_p3v3 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
codec@1340 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 7787844..65ab885 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -520,7 +520,6 @@
mmc@1255 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
non-removable;
card-detect-delay = <200>;
@@ -532,11 +531,8 @@
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
serial@1380 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..42a3590 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -401,7 +401,6 @@
mmc_0: mmc@1220 {
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
@@ -410,17 +409,13 @@
vmmc-supply = <&mmc_reg>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
[PATCHv7 5/5] mmc: dw_mmc: replace "disable-wp" from slot's quirk to host's quirk
Replaced the "disable-wp" into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c | 12 +---
include/linux/mmc/dw_mmc.h |6 ++
2 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..4a4f66f 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot->host->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2006,12 +2006,7 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
static struct dw_mci_of_slot_quirks {
char *quirk;
int id;
-} of_slot_quirks[] = {
- {
- .quirk = "disable-wp",
- .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
- },
-};
+} of_slot_quirks[] = {};
static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
{
@@ -2238,6 +2233,9 @@ static struct dw_mci_of_quirks {
{
.quirk = "broken-cd",
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ }, {
+ .quirk = "disable-wp",
+ .id = DW_MCI_QUIRK_NO_WRITE_PROTECT,
},
};
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index babaea9..8b4b2d8 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -213,10 +213,8 @@ struct dw_mci_dma_ops {
#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
/* Unreliable card detection */
#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
-
-/* Slot level quirks */
-/* This slot has no write protect */
-#define DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT BIT(0)
+/* No write protect */
+#define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4)
struct dma_pdata;
--
1.7.9.5
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[PATCHv7 3/5] ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
1.7.9.5
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[PATCHv7 1/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..6cd3525 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+(Deprecated - Refer to
Documentation/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = <1>;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
- <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
- <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
- <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
- <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
- };
+ bus-width = <8>;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = <1>;
vmmc-supply = <&ldo12>;
fifo-depth = <0x100>;
- supports-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- cd-gpios = <&gpio10 3 0>;
- };
+ bus-width = <4>;
+ disable-wp;
+ cd-gpios = <&gpio10 3 0>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use "cap-mmc-highspeed" or "cap-sd-highspeed"
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = <4>;
clock-freq-min-max = <40 2>;
num-slots = <1>;
- supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
vmmc-supply
[PATCHv7 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
vmmc-supply = <&vcc_sd0>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
gpio-keys {
--
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[PATCHv7 0/5] ARM: remove the sub-node and deprecate supports-highspeed property for dwmmc.
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to "cap-mmc/sd-highspeed" property. Chnagelog V7: - Fixed typo and modified the commit message. Changelog V6: - Fixed Wrong bit control for host's quirks and rename. - Add "Acked-by" for each SoC maintainers. Changelog V5: - Rebased on v3.16-rc4. - Add Acked-by. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot->host->quirks instead of brq->quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to host's quirk" Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace "disable-wp" from slot's quirk to host's quirk .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 12 - include/linux/mmc/dw_mmc.h |6 ++--- 22 files changed, 86 insertions(+), 208 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 1/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Hi, Andreas,
On 07/25/2014 09:11 PM, Andreas Färber wrote:
> Hi Jaehoon,
>
> Am 25.07.2014 03:11, schrieb Jaehoon Chung:
>> Almost Soc is used the slot per a host.
>
> Something's very wrong with this sentence. What are you trying to say?
> Almost all SoCs use one slot only per host controller device?
If you are confusion for this sentence, sorry.
It means that we recommend only one slot per host controller.
Some controller can be supported the multiple slot per a host controller.
But i didn't find anywhere it used the multiple slot per a host controller.
Best Regards,
Jaehoon Chung
>
>> Don't use the slot-node and deprecated the "supports-highsped" property.
>
> s/deprecated/deprecate/ ?
> s/highsped/highspeed/
>
>> Instead, use the cap-mmc/sd-highspeed.
>>
>> Signed-off-by: Jaehoon Chung
>> Reviewed-by: Tushar Behera
>> Reviewed-by: Ulf Hansson
>> Tested-by: Sachin Kamat
>> Acked-by: Seungwon Jeon
>> ---
>> .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
>> .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
>> .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
>> 3 files changed, 15 insertions(+), 26 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> index 532b1d4..9308325 100644
>> --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> @@ -46,13 +46,14 @@ Required Properties:
>>- if CIU clock divider value is 0 (that is divide by 1), both tx and
>> rx
>> phase shift clocks should be 0.
>>
>> -Required properties for a slot:
>> +Required properties for a slot (Deprecated - Recommend to use one slot per
>> a host):
>
> "per host"
>
>>
>> * gpios: specifies a list of gpios used for command, clock and data bus. The
>>first gpio is the command line and the second gpio is the clock line. The
>>rest of the gpios (depending on the bus-width property) are the data
>> lines in
>>no particular order. The format of the gpio specifier depends on the gpio
>>controller.
>> + (Deprecated - Refer to
>> Documentaion/devicetree/binding/pinctrl/samsung-pinctrl.txt)
>
> "Documentation/"
>
> Nit: Is the indentation intentional? (parenthesis not aligned with text)
>
>>
>> Example:
>>
>> @@ -69,21 +70,13 @@ Example:
>>
>> dwmmc0@1220 {
>> num-slots = <1>;
>> -supports-highspeed;
>> +cap-mmc-highspeed;
>> +cap-sd-highspeed;
>> broken-cd;
>> fifo-depth = <0x80>;
>> card-detect-delay = <200>;
>> samsung,dw-mshc-ciu-div = <3>;
>> samsung,dw-mshc-sdr-timing = <2 3>;
>> samsung,dw-mshc-ddr-timing = <1 2>;
>> -
>> -slot@0 {
>> -reg = <0>;
>> -bus-width = <8>;
>> -gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
>> -<&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
>> -<&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
>> -<&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
>> -<&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
>> -};
>> +bus-width = <8>;
>> };
>> diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
>> b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
>> index e5bc49f..3b35449 100644
>> --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
>> @@ -34,13 +34,11 @@ Example:
>> num-slots = <1>;
>> vmmc-supply = <&ldo12>;
>> fifo-depth = <0x100>;
>> -supports-highspeed;
>> pinctrl-names = "default";
>> pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;
>> -slot@0 {
>> -reg = <0>;
>> -bus-width = <4>;
>> -disable-wp;
>> -cd-gpios = <&gpio10 3 0>;
>> -};
>>
[PATCHv6 5/5] mmc: dw_mmc: replace "disable-wp" from slot's quirk to host's quirk
Replaced the "disable-wp" into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c | 12 +---
include/linux/mmc/dw_mmc.h |6 ++
2 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 1ac227c..4a4f66f 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -997,7 +997,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
int gpio_ro = mmc_gpio_get_ro(mmc);
/* Use platform get_ro function, else try on board write protect */
- if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT)
+ if (slot->host->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT)
read_only = 0;
else if (!IS_ERR_VALUE(gpio_ro))
read_only = gpio_ro;
@@ -2006,12 +2006,7 @@ static struct device_node
*dw_mci_of_find_slot_node(struct device *dev, u8 slot)
static struct dw_mci_of_slot_quirks {
char *quirk;
int id;
-} of_slot_quirks[] = {
- {
- .quirk = "disable-wp",
- .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
- },
-};
+} of_slot_quirks[] = {};
static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
{
@@ -2238,6 +2233,9 @@ static struct dw_mci_of_quirks {
{
.quirk = "broken-cd",
.id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
+ }, {
+ .quirk = "disable-wp",
+ .id = DW_MCI_QUIRK_NO_WRITE_PROTECT,
},
};
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index babaea9..8b4b2d8 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -213,10 +213,8 @@ struct dw_mci_dma_ops {
#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
/* Unreliable card detection */
#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
-
-/* Slot level quirks */
-/* This slot has no write protect */
-#define DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT BIT(0)
+/* No write protect */
+#define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4)
struct dma_pdata;
--
1.7.9.5
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[PATCHv6 0/5] remove the sub-node and deprecated
Since used the mmc_of_parse(), didn't parse the sub-node. So we can remove the sub-node, because almost SoC used the only one card per a host. And supports-highspeed can be replaced to "cap-mmc/sd-highspeed" property. Changelog V6: - Fixed Wrong bit control for host's quirks and rename. - Add "Acked-by" for each SoC maintainers. Changelog V5: - Rebased on v3.16-rc4. - Add Acked-by. Changelog V4: - Fix the checkpatch error. Changelog V3: - Fix the wrong bus-width value. - Use the slot->host->quirks instead of brq->quirks. - Add tested-by and reviewd-by. Changelog V2: - Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to host's quirk" Jaehoon Chung (5): mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc mmc: dw_mmc: replace "disable-wp" from slot's quirk to host's quirk .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 - .../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 - .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 - arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++ arch/arm/boot/dts/exynos4412-origen.dts|8 ++ arch/arm/boot/dts/exynos4412-trats2.dts|8 ++ arch/arm/boot/dts/exynos5250-arndale.dts | 18 -- arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 -- arch/arm/boot/dts/exynos5250-snow.dts |6 ++--- arch/arm/boot/dts/exynos5260-xyref5260.dts | 18 -- arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 -- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 +++- arch/arm/boot/dts/exynos5420-peach-pit.dts | 16 +++- arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 +++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 +++- arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16 +++- arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++ arch/arm/boot/dts/socfpga_cyclone5.dtsi|9 +++ arch/arm/boot/dts/socfpga_vt.dts |9 +++ drivers/mmc/host/dw_mmc.c | 12 - include/linux/mmc/dw_mmc.h |6 ++--- 22 files changed, 86 insertions(+), 208 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv6 3/5] ARM: dts: socfpga: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_vt.dts|9 +++--
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi
b/arch/arm/boot/dts/socfpga_arria5.dtsi
index 12d1c2c..468fc4c 100644
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -29,13 +29,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
sysmgr@ffd08000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index bf51182..1ee03c4 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -30,13 +30,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 09792b4..f9345e0 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -43,13 +43,10 @@
dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff70 {
--
1.7.9.5
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[PATCHv6 1/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost Soc is used the slot per a host.
Don't use the slot-node and deprecated the "supports-highsped" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..9308325 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per a
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+ (Deprecated - Refer to
Documentaion/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = <1>;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
- <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
- <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
- <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
- <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
- };
+ bus-width = <8>;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = <1>;
vmmc-supply = <&ldo12>;
fifo-depth = <0x100>;
- supports-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- cd-gpios = <&gpio10 3 0>;
- };
+ bus-width = <4>;
+ disable-wp;
+ cd-gpios = <&gpio10 3 0>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use "cap-mmc-highspeed" or "cap-sd-highspeed"
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = <4>;
clock-freq-min-max = <40 2>;
num-slots = <1>;
- supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
vmmc-supply = <&buck8>;
-
- slot@0 {
- reg = <0>;
-
[PATCHv6 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
vmmc-supply = <&vcc_sd0>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
gpio-keys {
--
1.7.9.5
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[PATCHv6 2/5] ARM: dts: exynos: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats2.dts |8 ++--
arch/arm/boot/dts/exynos5250-arndale.dts | 18 +
arch/arm/boot/dts/exynos5250-cros-common.dtsi | 26 +++--
arch/arm/boot/dts/exynos5250-smdk5250.dts | 18 +
arch/arm/boot/dts/exynos5250-snow.dts |6 ++
arch/arm/boot/dts/exynos5260-xyref5260.dts| 18 +
arch/arm/boot/dts/exynos5410-smdk5410.dts | 18 +
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ---
arch/arm/boot/dts/exynos5420-peach-pit.dts| 16 ---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 16 ---
arch/arm/boot/dts/exynos5800-peach-pi.dts | 16 ---
13 files changed, 51 insertions(+), 141 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 31db28a..778aec6 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -45,17 +45,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
regulator_p3v3 {
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index e925c9f..de15114 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -137,17 +137,13 @@
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
codec@1340 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts
b/arch/arm/boot/dts/exynos4412-trats2.dts
index 7787844..65ab885 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -520,7 +520,6 @@
mmc@1255 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
non-removable;
card-detect-delay = <200>;
@@ -532,11 +531,8 @@
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
serial@1380 {
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index d0de1f5..42a3590 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -401,7 +401,6 @@
mmc_0: mmc@1220 {
status = "okay";
num-slots = <1>;
- supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
@@ -410,17 +409,13 @@
vmmc-supply = <&mmc_reg>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- };
+ bus-width = <8>;
+ cap-mmc-highspeed;
};
[PATCHv5 1/5] mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed
Almost Soc is used the slot per a host.
Don't use the slot-node and deprecated the "supports-highsped" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 17 +
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 12 +---
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 12 +---
3 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 532b1d4..9308325 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -46,13 +46,14 @@ Required Properties:
- if CIU clock divider value is 0 (that is divide by 1), both tx and rx
phase shift clocks should be 0.
-Required properties for a slot:
+Required properties for a slot (Deprecated - Recommend to use one slot per a
host):
* gpios: specifies a list of gpios used for command, clock and data bus. The
first gpio is the command line and the second gpio is the clock line. The
rest of the gpios (depending on the bus-width property) are the data lines in
no particular order. The format of the gpio specifier depends on the gpio
controller.
+ (Deprecated - Refer to
Documentaion/devicetree/binding/pinctrl/samsung-pinctrl.txt)
Example:
@@ -69,21 +70,13 @@ Example:
dwmmc0@1220 {
num-slots = <1>;
- supports-highspeed;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
-
- slot@0 {
- reg = <0>;
- bus-width = <8>;
- gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
- <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
- <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
- <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
- <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
- };
+ bus-width = <8>;
};
diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index e5bc49f..3b35449 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -34,13 +34,11 @@ Example:
num-slots = <1>;
vmmc-supply = <&ldo12>;
fifo-depth = <0x100>;
- supports-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>;
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- cd-gpios = <&gpio10 3 0>;
- };
+ bus-width = <4>;
+ disable-wp;
+ cd-gpios = <&gpio10 3 0>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 2d4a725..346c609 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -67,7 +67,8 @@ Optional properties:
* card-detect-delay: Delay in milli-seconds before detecting card after card
insert event. The default value is 0.
-* supports-highspeed: Enables support for high speed cards (up to 50MHz)
+* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to
50MHz)
+ (use "cap-mmc-highspeed" or "cap-sd-highspeed"
instead)
* broken-cd: as documented in mmc core bindings.
@@ -98,14 +99,11 @@ board specific portions as listed below.
clock-frequency = <4>;
clock-freq-min-max = <40 2>;
num-slots = <1>;
- supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
vmmc-supply = <&buck8>;
-
- slot@0 {
- reg = <0>;
-
[PATCHv5 4/5] ARM: dts: rockchip: unuse the slot-node and deprecated the supports-highspeed for dw-mmc
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And "supports-highspeed" property in dw-mmc is deprecated.
"supports-highspeed" property can be replaced to "cap-sd/mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
index afb3273..ecea889 100644
--- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts
+++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts
@@ -59,12 +59,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
vmmc-supply = <&vcc_sd0>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
dwmmc@10218000 { /* wifi */
@@ -74,12 +70,8 @@
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- disable-wp;
- };
+ bus-width = <4>;
+ disable-wp;
};
gpio-keys {
--
1.7.9.5
--
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