[PATCH 1/4] spi: mediatek: merge all identical compat to mtk_common_compat

[Leilk Liu]

This patch merge all identical compat into on mtk_common_compat
and used for all compatible soc.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |   15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 563954a..3573c09 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -95,8 +95,7 @@ struct mtk_spi {
const struct mtk_spi_compatible *dev_comp;
 };
 
-static const struct mtk_spi_compatible mt6589_compat;
-static const struct mtk_spi_compatible mt8135_compat;
+static const struct mtk_spi_compatible mtk_common_compat;
 static const struct mtk_spi_compatible mt8173_compat = {
.need_pad_sel = true,
.must_tx = true,
@@ -112,9 +111,15 @@ static const struct mtk_chip_config mtk_default_chip_info 
= {
 };
 
 static const struct of_device_id mtk_spi_of_match[] = {
-   { .compatible = "mediatek,mt6589-spi", .data = (void *)&mt6589_compat },
-   { .compatible = "mediatek,mt8135-spi", .data = (void *)&mt8135_compat },
-   { .compatible = "mediatek,mt8173-spi", .data = (void *)&mt8173_compat },
+   { .compatible = "mediatek,mt6589-spi",
+   .data = (void *)&mtk_common_compat,
+   },
+   { .compatible = "mediatek,mt8135-spi",
+   .data = (void *)&mtk_common_compat,
+   },
+   { .compatible = "mediatek,mt8173-spi",
+   .data = (void *)&mt8173_compat,
+   },
{}
 };
 MODULE_DEVICE_TABLE(of, mtk_spi_of_match);
-- 
1.7.9.5

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[PATCH 3/4] dts: mt2701: add spi dts for mt2701

[Leilk Liu]

This patch adds dtsi node of spi for mt2701.

Signed-off-by: Leilk Liu 
---
 arch/arm/boot/dts/mt2701.dtsi |   39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index bd88ae9..9ccd1f0 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -194,4 +194,43 @@
clocks = <&uart_clk>;
status = "disabled";
};
+
+   spi0: spi@1100a000 {
+   compatible = "mediatek,mt2701-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x100>;
+   interrupts = ;
+   clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+<&topckgen CLK_TOP_SPI0_SEL>,
+<&pericfg CLK_PERI_SPI0>;
+   clock-names = "parent-clk", "sel-clk", "spi-clk";
+   status = "disabled";
+   };
+
+   spi1: spi@11016000 {
+   compatible = "mediatek,mt2701-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x11016000 0 0x100>;
+   interrupts = ;
+   clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+<&topckgen CLK_TOP_SPI1_SEL>,
+<&pericfg CLK_PERI_SPI1>;
+   clock-names = "parent-clk", "sel-clk", "spi-clk";
+   status = "disabled";
+   };
+
+   spi2: spi@11017000 {
+   compatible = "mediatek,mt2701-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x11017000 0 0x1000>;
+   interrupts = ;
+   clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+<&topckgen CLK_TOP_SPI2_SEL>,
+<&pericfg CLK_PERI_SPI2>;
+   clock-names = "parent-clk", "sel-clk", "spi-clk";
+   status = "disabled";
+   };
 };
-- 
1.7.9.5

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[PATCH 2/4] spi: mediatek: Add spi support for mt2701 IC

[Leilk Liu]

This patch adds spi support for mt2701 IC.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3573c09..fe95f3f 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -111,6 +111,9 @@ static const struct mtk_chip_config mtk_default_chip_info = 
{
 };
 
 static const struct of_device_id mtk_spi_of_match[] = {
+   { .compatible = "mediatek,mt2701-spi",
+   .data = (void *)&mtk_common_compat,
+   },
{ .compatible = "mediatek,mt6589-spi",
.data = (void *)&mtk_common_compat,
},
-- 
1.7.9.5

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[PATCH 4/4] Document: spi: Add bindings for mediatek MT2701 soc platform

[Leilk Liu]

This patch adds a DT binding documentation for the MT2701 soc.

Signed-off-by: Leilk Liu 
---
 .../devicetree/bindings/spi/spi-mt65xx.txt |5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
index ce363c923f..bf489e0 100644
--- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -2,9 +2,10 @@ Binding for MTK SPI controller
 
 Required properties:
 - compatible: should be one of the following.
-- mediatek,mt8173-spi: for mt8173 platforms
-- mediatek,mt8135-spi: for mt8135 platforms
+- mediatek,mt2701-spi: for mt2701 platforms
 - mediatek,mt6589-spi: for mt6589 platforms
+- mediatek,mt8135-spi: for mt8135 platforms
+- mediatek,mt8173-spi: for mt8173 platforms
 
 - #address-cells: should be 1.
 
-- 
1.7.9.5

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[PATCH 0/4] SPI: support mt2701 IC

[Leilk Liu]

This series are based on 4.4-rc1 and provide 4 patches to support
mt2701 spi HW.

Change in this series:
1. merge all identical compat to mtk_common_compat;
2. Add spi support for mt2701 IC;
3. add spi dts for mt2701;
4. Add bindings for mediatek MT2701 soc platform.

Leilk Liu (4):
  spi: mediatek: merge all identical compat to mtk_common_compat
  spi: mediatek: Add spi support for mt2701 IC
  dts: mt2701: add spi dts for mt2701
  Document: spi: Add bindings for mediatek MT2701 soc platform

 .../devicetree/bindings/spi/spi-mt65xx.txt |5 ++-
 arch/arm/boot/dts/mt2701.dtsi  |   39 
 drivers/spi/spi-mt65xx.c   |   18 ++---
 3 files changed, 55 insertions(+), 7 deletions(-)

--
1.7.9.5

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[PATCH v3] spi: mediatek: revise mtk_spi_probe() failure flow

[Leilk Liu]

mtk_spi_probe() calls pm_runtime_enable(), after
pm_runtime_enable() is called, it should call
pm_runtime_disable() in the failure flow.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |   15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 6c1a96e..00a36da 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -607,7 +607,8 @@ static int mtk_spi_probe(struct platform_device *pdev)
ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret);
-   goto err_disable_clk;
+   clk_disable_unprepare(mdata->spi_clk);
+   goto err_put_master;
}
 
clk_disable_unprepare(mdata->spi_clk);
@@ -617,7 +618,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
ret = devm_spi_register_master(&pdev->dev, master);
if (ret) {
dev_err(&pdev->dev, "failed to register master (%d)\n", ret);
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (mdata->dev_comp->need_pad_sel) {
@@ -626,14 +627,14 @@ static int mtk_spi_probe(struct platform_device *pdev)
"pad_num does not match num_chipselect(%d != 
%d)\n",
mdata->pad_num, master->num_chipselect);
ret = -EINVAL;
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (!master->cs_gpios && master->num_chipselect > 1) {
dev_err(&pdev->dev,
"cs_gpios not specified and num_chipselect > 
1\n");
ret = -EINVAL;
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (master->cs_gpios) {
@@ -644,7 +645,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
if (ret) {
dev_err(&pdev->dev,
"can't get CS GPIO %i\n", i);
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
}
}
@@ -652,8 +653,8 @@ static int mtk_spi_probe(struct platform_device *pdev)
 
return 0;
 
-err_disable_clk:
-   clk_disable_unprepare(mdata->spi_clk);
+err_disable_runtime_pm:
+   pm_runtime_disable(&pdev->dev);
 err_put_master:
spi_master_put(master);
 
-- 
1.7.9.5

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[PATCH v2] spi: mediatek: revise mtk_spi_probe() failure flow

[Leilk Liu]

This patch revises failure flow while pm_runtime_enable().

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |   15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 6c1a96e..00a36da 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -607,7 +607,8 @@ static int mtk_spi_probe(struct platform_device *pdev)
ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret);
-   goto err_disable_clk;
+   clk_disable_unprepare(mdata->spi_clk);
+   goto err_put_master;
}
 
clk_disable_unprepare(mdata->spi_clk);
@@ -617,7 +618,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
ret = devm_spi_register_master(&pdev->dev, master);
if (ret) {
dev_err(&pdev->dev, "failed to register master (%d)\n", ret);
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (mdata->dev_comp->need_pad_sel) {
@@ -626,14 +627,14 @@ static int mtk_spi_probe(struct platform_device *pdev)
"pad_num does not match num_chipselect(%d != 
%d)\n",
mdata->pad_num, master->num_chipselect);
ret = -EINVAL;
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (!master->cs_gpios && master->num_chipselect > 1) {
dev_err(&pdev->dev,
"cs_gpios not specified and num_chipselect > 
1\n");
ret = -EINVAL;
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (master->cs_gpios) {
@@ -644,7 +645,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
if (ret) {
dev_err(&pdev->dev,
"can't get CS GPIO %i\n", i);
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
}
}
@@ -652,8 +653,8 @@ static int mtk_spi_probe(struct platform_device *pdev)
 
return 0;
 
-err_disable_clk:
-   clk_disable_unprepare(mdata->spi_clk);
+err_disable_runtime_pm:
+   pm_runtime_disable(&pdev->dev);
 err_put_master:
spi_master_put(master);
 
-- 
1.7.9.5

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[PATCH 3/4] spi: mediatek: remove needless pair of writel()/readl()

[Leilk Liu]

It's not need to re-read and re-write SPI_CMD_REG, so remove it.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 7840067..6c1a96e 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -154,9 +154,6 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
reg_val |= SPI_CMD_CPOL;
else
reg_val &= ~SPI_CMD_CPOL;
-   writel(reg_val, mdata->base + SPI_CMD_REG);
-
-   reg_val = readl(mdata->base + SPI_CMD_REG);
 
/* set the mlsbx and mlsbtx */
if (chip_config->tx_mlsb)
-- 
1.7.9.5

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[PATCH 2/4] spi: mediatek: remove unrequired description

[Leilk Liu]

cs-gpios isn't required with patch "spi: mediatek: single
device does not require cs_gpios", so modify the description.

Signed-off-by: Leilk Liu 
---
 .../devicetree/bindings/spi/spi-mt65xx.txt |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
index fba8334..60a183c 100644
--- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -29,7 +29,7 @@ Required properties:
   muxes clock, and "spi-clk" for the clock gate.
 
 Optional properties:
--cs-gpios: see spi-bus.txt, only required for MT8173.
+-cs-gpios: see spi-bus.txt.
 
 - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
   controller used. This is an array, the element value should be 0~3,
-- 
1.7.9.5

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[PATCH 4/4] spi: mediatek: revise mtk_spi_probe() failure flow

[Leilk Liu]

This patch revises failure flow while pm_runtime_enable().

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c |   15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 6c1a96e..00a36da 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -607,7 +607,8 @@ static int mtk_spi_probe(struct platform_device *pdev)
ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret);
-   goto err_disable_clk;
+   clk_disable_unprepare(mdata->spi_clk);
+   goto err_put_master;
}
 
clk_disable_unprepare(mdata->spi_clk);
@@ -617,7 +618,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
ret = devm_spi_register_master(&pdev->dev, master);
if (ret) {
dev_err(&pdev->dev, "failed to register master (%d)\n", ret);
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (mdata->dev_comp->need_pad_sel) {
@@ -626,14 +627,14 @@ static int mtk_spi_probe(struct platform_device *pdev)
"pad_num does not match num_chipselect(%d != 
%d)\n",
mdata->pad_num, master->num_chipselect);
ret = -EINVAL;
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (!master->cs_gpios && master->num_chipselect > 1) {
dev_err(&pdev->dev,
"cs_gpios not specified and num_chipselect > 
1\n");
ret = -EINVAL;
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
 
if (master->cs_gpios) {
@@ -644,7 +645,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
if (ret) {
dev_err(&pdev->dev,
"can't get CS GPIO %i\n", i);
-   goto err_put_master;
+   goto err_disable_runtime_pm;
}
}
}
@@ -652,8 +653,8 @@ static int mtk_spi_probe(struct platform_device *pdev)
 
return 0;
 
-err_disable_clk:
-   clk_disable_unprepare(mdata->spi_clk);
+err_disable_runtime_pm:
+   pm_runtime_disable(&pdev->dev);
 err_put_master:
spi_master_put(master);
 
-- 
1.7.9.5

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[PATCH 1/4] spi: mediatek: update document devicetree bindings to fix syntax error

[Leilk Liu]

This patch updates document devicetree bindings
to fix syntax error.

Signed-off-by: Leilk Liu 
---
 .../devicetree/bindings/spi/spi-mt65xx.txt |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
index ce363c923f..fba8334 100644
--- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -32,7 +32,7 @@ Optional properties:
 -cs-gpios: see spi-bus.txt, only required for MT8173.
 
 - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
-  controller used. This is a array, the element value should be 0~3,
+  controller used. This is an array, the element value should be 0~3,
   only required for MT8173.
 0: specify GPIO69,70,71,72 for spi pins.
 1: specify GPIO102,103,104,105 for spi pins.
-- 
1.7.9.5

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[PATCH v2 0/5] mt8173 spi multiple devices support

[Leilk Liu]

This series are based on 4.3-rc1 and provide 5 patches to support
mt8173 spi multiple devices.

Change in v2:
1. add mt8173 board name on patch 5/5 subject.
2. fix this series merge conflict.

Change in v1:
1. update document to add cs-gpio;
2. remove mtk_spi_config function;
3. move controller_data to master->setup;
4. add mt8173 spi multiple devices support;
5. update dts to add cs-gpio and modify cs pin to gpio function.

Leilk Liu (5):
  dt-binding: spi: Mediatek: Update document devicetree bindings to
support multiple devices
  spi: mediatek: remove mtk_spi_config
  spi: mediatek: handle controller_data in mtk_spi_setup
  spi: mediatek: mt8173 spi multiple devices support
  arm64: dts: mt8173: spi bus dts support multiple devices

 .../devicetree/bindings/spi/spi-mt65xx.txt |   9 +-
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts|   3 +-
 drivers/spi/spi-mt65xx.c   | 129 +
 3 files changed, 91 insertions(+), 50 deletions(-)

--
1.8.1.1.dirty

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[PATCH v2 2/5] spi: mediatek: remove mtk_spi_config

[Leilk Liu]

mtk_spi_config() and mtk_spi_prepare_message() both initialize
spi register, so remove mtk_spi_config() and init all register
in mtk_spi_prepare_message().

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 59 +---
 1 file changed, 26 insertions(+), 33 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index ecb6c58..7bd84c8 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -131,10 +131,34 @@ static void mtk_spi_reset(struct mtk_spi *mdata)
writel(reg_val, mdata->base + SPI_CMD_REG);
 }
 
-static void mtk_spi_config(struct mtk_spi *mdata,
-  struct mtk_chip_config *chip_config)
+static int mtk_spi_prepare_message(struct spi_master *master,
+  struct spi_message *msg)
 {
+   u16 cpha, cpol;
u32 reg_val;
+   struct mtk_chip_config *chip_config;
+   struct spi_device *spi = msg->spi;
+   struct mtk_spi *mdata = spi_master_get_devdata(master);
+
+   cpha = spi->mode & SPI_CPHA ? 1 : 0;
+   cpol = spi->mode & SPI_CPOL ? 1 : 0;
+
+   chip_config = spi->controller_data;
+   if (!chip_config) {
+   chip_config = (void *)&mtk_default_chip_info;
+   spi->controller_data = chip_config;
+   }
+
+   reg_val = readl(mdata->base + SPI_CMD_REG);
+   if (cpha)
+   reg_val |= SPI_CMD_CPHA;
+   else
+   reg_val &= ~SPI_CMD_CPHA;
+   if (cpol)
+   reg_val |= SPI_CMD_CPOL;
+   else
+   reg_val &= ~SPI_CMD_CPOL;
+   writel(reg_val, mdata->base + SPI_CMD_REG);
 
reg_val = readl(mdata->base + SPI_CMD_REG);
 
@@ -171,37 +195,6 @@ static void mtk_spi_config(struct mtk_spi *mdata,
/* pad select */
if (mdata->dev_comp->need_pad_sel)
writel(mdata->pad_sel, mdata->base + SPI_PAD_SEL_REG);
-}
-
-static int mtk_spi_prepare_message(struct spi_master *master,
-  struct spi_message *msg)
-{
-   u32 reg_val;
-   u8 cpha, cpol;
-   struct mtk_chip_config *chip_config;
-   struct spi_device *spi = msg->spi;
-   struct mtk_spi *mdata = spi_master_get_devdata(master);
-
-   cpha = spi->mode & SPI_CPHA ? 1 : 0;
-   cpol = spi->mode & SPI_CPOL ? 1 : 0;
-
-   reg_val = readl(mdata->base + SPI_CMD_REG);
-   if (cpha)
-   reg_val |= SPI_CMD_CPHA;
-   else
-   reg_val &= ~SPI_CMD_CPHA;
-   if (cpol)
-   reg_val |= SPI_CMD_CPOL;
-   else
-   reg_val &= ~SPI_CMD_CPOL;
-   writel(reg_val, mdata->base + SPI_CMD_REG);
-
-   chip_config = spi->controller_data;
-   if (!chip_config) {
-   chip_config = (void *)&mtk_default_chip_info;
-   spi->controller_data = chip_config;
-   }
-   mtk_spi_config(mdata, chip_config);
 
return 0;
 }
-- 
1.8.1.1.dirty

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[PATCH v2 1/5] dt-binding: spi: Mediatek: Update document devicetree bindings to support multiple devices

[Leilk Liu]

This patch updates document devicetree bindings
to support multiple devices.

Signed-off-by: Leilk Liu 
---
 Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
index 6160ffb..ce363c923f 100644
--- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -29,8 +29,11 @@ Required properties:
   muxes clock, and "spi-clk" for the clock gate.
 
 Optional properties:
+-cs-gpios: see spi-bus.txt, only required for MT8173.
+
 - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
-  controller used, this value should be 0~3, only required for MT8173.
+  controller used. This is a array, the element value should be 0~3,
+  only required for MT8173.
 0: specify GPIO69,70,71,72 for spi pins.
 1: specify GPIO102,103,104,105 for spi pins.
 2: specify GPIO128,129,130,131 for spi pins.
@@ -49,7 +52,7 @@ spi: spi@1100a000 {
 <&topckgen CLK_TOP_SPI_SEL>,
 <&pericfg CLK_PERI_SPI0>;
clock-names = "parent-clk", "sel-clk", "spi-clk";
-
-   mediatek,pad-select = <0>;
+   cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
+   mediatek,pad-select = <1>, <0>;
status = "disabled";
 };
-- 
1.8.1.1.dirty

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[PATCH v2 3/5] spi: mediatek: handle controller_data in mtk_spi_setup

[Leilk Liu]

controller_data is related with device, so move to master->setup
function.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 7bd84c8..406695a 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -136,19 +136,13 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
 {
u16 cpha, cpol;
u32 reg_val;
-   struct mtk_chip_config *chip_config;
struct spi_device *spi = msg->spi;
+   struct mtk_chip_config *chip_config = spi->controller_data;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
cpha = spi->mode & SPI_CPHA ? 1 : 0;
cpol = spi->mode & SPI_CPOL ? 1 : 0;
 
-   chip_config = spi->controller_data;
-   if (!chip_config) {
-   chip_config = (void *)&mtk_default_chip_info;
-   spi->controller_data = chip_config;
-   }
-
reg_val = readl(mdata->base + SPI_CMD_REG);
if (cpha)
reg_val |= SPI_CMD_CPHA;
@@ -406,6 +400,16 @@ static bool mtk_spi_can_dma(struct spi_master *master,
return xfer->len > MTK_SPI_MAX_FIFO_SIZE;
 }
 
+static int mtk_spi_setup(struct spi_device *spi)
+{
+   struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
+
+   if (!spi->controller_data)
+   spi->controller_data = (void *)&mtk_default_chip_info;
+
+   return 0;
+}
+
 static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
 {
u32 cmd, reg_val, cnt;
@@ -493,6 +497,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
master->prepare_message = mtk_spi_prepare_message;
master->transfer_one = mtk_spi_transfer_one;
master->can_dma = mtk_spi_can_dma;
+   master->setup = mtk_spi_setup;
 
of_id = of_match_node(mtk_spi_of_match, pdev->dev.of_node);
if (!of_id) {
-- 
1.8.1.1.dirty

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[PATCH v2 5/5] arm64: dts: mt8173: spi bus dts support multiple devices

[Leilk Liu]

This patch support multiple devices for MT8173 board.

Signed-off-by: Leilk Liu 
---
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts 
b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 811cb76..e7a4416 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -393,7 +393,7 @@
pinmux = ,
,
,
-   ;
+   ;
};
};
 };
@@ -401,6 +401,7 @@
 &spi {
pinctrl-names = "default";
pinctrl-0 = <&spi_pins_a>;
+   cs-gpios = <&pio 72 0>;
mediatek,pad-select = <0>;
status = "okay";
 };
-- 
1.8.1.1.dirty

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[PATCH v2 4/5] spi: mediatek: mt8173 spi multiple devices support

[Leilk Liu]

mt8173 IC spi HW has 4 gpio group, it's possible to support
max <= 4 slave devices, even mtk spi HW is not congruent to spi core.
1. When a device do a spi_message transfer, spi HW should know
   which pad-group this device is on, and then writes pad-select
   register.
2. Mtk pad-select register just selects which MISO pin HW will
   receive data. For example, pad-select=1(select spi1 pins), HW just
   receives data from spi1 MISO, but it still send waveform to all 4
   group cs/clk/mosi. If cs pin in other groups is still spi mode,
   after spi1 is selected(by active cs pin), devices on other group
   will also be selected.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 65 ++--
 1 file changed, 52 insertions(+), 13 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 406695a..563954a 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -84,7 +85,8 @@ struct mtk_spi_compatible {
 struct mtk_spi {
void __iomem *base;
u32 state;
-   u32 pad_sel;
+   int pad_num;
+   u32 *pad_sel;
struct clk *parent_clk, *sel_clk, *spi_clk;
struct spi_transfer *cur_transfer;
u32 xfer_len;
@@ -188,7 +190,8 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
 
/* pad select */
if (mdata->dev_comp->need_pad_sel)
-   writel(mdata->pad_sel, mdata->base + SPI_PAD_SEL_REG);
+   writel(mdata->pad_sel[spi->chip_select],
+  mdata->base + SPI_PAD_SEL_REG);
 
return 0;
 }
@@ -407,6 +410,9 @@ static int mtk_spi_setup(struct spi_device *spi)
if (!spi->controller_data)
spi->controller_data = (void *)&mtk_default_chip_info;
 
+   if (mdata->dev_comp->need_pad_sel)
+   gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
+
return 0;
 }
 
@@ -481,7 +487,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
struct mtk_spi *mdata;
const struct of_device_id *of_id;
struct resource *res;
-   int irq, ret;
+   int i, irq, ret;
 
master = spi_alloc_master(&pdev->dev, sizeof(*mdata));
if (!master) {
@@ -512,21 +518,34 @@ static int mtk_spi_probe(struct platform_device *pdev)
master->flags = SPI_MASTER_MUST_TX;
 
if (mdata->dev_comp->need_pad_sel) {
-   ret = of_property_read_u32(pdev->dev.of_node,
-  "mediatek,pad-select",
-  &mdata->pad_sel);
-   if (ret) {
-   dev_err(&pdev->dev, "failed to read pad select: %d\n",
-   ret);
+   mdata->pad_num = of_property_count_u32_elems(
+   pdev->dev.of_node,
+   "mediatek,pad-select");
+   if (mdata->pad_num < 0) {
+   dev_err(&pdev->dev,
+   "No 'mediatek,pad-select' property\n");
+   ret = -EINVAL;
goto err_put_master;
}
 
-   if (mdata->pad_sel > MT8173_SPI_MAX_PAD_SEL) {
-   dev_err(&pdev->dev, "wrong pad-select: %u\n",
-   mdata->pad_sel);
-   ret = -EINVAL;
+   mdata->pad_sel = devm_kmalloc_array(&pdev->dev, mdata->pad_num,
+   sizeof(u32), GFP_KERNEL);
+   if (!mdata->pad_sel) {
+   ret = -ENOMEM;
goto err_put_master;
}
+
+   for (i = 0; i < mdata->pad_num; i++) {
+   of_property_read_u32_index(pdev->dev.of_node,
+  "mediatek,pad-select",
+  i, &mdata->pad_sel[i]);
+   if (mdata->pad_sel[i] > MT8173_SPI_MAX_PAD_SEL) {
+   dev_err(&pdev->dev, "wrong pad-sel[%d]: %u\n",
+   i, mdata->pad_sel[i]);
+   ret = -EINVAL;
+   goto err_put_master;
+   }
+   }
}
 
platform_set_drvdata(pdev, master);
@@ -604,6 +623,26 @@ static int mtk_spi_probe(struct platform_device *pdev)
goto err_put_master;
}
 
+   if (mdata->dev_comp->need_pad_sel) {
+   if (mdata->pad_num != master->num_chipselect) {
+ 

[PATCH 3/5] spi: mediatek: handle controller_data in mtk_spi_setup

[Leilk Liu]

controller_data is related with device, so move to master->setup
function.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 7bd84c8..406695a 100755
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -136,19 +136,13 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
 {
u16 cpha, cpol;
u32 reg_val;
-   struct mtk_chip_config *chip_config;
struct spi_device *spi = msg->spi;
+   struct mtk_chip_config *chip_config = spi->controller_data;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
cpha = spi->mode & SPI_CPHA ? 1 : 0;
cpol = spi->mode & SPI_CPOL ? 1 : 0;
 
-   chip_config = spi->controller_data;
-   if (!chip_config) {
-   chip_config = (void *)&mtk_default_chip_info;
-   spi->controller_data = chip_config;
-   }
-
reg_val = readl(mdata->base + SPI_CMD_REG);
if (cpha)
reg_val |= SPI_CMD_CPHA;
@@ -406,6 +400,16 @@ static bool mtk_spi_can_dma(struct spi_master *master,
return xfer->len > MTK_SPI_MAX_FIFO_SIZE;
 }
 
+static int mtk_spi_setup(struct spi_device *spi)
+{
+   struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
+
+   if (!spi->controller_data)
+   spi->controller_data = (void *)&mtk_default_chip_info;
+
+   return 0;
+}
+
 static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
 {
u32 cmd, reg_val, cnt;
@@ -493,6 +497,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
master->prepare_message = mtk_spi_prepare_message;
master->transfer_one = mtk_spi_transfer_one;
master->can_dma = mtk_spi_can_dma;
+   master->setup = mtk_spi_setup;
 
of_id = of_match_node(mtk_spi_of_match, pdev->dev.of_node);
if (!of_id) {
-- 
1.8.1.1.dirty

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[PATCH 1/5] dt-binding: spi: Mediatek: Update document devicetree bindings to support multiple devices

[Leilk Liu]

This patch update document devicetree bindings to
support multiple devices.

Signed-off-by: Leilk Liu 
---
 Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
index dcefc43..8391193 100644
--- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -28,8 +28,11 @@ Required properties:
   "parent-clk" for the parent clock.
 
 Optional properties:
+-cs-gpios: see spi-bus.txt, only required for MT8173.
+
 - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
-  controller used, this value should be 0~3, only required for MT8173.
+  controller used. This is a array, the element value should be 0~3,
+  only required for MT8173.
 0: specify GPIO69,70,71,72 for spi pins.
 1: specify GPIO102,103,104,105 for spi pins.
 2: specify GPIO128,129,130,131 for spi pins.
@@ -46,6 +49,7 @@ spi: spi@1100a000 {
interrupts = ;
clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
clock-names = "spi-clk", "parent-clk";
-   mediatek,pad-select = <0>;
+   cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
+   mediatek,pad-select = <1>, <0>;
status = "disabled";
 };
-- 
1.8.1.1.dirty

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[PATCH 2/5] spi: mediatek: remove mtk_spi_config

[Leilk Liu]

mtk_spi_config() and mtk_spi_prepare_message() both initialize
spi register, so remove mtk_spi_config() and init all register
in mtk_spi_prepare_message().

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 59 +---
 1 file changed, 26 insertions(+), 33 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index ecb6c58..7bd84c8 100755
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -131,10 +131,34 @@ static void mtk_spi_reset(struct mtk_spi *mdata)
writel(reg_val, mdata->base + SPI_CMD_REG);
 }
 
-static void mtk_spi_config(struct mtk_spi *mdata,
-  struct mtk_chip_config *chip_config)
+static int mtk_spi_prepare_message(struct spi_master *master,
+  struct spi_message *msg)
 {
+   u16 cpha, cpol;
u32 reg_val;
+   struct mtk_chip_config *chip_config;
+   struct spi_device *spi = msg->spi;
+   struct mtk_spi *mdata = spi_master_get_devdata(master);
+
+   cpha = spi->mode & SPI_CPHA ? 1 : 0;
+   cpol = spi->mode & SPI_CPOL ? 1 : 0;
+
+   chip_config = spi->controller_data;
+   if (!chip_config) {
+   chip_config = (void *)&mtk_default_chip_info;
+   spi->controller_data = chip_config;
+   }
+
+   reg_val = readl(mdata->base + SPI_CMD_REG);
+   if (cpha)
+   reg_val |= SPI_CMD_CPHA;
+   else
+   reg_val &= ~SPI_CMD_CPHA;
+   if (cpol)
+   reg_val |= SPI_CMD_CPOL;
+   else
+   reg_val &= ~SPI_CMD_CPOL;
+   writel(reg_val, mdata->base + SPI_CMD_REG);
 
reg_val = readl(mdata->base + SPI_CMD_REG);
 
@@ -171,37 +195,6 @@ static void mtk_spi_config(struct mtk_spi *mdata,
/* pad select */
if (mdata->dev_comp->need_pad_sel)
writel(mdata->pad_sel, mdata->base + SPI_PAD_SEL_REG);
-}
-
-static int mtk_spi_prepare_message(struct spi_master *master,
-  struct spi_message *msg)
-{
-   u32 reg_val;
-   u8 cpha, cpol;
-   struct mtk_chip_config *chip_config;
-   struct spi_device *spi = msg->spi;
-   struct mtk_spi *mdata = spi_master_get_devdata(master);
-
-   cpha = spi->mode & SPI_CPHA ? 1 : 0;
-   cpol = spi->mode & SPI_CPOL ? 1 : 0;
-
-   reg_val = readl(mdata->base + SPI_CMD_REG);
-   if (cpha)
-   reg_val |= SPI_CMD_CPHA;
-   else
-   reg_val &= ~SPI_CMD_CPHA;
-   if (cpol)
-   reg_val |= SPI_CMD_CPOL;
-   else
-   reg_val &= ~SPI_CMD_CPOL;
-   writel(reg_val, mdata->base + SPI_CMD_REG);
-
-   chip_config = spi->controller_data;
-   if (!chip_config) {
-   chip_config = (void *)&mtk_default_chip_info;
-   spi->controller_data = chip_config;
-   }
-   mtk_spi_config(mdata, chip_config);
 
return 0;
 }
-- 
1.8.1.1.dirty

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[PATCH 4/5] spi: mediatek: mt8173 spi multiple devices support

[Leilk Liu]

mt8173 IC spi HW has 4 gpio group, it's possible to support
max <= 4 slave devices, even mtk spi HW is not congruent to spi core.
1. When a device do a spi_message transfer, spi HW should know
   which pad-group this device is on, and then writes pad-select
   register.
2. Mtk pad-select register just selects which MISO pin HW will
   receive data. For example, pad-select=1(select spi1 pins), HW just
   receives data from spi1 MISO, but it still send waveform to all 4
   group cs/clk/mosi. If cs pin in other groups is still spi mode,
   after spi1 is selected(by active cs pin), devices on other group
   will also be selected.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 65 ++--
 1 file changed, 52 insertions(+), 13 deletions(-)
 mode change 100755 => 100644 drivers/spi/spi-mt65xx.c

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
old mode 100755
new mode 100644
index 406695a..563954a
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -84,7 +85,8 @@ struct mtk_spi_compatible {
 struct mtk_spi {
void __iomem *base;
u32 state;
-   u32 pad_sel;
+   int pad_num;
+   u32 *pad_sel;
struct clk *parent_clk, *sel_clk, *spi_clk;
struct spi_transfer *cur_transfer;
u32 xfer_len;
@@ -188,7 +190,8 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
 
/* pad select */
if (mdata->dev_comp->need_pad_sel)
-   writel(mdata->pad_sel, mdata->base + SPI_PAD_SEL_REG);
+   writel(mdata->pad_sel[spi->chip_select],
+  mdata->base + SPI_PAD_SEL_REG);
 
return 0;
 }
@@ -407,6 +410,9 @@ static int mtk_spi_setup(struct spi_device *spi)
if (!spi->controller_data)
spi->controller_data = (void *)&mtk_default_chip_info;
 
+   if (mdata->dev_comp->need_pad_sel)
+   gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
+
return 0;
 }
 
@@ -481,7 +487,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
struct mtk_spi *mdata;
const struct of_device_id *of_id;
struct resource *res;
-   int irq, ret;
+   int i, irq, ret;
 
master = spi_alloc_master(&pdev->dev, sizeof(*mdata));
if (!master) {
@@ -512,21 +518,34 @@ static int mtk_spi_probe(struct platform_device *pdev)
master->flags = SPI_MASTER_MUST_TX;
 
if (mdata->dev_comp->need_pad_sel) {
-   ret = of_property_read_u32(pdev->dev.of_node,
-  "mediatek,pad-select",
-  &mdata->pad_sel);
-   if (ret) {
-   dev_err(&pdev->dev, "failed to read pad select: %d\n",
-   ret);
+   mdata->pad_num = of_property_count_u32_elems(
+   pdev->dev.of_node,
+   "mediatek,pad-select");
+   if (mdata->pad_num < 0) {
+   dev_err(&pdev->dev,
+   "No 'mediatek,pad-select' property\n");
+   ret = -EINVAL;
goto err_put_master;
}
 
-   if (mdata->pad_sel > MT8173_SPI_MAX_PAD_SEL) {
-   dev_err(&pdev->dev, "wrong pad-select: %u\n",
-   mdata->pad_sel);
-   ret = -EINVAL;
+   mdata->pad_sel = devm_kmalloc_array(&pdev->dev, mdata->pad_num,
+   sizeof(u32), GFP_KERNEL);
+   if (!mdata->pad_sel) {
+   ret = -ENOMEM;
goto err_put_master;
}
+
+   for (i = 0; i < mdata->pad_num; i++) {
+   of_property_read_u32_index(pdev->dev.of_node,
+  "mediatek,pad-select",
+  i, &mdata->pad_sel[i]);
+   if (mdata->pad_sel[i] > MT8173_SPI_MAX_PAD_SEL) {
+   dev_err(&pdev->dev, "wrong pad-sel[%d]: %u\n",
+   i, mdata->pad_sel[i]);
+   ret = -EINVAL;
+   goto err_put_master;
+   }
+   }
}
 
platform_set_drvdata(pdev, master);
@@ -604,6 +623,26 @@ static int mtk_spi_probe(struct platform_device *pdev)
goto err_put_master;
}
 
+   if (mdata->dev_comp->need_pad_sel) {
+   

[PATCH 5/5] arm64: dts: spi bus dts support multiple devices

[Leilk Liu]

This patch support multiple devices for MT8173.

Signed-off-by: Leilk Liu 
---
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts 
b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 04b38ed..1c8c407 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -194,7 +194,7 @@
pinmux = ,
,
,
-   ;
+   ;
};
};
 };
@@ -399,6 +399,7 @@
 &spi {
pinctrl-names = "default";
pinctrl-0 = <&spi_pins_a>;
+   cs-gpios = <&pio 72 0>;
mediatek,pad-select = <0>;
status = "okay";
 };
-- 
1.8.1.1.dirty

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[PATCH 0/5] mt8173 spi multiple devices support

[Leilk Liu]

This series are based on 4.3-rc1 and provide 5 patches to support
mt8173 spi multiple devices.

Change in this series:
1. update document to add cs-gpio;
2. remove mtk_spi_config function;
3. move controller_data to master->setup;
4. add mt8173 spi multiple devices support;
5. update dts to add cs-gpio and modify cs pin to gpio function.

Leilk Liu (5):
  dt-binding: spi: Mediatek: Update document devicetree bindings to
support multiple devices
  spi: mediatek: remove mtk_spi_config
  spi: mediatek: handle controller_data in mtk_spi_setup
  spi: mediatek: mt8173 spi multiple devices support
  arm64: dts: spi bus dts support multiple devices

 .../devicetree/bindings/spi/spi-mt65xx.txt |   8 +-
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts|   3 +-
 drivers/spi/spi-mt65xx.c   | 129 +
 3 files changed, 91 insertions(+), 49 deletions(-)
 mode change 100755 => 100644 drivers/spi/spi-mt65xx.c

--
1.8.1.1.dirty

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[PATCH] spi: mediatek: fix spi cs polarity error

[Leilk Liu]

Mediatek spi HW can't set cs inactive(keep cs high) directly.
Instead, it supplies pause mode to do it indirectly. If driver
unsets SPI_CMD_PAUSE_MODE in CMD_REG, it also needs to reset
internal state machine to let cs inactive at once.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 27 +++
 1 file changed, 7 insertions(+), 20 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 401e2e0..ba0fc10 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -173,22 +173,6 @@ static void mtk_spi_config(struct mtk_spi *mdata,
writel(mdata->pad_sel, mdata->base + SPI_PAD_SEL_REG);
 }
 
-static int mtk_spi_prepare_hardware(struct spi_master *master)
-{
-   struct spi_transfer *trans;
-   struct mtk_spi *mdata = spi_master_get_devdata(master);
-   struct spi_message *msg = master->cur_msg;
-
-   trans = list_first_entry(&msg->transfers, struct spi_transfer,
-transfer_list);
-   if (!trans->cs_change) {
-   mdata->state = MTK_SPI_IDLE;
-   mtk_spi_reset(mdata);
-   }
-
-   return 0;
-}
-
 static int mtk_spi_prepare_message(struct spi_master *master,
   struct spi_message *msg)
 {
@@ -228,11 +212,15 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool 
enable)
struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
 
reg_val = readl(mdata->base + SPI_CMD_REG);
-   if (!enable)
+   if (!enable) {
reg_val |= SPI_CMD_PAUSE_EN;
-   else
+   writel(reg_val, mdata->base + SPI_CMD_REG);
+   } else {
reg_val &= ~SPI_CMD_PAUSE_EN;
-   writel(reg_val, mdata->base + SPI_CMD_REG);
+   writel(reg_val, mdata->base + SPI_CMD_REG);
+   mdata->state = MTK_SPI_IDLE;
+   mtk_spi_reset(mdata);
+   }
 }
 
 static void mtk_spi_prepare_transfer(struct spi_master *master,
@@ -509,7 +497,6 @@ static int mtk_spi_probe(struct platform_device *pdev)
master->mode_bits = SPI_CPOL | SPI_CPHA;
 
master->set_cs = mtk_spi_set_cs;
-   master->prepare_transfer_hardware = mtk_spi_prepare_hardware;
master->prepare_message = mtk_spi_prepare_message;
master->transfer_one = mtk_spi_transfer_one;
master->can_dma = mtk_spi_can_dma;
-- 
1.8.1.1.dirty

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[PATCH v7] arm64: dts: Add spi bus dts

[Leilk Liu]

This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: Leilk Liu 
---
Change in this patch:
1. fix spi clock flow usage error.
---
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++
 arch/arm64/boot/dts/mediatek/mt8173.dtsi| 13 +
 2 files changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts 
b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 4be66ca..811cb76 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -387,6 +387,24 @@
};
 };
 
+&pio {
+   spi_pins_a: spi0 {
+   pins_spi {
+   pinmux = ,
+   ,
+   ,
+   ;
+   };
+   };
+};
+
+&spi {
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi_pins_a>;
+   mediatek,pad-select = <0>;
+   status = "okay";
+};
+
 &uart0 {
status = "okay";
 };
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..fcb4860 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,19 @@
status = "disabled";
};
 
+   spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+<&topckgen CLK_TOP_SPI_SEL>,
+<&pericfg CLK_PERI_SPI0>;
+   clock-names = "parent-clk", "sel-clk", "spi-clk";
+   status = "disabled";
+   };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
-- 
1.8.1.1.dirty

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[PATCH 2/3] spi: mediatek: fix spi clock usage error

[Leilk Liu]

spi clock manages flow:
  CLK_TOP_SYSPLL3_D2 ---> CLK_TOP_SPI_SEL ---> CLK_PERI_SPI0
 (source clock)   (clock mux)   (clock gate)
spi driver should choose source clock by clock mux, then enable
clock gate.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 23 +++
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 3a177d0..5ecd644 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -85,7 +85,7 @@ struct mtk_spi {
void __iomem *base;
u32 state;
u32 pad_sel;
-   struct clk *spi_clk, *parent_clk;
+   struct clk *parent_clk, *sel_clk, *spi_clk;
struct spi_transfer *cur_transfer;
u32 xfer_len;
struct scatterlist *tx_sgl, *rx_sgl;
@@ -576,17 +576,24 @@ static int mtk_spi_probe(struct platform_device *pdev)
goto err_put_master;
}
 
-   mdata->spi_clk = devm_clk_get(&pdev->dev, "spi-clk");
-   if (IS_ERR(mdata->spi_clk)) {
+   mdata->parent_clk = devm_clk_get(&pdev->dev, "parent-clk");
+   if (IS_ERR(mdata->parent_clk)) {
+   ret = PTR_ERR(mdata->parent_clk);
+   dev_err(&pdev->dev, "failed to get parent-clk: %d\n", ret);
+   goto err_put_master;
+   }
+
+   mdata->sel_clk = devm_clk_get(&pdev->dev, "sel-clk");
+   if (IS_ERR(mdata->sel_clk)) {
ret = PTR_ERR(mdata->spi_clk);
-   dev_err(&pdev->dev, "failed to get spi-clk: %d\n", ret);
+   dev_err(&pdev->dev, "failed to get sel-clk: %d\n", ret);
goto err_put_master;
}
 
-   mdata->parent_clk = devm_clk_get(&pdev->dev, "parent-clk");
-   if (IS_ERR(mdata->parent_clk)) {
+   mdata->spi_clk = devm_clk_get(&pdev->dev, "spi-clk");
+   if (IS_ERR(mdata->spi_clk)) {
ret = PTR_ERR(mdata->parent_clk);
-   dev_err(&pdev->dev, "failed to get parent-clk: %d\n", ret);
+   dev_err(&pdev->dev, "failed to get spi-clk: %d\n", ret);
goto err_put_master;
}
 
@@ -596,7 +603,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
goto err_put_master;
}
 
-   ret = clk_set_parent(mdata->spi_clk, mdata->parent_clk);
+   ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret);
goto err_disable_clk;
-- 
1.8.1.1.dirty

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[PATCH 1/3] spi: mediatek: remove clk_disable_unprepare()

[Leilk Liu]

This patch removes clk_disable_unprepare() in mtk_spi_remove().
clk_disable_prepare/unprepare must be balance, spi-clk is disabled
in mtk_spi_probe, so not needs to disable again.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index d882261..3a177d0 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -630,7 +630,6 @@ static int mtk_spi_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
 
mtk_spi_reset(mdata);
-   clk_disable_unprepare(mdata->spi_clk);
spi_master_put(master);
 
return 0;
-- 
1.8.1.1.dirty

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[PATCH 3/3] spi: Mediatek: Document devicetree bindings update for spi bus

[Leilk Liu]

This patch updates spi bindings, fixs clock usage description.

Signed-off-by: Leilk Liu 
---
 Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
index dcefc43..6160ffb 100644
--- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -15,17 +15,18 @@ Required properties:
 - interrupts: Should contain spi interrupt
 
 - clocks: phandles to input clocks.
-  The first should be <&topckgen CLK_TOP_SPI_SEL>.
-  The second should be one of the following.
+  The first should be one of the following. It's PLL.
-  <&clk26m>: specify parent clock 26MHZ.
-  <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
  It's the default one.
-  <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ.
-  <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
-  <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+  The second should be <&topckgen CLK_TOP_SPI_SEL>. It's clock mux.
+  The third is <&pericfg CLK_PERI_SPI0>. It's clock gate.
 
-- clock-names: shall be "spi-clk" for the controller clock, and
-  "parent-clk" for the parent clock.
+- clock-names: shall be "parent-clk" for the parent clock, "sel-clk" for the
+  muxes clock, and "spi-clk" for the clock gate.
 
 Optional properties:
 - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
@@ -44,8 +45,11 @@ spi: spi@1100a000 {
#size-cells = <0>;
reg = <0 0x1100a000 0 0x1000>;
interrupts = ;
-   clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
-   clock-names = "spi-clk", "parent-clk";
+   clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+<&topckgen CLK_TOP_SPI_SEL>,
+<&pericfg CLK_PERI_SPI0>;
+   clock-names = "parent-clk", "sel-clk", "spi-clk";
+
mediatek,pad-select = <0>;
status = "disabled";
 };
-- 
1.8.1.1.dirty

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[PATCH 0/3] Fix Mediatek SPI bus driver clock usage error

[Leilk Liu]

From: Leilk Liu 

This series are based on 4.2-rc1 and provide three patches
to fix mediatek spi driver clock usage error.

spi clock manages flow:
  CLK_TOP_SYSPLL3_D2 ---> CLK_TOP_SPI_SEL ---> CLK_PERI_SPI0
(source clock)   (clock mux)   (clock gate)
spi driver should choose source clock by clock mux, then enable clock gate.

Leilk Liu (3):
  spi: mediatek: remove clk_disable_unprepare()
  spi: mediatek: fix spi clock usage error
  spi: Mediatek: Document devicetree bindings update for spi bus

 .../devicetree/bindings/spi/spi-mt65xx.txt | 16 +--
 drivers/spi/spi-mt65xx.c   | 24 ++
 2 files changed, 25 insertions(+), 15 deletions(-)

--
1.8.1.1.dirty

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[PATCH] spi: mediatek: fix SPI_CMD_PAUSE_IE macro error

[Leilk Liu]

enable pause interrupt should use SPI_CMD_PAUSE_IE MACRO,
so fix it.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index eaadc7e..d882261 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -158,7 +158,7 @@ static void mtk_spi_config(struct mtk_spi *mdata,
 #endif
 
/* set finish and pause interrupt always enable */
-   reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_EN;
+   reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
 
/* disable dma mode */
reg_val &= ~(SPI_CMD_TX_DMA | SPI_CMD_RX_DMA);
-- 
1.8.1.1.dirty

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[PATCH v3 1/4] spi: mediatek: add linux/io.h include file

[Leilk Liu]

mediatek spi driver uses readl/writel, so add linux/io.h,
even so it's implicitly imported by spi/spi.h

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 43c1dd5..fe4eda3 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
-- 
1.8.1.1.dirty

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[PATCH v3 2/4] spi: mediatek: replace int with u32, delete TAB and define MTK_SPI_PAUSE_INT_STATUS marco

[Leilk Liu]

this patch replaces int with u32, deletes TAB, and defines
MTK_SPI_PAUSE_INT_STATUS marco.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index fe4eda3..f81618c 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -67,6 +67,8 @@
 
 #define MT8173_SPI_MAX_PAD_SEL 3
 
+#define MTK_SPI_PAUSE_INT_STATUS 0x2
+
 #define MTK_SPI_IDLE 0
 #define MTK_SPI_PAUSED 1
 
@@ -179,7 +181,7 @@ static int mtk_spi_prepare_hardware(struct spi_master 
*master)
 
trans = list_first_entry(&msg->transfers, struct spi_transfer,
 transfer_list);
-   if (trans->cs_change == 0) {
+   if (!trans->cs_change) {
mdata->state = MTK_SPI_IDLE;
mtk_spi_reset(mdata);
}
@@ -269,11 +271,11 @@ static void mtk_spi_setup_packet(struct spi_master 
*master)
u32 packet_size, packet_loop, reg_val;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
-   packet_size = min_t(unsigned, mdata->xfer_len, MTK_SPI_PACKET_SIZE);
+   packet_size = min_t(u32, mdata->xfer_len, MTK_SPI_PACKET_SIZE);
packet_loop = mdata->xfer_len / packet_size;
 
reg_val = readl(mdata->base + SPI_CFG1_REG);
-   reg_val &= ~(SPI_CFG1_PACKET_LENGTH_MASK + SPI_CFG1_PACKET_LOOP_MASK);
+   reg_val &= ~(SPI_CFG1_PACKET_LENGTH_MASK | SPI_CFG1_PACKET_LOOP_MASK);
reg_val |= (packet_size - 1) << SPI_CFG1_PACKET_LENGTH_OFFSET;
reg_val |= (packet_loop - 1) << SPI_CFG1_PACKET_LOOP_OFFSET;
writel(reg_val, mdata->base + SPI_CFG1_REG);
@@ -281,7 +283,7 @@ static void mtk_spi_setup_packet(struct spi_master *master)
 
 static void mtk_spi_enable_transfer(struct spi_master *master)
 {
-   int cmd;
+   u32 cmd;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
cmd = readl(mdata->base + SPI_CMD_REG);
@@ -292,9 +294,9 @@ static void mtk_spi_enable_transfer(struct spi_master 
*master)
writel(cmd, mdata->base + SPI_CMD_REG);
 }
 
-static int mtk_spi_get_mult_delta(int xfer_len)
+static int mtk_spi_get_mult_delta(u32 xfer_len)
 {
-   int mult_delta;
+   u32 mult_delta;
 
if (xfer_len > MTK_SPI_PACKET_SIZE)
mult_delta = xfer_len % MTK_SPI_PACKET_SIZE;
@@ -435,7 +437,7 @@ static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
struct spi_transfer *trans = mdata->cur_transfer;
 
reg_val = readl(mdata->base + SPI_STATUS0_REG);
-   if (reg_val & 0x2)
+   if (reg_val & MTK_SPI_PAUSE_INT_STATUS)
mdata->state = MTK_SPI_PAUSED;
else
mdata->state = MTK_SPI_IDLE;
@@ -498,7 +500,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
struct mtk_spi *mdata;
const struct of_device_id *of_id;
struct resource *res;
-   int irq, ret;
+   int irq, ret;
 
master = spi_alloc_master(&pdev->dev, sizeof(*mdata));
if (!master) {
-- 
1.8.1.1.dirty

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[PATCH v3 4/4] spi: mediatek: replace *_time name

[Leilk Liu]

This patch replaces *_time name in mtk_spi_prepare_transfer().

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 20 
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index e14f583..eaadc7e 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -238,8 +238,7 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool 
enable)
 static void mtk_spi_prepare_transfer(struct spi_master *master,
 struct spi_transfer *xfer)
 {
-   u32 spi_clk_hz, div, high_time, low_time, holdtime,
-   setuptime, cs_idletime, reg_val = 0;
+   u32 spi_clk_hz, div, sck_time, cs_time, reg_val = 0;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
spi_clk_hz = clk_get_rate(mdata->spi_clk);
@@ -248,21 +247,18 @@ static void mtk_spi_prepare_transfer(struct spi_master 
*master,
else
div = 1;
 
-   high_time = (div + 1) / 2;
-   low_time = (div + 1) / 2;
-   holdtime = (div + 1) / 2 * 2;
-   setuptime = (div + 1) / 2 * 2;
-   cs_idletime = (div + 1) / 2 * 2;
+   sck_time = (div + 1) / 2;
+   cs_time = sck_time * 2;
 
-   reg_val |= (((high_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
-   reg_val |= (((low_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
-   reg_val |= (((holdtime - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
-   reg_val |= (((setuptime - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
+   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
writel(reg_val, mdata->base + SPI_CFG0_REG);
 
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
-   reg_val |= (((cs_idletime - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);
writel(reg_val, mdata->base + SPI_CFG1_REG);
 }
 
-- 
1.8.1.1.dirty

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[PATCH v3 3/4] spi: mediatek: add PM clk_prepare_enable fail flow

[Leilk Liu]

This patch adds PM clk_prepare_enable fail flow.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index f81618c..e14f583 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -665,8 +665,10 @@ static int mtk_spi_resume(struct device *dev)
 
if (!pm_runtime_suspended(dev)) {
ret = clk_prepare_enable(mdata->spi_clk);
-   if (ret < 0)
+   if (ret < 0) {
+   dev_err(dev, "failed to enable spi_clk (%d)\n", ret);
return ret;
+   }
}
 
ret = spi_master_resume(master);
@@ -692,8 +694,15 @@ static int mtk_spi_runtime_resume(struct device *dev)
 {
struct spi_master *master = dev_get_drvdata(dev);
struct mtk_spi *mdata = spi_master_get_devdata(master);
+   int ret;
+
+   ret = clk_prepare_enable(mdata->spi_clk);
+   if (ret < 0) {
+   dev_err(dev, "failed to enable spi_clk (%d)\n", ret);
+   return ret;
+   }
 
-   return clk_prepare_enable(mdata->spi_clk);
+   return 0;
 }
 #endif /* CONFIG_PM */
 
-- 
1.8.1.1.dirty

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[PATCHi v3 0/4] Fixup mediatek spi driver

[Leilk Liu]

From: Leilk Liu 

This series are based on 4.2-rc1 and provide four patches to fix mediatek spi 
driver.

Change in v3:
1. The follow patches are applied, so remove them from series:
  - spi: mediatek: fix spi incorrect endian usage
  - spi: medaitek: revise quirks compatibility style
  - spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSET
2. The patch "spi: mediatek: revise coding style" title is not clear, so split 
it to four patches.

Change in v2:
1. The patch "spi: mediatek: remove redundant clock in 
prepare_hardware/unprepare_hardware" 
   is applied, so remove it from series.
2. fix incorrect endian usage to support little-endian and big-endian system.
3. revise quirks style to bool.
4. use BIT() to instead of SPI_CMD_*_OFFSET.
5. revise coding style, such as time name, and variable type. 

Leilk Liu (4):
  spi: mediatek: add linux/io.h include file
  spi: mediatek: replace int with u32, delete TAB and define
MTK_SPI_PAUSE_INT_STATUS marco
  spi: mediatek: add PM clk_prepare_enable fail flow
  spi: mediatek: replace *_time name

 drivers/spi/spi-mt65xx.c | 52 
 1 file changed, 30 insertions(+), 22 deletions(-)

--
1.8.1.1.dirty

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[PATCH v2 3/4] spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSET

[Leilk Liu]

This patch removes SPI_CMD_*_OFFSET defines, and uses the BIT(x)
defines instead.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 37 -
 1 file changed, 20 insertions(+), 17 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 4fa4332..43c1dd5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -48,15 +48,8 @@
 #define SPI_CFG1_PACKET_LOOP_MASK 0xff00
 #define SPI_CFG1_PACKET_LENGTH_MASK   0x3ff
 
-#define SPI_CMD_ACT_OFFSET0
-#define SPI_CMD_RESUME_OFFSET 1
-#define SPI_CMD_CPHA_OFFSET   8
-#define SPI_CMD_CPOL_OFFSET   9
-#define SPI_CMD_TXMSBF_OFFSET 12
-#define SPI_CMD_RXMSBF_OFFSET 13
-#define SPI_CMD_RX_ENDIAN_OFFSET  14
-#define SPI_CMD_TX_ENDIAN_OFFSET  15
-
+#define SPI_CMD_ACT  BIT(0)
+#define SPI_CMD_RESUME   BIT(1)
 #define SPI_CMD_RST  BIT(2)
 #define SPI_CMD_PAUSE_EN BIT(4)
 #define SPI_CMD_DEASSERT BIT(5)
@@ -143,9 +136,14 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val = readl(mdata->base + SPI_CMD_REG);
 
/* set the mlsbx and mlsbtx */
-   reg_val &= ~(SPI_CMD_TXMSBF | SPI_CMD_RXMSBF);
-   reg_val |= (chip_config->tx_mlsb << SPI_CMD_TXMSBF_OFFSET);
-   reg_val |= (chip_config->rx_mlsb << SPI_CMD_RXMSBF_OFFSET);
+   if (chip_config->tx_mlsb)
+   reg_val |= SPI_CMD_TXMSBF;
+   else
+   reg_val &= ~SPI_CMD_TXMSBF;
+   if (chip_config->rx_mlsb)
+   reg_val |= SPI_CMD_RXMSBF;
+   else
+   reg_val &= ~SPI_CMD_RXMSBF;
 
/* set the tx/rx endian */
 #ifdef __LITTLE_ENDIAN
@@ -201,9 +199,14 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
cpol = spi->mode & SPI_CPOL ? 1 : 0;
 
reg_val = readl(mdata->base + SPI_CMD_REG);
-   reg_val &= ~(SPI_CMD_CPHA | SPI_CMD_CPOL);
-   reg_val |= (cpha << SPI_CMD_CPHA_OFFSET);
-   reg_val |= (cpol << SPI_CMD_CPOL_OFFSET);
+   if (cpha)
+   reg_val |= SPI_CMD_CPHA;
+   else
+   reg_val &= ~SPI_CMD_CPHA;
+   if (cpol)
+   reg_val |= SPI_CMD_CPOL;
+   else
+   reg_val &= ~SPI_CMD_CPOL;
writel(reg_val, mdata->base + SPI_CMD_REG);
 
chip_config = spi->controller_data;
@@ -282,9 +285,9 @@ static void mtk_spi_enable_transfer(struct spi_master 
*master)
 
cmd = readl(mdata->base + SPI_CMD_REG);
if (mdata->state == MTK_SPI_IDLE)
-   cmd |= 1 << SPI_CMD_ACT_OFFSET;
+   cmd |= SPI_CMD_ACT;
else
-   cmd |= 1 << SPI_CMD_RESUME_OFFSET;
+   cmd |= SPI_CMD_RESUME;
writel(cmd, mdata->base + SPI_CMD_REG);
 }
 
-- 
1.8.1.1.dirty

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[PATCH v2 2/4] spi: medaitek: revise quirks compatibility style

[Leilk Liu]

The quirks are true/false, so define these as bool.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 25 +++--
 1 file changed, 7 insertions(+), 18 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 79286c8..4fa4332 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -71,10 +71,6 @@
 #define SPI_CMD_FINISH_IEBIT(16)
 #define SPI_CMD_PAUSE_IE BIT(17)
 
-#define MTK_SPI_QUIRK_PAD_SELECT 1
-/* Must explicitly send dummy Tx bytes to do Rx only transfer */
-#define MTK_SPI_QUIRK_MUST_TX 1
-
 #define MT8173_SPI_MAX_PAD_SEL 3
 
 #define MTK_SPI_IDLE 0
@@ -84,8 +80,9 @@
 #define MTK_SPI_PACKET_SIZE 1024
 
 struct mtk_spi_compatible {
-   u32 need_pad_sel;
-   u32 must_tx;
+   bool need_pad_sel;
+   /* Must explicitly send dummy Tx bytes to do Rx only transfer */
+   bool must_tx;
 };
 
 struct mtk_spi {
@@ -100,19 +97,11 @@ struct mtk_spi {
const struct mtk_spi_compatible *dev_comp;
 };
 
-static const struct mtk_spi_compatible mt6589_compat = {
-   .need_pad_sel = 0,
-   .must_tx = 0,
-};
-
-static const struct mtk_spi_compatible mt8135_compat = {
-   .need_pad_sel = 0,
-   .must_tx = 0,
-};
-
+static const struct mtk_spi_compatible mt6589_compat;
+static const struct mtk_spi_compatible mt8135_compat;
 static const struct mtk_spi_compatible mt8173_compat = {
-   .need_pad_sel = MTK_SPI_QUIRK_PAD_SELECT,
-   .must_tx = MTK_SPI_QUIRK_MUST_TX,
+   .need_pad_sel = true,
+   .must_tx = true,
 };
 
 /*
-- 
1.8.1.1.dirty

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[PATCH v2 4/4] spi: mediatek: revise coding style

[Leilk Liu]

This patch revises littery coding style according to comments.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 52 
 1 file changed, 30 insertions(+), 22 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 43c1dd5..eaadc7e 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -66,6 +67,8 @@
 
 #define MT8173_SPI_MAX_PAD_SEL 3
 
+#define MTK_SPI_PAUSE_INT_STATUS 0x2
+
 #define MTK_SPI_IDLE 0
 #define MTK_SPI_PAUSED 1
 
@@ -178,7 +181,7 @@ static int mtk_spi_prepare_hardware(struct spi_master 
*master)
 
trans = list_first_entry(&msg->transfers, struct spi_transfer,
 transfer_list);
-   if (trans->cs_change == 0) {
+   if (!trans->cs_change) {
mdata->state = MTK_SPI_IDLE;
mtk_spi_reset(mdata);
}
@@ -235,8 +238,7 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool 
enable)
 static void mtk_spi_prepare_transfer(struct spi_master *master,
 struct spi_transfer *xfer)
 {
-   u32 spi_clk_hz, div, high_time, low_time, holdtime,
-   setuptime, cs_idletime, reg_val = 0;
+   u32 spi_clk_hz, div, sck_time, cs_time, reg_val = 0;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
spi_clk_hz = clk_get_rate(mdata->spi_clk);
@@ -245,21 +247,18 @@ static void mtk_spi_prepare_transfer(struct spi_master 
*master,
else
div = 1;
 
-   high_time = (div + 1) / 2;
-   low_time = (div + 1) / 2;
-   holdtime = (div + 1) / 2 * 2;
-   setuptime = (div + 1) / 2 * 2;
-   cs_idletime = (div + 1) / 2 * 2;
+   sck_time = (div + 1) / 2;
+   cs_time = sck_time * 2;
 
-   reg_val |= (((high_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
-   reg_val |= (((low_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
-   reg_val |= (((holdtime - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
-   reg_val |= (((setuptime - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
+   reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
writel(reg_val, mdata->base + SPI_CFG0_REG);
 
reg_val = readl(mdata->base + SPI_CFG1_REG);
reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
-   reg_val |= (((cs_idletime - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);
+   reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);
writel(reg_val, mdata->base + SPI_CFG1_REG);
 }
 
@@ -268,11 +267,11 @@ static void mtk_spi_setup_packet(struct spi_master 
*master)
u32 packet_size, packet_loop, reg_val;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
-   packet_size = min_t(unsigned, mdata->xfer_len, MTK_SPI_PACKET_SIZE);
+   packet_size = min_t(u32, mdata->xfer_len, MTK_SPI_PACKET_SIZE);
packet_loop = mdata->xfer_len / packet_size;
 
reg_val = readl(mdata->base + SPI_CFG1_REG);
-   reg_val &= ~(SPI_CFG1_PACKET_LENGTH_MASK + SPI_CFG1_PACKET_LOOP_MASK);
+   reg_val &= ~(SPI_CFG1_PACKET_LENGTH_MASK | SPI_CFG1_PACKET_LOOP_MASK);
reg_val |= (packet_size - 1) << SPI_CFG1_PACKET_LENGTH_OFFSET;
reg_val |= (packet_loop - 1) << SPI_CFG1_PACKET_LOOP_OFFSET;
writel(reg_val, mdata->base + SPI_CFG1_REG);
@@ -280,7 +279,7 @@ static void mtk_spi_setup_packet(struct spi_master *master)
 
 static void mtk_spi_enable_transfer(struct spi_master *master)
 {
-   int cmd;
+   u32 cmd;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
cmd = readl(mdata->base + SPI_CMD_REG);
@@ -291,9 +290,9 @@ static void mtk_spi_enable_transfer(struct spi_master 
*master)
writel(cmd, mdata->base + SPI_CMD_REG);
 }
 
-static int mtk_spi_get_mult_delta(int xfer_len)
+static int mtk_spi_get_mult_delta(u32 xfer_len)
 {
-   int mult_delta;
+   u32 mult_delta;
 
if (xfer_len > MTK_SPI_PACKET_SIZE)
mult_delta = xfer_len % MTK_SPI_PACKET_SIZE;
@@ -434,7 +433,7 @@ static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
struct spi_transfer *trans = mdata->cur_transfer;
 
reg_val = readl(mdata->base + SPI_STATUS0_REG);
-   if (reg_val & 0x2)
+   if (reg_val & MTK_SPI_PAUSE_INT_STATUS)
mdata->state = MTK_SPI_PAUSED;
else
mdata->state = MTK_SPI_IDLE;
@@ -497,7 +496,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
struct mtk_spi *mdata;

[PATCH v2 1/4] spi: mediatek: fix spi incorrect endian usage

[Leilk Liu]

TX_ENDIAN/RX_ENDIAN bits define whether to reverse the endian
order of the data DMA from/to memory. The endian order should
keep the same with cpu endian.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 38 ++--
 include/linux/platform_data/spi-mt65xx.h |  2 --
 2 files changed, 16 insertions(+), 24 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 321b820..79286c8 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -122,8 +122,6 @@ static const struct mtk_spi_compatible mt8173_compat = {
 static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
-   .tx_endian = 0,
-   .rx_endian = 0,
 };
 
 static const struct of_device_id mtk_spi_of_match[] = {
@@ -161,9 +159,13 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val |= (chip_config->rx_mlsb << SPI_CMD_RXMSBF_OFFSET);
 
/* set the tx/rx endian */
-   reg_val &= ~(SPI_CMD_TX_ENDIAN | SPI_CMD_RX_ENDIAN);
-   reg_val |= (chip_config->tx_endian << SPI_CMD_TX_ENDIAN_OFFSET);
-   reg_val |= (chip_config->rx_endian << SPI_CMD_RX_ENDIAN_OFFSET);
+#ifdef __LITTLE_ENDIAN
+   reg_val &= ~SPI_CMD_TX_ENDIAN;
+   reg_val &= ~SPI_CMD_RX_ENDIAN;
+#else
+   reg_val |= SPI_CMD_TX_ENDIAN;
+   reg_val |= SPI_CMD_RX_ENDIAN;
+#endif
 
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_EN;
@@ -352,7 +354,7 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
 struct spi_device *spi,
 struct spi_transfer *xfer)
 {
-   int cnt, i;
+   int cnt;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
mdata->cur_transfer = xfer;
@@ -364,10 +366,7 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
cnt = xfer->len / 4 + 1;
else
cnt = xfer->len / 4;
-
-   for (i = 0; i < cnt; i++)
-   writel(*((u32 *)xfer->tx_buf + i),
-  mdata->base + SPI_TX_DATA_REG);
+   iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
 
mtk_spi_enable_transfer(master);
 
@@ -437,7 +436,7 @@ static bool mtk_spi_can_dma(struct spi_master *master,
 
 static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
 {
-   u32 cmd, reg_val, i;
+   u32 cmd, reg_val, cnt;
struct spi_master *master = dev_id;
struct mtk_spi *mdata = spi_master_get_devdata(master);
struct spi_transfer *trans = mdata->cur_transfer;
@@ -449,18 +448,13 @@ static irqreturn_t mtk_spi_interrupt(int irq, void 
*dev_id)
mdata->state = MTK_SPI_IDLE;
 
if (!master->can_dma(master, master->cur_msg->spi, trans)) {
-   /* xfer len is not N*4 bytes every time in a transfer,
-* but SPI_RX_DATA_REG must reads 4 bytes once,
-* so rx buffer byte by byte.
-*/
if (trans->rx_buf) {
-   for (i = 0; i < mdata->xfer_len; i++) {
-   if (i % 4 == 0)
-   reg_val =
-   readl(mdata->base + SPI_RX_DATA_REG);
-   *((u8 *)(trans->rx_buf + i)) =
-   (reg_val >> ((i % 4) * 8)) & 0xff;
-   }
+   if (mdata->xfer_len % 4)
+   cnt = mdata->xfer_len / 4 + 1;
+   else
+   cnt = mdata->xfer_len / 4;
+   ioread32_rep(mdata->base + SPI_RX_DATA_REG,
+trans->rx_buf, cnt);
}
spi_finalize_current_transfer(master);
return IRQ_HANDLED;
diff --git a/include/linux/platform_data/spi-mt65xx.h 
b/include/linux/platform_data/spi-mt65xx.h
index 7512255..54b0448 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,7 +16,5 @@
 struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
-   u32 tx_endian;
-   u32 rx_endian;
 };
 #endif
-- 
1.8.1.1.dirty

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[PATCH v2 0/4] Fixup mediatek spi driver

[Leilk Liu]

This series are based on 4.2-rc1 and provide four patches to fix mediatek spi 
driver.

Change in v2:
1. The patch "spi: mediatek: remove redundant clock in 
prepare_hardware/unprepare_hardware" 
   is applied, so remove it from series.
2. fix incorrect endian usage to support little-endian and big-endian system.
3. revise quirks style to bool.
4. use BIT() to instead of SPI_CMD_*_OFFSET.
5. revise coding style, such as time name, and variable type. 

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[PATCH 0/3] Fixup mediatek spi driver

[Leilk Liu]

Change in this patch:
1. revise coding styles.
2. delete redundant clock in prepare/unprepare_hardware.
3. fix incorrect endian usage on big-endian system.

Leilk Liu (3):
  spi: mediatek: revise coding style
  spi: mediatek: remove redundant clock in
prepare_hardware/unprepare_hardware
  spi: mediatek: fix spi incorrect endian usage

 drivers/spi/spi-mt65xx.c | 169 +--
 include/linux/platform_data/spi-mt65xx.h |   2 -
 2 files changed, 73 insertions(+), 98 deletions(-)

--
1.8.1.1.dirty

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[PATCH 3/3] spi: mediatek: fix spi incorrect endian usage

[Leilk Liu]

TX_ENDIAN/RX_ENDIAN bits define whether to reverse the endian
order of the data DMA from/to memory. The endian order should
keep the same with cpu endian.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 43 
 include/linux/platform_data/spi-mt65xx.h |  2 --
 2 files changed, 16 insertions(+), 29 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 1c2b215..eaadc7e 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -107,8 +107,6 @@ static const struct mtk_spi_compatible mt8173_compat = {
 static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
-   .tx_endian = 0,
-   .rx_endian = 0,
 };
 
 static const struct of_device_id mtk_spi_of_match[] = {
@@ -151,14 +149,13 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val &= ~SPI_CMD_RXMSBF;
 
/* set the tx/rx endian */
-   if (chip_config->tx_endian)
-   reg_val |= SPI_CMD_TX_ENDIAN;
-   else
-   reg_val &= ~SPI_CMD_TX_ENDIAN;
-   if (chip_config->rx_endian)
-   reg_val |= SPI_CMD_RX_ENDIAN;
-   else
-   reg_val &= ~SPI_CMD_RX_ENDIAN;
+#ifdef __LITTLE_ENDIAN
+   reg_val &= ~SPI_CMD_TX_ENDIAN;
+   reg_val &= ~SPI_CMD_RX_ENDIAN;
+#else
+   reg_val |= SPI_CMD_TX_ENDIAN;
+   reg_val |= SPI_CMD_RX_ENDIAN;
+#endif
 
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_EN;
@@ -348,7 +345,7 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
 struct spi_device *spi,
 struct spi_transfer *xfer)
 {
-   int cnt, i;
+   int cnt;
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
mdata->cur_transfer = xfer;
@@ -360,10 +357,7 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
cnt = xfer->len / 4 + 1;
else
cnt = xfer->len / 4;
-
-   for (i = 0; i < cnt; i++)
-   writel(*((u32 *)xfer->tx_buf + i),
-  mdata->base + SPI_TX_DATA_REG);
+   iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
 
mtk_spi_enable_transfer(master);
 
@@ -433,7 +427,7 @@ static bool mtk_spi_can_dma(struct spi_master *master,
 
 static irqreturn_t mtk_spi_interrupt(int irq, void *dev_id)
 {
-   u32 cmd, reg_val, i;
+   u32 cmd, reg_val, cnt;
struct spi_master *master = dev_id;
struct mtk_spi *mdata = spi_master_get_devdata(master);
struct spi_transfer *trans = mdata->cur_transfer;
@@ -445,18 +439,13 @@ static irqreturn_t mtk_spi_interrupt(int irq, void 
*dev_id)
mdata->state = MTK_SPI_IDLE;
 
if (!master->can_dma(master, master->cur_msg->spi, trans)) {
-   /* xfer len is not N*4 bytes every time in a transfer,
-* but SPI_RX_DATA_REG must reads 4 bytes once,
-* so rx buffer byte by byte.
-*/
if (trans->rx_buf) {
-   for (i = 0; i < mdata->xfer_len; i++) {
-   if (i % 4 == 0)
-   reg_val =
-   readl(mdata->base + SPI_RX_DATA_REG);
-   *((u8 *)(trans->rx_buf + i)) =
-   (reg_val >> ((i % 4) * 8)) & 0xff;
-   }
+   if (mdata->xfer_len % 4)
+   cnt = mdata->xfer_len / 4 + 1;
+   else
+   cnt = mdata->xfer_len / 4;
+   ioread32_rep(mdata->base + SPI_RX_DATA_REG,
+trans->rx_buf, cnt);
}
spi_finalize_current_transfer(master);
return IRQ_HANDLED;
diff --git a/include/linux/platform_data/spi-mt65xx.h 
b/include/linux/platform_data/spi-mt65xx.h
index 7512255..54b0448 100644
--- a/include/linux/platform_data/spi-mt65xx.h
+++ b/include/linux/platform_data/spi-mt65xx.h
@@ -16,7 +16,5 @@
 struct mtk_chip_config {
u32 tx_mlsb;
u32 rx_mlsb;
-   u32 tx_endian;
-   u32 rx_endian;
 };
 #endif
-- 
1.8.1.1.dirty

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[PATCH 2/3] spi: mediatek: remove redundant clock in prepare_hardware/unprepare_hardware

[Leilk Liu]

clock in prepare_hardware/unprepare_hardware is redundant
with pm_runtime, so remove them.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 17 -
 1 file changed, 17 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 814bca4..1c2b215 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -181,13 +181,6 @@ static int mtk_spi_prepare_hardware(struct spi_master 
*master)
struct spi_transfer *trans;
struct mtk_spi *mdata = spi_master_get_devdata(master);
struct spi_message *msg = master->cur_msg;
-   int ret;
-
-   ret = clk_prepare_enable(mdata->spi_clk);
-   if (ret < 0) {
-   dev_err(&master->dev, "failed to enable clock (%d)\n", ret);
-   return ret;
-   }
 
trans = list_first_entry(&msg->transfers, struct spi_transfer,
 transfer_list);
@@ -196,15 +189,6 @@ static int mtk_spi_prepare_hardware(struct spi_master 
*master)
mtk_spi_reset(mdata);
}
 
-   return ret;
-}
-
-static int mtk_spi_unprepare_hardware(struct spi_master *master)
-{
-   struct mtk_spi *mdata = spi_master_get_devdata(master);
-
-   clk_disable_unprepare(mdata->spi_clk);
-
return 0;
 }
 
@@ -537,7 +521,6 @@ static int mtk_spi_probe(struct platform_device *pdev)
 
master->set_cs = mtk_spi_set_cs;
master->prepare_transfer_hardware = mtk_spi_prepare_hardware;
-   master->unprepare_transfer_hardware = mtk_spi_unprepare_hardware;
master->prepare_message = mtk_spi_prepare_message;
master->transfer_one = mtk_spi_transfer_one;
master->can_dma = mtk_spi_can_dma;
-- 
1.8.1.1.dirty

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[PATCH 1/3] spi: mediatek: revise coding style

[Leilk Liu]

This patch revises mediatek spi driver coding styles.

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 125 ---
 1 file changed, 65 insertions(+), 60 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index c467ce0..814bca4 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -48,15 +49,8 @@
 #define SPI_CFG1_PACKET_LOOP_MASK 0xff00
 #define SPI_CFG1_PACKET_LENGTH_MASK   0x3ff
 
-#define SPI_CMD_ACT_OFFSET0
-#define SPI_CMD_RESUME_OFFSET 1
-#define SPI_CMD_CPHA_OFFSET   8
-#define SPI_CMD_CPOL_OFFSET   9
-#define SPI_CMD_TXMSBF_OFFSET 12
-#define SPI_CMD_RXMSBF_OFFSET 13
-#define SPI_CMD_RX_ENDIAN_OFFSET  14
-#define SPI_CMD_TX_ENDIAN_OFFSET  15
-
+#define SPI_CMD_ACT  BIT(0)
+#define SPI_CMD_RESUME   BIT(1)
 #define SPI_CMD_RST  BIT(2)
 #define SPI_CMD_PAUSE_EN BIT(4)
 #define SPI_CMD_DEASSERT BIT(5)
@@ -71,12 +65,10 @@
 #define SPI_CMD_FINISH_IEBIT(16)
 #define SPI_CMD_PAUSE_IE BIT(17)
 
-#define MTK_SPI_QUIRK_PAD_SELECT 1
-/* Must explicitly send dummy Tx bytes to do Rx only transfer */
-#define MTK_SPI_QUIRK_MUST_TX 1
-
 #define MT8173_SPI_MAX_PAD_SEL 3
 
+#define MTK_SPI_PAUSE_INT_STATUS 0x2
+
 #define MTK_SPI_IDLE 0
 #define MTK_SPI_PAUSED 1
 
@@ -84,8 +76,9 @@
 #define MTK_SPI_PACKET_SIZE 1024
 
 struct mtk_spi_compatible {
-   u32 need_pad_sel;
-   u32 must_tx;
+   bool need_pad_sel;
+   /* Must explicitly send dummy Tx bytes to do Rx only transfer */
+   bool must_tx;
 };
 
 struct mtk_spi {
@@ -100,19 +93,11 @@ struct mtk_spi {
const struct mtk_spi_compatible *dev_comp;
 };
 
-static const struct mtk_spi_compatible mt6589_compat = {
-   .need_pad_sel = 0,
-   .must_tx = 0,
-};
-
-static const struct mtk_spi_compatible mt8135_compat = {
-   .need_pad_sel = 0,
-   .must_tx = 0,
-};
-
+static const struct mtk_spi_compatible mt6589_compat;
+static const struct mtk_spi_compatible mt8135_compat;
 static const struct mtk_spi_compatible mt8173_compat = {
-   .need_pad_sel = MTK_SPI_QUIRK_PAD_SELECT,
-   .must_tx = MTK_SPI_QUIRK_MUST_TX,
+   .need_pad_sel = true,
+   .must_tx = true,
 };
 
 /*
@@ -156,14 +141,24 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val = readl(mdata->base + SPI_CMD_REG);
 
/* set the mlsbx and mlsbtx */
-   reg_val &= ~(SPI_CMD_TXMSBF | SPI_CMD_RXMSBF);
-   reg_val |= (chip_config->tx_mlsb << SPI_CMD_TXMSBF_OFFSET);
-   reg_val |= (chip_config->rx_mlsb << SPI_CMD_RXMSBF_OFFSET);
+   if (chip_config->tx_mlsb)
+   reg_val |= SPI_CMD_TXMSBF;
+   else
+   reg_val &= ~SPI_CMD_TXMSBF;
+   if (chip_config->rx_mlsb)
+   reg_val |= SPI_CMD_RXMSBF;
+   else
+   reg_val &= ~SPI_CMD_RXMSBF;
 
/* set the tx/rx endian */
-   reg_val &= ~(SPI_CMD_TX_ENDIAN | SPI_CMD_RX_ENDIAN);
-   reg_val |= (chip_config->tx_endian << SPI_CMD_TX_ENDIAN_OFFSET);
-   reg_val |= (chip_config->rx_endian << SPI_CMD_RX_ENDIAN_OFFSET);
+   if (chip_config->tx_endian)
+   reg_val |= SPI_CMD_TX_ENDIAN;
+   else
+   reg_val &= ~SPI_CMD_TX_ENDIAN;
+   if (chip_config->rx_endian)
+   reg_val |= SPI_CMD_RX_ENDIAN;
+   else
+   reg_val &= ~SPI_CMD_RX_ENDIAN;
 
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_EN;
@@ -196,7 +191,7 @@ static int mtk_spi_prepare_hardware(struct spi_master 
*master)
 
trans = list_first_entry(&msg->transfers, struct spi_transfer,
 transfer_list);
-   if (trans->cs_change == 0) {
+   if (!trans->cs_change) {
mdata->state = MTK_SPI_IDLE;
mtk_spi_reset(mdata);
}
@@ -226,9 +221,14 @@ static int mtk_spi_prepare_message(struct spi_master 
*master,
cpol = spi->mode & SPI_CPOL ? 1 : 0;
 
reg_val = readl(mdata->base + SPI_CMD_REG);
-   reg_val &= ~(SPI_CMD_CPHA | SPI_CMD_CPOL);
-   reg_val |= (cpha << SPI_CMD_CPHA_OFFSET);
-   reg_val |= (cpol << SPI_CMD_CPOL_OFFSET);
+   if (cpha)
+   reg_val |= SPI_CMD_CPHA;
+   else
+   reg_val &= ~SPI_CMD_CPHA;
+   if (cpol)
+   reg_val |= SPI_CMD_CPOL;
+   else
+   reg_val &= ~SPI_CMD_CPOL;
writel(reg_val, mdata->base + SPI_CMD_REG);
 
chip_config = spi->controller_data;
@@ -257,8 +257,7 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool 
enab

[PATCH] spi: mediatek: fix spi incorrect endian usage and remove redundant clock

[Leilk Liu]

This patch fixes incorrect endian usage, removes redundant
clock in prepare_hardware/unprepare_hardware and revises
coding styles.

Signed-off-by: Leilk Liu 

---
Change in this patch:
1. fix incorrect endian usage on big-endian system.
2. delete redundant clock in prepare/unprepare_hardware.
3. revise coding styles.
---
 drivers/spi/spi-mt65xx.c | 163 +--
 include/linux/platform_data/spi-mt65xx.h |   2 -
 2 files changed, 69 insertions(+), 96 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 519f50c..a9da887 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -48,15 +49,8 @@
 #define SPI_CFG1_PACKET_LOOP_MASK 0xff00
 #define SPI_CFG1_PACKET_LENGTH_MASK   0x3ff
 
-#define SPI_CMD_ACT_OFFSET0
-#define SPI_CMD_RESUME_OFFSET 1
-#define SPI_CMD_CPHA_OFFSET   8
-#define SPI_CMD_CPOL_OFFSET   9
-#define SPI_CMD_TXMSBF_OFFSET 12
-#define SPI_CMD_RXMSBF_OFFSET 13
-#define SPI_CMD_RX_ENDIAN_OFFSET  14
-#define SPI_CMD_TX_ENDIAN_OFFSET  15
-
+#define SPI_CMD_ACT  BIT(0)
+#define SPI_CMD_RESUME   BIT(1)
 #define SPI_CMD_RST  BIT(2)
 #define SPI_CMD_PAUSE_EN BIT(4)
 #define SPI_CMD_DEASSERT BIT(5)
@@ -71,12 +65,10 @@
 #define SPI_CMD_FINISH_IEBIT(16)
 #define SPI_CMD_PAUSE_IE BIT(17)
 
-#define MTK_SPI_QUIRK_PAD_SELECT 1
-/* Must explicitly send dummy Tx bytes to do Rx only transfer */
-#define MTK_SPI_QUIRK_MUST_TX 1
-
 #define MT8173_SPI_MAX_PAD_SEL 3
 
+#define MTK_SPI_PAUSE_INT_STATUS 0x2
+
 #define MTK_SPI_IDLE 0
 #define MTK_SPI_PAUSED 1
 
@@ -84,8 +76,9 @@
 #define MTK_SPI_PACKET_SIZE 1024
 
 struct mtk_spi_compatible {
-   u32 need_pad_sel;
-   u32 must_tx;
+   bool need_pad_sel;
+   /* Must explicitly send dummy Tx bytes to do Rx only transfer */
+   bool must_tx;
 };
 
 struct mtk_spi {
@@ -100,19 +93,11 @@ struct mtk_spi {
const struct mtk_spi_compatible *dev_comp;
 };
 
-static const struct mtk_spi_compatible mt6589_compat = {
-   .need_pad_sel = 0,
-   .must_tx = 0,
-};
-
-static const struct mtk_spi_compatible mt8135_compat = {
-   .need_pad_sel = 0,
-   .must_tx = 0,
-};
-
+static const struct mtk_spi_compatible mt6589_compat;
+static const struct mtk_spi_compatible mt8135_compat;
 static const struct mtk_spi_compatible mt8173_compat = {
-   .need_pad_sel = MTK_SPI_QUIRK_PAD_SELECT,
-   .must_tx = MTK_SPI_QUIRK_MUST_TX,
+   .need_pad_sel = true,
+   .must_tx = true,
 };
 
 /*
@@ -122,8 +107,6 @@ static const struct mtk_spi_compatible mt8173_compat = {
 static const struct mtk_chip_config mtk_default_chip_info = {
.rx_mlsb = 1,
.tx_mlsb = 1,
-   .tx_endian = 0,
-   .rx_endian = 0,
 };
 
 static const struct of_device_id mtk_spi_of_match[] = {
@@ -156,14 +139,23 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val = readl(mdata->base + SPI_CMD_REG);
 
/* set the mlsbx and mlsbtx */
-   reg_val &= ~(SPI_CMD_TXMSBF | SPI_CMD_RXMSBF);
-   reg_val |= (chip_config->tx_mlsb << SPI_CMD_TXMSBF_OFFSET);
-   reg_val |= (chip_config->rx_mlsb << SPI_CMD_RXMSBF_OFFSET);
+   if (chip_config->tx_mlsb)
+   reg_val |= SPI_CMD_TXMSBF;
+   else
+   reg_val &= ~SPI_CMD_TXMSBF;
+   if (chip_config->rx_mlsb)
+   reg_val |= SPI_CMD_RXMSBF;
+   else
+   reg_val &= ~SPI_CMD_RXMSBF;
 
/* set the tx/rx endian */
-   reg_val &= ~(SPI_CMD_TX_ENDIAN | SPI_CMD_RX_ENDIAN);
-   reg_val |= (chip_config->tx_endian << SPI_CMD_TX_ENDIAN_OFFSET);
-   reg_val |= (chip_config->rx_endian << SPI_CMD_RX_ENDIAN_OFFSET);
+#ifdef __LITTLE_ENDIAN
+   reg_val &= ~SPI_CMD_TX_ENDIAN;
+   reg_val &= ~SPI_CMD_RX_ENDIAN;
+#else
+   reg_val |= SPI_CMD_TX_ENDIAN;
+   reg_val |= SPI_CMD_RX_ENDIAN;
+#endif
 
/* set finish and pause interrupt always enable */
reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_EN;
@@ -186,30 +178,14 @@ static int mtk_spi_prepare_hardware(struct spi_master 
*master)
struct spi_transfer *trans;
struct mtk_spi *mdata = spi_master_get_devdata(master);
struct spi_message *msg = master->cur_msg;
-   int ret;
-
-   ret = clk_prepare_enable(mdata->spi_clk);
-   if (ret < 0) {
-   dev_err(&master->dev, "failed to enable clock (%d)\n", ret);
-   return ret;
-   }
 
trans = list_first_entry(&msg->transfers, struct spi_transfer,
 transfer_list);
-   if (trans->cs_change == 0) {
+   if (!trans->cs_change) {
 

[PATCH v6] arm64: dts: Add spi bus dts

[Leilk Liu]

This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: Leilk Liu 
---
Change in this patch:
pinctl and pad-select fields are board specific, so move to
mt8173-evb.dtsi, and status = "okay".
---
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++
 arch/arm64/boot/dts/mediatek/mt8173.dtsi| 12 
 2 files changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts 
b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 4be66ca..811cb76 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -387,6 +387,24 @@
};
 };
 
+&pio {
+   spi_pins_a: spi0 {
+   pins_spi {
+   pinmux = ,
+   ,
+   ,
+   ;
+   };
+   };
+};
+
+&spi {
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi_pins_a>;
+   mediatek,pad-select = <0>;
+   status = "okay";
+};
+
 &uart0 {
status = "okay";
 };
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..3dfb6ed 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,18 @@
status = "disabled";
};
 
+   spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&topckgen CLK_TOP_SPI_SEL>,
+<&topckgen CLK_TOP_SYSPLL3_D2>;
+   clock-names = "spi-clk", "parent-clk";
+   status = "disabled";
+   };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
-- 
1.8.1.1.dirty

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[PATCH] spi: Mediatek: fixup cpu_to_le32 incorrect usage

[Leilk Liu]

writel() already does a cpu_to_le32 conversion, so
remove cpu_to_le32().

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index ae645fa..519f50c 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -359,11 +359,9 @@ static void mtk_spi_setup_dma_addr(struct spi_master 
*master,
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
if (mdata->tx_sgl)
-   writel((__force u32)cpu_to_le32(xfer->tx_dma),
-  mdata->base + SPI_TX_SRC_REG);
+   writel(xfer->tx_dma, mdata->base + SPI_TX_SRC_REG);
if (mdata->rx_sgl)
-   writel((__force u32)cpu_to_le32(xfer->rx_dma),
-  mdata->base + SPI_RX_DST_REG);
+   writel(xfer->rx_dma, mdata->base + SPI_RX_DST_REG);
 }
 
 static int mtk_spi_fifo_transfer(struct spi_master *master,
-- 
1.8.1.1.dirty

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[PATCH] spi: Mediatek: fix endian warnings

[Leilk Liu]

This patch fixes endian warnings detected by sparse:
- sparse: incorrect type in argument 1 (different base types)
  expected unsigned int [unsigned] val
  got restricted __le32 [usertype] 
- sparse: incorrect type in argument 1 (different base types)
  expected unsigned int [unsigned] val
  got restricted __le32 [usertype] 

Signed-off-by: Leilk Liu 
---
 drivers/spi/spi-mt65xx.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 4676b01..ae645fa 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -359,9 +359,11 @@ static void mtk_spi_setup_dma_addr(struct spi_master 
*master,
struct mtk_spi *mdata = spi_master_get_devdata(master);
 
if (mdata->tx_sgl)
-   writel(cpu_to_le32(xfer->tx_dma), mdata->base + SPI_TX_SRC_REG);
+   writel((__force u32)cpu_to_le32(xfer->tx_dma),
+  mdata->base + SPI_TX_SRC_REG);
if (mdata->rx_sgl)
-   writel(cpu_to_le32(xfer->rx_dma), mdata->base + SPI_RX_DST_REG);
+   writel((__force u32)cpu_to_le32(xfer->rx_dma),
+  mdata->base + SPI_RX_DST_REG);
 }
 
 static int mtk_spi_fifo_transfer(struct spi_master *master,
-- 
1.8.1.1.dirty

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[PATCH v5 0/3] Add Mediatek SPI bus driver

[Leilk Liu]

This series are based on 4.2-rc1 and provide three patches to add mediatek spi 
driver.

Change in v5:
1. add changelogs in the individual patches.
2. modify clk relevant implement.
3. describe dt-binding document in more detail.

Change in v4:
1. fix Mark Brown review comment.

Change in v3:
1. support fifo mode function.
2. support any non-prime length transfer in dma mode.
3. use interrupt to handle scatterlist.
4. fix review comment.

Change in v2:
1. Remove spi bitbang framwork, use can_dma() and transfer_one().
2. Add PM functions.
3. Fix Mark Brown review comment.

Leilk Liu (3):
  spi: Mediatek: Document devicetree bindings for spi bus
  spi: mediatek: Add spi bus for Mediatek MT8173
  arm64: dts: Add spi bus dts

 .../devicetree/bindings/spi/spi-mt65xx.txt |  51 ++
 arch/arm64/boot/dts/mediatek/mt8173.dtsi   |  23 +
 drivers/spi/Kconfig|   9 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/spi-mt65xx.c   | 749 +
 include/linux/platform_data/spi-mt65xx.h   |  22 +
 6 files changed, 855 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt
 create mode 100644 drivers/spi/spi-mt65xx.c
 create mode 100644 include/linux/platform_data/spi-mt65xx.h

--
1.8.1.1.dirty


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[PATCH v5 1/3] spi: Mediatek: Document devicetree bindings for spi bus

[Leilk Liu]

Signed-off-by: Leilk Liu 
---
Change in this patch:
1. change this patch title.
2. change "MTK SPI device" to "MTK SPI controller".
3. "pad-select" is a vendor property, so change it to "mediatek,pad-select".
4. modify the property of clock and clock name.
5. explain what the pad-select values 0-3 mean.
---
 .../devicetree/bindings/spi/spi-mt65xx.txt | 51 ++
 1 file changed, 51 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
new file mode 100644
index 000..dcefc43
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -0,0 +1,51 @@
+Binding for MTK SPI controller
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt8173-spi: for mt8173 platforms
+- mediatek,mt8135-spi: for mt8135 platforms
+- mediatek,mt6589-spi: for mt6589 platforms
+
+- #address-cells: should be 1.
+
+- #size-cells: should be 0.
+
+- reg: Address and length of the register set for the device
+
+- interrupts: Should contain spi interrupt
+
+- clocks: phandles to input clocks.
+  The first should be <&topckgen CLK_TOP_SPI_SEL>.
+  The second should be one of the following.
+   -  <&clk26m>: specify parent clock 26MHZ.
+   -  <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
+ It's the default one.
+   -  <&topckgen CLK_TOP_SYSPLL4_D2>: specify parent clock 78MHZ.
+   -  <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
+   -  <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
+
+- clock-names: shall be "spi-clk" for the controller clock, and
+  "parent-clk" for the parent clock.
+
+Optional properties:
+- mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi
+  controller used, this value should be 0~3, only required for MT8173.
+0: specify GPIO69,70,71,72 for spi pins.
+1: specify GPIO102,103,104,105 for spi pins.
+2: specify GPIO128,129,130,131 for spi pins.
+3: specify GPIO5,6,7,8 for spi pins.
+
+Example:
+
+- SoC Specific Portion:
+spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
+   clock-names = "spi-clk", "parent-clk";
+   mediatek,pad-select = <0>;
+   status = "disabled";
+};
-- 
1.8.1.1.dirty

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[PATCH v5 2/3] spi: mediatek: Add spi bus for Mediatek MT8173

[Leilk Liu]

This patch adds basic spi bus for MT8173.

Signed-off-by: Leilk Liu 
---
Change in this patch:
1. change "pad-select" to "mediatek,pad-select".
2. modify clk relevant implement.
---
 drivers/spi/Kconfig  |   9 +
 drivers/spi/Makefile |   1 +
 drivers/spi/spi-mt65xx.c | 749 +++
 include/linux/platform_data/spi-mt65xx.h |  22 +
 4 files changed, 781 insertions(+)
 create mode 100644 drivers/spi/spi-mt65xx.c
 create mode 100644 include/linux/platform_data/spi-mt65xx.h

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 0cae169..38ddfba 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -326,6 +326,15 @@ config SPI_MESON_SPIFC
  This enables master mode support for the SPIFC (SPI flash
  controller) available in Amlogic Meson SoCs.
 
+config SPI_MT65XX
+   tristate "MediaTek SPI controller"
+   depends on ARCH_MEDIATEK || COMPILE_TEST
+   help
+ This selects the MediaTek(R) SPI bus driver.
+ If you want to use MediaTek(R) SPI interface,
+ say Y or M here.If you are not sure, say N.
+ SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs.
+
 config SPI_OC_TINY
tristate "OpenCores tiny SPI"
depends on GPIOLIB || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 1154dba..9746beb2 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
 obj-$(CONFIG_SPI_MPC512x_PSC)  += spi-mpc512x-psc.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)  += spi-mpc52xx-psc.o
 obj-$(CONFIG_SPI_MPC52xx)  += spi-mpc52xx.o
+obj-$(CONFIG_SPI_MT65XX)+= spi-mt65xx.o
 obj-$(CONFIG_SPI_MXS)  += spi-mxs.o
 obj-$(CONFIG_SPI_NUC900)   += spi-nuc900.o
 obj-$(CONFIG_SPI_OC_TINY)  += spi-oc-tiny.o
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
new file mode 100644
index 000..4676b01
--- /dev/null
+++ b/drivers/spi/spi-mt65xx.c
@@ -0,0 +1,749 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Leilk Liu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SPI_CFG0_REG  0x
+#define SPI_CFG1_REG  0x0004
+#define SPI_TX_SRC_REG0x0008
+#define SPI_RX_DST_REG0x000c
+#define SPI_TX_DATA_REG   0x0010
+#define SPI_RX_DATA_REG   0x0014
+#define SPI_CMD_REG   0x0018
+#define SPI_STATUS0_REG   0x001c
+#define SPI_PAD_SEL_REG   0x0024
+
+#define SPI_CFG0_SCK_HIGH_OFFSET  0
+#define SPI_CFG0_SCK_LOW_OFFSET   8
+#define SPI_CFG0_CS_HOLD_OFFSET   16
+#define SPI_CFG0_CS_SETUP_OFFSET  24
+
+#define SPI_CFG1_CS_IDLE_OFFSET   0
+#define SPI_CFG1_PACKET_LOOP_OFFSET   8
+#define SPI_CFG1_PACKET_LENGTH_OFFSET 16
+#define SPI_CFG1_GET_TICK_DLY_OFFSET  30
+
+#define SPI_CFG1_CS_IDLE_MASK 0xff
+#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
+#define SPI_CFG1_PACKET_LENGTH_MASK   0x3ff
+
+#define SPI_CMD_ACT_OFFSET0
+#define SPI_CMD_RESUME_OFFSET 1
+#define SPI_CMD_CPHA_OFFSET   8
+#define SPI_CMD_CPOL_OFFSET   9
+#define SPI_CMD_TXMSBF_OFFSET 12
+#define SPI_CMD_RXMSBF_OFFSET 13
+#define SPI_CMD_RX_ENDIAN_OFFSET  14
+#define SPI_CMD_TX_ENDIAN_OFFSET  15
+
+#define SPI_CMD_RST  BIT(2)
+#define SPI_CMD_PAUSE_EN BIT(4)
+#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_CPHA BIT(8)
+#define SPI_CMD_CPOL BIT(9)
+#define SPI_CMD_RX_DMA   BIT(10)
+#define SPI_CMD_TX_DMA   BIT(11)
+#define SPI_CMD_TXMSBF   BIT(12)
+#define SPI_CMD_RXMSBF   BIT(13)
+#define SPI_CMD_RX_ENDIANBIT(14)
+#define SPI_CMD_TX_ENDIANBIT(15)
+#define SPI_CMD_FINISH_IEBIT(16)
+#define SPI_CMD_PAUSE_IE BIT(17)
+
+#define MTK_SPI_QUIRK_PAD_SELECT 1
+/* Must explicitly send dummy Tx bytes to do Rx only transfer */
+#define MTK_SPI_QUIRK_MUST_TX 1
+
+#define MT8173_SPI_MAX_PAD_SEL 3
+
+#define MTK_SPI_IDLE 0
+#define MTK_SPI_PAUSED 1
+
+#define MTK_SPI_MAX_FIFO_SIZE 32
+#d

[PATCH v5 3/3] arm64: dts: Add spi bus dts

[Leilk Liu]

This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: Leilk Liu 
---
Change in this patch:
1. "pad-select" is a vendor property, so change it to "mediatek,pad-select".
2. modify the property of clocks and clock-names.
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..066bd6a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -220,6 +220,15 @@
bias-disable;
};
};
+
+   spi_pins_a: spi0 {
+   pins_spi {
+   pinmux = 
,
+   
,
+   
,
+   
;
+   };
+   };
};
 
scpsys: scpsys@10006000 {
@@ -365,6 +374,20 @@
status = "disabled";
};
 
+   spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen 
CLK_TOP_SYSPLL3_D2>;
+   clock-names = "spi-clk", "parent-clk";
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi_pins_a>;
+   mediatek,pad-select = <0>;
+   status = "disabled";
+   };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
-- 
1.8.1.1.dirty

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Re: [PATCH v4 1/3] dt-binding: spi: Mediatek: Document devicetree bindings for spi bus

[leilk liu]

On Tue, 2015-08-04 at 18:42 +0100, Mark Brown wrote:
> On Wed, Jul 29, 2015 at 07:04:32PM +0800, Leilk Liu wrote:
> > Signed-off-by: Leilk Liu 
> 
> Please use subject lines reflecting the style for the subsystem so
> people can spot if patches are relevant to them.
> 

OK, I will change the title to "spi: Mediatek: Document devicetree
bindings for spi bus".

> > +- clocks: phandles to input clocks.
> > +
> > +- clock-names: tuple listing input clock names.
> > +   Required elements: "main"
> 
> ...and there are no optional values?
> 

clock tree provides some source clocks, CLK_PERI_SPI0 is the default
one. I will support optional values on the next version.

> > +- pad-select: should specify spi pad used, only required for MT8173.
> > +This value should be 0~3.
> 
> What do the values 0-3 mean?  I guess it's the value for some register
> or other part of the device, the binding should say so people can go and
> check the datasheet, schematic or whatever to figure out what to set.
> 
> This property should be optional, not required

OK, I will explain what the values 0-3 mean.


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Re: [PATCH v4 0/3] Add Mediatek SPI bus driver

[leilk liu]

On Thu, 2015-07-30 at 21:29 +0200, Jonas Gorski wrote:
> Hi,
> 
> On Wed, Jul 29, 2015 at 1:04 PM, Leilk Liu  wrote:
> > Change in v4:
> > 1. fix Mark Brown review comment.
> 
> You should say what you actually fixed/changed, not just that you
> changed something. Also the individual patches should contain
> changelogs as well (under the tear-off line (--), so one knows if
> something was changed between
> versions.
> 

OK, I will fix them in future versions.

> 
> Jonas


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Re: [PATCH v4 1/3] dt-binding: spi: Mediatek: Document devicetree bindings for spi bus

[leilk liu]

Hi Jonas,

On Thu, 2015-07-30 at 21:27 +0200, Jonas Gorski wrote:
> Hi,
> 
> On Wed, Jul 29, 2015 at 1:04 PM, Leilk Liu  wrote:
> > Signed-off-by: Leilk Liu 
> > ---
> >  .../devicetree/bindings/spi/spi-mt65xx.txt | 38 
> > ++
> >  1 file changed, 38 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt
> >
> > diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
> > b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
> > new file mode 100644
> > index 000..f8005d6
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
> > @@ -0,0 +1,38 @@
> > +MTK SPI device
> 
> You are calling it "MediaTek SPI controller" in the Kconfig entry, so
> you should call it that here as well.
> 

OK, I will fix it.

> > +
> > +Required properties:
> > +- compatible: should be one of the following.
> > +- mediatek,mt8173-spi: for mt8173 platforms
> > +- mediatek,mt8135-spi: for mt8135 platforms
> > +- mediatek,mt6589-spi: for mt6589 platforms
> > +
> > +- #address-cells: should be 1.
> > +
> > +- #size-cells: should be 0.
> > +
> > +- reg: Address and length of the register set for the device
> > +
> > +- interrupts: Should contain spi interrupt
> > +
> > +- clocks: phandles to input clocks.
> > +
> > +- clock-names: tuple listing input clock names.
> > +   Required elements: "main"
> > +
> > +- pad-select: should specify spi pad used, only required for MT8173.
> > +This value should be 0~3.
> 
> As already commented on the v3, this is a vendor property, and must
> have a vendor prefix, so it must be called "mediatek,pad-select".
> 

OK, I will fix it on the next version.

> > +
> > +Example:
> > +
> > +- SoC Specific Portion:
> > +spi: spi@1100a000 {
> > +   compatible = "mediatek,mt8173-spi";
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   reg = <0 0x1100a000 0 0x1000>;
> > +   interrupts = ;
> > +   clocks = <&pericfg CLK_PERI_SPI0>;
> > +   clock-names = "main";
> > +   pad-select = <0>;
> > +   status = "disabled";
> > +};
> 
> 
> Jonas


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[PATCH v4 2/3] spi: mediatek: Add spi bus for Mediatek MT8173

[Leilk Liu]

This patch adds basic spi bus for MT8173.

Signed-off-by: Leilk Liu 
---
 drivers/spi/Kconfig  |   9 +
 drivers/spi/Makefile |   1 +
 drivers/spi/spi-mt65xx.c | 732 +++
 include/linux/platform_data/spi-mt65xx.h |  22 +
 4 files changed, 764 insertions(+)
 create mode 100644 drivers/spi/spi-mt65xx.c
 create mode 100644 include/linux/platform_data/spi-mt65xx.h

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 0cae169..38ddfba 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -326,6 +326,15 @@ config SPI_MESON_SPIFC
  This enables master mode support for the SPIFC (SPI flash
  controller) available in Amlogic Meson SoCs.
 
+config SPI_MT65XX
+   tristate "MediaTek SPI controller"
+   depends on ARCH_MEDIATEK || COMPILE_TEST
+   help
+ This selects the MediaTek(R) SPI bus driver.
+ If you want to use MediaTek(R) SPI interface,
+ say Y or M here.If you are not sure, say N.
+ SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs.
+
 config SPI_OC_TINY
tristate "OpenCores tiny SPI"
depends on GPIOLIB || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 1154dba..9746beb2 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
 obj-$(CONFIG_SPI_MPC512x_PSC)  += spi-mpc512x-psc.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)  += spi-mpc52xx-psc.o
 obj-$(CONFIG_SPI_MPC52xx)  += spi-mpc52xx.o
+obj-$(CONFIG_SPI_MT65XX)+= spi-mt65xx.o
 obj-$(CONFIG_SPI_MXS)  += spi-mxs.o
 obj-$(CONFIG_SPI_NUC900)   += spi-nuc900.o
 obj-$(CONFIG_SPI_OC_TINY)  += spi-oc-tiny.o
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
new file mode 100644
index 000..6dc6404
--- /dev/null
+++ b/drivers/spi/spi-mt65xx.c
@@ -0,0 +1,732 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Leilk Liu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SPI_CFG0_REG  0x
+#define SPI_CFG1_REG  0x0004
+#define SPI_TX_SRC_REG0x0008
+#define SPI_RX_DST_REG0x000c
+#define SPI_TX_DATA_REG   0x0010
+#define SPI_RX_DATA_REG   0x0014
+#define SPI_CMD_REG   0x0018
+#define SPI_STATUS0_REG   0x001c
+#define SPI_PAD_SEL_REG   0x0024
+
+#define SPI_CFG0_SCK_HIGH_OFFSET  0
+#define SPI_CFG0_SCK_LOW_OFFSET   8
+#define SPI_CFG0_CS_HOLD_OFFSET   16
+#define SPI_CFG0_CS_SETUP_OFFSET  24
+
+#define SPI_CFG1_CS_IDLE_OFFSET   0
+#define SPI_CFG1_PACKET_LOOP_OFFSET   8
+#define SPI_CFG1_PACKET_LENGTH_OFFSET 16
+#define SPI_CFG1_GET_TICK_DLY_OFFSET  30
+
+#define SPI_CFG1_CS_IDLE_MASK 0xff
+#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
+#define SPI_CFG1_PACKET_LENGTH_MASK   0x3ff
+
+#define SPI_CMD_ACT_OFFSET0
+#define SPI_CMD_RESUME_OFFSET 1
+#define SPI_CMD_CPHA_OFFSET   8
+#define SPI_CMD_CPOL_OFFSET   9
+#define SPI_CMD_TXMSBF_OFFSET 12
+#define SPI_CMD_RXMSBF_OFFSET 13
+#define SPI_CMD_RX_ENDIAN_OFFSET  14
+#define SPI_CMD_TX_ENDIAN_OFFSET  15
+
+#define SPI_CMD_RST  BIT(2)
+#define SPI_CMD_PAUSE_EN BIT(4)
+#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_CPHA BIT(8)
+#define SPI_CMD_CPOL BIT(9)
+#define SPI_CMD_RX_DMA   BIT(10)
+#define SPI_CMD_TX_DMA   BIT(11)
+#define SPI_CMD_TXMSBF   BIT(12)
+#define SPI_CMD_RXMSBF   BIT(13)
+#define SPI_CMD_RX_ENDIANBIT(14)
+#define SPI_CMD_TX_ENDIANBIT(15)
+#define SPI_CMD_FINISH_IEBIT(16)
+#define SPI_CMD_PAUSE_IE BIT(17)
+
+#define MTK_SPI_QUIRK_PAD_SELECT 1
+/* Must explicitly send dummy Tx bytes to do Rx only transfer */
+#define MTK_SPI_QUIRK_MUST_TX 1
+
+#define MT8173_SPI_MAX_PAD_SEL 3
+
+#define MTK_SPI_IDLE 0
+#define MTK_SPI_PAUSED 1
+
+#define MTK_SPI_MAX_FIFO_SIZE 32
+#define MTK_SPI_PACKET_SIZE 1024
+
+struct mtk_spi_compatible {
+   u32 need_pad_sel;
+   u32 must_tx;
+};
+
+struct mtk_spi {

[PATCH v4 3/3] arm64: dts: Add spi bus dts

[Leilk Liu]

This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: Leilk Liu 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..2a88d93 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -220,6 +220,15 @@
bias-disable;
};
};
+
+   spi_pins_a: spi0 {
+   pins_spi {
+   pinmux = 
,
+   
,
+   
,
+   
;
+   };
+   };
};
 
scpsys: scpsys@10006000 {
@@ -365,6 +374,20 @@
status = "disabled";
};
 
+   spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg CLK_PERI_SPI0>;
+   clock-names = "main";
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi_pins_a>;
+   pad-select = <0>;
+   status = "disabled";
+   };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
-- 
1.8.1.1.dirty

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[PATCH v4 1/3] dt-binding: spi: Mediatek: Document devicetree bindings for spi bus

[Leilk Liu]

Signed-off-by: Leilk Liu 
---
 .../devicetree/bindings/spi/spi-mt65xx.txt | 38 ++
 1 file changed, 38 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
new file mode 100644
index 000..f8005d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -0,0 +1,38 @@
+MTK SPI device
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt8173-spi: for mt8173 platforms
+- mediatek,mt8135-spi: for mt8135 platforms
+- mediatek,mt6589-spi: for mt6589 platforms
+
+- #address-cells: should be 1.
+
+- #size-cells: should be 0.
+
+- reg: Address and length of the register set for the device
+
+- interrupts: Should contain spi interrupt
+
+- clocks: phandles to input clocks.
+
+- clock-names: tuple listing input clock names.
+   Required elements: "main"
+
+- pad-select: should specify spi pad used, only required for MT8173.
+This value should be 0~3.
+
+Example:
+
+- SoC Specific Portion:
+spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg CLK_PERI_SPI0>;
+   clock-names = "main";
+   pad-select = <0>;
+   status = "disabled";
+};
-- 
1.8.1.1.dirty

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[PATCH v4 0/3] Add Mediatek SPI bus driver

[Leilk Liu]

Change in v4:
1. fix Mark Brown review comment.

Change in v3:
1. support fifo mode function.
2. support any non-prime length transfer in dma mode.
3. use interrupt to handle scatterlist.
4. fix review comment.


Change in v2:
1. Remove spi bitbang framwork, use can_dma() and transfer_one().
2. Add PM functions.
3. Fix Mark Brown review comment.

Leilk Liu (3):
  dt-binding: spi: Mediatek: Document devicetree bindings for spi bus
  spi: mediatek: Add spi bus for Mediatek MT8173
  arm64: dts: Add spi bus dts

 .../devicetree/bindings/spi/spi-mt65xx.txt |  38 ++
 arch/arm64/boot/dts/mediatek/mt8173.dtsi   |  23 +
 drivers/spi/Kconfig|   9 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/spi-mt65xx.c   | 732 +
 include/linux/platform_data/spi-mt65xx.h   |  22 +
 6 files changed, 825 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt
 create mode 100644 drivers/spi/spi-mt65xx.c
 create mode 100644 include/linux/platform_data/spi-mt65xx.h

--
1.8.1.1.dirty

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Re: [PATCH v3 3/4] spi: mediatek: Add spi bus for Mediatek MT8173

[leilk liu]

On Fri, 2015-07-24 at 18:49 +0100, Mark Brown wrote:
> On Thu, Jul 23, 2015 at 05:10:42PM +0800, Leilk Liu wrote:
> 
> This basically seems fine but there's a couple of issues that should be
> relatively easy to fix:
> 
> > +   mdata->cur_transfer = xfer;
> > +   mtk_spi_prepare_transfer(master, xfer);
> > +   mtk_spi_setup_packet(master, xfer);
> > +
> > +   cnt = (xfer->len % 4) ? (xfer->len / 4 + 1) : (xfer->len / 4);
> 
> Please write this as an if statement for legibility.
> 

OK, I'll fix it.

> > +static bool mtk_spi_can_dma(struct spi_master *master,
> > +   struct spi_device *spi,
> > +   struct spi_transfer *xfer)
> > +{
> > +   struct mtk_spi *mdata = spi_master_get_devdata(master);
> > +
> > +   if (xfer->len > MTK_SPI_MAX_FIFO_SIZE)
> > +   mdata->use_dma = true;
> > +   else
> > +   mdata->use_dma = false;
> > +
> > +   return mdata->use_dma;
> > +}
> 
> This is broken since can_dma() can be called multiple transfers before
> actually doing a transfer (the current implementation loops over all
> transfers in a message before starting the message) - you can't store
> any local data.  The transfer_one() function should do another can_dma()
> check to decide if it can DMA, it shouldn't rely on driver global data.  
> 

OK, I'll fix it.

> > +   if (!mdata->use_dma) {
> > +   if (trans->rx_buf) {
> 
> This should be a variable set when doing the transfer (or perhaps based
> on checking spi->cur_xfer with can_dma()). 
> 
> > +   for (i = 0; i < trans->len; i++) {
> > +   if (i % 4 == 0)
> > +   reg_val =
> > +   readl(mdata->base + SPI_RX_DATA_REG);
> > +   *((u8 *)(trans->rx_buf + i)) =
> > +   (reg_val >> ((i % 4) * 8)) & 0xff;
> 
> This isn't the clearest code ever...  a comment would help.
> 
OK, I'll fix it.

> > +   if (mdata->tx_sgl && (mdata->tx_sgl_len == 0)) {
> > +   mdata->tx_sgl = sg_next(mdata->tx_sgl);
> > +   if (mdata->tx_sgl) {
> > +   trans->tx_dma = sg_dma_address(mdata->tx_sgl);
> > +   mdata->tx_sgl_len = sg_dma_len(mdata->tx_sgl);
> > +   }
> > +   }
> 
> There's a *lot* of code in this interrupt handler, and a lot of it looks
> an awful lot like the contents of mtk_spi_dma_transfer() has been
> cut'n'pasted in.  The shared code should all be factored out into a
> function called from both places.

OK, I'll fix it.


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Re: [PATCH v3 2/4] dt-bindings: ARM: Mediatek: Document devicetree bindings for spi bus

[leilk liu]

On Fri, 2015-07-24 at 18:34 +0100, Mark Brown wrote:
> On Thu, Jul 23, 2015 at 05:10:41PM +0800, Leilk Liu wrote:
> > Change-Id: I6cadbf2e51d2cc4eacd518a24d5a9a1da93d4db5
> > Signed-off-by: Leilk Liu 
> 
> Please don't include noise like Change-Id in upstream commits and please
> use subject lines reflecting the style for the subsystem.

OK, I'll fix it.

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[PATCH v3 2/4] dt-bindings: ARM: Mediatek: Document devicetree bindings for spi bus

[Leilk Liu]

Change-Id: I6cadbf2e51d2cc4eacd518a24d5a9a1da93d4db5
Signed-off-by: Leilk Liu 
---
 .../devicetree/bindings/spi/spi-mt65xx.txt | 38 ++
 1 file changed, 38 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
new file mode 100644
index 000..f8005d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -0,0 +1,38 @@
+MTK SPI device
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt8173-spi: for mt8173 platforms
+- mediatek,mt8135-spi: for mt8135 platforms
+- mediatek,mt6589-spi: for mt6589 platforms
+
+- #address-cells: should be 1.
+
+- #size-cells: should be 0.
+
+- reg: Address and length of the register set for the device
+
+- interrupts: Should contain spi interrupt
+
+- clocks: phandles to input clocks.
+
+- clock-names: tuple listing input clock names.
+   Required elements: "main"
+
+- pad-select: should specify spi pad used, only required for MT8173.
+This value should be 0~3.
+
+Example:
+
+- SoC Specific Portion:
+spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg CLK_PERI_SPI0>;
+   clock-names = "main";
+   pad-select = <0>;
+   status = "disabled";
+};
-- 
1.8.1.1.dirty

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[PATCH v3 3/4] spi: mediatek: Add spi bus for Mediatek MT8173

[Leilk Liu]

This patch adds basic spi bus for MT8173.

Change-Id: I52a48526105f3de49f6253d1ffb449759a2a8140
Signed-off-by: Leilk Liu 
---
 drivers/spi/Kconfig  |   9 +
 drivers/spi/Makefile |   1 +
 drivers/spi/spi-mt65xx.c | 817 +++
 include/linux/platform_data/spi-mt65xx.h |  22 +
 4 files changed, 849 insertions(+)
 create mode 100644 drivers/spi/spi-mt65xx.c
 create mode 100644 include/linux/platform_data/spi-mt65xx.h

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 0cae169..38ddfba 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -326,6 +326,15 @@ config SPI_MESON_SPIFC
  This enables master mode support for the SPIFC (SPI flash
  controller) available in Amlogic Meson SoCs.
 
+config SPI_MT65XX
+   tristate "MediaTek SPI controller"
+   depends on ARCH_MEDIATEK || COMPILE_TEST
+   help
+ This selects the MediaTek(R) SPI bus driver.
+ If you want to use MediaTek(R) SPI interface,
+ say Y or M here.If you are not sure, say N.
+ SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs.
+
 config SPI_OC_TINY
tristate "OpenCores tiny SPI"
depends on GPIOLIB || COMPILE_TEST
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 1154dba..9746beb2 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
 obj-$(CONFIG_SPI_MPC512x_PSC)  += spi-mpc512x-psc.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)  += spi-mpc52xx-psc.o
 obj-$(CONFIG_SPI_MPC52xx)  += spi-mpc52xx.o
+obj-$(CONFIG_SPI_MT65XX)+= spi-mt65xx.o
 obj-$(CONFIG_SPI_MXS)  += spi-mxs.o
 obj-$(CONFIG_SPI_NUC900)   += spi-nuc900.o
 obj-$(CONFIG_SPI_OC_TINY)  += spi-oc-tiny.o
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
new file mode 100644
index 000..1ed5c44
--- /dev/null
+++ b/drivers/spi/spi-mt65xx.c
@@ -0,0 +1,817 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Leilk Liu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SPI_CFG0_REG  0x
+#define SPI_CFG1_REG  0x0004
+#define SPI_TX_SRC_REG0x0008
+#define SPI_RX_DST_REG0x000c
+#define SPI_TX_DATA_REG   0x0010
+#define SPI_RX_DATA_REG   0x0014
+#define SPI_CMD_REG   0x0018
+#define SPI_STATUS0_REG   0x001c
+#define SPI_PAD_SEL_REG   0x0024
+
+#define SPI_CFG0_SCK_HIGH_OFFSET  0
+#define SPI_CFG0_SCK_LOW_OFFSET   8
+#define SPI_CFG0_CS_HOLD_OFFSET   16
+#define SPI_CFG0_CS_SETUP_OFFSET  24
+
+#define SPI_CFG1_CS_IDLE_OFFSET   0
+#define SPI_CFG1_PACKET_LOOP_OFFSET   8
+#define SPI_CFG1_PACKET_LENGTH_OFFSET 16
+#define SPI_CFG1_GET_TICK_DLY_OFFSET  30
+
+#define SPI_CFG1_CS_IDLE_MASK 0xff
+#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
+#define SPI_CFG1_PACKET_LENGTH_MASK   0x3ff
+
+#define SPI_CMD_ACT_OFFSET0
+#define SPI_CMD_RESUME_OFFSET 1
+#define SPI_CMD_CPHA_OFFSET   8
+#define SPI_CMD_CPOL_OFFSET   9
+#define SPI_CMD_TXMSBF_OFFSET 12
+#define SPI_CMD_RXMSBF_OFFSET 13
+#define SPI_CMD_RX_ENDIAN_OFFSET  14
+#define SPI_CMD_TX_ENDIAN_OFFSET  15
+
+#define SPI_CMD_RST  BIT(2)
+#define SPI_CMD_PAUSE_EN BIT(4)
+#define SPI_CMD_DEASSERT BIT(5)
+#define SPI_CMD_CPHA BIT(8)
+#define SPI_CMD_CPOL BIT(9)
+#define SPI_CMD_RX_DMA   BIT(10)
+#define SPI_CMD_TX_DMA   BIT(11)
+#define SPI_CMD_TXMSBF   BIT(12)
+#define SPI_CMD_RXMSBF   BIT(13)
+#define SPI_CMD_RX_ENDIANBIT(14)
+#define SPI_CMD_TX_ENDIANBIT(15)
+#define SPI_CMD_FINISH_IEBIT(16)
+#define SPI_CMD_PAUSE_IE BIT(17)
+
+#define MTK_SPI_QUIRK_PAD_SELECT 1
+/* Must explicitly send dummy Tx bytes to do Rx only transfer */
+#define MTK_SPI_QUIRK_MUST_TX 1
+
+#define MT8173_SPI_MAX_PAD_SEL 3
+
+#define MTK_SPI_IDLE 0
+#define MTK_SPI_PAUSED 1
+
+#define MTK_SPI_MAX_FIFO_SIZE 32
+#define MTK_SPI_PACKET_SIZE 1024
+
+struct mtk_spi_compatible {
+   u32 need_

[PATCH v3 1/4] spi: support spi without dma channel to use can_dma()

[Leilk Liu]

For spi without dma channel and use can_dma(), it can
use master->dev for struct device.

Change-Id: I5b320e1742767c2ea4368410fb49c6679e28af6b
Signed-off-by: Leilk Liu 
---
 drivers/spi/spi.c | 22 ++
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index cf8b91b..f725085 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -539,8 +539,15 @@ static int __spi_map_msg(struct spi_master *master, struct 
spi_message *msg)
if (!master->can_dma)
return 0;
 
-   tx_dev = master->dma_tx->device->dev;
-   rx_dev = master->dma_rx->device->dev;
+   if (master->dma_tx)
+   tx_dev = master->dma_tx->device->dev;
+   else
+   tx_dev = &master->dev;
+
+   if (master->dma_rx)
+   rx_dev = master->dma_rx->device->dev;
+   else
+   rx_dev = &master->dev;
 
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
if (!master->can_dma(master, msg->spi, xfer))
@@ -579,8 +586,15 @@ static int __spi_unmap_msg(struct spi_master *master, 
struct spi_message *msg)
if (!master->cur_msg_mapped || !master->can_dma)
return 0;
 
-   tx_dev = master->dma_tx->device->dev;
-   rx_dev = master->dma_rx->device->dev;
+   if (master->dma_tx)
+   tx_dev = master->dma_tx->device->dev;
+   else
+   tx_dev = &master->dev;
+
+   if (master->dma_rx)
+   rx_dev = master->dma_rx->device->dev;
+   else
+   rx_dev = &master->dev;
 
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
if (!master->can_dma(master, msg->spi, xfer))
-- 
1.8.1.1.dirty

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[PATCH v3 0/4] Add Mediatek SPI bus driver

[Leilk Liu]

Change in v3:
1. support fifo mode function.
2. support any non-prime length transfer in dma mode.
3. use interrupt to handle scatterlist.
4. fix review comment.

Leilk Liu (4):
  spi: support spi without dma channel to use can_dma()
  dt-bindings: ARM: Mediatek: Document devicetree bindings for spi bus
  spi: mediatek: Add spi bus for Mediatek MT8173
  arm64: dts: Add spi bus dts

 .../devicetree/bindings/spi/spi-mt65xx.txt |  38 +
 arch/arm64/boot/dts/mediatek/mt8173.dtsi   |  23 +
 drivers/spi/Kconfig|   9 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/spi-mt65xx.c   | 817 +
 drivers/spi/spi.c  |  22 +-
 include/linux/platform_data/spi-mt65xx.h   |  22 +
 7 files changed, 928 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt
 create mode 100644 drivers/spi/spi-mt65xx.c
 create mode 100644 include/linux/platform_data/spi-mt65xx.h

--
1.8.1.1.dirty

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[PATCH v3 4/4] arm64: dts: Add spi bus dts

[Leilk Liu]

This patch adds MT8173 spi bus controllers into device tree.

Change-Id: I70edf3e4a366d856499dc855b53d726ce4668a39
Signed-off-by: Leilk Liu 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 359b8b6..a35a0e6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -219,6 +219,15 @@
bias-disable;
};
};
+
+   spi_pins_a: spi0 {
+   pins_spi {
+   pinmux = 
,
+   
,
+   
,
+   
;
+   };
+   };
};
 
scpsys: scpsys@10006000 {
@@ -364,6 +373,20 @@
status = "disabled";
};
 
+   spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg CLK_PERI_SPI0>;
+   clock-names = "main";
+   pinctrl-names = "default";
+   pinctrl-0 = <&spi_pins_a>;
+   pad-select = <0>;
+   status = "disabled";
+   };
+
i2c3: i2c3@1101 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x1101 0 0x70>,
-- 
1.8.1.1.dirty

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Re: [PATCH v2 3/4] spi: mediatek: Add spi bus for Mediatek MT8173

[leilk liu]

Hello Daniel,

On Wed, 2015-07-01 at 12:06 +0800, Daniel Kurtz wrote:
> Hi Leilk,
> 
> Please see comments inline...
> 
> On Mon, Jun 29, 2015 at 9:04 PM, Leilk Liu  wrote:
> > This patch adds basic spi bus for MT8173.
> >
> > Signed-off-by: Leilk Liu 
> > Signed-off-by: Eddie Huang 
> > ---
> >  drivers/spi/Kconfig  |   9 +
> >  drivers/spi/Makefile |   1 +
> >  drivers/spi/spi-mt65xx.c | 656 
> > +++
> >  3 files changed, 666 insertions(+)
> >  create mode 100644 drivers/spi/spi-mt65xx.c
> >
> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> > index 198f96b..06f9514 100644
> > --- a/drivers/spi/Kconfig
> > +++ b/drivers/spi/Kconfig
> > @@ -324,6 +324,15 @@ config SPI_MESON_SPIFC
> >   This enables master mode support for the SPIFC (SPI flash
> >   controller) available in Amlogic Meson SoCs.
> >
> > +config SPI_MT65XX
> > +   tristate "MediaTek SPI controller"
> > +   depends on ARCH_MEDIATEK || COMPILE_TEST
> > +   help
> > + This selects the MediaTek(R) SPI bus driver.
> > + If you want to use MediaTek(R) SPI interface,
> > + say Y or M here.If you are not sure, say N.
> > + SPI drivers for Mediatek mt65XX series ARM SoCs.
> > +
> >  config SPI_OC_TINY
> > tristate "OpenCores tiny SPI"
> > depends on GPIOLIB
> > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> > index d8cbf65..ab332ef 100644
> > --- a/drivers/spi/Makefile
> > +++ b/drivers/spi/Makefile
> > @@ -48,6 +48,7 @@ obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
> >  obj-$(CONFIG_SPI_MPC512x_PSC)  += spi-mpc512x-psc.o
> >  obj-$(CONFIG_SPI_MPC52xx_PSC)  += spi-mpc52xx-psc.o
> >  obj-$(CONFIG_SPI_MPC52xx)  += spi-mpc52xx.o
> > +obj-$(CONFIG_SPI_MT65XX)+= spi-mt65xx.o
> >  obj-$(CONFIG_SPI_MXS)  += spi-mxs.o
> >  obj-$(CONFIG_SPI_NUC900)   += spi-nuc900.o
> >  obj-$(CONFIG_SPI_OC_TINY)      += spi-oc-tiny.o
> > diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
> > new file mode 100644
> > index 000..6cb54587
> > --- /dev/null
> > +++ b/drivers/spi/spi-mt65xx.c
> > @@ -0,0 +1,656 @@
> > +/*
> > + * Copyright (c) 2015 MediaTek Inc.
> > + * Author: Leilk Liu 
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> 
> It would be nicer if you can alphabetize these headers.
> 

OK, I'll fix it.

> > +
> > +#define SPI_CFG0_REG  0x
> > +#define SPI_CFG1_REG  0x0004
> > +#define SPI_TX_SRC_REG0x0008
> > +#define SPI_RX_DST_REG0x000c
> > +#define SPI_CMD_REG   0x0018
> > +#define SPI_STATUS0_REG   0x001c
> > +#define SPI_PAD_SEL_REG   0x0024
> > +
> > +#define SPI_CFG0_SCK_HIGH_OFFSET  0
> > +#define SPI_CFG0_SCK_LOW_OFFSET   8
> > +#define SPI_CFG0_CS_HOLD_OFFSET   16
> > +#define SPI_CFG0_CS_SETUP_OFFSET  24
> > +
> > +#define SPI_CFG0_SCK_HIGH_MASK0xff
> > +#define SPI_CFG0_SCK_LOW_MASK 0xff00
> > +#define SPI_CFG0_CS_HOLD_MASK 0xff
> > +#define SPI_CFG0_CS_SETUP_MASK0xff00
> > +
> > +#define SPI_CFG1_CS_IDLE_OFFSET   0
> > +#define SPI_CFG1_PACKET_LOOP_OFFSET   8
> > +#define SPI_CFG1_PACKET_LENGTH_OFFSET 16
> > +#define SPI_CFG1_GET_TICK_DLY_OFFS

Re: [PATCH v2 3/4] spi: mediatek: Add spi bus for Mediatek MT8173

[leilk liu]

Hi Alexey,

> > +config SPI_MT65XX
> > +   tristate "MediaTek SPI controller"
> > +   depends on ARCH_MEDIATEK || COMPILE_TEST
> > +   help
> > + This selects the MediaTek(R) SPI bus driver.
> > + If you want to use MediaTek(R) SPI interface,
> > + say Y or M here.If you are not sure, say N.
> > + SPI drivers for Mediatek mt65XX series ARM SoCs.
> 
> Commit subject and code here and there tells us it's compatible with
> mt81xx series. What do you think, does it make any sense to extend
> help description here?
> 

The help description will be extended.

> 
> > +
> >  config SPI_OC_TINY
> > tristate "OpenCores tiny SPI"
> > depends on GPIOLIB
> > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> > index d8cbf65..ab332ef 100644
> > --- a/drivers/spi/Makefile
> > +++ b/drivers/spi/Makefile
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> 
> > +#include 
> 
> > +#include 
> > +#include 
> 
> Could you please help me? I can't find any gpio-related things here.
> Maybe i miss something.
> Maybe is it for future?
> 
The gpio-related include files are not need now, I will delete extra
inclde files and sort others.

> 
> > +#include 
> > +#include 

> > +static int mtk_spi_transfer_one(struct spi_master *master,
> > +   struct spi_device *spi,
> > +   struct spi_transfer *xfer)
> > +{
> > +   int cmd = 0, ret = 0;
> 
> Maybe initialization of 'cmd' is not needed.
> 

Yes.

> > +   unsigned int tx_sgl_len = 0, rx_sgl_len = 0;
> > +   struct scatterlist *tx_sgl = NULL, *rx_sgl = NULL;
> > +   struct mtk_spi_ddata *mdata = spi_master_get_devdata(master);
> > +
> > +   /* Here is mt8173 HW issue: RX must enable TX, then TX transfer
> > +* dummy data; TX don't need to enable RX. so enable TX dma for
> > +* RX to workaround.
> > +*/


> > +static int mtk_spi_probe(struct platform_device *pdev)
> > +{
> > +   struct spi_master *master;
> > +   struct mtk_spi_ddata *mdata;
> > +   const struct of_device_id *of_id;
> > +   struct resource *res;
> > +   int ret;
> > +
> > +   master = spi_alloc_master(&pdev->dev, sizeof(struct mtk_spi_ddata));
> > +   if (!master) {
> > +   dev_err(&pdev->dev, "failed to alloc spi master\n");
> > +   return -ENOMEM;
> > +   }
> > +
> > +   pm_runtime_set_active(&pdev->dev);
> > +   pm_runtime_enable(&pdev->dev);
> > +
> > +   master->auto_runtime_pm = true;
> > +   master->dev.of_node = pdev->dev.of_node;
> > +   master->bus_num = pdev->id;
> > +   master->num_chipselect = 1;
> > +   master->mode_bits = SPI_CPOL | SPI_CPHA;
> > +
> > +   mdata = spi_master_get_devdata(master);
> > +   memset(mdata, 0, sizeof(struct mtk_spi_ddata));
> 
> Could you please check if you really need to fill in mdata by zeroes?
> I checked spi_alloc_master() and for me it looks like it calls
> kzalloc() for master + mdata.

Yes, memset() is not really need.
> 
> > +   mdata->master = master;
> > +   mdata->dev = &pdev->dev;
> > +
> > +   master->set_cs = mtk_spi_set_cs;
> > +   master->prepare_message = mtk_spi_prepare_message;
> > +   master->transfer_one = mtk_spi_transfer_one;
> > +   master->can_dma = mtk_spi_can_dma;
> > +
> > +   of_id = of_match_node(mtk_spi_of_match, pdev->dev.of_node);
> > +   if (!of_id) {
> > +   dev_err(&pdev->dev, "failed to probe of_node\n");
> > +   ret = -EINVAL;
> > +   goto err;
> > +   }
> > +
> > +   mdata->platform_compat = (unsigned long)of_id->data;
> > +
> > +   if (mdata->platform_compat & COMPAT_MT8173) {
> > +   ret = of_property_read_u32(pdev->dev.of_node, "pad-select",
> > +  &mdata->pad_sel);
> > +   if (ret) {
> > +   dev_err(&pdev->dev, "failed to read pad select: 
> > %d\n",
> > +   ret);
> > +   goto err;
> > +   }
> > +
> > +   if (mdata->pad_sel > MT8173_MAX_PAD_SEL) {
> > +   dev_err(&pdev->dev, "wrong pad-select: %u\n",
> > +   mdata->pad_sel);
> > +   ret = -EINVAL;
> > +   goto err;
> > +   }
> > +   }
> > +
> > +   platform_set_drvdata(pdev, master);
> > +   init_completion(&mdata->done);
> > +
> > +   mdata->clk = devm_clk_get(&pdev->dev, "main");
> > +   if (IS_ERR(mdata->clk)) {
> > +   ret = PTR_ERR(mdata->clk);
> > +   dev_err(&pdev->dev, "failed to get clock: %d\n"

Re: [PATCH v2 2/4] dt-bindings: ARM: Mediatek: Document devicetree bindings for spi bus

[leilk liu]

> > +
> > +- pad-select: should specify spi pad used, only required for MT8173.
> > +   This value should be 0~3.
> > +
> > +Example:
> > +
> > +- SoC Specific Portion:
> > +spi: spi@1100a000 {
> > +   compatible = "mediatek,mt8173-spi";
> > +   reg = <0 0x1100a000 0 0x1000>;
> > +   interrupts = ;
> > +   clocks = <&pericfg PERI_SPI0>;
> 
> CLK_PERI_SPI0

yes,it will be fixed.

> 
> > +   clock-names = "main";
> > +   pad-select = <1>;
> 
> According to [0], a SPI bus should also specify
> address-cells/size-cells to allow SPI bus devices to specify a chip
> select.
> [0] Documentation/devicetree/bindings/spi/spi-bus.txt
> 
> - #address-cells  - number of cells required to define a chip select
> address on the SPI bus.
> - #size-cells - should be zero.
> 
> The spi-bus document even describes how to mix "native" and gpio CS lines.
> 
 Got it, it will be added in mt8173.dtsi.

> 
> I am still not sure what to do with the "pad-select" feature.
> Does "pad-select" just select one of 4 dedicated chip select lines?
> Or, does it also change which CK/MOSI/MISO lines are used?
> 
> Ideally, the same CK/MOSI/MISO signals are sent on all CK/MOSI/MISO
> lines enabled by pinctrl, and "pad-select" just chooses which CS_N
> line to use.
> In this case, we can use the SPI slave device reg value to select
> which CS_N to use for any given device.
> Furthermore, we can also support using additional cs-gpios.
> 
> However, if the pad-select also specifies which CK/MOSI/MISO pins are
> used for a given transaction, then supporting cs-gpios becomes a bit
> trickier, since the spi slave device would need to specify both which
> gpio-cs to use, as well as which SPI pad it is connected to.
> 
> -Dan

The pad-select changes CS/CK/MO/MI lines. Mt8173 spi has 4 group pins,
and it can select which group pins will be used.

Leilk.

> > +   status = "disabled";
> > +};
> > --
> > 1.8.1.1.dirty
> >
> >
> > ___
> > Linux-mediatek mailing list
> > linux-media...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek


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[PATCH v2 4/4] arm64: dts: Add spi bus dts

[Leilk Liu]

This patch adds MT8173 spi bus controllers into device tree.

Signed-off-by: Leilk Liu 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 512e4eb..923d2eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -259,6 +259,15 @@
status = "disabled";
};
 
+   spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg CLK_PERI_SPI0>;
+   clock-names = "main";
+   status = "disabled";
+   };
+
mmsys: mmsys@1400 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
-- 
1.8.1.1.dirty

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[PATCH v2 1/4] spi: support spi without dma channel to use can_dma()

[Leilk Liu]

For spi without dma channel and use can_dma(), it can
use master->dev for struct device.

Signed-off-by: Leilk Liu 
Signed-off-by: Eddie Huang 
---
 drivers/spi/spi.c | 22 ++
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index d5d7d22..cfd76e9 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -539,8 +539,15 @@ static int __spi_map_msg(struct spi_master *master, struct 
spi_message *msg)
if (!master->can_dma)
return 0;
 
-   tx_dev = master->dma_tx->device->dev;
-   rx_dev = master->dma_rx->device->dev;
+   if (master->dma_tx)
+   tx_dev = master->dma_tx->device->dev;
+   else
+   tx_dev = &master->dev;
+
+   if (master->dma_rx)
+   rx_dev = master->dma_rx->device->dev;
+   else
+   rx_dev = &master->dev;
 
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
if (!master->can_dma(master, msg->spi, xfer))
@@ -579,8 +586,15 @@ static int spi_unmap_msg(struct spi_master *master, struct 
spi_message *msg)
if (!master->cur_msg_mapped || !master->can_dma)
return 0;
 
-   tx_dev = master->dma_tx->device->dev;
-   rx_dev = master->dma_rx->device->dev;
+   if (master->dma_tx)
+   tx_dev = master->dma_tx->device->dev;
+   else
+   tx_dev = &master->dev;
+
+   if (master->dma_rx)
+   rx_dev = master->dma_rx->device->dev;
+   else
+   rx_dev = &master->dev;
 
list_for_each_entry(xfer, &msg->transfers, transfer_list) {
if (!master->can_dma(master, msg->spi, xfer))
-- 
1.8.1.1.dirty

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[PATCH v2 3/4] spi: mediatek: Add spi bus for Mediatek MT8173

[Leilk Liu]

This patch adds basic spi bus for MT8173.

Signed-off-by: Leilk Liu 
Signed-off-by: Eddie Huang 
---
 drivers/spi/Kconfig  |   9 +
 drivers/spi/Makefile |   1 +
 drivers/spi/spi-mt65xx.c | 656 +++
 3 files changed, 666 insertions(+)
 create mode 100644 drivers/spi/spi-mt65xx.c

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 198f96b..06f9514 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -324,6 +324,15 @@ config SPI_MESON_SPIFC
  This enables master mode support for the SPIFC (SPI flash
  controller) available in Amlogic Meson SoCs.
 
+config SPI_MT65XX
+   tristate "MediaTek SPI controller"
+   depends on ARCH_MEDIATEK || COMPILE_TEST
+   help
+ This selects the MediaTek(R) SPI bus driver.
+ If you want to use MediaTek(R) SPI interface,
+ say Y or M here.If you are not sure, say N.
+ SPI drivers for Mediatek mt65XX series ARM SoCs.
+
 config SPI_OC_TINY
tristate "OpenCores tiny SPI"
depends on GPIOLIB
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d8cbf65..ab332ef 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
 obj-$(CONFIG_SPI_MPC512x_PSC)  += spi-mpc512x-psc.o
 obj-$(CONFIG_SPI_MPC52xx_PSC)  += spi-mpc52xx-psc.o
 obj-$(CONFIG_SPI_MPC52xx)  += spi-mpc52xx.o
+obj-$(CONFIG_SPI_MT65XX)+= spi-mt65xx.o
 obj-$(CONFIG_SPI_MXS)  += spi-mxs.o
 obj-$(CONFIG_SPI_NUC900)   += spi-nuc900.o
 obj-$(CONFIG_SPI_OC_TINY)  += spi-oc-tiny.o
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
new file mode 100644
index 000..6cb54587
--- /dev/null
+++ b/drivers/spi/spi-mt65xx.c
@@ -0,0 +1,656 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Leilk Liu 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SPI_CFG0_REG  0x
+#define SPI_CFG1_REG  0x0004
+#define SPI_TX_SRC_REG0x0008
+#define SPI_RX_DST_REG0x000c
+#define SPI_CMD_REG   0x0018
+#define SPI_STATUS0_REG   0x001c
+#define SPI_PAD_SEL_REG   0x0024
+
+#define SPI_CFG0_SCK_HIGH_OFFSET  0
+#define SPI_CFG0_SCK_LOW_OFFSET   8
+#define SPI_CFG0_CS_HOLD_OFFSET   16
+#define SPI_CFG0_CS_SETUP_OFFSET  24
+
+#define SPI_CFG0_SCK_HIGH_MASK0xff
+#define SPI_CFG0_SCK_LOW_MASK 0xff00
+#define SPI_CFG0_CS_HOLD_MASK 0xff
+#define SPI_CFG0_CS_SETUP_MASK0xff00
+
+#define SPI_CFG1_CS_IDLE_OFFSET   0
+#define SPI_CFG1_PACKET_LOOP_OFFSET   8
+#define SPI_CFG1_PACKET_LENGTH_OFFSET 16
+#define SPI_CFG1_GET_TICK_DLY_OFFSET  30
+
+#define SPI_CFG1_CS_IDLE_MASK 0xff
+#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
+#define SPI_CFG1_PACKET_LENGTH_MASK   0x3ff
+#define SPI_CFG1_GET_TICK_DLY_MASK0xc000
+
+#define SPI_CMD_ACT_OFFSET0
+#define SPI_CMD_RESUME_OFFSET 1
+#define SPI_CMD_RST_OFFSET2
+#define SPI_CMD_PAUSE_EN_OFFSET   4
+#define SPI_CMD_DEASSERT_OFFSET   5
+#define SPI_CMD_CPHA_OFFSET   8
+#define SPI_CMD_CPOL_OFFSET   9
+#define SPI_CMD_RX_DMA_OFFSET 10
+#define SPI_CMD_TX_DMA_OFFSET 11
+#define SPI_CMD_TXMSBF_OFFSET 12
+#define SPI_CMD_RXMSBF_OFFSET 13
+#define SPI_CMD_RX_ENDIAN_OFFSET  14
+#define SPI_CMD_TX_ENDIAN_OFFSET  15
+#define SPI_CMD_FINISH_IE_OFFSET  16
+#define SPI_CMD_PAUSE_IE_OFFSET   17
+
+#define SPI_CMD_RST_MASK  0x4
+#define SPI_CMD_PAUSE_EN_MASK 0x10
+#define SPI_CMD_DEASSERT_MASK 0x20
+#define SPI_CMD_CPHA_MASK 0x100
+#define SPI_CMD_CPOL_MASK 0x200
+#define SPI_CMD_RX_DMA_MASK   0x400
+#define SPI_CMD_TX_DMA_MASK   0x800
+#define SPI_CMD_TXMSBF_MASK   0x1000
+#define SPI_CMD_RXMSBF_MASK   0x2000
+#define SPI_CMD_RX_ENDIAN_MASK   

[PATCH v2 2/4] dt-bindings: ARM: Mediatek: Document devicetree bindings for spi bus

[Leilk Liu]

Signed-off-by: Leilk Liu 
---
 .../devicetree/bindings/spi/spi-mt65xx.txt | 32 ++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt 
b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
new file mode 100644
index 000..04c28fd
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt
@@ -0,0 +1,32 @@
+MTK SPI device
+
+Required properties:
+- compatible: should be one of the following.
+- mediatek,mt8173-spi: for mt8173 platforms
+- mediatek,mt8135-spi: for mt8135 platforms
+- mediatek,mt6589-spi: for mt6589 platforms
+
+- reg: Address and length of the register set for the device
+
+- interrupts: Should contain spi interrupt
+
+- clock-names: tuple listing input clock names.
+   Required elements: "main"
+
+- clocks: phandles to input clocks.
+
+- pad-select: should specify spi pad used, only required for MT8173.
+   This value should be 0~3.
+
+Example:
+
+- SoC Specific Portion:
+spi: spi@1100a000 {
+   compatible = "mediatek,mt8173-spi";
+   reg = <0 0x1100a000 0 0x1000>;
+   interrupts = ;
+   clocks = <&pericfg PERI_SPI0>;
+   clock-names = "main";
+   pad-select = <1>;
+   status = "disabled";
+};
-- 
1.8.1.1.dirty

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[PATCH v2 0/4] Add Mediatek SPI bus driver

[Leilk Liu]

Mediatek SPI BUS controller has 3 hardware restrictions:
1. Hw has the restriction that in one transfer, length must be a multiple of
   1024, when it's greater than 1024bytes.
2. Hw tx/rx have 4bytes aligned restriction.
3. For MT8173 IC: RX must enable TX, then TX transfer dummy data; TX don't need
   to enable RX.
Some workarounds are done in SPI driver code base on v4.1-rc1.

Change in v2:
1. Remove spi bitbang framwork, use can_dma() and transfer_one().
2. Add PM functions.
3. Fix Mark Brown review comment.

Leilk Liu (4):
  spi: support spi without dma channel to use can_dma()
  dt-bindings: ARM: Mediatek: Document devicetree bindings for spi bus
  spi: mediatek: Add spi bus for Mediatek MT8173
  arm64: dts: Add spi bus dts

 .../devicetree/bindings/spi/spi-mt65xx.txt |  32 +
 arch/arm64/boot/dts/mediatek/mt8173.dtsi   |   9 +
 drivers/spi/Kconfig|   9 +
 drivers/spi/Makefile   |   1 +
 drivers/spi/spi-mt65xx.c   | 656 +
 drivers/spi/spi.c  |  22 +-
 6 files changed, 725 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt
 create mode 100644 drivers/spi/spi-mt65xx.c

--
1.8.1.1.dirty

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