Re: [PATCH] pinctrl: qcom: Add msm8996 pinctrl driver
On Wed, Nov 18, 2015 at 1:35 AM, Stephen Boyd wrote: > From: Joonwoo Park > > Add initial pinctrl driver to support pin configuration with > pinctrl framework for msm8996. > > Cc: > Cc: Bjorn Andersson > Signed-off-by: Joonwoo Park > [sb...@codeaurora.org: Remove duplicate entries and enums] > Signed-off-by: Stephen Boyd Patch applied with the ACKs! Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] pinctrl: qcom: Add msm8996 pinctrl driver
On Tue 17 Nov 16:35 PST 2015, Stephen Boyd wrote: > From: Joonwoo Park > > Add initial pinctrl driver to support pin configuration with > pinctrl framework for msm8996. > > Cc: > Cc: Bjorn Andersson > Signed-off-by: Joonwoo Park > [sb...@codeaurora.org: Remove duplicate entries and enums] > Signed-off-by: Stephen Boyd > --- Acked-by: Bjorn Andersson Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] pinctrl: qcom: Add msm8996 pinctrl driver
On Tue, Nov 17, 2015 at 04:35:46PM -0800, Stephen Boyd wrote: > From: Joonwoo Park > > Add initial pinctrl driver to support pin configuration with > pinctrl framework for msm8996. > > Cc: > Cc: Bjorn Andersson > Signed-off-by: Joonwoo Park > [sb...@codeaurora.org: Remove duplicate entries and enums] > Signed-off-by: Stephen Boyd > --- > .../bindings/pinctrl/qcom,msm8996-pinctrl.txt | 199 ++ For the binding: Acked-by: Rob Herring > drivers/pinctrl/qcom/Kconfig |8 + > drivers/pinctrl/qcom/Makefile |1 + > drivers/pinctrl/qcom/pinctrl-msm8996.c | 1942 > > 4 files changed, 2150 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt > create mode 100644 drivers/pinctrl/qcom/pinctrl-msm8996.c > > diff --git > a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt > b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt > new file mode 100644 > index ..e312a71b2f94 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt > @@ -0,0 +1,199 @@ > +Qualcomm MSM8996 TLMM block > + > +This binding describes the Top Level Mode Multiplexer block found in the > +MSM8996 platform. > + > +- compatible: > + Usage: required > + Value type: > + Definition: must be "qcom,msm8996-pinctrl" > + > +- reg: > + Usage: required > + Value type: > + Definition: the base address and size of the TLMM register space. > + > +- interrupts: > + Usage: required > + Value type: > + Definition: should specify the TLMM summary IRQ. > + > +- interrupt-controller: > + Usage: required > + Value type: > + Definition: identifies this node as an interrupt controller > + > +- #interrupt-cells: > + Usage: required > + Value type: > + Definition: must be 2. Specifying the pin number and flags, as defined > + in > + > +- gpio-controller: > + Usage: required > + Value type: > + Definition: identifies this node as a gpio controller > + > +- #gpio-cells: > + Usage: required > + Value type: > + Definition: must be 2. Specifying the pin number and flags, as defined > + in > + > +Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt > for > +a general description of GPIO and interrupt bindings. > + > +Please refer to pinctrl-bindings.txt in this directory for details of the > +common pinctrl bindings used by client devices, including the meaning of the > +phrase "pin configuration node". > + > +The pin configuration nodes act as a container for an arbitrary number of > +subnodes. Each of these subnodes represents some desired configuration for a > +pin, a group, or a list of pins or groups. This configuration can include the > +mux function to select on those pin(s)/group(s), and various pin > configuration > +parameters, such as pull-up, drive strength, etc. > + > + > +PIN CONFIGURATION NODES: > + > +The name of each subnode is not important; all subnodes should be enumerated > +and processed purely based on their content. > + > +Each subnode only affects those parameters that are explicitly listed. In > +other words, a subnode that lists a mux function but no pin configuration > +parameters implies no information about any pin configuration parameters. > +Similarly, a pin subnode that describes a pullup parameter implies no > +information about e.g. the mux function. > + > + > +The following generic properties as defined in pinctrl-bindings.txt are valid > +to specify in a pin configuration subnode: > + > +- pins: > + Usage: required > + Value type: > + Definition: List of gpio pins affected by the properties specified in > + this subnode. > + > + Valid pins are: > + gpio0-gpio149 > + Supports mux, bias and drive-strength > + > + sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd, > + sdc2_data sdc1_rclk > + Supports bias and drive-strength > + > +- function: > + Usage: required > + Value type: > + Definition: Specify the alternative function to be configured for the > + specified pins. Functions are only valid for gpio pins. > + Valid values are: > + > + blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens, > + bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8, > + qdss_cti_trig_out_b, bimc_dte0, dac_calib1, > qdss_cti_trig_in_b, > + dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, > blsp_uart10, > + blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, > atest_usb12, > + mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11, > + atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_g
[PATCH] pinctrl: qcom: Add msm8996 pinctrl driver
From: Joonwoo Park Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8996. Cc: Cc: Bjorn Andersson Signed-off-by: Joonwoo Park [sb...@codeaurora.org: Remove duplicate entries and enums] Signed-off-by: Stephen Boyd --- .../bindings/pinctrl/qcom,msm8996-pinctrl.txt | 199 ++ drivers/pinctrl/qcom/Kconfig |8 + drivers/pinctrl/qcom/Makefile |1 + drivers/pinctrl/qcom/pinctrl-msm8996.c | 1942 4 files changed, 2150 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt create mode 100644 drivers/pinctrl/qcom/pinctrl-msm8996.c diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt new file mode 100644 index ..e312a71b2f94 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt @@ -0,0 +1,199 @@ +Qualcomm MSM8996 TLMM block + +This binding describes the Top Level Mode Multiplexer block found in the +MSM8996 platform. + +- compatible: + Usage: required + Value type: + Definition: must be "qcom,msm8996-pinctrl" + +- reg: + Usage: required + Value type: + Definition: the base address and size of the TLMM register space. + +- interrupts: + Usage: required + Value type: + Definition: should specify the TLMM summary IRQ. + +- interrupt-controller: + Usage: required + Value type: + Definition: identifies this node as an interrupt controller + +- #interrupt-cells: + Usage: required + Value type: + Definition: must be 2. Specifying the pin number and flags, as defined + in + +- gpio-controller: + Usage: required + Value type: + Definition: identifies this node as a gpio controller + +- #gpio-cells: + Usage: required + Value type: + Definition: must be 2. Specifying the pin number and flags, as defined + in + +Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for +a general description of GPIO and interrupt bindings. + +Please refer to pinctrl-bindings.txt in this directory for details of the +common pinctrl bindings used by client devices, including the meaning of the +phrase "pin configuration node". + +The pin configuration nodes act as a container for an arbitrary number of +subnodes. Each of these subnodes represents some desired configuration for a +pin, a group, or a list of pins or groups. This configuration can include the +mux function to select on those pin(s)/group(s), and various pin configuration +parameters, such as pull-up, drive strength, etc. + + +PIN CONFIGURATION NODES: + +The name of each subnode is not important; all subnodes should be enumerated +and processed purely based on their content. + +Each subnode only affects those parameters that are explicitly listed. In +other words, a subnode that lists a mux function but no pin configuration +parameters implies no information about any pin configuration parameters. +Similarly, a pin subnode that describes a pullup parameter implies no +information about e.g. the mux function. + + +The following generic properties as defined in pinctrl-bindings.txt are valid +to specify in a pin configuration subnode: + +- pins: + Usage: required + Value type: + Definition: List of gpio pins affected by the properties specified in + this subnode. + + Valid pins are: + gpio0-gpio149 + Supports mux, bias and drive-strength + + sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd, + sdc2_data sdc1_rclk + Supports bias and drive-strength + +- function: + Usage: required + Value type: + Definition: Specify the alternative function to be configured for the + specified pins. Functions are only valid for gpio pins. + Valid values are: + + blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens, + bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8, + qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b, + dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10, + blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12, + mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11, + atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char, + cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b, + pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c, + qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4, +
