Re: [PATCH V11 3/7] dma: add Qualcomm Technologies HIDMA management driver

2016-01-04 Thread Andy Shevchenko
On Mon, Jan 4, 2016 at 2:06 AM, Sinan Kaya  wrote:
> The Qualcomm Technologies HIDMA device has been designed to support
> virtualization technology. The driver has been divided into two to follow
> the hardware design.
>
> 1. HIDMA Management driver
> 2. HIDMA Channel driver
>
> Each HIDMA HW consists of multiple channels. These channels share some set
> of common parameters. These parameters are initialized by the management
> driver during power up. Same management driver is used for monitoring the
> execution of the channels. Management driver can change the performance
> behavior dynamically such as bandwidth allocation and prioritization.
>
> The management driver is executed in hypervisor context and is the main
> management entity for all channels provided by the device.
>
> Signed-off-by: Sinan Kaya 
> Reviewed-by: Andy Shevchenko 
> ---
>  .../ABI/testing/sysfs-platform-hidma-mgmt  |  97 +++
>  drivers/dma/qcom/Kconfig   |  11 +
>  drivers/dma/qcom/Makefile  |   2 +
>  drivers/dma/qcom/hidma_mgmt.c  | 302 
> +
>  drivers/dma/qcom/hidma_mgmt.h  |  39 +++
>  drivers/dma/qcom/hidma_mgmt_sys.c  | 295 
>  6 files changed, 746 insertions(+)
>  create mode 100644 Documentation/ABI/testing/sysfs-platform-hidma-mgmt
>  create mode 100644 drivers/dma/qcom/hidma_mgmt.c
>  create mode 100644 drivers/dma/qcom/hidma_mgmt.h
>  create mode 100644 drivers/dma/qcom/hidma_mgmt_sys.c
>
> diff --git a/Documentation/ABI/testing/sysfs-platform-hidma-mgmt 
> b/Documentation/ABI/testing/sysfs-platform-hidma-mgmt
> new file mode 100644
> index 000..c2fb5d0
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-platform-hidma-mgmt
> @@ -0,0 +1,97 @@
> +What:  /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
> +   /sys/devices/platform/QCOM8060:*/chanops/chan*/priority
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains either 0 or 1 and indicates if the DMA channel is a
> +   low priority (0) or high priority (1) channel.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
> +   /sys/devices/platform/QCOM8060:*/chanops/chan*/weight
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains 0..15 and indicates the weight of the channel among
> +   equal priority channels during round robin scheduling.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
> +   /sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains the platform specific cycle value to wait after a
> +   reset command is issued. If the value is chosen too short,
> +   then the HW will issue a reset failure interrupt. The value
> +   is platform specific and should not be changed without
> +   consultance.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/dma_channels
> +   /sys/devices/platform/QCOM8060:*/dma_channels
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains the number of dma channels supported by one instance
> +   of HIDMA hardware. The value may change from chip to chip.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/hw_version_major
> +   /sys/devices/platform/QCOM8060:*/hw_version_major
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Version number major for the hardware.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/hw_version_minor
> +   /sys/devices/platform/QCOM8060:*/hw_version_minor
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Version number minor for the hardware.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/max_rd_xactions
> +   /sys/devices/platform/QCOM8060:*/max_rd_xactions
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains a value between 0 and 31. Maximum number of
> +   read transactions that can be issued back to back.
> +   Choosing a higher number gives better performance but
> +   can also cause performance reduction to other peripherals
> +   sharing the same bus.
> +
> +What:  

Re: [PATCH V11 3/7] dma: add Qualcomm Technologies HIDMA management driver

2016-01-04 Thread Vinod Koul
On Mon, Jan 04, 2016 at 08:37:30PM +0200, Andy Shevchenko wrote:

> > +static int set_priority(struct hidma_mgmt_dev *mdev, unsigned int i, u64 
> > val)
> > +{
> > +   u64 tmp;
> > +   int rc;
> > +
> > +   if (i > mdev->dma_channels)
> 
> Shouldn't be >= ? I somehow missed that.

There is no merit is posting not related context while replying, makes your
emails harder to read, please fix that

> > +   return -EINVAL;
> > +
> > +   tmp = mdev->priority[i];
> > +   mdev->priority[i] = val;
> > +   rc = hidma_mgmt_setup(mdev);
> > +   if (rc)
> > +   mdev->priority[i] = tmp;
> > +   return rc;
> > +}
> > +
> > +static int set_weight(struct hidma_mgmt_dev *mdev, unsigned int i, u64 val)
> > +{
> > +   u64 tmp;
> > +   int rc;
> > +
> > +   if (i > mdev->dma_channels)
> 
> Ditto.

Exactly, ditto...


-- 
~Vinod
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[PATCH V11 3/7] dma: add Qualcomm Technologies HIDMA management driver

2016-01-03 Thread Sinan Kaya
The Qualcomm Technologies HIDMA device has been designed to support
virtualization technology. The driver has been divided into two to follow
the hardware design.

1. HIDMA Management driver
2. HIDMA Channel driver

Each HIDMA HW consists of multiple channels. These channels share some set
of common parameters. These parameters are initialized by the management
driver during power up. Same management driver is used for monitoring the
execution of the channels. Management driver can change the performance
behavior dynamically such as bandwidth allocation and prioritization.

The management driver is executed in hypervisor context and is the main
management entity for all channels provided by the device.

Signed-off-by: Sinan Kaya 
Reviewed-by: Andy Shevchenko 
---
 .../ABI/testing/sysfs-platform-hidma-mgmt  |  97 +++
 drivers/dma/qcom/Kconfig   |  11 +
 drivers/dma/qcom/Makefile  |   2 +
 drivers/dma/qcom/hidma_mgmt.c  | 302 +
 drivers/dma/qcom/hidma_mgmt.h  |  39 +++
 drivers/dma/qcom/hidma_mgmt_sys.c  | 295 
 6 files changed, 746 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-platform-hidma-mgmt
 create mode 100644 drivers/dma/qcom/hidma_mgmt.c
 create mode 100644 drivers/dma/qcom/hidma_mgmt.h
 create mode 100644 drivers/dma/qcom/hidma_mgmt_sys.c

diff --git a/Documentation/ABI/testing/sysfs-platform-hidma-mgmt 
b/Documentation/ABI/testing/sysfs-platform-hidma-mgmt
new file mode 100644
index 000..c2fb5d0
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-platform-hidma-mgmt
@@ -0,0 +1,97 @@
+What:  /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
+   /sys/devices/platform/QCOM8060:*/chanops/chan*/priority
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Contains either 0 or 1 and indicates if the DMA channel is a
+   low priority (0) or high priority (1) channel.
+
+What:  /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
+   /sys/devices/platform/QCOM8060:*/chanops/chan*/weight
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Contains 0..15 and indicates the weight of the channel among
+   equal priority channels during round robin scheduling.
+
+What:  /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
+   /sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Contains the platform specific cycle value to wait after a
+   reset command is issued. If the value is chosen too short,
+   then the HW will issue a reset failure interrupt. The value
+   is platform specific and should not be changed without
+   consultance.
+
+What:  /sys/devices/platform/hidma-mgmt*/dma_channels
+   /sys/devices/platform/QCOM8060:*/dma_channels
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Contains the number of dma channels supported by one instance
+   of HIDMA hardware. The value may change from chip to chip.
+
+What:  /sys/devices/platform/hidma-mgmt*/hw_version_major
+   /sys/devices/platform/QCOM8060:*/hw_version_major
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Version number major for the hardware.
+
+What:  /sys/devices/platform/hidma-mgmt*/hw_version_minor
+   /sys/devices/platform/QCOM8060:*/hw_version_minor
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Version number minor for the hardware.
+
+What:  /sys/devices/platform/hidma-mgmt*/max_rd_xactions
+   /sys/devices/platform/QCOM8060:*/max_rd_xactions
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Contains a value between 0 and 31. Maximum number of
+   read transactions that can be issued back to back.
+   Choosing a higher number gives better performance but
+   can also cause performance reduction to other peripherals
+   sharing the same bus.
+
+What:  /sys/devices/platform/hidma-mgmt*/max_read_request
+   /sys/devices/platform/QCOM8060:*/max_read_request
+Date:  Nov 2015
+KernelVersion: 4.4
+Contact:   "Sinan Kaya "
+Description:
+   Size of each read request. The value needs to be a