Re: [PATCH v2 1/4] drivers: clk: st: Support for enable/disable in Clockgen PLLs

[Stephen Boyd]

On 08/24, Gabriel Fernandez wrote:
> The patch adds support for enable/disable of the Clockgen PLLs.
> clkgen_pll_enable/clkgen_pll_disable added as generic function for all PLLs.
> 
> Signed-off-by: Pankaj Dev 
> Signed-off-by: Gabriel Fernandez 
> ---

Applied to clk-next

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[PATCH v2 1/4] drivers: clk: st: Support for enable/disable in Clockgen PLLs

[Gabriel Fernandez]

The patch adds support for enable/disable of the Clockgen PLLs.
clkgen_pll_enable/clkgen_pll_disable added as generic function for all PLLs.

Signed-off-by: Pankaj Dev 
Signed-off-by: Gabriel Fernandez 
---
 drivers/clk/st/clkgen-pll.c | 92 -
 1 file changed, 91 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index b2a332c..7ee485d 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "clkgen.h"
 
@@ -43,6 +44,7 @@ static DEFINE_SPINLOCK(clkgena_c32_odf_lock);
 
 struct clkgen_pll_data {
struct clkgen_field pdn_status;
+   struct clkgen_field pdn_ctrl;
struct clkgen_field locked_status;
struct clkgen_field mdiv;
struct clkgen_field ndiv;
@@ -62,6 +64,7 @@ static const struct clk_ops st_pll1200c32_ops;
 
 static const struct clkgen_pll_data st_pll1600c65_ax = {
.pdn_status = CLKGEN_FIELD(0x0, 0x1,19),
+   .pdn_ctrl   = CLKGEN_FIELD(0x10,0x1,0),
.locked_status  = CLKGEN_FIELD(0x0, 0x1,31),
.mdiv   = CLKGEN_FIELD(0x0, C65_MDIV_PLL1600_MASK,  0),
.ndiv   = CLKGEN_FIELD(0x0, C65_NDIV_MASK,  8),
@@ -70,6 +73,7 @@ static const struct clkgen_pll_data st_pll1600c65_ax = {
 
 static const struct clkgen_pll_data st_pll800c65_ax = {
.pdn_status = CLKGEN_FIELD(0x0, 0x1,19),
+   .pdn_ctrl   = CLKGEN_FIELD(0xC, 0x1,1),
.locked_status  = CLKGEN_FIELD(0x0, 0x1,31),
.mdiv   = CLKGEN_FIELD(0x0, C65_MDIV_PLL800_MASK,   0),
.ndiv   = CLKGEN_FIELD(0x0, C65_NDIV_MASK,  8),
@@ -79,6 +83,7 @@ static const struct clkgen_pll_data st_pll800c65_ax = {
 
 static const struct clkgen_pll_data st_pll3200c32_a1x_0 = {
.pdn_status = CLKGEN_FIELD(0x0, 0x1,31),
+   .pdn_ctrl   = CLKGEN_FIELD(0x18,0x1,0),
.locked_status  = CLKGEN_FIELD(0x4, 0x1,31),
.ndiv   = CLKGEN_FIELD(0x0, C32_NDIV_MASK,  0x0),
.idf= CLKGEN_FIELD(0x4, C32_IDF_MASK,   0x0),
@@ -96,6 +101,7 @@ static const struct clkgen_pll_data st_pll3200c32_a1x_0 = {
 
 static const struct clkgen_pll_data st_pll3200c32_a1x_1 = {
.pdn_status = CLKGEN_FIELD(0xC, 0x1,31),
+   .pdn_ctrl   = CLKGEN_FIELD(0x18,0x1,1),
.locked_status  = CLKGEN_FIELD(0x10,0x1,31),
.ndiv   = CLKGEN_FIELD(0xC, C32_NDIV_MASK,  0x0),
.idf= CLKGEN_FIELD(0x10,C32_IDF_MASK,   0x0),
@@ -114,6 +120,7 @@ static const struct clkgen_pll_data st_pll3200c32_a1x_1 = {
 /* 415 specific */
 static const struct clkgen_pll_data st_pll3200c32_a9_415 = {
.pdn_status = CLKGEN_FIELD(0x0, 0x1,0),
+   .pdn_ctrl   = CLKGEN_FIELD(0x0, 0x1,0),
.locked_status  = CLKGEN_FIELD(0x6C,0x1,0),
.ndiv   = CLKGEN_FIELD(0x0, C32_NDIV_MASK,  9),
.idf= CLKGEN_FIELD(0x0, C32_IDF_MASK,   22),
@@ -125,6 +132,7 @@ static const struct clkgen_pll_data st_pll3200c32_a9_415 = {
 
 static const struct clkgen_pll_data st_pll3200c32_ddr_415 = {
.pdn_status = CLKGEN_FIELD(0x0, 0x1,0),
+   .pdn_ctrl   = CLKGEN_FIELD(0x0, 0x1,0),
.locked_status  = CLKGEN_FIELD(0x100,   0x1,0),
.ndiv   = CLKGEN_FIELD(0x8, C32_NDIV_MASK,  0),
.idf= CLKGEN_FIELD(0x0, C32_IDF_MASK,   25),
@@ -137,7 +145,8 @@ static const struct clkgen_pll_data st_pll3200c32_ddr_415 = 
{
 };
 
 static const struct clkgen_pll_data st_pll1200c32_gpu_415 = {
-   .pdn_status = CLKGEN_FIELD(0x144,   0x1,3),
+   .pdn_status = CLKGEN_FIELD(0x4, 0x1,0),
+   .pdn_ctrl   = CLKGEN_FIELD(0x4, 0x1,0),
.locked_status  = CLKGEN_FIELD(0x168,   0x1,0),
.ldf= CLKGEN_FIELD(0x0, C32_LDF_MASK,   3),
.idf= CLKGEN_FIELD(0x0, C32_IDF_MASK,   0),
@@ -149,6 +158,7 @@ static const struct clkgen_pll_data st_pll1200c32_gpu_415 = 
{
 /* 416 specific */
 static const struct clkgen_pll_data st_pll3200c32_a9_416 = {
.pdn_status = CLKGEN_FIELD(0x0, 0x1,0),
+   .pdn_ctrl   = CLKGEN_FIELD(0x0, 0x1,0),
.locked_status  = CLKGEN_FIELD(0x6C,0x1,