Re: [PATCH v2 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 platform

2015-07-24 Thread Andy Gross
On Tue, Jul 21, 2015 at 04:04:46PM +0530, Archit Taneja wrote:
> Enable the NAND controller node on the AP148 platform. Provide pinmux
> information.
> 
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja 
> ---

Looks fine.

Reviewed-by: Andy Gross 


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Re: [PATCH v2 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 platform

2015-07-24 Thread Andy Gross
On Tue, Jul 21, 2015 at 04:04:46PM +0530, Archit Taneja wrote:
> Enable the NAND controller node on the AP148 platform. Provide pinmux
> information.
> 
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Archit Taneja 
> ---

One nit though.  The subject mispells Enable.

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[PATCH v2 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 platform

2015-07-21 Thread Archit Taneja
Enable the NAND controller node on the AP148 platform. Provide pinmux
information.

Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja 
---
 arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts 
b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
index 7f9ea50..03fd6b7 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -30,6 +30,28 @@
bias-none;
};
};
+   nand_pins: nand_pins {
+   mux {
+   pins = "gpio34", "gpio35", "gpio36",
+  "gpio37", "gpio38", "gpio39",
+  "gpio40", "gpio41", "gpio42",
+  "gpio43", "gpio44", "gpio45",
+  "gpio46", "gpio47";
+   function = "nand";
+   drive-strength = <10>;
+   bias-disable;
+   };
+   pullups {
+   pins = "gpio39";
+   bias-pull-up;
+   };
+   hold {
+   pins = "gpio40", "gpio41", "gpio42",
+  "gpio43", "gpio44", "gpio45",
+  "gpio46", "gpio47";
+   bias-bus-hold;
+   };
+   };
};
 
gsbi@1630 {
@@ -93,5 +115,19 @@
sata@2900 {
status = "ok";
};
+
+   nand@0x1ac0 {
+   status = "ok";
+
+   pinctrl-0 = <&nand_pins>;
+   pinctrl-names = "default";
+
+   nand-ecc-strength = <4>;
+   nand-bus-width = <8>;
+   };
};
 };
+
+&adm_dma {
+   status = "ok";
+};
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