Re: [PATCH v3 07/10] clk: iproc: Separate status and control variables

2015-10-21 Thread Stephen Boyd
On 10/15, Jon Mason wrote:
> Some PLLs have separate registers for Status and Control.  The means the
> pll_base needs to be split into 2 new variables, so that those PLLs can
> specify device tree registers for those independently.  Also, add a new
> driver flag to identify this presence of the split, and let the driver
> know that additional registers need to be used.
> 
> Signed-off-by: Jon Mason 
> ---

Applied to clk-iproc

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[PATCH v3 07/10] clk: iproc: Separate status and control variables

2015-10-15 Thread Jon Mason
Some PLLs have separate registers for Status and Control.  The means the
pll_base needs to be split into 2 new variables, so that those PLLs can
specify device tree registers for those independently.  Also, add a new
driver flag to identify this presence of the split, and let the driver
know that additional registers need to be used.

Signed-off-by: Jon Mason 
---
 drivers/clk/bcm/clk-iproc-pll.c | 96 -
 drivers/clk/bcm/clk-iproc.h |  6 +++
 2 files changed, 62 insertions(+), 40 deletions(-)

diff --git a/drivers/clk/bcm/clk-iproc-pll.c b/drivers/clk/bcm/clk-iproc-pll.c
index d4aab4e..f128a9d 100644
--- a/drivers/clk/bcm/clk-iproc-pll.c
+++ b/drivers/clk/bcm/clk-iproc-pll.c
@@ -74,7 +74,8 @@ struct iproc_clk {
 };
 
 struct iproc_pll {
-   void __iomem *pll_base;
+   void __iomem *status_base;
+   void __iomem *control_base;
void __iomem *pwr_base;
void __iomem *asiu_base;
 
@@ -127,7 +128,7 @@ static int pll_wait_for_lock(struct iproc_pll *pll)
const struct iproc_pll_ctrl *ctrl = pll->ctrl;
 
for (i = 0; i < LOCK_DELAY; i++) {
-   u32 val = readl(pll->pll_base + ctrl->status.offset);
+   u32 val = readl(pll->status_base + ctrl->status.offset);
 
if (val & (1 << ctrl->status.shift))
return 0;
@@ -145,7 +146,7 @@ static void iproc_pll_write(const struct iproc_pll *pll, 
void __iomem *base,
writel(val, base + offset);
 
if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK &&
-base == pll->pll_base))
+(base == pll->status_base || base == pll->control_base)))
val = readl(base + offset);
 }
 
@@ -161,9 +162,9 @@ static void __pll_disable(struct iproc_pll *pll)
}
 
if (ctrl->flags & IPROC_CLK_EMBED_PWRCTRL) {
-   val = readl(pll->pll_base + ctrl->aon.offset);
+   val = readl(pll->control_base + ctrl->aon.offset);
val |= (bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);
-   iproc_pll_write(pll, pll->pll_base, ctrl->aon.offset, val);
+   iproc_pll_write(pll, pll->control_base, ctrl->aon.offset, val);
}
 
if (pll->pwr_base) {
@@ -184,9 +185,9 @@ static int __pll_enable(struct iproc_pll *pll)
u32 val;
 
if (ctrl->flags & IPROC_CLK_EMBED_PWRCTRL) {
-   val = readl(pll->pll_base + ctrl->aon.offset);
+   val = readl(pll->control_base + ctrl->aon.offset);
val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);
-   iproc_pll_write(pll, pll->pll_base, ctrl->aon.offset, val);
+   iproc_pll_write(pll, pll->control_base, ctrl->aon.offset, val);
}
 
if (pll->pwr_base) {
@@ -213,9 +214,9 @@ static void __pll_put_in_reset(struct iproc_pll *pll)
const struct iproc_pll_ctrl *ctrl = pll->ctrl;
const struct iproc_pll_reset_ctrl *reset = &ctrl->reset;
 
-   val = readl(pll->pll_base + reset->offset);
+   val = readl(pll->control_base + reset->offset);
val &= ~(1 << reset->reset_shift | 1 << reset->p_reset_shift);
-   iproc_pll_write(pll, pll->pll_base, reset->offset, val);
+   iproc_pll_write(pll, pll->control_base, reset->offset, val);
 }
 
 static void __pll_bring_out_reset(struct iproc_pll *pll, unsigned int kp,
@@ -226,17 +227,17 @@ static void __pll_bring_out_reset(struct iproc_pll *pll, 
unsigned int kp,
const struct iproc_pll_reset_ctrl *reset = &ctrl->reset;
const struct iproc_pll_dig_filter_ctrl *dig_filter = &ctrl->dig_filter;
 
-   val = readl(pll->pll_base + dig_filter->offset);
+   val = readl(pll->control_base + dig_filter->offset);
val &= ~(bit_mask(dig_filter->ki_width) << dig_filter->ki_shift |
bit_mask(dig_filter->kp_width) << dig_filter->kp_shift |
bit_mask(dig_filter->ka_width) << dig_filter->ka_shift);
val |= ki << dig_filter->ki_shift | kp << dig_filter->kp_shift |
   ka << dig_filter->ka_shift;
-   iproc_pll_write(pll, pll->pll_base, dig_filter->offset, val);
+   iproc_pll_write(pll, pll->control_base, dig_filter->offset, val);
 
-   val = readl(pll->pll_base + reset->offset);
+   val = readl(pll->control_base + reset->offset);
val |= 1 << reset->reset_shift | 1 << reset->p_reset_shift;
-   iproc_pll_write(pll, pll->pll_base, reset->offset, val);
+   iproc_pll_write(pll, pll->control_base, reset->offset, val);
 }
 
 static int pll_set_rate(struct iproc_clk *clk, unsigned int rate_index,
@@ -291,9 +292,9 @@ static int pll_set_rate(struct iproc_clk *clk, unsigned int 
rate_index,
/* put PLL in reset */
__pll_put_in_reset(pll);
 
-   iproc_pll_write(pll, pll->pll_base, ctrl->vco_ctrl.u_offset, 0);
+   iproc_pll_write(pll, pll->control_base, ctrl->vco_ctrl.u_offset, 0);
 
-   val = readl(pll->pll_base + ctrl->vc