Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
On Wed, Oct 21, 2015 at 05:22:47PM -0700, Stephen Boyd wrote: > On 10/15, Scott Branden wrote: > > On 15-10-15 02:15 PM, Ray Jui wrote: > > >On 10/15/2015 2:10 PM, Jon Mason wrote: > > >>On Thu, Oct 15, 2015 at 02:04:09PM -0700, Scott Branden wrote: > > >>>On 15-10-15 01:55 PM, Ray Jui wrote: > > On 10/15/2015 1:40 PM, Scott Branden wrote: > > > > If using CONFIG_CLK_NS2, how is it going to be enabled/selected? > > >>> > > >>>Since CONFIG_ARCH_BCM_NS2 isn't "allowed" to be introduced we will > > >>>need to create and select a CONFIG_CLK_BCM_NS2 in the defconfig > > >>>instead. > > >> > > >>Is this better than the binary becoming slightly bigger? I thought > > >>the extra complexity was worse than having an unused chunk of clk code > > >>(and Kona is already doing the same thing above). I believe Ray was > > >>in agreement with me during the internal review of this code. > > >> > > >>Thanks, > > >>Jon > > >> > > > > > >Yes, I'm okay with leaving it as it is. I even prefer changing the > > >current Makefile to make all iProc based core clock drivers and SoC > > >specific clock tables under CONFIG_COMMON_CLK_IPROC, which is what some > > >of the other vendors do. > > > > > I'd leave it exactly as is then rather than pulling in more dead > > code when not needed. This ns2 clock code is very minor compared to > > other code bloat in the kernel and drivers. > > We should really make these visible options that can be selected > by anyone. Having selects in the ARCH config area is simple, but > also has some downsides: > > 1) select is a reverse dependency and is hard for people to > understand and can sometimes be a pain to track down > > 2) build coverage goes down because configs are hidden > > 3) we get code bloat like is being discussed here > > So I'd really like to see someone take a good look at this whole > Makefile situation that's going on and clean it up so that > they're user visible options and then throw the config options > into the defconfig. It isn't going to block this series, but it > would be nice to do at some later point. I'll do a pass at this today and send it out for review. Thanks, Jon > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, > a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
On 10/15, Jon Mason wrote: > The Broadcom Northstar 2 SoC is architected under the iProc > architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, > LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. > > Signed-off-by: Jon Mason > --- Applied to clk-iproc -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
On 10/15, Scott Branden wrote: > On 15-10-15 02:15 PM, Ray Jui wrote: > >On 10/15/2015 2:10 PM, Jon Mason wrote: > >>On Thu, Oct 15, 2015 at 02:04:09PM -0700, Scott Branden wrote: > >>>On 15-10-15 01:55 PM, Ray Jui wrote: > On 10/15/2015 1:40 PM, Scott Branden wrote: > > If using CONFIG_CLK_NS2, how is it going to be enabled/selected? > >>> > >>>Since CONFIG_ARCH_BCM_NS2 isn't "allowed" to be introduced we will > >>>need to create and select a CONFIG_CLK_BCM_NS2 in the defconfig > >>>instead. > >> > >>Is this better than the binary becoming slightly bigger? I thought > >>the extra complexity was worse than having an unused chunk of clk code > >>(and Kona is already doing the same thing above). I believe Ray was > >>in agreement with me during the internal review of this code. > >> > >>Thanks, > >>Jon > >> > > > >Yes, I'm okay with leaving it as it is. I even prefer changing the > >current Makefile to make all iProc based core clock drivers and SoC > >specific clock tables under CONFIG_COMMON_CLK_IPROC, which is what some > >of the other vendors do. > > > I'd leave it exactly as is then rather than pulling in more dead > code when not needed. This ns2 clock code is very minor compared to > other code bloat in the kernel and drivers. We should really make these visible options that can be selected by anyone. Having selects in the ARCH config area is simple, but also has some downsides: 1) select is a reverse dependency and is hard for people to understand and can sometimes be a pain to track down 2) build coverage goes down because configs are hidden 3) we get code bloat like is being discussed here So I'd really like to see someone take a good look at this whole Makefile situation that's going on and clean it up so that they're user visible options and then throw the config options into the defconfig. It isn't going to block this series, but it would be nice to do at some later point. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
On 15-10-15 02:15 PM, Ray Jui wrote: On 10/15/2015 2:10 PM, Jon Mason wrote: On Thu, Oct 15, 2015 at 02:04:09PM -0700, Scott Branden wrote: Hi Ray, Comment at near end. On 15-10-15 01:55 PM, Ray Jui wrote: On 10/15/2015 1:40 PM, Scott Branden wrote: We need some sort of kconfig option to differentiate NS2 clock driver >from being pulled in all the time. On 15-10-15 12:48 PM, Jon Mason wrote: The Broadcom Northstar 2 SoC is architected under the iProc architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. Signed-off-by: Jon Mason --- drivers/clk/Makefile| 2 +- drivers/clk/bcm/Makefile| 1 + drivers/clk/bcm/clk-ns2.c | 288 include/dt-bindings/clock/bcm-ns2.h | 72 + 4 files changed, 362 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/bcm/clk-ns2.c create mode 100644 include/dt-bindings/clock/bcm-ns2.h diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index d08b3e5..6124bd3 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X)+= clk-wm831x.o obj-$(CONFIG_COMMON_CLK_XGENE)+= clk-xgene.o obj-$(CONFIG_COMMON_CLK_PWM)+= clk-pwm.o obj-$(CONFIG_COMMON_CLK_AT91)+= at91/ -obj-$(CONFIG_ARCH_BCM)+= bcm/ +obj-y+= bcm/ obj-$(CONFIG_ARCH_BERLIN)+= berlin/ obj-$(CONFIG_ARCH_HISI)+= hisilicon/ obj-$(CONFIG_ARCH_MXC)+= imx/ diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile index e258b28..2d1cbc5 100644 --- a/drivers/clk/bcm/Makefile +++ b/drivers/clk/bcm/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_CLK_BCM_KONA)+= clk-kona-setup.o obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm281xx.o obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm21664.o obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o +obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-ns2.o NS2 code is dragged in for all IPROC SoCs. We need a config option for NS2 (CONFIG_ARCH_BCM_NS2) to avoid this (if Arnd allows this for ARMv8 processors... ?). You can see below ARMv7 processors don't have this problem. The arm64 maintainers (Catalin, Mark, and etc.) stated they only want one ARCH options per chip family. If not we need to add CONFIG_CLK_NS2. If using CONFIG_CLK_NS2, how is it going to be enabled/selected? Since CONFIG_ARCH_BCM_NS2 isn't "allowed" to be introduced we will need to create and select a CONFIG_CLK_BCM_NS2 in the defconfig instead. Is this better than the binary becoming slightly bigger? I thought the extra complexity was worse than having an unused chunk of clk code (and Kona is already doing the same thing above). I believe Ray was in agreement with me during the internal review of this code. Thanks, Jon Yes, I'm okay with leaving it as it is. I even prefer changing the current Makefile to make all iProc based core clock drivers and SoC specific clock tables under CONFIG_COMMON_CLK_IPROC, which is what some of the other vendors do. I'd leave it exactly as is then rather than pulling in more dead code when not needed. This ns2 clock code is very minor compared to other code bloat in the kernel and drivers. Ray Regards, Scott -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
On 10/15/2015 2:10 PM, Jon Mason wrote: > On Thu, Oct 15, 2015 at 02:04:09PM -0700, Scott Branden wrote: >> Hi Ray, >> >> Comment at near end. >> >> On 15-10-15 01:55 PM, Ray Jui wrote: >>> >>> >>> On 10/15/2015 1:40 PM, Scott Branden wrote: We need some sort of kconfig option to differentiate NS2 clock driver >>> >from being pulled in all the time. On 15-10-15 12:48 PM, Jon Mason wrote: > The Broadcom Northstar 2 SoC is architected under the iProc > architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, > LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. > > Signed-off-by: Jon Mason > --- > drivers/clk/Makefile| 2 +- > drivers/clk/bcm/Makefile| 1 + > drivers/clk/bcm/clk-ns2.c | 288 > > include/dt-bindings/clock/bcm-ns2.h | 72 + > 4 files changed, 362 insertions(+), 1 deletion(-) > create mode 100644 drivers/clk/bcm/clk-ns2.c > create mode 100644 include/dt-bindings/clock/bcm-ns2.h > > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index d08b3e5..6124bd3 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X)+= clk-wm831x.o > obj-$(CONFIG_COMMON_CLK_XGENE)+= clk-xgene.o > obj-$(CONFIG_COMMON_CLK_PWM)+= clk-pwm.o > obj-$(CONFIG_COMMON_CLK_AT91)+= at91/ > -obj-$(CONFIG_ARCH_BCM)+= bcm/ > +obj-y+= bcm/ > obj-$(CONFIG_ARCH_BERLIN)+= berlin/ > obj-$(CONFIG_ARCH_HISI)+= hisilicon/ > obj-$(CONFIG_ARCH_MXC)+= imx/ > diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile > index e258b28..2d1cbc5 100644 > --- a/drivers/clk/bcm/Makefile > +++ b/drivers/clk/bcm/Makefile > @@ -3,6 +3,7 @@ obj-$(CONFIG_CLK_BCM_KONA)+= clk-kona-setup.o > obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm281xx.o > obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm21664.o > obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-iproc-armpll.o > clk-iproc-pll.o clk-iproc-asiu.o > +obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-ns2.o NS2 code is dragged in for all IPROC SoCs. We need a config option for NS2 (CONFIG_ARCH_BCM_NS2) to avoid this (if Arnd allows this for ARMv8 processors... ?). You can see below ARMv7 processors don't have this problem. >>> >>> The arm64 maintainers (Catalin, Mark, and etc.) stated they only want >>> one ARCH options per chip family. >>> If not we need to add CONFIG_CLK_NS2. >>> >>> If using CONFIG_CLK_NS2, how is it going to be enabled/selected? >> >> Since CONFIG_ARCH_BCM_NS2 isn't "allowed" to be introduced we will >> need to create and select a CONFIG_CLK_BCM_NS2 in the defconfig >> instead. > > Is this better than the binary becoming slightly bigger? I thought > the extra complexity was worse than having an unused chunk of clk code > (and Kona is already doing the same thing above). I believe Ray was > in agreement with me during the internal review of this code. > > Thanks, > Jon > Yes, I'm okay with leaving it as it is. I even prefer changing the current Makefile to make all iProc based core clock drivers and SoC specific clock tables under CONFIG_COMMON_CLK_IPROC, which is what some of the other vendors do. >>> >>> Ray >>> >> >> Regards, >> Scott -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
On Thu, Oct 15, 2015 at 02:04:09PM -0700, Scott Branden wrote: > Hi Ray, > > Comment at near end. > > On 15-10-15 01:55 PM, Ray Jui wrote: > > > > > >On 10/15/2015 1:40 PM, Scott Branden wrote: > >>We need some sort of kconfig option to differentiate NS2 clock driver > >>from being pulled in all the time. > >> > >>On 15-10-15 12:48 PM, Jon Mason wrote: > >>>The Broadcom Northstar 2 SoC is architected under the iProc > >>>architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, > >>>LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. > >>> > >>>Signed-off-by: Jon Mason > >>>--- > >>> drivers/clk/Makefile| 2 +- > >>> drivers/clk/bcm/Makefile| 1 + > >>> drivers/clk/bcm/clk-ns2.c | 288 > >>> > >>> include/dt-bindings/clock/bcm-ns2.h | 72 + > >>> 4 files changed, 362 insertions(+), 1 deletion(-) > >>> create mode 100644 drivers/clk/bcm/clk-ns2.c > >>> create mode 100644 include/dt-bindings/clock/bcm-ns2.h > >>> > >>>diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > >>>index d08b3e5..6124bd3 100644 > >>>--- a/drivers/clk/Makefile > >>>+++ b/drivers/clk/Makefile > >>>@@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X)+= clk-wm831x.o > >>> obj-$(CONFIG_COMMON_CLK_XGENE)+= clk-xgene.o > >>> obj-$(CONFIG_COMMON_CLK_PWM)+= clk-pwm.o > >>> obj-$(CONFIG_COMMON_CLK_AT91)+= at91/ > >>>-obj-$(CONFIG_ARCH_BCM)+= bcm/ > >>>+obj-y+= bcm/ > >>> obj-$(CONFIG_ARCH_BERLIN)+= berlin/ > >>> obj-$(CONFIG_ARCH_HISI)+= hisilicon/ > >>> obj-$(CONFIG_ARCH_MXC)+= imx/ > >>>diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile > >>>index e258b28..2d1cbc5 100644 > >>>--- a/drivers/clk/bcm/Makefile > >>>+++ b/drivers/clk/bcm/Makefile > >>>@@ -3,6 +3,7 @@ obj-$(CONFIG_CLK_BCM_KONA)+= clk-kona-setup.o > >>> obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm281xx.o > >>> obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm21664.o > >>> obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-iproc-armpll.o > >>>clk-iproc-pll.o clk-iproc-asiu.o > >>>+obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-ns2.o > >> > >>NS2 code is dragged in for all IPROC SoCs. We need a config option for > >>NS2 (CONFIG_ARCH_BCM_NS2) to avoid this (if Arnd allows this for ARMv8 > >>processors... ?). > >> > >>You can see below ARMv7 processors don't have this problem. > >> > > > >The arm64 maintainers (Catalin, Mark, and etc.) stated they only want > >one ARCH options per chip family. > > > >>If not we need to add CONFIG_CLK_NS2. > > > >If using CONFIG_CLK_NS2, how is it going to be enabled/selected? > > Since CONFIG_ARCH_BCM_NS2 isn't "allowed" to be introduced we will > need to create and select a CONFIG_CLK_BCM_NS2 in the defconfig > instead. Is this better than the binary becoming slightly bigger? I thought the extra complexity was worse than having an unused chunk of clk code (and Kona is already doing the same thing above). I believe Ray was in agreement with me during the internal review of this code. Thanks, Jon > > > >Ray > > > > Regards, > Scott -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
Hi Ray, Comment at near end. On 15-10-15 01:55 PM, Ray Jui wrote: On 10/15/2015 1:40 PM, Scott Branden wrote: We need some sort of kconfig option to differentiate NS2 clock driver from being pulled in all the time. On 15-10-15 12:48 PM, Jon Mason wrote: The Broadcom Northstar 2 SoC is architected under the iProc architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. Signed-off-by: Jon Mason --- drivers/clk/Makefile| 2 +- drivers/clk/bcm/Makefile| 1 + drivers/clk/bcm/clk-ns2.c | 288 include/dt-bindings/clock/bcm-ns2.h | 72 + 4 files changed, 362 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/bcm/clk-ns2.c create mode 100644 include/dt-bindings/clock/bcm-ns2.h diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index d08b3e5..6124bd3 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X)+= clk-wm831x.o obj-$(CONFIG_COMMON_CLK_XGENE)+= clk-xgene.o obj-$(CONFIG_COMMON_CLK_PWM)+= clk-pwm.o obj-$(CONFIG_COMMON_CLK_AT91)+= at91/ -obj-$(CONFIG_ARCH_BCM)+= bcm/ +obj-y+= bcm/ obj-$(CONFIG_ARCH_BERLIN)+= berlin/ obj-$(CONFIG_ARCH_HISI)+= hisilicon/ obj-$(CONFIG_ARCH_MXC)+= imx/ diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile index e258b28..2d1cbc5 100644 --- a/drivers/clk/bcm/Makefile +++ b/drivers/clk/bcm/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_CLK_BCM_KONA)+= clk-kona-setup.o obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm281xx.o obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm21664.o obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o +obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-ns2.o NS2 code is dragged in for all IPROC SoCs. We need a config option for NS2 (CONFIG_ARCH_BCM_NS2) to avoid this (if Arnd allows this for ARMv8 processors... ?). You can see below ARMv7 processors don't have this problem. The arm64 maintainers (Catalin, Mark, and etc.) stated they only want one ARCH options per chip family. If not we need to add CONFIG_CLK_NS2. If using CONFIG_CLK_NS2, how is it going to be enabled/selected? Since CONFIG_ARCH_BCM_NS2 isn't "allowed" to be introduced we will need to create and select a CONFIG_CLK_BCM_NS2 in the defconfig instead. Ray Regards, Scott -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
On 10/15/2015 1:40 PM, Scott Branden wrote: > We need some sort of kconfig option to differentiate NS2 clock driver > from being pulled in all the time. > > On 15-10-15 12:48 PM, Jon Mason wrote: >> The Broadcom Northstar 2 SoC is architected under the iProc >> architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, >> LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. >> >> Signed-off-by: Jon Mason >> --- >> drivers/clk/Makefile| 2 +- >> drivers/clk/bcm/Makefile| 1 + >> drivers/clk/bcm/clk-ns2.c | 288 >> >> include/dt-bindings/clock/bcm-ns2.h | 72 + >> 4 files changed, 362 insertions(+), 1 deletion(-) >> create mode 100644 drivers/clk/bcm/clk-ns2.c >> create mode 100644 include/dt-bindings/clock/bcm-ns2.h >> >> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile >> index d08b3e5..6124bd3 100644 >> --- a/drivers/clk/Makefile >> +++ b/drivers/clk/Makefile >> @@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X)+= clk-wm831x.o >> obj-$(CONFIG_COMMON_CLK_XGENE)+= clk-xgene.o >> obj-$(CONFIG_COMMON_CLK_PWM)+= clk-pwm.o >> obj-$(CONFIG_COMMON_CLK_AT91)+= at91/ >> -obj-$(CONFIG_ARCH_BCM)+= bcm/ >> +obj-y+= bcm/ >> obj-$(CONFIG_ARCH_BERLIN)+= berlin/ >> obj-$(CONFIG_ARCH_HISI)+= hisilicon/ >> obj-$(CONFIG_ARCH_MXC)+= imx/ >> diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile >> index e258b28..2d1cbc5 100644 >> --- a/drivers/clk/bcm/Makefile >> +++ b/drivers/clk/bcm/Makefile >> @@ -3,6 +3,7 @@ obj-$(CONFIG_CLK_BCM_KONA)+= clk-kona-setup.o >> obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm281xx.o >> obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm21664.o >> obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-iproc-armpll.o >> clk-iproc-pll.o clk-iproc-asiu.o >> +obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-ns2.o > > NS2 code is dragged in for all IPROC SoCs. We need a config option for > NS2 (CONFIG_ARCH_BCM_NS2) to avoid this (if Arnd allows this for ARMv8 > processors... ?). > > You can see below ARMv7 processors don't have this problem. > The arm64 maintainers (Catalin, Mark, and etc.) stated they only want one ARCH options per chip family. > If not we need to add CONFIG_CLK_NS2. If using CONFIG_CLK_NS2, how is it going to be enabled/selected? Ray -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
We need some sort of kconfig option to differentiate NS2 clock driver from being pulled in all the time. On 15-10-15 12:48 PM, Jon Mason wrote: The Broadcom Northstar 2 SoC is architected under the iProc architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. Signed-off-by: Jon Mason --- drivers/clk/Makefile| 2 +- drivers/clk/bcm/Makefile| 1 + drivers/clk/bcm/clk-ns2.c | 288 include/dt-bindings/clock/bcm-ns2.h | 72 + 4 files changed, 362 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/bcm/clk-ns2.c create mode 100644 include/dt-bindings/clock/bcm-ns2.h diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index d08b3e5..6124bd3 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o obj-$(CONFIG_COMMON_CLK_XGENE)+= clk-xgene.o obj-$(CONFIG_COMMON_CLK_PWM) += clk-pwm.o obj-$(CONFIG_COMMON_CLK_AT91) += at91/ -obj-$(CONFIG_ARCH_BCM) += bcm/ +obj-y += bcm/ obj-$(CONFIG_ARCH_BERLIN) += berlin/ obj-$(CONFIG_ARCH_HISI) += hisilicon/ obj-$(CONFIG_ARCH_MXC)+= imx/ diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile index e258b28..2d1cbc5 100644 --- a/drivers/clk/bcm/Makefile +++ b/drivers/clk/bcm/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm281xx.o obj-$(CONFIG_CLK_BCM_KONA)+= clk-bcm21664.o obj-$(CONFIG_COMMON_CLK_IPROC)+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o +obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o NS2 code is dragged in for all IPROC SoCs. We need a config option for NS2 (CONFIG_ARCH_BCM_NS2) to avoid this (if Arnd allows this for ARMv8 processors... ?). You can see below ARMv7 processors don't have this problem. If not we need to add CONFIG_CLK_NS2. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC
The Broadcom Northstar 2 SoC is architected under the iProc
architecture. It has the following PLLs: GENPLL SCR, GENPLL SW,
LCPLL DDR, LCPLL Ports, all derived from an onboard crystal.
Signed-off-by: Jon Mason
---
drivers/clk/Makefile| 2 +-
drivers/clk/bcm/Makefile| 1 +
drivers/clk/bcm/clk-ns2.c | 288
include/dt-bindings/clock/bcm-ns2.h | 72 +
4 files changed, 362 insertions(+), 1 deletion(-)
create mode 100644 drivers/clk/bcm/clk-ns2.c
create mode 100644 include/dt-bindings/clock/bcm-ns2.h
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d08b3e5..6124bd3 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -47,7 +47,7 @@ obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o
obj-$(CONFIG_COMMON_CLK_PWM) += clk-pwm.o
obj-$(CONFIG_COMMON_CLK_AT91) += at91/
-obj-$(CONFIG_ARCH_BCM) += bcm/
+obj-y += bcm/
obj-$(CONFIG_ARCH_BERLIN) += berlin/
obj-$(CONFIG_ARCH_HISI)+= hisilicon/
obj-$(CONFIG_ARCH_MXC) += imx/
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index e258b28..2d1cbc5 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o
clk-iproc-asiu.o
+obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o
obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o
obj-$(CONFIG_ARCH_BCM_5301X) += clk-nsp.o
diff --git a/drivers/clk/bcm/clk-ns2.c b/drivers/clk/bcm/clk-ns2.c
new file mode 100644
index 000..a564e92
--- /dev/null
+++ b/drivers/clk/bcm/clk-ns2.c
@@ -0,0 +1,288 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include "clk-iproc.h"
+
+#define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, }
+
+#define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \
+ .pwr_shift = ps, .iso_shift = is }
+
+#define RESET_VAL(o, rs, prs) { .offset = o, .reset_shift = rs, \
+ .p_reset_shift = prs }
+
+#define DF_VAL(o, kis, kiw, kps, kpw, kas, kaw) { .offset = o, .ki_shift =
kis,\
+ .ki_width = kiw, .kp_shift = kps, .kp_width = kpw, .ka_shift = kas,\
+ .ka_width = kaw }
+
+#define VCO_CTRL_VAL(uo, lo) { .u_offset = uo, .l_offset = lo }
+
+#define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \
+ .hold_shift = hs, .bypass_shift = bs }
+
+static const struct iproc_pll_ctrl genpll_scr = {
+ .flags = IPROC_CLK_AON | IPROC_CLK_PLL_SPLIT_STAT_CTRL,
+ .aon = AON_VAL(0x0, 1, 15, 12),
+ .reset = RESET_VAL(0x4, 2, 1),
+ .dig_filter = DF_VAL(0x0, 9, 3, 5, 4, 2, 3),
+ .ndiv_int = REG_VAL(0x8, 4, 10),
+ .pdiv = REG_VAL(0x8, 0, 4),
+ .vco_ctrl = VCO_CTRL_VAL(0x10, 0xc),
+ .status = REG_VAL(0x0, 27, 1),
+};
+
+
+static const struct iproc_clk_ctrl genpll_scr_clk[] = {
+ /* bypass_shift, the last value passed into ENABLE_VAL(), is not defined
+* in NS2. However, it doesn't appear to be used anywhere, so setting
+* it to 0.
+*/
+ [BCM_NS2_GENPLL_SCR_SCR_CLK] = {
+ .channel = BCM_NS2_GENPLL_SCR_SCR_CLK,
+ .flags = IPROC_CLK_AON,
+ .enable = ENABLE_VAL(0x0, 18, 12, 0),
+ .mdiv = REG_VAL(0x18, 0, 8),
+ },
+ [BCM_NS2_GENPLL_SCR_FS_CLK] = {
+ .channel = BCM_NS2_GENPLL_SCR_FS_CLK,
+ .flags = IPROC_CLK_AON,
+ .enable = ENABLE_VAL(0x0, 19, 13, 0),
+ .mdiv = REG_VAL(0x18, 8, 8),
+ },
+ [BCM_NS2_GENPLL_SCR_AUDIO_CLK] = {
+ .channel = BCM_NS2_GENPLL_SCR_AUDIO_CLK,
+ .flags = IPROC_CLK_AON,
+ .enable = ENABLE_VAL(0x0, 20, 14, 0),
+ .mdiv = REG_VAL(0x14, 0, 8),
+ },
+ [BCM_NS2_GENPLL_SCR_CH3_UNUSED] = {
+ .channel = BCM_NS2_GENPLL_SCR_CH3_UNUSED,
+ .flags = IPROC_CLK_AON,
+ .enable = ENABLE_VAL(0x0, 21, 15, 0),
+ .mdiv = REG_VAL(0x14, 8, 8),
+ },
+ [BCM_NS2_GENPLL_SCR_CH4_UNUSED] = {
+ .chann
