Re: [PATCH v2 6/6] DT: Add documentation for gpio-xilinx

2013-06-29 Thread Linus Walleij
On Mon, Jun 24, 2013 at 1:54 PM, Michal Simek mon...@monstr.eu wrote:

 I commented your comment on v1, and said I think you can support
 both bindings.

 in 2/6 you have applied that dual support for this driver
 and that's why please add this binding description to your repo
 because it reflects actual binding for this driver.

I applied this patch ages ago I think?

This discussion is about what I'd like to see as new changes...

Yours,
Linus Walleij
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss


Re: [PATCH v2 6/6] DT: Add documentation for gpio-xilinx

2013-06-24 Thread Michal Simek
Hi Linus,

On 06/17/2013 11:13 AM, Linus Walleij wrote:
 On Mon, Jun 17, 2013 at 8:21 AM, Michal Simek mon...@monstr.eu wrote:
 On 06/17/2013 07:50 AM, Linus Walleij wrote:
 On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com 
 wrote:
 
 +- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
 +- xlnx,is-dual : if 1, controller also uses the second channel

 If is present, xlnx,is-dual;

 +   xlnx,is-dual = 0x1;

 xlnx,is-dual;

 I'm not giving up on this suggestion.

 I have commented this in the v1.
 
 I commented your comment on v1, and said I think you can support
 both bindings.

in 2/6 you have applied that dual support for this driver
and that's why please add this binding description to your repo
because it reflects actual binding for this driver.

As I wrote you I am working on interrupt support for this IP
and in connection to this I will introduce new binding
as we discussed in v1.

Thanks,
Michal



-- 
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




signature.asc
Description: OpenPGP digital signature
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss


Re: [PATCH v2 6/6] DT: Add documentation for gpio-xilinx

2013-06-17 Thread Michal Simek
On 06/17/2013 07:50 AM, Linus Walleij wrote:
 On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com wrote:
 
 Describe gpio-xilinx binding.

 Signed-off-by: Michal Simek michal.si...@xilinx.com
 ---
 Changes in v2:
 - Extend description
 
 Thanks, patch applied but look into this:
 
 +Optional properties:
 +- interrupts : Interrupt mapping for GPIO IRQ.
 +- interrupt-parent : Phandle for the interrupt controller that
 +  services interrupts for this device.
 +- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
 +- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
 +- xlnx,gpio-width : gpio width
 +- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
 +- xlnx,is-dual : if 1, controller also uses the second channel
 
 If is present, xlnx,is-dual;
 
 +Example:
 +gpio: gpio@4000 {
 +   #gpio-cells = 2;
 +   compatible = xlnx,xps-gpio-1.00.a;
 +   gpio-controller ;
 +   interrupt-parent = microblaze_0_intc;
 +   interrupts =  6 2 ;
 +   reg =  0x4000 0x1 ;
 +   xlnx,all-inputs = 0x0;
 +   xlnx,all-inputs-2 = 0x0;
 +   xlnx,dout-default = 0x0;
 +   xlnx,dout-default-2 = 0x0;
 +   xlnx,gpio-width = 0x2;
 +   xlnx,gpio2-width = 0x2;
 +   xlnx,interrupt-present = 0x1;
 +   xlnx,is-dual = 0x1;
 
 xlnx,is-dual;
 
 I'm not giving up on this suggestion.

I have commented this in the v1. The point is that all dtses for the last
3-4 years are using this binding and this value is present there for a long
time. That's why I think it is better to keep this binding and do not break
backward compatibility which there is.
Also it reflects how design tool describe hardware.
IP is designed that can be easily extended to more channels which means
that it won't be simple yes/no option.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




signature.asc
Description: OpenPGP digital signature
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss


Re: [PATCH v2 6/6] DT: Add documentation for gpio-xilinx

2013-06-17 Thread Linus Walleij
On Mon, Jun 17, 2013 at 8:21 AM, Michal Simek mon...@monstr.eu wrote:
 On 06/17/2013 07:50 AM, Linus Walleij wrote:
 On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com wrote:

 +- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
 +- xlnx,is-dual : if 1, controller also uses the second channel

 If is present, xlnx,is-dual;

 +   xlnx,is-dual = 0x1;

 xlnx,is-dual;

 I'm not giving up on this suggestion.

 I have commented this in the v1.

I commented your comment on v1, and said I think you can support
both bindings.

Yours,
Linus Walleij
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss


Re: [PATCH v2 6/6] DT: Add documentation for gpio-xilinx

2013-06-16 Thread Linus Walleij
On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com wrote:

 Describe gpio-xilinx binding.

 Signed-off-by: Michal Simek michal.si...@xilinx.com
 ---
 Changes in v2:
 - Extend description

Thanks, patch applied but look into this:

 +Optional properties:
 +- interrupts : Interrupt mapping for GPIO IRQ.
 +- interrupt-parent : Phandle for the interrupt controller that
 +  services interrupts for this device.
 +- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
 +- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
 +- xlnx,gpio-width : gpio width
 +- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
 +- xlnx,is-dual : if 1, controller also uses the second channel

If is present, xlnx,is-dual;

 +Example:
 +gpio: gpio@4000 {
 +   #gpio-cells = 2;
 +   compatible = xlnx,xps-gpio-1.00.a;
 +   gpio-controller ;
 +   interrupt-parent = microblaze_0_intc;
 +   interrupts =  6 2 ;
 +   reg =  0x4000 0x1 ;
 +   xlnx,all-inputs = 0x0;
 +   xlnx,all-inputs-2 = 0x0;
 +   xlnx,dout-default = 0x0;
 +   xlnx,dout-default-2 = 0x0;
 +   xlnx,gpio-width = 0x2;
 +   xlnx,gpio2-width = 0x2;
 +   xlnx,interrupt-present = 0x1;
 +   xlnx,is-dual = 0x1;

xlnx,is-dual;

I'm not giving up on this suggestion.

Test it please...

Yours,
Linus Walleij
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss


[PATCH v2 6/6] DT: Add documentation for gpio-xilinx

2013-06-03 Thread Michal Simek
Describe gpio-xilinx binding.

Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Extend description

 .../devicetree/bindings/gpio/gpio-xilinx.txt   | 48 ++
 1 file changed, 48 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xilinx.txt

diff --git a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt 
b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
new file mode 100644
index 000..63bf4be
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
@@ -0,0 +1,48 @@
+Xilinx plb/axi GPIO controller
+
+Dual channel GPIO controller with configurable number of pins
+(from 1 to 32 per channel). Every pin can be configured as
+input/output/tristate. Both channels share the same global IRQ but
+local interrupts can be enabled on channel basis.
+
+Required properties:
+- compatible : Should be xlnx,xps-gpio-1.00.a
+- reg : Address and length of the register set for the device
+- #gpio-cells : Should be two. The first cell is the pin number and the
+  second cell is used to specify optional parameters (currently unused).
+- gpio-controller : Marks the device node as a GPIO controller.
+
+Optional properties:
+- interrupts : Interrupt mapping for GPIO IRQ.
+- interrupt-parent : Phandle for the interrupt controller that
+  services interrupts for this device.
+- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
+- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
+- xlnx,gpio-width : gpio width
+- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
+- xlnx,is-dual : if 1, controller also uses the second channel
+- xlnx,all-inputs-2 : as above but for the second channel
+- xlnx,dout-default-2 : as above but the second channel
+- xlnx,gpio2-width : as above but for the second channel
+- xlnx,tri-default-2 : as above but for the second channel
+
+
+Example:
+gpio: gpio@4000 {
+   #gpio-cells = 2;
+   compatible = xlnx,xps-gpio-1.00.a;
+   gpio-controller ;
+   interrupt-parent = microblaze_0_intc;
+   interrupts =  6 2 ;
+   reg =  0x4000 0x1 ;
+   xlnx,all-inputs = 0x0;
+   xlnx,all-inputs-2 = 0x0;
+   xlnx,dout-default = 0x0;
+   xlnx,dout-default-2 = 0x0;
+   xlnx,gpio-width = 0x2;
+   xlnx,gpio2-width = 0x2;
+   xlnx,interrupt-present = 0x1;
+   xlnx,is-dual = 0x1;
+   xlnx,tri-default = 0x;
+   xlnx,tri-default-2 = 0x;
+} ;
--
1.8.2.3



pgpiafDdYCtXs.pgp
Description: PGP signature
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss