From: "Andrii.Tseglytskyi" <andrii.tseglyts...@ti.com>

Add ABB device nodes for OMAP5 family of devices. Data is based on
OMAP543x Technical Reference Manual revision U (April 2013).
NOTE: clock node has been disabled in this patch due to the lack of
OMAP5 clock data.

[n...@ti.com: co-developer]
Signed-off-by: Nishanth Menon <n...@ti.com>
Signed-off-by: Andrii.Tseglytskyi <andrii.tseglyts...@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi |   67 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3dd7ff8..a9d86d2 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -667,5 +667,72 @@
                                ctrl-module = <&omap_control_usb>;
                        };
                };
+
+               abb_mpu: regulator-abb-mpu {
+                       compatible = "ti,abb-v2";
+                       regulator-name = "abb_mpu";
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       /* clocks = <&sysclk_in>; - once we have clock data */
+                       ti,settling-time = <50>;
+                       ti,clock-cycles = <16>;
+
+                       reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>,
+                             <0x4a0021ac 0x18>, <0x4ae0C318 0x4>;
+                       reg-names = "base-address", "int-address",
+                                   "efuse-address", "ldo-address";
+                       ti,tranxdone-status-mask = <0x80>;
+                       /* LDOVBBMPU_MUX_CTRL */
+                       ti,ldovbb-override-mask = <0x400>;
+                       /* LDOVBBMPU_VSET_OUT */
+                       ti,ldovbb-vset-mask = <0x1F>;
+
+                       /*
+                        * NOTE: only FBB mode used but actual vset will
+                        * determine final biasing
+                        */
+                       ti,abb_info = <
+                       /*uV            ABB     efuse   rbb_m fbb_m     vset_m*/
+                       880000          0       0x4     0 0x20000000 0x1F000000
+                       1060000         0       0x8     0 0x20000000 0x1F000000
+                       1250000         0       0x10    0 0x20000000 0x1F000000
+                       1260000         1       0x14    0 0x20000000 0x1F000000
+                       >;
+
+                       status = "disabled";
+               };
+
+               abb_mm: regulator-abb-mm {
+                       compatible = "ti,abb-v2";
+                       regulator-name = "abb_iva";
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       /* clocks = <&sysclk_in>; - once we have clock data */
+                       ti,settling-time = <50>;
+                       ti,clock-cycles = <16>;
+
+                       reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,
+                             <0x4a002194 0x14>, <0x4ae0C314 0x4>;
+                       reg-names = "base-address", "int-address",
+                                   "efuse-address", "ldo-address";
+                       ti,tranxdone-status-mask = <0x80000000>;
+                       /* LDOVBBMM_MUX_CTRL */
+                       ti,ldovbb-override-mask = <0x400>;
+                       /* LDOVBBMM_VSET_OUT */
+                       ti,ldovbb-vset-mask = <0x1F>;
+
+                       /*
+                        * NOTE: only FBB mode used but actual vset will
+                        * determine final biasing
+                        */
+                       ti,abb_info = <
+                       /*uV            ABB     efuse   rbb_m fbb_m     vset_m*/
+                       880000          0       0x4     0 0x20000000 0x1F000000
+                       1025000         0       0x8     0 0x20000000 0x1F000000
+                       1120000         1       0x10    0 0x20000000 0x1F000000
+                       >;
+
+                       status = "disabled";
+               };
        };
 };
-- 
1.7.9.5

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