Re: [PATCH v4 2/2] usb: phy: samsung: Add PHY support for USB 3.0 controller
Hi Kukjin, On Wed, Jan 30, 2013 at 11:31 AM, Kukjin Kim wrote: > Vivek Gautam wrote: >> >> Adding PHY driver support for USB 3.0 controller for Samsung's >> SoCs. >> >> Signed-off-by: Vivek Gautam >> --- >> >> Changes from v3: >> - Making SAMSUNG_USB3PHY dependent on SAMSUNG_USBPHY. >> - Adding USB_DWC3 to dependencies of SAMSUNG_USB2PHY since >>dwc3 controller also looks for USB2 type PHY. >> >> drivers/usb/phy/Kconfig | 11 +- >> drivers/usb/phy/Makefile |1 + >> drivers/usb/phy/samsung-usb3.c | 349 >> ++ >> drivers/usb/phy/samsung-usbphy.h | 81 + >> 4 files changed, 441 insertions(+), 1 deletions(-) >> create mode 100644 drivers/usb/phy/samsung-usb3.c >> >> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig >> index cc0d230..9325a95 100644 >> --- a/drivers/usb/phy/Kconfig >> +++ b/drivers/usb/phy/Kconfig >> @@ -52,14 +52,23 @@ config SAMSUNG_USBPHY >> help >> Enable this to support Samsung USB phy controllers for Samsung >> SoCs. >> + Further enable USB 2.0 type PHY or USB 3.0 type PHY as required >> + for USB controllers in use. >> >> if SAMSUNG_USBPHY >> >> config SAMSUNG_USB2PHY >> bool "Samsung USB 2.0 PHY controller Driver" >> - depends on USB_S3C_HSOTG || USB_EHCI_S5P || >> USB_OHCI_EXYNOS >> + depends on USB_S3C_HSOTG || USB_EHCI_S5P || >> USB_OHCI_EXYNOS || USB_DWC3 >> help >> Enable this to support Samsung USB 2.0 (High Speed) phy controller >> for Samsung SoCs. >> >> +config SAMSUNG_USB3PHY >> + bool "Samsung USB 3.0 PHY controller Driver" >> + depends on USB_DWC3 >> + help >> + Enable this to support Samsung USB 3.0 (Super Speed) phy >> controller >> + for samsung SoCs. >> + >> endif > > It mean, when USB_DWC3 is selected, we can select only one USB2PHY or > USB3PHY? > Actually, DWC3 expects both USB2PHY and USB3PHY, so went this way. But this seems bad :-( Will remove these dependencies as suggested by Felipe also. > [...] > >> +#ifdef CONFIG_OF >> +static const struct of_device_id samsung_usbphy_dt_match[] = { >> + { >> + .compatible = "samsung,exynos5250-usb3-phy", >> + .data = &usb3_phy_exynos5 >> + }, >> + {}, >> +}; >> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match); >> +#endif >> + >> +static struct platform_device_id samsung_usbphy_driver_ids[] = { >> + { >> + .name = "exynos5250-usb3-phy", > > According to the name of file, exynos5250-usb3phy? Just it is imho... > Ok, sure will amend this. >> + .driver_data= (unsigned long)&usb3_phy_exynos5, >> + }, >> + {}, >> +}; >> + >> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids); >> + >> +static struct platform_driver samsung_usb3_phy_driver = { >> + .probe = samsung_usb3_phy_probe, >> + .remove = samsung_usb3_phy_remove, >> + .id_table = samsung_usbphy_driver_ids, >> + .driver = { >> + .name = "samsung-usb3-phy", >> + .owner = THIS_MODULE, >> + .of_match_table = >> of_match_ptr(samsung_usbphy_dt_match), >> + }, >> +}; >> + >> +module_platform_driver(samsung_usb3_phy_driver); >> + >> +MODULE_DESCRIPTION("Samsung USB 3.0 phy controller"); >> +MODULE_AUTHOR("Vivek Gautam "); >> +MODULE_LICENSE("GPL"); >> +MODULE_ALIAS("platform:samsung-usb3-phy"); > > I want you to use same naming rule. > Sure. -- Thanks & Regards Vivek ___ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss
Re: [PATCH v4 2/2] usb: phy: samsung: Add PHY support for USB 3.0 controller
On Tue, Jan 29, 2013 at 10:01:52PM -0800, Kukjin Kim wrote: > Vivek Gautam wrote: > > > > Adding PHY driver support for USB 3.0 controller for Samsung's > > SoCs. > > > > Signed-off-by: Vivek Gautam > > --- > > > > Changes from v3: > > - Making SAMSUNG_USB3PHY dependent on SAMSUNG_USBPHY. > > - Adding USB_DWC3 to dependencies of SAMSUNG_USB2PHY since > >dwc3 controller also looks for USB2 type PHY. > > > > drivers/usb/phy/Kconfig | 11 +- > > drivers/usb/phy/Makefile |1 + > > drivers/usb/phy/samsung-usb3.c | 349 > > ++ > > drivers/usb/phy/samsung-usbphy.h | 81 + > > 4 files changed, 441 insertions(+), 1 deletions(-) > > create mode 100644 drivers/usb/phy/samsung-usb3.c > > > > diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig > > index cc0d230..9325a95 100644 > > --- a/drivers/usb/phy/Kconfig > > +++ b/drivers/usb/phy/Kconfig > > @@ -52,14 +52,23 @@ config SAMSUNG_USBPHY > > help > > Enable this to support Samsung USB phy controllers for Samsung > > SoCs. > > + Further enable USB 2.0 type PHY or USB 3.0 type PHY as required > > + for USB controllers in use. > > > > if SAMSUNG_USBPHY > > > > config SAMSUNG_USB2PHY > > bool "Samsung USB 2.0 PHY controller Driver" > > - depends on USB_S3C_HSOTG || USB_EHCI_S5P || > > USB_OHCI_EXYNOS > > + depends on USB_S3C_HSOTG || USB_EHCI_S5P || > > USB_OHCI_EXYNOS || USB_DWC3 > > help > > Enable this to support Samsung USB 2.0 (High Speed) phy controller > > for Samsung SoCs. > > > > +config SAMSUNG_USB3PHY > > + bool "Samsung USB 3.0 PHY controller Driver" > > + depends on USB_DWC3 > > + help > > + Enable this to support Samsung USB 3.0 (Super Speed) phy > > controller > > + for samsung SoCs. > > + > > endif > > It mean, when USB_DWC3 is selected, we can select only one USB2PHY or > USB3PHY? right, not sure that's a wise idea. It makes enabling USB support trickier than it needs to be. How about just dropping all dependencies if it compiles cleanly on all arches ? -- balbi signature.asc Description: Digital signature ___ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss
RE: [PATCH v4 2/2] usb: phy: samsung: Add PHY support for USB 3.0 controller
Vivek Gautam wrote: > > Adding PHY driver support for USB 3.0 controller for Samsung's > SoCs. > > Signed-off-by: Vivek Gautam > --- > > Changes from v3: > - Making SAMSUNG_USB3PHY dependent on SAMSUNG_USBPHY. > - Adding USB_DWC3 to dependencies of SAMSUNG_USB2PHY since >dwc3 controller also looks for USB2 type PHY. > > drivers/usb/phy/Kconfig | 11 +- > drivers/usb/phy/Makefile |1 + > drivers/usb/phy/samsung-usb3.c | 349 > ++ > drivers/usb/phy/samsung-usbphy.h | 81 + > 4 files changed, 441 insertions(+), 1 deletions(-) > create mode 100644 drivers/usb/phy/samsung-usb3.c > > diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig > index cc0d230..9325a95 100644 > --- a/drivers/usb/phy/Kconfig > +++ b/drivers/usb/phy/Kconfig > @@ -52,14 +52,23 @@ config SAMSUNG_USBPHY > help > Enable this to support Samsung USB phy controllers for Samsung > SoCs. > + Further enable USB 2.0 type PHY or USB 3.0 type PHY as required > + for USB controllers in use. > > if SAMSUNG_USBPHY > > config SAMSUNG_USB2PHY > bool "Samsung USB 2.0 PHY controller Driver" > - depends on USB_S3C_HSOTG || USB_EHCI_S5P || > USB_OHCI_EXYNOS > + depends on USB_S3C_HSOTG || USB_EHCI_S5P || > USB_OHCI_EXYNOS || USB_DWC3 > help > Enable this to support Samsung USB 2.0 (High Speed) phy controller > for Samsung SoCs. > > +config SAMSUNG_USB3PHY > + bool "Samsung USB 3.0 PHY controller Driver" > + depends on USB_DWC3 > + help > + Enable this to support Samsung USB 3.0 (Super Speed) phy > controller > + for samsung SoCs. > + > endif It mean, when USB_DWC3 is selected, we can select only one USB2PHY or USB3PHY? [...] > +#ifdef CONFIG_OF > +static const struct of_device_id samsung_usbphy_dt_match[] = { > + { > + .compatible = "samsung,exynos5250-usb3-phy", > + .data = &usb3_phy_exynos5 > + }, > + {}, > +}; > +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match); > +#endif > + > +static struct platform_device_id samsung_usbphy_driver_ids[] = { > + { > + .name = "exynos5250-usb3-phy", According to the name of file, exynos5250-usb3phy? Just it is imho... > + .driver_data= (unsigned long)&usb3_phy_exynos5, > + }, > + {}, > +}; > + > +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids); > + > +static struct platform_driver samsung_usb3_phy_driver = { > + .probe = samsung_usb3_phy_probe, > + .remove = samsung_usb3_phy_remove, > + .id_table = samsung_usbphy_driver_ids, > + .driver = { > + .name = "samsung-usb3-phy", > + .owner = THIS_MODULE, > + .of_match_table = > of_match_ptr(samsung_usbphy_dt_match), > + }, > +}; > + > +module_platform_driver(samsung_usb3_phy_driver); > + > +MODULE_DESCRIPTION("Samsung USB 3.0 phy controller"); > +MODULE_AUTHOR("Vivek Gautam "); > +MODULE_LICENSE("GPL"); > +MODULE_ALIAS("platform:samsung-usb3-phy"); I want you to use same naming rule. Thanks. - Kukjin ___ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss
Re: [PATCH v4 2/2] usb: phy: samsung: Add PHY support for USB 3.0 controller
CC: Doug Anderson On Mon, Jan 28, 2013 at 3:56 PM, Vivek Gautam wrote: > Adding PHY driver support for USB 3.0 controller for Samsung's > SoCs. > > Signed-off-by: Vivek Gautam > --- > > Changes from v3: > - Making SAMSUNG_USB3PHY dependent on SAMSUNG_USBPHY. > - Adding USB_DWC3 to dependencies of SAMSUNG_USB2PHY since >dwc3 controller also looks for USB2 type PHY. > > drivers/usb/phy/Kconfig | 11 +- > drivers/usb/phy/Makefile |1 + > drivers/usb/phy/samsung-usb3.c | 349 > ++ > drivers/usb/phy/samsung-usbphy.h | 81 + > 4 files changed, 441 insertions(+), 1 deletions(-) > create mode 100644 drivers/usb/phy/samsung-usb3.c > > diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig > index cc0d230..9325a95 100644 > --- a/drivers/usb/phy/Kconfig > +++ b/drivers/usb/phy/Kconfig > @@ -52,14 +52,23 @@ config SAMSUNG_USBPHY > help > Enable this to support Samsung USB phy controllers for Samsung > SoCs. > + Further enable USB 2.0 type PHY or USB 3.0 type PHY as required > + for USB controllers in use. > > if SAMSUNG_USBPHY > > config SAMSUNG_USB2PHY > bool "Samsung USB 2.0 PHY controller Driver" > - depends on USB_S3C_HSOTG || USB_EHCI_S5P || USB_OHCI_EXYNOS > + depends on USB_S3C_HSOTG || USB_EHCI_S5P || USB_OHCI_EXYNOS || > USB_DWC3 > help > Enable this to support Samsung USB 2.0 (High Speed) phy controller > for Samsung SoCs. > > +config SAMSUNG_USB3PHY > + bool "Samsung USB 3.0 PHY controller Driver" > + depends on USB_DWC3 > + help > + Enable this to support Samsung USB 3.0 (Super Speed) phy controller > + for samsung SoCs. > + > endif > diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile > index 7ba9862..b8505ac 100644 > --- a/drivers/usb/phy/Makefile > +++ b/drivers/usb/phy/Makefile > @@ -11,3 +11,4 @@ obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o > obj-$(CONFIG_USB_RCAR_PHY) += rcar-phy.o > obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o > obj-$(CONFIG_SAMSUNG_USB2PHY) += samsung-usb2.o > +obj-$(CONFIG_SAMSUNG_USB3PHY) += samsung-usb3.o > diff --git a/drivers/usb/phy/samsung-usb3.c b/drivers/usb/phy/samsung-usb3.c > new file mode 100644 > index 000..29e1321 > --- /dev/null > +++ b/drivers/usb/phy/samsung-usb3.c > @@ -0,0 +1,349 @@ > +/* linux/drivers/usb/phy/samsung-usb3.c > + * > + * Copyright (c) 2012 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * Author: Vivek Gautam > + * > + * Samsung USB 3.0 PHY transceiver; talks to DWC3 controller. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "samsung-usbphy.h" > + > +/* > + * Sets the phy clk as EXTREFCLK (XXTI) which is internal clock from clock > core. > + */ > +static u32 samsung_usb3_phy_set_refclk(struct samsung_usbphy *sphy) > +{ > + u32 reg; > + u32 refclk; > + > + refclk = sphy->ref_clk_freq; > + > + reg = PHYCLKRST_REFCLKSEL_EXT_REFCLK | > + PHYCLKRST_FSEL(refclk); > + > + switch (refclk) { > + case FSEL_CLKSEL_50M: > + reg |= (PHYCLKRST_MPLL_MULTIPLIER_50M_REF | > + PHYCLKRST_SSC_REFCLKSEL(0x00)); > + break; > + case FSEL_CLKSEL_20M: > + reg |= (PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF | > + PHYCLKRST_SSC_REFCLKSEL(0x00)); > + break; > + case FSEL_CLKSEL_19200K: > + reg |= (PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF | > + PHYCLKRST_SSC_REFCLKSEL(0x88)); > + break; > + case FSEL_CLKSEL_24M: > + default: > + reg |= (PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF | > + PHYCLKRST_SSC_REFCLKSEL(0x88)); > + break; > + } > + > + return reg; > +} > + > +static int samsung_exynos5_usb3_phy_enable(struct samsung_usbphy *sphy) > +{ > + void __iomem *regs = sphy->regs; > + u32 phyparam0; > + u32 phyparam1; > + u32 linksystem; > + u32 phybatchg; > + u32 phytest; > + u32 phyclkrst; > + > + /* Reset USB 3.0 PHY */ > + writel(0x0, regs + EXYNOS5_DRD_PHYREG0); > + > + phyparam0 = readl(regs + EXYNOS5_DRD_PHYPARAM0); > + /* Select PHY CLK source */ > + phyparam0 &= ~
[PATCH v4 2/2] usb: phy: samsung: Add PHY support for USB 3.0 controller
Adding PHY driver support for USB 3.0 controller for Samsung's SoCs. Signed-off-by: Vivek Gautam --- Changes from v3: - Making SAMSUNG_USB3PHY dependent on SAMSUNG_USBPHY. - Adding USB_DWC3 to dependencies of SAMSUNG_USB2PHY since dwc3 controller also looks for USB2 type PHY. drivers/usb/phy/Kconfig | 11 +- drivers/usb/phy/Makefile |1 + drivers/usb/phy/samsung-usb3.c | 349 ++ drivers/usb/phy/samsung-usbphy.h | 81 + 4 files changed, 441 insertions(+), 1 deletions(-) create mode 100644 drivers/usb/phy/samsung-usb3.c diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index cc0d230..9325a95 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -52,14 +52,23 @@ config SAMSUNG_USBPHY help Enable this to support Samsung USB phy controllers for Samsung SoCs. + Further enable USB 2.0 type PHY or USB 3.0 type PHY as required + for USB controllers in use. if SAMSUNG_USBPHY config SAMSUNG_USB2PHY bool "Samsung USB 2.0 PHY controller Driver" - depends on USB_S3C_HSOTG || USB_EHCI_S5P || USB_OHCI_EXYNOS + depends on USB_S3C_HSOTG || USB_EHCI_S5P || USB_OHCI_EXYNOS || USB_DWC3 help Enable this to support Samsung USB 2.0 (High Speed) phy controller for Samsung SoCs. +config SAMSUNG_USB3PHY + bool "Samsung USB 3.0 PHY controller Driver" + depends on USB_DWC3 + help + Enable this to support Samsung USB 3.0 (Super Speed) phy controller + for samsung SoCs. + endif diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index 7ba9862..b8505ac 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o obj-$(CONFIG_USB_RCAR_PHY) += rcar-phy.o obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o obj-$(CONFIG_SAMSUNG_USB2PHY) += samsung-usb2.o +obj-$(CONFIG_SAMSUNG_USB3PHY) += samsung-usb3.o diff --git a/drivers/usb/phy/samsung-usb3.c b/drivers/usb/phy/samsung-usb3.c new file mode 100644 index 000..29e1321 --- /dev/null +++ b/drivers/usb/phy/samsung-usb3.c @@ -0,0 +1,349 @@ +/* linux/drivers/usb/phy/samsung-usb3.c + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Author: Vivek Gautam + * + * Samsung USB 3.0 PHY transceiver; talks to DWC3 controller. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "samsung-usbphy.h" + +/* + * Sets the phy clk as EXTREFCLK (XXTI) which is internal clock from clock core. + */ +static u32 samsung_usb3_phy_set_refclk(struct samsung_usbphy *sphy) +{ + u32 reg; + u32 refclk; + + refclk = sphy->ref_clk_freq; + + reg = PHYCLKRST_REFCLKSEL_EXT_REFCLK | + PHYCLKRST_FSEL(refclk); + + switch (refclk) { + case FSEL_CLKSEL_50M: + reg |= (PHYCLKRST_MPLL_MULTIPLIER_50M_REF | + PHYCLKRST_SSC_REFCLKSEL(0x00)); + break; + case FSEL_CLKSEL_20M: + reg |= (PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF | + PHYCLKRST_SSC_REFCLKSEL(0x00)); + break; + case FSEL_CLKSEL_19200K: + reg |= (PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF | + PHYCLKRST_SSC_REFCLKSEL(0x88)); + break; + case FSEL_CLKSEL_24M: + default: + reg |= (PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF | + PHYCLKRST_SSC_REFCLKSEL(0x88)); + break; + } + + return reg; +} + +static int samsung_exynos5_usb3_phy_enable(struct samsung_usbphy *sphy) +{ + void __iomem *regs = sphy->regs; + u32 phyparam0; + u32 phyparam1; + u32 linksystem; + u32 phybatchg; + u32 phytest; + u32 phyclkrst; + + /* Reset USB 3.0 PHY */ + writel(0x0, regs + EXYNOS5_DRD_PHYREG0); + + phyparam0 = readl(regs + EXYNOS5_DRD_PHYPARAM0); + /* Select PHY CLK source */ + phyparam0 &= ~PHYPARAM0_REF_USE_PAD; + /* Set Loss-of-Signal Detector sensitivity */ + phyparam0 &= ~PHYPARAM0_REF_LOSLEVEL_MASK; + phyparam0 |= PHYPARAM0_REF_LOSLEVEL; + writel(phyparam0, regs + EXYNOS5_DRD_PHYPARAM0); + + writel(0x0, regs + EXYNOS5_DRD_PHYRESUME); + + /* +* Setting the Frame length Adj value[6:1] to default 0x20