Re: Removing undefined behavior of bitshifts
Am 07.06.2011 01:20, schrieb Timon Gehr: I'd much prefer the behavior to be defined as 1< Well, you probably mean what x86 processors do. The behaviour of x86 processors in this regard is (at leas) well defined, but not uniform. It all depends whether you use general-purpose integer instructions or some 64, 128, or 256-bit SIMD instructions (MMX, SSE, AVX). Int denotes 32-bit integers, operations on differently sized integer are analoguous. For general-purpose integer instructions, the following identities hold true: (l<>x == l>>(x & 0x1F)) for any (signed | unsigned) int l and x , regardless whether arithmetical or logical right shifts are used. However, for SIMD integer instructions, things are a little different and the following identities hold true: (l<= 0x20 ? 0 : l>x == (unsigned int)x >= 0x20 ? 0 : l>>x) for any (signed | unsigned) int x and any unsigned int l (using logical right shifts) (l>>x == (unsigned int)x >= 0x20 ? -1 : l>>x) for any (signed | unsigned) int x and any signed int l (using arithmetic right shifts) As of yet, there are only general-pupose integer rotate instructions on x86 processors, and very few other CPUs and µCs actually implement rotate instructions.
Re: Removing undefined behavior of bitshifts
Am 09.06.2011 09:08, schrieb Don: s_lange wrote: As of yet, there are only general-pupose integer rotate instructions on x86 processors, and very few other CPUs and µCs actually implement rotate instructions. Really? Itanium, PowerPC, ARM, 6502, Z80, PIC all have rotate instructions. I've never used a processor that didn't. Sorry, my bad, I should have said that there are only a few RISC-like processors that don't have rotate instructions: MIPS, SPARC... Although you are right that many accumulator CPUs and µC do have rotate instructions: 8051, 6502, Z80 and PIC
GDC on ARM CPUs?
I know there are ways to get GDC working on ARM CPUs, but I'm interested to know whether there is also an ARM version of the DMD compiler. If it isn't yet, then if it is planned or scheduled to port it to ARM, and if it already is, in what status it currently is. I'm specifically interested on wether there is a way to get DMD running on ARM Cortex CPUs, which have a ARMv7 architecture. regards Lange
16bit half floating point type as defined in IEEE-754r in D?
A 16 bit precision floating point type has been defined by the IEEE in the revision of the 754 floating point standard and declared as optional. These small data types are heavily used in all kinds of graphics rendering software. The most prominent example beeing the gl libraries of the OpenGL specs. Are there any plans to support such a data type in future versions of D? regards Lange
Re: GDC on ARM CPUs?
Moritz Warning schrieb: apart from gdc, ldc might work as well http://dsource.org/projects/ldc. This looks quiet promising, except it still is beta, but hopefully this will get changed
