Re: [Discuss-gnuradio] USRP2 phase drift

2010-07-26 Thread senlin peng
Hi Matt

> Even if you lock the USRP2 to an external reference, there will still be
> drift relative to other things not connected to the same reference.



Can you give me an example? The PLL on the daughter board is also
connected with the reference clock.  I hope to know which part is not
connected to the reference clock.

The error has the same trend for all satellites. So I think the error
is not caused by the clock difference between the local clock and the
GPS clock.
Is there any method that I can decrease the phase drift in the USRP2 output?



>  The
> function generator has its own clock, as does GPS.
>
> Matt
>



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[Discuss-gnuradio] USRP2 phase drift

2010-07-26 Thread senlin peng
I still get phase drift even with atomic external clock connected and
configured in software with config_mimo(MC_WE_LOCK_TO_SMA).

I tried with GPS signals and a sinusoid from the function generator as
the inputs. There is phase drift in both cases. The attachment shows a
picture of the phase error fluctuation. Does this problem cause by the
100 MHz main oscillator on the main board?


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[Discuss-gnuradio] Basic questions about MIMO on USRP2

2010-04-06 Thread senlin peng
Hi all,

I have several basic questions on about build a MIMO system with two
USRP2s. I have my master board connect with the computer and the
external clock. The slave board is connected to the master by the MIMO
cable. I am working C++ and I have the SISO working now.  My questions
are as follows:

1 Do I need to rebuild the firmware and FPGA code for the master USRP2?

2 How I can identify which one is the master board which one is the
slave in the code?
3 Do I need to call the make(interface, mac_addr_str) function twice ?
4 How can I get the  mac_addr_str values for the slave and the master board ?


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[Discuss-gnuradio] Failed to set center frequency (USRP2)

2010-03-05 Thread senlin peng
Hi all,

I have a problem with the USRP2 board when working with the DBSRX
daughter board.  I am using the "
usrp2_rx_cfile.py" file to collect some data with center frequency
around 1.5GHz which is within the range of this daughter board, but it
fails. The USRP2 works  with the RFX 1800 board with this frequency.
So I am confusing. Does anyone know the reason?

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[Discuss-gnuradio] FPGA code for USRP2

2010-02-12 Thread senlin peng
Hi All,

I need to make some modifications on the USRP2 board.
It seems I cannot download the code from: git clone
git://git.ettus.com/ettus/fpga.git. I don't know why.  Does anyone
know where I can get the Verilog codes and rebuild them?

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[Discuss-gnuradio] Possible to build such a multiple input system on USRP/USRP2 ?

2009-12-21 Thread senlin peng
Hi,
I want to build a multiple input system with four incoming channels
based on USRP/USRP2. The incoming samples of these four channels must
be synchronized and feed into one computer.  The center frequencies of
these four channels are different, but they are within the range of
the DBSRX daughter board.  My question is how many USRP/USRP2 boards I
need? Are there any examples about building a multiple input system?
Thanks!


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