[Bug 56405] Distorted graphics on Radeon HD 6620G

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=56405

--- Comment #48 from klausenb...@hotmail.com ---
(In reply to comment #41)
> Created attachment 71284 [details] [review]
> Patch gpu pipe
> 
> Does this kernel patch fix the issue ?

Does this patch get into kernel 3.8?

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Re: [RFC v2 6/8] gpu: drm: tegra: Remove redundant host1x

[Terje Bergström]

On 12.12.2012 18:08, Thierry Reding wrote:
> I've briefly discussed this with Stephen on IRC because I thought I had
> remembered him objecting to the idea of adding a dummy device just for
> this purpose. It turns out, however, that what he didn't like was to add
> a dummy node to the DT just to make this happen, but he has no (strong)
> objections to a dummy platform device.
> 
> While I'm not very happy about that solution, I've been going over it
> for a week now and haven't come up with any better alternative that
> doesn't have its own disadvantages. So perhaps we should go ahead and
> implement that. For the host1x driver this really just means creating a
> platform device and adding it to the system, with some of the fields
> tweaked to make things work.

Even the virtual device is not too beautiful. The problem is that the
virtual device is not physical parent for DC, HDMI, etc, so
dev_get_drvdata(pdev->dev.parent) returns the data from host1x device,
not the virtual device.

We'll post with something that goes around this, but it's not going to
be too pretty. Let's try to find the solution once we get the code out.

Terje

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[PATCH v2] drm/exynos: clear windows in fimd dpms off

[Prathyush K]

Changelog v2:
Added details of original patch in chromium kernel

Changelog v1:
When fimd is turned off, we disable the clocks which will stop
the dma. Now if we remove the current framebuffer, we cannot
disable the overlay but the current framebuffer will still be freed.
When fimd resumes, the dma will continue from where it left off
and will throw a PAGE FAULT since the memory was freed.

This patch fixes the above problem by disabling the fimd windows
before disabling the fimd clocks. It also keeps track of which
windows were currently active by setting the 'resume' flag. When
fimd resumes, the window with a resume flag set is enabled again.

Now if a current fb is removed when fimd is off, fimd_win_disable
will set the 'resume' flag of that window to zero and return.
So when fimd resumes, that window will not be resumed.

This patch is based on the following two patches:
http://git.chromium.org/gitweb/?p=chromiumos/third_party/kernel.git;a=commitdiff;h=341e973c967304976a762211b6465b0074de62ef
http://git.chromium.org/gitweb/?p=chromiumos/third_party/kernel.git;a=commitdiff;h=cfa22e49b7408547c73532c4bb03de47cc034a05
These two patches are rebased onto the current kernel with
additional changes like removing 'fimd_win_commit' call from
the resume function since this is taken care by encoder
dpms, and the modification of resume flag in win_disable.

Signed-off-by: Prathyush K 
Signed-off-by: Sean Paul 
Signed-off-by: Stephane Marchesin 
Signed-off-by: Inki Dae 
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |   40 +-
 1 files changed, 39 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 9b5c77d..5067ece 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -83,6 +83,7 @@ struct fimd_win_data {
unsigned intbuf_offsize;
unsigned intline_size;  /* bytes */
boolenabled;
+   boolresume;
 };
 
 struct fimd_context {
@@ -602,6 +603,12 @@ static void fimd_win_disable(struct device *dev, int zpos)
 
win_data = &ctx->win_data[win];
 
+   if (ctx->suspended) {
+   /* do not resume this window*/
+   win_data->resume = false;
+   return;
+   }
+
/* protect windows */
val = readl(ctx->regs + SHADOWCON);
val |= SHADOWCON_WINx_PROTECT(win);
@@ -815,11 +822,38 @@ static int fimd_clock(struct fimd_context *ctx, bool 
enable)
return 0;
 }
 
+static void fimd_window_suspend(struct device *dev)
+{
+   struct fimd_context *ctx = get_fimd_context(dev);
+   struct fimd_win_data *win_data;
+   int i;
+
+   for (i = 0; i < WINDOWS_NR; i++) {
+   win_data = &ctx->win_data[i];
+   win_data->resume = win_data->enabled;
+   fimd_win_disable(dev, i);
+   }
+   fimd_wait_for_vblank(dev);
+}
+
+static void fimd_window_resume(struct device *dev)
+{
+   struct fimd_context *ctx = get_fimd_context(dev);
+   struct fimd_win_data *win_data;
+   int i;
+
+   for (i = 0; i < WINDOWS_NR; i++) {
+   win_data = &ctx->win_data[i];
+   win_data->enabled = win_data->resume;
+   win_data->resume = false;
+   }
+}
+
 static int fimd_activate(struct fimd_context *ctx, bool enable)
 {
+   struct device *dev = ctx->subdrv.dev;
if (enable) {
int ret;
-   struct device *dev = ctx->subdrv.dev;
 
ret = fimd_clock(ctx, true);
if (ret < 0)
@@ -830,7 +864,11 @@ static int fimd_activate(struct fimd_context *ctx, bool 
enable)
/* if vblank was enabled status, enable it again. */
if (test_and_clear_bit(0, &ctx->irq_flags))
fimd_enable_vblank(dev);
+
+   fimd_window_resume(dev);
} else {
+   fimd_window_suspend(dev);
+
fimd_clock(ctx, false);
ctx->suspended = true;
}
-- 
1.7.0.4

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Re: [RFC v2 6/8] gpu: drm: tegra: Remove redundant host1x

[Thierry Reding]

On Thu, Dec 13, 2012 at 10:48:55AM +0200, Terje Bergström wrote:
> On 12.12.2012 18:08, Thierry Reding wrote:
> > I've briefly discussed this with Stephen on IRC because I thought I had
> > remembered him objecting to the idea of adding a dummy device just for
> > this purpose. It turns out, however, that what he didn't like was to add
> > a dummy node to the DT just to make this happen, but he has no (strong)
> > objections to a dummy platform device.
> > 
> > While I'm not very happy about that solution, I've been going over it
> > for a week now and haven't come up with any better alternative that
> > doesn't have its own disadvantages. So perhaps we should go ahead and
> > implement that. For the host1x driver this really just means creating a
> > platform device and adding it to the system, with some of the fields
> > tweaked to make things work.
> 
> Even the virtual device is not too beautiful. The problem is that the
> virtual device is not physical parent for DC, HDMI, etc, so
> dev_get_drvdata(pdev->dev.parent) returns the data from host1x device,
> not the virtual device.
> 
> We'll post with something that goes around this, but it's not going to
> be too pretty. Let's try to find the solution once we get the code out.

After some more discussion with Stephen on IRC we came to the conclusion
that the easiest might be to have tegra-drm call into host1x with
something like:

void host1x_set_drm_device(struct host1x *host1x, struct device *dev);

Once the dummy device has been properly set up and have each client use

struct device *host1x_get_drm_device(struct host1x *host1x);

to obtain a pointer to the dummy device, such that it can receive the
driver-private data using dev_get_drvdata() on the returned device. As
long as tegra-drm hasn't registered with host1x yet, the above function
could return ERR_PTR(-EPROBE_DEFER), so that dependencies are
automatically handled. This is required because, tegra-drm not being the
parent of the child devices, it can be guaranteed that it is probed
before any of the children.

That way we should be able to get around any circular dependencies,
since we only call into host1x from tegra-drm but not the other way
around.

Thierry


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Fan control in nouveau driver with geforce 9600gt

[Ozan Çağlayan]

Hi,

I have a geforce 9600gt (nv94) display adapter which has its fan
running at 100% speed. Yesterday I've compiled and booted with the
latest nouveau-2.6 tree. sensors from lm_sensors can correctly acquire
GPU temperature and PWM speed but as far as I understood setting the
speed is still not supported, am I right?

dmesg lists 3 performance levels with 100% fanspeed all of them.

Are there any other things that I can try? I saw a prlvl_wr module
parameter which enables setting performance level but it is indicated
that it is dangerous. Anyway, anything that I can try and help you?

Thanks.

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Galatasaray University - Computer Engineering Dept.
http://www.ozancaglayan.com
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[Bug 58042] [bisected] Garbled UI in Team Fortress 2 Beta

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=58042

Andreas Boll  changed:

   What|Removed |Added

   Severity|normal  |major
Summary|Garbled UI in Team Fortress |[bisected] Garbled UI in
   |2 Beta  |Team Fortress 2 Beta

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[PATCH] drm: only take the crtc lock for ->cursor_move

[Daniel Vetter]

->cursor_move uses mostly the same facilities in drivers as
->cursor_set, so pretty much nothing to fix up:

- ast/gma500/i915: They all use per-crtc registers to update the
  cursor position. ast again touches the global cursor cache, but
  that's ok since there's only one crtc.

- nouveau: nv50+ is again special, updates happen through the per-crtc
  channel (without pushbufs), so it's not protected by the new evo
  lock introduced earlier. But since this channel is per-crtc, we
  should be fine anyway.

- radeon: A bit a mess: avivo asics need a workaround when both output
  pipes are enabled, which means it'll access the crtc list. Just
  reading that flag is ok though as long as radeon _always_ grabs all
  locks when changing the crtc configuration. Which means with the
  current scheme it cannot do an optimized modeset which only locks
  the relevant crtcs. This can be fixed though by introducing a bit of
  global state with separate locks and ensure in the modeset code that
  the cursor will be updated appropriately when enabling the 2nd pipe
  (on affected asics).

- vmwgfx: I still don't understand what it's doing exactly, so apply
  the same trick for now.

v2: Fixup unlocking for the error cases, spotted by Richard Wilbur.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_crtc.c |7 +++
 drivers/gpu/drm/radeon/radeon_cursor.c |8 +++-
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c|   13 +
 3 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 62b5002..83de97f 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -2031,29 +2031,28 @@ int drm_mode_cursor_ioctl(struct drm_device *dev,
}
crtc = obj_to_crtc(obj);
 
+   mutex_lock(&crtc->mutex);
if (req->flags & DRM_MODE_CURSOR_BO) {
if (!crtc->funcs->cursor_set) {
ret = -ENXIO;
goto out;
}
/* Turns off the cursor if handle is 0 */
-   mutex_lock(&crtc->mutex);
ret = crtc->funcs->cursor_set(crtc, file_priv, req->handle,
  req->width, req->height);
-   mutex_unlock(&crtc->mutex);
}
 
if (req->flags & DRM_MODE_CURSOR_MOVE) {
if (crtc->funcs->cursor_move) {
-   drm_modeset_lock_all(dev);
ret = crtc->funcs->cursor_move(crtc, req->x, req->y);
-   drm_modeset_unlock_all(dev);
} else {
ret = -EFAULT;
goto out;
}
}
 out:
+   mutex_unlock(&crtc->mutex);
+
return ret;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c 
b/drivers/gpu/drm/radeon/radeon_cursor.c
index ad6df62..c1680e6 100644
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -245,8 +245,14 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc,
int i = 0;
struct drm_crtc *crtc_p;
 
-   /* avivo cursor image can't end on 128 pixel boundary or
+   /*
+* avivo cursor image can't end on 128 pixel boundary or
 * go past the end of the frame if both crtcs are enabled
+*
+* NOTE: It is safe to access crtc->enabled of other crtcs
+* without holding either the mode_config lock or the other
+* crtc's lock as long as write access to this flag _always_
+* grabs all locks.
 */
list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, 
head) {
if (crtc_p->enabled)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 74b6734..385b8849 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -264,10 +264,23 @@ int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, 
int y)
du->cursor_x = x + crtc->x;
du->cursor_y = y + crtc->y;
 
+   /*
+* FIXME: Unclear whether there's any global state touched by the
+* cursor_set function, especially vmw_cursor_update_position looks
+* suspicious. For now take the easy route and reacquire all locks. We
+* can do this since the caller in the drm core doesn't check anything
+* which is protected by any looks.
+*/
+   mutex_unlock(&crtc->mutex);
+   drm_modeset_lock_all(dev_priv->dev);
+
vmw_cursor_update_position(dev_priv, shown,
   du->cursor_x + du->hotspot_x,
   du->cursor_y + du->hotspot_y);
 
+   drm_modeset_unlock_all(dev_priv->dev);
+   mutex_lock(&crtc->mutex);
+
return 0;
 }
 
-- 
1.7.10.4

__

[PATCH 1/2] drm/: reorder framebuffer init sequence

[Daniel Vetter]

With more fine-grained locking we can no longer rely on the big
mode_config lock to prevent concurrent access to mode resources
like framebuffers. Instead a framebuffer becomes accessible to
other threads as soon as it is added to the relevant lookup
structures. Hence it needs to be fully set up by the time drivers
call drm_framebuffer_init.

This patch here is the drivers part of that reorg. Nothing really fancy
going on safe for three special cases.

- exynos needs to be careful to properly unref all handles.
- nouveau gets a resource leak fixed for free: one of the error
  cases didn't cleanup the framebuffer, which is now moot since
  the framebuffer is only registered once it is fully set up.
- vmwgfx requires a slight reordering of operations, I'm hoping I didn't
  break anything (but it's refcount management only, so should be safe).

v2: Split out exynos, since it's a bit more hairy than expected.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/ast/ast_main.c|4 ++--
 drivers/gpu/drm/cirrus/cirrus_main.c  |9 +++--
 drivers/gpu/drm/drm_fb_cma_helper.c   |   10 +-
 drivers/gpu/drm/gma500/framebuffer.c  |4 ++--
 drivers/gpu/drm/i915/intel_display.c  |5 +++--
 drivers/gpu/drm/mgag200/mgag200_main.c|8 +---
 drivers/gpu/drm/nouveau/nouveau_display.c |   10 +-
 drivers/gpu/drm/radeon/radeon_display.c   |2 +-
 drivers/gpu/drm/udl/udl_fb.c  |2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |   28 ++--
 drivers/staging/omapdrm/omap_fb.c |   16 
 11 files changed, 53 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index f668e6c..d5ba709 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -266,13 +266,13 @@ int ast_framebuffer_init(struct drm_device *dev,
 {
int ret;
 
+   drm_helper_mode_fill_fb_struct(&ast_fb->base, mode_cmd);
+   ast_fb->obj = obj;
ret = drm_framebuffer_init(dev, &ast_fb->base, &ast_fb_funcs);
if (ret) {
DRM_ERROR("framebuffer init failed %d\n", ret);
return ret;
}
-   drm_helper_mode_fill_fb_struct(&ast_fb->base, mode_cmd);
-   ast_fb->obj = obj;
return 0;
 }
 
diff --git a/drivers/gpu/drm/cirrus/cirrus_main.c 
b/drivers/gpu/drm/cirrus/cirrus_main.c
index 6a9b12e..2eac87b 100644
--- a/drivers/gpu/drm/cirrus/cirrus_main.c
+++ b/drivers/gpu/drm/cirrus/cirrus_main.c
@@ -42,13 +42,13 @@ int cirrus_framebuffer_init(struct drm_device *dev,
 {
int ret;
 
+   drm_helper_mode_fill_fb_struct(&gfb->base, mode_cmd);
+   gfb->obj = obj;
ret = drm_framebuffer_init(dev, &gfb->base, &cirrus_fb_funcs);
if (ret) {
DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
return ret;
}
-   drm_helper_mode_fill_fb_struct(&gfb->base, mode_cmd);
-   gfb->obj = obj;
return 0;
 }
 
@@ -79,6 +79,11 @@ cirrus_user_framebuffer_create(struct drm_device *dev,
 
ret = cirrus_framebuffer_init(dev, cirrus_fb, mode_cmd, obj);
if (ret) {
+   ret = drm_framebuffer_init(dev, &gfb->base, &cirrus_fb_funcs);
+   if (ret) {
+   DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
+   return ret;
+   }
drm_gem_object_unreference_unlocked(obj);
kfree(cirrus_fb);
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c 
b/drivers/gpu/drm/drm_fb_cma_helper.c
index fd9d0af..e1e0cb0 100644
--- a/drivers/gpu/drm/drm_fb_cma_helper.c
+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
@@ -85,6 +85,11 @@ static struct drm_fb_cma *drm_fb_cma_alloc(struct drm_device 
*dev,
if (!fb_cma)
return ERR_PTR(-ENOMEM);
 
+   drm_helper_mode_fill_fb_struct(&fb_cma->fb, mode_cmd);
+
+   for (i = 0; i < num_planes; i++)
+   fb_cma->obj[i] = obj[i];
+
ret = drm_framebuffer_init(dev, &fb_cma->fb, &drm_fb_cma_funcs);
if (ret) {
dev_err(dev->dev, "Failed to initalize framebuffer: %d\n", ret);
@@ -92,11 +97,6 @@ static struct drm_fb_cma *drm_fb_cma_alloc(struct drm_device 
*dev,
return ERR_PTR(ret);
}
 
-   drm_helper_mode_fill_fb_struct(&fb_cma->fb, mode_cmd);
-
-   for (i = 0; i < num_planes; i++)
-   fb_cma->obj[i] = obj[i];
-
return fb_cma;
 }
 
diff --git a/drivers/gpu/drm/gma500/framebuffer.c 
b/drivers/gpu/drm/gma500/framebuffer.c
index afded54..38e7e75 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -260,13 +260,13 @@ static int psb_framebuffer_init(struct drm_device *dev,
default:
return -EINVAL;
}
+   drm_helper_mode_fill_fb_struct(&fb->base, mode_cmd);
+   fb->gtt = gt;
ret = drm_framebuffer_init(dev, &fb->base, &psb_fb_fun

[PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Daniel Vetter]

For user framebuffers it's easier to just inline the
exynos_drm_framebuffer_init helper instead of trying to adjust it -
most of the things that helper sets up need to be overwritten anyway
again due to the multiple backing storage objects support exynos has,
but does not use for the fbdev.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/exynos/exynos_drm_fb.c |   32 
 1 file changed, 20 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c 
b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index 4ef4cd3..aea6500 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -136,15 +136,15 @@ exynos_drm_framebuffer_init(struct drm_device *dev,
return ERR_PTR(-ENOMEM);
}
 
+   drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
+   exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
+
ret = drm_framebuffer_init(dev, &exynos_fb->fb, &exynos_drm_fb_funcs);
if (ret) {
DRM_ERROR("failed to initialize framebuffer\n");
return ERR_PTR(ret);
}
 
-   drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
-   exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
-
return &exynos_fb->fb;
 }
 
@@ -190,9 +190,8 @@ exynos_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
  struct drm_mode_fb_cmd2 *mode_cmd)
 {
struct drm_gem_object *obj;
-   struct drm_framebuffer *fb;
struct exynos_drm_fb *exynos_fb;
-   int i;
+   int i, ret;
 
DRM_DEBUG_KMS("%s\n", __FILE__);
 
@@ -202,13 +201,13 @@ exynos_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
return ERR_PTR(-ENOENT);
}
 
-   fb = exynos_drm_framebuffer_init(dev, mode_cmd, obj);
-   if (IS_ERR(fb)) {
-   drm_gem_object_unreference_unlocked(obj);
-   return fb;
+   exynos_fb = kzalloc(sizeof(*exynos_fb), GFP_KERNEL);
+   if (!exynos_fb) {
+   DRM_ERROR("failed to allocate exynos drm framebuffer\n");
+   return ERR_PTR(-ENOMEM);
}
 
-   exynos_fb = to_exynos_fb(fb);
+   drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
exynos_fb->buf_cnt = exynos_drm_format_num_buffers(mode_cmd);
 
DRM_DEBUG_KMS("buf_cnt = %d\n", exynos_fb->buf_cnt);
@@ -218,14 +217,23 @@ exynos_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
mode_cmd->handles[i]);
if (!obj) {
DRM_ERROR("failed to lookup gem object\n");
-   exynos_drm_fb_destroy(fb);
+   kfree(exynos_fb);
return ERR_PTR(-ENOENT);
}
 
exynos_fb->exynos_gem_obj[i] = to_exynos_gem_obj(obj);
}
 
-   return fb;
+   ret = drm_framebuffer_init(dev, &exynos_fb->fb, &exynos_drm_fb_funcs);
+   if (ret) {
+   for (i = 0; i < exynos_fb->buf_cnt; i++)
+   
drm_gem_object_unreference_unlocked(&exynos_fb->exynos_gem_obj[i]->base);
+
+   kfree(exynos_fb);
+   return ERR_PTR(ret);
+   }
+
+   return &exynos_fb->fb;
 }
 
 struct exynos_drm_gem_buf *exynos_drm_fb_buffer(struct drm_framebuffer *fb,
-- 
1.7.10.4

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[PATCH] allow shmob+imx drm drivers to be compiled

[Daniel Vetter]

---
 drivers/gpu/drm/shmobile/Kconfig |2 +-
 drivers/staging/imx-drm/Kconfig  |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/shmobile/Kconfig b/drivers/gpu/drm/shmobile/Kconfig
index 7e7d52b..1cf8566 100644
--- a/drivers/gpu/drm/shmobile/Kconfig
+++ b/drivers/gpu/drm/shmobile/Kconfig
@@ -1,6 +1,6 @@
 config DRM_SHMOBILE
tristate "DRM Support for SH Mobile"
-   depends on DRM && (SUPERH || ARCH_SHMOBILE)
+   #depends on DRM && (SUPERH || ARCH_SHMOBILE)
select DRM_KMS_HELPER
select DRM_KMS_CMA_HELPER
select DRM_GEM_CMA_HELPER
diff --git a/drivers/staging/imx-drm/Kconfig b/drivers/staging/imx-drm/Kconfig
index 14b4449..266cc35 100644
--- a/drivers/staging/imx-drm/Kconfig
+++ b/drivers/staging/imx-drm/Kconfig
@@ -3,7 +3,7 @@ config DRM_IMX
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
-   depends on DRM && ARCH_MXC
+   #depends on DRM && ARCH_MXC
help
  enable i.MX graphics support
 
-- 
1.7.10.4

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[PATCH] allow shmob+imx drm drivers to be compiled

[Daniel Vetter]

---
 drivers/gpu/drm/shmobile/Kconfig |2 +-
 drivers/staging/imx-drm/Kconfig  |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/shmobile/Kconfig b/drivers/gpu/drm/shmobile/Kconfig
index 7e7d52b..1cf8566 100644
--- a/drivers/gpu/drm/shmobile/Kconfig
+++ b/drivers/gpu/drm/shmobile/Kconfig
@@ -1,6 +1,6 @@
 config DRM_SHMOBILE
tristate "DRM Support for SH Mobile"
-   depends on DRM && (SUPERH || ARCH_SHMOBILE)
+   #depends on DRM && (SUPERH || ARCH_SHMOBILE)
select DRM_KMS_HELPER
select DRM_KMS_CMA_HELPER
select DRM_GEM_CMA_HELPER
diff --git a/drivers/staging/imx-drm/Kconfig b/drivers/staging/imx-drm/Kconfig
index 14b4449..266cc35 100644
--- a/drivers/staging/imx-drm/Kconfig
+++ b/drivers/staging/imx-drm/Kconfig
@@ -3,7 +3,7 @@ config DRM_IMX
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
-   depends on DRM && ARCH_MXC
+   #depends on DRM && ARCH_MXC
help
  enable i.MX graphics support
 
-- 
1.7.10.4

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[PATCH] drm/ttm: fix fence locking in ttm_buffer_object_transfer

[Daniel Vetter]

Noticed while reviewing the fence locking in the radeon pageflip
handler.

v2: Instead of grabbing the bdev->fence_lock in object_transfer just
move the single callsite of that function a few lines, so that it is
protected by the fence_lock. Suggested by Jerome Glisse.

v3: Fix typo in commit message.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/ttm/ttm_bo_util.c |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c 
b/drivers/gpu/drm/ttm/ttm_bo_util.c
index b9c4e51..c5d83a5 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -654,11 +654,13 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object 
*bo,
 */
 
set_bit(TTM_BO_PRIV_FLAG_MOVING, &bo->priv_flags);
+
+   /* ttm_buffer_object_transfer accesses bo->sync_obj */
+   ret = ttm_buffer_object_transfer(bo, &ghost_obj);
spin_unlock(&bdev->fence_lock);
if (tmp_obj)
driver->sync_obj_unref(&tmp_obj);
 
-   ret = ttm_buffer_object_transfer(bo, &ghost_obj);
if (ret)
return ret;
 
-- 
1.7.10.4

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Re: [Intel-gfx] [PATCH 10/37] drm: add per-crtc locks

[Ville Syrjälä]

On Wed, Dec 12, 2012 at 02:06:50PM +0100, Daniel Vetter wrote:
> *drumroll*
> 
> The basic idea is to protect per-crtc state which can change without
> touching the output configuration with separate mutexes, i.e.  all the
> input side state to a crtc like framebuffers, cursor settings or plane
> configuration. Holding such a crtc lock gives a read-lock on all the
> other crtc state which can be changed by e.g. a modeset.
> 
> All non-crtc state is still protected by the mode_config mutex.
> Callers that need to change modeset state of a crtc (e.g. dpms or
> set_mode) need to grab both the mode_config lock and nested within any
> crtc locks.
> 
> Note that since there can only ever be one holder of the mode_config
> lock we can grab the subordinate crtc locks in any order (if we need
> to grab more than one of them). Lockdep can handle such nesting with
> the mutex_lock_nest_lock call correctly.
> 
> With this functions that only touch connectors/encoders but not crtcs
> only need to take the mode_config lock. The biggest such case is the
> output probing, which means that we can now pageflip and move cursors
> while the output probe code is reading an edid.
> 
> Most cases neatly fall into the three buckets:
> - Only touches connectors and similar output state and so only needs
>   the mode_config lock.
> - Touches the global configuration and so needs all locks.
> - Only touches the crtc input side and so only needs the crtc lock.
> 
> But a few cases that need special consideration:
> 
> - Load detection which requires a crtc. The mode_config lock already
>   prevents a modeset change, so we can use any unused crtc as we like
>   to do load detection. The only thing to consider is that such
>   temporary state changes don't leak out to userspace through ioctls
>   that only take the crtc look (like a pageflip). Hence the load
>   detect code needs to grab the crtc of any output pipes it touches
>   (but only if it touches state used by the pageflip or cursor
>   ioctls).
> 
> - Atomic pageflip when moving planes. The first case is sane hw, where
>   planes have a fixed association with crtcs - nothing needs to be
>   done there. More insane^Wflexible hw needs to have plane->crtc
>   mapping which is separately protect with a lock that nests within
>   the crtc lock. If the plane is unused we can just assign it to the
>   current crtc and continue. But if a plane is already in use by
>   another crtc we can't just reassign it.
> 
>   Two solution present themselves: Either go back to a slow-path which
>   takes all modeset locks, potentially incure quite a hefty delay. Or
>   simply disallowing such changes in one atomic pageflip - in general
>   the vblanks of two crtcs are not synced, so there's no sane way to
>   atomically flip such plane changes accross more than one crtc. I'd
>   heavily favour the later approach, going as far as mandating it as
>   part of the ABI of such a new a nuclear pageflip.

Agreed. Just disallow moving an enabled plane between CRTCs. First
disable on the old CRTC, then enable on the new one. Two ioctls
required to complete the operation. I think everyone should be able to
live with that restriction.

>   And if we _really_ want such semantics, we can always get them by
>   introducing another pageflip mutex between the mode_config.mutex and
>   the individual crtc locks. Pageflips crossing more than one crtc
>   would then need to take that lock first, to lock out concurrent
>   multi-crtc pageflips.

I'm actually concerned with multi CRTC page flips, not for moving planes
between CRTCs, but mainly for updating content on genlocked displays
atomically. We need to avoid deadlocks between multiple CRTC locks. Trying
to take the CRTC locks in the same order would be a solution, but since
user space can send the props in any order, it's going to require extra
of work.

Another lock as you suggest could work. But I suppose the atomic ioctl
would need another flag to signal that the kernel needs to grab the multi
CRTC lock in the beginning. The downside is that modeset would need to take
that lock too, and then you end up in the same situation where a modeset
operation on one display will disturb animations on other displays.

> - Optimized global modeset operations: We could just take the
>   mode_config lock and then lazily lock all crtc which are affected by
>   a modeset operation. This has the advantage that pageflip could
>   continue unhampered on unaffected crtc. But if e.g. global resources
>   like plls need to be reassigned and so affect unrelated crtcs we can
>   still do that - nested locking works in any order.

Right. In my atomic ioctl this could be done in the beginning by
checking the non-block flag. If the flag is not set, then grab the
global lock, and you can lock each CRTC when you see that you need to
touch them.

I would need to change my code to refuse any change to modeset state
when the non-block flag is set. Currently I'm doing that check as late
as p

Re: [Intel-gfx] [PATCH 10/37] drm: add per-crtc locks

[Daniel Vetter]

On Thu, Dec 13, 2012 at 12:38 PM, Ville Syrjälä
 wrote:
>>   And if we _really_ want such semantics, we can always get them by
>>   introducing another pageflip mutex between the mode_config.mutex and
>>   the individual crtc locks. Pageflips crossing more than one crtc
>>   would then need to take that lock first, to lock out concurrent
>>   multi-crtc pageflips.
>
> I'm actually concerned with multi CRTC page flips, not for moving planes
> between CRTCs, but mainly for updating content on genlocked displays
> atomically. We need to avoid deadlocks between multiple CRTC locks. Trying
> to take the CRTC locks in the same order would be a solution, but since
> user space can send the props in any order, it's going to require extra
> of work.

Ordering CRTC locks should also work - modeset_lock_all takes them
always in the same order, and as long as you only take a single crtc
nested within the modeset lock that's still ok (e.g. the load-detect
code). We don't have many CRTCs, so even the dumbest sort will be fast
enough. A bit of work will be required to make lockdep happy. But we
can achieve this by nesting CRTCs within a fake lock encapsulated by
the lock/unlock helper functions.
-Daniel
-- 
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Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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RE: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Inki Dae]

> -Original Message-
> From: dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org
> [mailto:dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org] On
> Behalf Of Daniel Vetter
> Sent: Thursday, December 13, 2012 8:05 PM
> To: DRI Development
> Cc: Nouveau Dev; Intel Graphics Development; Daniel Vetter
> Subject: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence
> 
> For user framebuffers it's easier to just inline the
> exynos_drm_framebuffer_init helper instead of trying to adjust it -
> most of the things that helper sets up need to be overwritten anyway
> again due to the multiple backing storage objects support exynos has,
> but does not use for the fbdev.
> 

Hi Daniel,

I'd rebase this patch to -next. This patch is conflicted with -next.
And if there is no any problem after test, will apply it.

Thanks,
Inki Dae

> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/exynos/exynos_drm_fb.c |   32

> 
>  1 file changed, 20 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c
> b/drivers/gpu/drm/exynos/exynos_drm_fb.c
> index 4ef4cd3..aea6500 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
> @@ -136,15 +136,15 @@ exynos_drm_framebuffer_init(struct drm_device *dev,
>   return ERR_PTR(-ENOMEM);
>   }
> 
> + drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
> + exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
> +
>   ret = drm_framebuffer_init(dev, &exynos_fb->fb,
> &exynos_drm_fb_funcs);
>   if (ret) {
>   DRM_ERROR("failed to initialize framebuffer\n");
>   return ERR_PTR(ret);
>   }
> 
> - drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
> - exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
> -
>   return &exynos_fb->fb;
>  }
> 
> @@ -190,9 +190,8 @@ exynos_user_fb_create(struct drm_device *dev, struct
> drm_file *file_priv,
> struct drm_mode_fb_cmd2 *mode_cmd)
>  {
>   struct drm_gem_object *obj;
> - struct drm_framebuffer *fb;
>   struct exynos_drm_fb *exynos_fb;
> - int i;
> + int i, ret;
> 
>   DRM_DEBUG_KMS("%s\n", __FILE__);
> 
> @@ -202,13 +201,13 @@ exynos_user_fb_create(struct drm_device *dev, struct
> drm_file *file_priv,
>   return ERR_PTR(-ENOENT);
>   }
> 
> - fb = exynos_drm_framebuffer_init(dev, mode_cmd, obj);
> - if (IS_ERR(fb)) {
> - drm_gem_object_unreference_unlocked(obj);
> - return fb;
> + exynos_fb = kzalloc(sizeof(*exynos_fb), GFP_KERNEL);
> + if (!exynos_fb) {
> + DRM_ERROR("failed to allocate exynos drm framebuffer\n");
> + return ERR_PTR(-ENOMEM);
>   }
> 
> - exynos_fb = to_exynos_fb(fb);
> + drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
>   exynos_fb->buf_cnt = exynos_drm_format_num_buffers(mode_cmd);
> 
>   DRM_DEBUG_KMS("buf_cnt = %d\n", exynos_fb->buf_cnt);
> @@ -218,14 +217,23 @@ exynos_user_fb_create(struct drm_device *dev, struct
> drm_file *file_priv,
>   mode_cmd->handles[i]);
>   if (!obj) {
>   DRM_ERROR("failed to lookup gem object\n");
> - exynos_drm_fb_destroy(fb);
> + kfree(exynos_fb);
>   return ERR_PTR(-ENOENT);
>   }
> 
>   exynos_fb->exynos_gem_obj[i] = to_exynos_gem_obj(obj);
>   }
> 
> - return fb;
> + ret = drm_framebuffer_init(dev, &exynos_fb->fb,
> &exynos_drm_fb_funcs);
> + if (ret) {
> + for (i = 0; i < exynos_fb->buf_cnt; i++)
> + drm_gem_object_unreference_unlocked(&exynos_fb-
> >exynos_gem_obj[i]->base);
> +
> + kfree(exynos_fb);
> + return ERR_PTR(ret);
> + }
> +
> + return &exynos_fb->fb;
>  }
> 
>  struct exynos_drm_gem_buf *exynos_drm_fb_buffer(struct drm_framebuffer
> *fb,
> --
> 1.7.10.4
> 
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Re: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Daniel Vetter]

Hi Inki,

I've pushed out the latest bits to
http://cgit.freedesktop.org/~danvet/drm/log/?h=drm-kms-locking with
some hacks on top to be able to compile all the arm drivers. Testing
feedback of the entire pile would be awesome, especially since you've
had some issues with framebuffer lifecycle and those should now be
correctly fixable with the proper refcounting. If you have too many
conflicts pls yell so that I can include your base into mine and
rebase the entire series.

Thanks, Daniel

On Thu, Dec 13, 2012 at 1:26 PM, Inki Dae  wrote:
>> -Original Message-
>> From: dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org
>> [mailto:dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org] On
>> Behalf Of Daniel Vetter
>> Sent: Thursday, December 13, 2012 8:05 PM
>> To: DRI Development
>> Cc: Nouveau Dev; Intel Graphics Development; Daniel Vetter
>> Subject: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence
>>
>> For user framebuffers it's easier to just inline the
>> exynos_drm_framebuffer_init helper instead of trying to adjust it -
>> most of the things that helper sets up need to be overwritten anyway
>> again due to the multiple backing storage objects support exynos has,
>> but does not use for the fbdev.
>>
>
> Hi Daniel,
>
> I'd rebase this patch to -next. This patch is conflicted with -next.
> And if there is no any problem after test, will apply it.



-- 
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Software Engineer, Intel Corporation
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[PATCHv3 2/7] gpu: host1x: Add syncpoint wait and interrupts

[Terje Bergstrom]

Add support for sync point interrupts, and sync point wait. Sync
point wait used interrupts for unblocking wait.

Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile  |3 +-
 drivers/gpu/host1x/dev.c |   44 
 drivers/gpu/host1x/dev.h |   15 ++
 drivers/gpu/host1x/hw/host1x01.c |2 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h |   30 ++-
 drivers/gpu/host1x/hw/intr_hw.c  |  175 +++
 drivers/gpu/host1x/intr.c|  350 ++
 drivers/gpu/host1x/intr.h|  100 +
 drivers/gpu/host1x/syncpt.c  |  161 ++
 drivers/gpu/host1x/syncpt.h  |4 +
 include/linux/host1x.h   |1 +
 11 files changed, 883 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/host1x/hw/intr_hw.c
 create mode 100644 drivers/gpu/host1x/intr.c
 create mode 100644 drivers/gpu/host1x/intr.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index a4adcc6..9d00b62 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -2,7 +2,8 @@ ccflags-y = -Idrivers/gpu/host1x
 
 host1x-objs = \
syncpt.o \
-   dev.o
+   dev.o \
+   intr.o
 
 obj-$(CONFIG_TEGRA_HOST1X) += hw/
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index b0d630d..9255a49 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include "dev.h"
+#include "intr.h"
 #include "hw/host1x01.h"
 
 #define CREATE_TRACE_POINTS
@@ -48,6 +49,19 @@ u32 host1x_syncpt_read_byid(u32 id)
 }
 EXPORT_SYMBOL(host1x_syncpt_read_byid);
 
+int host1x_syncpt_wait_byid(u32 id, u32 thresh, long timeout, u32 *value)
+{
+   struct host1x_syncpt *sp = host1x->syncpt + id;
+   return host1x_syncpt_wait(sp, thresh, timeout, value);
+}
+EXPORT_SYMBOL(host1x_syncpt_wait_byid);
+
+static void host1x_free_resources(struct host1x *host)
+{
+   kfree(host->intr.syncpt);
+   host->intr.syncpt = 0;
+}
+
 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
 {
void __iomem *sync_regs = host1x->regs + host1x->info.sync_offset;
@@ -62,6 +76,21 @@ u32 host1x_sync_readl(struct host1x *host1x, u32 r)
return readl(sync_regs + r);
 }
 
+static int host1x_alloc_resources(struct host1x *host)
+{
+   host->intr.syncpt = devm_kzalloc(&host->dev->dev,
+   sizeof(struct host1x_intr_syncpt) *
+   host->info.nb_pts,
+   GFP_KERNEL);
+
+   if (!host->intr.syncpt) {
+   /* frees happen in the support removal phase */
+   return -ENOMEM;
+   }
+
+   return 0;
+}
+
 static struct host1x_device_info host1x_info = {
.nb_channels= 8,
.nb_pts = 32,
@@ -118,6 +147,12 @@ static int host1x_probe(struct platform_device *dev)
goto fail;
}
 
+   err = host1x_alloc_resources(host);
+   if (err) {
+   dev_err(&dev->dev, "failed to init chip support\n");
+   goto fail;
+   }
+
if (host->info.init) {
err = host->info.init(host);
if (err)
@@ -132,6 +167,10 @@ static int host1x_probe(struct platform_device *dev)
if (!host->nop_sp)
goto fail;
 
+   err = host1x_intr_init(&host->intr, syncpt_irq);
+   if (err)
+   goto fail;
+
host->clk = devm_clk_get(&dev->dev, NULL);
if (IS_ERR(host->clk)) {
dev_err(&dev->dev, "failed to get clock\n");
@@ -145,6 +184,8 @@ static int host1x_probe(struct platform_device *dev)
 
host1x_syncpt_reset(host);
 
+   host1x_intr_start(&host->intr, clk_get_rate(host->clk));
+
host1x = host;
 
dev_info(&dev->dev, "initialized\n");
@@ -153,6 +194,7 @@ static int host1x_probe(struct platform_device *dev)
 
 fail:
host1x_syncpt_free(host->nop_sp);
+   host1x_free_resources(host);
kfree(host);
return err;
 }
@@ -160,8 +202,10 @@ fail:
 static int __exit host1x_remove(struct platform_device *dev)
 {
struct host1x *host = platform_get_drvdata(dev);
+   host1x_intr_deinit(&host->intr);
host1x_syncpt_deinit(host);
clk_disable_unprepare(host->clk);
+   host1x_free_resources(host);
return 0;
 }
 
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index 8245e24..a1622bb 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -20,6 +20,7 @@
 #include 
 
 #include "syncpt.h"
+#include "intr.h"
 
 struct host1x;
 struct host1x_syncpt;
@@ -36,6 +37,18 @@ struct host1x_syncpt_ops {
const char * (*name)(struct host1x_syncpt *);
 };
 
+struct host1x_intr_ops {
+   void (*init_host_sync)(struct host1x_intr *);
+   void (*set_host_clocks_per_usec)(
+   struct host1x_intr *, u32 clocks

[PATCHv3 5/7] drm: tegra: Remove redundant host1x

[Terje Bergstrom]

From: Arto Merilainen 

This patch removes the redundant host1x driver from tegradrm and
makes necessary bindings to the separate host driver.

The infrastructure for drm client lists is merged to drm.c.

The patch simplifies driver initialization; The original driver had
two lists for registered devices (clients and drm_active). The
clients list included references to all registered devices whereas
the drm_active list included only the devices that the tegradrm
driver itself supported. host1x is separated into a driver of its own
and hence there should be no need to support registration of external
drivers.  Therefore, only the drm_active list is reserved. Removal of
the list also simplifies the driver unregistration.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/drm/tegra/Kconfig  |2 +-
 drivers/gpu/drm/tegra/Makefile |2 +-
 drivers/gpu/drm/tegra/dc.c |   20 ++-
 drivers/gpu/drm/tegra/drm.c|  217 +--
 drivers/gpu/drm/tegra/drm.h|   38 ++---
 drivers/gpu/drm/tegra/fb.c |   17 ++-
 drivers/gpu/drm/tegra/hdmi.c   |   24 ++-
 drivers/gpu/drm/tegra/host1x.c |  325 
 include/drm/tegra_drm.h|   20 +++
 9 files changed, 275 insertions(+), 390 deletions(-)
 delete mode 100644 drivers/gpu/drm/tegra/host1x.c
 create mode 100644 include/drm/tegra_drm.h

diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index be1daf7..4a0290e 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -1,6 +1,6 @@
 config DRM_TEGRA
tristate "NVIDIA Tegra DRM"
-   depends on DRM && OF && ARCH_TEGRA
+   depends on DRM && OF && ARCH_TEGRA && TEGRA_HOST1X
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
diff --git a/drivers/gpu/drm/tegra/Makefile b/drivers/gpu/drm/tegra/Makefile
index 80f73d1..f4c05bb 100644
--- a/drivers/gpu/drm/tegra/Makefile
+++ b/drivers/gpu/drm/tegra/Makefile
@@ -1,7 +1,7 @@
 ccflags-y := -Iinclude/drm
 ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 
-tegra-drm-y := drm.o fb.o dc.o host1x.o
+tegra-drm-y := drm.o fb.o dc.o
 tegra-drm-y += output.o rgb.o hdmi.o
 
 obj-$(CONFIG_DRM_TEGRA) += tegra-drm.o
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 0744103..aae29e8 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -673,10 +673,10 @@ static int tegra_dc_debugfs_exit(struct tegra_dc *dc)
return 0;
 }
 
-static int tegra_dc_drm_init(struct host1x_client *client,
+static int tegra_dc_drm_init(struct tegra_drm_client *client,
 struct drm_device *drm)
 {
-   struct tegra_dc *dc = host1x_client_to_dc(client);
+   struct tegra_dc *dc = tegra_drm_client_to_dc(client);
int err;
 
dc->pipe = drm->mode_config.num_crtc;
@@ -708,9 +708,9 @@ static int tegra_dc_drm_init(struct host1x_client *client,
return 0;
 }
 
-static int tegra_dc_drm_exit(struct host1x_client *client)
+static int tegra_dc_drm_exit(struct tegra_drm_client *client)
 {
-   struct tegra_dc *dc = host1x_client_to_dc(client);
+   struct tegra_dc *dc = tegra_drm_client_to_dc(client);
int err;
 
devm_free_irq(dc->dev, dc->irq, dc);
@@ -730,14 +730,13 @@ static int tegra_dc_drm_exit(struct host1x_client *client)
return 0;
 }
 
-static const struct host1x_client_ops dc_client_ops = {
+static const struct tegra_drm_client_ops dc_client_ops = {
.drm_init = tegra_dc_drm_init,
.drm_exit = tegra_dc_drm_exit,
 };
 
 static int tegra_dc_probe(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
struct resource *regs;
struct tegra_dc *dc;
int err;
@@ -787,9 +786,9 @@ static int tegra_dc_probe(struct platform_device *pdev)
return err;
}
 
-   err = host1x_register_client(host1x, &dc->client);
+   err = tegra_drm_register_client(&dc->client);
if (err < 0) {
-   dev_err(&pdev->dev, "failed to register host1x client: %d\n",
+   dev_err(&pdev->dev, "failed to register tegra drm client: %d\n",
err);
return err;
}
@@ -801,13 +800,12 @@ static int tegra_dc_probe(struct platform_device *pdev)
 
 static int tegra_dc_remove(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
struct tegra_dc *dc = platform_get_drvdata(pdev);
int err;
 
-   err = host1x_unregister_client(host1x, &dc->client);
+   err = tegra_drm_unregister_client(&dc->client);
if (err < 0) {
-   dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
+   dev_err(&pdev->dev, "failed to unregister tegra_drm client: 
%d\n",
err);
return err;
}
diff --git a/drivers/gpu/drm/tegra/drm.c b/

[PATCHv3 1/7] gpu: host1x: Add host1x driver

[Terje Bergstrom]

Add host1x, the driver for host1x and its client unit 2D.

Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/Makefile  |1 +
 drivers/gpu/host1x/Kconfig|6 +
 drivers/gpu/host1x/Makefile   |8 +
 drivers/gpu/host1x/dev.c  |  182 +++
 drivers/gpu/host1x/dev.h  |   79 ++
 drivers/gpu/host1x/hw/Makefile|6 +
 drivers/gpu/host1x/hw/host1x01.c  |   36 +
 drivers/gpu/host1x/hw/host1x01.h  |   25 
 drivers/gpu/host1x/hw/host1x01_hardware.h |   26 
 drivers/gpu/host1x/hw/hw_host1x01_sync.h  |   66 +
 drivers/gpu/host1x/hw/syncpt_hw.c |  146 +++
 drivers/gpu/host1x/syncpt.c   |  227 +
 drivers/gpu/host1x/syncpt.h   |  128 
 drivers/video/Kconfig |2 +
 include/linux/host1x.h|   41 ++
 include/trace/events/host1x.h |   61 
 16 files changed, 1040 insertions(+)
 create mode 100644 drivers/gpu/host1x/Kconfig
 create mode 100644 drivers/gpu/host1x/Makefile
 create mode 100644 drivers/gpu/host1x/dev.c
 create mode 100644 drivers/gpu/host1x/dev.h
 create mode 100644 drivers/gpu/host1x/hw/Makefile
 create mode 100644 drivers/gpu/host1x/hw/host1x01.c
 create mode 100644 drivers/gpu/host1x/hw/host1x01.h
 create mode 100644 drivers/gpu/host1x/hw/host1x01_hardware.h
 create mode 100644 drivers/gpu/host1x/hw/hw_host1x01_sync.h
 create mode 100644 drivers/gpu/host1x/hw/syncpt_hw.c
 create mode 100644 drivers/gpu/host1x/syncpt.c
 create mode 100644 drivers/gpu/host1x/syncpt.h
 create mode 100644 include/linux/host1x.h
 create mode 100644 include/trace/events/host1x.h

diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index cc92778..7fa2f68 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_TEGRA_HOST1X) += host1x/
 obj-y  += drm/ vga/ stub/
diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
new file mode 100644
index 000..e89fb2b
--- /dev/null
+++ b/drivers/gpu/host1x/Kconfig
@@ -0,0 +1,6 @@
+config TEGRA_HOST1X
+   tristate "Tegra host1x driver"
+   help
+ Driver for the Tegra host1x hardware.
+
+ Required for enabling tegradrm.
diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
new file mode 100644
index 000..a4adcc6
--- /dev/null
+++ b/drivers/gpu/host1x/Makefile
@@ -0,0 +1,8 @@
+ccflags-y = -Idrivers/gpu/host1x
+
+host1x-objs = \
+   syncpt.o \
+   dev.o
+
+obj-$(CONFIG_TEGRA_HOST1X) += hw/
+obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
new file mode 100644
index 000..b0d630d
--- /dev/null
+++ b/drivers/gpu/host1x/dev.c
@@ -0,0 +1,182 @@
+/*
+ * Tegra host1x driver
+ *
+ * Copyright (c) 2010-2012, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "dev.h"
+#include "hw/host1x01.h"
+
+#define CREATE_TRACE_POINTS
+#include 
+
+#define DRIVER_NAME"tegra-host1x"
+
+struct host1x *host1x;
+
+void host1x_syncpt_incr_byid(u32 id)
+{
+   struct host1x_syncpt *sp = host1x->syncpt + id;
+   return host1x_syncpt_incr(sp);
+}
+EXPORT_SYMBOL(host1x_syncpt_incr_byid);
+
+u32 host1x_syncpt_read_byid(u32 id)
+{
+   struct host1x_syncpt *sp = host1x->syncpt + id;
+   return host1x_syncpt_read(sp);
+}
+EXPORT_SYMBOL(host1x_syncpt_read_byid);
+
+void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info.sync_offset;
+
+   writel(v, sync_regs + r);
+}
+
+u32 host1x_sync_readl(struct host1x *host1x, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info.sync_offset;
+
+   return readl(sync_regs + r);
+}
+
+static struct host1x_device_info host1x_info = {
+   .nb_channels= 8,
+   .nb_pts = 32,
+   .nb_mlocks  = 16,
+   .nb_bases   = 8,
+   .init   = host1x01_init,
+   .sync_offset= 0x3000,
+};
+
+static struct of_device_id host1x_match[] = {
+   { .compatible = "nvidia,tegra30-host1x", .data = &host1x_info, },
+   { .compatible = "nvidia,tegra20-host1x", .data = &host1x_info, 

[PATCHv3 7/7] drm: tegra: Add gr2d device

[Terje Bergstrom]

Add client driver for 2D device.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/drm/tegra/Makefile |2 +-
 drivers/gpu/drm/tegra/drm.c|  211 +++-
 drivers/gpu/drm/tegra/drm.h|   29 
 drivers/gpu/drm/tegra/gr2d.c   |  300 
 include/drm/tegra_drm.h|  111 +++
 5 files changed, 651 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/tegra/gr2d.c

diff --git a/drivers/gpu/drm/tegra/Makefile b/drivers/gpu/drm/tegra/Makefile
index f4c05bb..2661f41 100644
--- a/drivers/gpu/drm/tegra/Makefile
+++ b/drivers/gpu/drm/tegra/Makefile
@@ -1,7 +1,7 @@
 ccflags-y := -Iinclude/drm
 ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 
-tegra-drm-y := drm.o fb.o dc.o
+tegra-drm-y := drm.o fb.o dc.o gr2d.o
 tegra-drm-y += output.o rgb.o hdmi.o
 
 obj-$(CONFIG_DRM_TEGRA) += tegra-drm.o
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 530bed4..ab4460a 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -60,8 +60,10 @@ static int tegra_drm_parse_dt(struct tegradrm *tegradrm)
static const char * const compat[] = {
"nvidia,tegra20-dc",
"nvidia,tegra20-hdmi",
+   "nvidia,tegra20-gr2d",
"nvidia,tegra30-dc",
"nvidia,tegra30-hdmi",
+   "nvidia,tegra30-gr2d"
};
unsigned int i;
int err;
@@ -218,12 +220,29 @@ static int tegra_drm_unload(struct drm_device *drm)
 
 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
 {
-   return 0;
+   struct tegra_drm_fpriv *fpriv;
+   int err = 0;
+
+   fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+   if (!fpriv)
+   return -ENOMEM;
+
+   INIT_LIST_HEAD(&fpriv->contexts);
+   filp->driver_priv = fpriv;
+
+   return err;
 }
 
 static void tegra_drm_close(struct drm_device *drm, struct drm_file *filp)
 {
+   struct tegra_drm_fpriv *fpriv = tegra_drm_fpriv(filp);
+   struct tegra_drm_context *context, *tmp;
 
+   list_for_each_entry_safe(context, tmp, &fpriv->contexts, list) {
+   context->client->ops->close_channel(context);
+   kfree(context);
+   }
+   kfree(fpriv);
 }
 
 static void tegra_drm_lastclose(struct drm_device *drm)
@@ -245,8 +264,14 @@ static int __init tegra_drm_init(void)
err = platform_driver_register(&tegra_hdmi_driver);
if (err < 0)
goto unregister_dc;
+
+   err = platform_driver_register(&tegra_gr2d_driver);
+   if (err < 0)
+   goto unregister_hdmi;
return 0;
 
+unregister_hdmi:
+   platform_driver_unregister(&tegra_hdmi_driver);
 unregister_dc:
platform_driver_unregister(&tegra_dc_driver);
 free_tegradrm:
@@ -257,13 +282,197 @@ module_init(tegra_drm_init);
 
 static void __exit tegra_drm_exit(void)
 {
+   platform_driver_unregister(&tegra_gr2d_driver);
platform_driver_unregister(&tegra_hdmi_driver);
platform_driver_unregister(&tegra_dc_driver);
kfree(tegradrm);
 }
 module_exit(tegra_drm_exit);
 
+static int
+tegra_drm_ioctl_syncpt_read(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_read_args *args = data;
+
+   args->value = host1x_syncpt_read_byid(args->id);
+   return 0;
+}
+
+static int
+tegra_drm_ioctl_syncpt_incr(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_incr_args *args = data;
+   host1x_syncpt_incr_byid(args->id);
+   return 0;
+}
+
+static int
+tegra_drm_ioctl_syncpt_wait(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_wait_args *args = data;
+   int err;
+
+   err = host1x_syncpt_wait_byid(args->id, args->thresh,
+   args->timeout, &args->value);
+
+   return err;
+}
+
+static int
+tegra_drm_ioctl_open_channel(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_open_channel_args *args = data;
+   struct tegra_drm_client *client;
+   struct tegra_drm_context *context;
+   struct tegra_drm_fpriv *fpriv = tegra_drm_fpriv(file_priv);
+   struct tegradrm *tegradrm = drm->dev_private;
+   int err = 0;
+
+   context = kzalloc(sizeof(*context), GFP_KERNEL);
+   if (!context)
+   return -ENOMEM;
+
+   list_for_each_entry(client, &tegradrm->clients, list) {
+   if (client->class == args->class) {
+   dev_dbg(drm->dev, "opening client %x\n", args->class);
+   context->client = client;
+   err = client->ops->open_channel(client, context);
+   if (err)
+   goto out;
+
+  

[PATCHv3 4/7] gpu: host1x: Add debug support

[Terje Bergstrom]

Add support for host1x debugging. Adds debugfs entries, and dumps
channel state to UART in case of stuck job.

Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile |1 +
 drivers/gpu/host1x/cdma.c   |   37 +++
 drivers/gpu/host1x/debug.c  |  207 ++
 drivers/gpu/host1x/debug.h  |   49 
 drivers/gpu/host1x/dev.c|3 +
 drivers/gpu/host1x/dev.h|   17 ++
 drivers/gpu/host1x/hw/cdma_hw.c |3 +
 drivers/gpu/host1x/hw/debug_hw.c|  399 +++
 drivers/gpu/host1x/hw/host1x01.c|2 +
 drivers/gpu/host1x/hw/hw_host1x01_channel.h |   12 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h|   77 ++
 drivers/gpu/host1x/hw/syncpt_hw.c   |1 +
 drivers/gpu/host1x/syncpt.c |3 +
 13 files changed, 811 insertions(+)
 create mode 100644 drivers/gpu/host1x/debug.c
 create mode 100644 drivers/gpu/host1x/debug.h
 create mode 100644 drivers/gpu/host1x/hw/debug_hw.c

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index f6c1924..541f334 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -8,6 +8,7 @@ host1x-objs = \
intr.o \
channel.o \
job.o \
+   debug.o \
memmgr.o
 
 obj-$(CONFIG_TEGRA_HOST1X_CMA) += cma.o
diff --git a/drivers/gpu/host1x/cdma.c b/drivers/gpu/host1x/cdma.c
index 1193fea..b924f23 100644
--- a/drivers/gpu/host1x/cdma.c
+++ b/drivers/gpu/host1x/cdma.c
@@ -19,6 +19,7 @@
 #include "cdma.h"
 #include "channel.h"
 #include "dev.h"
+#include "debug.h"
 #include "memmgr.h"
 #include 
 
@@ -369,12 +370,45 @@ int host1x_cdma_begin(struct host1x_cdma *cdma, struct 
host1x_job *job)
return 0;
 }
 
+static void trace_write_gather(struct host1x_cdma *cdma,
+   struct mem_handle *ref,
+   u32 offset, u32 words)
+{
+   void *mem = NULL;
+
+   if (host1x_debug_trace_cmdbuf) {
+   mem = host1x_memmgr_mmap(ref);
+   if (IS_ERR_OR_NULL(mem))
+   mem = NULL;
+   };
+
+   if (mem) {
+   u32 i;
+   /*
+* Write in batches of 128 as there seems to be a limit
+* of how much you can output to ftrace at once.
+*/
+   for (i = 0; i < words; i += TRACE_MAX_LENGTH) {
+   trace_host1x_cdma_push_gather(
+   cdma_to_channel(cdma)->dev->name,
+   (u32)ref,
+   min(words - i, TRACE_MAX_LENGTH),
+   offset + i * sizeof(u32),
+   mem);
+   }
+   host1x_memmgr_munmap(ref, mem);
+   }
+}
+
 /*
  * Push two words into a push buffer slot
  * Blocks as necessary if the push buffer is full.
  */
 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2)
 {
+   if (host1x_debug_trace_cmdbuf)
+   trace_host1x_cdma_push(cdma_to_channel(cdma)->dev->name,
+   op1, op2);
host1x_cdma_push_gather(cdma, NULL, 0, op1, op2);
 }
 
@@ -390,6 +424,9 @@ void host1x_cdma_push_gather(struct host1x_cdma *cdma,
u32 slots_free = cdma->slots_free;
struct push_buffer *pb = &cdma->push_buffer;
 
+   if (handle)
+   trace_write_gather(cdma, handle, offset, op1 & 0x);
+
if (slots_free == 0) {
host1x->cdma_op.kick(cdma);
slots_free = host1x_cdma_wait_locked(cdma,
diff --git a/drivers/gpu/host1x/debug.c b/drivers/gpu/host1x/debug.c
new file mode 100644
index 000..8bce9f1
--- /dev/null
+++ b/drivers/gpu/host1x/debug.c
@@ -0,0 +1,207 @@
+/*
+ * Copyright (C) 2010 Google, Inc.
+ * Author: Erik Gilling 
+ *
+ * Copyright (C) 2011-2012 NVIDIA Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "dev.h"
+#include "debug.h"
+#include "channel.h"
+
+pid_t host1x_debug_null_kickoff_pid;
+unsigned int host1x_debug_trace_cmdbuf;
+
+pid_t host1x_debug_force_timeout_pid;
+u32 host1x_debug_force_timeout_val;
+u32 host1x_debug_force_timeout_channel;
+
+void host1x_debug_output(struct output *o, const char *fmt, ...)
+{
+   va_list args;
+   int len;
+
+   va_start(args, fmt);
+   len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
+   va_end(args);
+   o->fn(o->ctx, o->buf, len);
+}
+
+

[PATCHv3 6/7] ARM: tegra: Add board data and 2D clocks

[Terje Bergstrom]

Add a driver alias gr2d for Tegra 2D device, and assign a duplicate
of 2D clock to that driver alias.

Signed-off-by: Terje Bergstrom 
---
 arch/arm/mach-tegra/board-dt-tegra20.c|1 +
 arch/arm/mach-tegra/board-dt-tegra30.c|1 +
 arch/arm/mach-tegra/tegra20_clocks_data.c |2 +-
 arch/arm/mach-tegra/tegra30_clocks_data.c |1 +
 4 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c 
b/arch/arm/mach-tegra/board-dt-tegra20.c
index 734d9cc..2b7a3c2 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -95,6 +95,7 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x5000, "host1x", NULL),
+   OF_DEV_AUXDATA("nvidia,tegra20-gr2d", 0x5414, "gr2d", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x5420, "tegradc.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x5424, "tegradc.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x5428, "hdmi", NULL),
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c 
b/arch/arm/mach-tegra/board-dt-tegra30.c
index 6497d12..6a9e6cb 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -58,6 +58,7 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x5000, "host1x", NULL),
+   OF_DEV_AUXDATA("nvidia,tegra30-gr2d", 0x5414, "gr2d", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x5420, "tegradc.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x5424, "tegradc.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x5428, "hdmi", NULL),
diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c 
b/arch/arm/mach-tegra/tegra20_clocks_data.c
index a23a073..15d440a 100644
--- a/arch/arm/mach-tegra/tegra20_clocks_data.c
+++ b/arch/arm/mach-tegra/tegra20_clocks_data.c
@@ -1041,7 +1041,7 @@ static struct clk_duplicate tegra_clk_duplicates[] = {
CLK_DUPLICATE("usbd",   "utmip-pad",NULL),
CLK_DUPLICATE("usbd",   "tegra-ehci.0", NULL),
CLK_DUPLICATE("usbd",   "tegra-otg",NULL),
-   CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"),
+   CLK_DUPLICATE("2d", "gr2d", "gr2d"),
CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"),
CLK_DUPLICATE("epp","tegra_grhost", "epp"),
CLK_DUPLICATE("mpe","tegra_grhost", "mpe"),
diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c 
b/arch/arm/mach-tegra/tegra30_clocks_data.c
index 6942c7a..5787865 100644
--- a/arch/arm/mach-tegra/tegra30_clocks_data.c
+++ b/arch/arm/mach-tegra/tegra30_clocks_data.c
@@ -1338,6 +1338,7 @@ struct clk_duplicate tegra_clk_duplicates[] = {
CLK_DUPLICATE("pll_p", "tegradc.0", "parent"),
CLK_DUPLICATE("pll_p", "tegradc.1", "parent"),
CLK_DUPLICATE("pll_d2_out0", "hdmi", "parent"),
+   CLK_DUPLICATE("2d", "gr2d", "gr2d"),
 };
 
 struct clk *tegra_ptr_clks[] = {
-- 
1.7.9.5

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[PATCHv3 0/7] Support for Tegra 2D hardware

[Terje Bergstrom]

This set of patches adds support for Tegra20 and Tegra30 host1x and
2D. It is based on linux-next.

The third version has too many changes to list all of them. Here are
highlights:
 * Renamed to host1x, and moved to drivers/gpu/host1x
 * Greatly simplified the inner workings between physical and logical
   driver
 * Does not use AUXDATA for passing data to driver
 * Runtime power management removed - will replace with runtime PM
   later
 * IOCTLs padded and use __64 for passing pointers
 * DMABUF support removed, replaced with GEM CMA support
 * host1x driver validates command streams and copies them to kernel
   owned buffer
 * Generic interrupt support removed - only syncpt irq remains
 * Sync points are allocated now dynamically
 * IO register space handling rewritten to use helper functions
 * Other numerous fixes and simplifications to code

Some of the issues left open:
 * Register definitions still use static inline. There has been a
   debate about code style versus ability to use compiler type
   checking and code coverage analysis. There was no conclusion, so
   I left it as was.
 * tegradrm has a global variable. Plan was to hide that behind a
   virtual device, and use that as DRM root device. That plan went
   bad once the FB CMA helper used the device for trying to allocate
   memory.

host1x is the driver that controls host1x hardware. It supports
host1x command channels, synchronization, and memory management. It
is sectioned into logical driver under drivers/gpu/host1x and
physical driver under drivers/host1x/hw. The physical driver is
compiled with the hardware headers of the particular host1x version.

The hardware units are described (briefly) in the Tegra2 TRM. Wiki
page https://gitorious.org/linux-tegra-drm/pages/Host1xIntroduction
also contains a short description of the functionality.

The patch set removes responsibility of host1x from tegradrm. At the
same time, it moves all drm related infrastructure in
drivers/gpu/drm/tegra/host1x.c to drm.c.

The patch set adds 2D driver to tegradrm, which uses host1x for
communicating with host1x to access sync points and channels. We
expect to use the same infrastructure for other host1x clients, so
we have kept host1x and tegradrm separate.

The patch set also adds user space API to tegradrm for accessing
host1x and 2D. The user space parts are sent at the same time as
these patches.

Arto Merilainen (1):
  drm: tegra: Remove redundant host1x

Terje Bergstrom (6):
  gpu: host1x: Add host1x driver
  gpu: host1x: Add syncpoint wait and interrupts
  gpu: host1x: Add channel support
  gpu: host1x: Add debug support
  ARM: tegra: Add board data and 2D clocks
  drm: tegra: Add gr2d device

 arch/arm/mach-tegra/board-dt-tegra20.c  |1 +
 arch/arm/mach-tegra/board-dt-tegra30.c  |1 +
 arch/arm/mach-tegra/tegra20_clocks_data.c   |2 +-
 arch/arm/mach-tegra/tegra30_clocks_data.c   |1 +
 drivers/gpu/Makefile|1 +
 drivers/gpu/drm/tegra/Kconfig   |2 +-
 drivers/gpu/drm/tegra/Makefile  |2 +-
 drivers/gpu/drm/tegra/dc.c  |   20 +-
 drivers/gpu/drm/tegra/drm.c |  428 ++-
 drivers/gpu/drm/tegra/drm.h |   67 ++-
 drivers/gpu/drm/tegra/fb.c  |   17 +-
 drivers/gpu/drm/tegra/gr2d.c|  300 +
 drivers/gpu/drm/tegra/hdmi.c|   24 +-
 drivers/gpu/drm/tegra/host1x.c  |  325 --
 drivers/gpu/host1x/Kconfig  |   28 ++
 drivers/gpu/host1x/Makefile |   16 +
 drivers/gpu/host1x/cdma.c   |  475 
 drivers/gpu/host1x/cdma.h   |  107 +
 drivers/gpu/host1x/channel.c|  137 ++
 drivers/gpu/host1x/channel.h|   64 +++
 drivers/gpu/host1x/cma.c|  116 +
 drivers/gpu/host1x/cma.h|   43 ++
 drivers/gpu/host1x/debug.c  |  207 +
 drivers/gpu/host1x/debug.h  |   49 +++
 drivers/gpu/host1x/dev.c|  242 +++
 drivers/gpu/host1x/dev.h|  165 +++
 drivers/gpu/host1x/hw/Makefile  |6 +
 drivers/gpu/host1x/hw/cdma_hw.c |  480 +
 drivers/gpu/host1x/hw/cdma_hw.h |   37 ++
 drivers/gpu/host1x/hw/channel_hw.c  |  147 +++
 drivers/gpu/host1x/hw/debug_hw.c|  399 +
 drivers/gpu/host1x/hw/host1x01.c|   46 ++
 drivers/gpu/host1x/hw/host1x01.h|   25 ++
 drivers/gpu/host1x/hw/host1x01_hardware.h   |  150 +++
 drivers/gpu/host1x/hw/hw_host1x01_channel.h |   98 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h|  179 
 drivers/gpu/host1x/hw/hw_host1x01_uclass.h  |  130 ++
 drivers/gpu/host1x/hw/intr_hw.c |  175 
 drivers/gpu/host1x/hw/syncpt_hw.c   |  157 +++
 d

[RFC,libdrm 0/3] NVIDIA Tegra support

[Arto Meriläinen]

From: Arto Merilainen 

This patch series adds application level support for 2d hardware
acceleration on Tegra SoCs.

The patch series consists of three patches: Host1x stream library, 2d
library and a test application for the 2d library. The first patch
introduces stream library that is used for doing buffer management,
synchronization and command stream management. The second patch adds
support for doing simple 2d operations (fill, copy, stretch). The
third patch adds a test application for the 2d functions.

Currently, both stream and 2d libraries are placed under libdrm.
The current goal is to introduce the code and move it later into its
own library (or merge it to Tegra DDX).

Memory management code is not compatible with the patches Thierry
sent previously. However, synchronizing the code should not be
hard as they both add the same functionality.

Arto Merilainen (1):
  tegra: Add stream library

Francis Hart (2):
  tegra: Add 2d library
  tests: tegra: Add 2d tests

 Makefile.am|6 +-
 configure.ac   |   14 +
 tegra/2d/hw_gr2d.h | 2614 
 tegra/2d/tegra_2d_api.c|  235 
 tegra/2d/tegra_2d_color.c  |  412 +++
 tegra/2d/tegra_2d_color.h  |   51 +
 tegra/2d/tegra_2d_context.c|  140 +++
 tegra/2d/tegra_2d_context.h|   67 +
 tegra/2d/tegra_2d_copy.c   |  209 
 tegra/2d/tegra_2d_copy.h   |   38 +
 tegra/2d/tegra_2d_fill.c   |  136 +++
 tegra/2d/tegra_2d_fill.h   |   36 +
 tegra/2d/tegra_2d_frcopy.c |  274 +
 tegra/2d/tegra_2d_frcopy.h |   85 ++
 tegra/2d/tegra_2d_g2copy.c |  272 +
 tegra/2d/tegra_2d_g2copy.h |   88 ++
 tegra/2d/tegra_2d_g2fill.c |  192 +++
 tegra/2d/tegra_2d_g2fill.h |   80 ++
 tegra/2d/tegra_2d_reg_g2sb.h   |   89 ++
 tegra/2d/tegra_2d_reg_host.h   |  119 ++
 tegra/2d/tegra_2d_sbcopy.c |  388 ++
 tegra/2d/tegra_2d_sbcopy.h |   94 ++
 tegra/2d/tegra_2d_surface.c|  280 +
 tegra/2d/tegra_2d_surface.h|   57 +
 tegra/2d/tegra_2d_util.c   |  145 +++
 tegra/2d/tegra_2d_util.h   |   89 ++
 tegra/Makefile.am  |   36 +
 tegra/class_ids.h  |   35 +
 tegra/host1x01_hardware.h  |  122 ++
 tegra/hw_host1x01_uclass.h |  143 +++
 tegra/libdrm_tegra.pc.in   |   10 +
 tegra/tegra_2d.h   |  223 
 tegra/tegra_drm.c  |  876 ++
 tegra/tegra_drm.h  |  142 +++
 tegra/tegra_drmif.h|  107 ++
 tests/tegra/2d/Makefile.am |   13 +
 tests/tegra/2d/tegra_2d_test.c |  413 +++
 37 files changed, 8329 insertions(+), 1 deletion(-)
 create mode 100644 tegra/2d/hw_gr2d.h
 create mode 100644 tegra/2d/tegra_2d_api.c
 create mode 100644 tegra/2d/tegra_2d_color.c
 create mode 100644 tegra/2d/tegra_2d_color.h
 create mode 100644 tegra/2d/tegra_2d_context.c
 create mode 100644 tegra/2d/tegra_2d_context.h
 create mode 100644 tegra/2d/tegra_2d_copy.c
 create mode 100644 tegra/2d/tegra_2d_copy.h
 create mode 100644 tegra/2d/tegra_2d_fill.c
 create mode 100644 tegra/2d/tegra_2d_fill.h
 create mode 100644 tegra/2d/tegra_2d_frcopy.c
 create mode 100644 tegra/2d/tegra_2d_frcopy.h
 create mode 100644 tegra/2d/tegra_2d_g2copy.c
 create mode 100644 tegra/2d/tegra_2d_g2copy.h
 create mode 100644 tegra/2d/tegra_2d_g2fill.c
 create mode 100644 tegra/2d/tegra_2d_g2fill.h
 create mode 100644 tegra/2d/tegra_2d_reg_g2sb.h
 create mode 100644 tegra/2d/tegra_2d_reg_host.h
 create mode 100644 tegra/2d/tegra_2d_sbcopy.c
 create mode 100644 tegra/2d/tegra_2d_sbcopy.h
 create mode 100644 tegra/2d/tegra_2d_surface.c
 create mode 100644 tegra/2d/tegra_2d_surface.h
 create mode 100644 tegra/2d/tegra_2d_util.c
 create mode 100644 tegra/2d/tegra_2d_util.h
 create mode 100644 tegra/Makefile.am
 create mode 100644 tegra/class_ids.h
 create mode 100644 tegra/host1x01_hardware.h
 create mode 100644 tegra/hw_host1x01_uclass.h
 create mode 100644 tegra/libdrm_tegra.pc.in
 create mode 100644 tegra/tegra_2d.h
 create mode 100644 tegra/tegra_drm.c
 create mode 100644 tegra/tegra_drm.h
 create mode 100644 tegra/tegra_drmif.h
 create mode 100644 tests/tegra/2d/Makefile.am
 create mode 100644 tests/tegra/2d/tegra_2d_test.c

-- 
1.7.9.5

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[RFC,libdrm 1/3] tegra: Add stream library

[Arto Meriläinen]

From: Arto Merilainen 

This patch introduces tegra stream library. The library is used for
buffer management, command stream construction and work
synchronization.

Signed-off-by: Arto Merilainen 
---
 Makefile.am|6 +-
 configure.ac   |   13 +
 tegra/Makefile.am  |   25 ++
 tegra/class_ids.h  |   35 ++
 tegra/host1x01_hardware.h  |  122 ++
 tegra/hw_host1x01_uclass.h |  143 
 tegra/libdrm_tegra.pc.in   |   10 +
 tegra/tegra_drm.c  |  876 
 tegra/tegra_drm.h  |  142 +++
 tegra/tegra_drmif.h|  107 ++
 10 files changed, 1478 insertions(+), 1 deletion(-)
 create mode 100644 tegra/Makefile.am
 create mode 100644 tegra/class_ids.h
 create mode 100644 tegra/host1x01_hardware.h
 create mode 100644 tegra/hw_host1x01_uclass.h
 create mode 100644 tegra/libdrm_tegra.pc.in
 create mode 100644 tegra/tegra_drm.c
 create mode 100644 tegra/tegra_drm.h
 create mode 100644 tegra/tegra_drmif.h

diff --git a/Makefile.am b/Makefile.am
index 8ecd9d9..e90ae43 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -49,7 +49,11 @@ if HAVE_EXYNOS
 EXYNOS_SUBDIR = exynos
 endif
 
-SUBDIRS = . $(LIBKMS_SUBDIR) $(INTEL_SUBDIR) $(NOUVEAU_SUBDIR) 
$(RADEON_SUBDIR) $(OMAP_SUBDIR) $(EXYNOS_SUBDIR) tests include man
+if HAVE_TEGRA
+TEGRA_SUBDIR = tegra
+endif
+
+SUBDIRS = . $(LIBKMS_SUBDIR) $(INTEL_SUBDIR) $(NOUVEAU_SUBDIR) 
$(RADEON_SUBDIR) $(OMAP_SUBDIR) $(EXYNOS_SUBDIR) $(TEGRA_SUBDIR) tests include 
man
 
 libdrm_la_LTLIBRARIES = libdrm.la
 libdrm_ladir = $(libdir)
diff --git a/configure.ac b/configure.ac
index 0c19929..36c55c7 100644
--- a/configure.ac
+++ b/configure.ac
@@ -114,6 +114,11 @@ AC_ARG_ENABLE(exynos-experimental-api,
  [Enable support for EXYNOS's experimental API (default: 
disabled)]),
  [EXYNOS=$enableval], [EXYNOS=no])
 
+AC_ARG_ENABLE(tegra,
+ AS_HELP_STRING([--enable-tegra],
+ [Enable support for tegra's API (default: disabled)]),
+ [TEGRA=$enableval], [TEGRA=no])
+
 dnl ===
 dnl check compiler flags
 AC_DEFUN([LIBDRM_CC_TRY_FLAG], [
@@ -222,6 +227,11 @@ if test "x$EXYNOS" = xyes; then
AC_DEFINE(HAVE_EXYNOS, 1, [Have EXYNOS support])
 fi
 
+AM_CONDITIONAL(HAVE_TEGRA, [test "x$TEGRA" = xyes])
+if test "x$TEGRA" = xyes; then
+   AC_DEFINE(HAVE_TEGRA, 1, [Have TEGRA support])
+fi
+
 AC_ARG_ENABLE([cairo-tests],
   [AS_HELP_STRING([--enable-cairo-tests],
   [Enable support for Cairo rendering in tests 
(default: auto)])],
@@ -358,6 +368,8 @@ AC_CONFIG_FILES([
omap/libdrm_omap.pc
exynos/Makefile
exynos/libdrm_exynos.pc
+   tegra/Makefile
+   tegra/libdrm_tegra.pc
tests/Makefile
tests/modeprint/Makefile
tests/modetest/Makefile
@@ -380,4 +392,5 @@ echo "  Radeon API $RADEON"
 echo "  Nouveau API$NOUVEAU"
 echo "  OMAP API   $OMAP"
 echo "  EXYNOS API $EXYNOS"
+echo "  TEGRA API  $TEGRA"
 echo ""
diff --git a/tegra/Makefile.am b/tegra/Makefile.am
new file mode 100644
index 000..72675e5
--- /dev/null
+++ b/tegra/Makefile.am
@@ -0,0 +1,25 @@
+AM_CFLAGS = \
+   $(WARN_CFLAGS) \
+   -I$(top_srcdir) \
+   -I$(top_srcdir)/tegra \
+   $(PTHREADSTUBS_CFLAGS) \
+   -I$(top_srcdir)/include/drm
+
+libdrm_tegra_la_LTLIBRARIES = libdrm_tegra.la
+libdrm_tegra_ladir = $(libdir)
+libdrm_tegra_la_LDFLAGS = -version-number 1:0:0 -no-undefined
+libdrm_tegra_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
+
+libdrm_tegra_la_SOURCES = \
+   tegra_drm.c
+
+libdrm_tegracommonincludedir = ${includedir}/tegra
+libdrm_tegracommoninclude_HEADERS = \
+   tegra_drm.h
+
+libdrm_tegraincludedir = ${includedir}/libdrm
+libdrm_tegrainclude_HEADERS = \
+   tegra_drmif.h
+
+pkgconfigdir = @pkgconfigdir@
+pkgconfig_DATA = libdrm_tegra.pc
diff --git a/tegra/class_ids.h b/tegra/class_ids.h
new file mode 100644
index 000..834e291
--- /dev/null
+++ b/tegra/class_ids.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2012 NVIDIA Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE 

[RFC,libdrm 3/3] tests: tegra: Add 2d tests

[Arto Meriläinen]

From: Francis Hart 

This patch adds a test application for 2d library. The application
performs 2d operations using the hardware and outputs the results
into files.

Signed-off-by: Francis Hart 
---
 configure.ac   |1 +
 tests/tegra/2d/Makefile.am |   13 ++
 tests/tegra/2d/tegra_2d_test.c |  413 
 3 files changed, 427 insertions(+)
 create mode 100644 tests/tegra/2d/Makefile.am
 create mode 100644 tests/tegra/2d/tegra_2d_test.c

diff --git a/configure.ac b/configure.ac
index 36c55c7..b1170d3 100644
--- a/configure.ac
+++ b/configure.ac
@@ -376,6 +376,7 @@ AC_CONFIG_FILES([
tests/kmstest/Makefile
tests/radeon/Makefile
tests/vbltest/Makefile
+   tests/tegra/2d/Makefile
include/Makefile
include/drm/Makefile
man/Makefile
diff --git a/tests/tegra/2d/Makefile.am b/tests/tegra/2d/Makefile.am
new file mode 100644
index 000..6967fbf
--- /dev/null
+++ b/tests/tegra/2d/Makefile.am
@@ -0,0 +1,13 @@
+AM_CFLAGS = \
+   -I $(top_srcdir)/include/drm \
+   -I $(top_srcdir)
+
+LDADD = \
+   $(top_builddir)/libdrm.la \
+   $(top_builddir)/tegra/libdrm_tegra.la
+
+noinst_PROGRAMS = \
+   tegra_2d_test
+
+tegra_2d_test_SOURCES = \
+   tegra_2d_test.c
diff --git a/tests/tegra/2d/tegra_2d_test.c b/tests/tegra/2d/tegra_2d_test.c
new file mode 100644
index 000..11cc089
--- /dev/null
+++ b/tests/tegra/2d/tegra_2d_test.c
@@ -0,0 +1,413 @@
+/*
+ * Copyright (C) 2012 NVIDIA Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Francis Hart 
+ */
+
+#include 
+#include 
+#include 
+#include "tegra/tegra_drmif.h"
+#include "tegra/tegra_2d.h"
+#include "xf86drm.h"
+#include "xf86drmMode.h"
+#include "include/drm/drm_fourcc.h"
+
+static void
+set_pixel_color(struct tegra_2d_surface *surface,
+int x,
+int y,
+struct tegra_2d_surface_color *color)
+{
+int i;
+
+for (i=0; inum_planes; ++i)
+{
+int px;
+int py;
+int offset;
+uint32_t bytes_per_pixel;
+const uint8_t *src;
+uint8_t *dst;
+void *ptr;
+struct tegra_2d_plane *plane = &surface->planes[i];
+
+bytes_per_pixel = TEGRA_2D_FORMAT_BYTES(plane->format);
+
+ptr = tegra_bo_map(plane->mem_handle);
+if (ptr == NULL)
+continue;
+
+px = (x * plane->width) / surface->planes[0].width;
+py = (y * plane->height) / surface->planes[0].height;
+
+offset = (py * plane->pitch) + (px * bytes_per_pixel);
+
+src = (const uint8_t *) &color->planes[i].value;
+dst = ((uint8_t *) ptr) + plane->mem_offset + offset;
+
+switch (bytes_per_pixel)
+{
+case 4: dst[3] = src[3];
+case 3: dst[2] = src[2];
+case 2: dst[1] = src[1];
+case 1: dst[0] = src[0];
+default:
+break;
+}
+
+tegra_bo_unmap(plane->mem_handle);
+}
+}
+
+static void
+set_pixel_rgba(struct tegra_2d_surface *surface,
+   int x,
+   int y,
+   uint32_t r,
+   uint32_t g,
+   uint32_t b,
+   uint32_t a)
+{
+struct tegra_2d_surface_color color;
+
+color.num_planes = surface->num_planes;
+color.planes[0].format = surface->planes[0].format;
+color.planes[1].format = surface->planes[1].format;
+color.planes[2].format = surface->planes[2].format;
+
+tegra_2d_color_from_rgba(&color, r, g, b, a);
+
+set_pixel_color(surface, x, y, &color);
+}
+
+static void
+clear_surface(struct tegra_2d_surface *surface,
+  uint32_t r,
+  uint32_t g,
+  uint32_t b,
+  uint32_t a)
+{
+int x;
+int y;
+struct tegra_2d_surface_color color;
+
+color.num_planes = surface->num_plane

Re: [Intel-gfx] [PATCH 00/81] drm/i915: Atomic mode setting / page flip, yet again

[Daniel Vetter]

On Wed, Dec 12, 2012 at 06:15:27PM +0200, ville.syrj...@linux.intel.com wrote:
> Another month, another massive atomic patchset.
> 
> I managed to clean up warts left over from the modeset-rework rebase,
> but other than that I haven't really found the time to touch this too
> much since the last time I posted patches from this set.
> 
> Seeing as my schedule isn't getting any less busy in the forseeable
> future, it would be nice to get this monster merged sooner rather
> than never.
> 
> Ever since the code started to resemble something sane, I've tried
> to avoid squashing patches, just in case someone was actually trying
> to follow what's changed. But clearly some of the patches can
> be squashed, and that would probably allow some of the earlier ones
> to be dropped entirely.
> 
> What's clearly needed is a test tool that will stresss the mode
> setting side of the code more. My glplane test just changes the
> modes in the beginning, and then just does flips and other plane
> stuff. I'll try to get something done on that front before Christmas.
> 
> Repo is here:
> https://gitorious.org/vsyrjala/linux/commits/drm_atomic_23
> 
> The repo also contains 64bit get_user() implementation for x86-32,
> which I sent to lkml and x86 people for review. So this should now
> be testable even on a 32bit system.

Can you please upload your testcase somewhere so that I can play around
with this without too much hassle.

Thanks, Daniel
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[Bug 56405] Distorted graphics on Radeon HD 6620G

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=56405

--- Comment #49 from Alex Deucher  ---
(In reply to comment #48)
> Does this patch get into kernel 3.8?

Yes.  It will be in 3.8 and the stable kernels.

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Re: [Intel-gfx] [PATCH 10/37] drm: add per-crtc locks

[Ville Syrjälä]

On Thu, Dec 13, 2012 at 12:54:44PM +0100, Daniel Vetter wrote:
> On Thu, Dec 13, 2012 at 12:38 PM, Ville Syrjälä
>  wrote:
> >>   And if we _really_ want such semantics, we can always get them by
> >>   introducing another pageflip mutex between the mode_config.mutex and
> >>   the individual crtc locks. Pageflips crossing more than one crtc
> >>   would then need to take that lock first, to lock out concurrent
> >>   multi-crtc pageflips.
> >
> > I'm actually concerned with multi CRTC page flips, not for moving planes
> > between CRTCs, but mainly for updating content on genlocked displays
> > atomically. We need to avoid deadlocks between multiple CRTC locks. Trying
> > to take the CRTC locks in the same order would be a solution, but since
> > user space can send the props in any order, it's going to require extra
> > of work.
> 
> Ordering CRTC locks should also work - modeset_lock_all takes them
> always in the same order, and as long as you only take a single crtc
> nested within the modeset lock that's still ok (e.g. the load-detect
> code). We don't have many CRTCs, so even the dumbest sort will be fast
> enough. A bit of work will be required to make lockdep happy. But we
> can achieve this by nesting CRTCs within a fake lock encapsulated by
> the lock/unlock helper functions.

Yeah it would mean pre-processing the object ID list in the atomic
ioctl. Currently there is at most num_crtc+num_plane object IDs in the
list, assuming userspace didn't send any duplicates. For each of those
we'd need to take the CRTC lock. So a bit of a change to my code, but
not too bad I suppose.

But this also has to handle planes that can move between CRTCs, so
it's not quite as simple as that. Maybe grab the lock for
plane->crtc, and once you have the lock re-check that plane->crtc
didn't change before we got the lock.

We also need to change things so that plane->crtc can never be NULL.
Currently when a plane is disabled, we set plane->crtc to NULL, but
since we need that information for taking the lock, and to prevent
two guys from accessing the same disabled plane, we can no longer
allow that.

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Intel OTC
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[PATCH] drm: fix drm_local_map allocation size

[Jani Nikula]

list->map is struct drm_local_map *, not struct drm_map_list *.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_gem.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 24efae4..6337edd 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -343,7 +343,7 @@ drm_gem_create_mmap_offset(struct drm_gem_object *obj)
 
/* Set the object up for mmap'ing */
list = &obj->map_list;
-   list->map = kzalloc(sizeof(struct drm_map_list), GFP_KERNEL);
+   list->map = kzalloc(sizeof(*list->map), GFP_KERNEL);
if (!list->map)
return -ENOMEM;
 
-- 
1.7.9.5

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Re: [Intel-gfx] [PATCH 00/81] drm/i915: Atomic mode setting / page flip, yet again

[Ville Syrjälä]

On Thu, Dec 13, 2012 at 03:17:38PM +0100, Daniel Vetter wrote:
> On Wed, Dec 12, 2012 at 06:15:27PM +0200, ville.syrj...@linux.intel.com wrote:
> > Another month, another massive atomic patchset.
> > 
> > I managed to clean up warts left over from the modeset-rework rebase,
> > but other than that I haven't really found the time to touch this too
> > much since the last time I posted patches from this set.
> > 
> > Seeing as my schedule isn't getting any less busy in the forseeable
> > future, it would be nice to get this monster merged sooner rather
> > than never.
> > 
> > Ever since the code started to resemble something sane, I've tried
> > to avoid squashing patches, just in case someone was actually trying
> > to follow what's changed. But clearly some of the patches can
> > be squashed, and that would probably allow some of the earlier ones
> > to be dropped entirely.
> > 
> > What's clearly needed is a test tool that will stresss the mode
> > setting side of the code more. My glplane test just changes the
> > modes in the beginning, and then just does flips and other plane
> > stuff. I'll try to get something done on that front before Christmas.
> > 
> > Repo is here:
> > https://gitorious.org/vsyrjala/linux/commits/drm_atomic_23
> > 
> > The repo also contains 64bit get_user() implementation for x86-32,
> > which I sent to lkml and x86 people for review. So this should now
> > be testable even on a 32bit system.
> 
> Can you please upload your testcase somewhere so that I can play around
> with this without too much hassle.

It's here:
https://gitorious.org/vsyrjala/glplane

It responds to a bunch of keys in some way. Look near the end of main()
in plane.c to see which keys do what.

You'll need libdrm too:
https://gitorious.org/vsyrjala/drm/commits/drm_atomic_7

And there's an older test here, but I'm not sure it works anymore:
https://gitorious.org/vsyrjala/plane

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[Bug 50208] X does not start on Linux kernel 3.2.0-24, works on 3.0.0-19

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=50208

Nicola Larosa  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #4 from Nicola Larosa  ---
Now working on 3.7.0. :-)

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Re: [PATCHv3 0/7] Support for Tegra 2D hardware

[Lucas Stach]

Hi Terje,

Am Donnerstag, den 13.12.2012, 16:04 +0200 schrieb Terje Bergstrom:
> This set of patches adds support for Tegra20 and Tegra30 host1x and
> 2D. It is based on linux-next.
> 
> The third version has too many changes to list all of them. Here are
> highlights:
>  * Renamed to host1x, and moved to drivers/gpu/host1x
>  * Greatly simplified the inner workings between physical and logical
>driver
>  * Does not use AUXDATA for passing data to driver
>  * Runtime power management removed - will replace with runtime PM
>later
>  * IOCTLs padded and use __64 for passing pointers
>  * DMABUF support removed, replaced with GEM CMA support

You are still doing the allocation the IMHO wrong way around. I thought
we agreed to do all the allocations in host1x, which obviously means not
using the cma_gem_helpers anymore, but introducing a new native host1x
object to back GEM/V4L/whatever objects. IMHO the current approach is a
clear layering violation and makes proper IOMMU support a lot harder. It
would also allow to get rid of all the indirections and ifdefs in host1x
memmgr, as host1x would only have to deal with it's native objects.

All the complexity of converting host1x to GEM objects should be located
in tegradrm and not be scattered between different modules.

Did you leave this out on purpose in this version of the patchset?

>  * host1x driver validates command streams and copies them to kernel
>owned buffer
>  * Generic interrupt support removed - only syncpt irq remains
>  * Sync points are allocated now dynamically
>  * IO register space handling rewritten to use helper functions
>  * Other numerous fixes and simplifications to code
> 
> Some of the issues left open:
>  * Register definitions still use static inline. There has been a
>debate about code style versus ability to use compiler type
>checking and code coverage analysis. There was no conclusion, so
>I left it as was.
>  * tegradrm has a global variable. Plan was to hide that behind a
>virtual device, and use that as DRM root device. That plan went
>bad once the FB CMA helper used the device for trying to allocate
>memory.
See above, we should get rid of the helpers and do all allocations
within host1x.

Regards,
Lucas


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Re: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Inki Dae]

2012/12/13 Daniel Vetter 

> Hi Inki,
>
> I've pushed out the latest bits to
> http://cgit.freedesktop.org/~danvet/drm/log/?h=drm-kms-locking with
> some hacks on top to be able to compile all the arm drivers. Testing
> feedback of the entire pile would be awesome, especially since you've
> had some issues with framebuffer lifecycle and those should now be
> correctly fixable with the proper refcounting. If you have too many
> conflicts pls yell so that I can include your base into mine and
> rebase the entire series.
>
>
Hi Daniel,

How about rebasing this patch to top of git://
people.freedesktop.org/~airlied/linux.git drm-next?
Exynos's many patches have already been merged to drm-next. Or if you are
ok, I'd like to rebase your patch to -next and test it. I don't care either
way. :)

If there is any problem, please let me know.

Thanks,
Inki Dae

Thanks, Daniel
>
> On Thu, Dec 13, 2012 at 1:26 PM, Inki Dae  wrote:
> >> -Original Message-
> >> From: dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org
> >> [mailto:dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org]
> On
> >> Behalf Of Daniel Vetter
> >> Sent: Thursday, December 13, 2012 8:05 PM
> >> To: DRI Development
> >> Cc: Nouveau Dev; Intel Graphics Development; Daniel Vetter
> >> Subject: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence
> >>
> >> For user framebuffers it's easier to just inline the
> >> exynos_drm_framebuffer_init helper instead of trying to adjust it -
> >> most of the things that helper sets up need to be overwritten anyway
> >> again due to the multiple backing storage objects support exynos has,
> >> but does not use for the fbdev.
> >>
> >
> > Hi Daniel,
> >
> > I'd rebase this patch to -next. This patch is conflicted with -next.
> > And if there is no any problem after test, will apply it.
>
>
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCHv3 4/7] gpu: host1x: Add debug support

[Joe Perches]

On Thu, 2012-12-13 at 16:04 +0200, Terje Bergstrom wrote:
> Add support for host1x debugging. Adds debugfs entries, and dumps
> channel state to UART in case of stuck job.

trivial note:

[]

> diff --git a/drivers/gpu/host1x/debug.h b/drivers/gpu/host1x/debug.h
[]
> +void host1x_debug_output(struct output *o, const char *fmt, ...);

This should be marked __printf(2, 3)
so the compiler verifies format and argument types.


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Re: [PATCHv3 0/7] Support for Tegra 2D hardware

[Terje Bergström]

On 13.12.2012 17:03, Lucas Stach wrote:
> You are still doing the allocation the IMHO wrong way around. I thought
> we agreed to do all the allocations in host1x, which obviously means not
> using the cma_gem_helpers anymore, but introducing a new native host1x
> object to back GEM/V4L/whatever objects. IMHO the current approach is a
> clear layering violation and makes proper IOMMU support a lot harder. It
> would also allow to get rid of all the indirections and ifdefs in host1x
> memmgr, as host1x would only have to deal with it's native objects.
> 
> All the complexity of converting host1x to GEM objects should be located
> in tegradrm and not be scattered between different modules.
> 
> Did you leave this out on purpose in this version of the patchset?

Forgot to mention that, as IOMMU and consequently the "proper"
allocation support was planned as a follow-up. I wanted to keep the
scope of this set as small as possible.

The plan we agreed on still holds.

Terje

>>  * tegradrm has a global variable. Plan was to hide that behind a
>>virtual device, and use that as DRM root device. That plan went
>>bad once the FB CMA helper used the device for trying to allocate
>>memory.
> See above, we should get rid of the helpers and do all allocations
> within host1x.

I noticed that IOMMU and not using the CMA FB helper is now exynos
managed to do this.

Terje
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[Bug 50655] ATI RV670 [Radeon HD 3870] Ioquake games causes GPU lockup (waiting for 0x00003039 last fence id 0x00003030)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=50655

--- Comment #30 from Andy Furniss  ---
I've just put my rv670 (HD3850) card back in my AGP box and can reliably get
etqw to lock after a few seconds with waiting for fence.

I may be too different from the OP for this to be relevant to this bug
differences -

AGP, 32 bit, running drm-fixes kernel, no writebacks and my bisect came up with
a commit postdating the original report.

But for me - 

1eedebc65b02130ef7a27062a1ed67972a317a08 is first bad commit
commit 1eedebc65b02130ef7a27062a1ed67972a317a08
Author: Marek Olšák 
Date:   Thu Nov 1 02:00:37 2012 +0100

r600g: re-enable handling of DISCARD_RANGE, improving performance

It seems to work for me now. Even the graphics corruption is gone.

This also boosts performance in Reaction Quake.

Gives a reliable rv670 lock up with etqw.

This is testing with mesa built with --disable-llvm (as R600_LLVM doesn't work
at all on this card)

It may (or may not) be worth anyone testing with mesa master to try resetting
it to the commit before the one above like -

make distclean
git clean -dfx
git reset --hard fa58644855e44830e0b91dc627703c236fa6712a

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[Bug 50655] ATI RV670 [Radeon HD 3870] Ioquake games causes GPU lockup (waiting for 0x00003039 last fence id 0x00003030)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=50655

--- Comment #31 from Bryan Quigley  ---
Andy,

How many times did you try it at that commit?  I ask because I orginally
bisected it wrong because it didn't always reproduce consistantly for me. 
(Would take >1 run)

I'll test it out though.

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Re: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Daniel Vetter]

On Thu, Dec 13, 2012 at 4:16 PM, Inki Dae  wrote:
> How about rebasing this patch to top of
> git://people.freedesktop.org/~airlied/linux.git drm-next?
> Exynos's many patches have already been merged to drm-next. Or if you are
> ok, I'd like to rebase your patch to -next and test it. I don't care either
> way. :)

I've pushed out a rebased version, but somehow I can't compile-test
exynos any more :( Probably missing some other stuff from linux-next.
Anyway, I don't mind which patch you pick or whether you just roll
your own, the important thing is that drm_framebuffer_init is called
_after_ everything is set up and initialized. Everything else doesn't
really matter.
-Daniel
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[Bug 50655] ATI RV670 [Radeon HD 3870] Ioquake games causes GPU lockup (waiting for 0x00003039 last fence id 0x00003030)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=50655

--- Comment #32 from Andy Furniss  ---
Looks like this was a separate issue - I've just managed to get openarena to
lock GPU with mesa set to before

r600g: re-enable handling of DISCARD_RANGE

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[Bug 50655] ATI RV670 [Radeon HD 3870] Ioquake games causes GPU lockup (waiting for 0x00003039 last fence id 0x00003030)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=50655

--- Comment #33 from Andy Furniss  ---
(In reply to comment #31)
> Andy,
> 
> How many times did you try it at that commit?  I ask because I orginally
> bisected it wrong because it didn't always reproduce consistantly for me. 
> (Would take >1 run)
> 
> I'll test it out though.

I am still testing - for etqw it looks good, but as I just posted I can after
some time get openarena to lock.

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[PATCH 1/4] drm/radeon/kms: add 6xx/7xx CS parser for async DMA

[alexdeucher]

From: Alex Deucher 

Allows us to use the DMA ring from userspace.
DMA doesn't have a good NOP packet in which to embed the
reloc idx, so userspace has to add a reloc for each
buffer used and order them to match the command stream.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/r600_cs.c |  193 ++
 drivers/gpu/drm/radeon/radeon.h  |1 +
 drivers/gpu/drm/radeon/radeon_asic.c |6 +-
 drivers/gpu/drm/radeon/radeon_asic.h |1 +
 drivers/gpu/drm/radeon/radeon_cs.c   |1 +
 5 files changed, 199 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 5d6e7f9..f23609ac 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -2568,3 +2568,196 @@ void r600_cs_legacy_init(void)
 {
r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_nomm;
 }
+
+/*
+ *  DMA
+ */
+/**
+ * r600_dma_cs_next_reloc() - parse next reloc
+ * @p: parser structure holding parsing context.
+ * @cs_reloc:  reloc informations
+ *
+ * Return the next reloc, do bo validation and compute
+ * GPU offset using the provided start.
+ **/
+int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
+  struct radeon_cs_reloc **cs_reloc)
+{
+   struct radeon_cs_chunk *relocs_chunk;
+   unsigned idx;
+
+   if (p->chunk_relocs_idx == -1) {
+   DRM_ERROR("No relocation chunk !\n");
+   return -EINVAL;
+   }
+   *cs_reloc = NULL;
+   relocs_chunk = &p->chunks[p->chunk_relocs_idx];
+   idx = p->dma_reloc_idx;
+   if (idx >= relocs_chunk->length_dw) {
+   DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
+ idx, relocs_chunk->length_dw);
+   return -EINVAL;
+   }
+   /* FIXME: we assume reloc size is 4 dwords */
+   *cs_reloc = p->relocs_ptr[(idx / 4)];
+   p->dma_reloc_idx++;
+   return 0;
+}
+
+#define GET_DMA_CMD(h) (((h) & 0xf000) >> 28)
+#define GET_DMA_COUNT(h) ((h) & 0x)
+#define GET_DMA_T(h) (((h) & 0x0080) >> 23)
+
+/**
+ * r600_dma_cs_parse() - parse the DMA IB
+ * @p: parser structure holding parsing context.
+ *
+ * Parses the DMA IB from the CS ioctl and updates
+ * the GPU addresses based on the reloc information and
+ * checks for errors. (R6xx-R7xx)
+ * Returns 0 for success and an error on failure.
+ **/
+int r600_dma_cs_parse(struct radeon_cs_parser *p)
+{
+   struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
+   struct radeon_cs_reloc *src_reloc, *dst_reloc;
+   u32 header, cmd, count, tiled;
+   volatile u32 *ib = p->ib.ptr;
+   u32 idx, idx_value;
+   u64 src_offset, dst_offset;
+   int r;
+
+   do {
+   if (p->idx >= ib_chunk->length_dw) {
+   DRM_ERROR("Can not parse packet at %d after CS end %d 
!\n",
+ p->idx, ib_chunk->length_dw);
+   return -EINVAL;
+   }
+   idx = p->idx;
+   header = radeon_get_ib_value(p, idx);
+   cmd = GET_DMA_CMD(header);
+   count = GET_DMA_COUNT(header);
+   tiled = GET_DMA_T(header);
+
+   switch (cmd) {
+   case DMA_PACKET_WRITE:
+   r = r600_dma_cs_next_reloc(p, &dst_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_WRITE\n");
+   return -EINVAL;
+   }
+   if (tiled) {
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset 
>> 8);
+   dst_offset = ib[idx+1];
+   dst_offset <<= 8;
+   p->idx += count + 5;
+   } else {
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 
0xfffc);
+   ib[idx+2] += 
upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff;
+   dst_offset = ib[idx+1];
+   dst_offset |= ((u64)(ib[idx+2] & 0xff)) << 32;
+   p->idx += count + 3;
+   }
+   if ((dst_offset + (count * 4)) > 
radeon_bo_size(dst_reloc->robj)) {
+   dev_warn(p->dev, "DMA write buffer too small 
(%llu %lu)\n",
+dst_offset, 
radeon_bo_size(dst_reloc->robj));
+   return -EINVAL;
+   }
+   break;
+   case DMA_PACKET_COPY:
+   r = r600_dma_cs_next_reloc(p, &src_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_COPY\n");
+   return -EINVAL;
+   }
+  

[PATCH 2/4] drm/radeon/kms: add evergreen/cayman CS parser for async DMA

[alexdeucher]

From: Alex Deucher 

Allows us to use the DMA ring from userspace.
DMA doesn't have a good NOP packet in which to embed the
reloc idx, so userspace has to add a reloc for each
buffer used and order them to match the command stream.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/evergreen_cs.c |  449 +
 drivers/gpu/drm/radeon/radeon_asic.c  |   14 +-
 drivers/gpu/drm/radeon/radeon_asic.h  |1 +
 3 files changed, 457 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c 
b/drivers/gpu/drm/radeon/evergreen_cs.c
index 62c2271..adfc66f 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -34,6 +34,8 @@
 #define MAX(a,b)   (((a)>(b))?(a):(b))
 #define MIN(a,b)   (((a)<(b))?(a):(b))
 
+int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
+  struct radeon_cs_reloc **cs_reloc);
 static int evergreen_cs_packet_next_reloc(struct radeon_cs_parser *p,
  struct radeon_cs_reloc **cs_reloc);
 
@@ -2804,6 +2806,453 @@ int evergreen_cs_parse(struct radeon_cs_parser *p)
return 0;
 }
 
+/*
+ *  DMA
+ */
+
+#define GET_DMA_CMD(h) (((h) & 0xf000) >> 28)
+#define GET_DMA_COUNT(h) ((h) & 0x000f)
+#define GET_DMA_T(h) (((h) & 0x0080) >> 23)
+#define GET_DMA_NEW(h) (((h) & 0x0400) >> 26)
+#define GET_DMA_MISC(h) (((h) & 0x070) >> 20)
+
+/**
+ * evergreen_dma_cs_parse() - parse the DMA IB
+ * @p: parser structure holding parsing context.
+ *
+ * Parses the DMA IB from the CS ioctl and updates
+ * the GPU addresses based on the reloc information and
+ * checks for errors. (Evergreen-Cayman)
+ * Returns 0 for success and an error on failure.
+ **/
+int evergreen_dma_cs_parse(struct radeon_cs_parser *p)
+{
+   struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
+   struct radeon_cs_reloc *src_reloc, *dst_reloc, *dst2_reloc;
+   u32 header, cmd, count, tiled, new_cmd, misc;
+   volatile u32 *ib = p->ib.ptr;
+   u32 idx, idx_value;
+   u64 src_offset, dst_offset, dst2_offset;
+   int r;
+
+   do {
+   if (p->idx >= ib_chunk->length_dw) {
+   DRM_ERROR("Can not parse packet at %d after CS end %d 
!\n",
+ p->idx, ib_chunk->length_dw);
+   return -EINVAL;
+   }
+   idx = p->idx;
+   header = radeon_get_ib_value(p, idx);
+   cmd = GET_DMA_CMD(header);
+   count = GET_DMA_COUNT(header);
+   tiled = GET_DMA_T(header);
+   new_cmd = GET_DMA_NEW(header);
+   misc = GET_DMA_MISC(header);
+
+   switch (cmd) {
+   case DMA_PACKET_WRITE:
+   r = r600_dma_cs_next_reloc(p, &dst_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_WRITE\n");
+   return -EINVAL;
+   }
+   if (tiled) {
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset 
>> 8);
+   dst_offset = ib[idx+1];
+   dst_offset <<= 8;
+   p->idx += count + 7;
+   } else {
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 
0xfffc);
+   ib[idx+2] += 
upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff;
+   dst_offset = ib[idx+1];
+   dst_offset |= ((u64)(ib[idx+2] & 0xff)) << 32;
+   p->idx += count + 3;
+   }
+   if ((dst_offset + (count * 4)) > 
radeon_bo_size(dst_reloc->robj)) {
+   dev_warn(p->dev, "DMA write buffer too small 
(%llu %lu)\n",
+dst_offset, 
radeon_bo_size(dst_reloc->robj));
+   return -EINVAL;
+   }
+   break;
+   case DMA_PACKET_COPY:
+   r = r600_dma_cs_next_reloc(p, &src_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_COPY\n");
+   return -EINVAL;
+   }
+   r = r600_dma_cs_next_reloc(p, &dst_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_COPY\n");
+   return -EINVAL;
+   }
+   if (tiled) {
+   idx_value = radeon_get_ib_value(p, idx + 2);
+   if (new_cmd) {
+   switch (misc) {
+   case 0:
+ 

[PATCH 3/4] drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI

[alexdeucher]

From: Alex Deucher 

Allows us to use async DMA from userspace.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/evergreen_cs.c |  111 +
 drivers/gpu/drm/radeon/radeon_asic.c  |6 ++
 drivers/gpu/drm/radeon/radeon_asic.h  |1 +
 3 files changed, 118 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c 
b/drivers/gpu/drm/radeon/evergreen_cs.c
index adfc66f..fefb2cc 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -3543,3 +3543,114 @@ int evergreen_ib_parse(struct radeon_device *rdev, 
struct radeon_ib *ib)
 
return ret;
 }
+
+/**
+ * evergreen_dma_ib_parse() - parse the DMA IB for VM
+ * @rdev: radeon_device pointer
+ * @ib:radeon_ib pointer
+ *
+ * Parses the DMA IB from the VM CS ioctl
+ * checks for errors. (Cayman-SI)
+ * Returns 0 for success and an error on failure.
+ **/
+int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
+{
+   u32 idx = 0;
+   u32 header, cmd, count, tiled, new_cmd, misc;
+
+   do {
+   header = ib->ptr[idx];
+   cmd = GET_DMA_CMD(header);
+   count = GET_DMA_COUNT(header);
+   tiled = GET_DMA_T(header);
+   new_cmd = GET_DMA_NEW(header);
+   misc = GET_DMA_MISC(header);
+
+   switch (cmd) {
+   case DMA_PACKET_WRITE:
+   if (tiled)
+   idx += count + 7;
+   else
+   idx += count + 3;
+   break;
+   case DMA_PACKET_COPY:
+   if (tiled) {
+   if (new_cmd) {
+   switch (misc) {
+   case 0:
+   /* L2T, frame to fields */
+   idx += 10;
+   break;
+   case 1:
+   /* L2T, T2L partial */
+   idx += 12;
+   break;
+   case 3:
+   /* L2T, broadcast */
+   idx += 10;
+   break;
+   case 4:
+   /* L2T, T2L */
+   idx += 9;
+   break;
+   case 5:
+   /* T2T partial */
+   idx += 13;
+   break;
+   case 7:
+   /* L2T, broadcast */
+   idx += 10;
+   break;
+   default:
+   DRM_ERROR("bad DMA_PACKET_COPY 
misc %u\n", misc);
+   return -EINVAL;
+   }
+   } else {
+   switch (misc) {
+   case 0:
+   idx += 9;
+   break;
+   default:
+   DRM_ERROR("bad DMA_PACKET_COPY 
misc %u\n", misc);
+   return -EINVAL;
+   }
+   }
+   } else {
+   if (new_cmd) {
+   switch (misc) {
+   case 0:
+   /* L2L, byte */
+   idx += 5;
+   break;
+   case 1:
+   /* L2L, partial */
+   idx += 9;
+   break;
+   case 4:
+   /* L2L, dw, broadcast */
+   idx += 7;
+   break;
+   default:
+   DRM_ERROR("bad DMA_PACKET_COPY 
misc %u\n", misc);
+  

[PATCH 4/4] drm/radeon: enable the async DMA rings in the CS ioctl

[alexdeucher]

From: Alex Deucher 

This enables the functionality added in the previous
patches.  Userspace acceleration drivers can use the
CS ioctl to submit command buffers to the async DMA
rings.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_cs.c |   12 
 include/uapi/drm/radeon_drm.h  |1 +
 2 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_cs.c 
b/drivers/gpu/drm/radeon/radeon_cs.c
index 1b32a5a..396baba 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -112,6 +112,18 @@ static int radeon_cs_get_ring(struct radeon_cs_parser *p, 
u32 ring, s32 priority
} else
p->ring = RADEON_RING_TYPE_GFX_INDEX;
break;
+   case RADEON_CS_RING_DMA:
+   if (p->rdev->family >= CHIP_CAYMAN) {
+   if (p->priority > 0)
+   p->ring = R600_RING_TYPE_DMA_INDEX;
+   else
+   p->ring = CAYMAN_RING_TYPE_DMA1_INDEX;
+   } else if (p->rdev->family >= CHIP_R600) {
+   p->ring = R600_RING_TYPE_DMA_INDEX;
+   } else {
+   return -EINVAL;
+   }
+   break;
}
return 0;
 }
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index 5645a87..eeda917 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -917,6 +917,7 @@ struct drm_radeon_gem_va {
 /* The second dword of RADEON_CHUNK_ID_FLAGS is a uint32 that sets the ring 
type */
 #define RADEON_CS_RING_GFX  0
 #define RADEON_CS_RING_COMPUTE  1
+#define RADEON_CS_RING_DMA  2
 /* The third dword of RADEON_CHUNK_ID_FLAGS is a sint32 that sets the priority 
*/
 /* 0 = normal, + = higher priority, - = lower priority */
 
-- 
1.7.7.5

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Re: [RFC v2 6/8] gpu: drm: tegra: Remove redundant host1x

[Stephen Warren]

On 12/13/2012 01:57 AM, Thierry Reding wrote:
> On Thu, Dec 13, 2012 at 10:48:55AM +0200, Terje Bergström wrote:
>> On 12.12.2012 18:08, Thierry Reding wrote:
>>> I've briefly discussed this with Stephen on IRC because I
>>> thought I had remembered him objecting to the idea of adding a
>>> dummy device just for this purpose. It turns out, however, that
>>> what he didn't like was to add a dummy node to the DT just to
>>> make this happen, but he has no (strong) objections to a dummy
>>> platform device.
>>> 
>>> While I'm not very happy about that solution, I've been going
>>> over it for a week now and haven't come up with any better
>>> alternative that doesn't have its own disadvantages. So perhaps
>>> we should go ahead and implement that. For the host1x driver
>>> this really just means creating a platform device and adding it
>>> to the system, with some of the fields tweaked to make things
>>> work.
>> 
>> Even the virtual device is not too beautiful. The problem is that
>> the virtual device is not physical parent for DC, HDMI, etc, so 
>> dev_get_drvdata(pdev->dev.parent) returns the data from host1x
>> device, not the virtual device.
>> 
>> We'll post with something that goes around this, but it's not
>> going to be too pretty. Let's try to find the solution once we
>> get the code out.
> 
> After some more discussion with Stephen on IRC we came to the
> conclusion that the easiest might be to have tegra-drm call into
> host1x with something like:
> 
> void host1x_set_drm_device(struct host1x *host1x, struct device
> *dev);

If host1x is registering the dummy device that causes tegradrm to be
instantiated, then presumably there's no need for the API above, since
host1x will already have the struct device * for tegradrm, since it
created it?

> Once the dummy device has been properly set up and have each client
> use
> 
> struct device *host1x_get_drm_device(struct host1x *host1x);
> 
> to obtain a pointer to the dummy device, such that it can receive
> the driver-private data using dev_get_drvdata() on the returned
> device. As long as tegra-drm hasn't registered with host1x yet, the
> above function could return ERR_PTR(-EPROBE_DEFER), so that
> dependencies are automatically handled. This is required because,
> tegra-drm not being the parent of the child devices, it can be
> guaranteed that it is probed before any of the children.
> 
> That way we should be able to get around any circular
> dependencies, since we only call into host1x from tegra-drm but not
> the other way around.


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Re: [PATCH 1/4] drm/radeon/kms: add 6xx/7xx CS parser for async DMA

[Christian König]

On 13.12.2012 18:57, alexdeuc...@gmail.com wrote:

From: Alex Deucher 

Allows us to use the DMA ring from userspace.
DMA doesn't have a good NOP packet in which to embed the
reloc idx, so userspace has to add a reloc for each
buffer used and order them to match the command stream.

Signed-off-by: Alex Deucher 


Looks good at first glance:

Reviewed-by: Christian König 


---
  drivers/gpu/drm/radeon/r600_cs.c |  193 ++
  drivers/gpu/drm/radeon/radeon.h  |1 +
  drivers/gpu/drm/radeon/radeon_asic.c |6 +-
  drivers/gpu/drm/radeon/radeon_asic.h |1 +
  drivers/gpu/drm/radeon/radeon_cs.c   |1 +
  5 files changed, 199 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 5d6e7f9..f23609ac 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -2568,3 +2568,196 @@ void r600_cs_legacy_init(void)
  {
r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_nomm;
  }
+
+/*
+ *  DMA
+ */
+/**
+ * r600_dma_cs_next_reloc() - parse next reloc
+ * @p: parser structure holding parsing context.
+ * @cs_reloc:  reloc informations
+ *
+ * Return the next reloc, do bo validation and compute
+ * GPU offset using the provided start.
+ **/
+int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
+  struct radeon_cs_reloc **cs_reloc)
+{
+   struct radeon_cs_chunk *relocs_chunk;
+   unsigned idx;
+
+   if (p->chunk_relocs_idx == -1) {
+   DRM_ERROR("No relocation chunk !\n");
+   return -EINVAL;
+   }
+   *cs_reloc = NULL;
+   relocs_chunk = &p->chunks[p->chunk_relocs_idx];
+   idx = p->dma_reloc_idx;
+   if (idx >= relocs_chunk->length_dw) {
+   DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
+ idx, relocs_chunk->length_dw);
+   return -EINVAL;
+   }
+   /* FIXME: we assume reloc size is 4 dwords */
+   *cs_reloc = p->relocs_ptr[(idx / 4)];
+   p->dma_reloc_idx++;
+   return 0;
+}
+
+#define GET_DMA_CMD(h) (((h) & 0xf000) >> 28)
+#define GET_DMA_COUNT(h) ((h) & 0x)
+#define GET_DMA_T(h) (((h) & 0x0080) >> 23)
+
+/**
+ * r600_dma_cs_parse() - parse the DMA IB
+ * @p: parser structure holding parsing context.
+ *
+ * Parses the DMA IB from the CS ioctl and updates
+ * the GPU addresses based on the reloc information and
+ * checks for errors. (R6xx-R7xx)
+ * Returns 0 for success and an error on failure.
+ **/
+int r600_dma_cs_parse(struct radeon_cs_parser *p)
+{
+   struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
+   struct radeon_cs_reloc *src_reloc, *dst_reloc;
+   u32 header, cmd, count, tiled;
+   volatile u32 *ib = p->ib.ptr;
+   u32 idx, idx_value;
+   u64 src_offset, dst_offset;
+   int r;
+
+   do {
+   if (p->idx >= ib_chunk->length_dw) {
+   DRM_ERROR("Can not parse packet at %d after CS end %d 
!\n",
+ p->idx, ib_chunk->length_dw);
+   return -EINVAL;
+   }
+   idx = p->idx;
+   header = radeon_get_ib_value(p, idx);
+   cmd = GET_DMA_CMD(header);
+   count = GET_DMA_COUNT(header);
+   tiled = GET_DMA_T(header);
+
+   switch (cmd) {
+   case DMA_PACKET_WRITE:
+   r = r600_dma_cs_next_reloc(p, &dst_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_WRITE\n");
+   return -EINVAL;
+   }
+   if (tiled) {
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset 
>> 8);
+   dst_offset = ib[idx+1];
+   dst_offset <<= 8;
+   p->idx += count + 5;
+   } else {
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 
0xfffc);
+   ib[idx+2] += 
upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff;
+   dst_offset = ib[idx+1];
+   dst_offset |= ((u64)(ib[idx+2] & 0xff)) << 32;
+   p->idx += count + 3;
+   }
+   if ((dst_offset + (count * 4)) > 
radeon_bo_size(dst_reloc->robj)) {
+   dev_warn(p->dev, "DMA write buffer too small (%llu 
%lu)\n",
+dst_offset, 
radeon_bo_size(dst_reloc->robj));
+   return -EINVAL;
+   }
+   break;
+   case DMA_PACKET_COPY:
+   r = r600_dma_cs_next_reloc(p, &src_reloc);
+   if (r) {
+   DR

Re: [RFC v2 6/8] gpu: drm: tegra: Remove redundant host1x

[Thierry Reding]

On Thu, Dec 13, 2012 at 10:58:55AM -0700, Stephen Warren wrote:
> On 12/13/2012 01:57 AM, Thierry Reding wrote:
> > On Thu, Dec 13, 2012 at 10:48:55AM +0200, Terje Bergström wrote:
> >> On 12.12.2012 18:08, Thierry Reding wrote:
> >>> I've briefly discussed this with Stephen on IRC because I
> >>> thought I had remembered him objecting to the idea of adding a
> >>> dummy device just for this purpose. It turns out, however, that
> >>> what he didn't like was to add a dummy node to the DT just to
> >>> make this happen, but he has no (strong) objections to a dummy
> >>> platform device.
> >>> 
> >>> While I'm not very happy about that solution, I've been going
> >>> over it for a week now and haven't come up with any better
> >>> alternative that doesn't have its own disadvantages. So perhaps
> >>> we should go ahead and implement that. For the host1x driver
> >>> this really just means creating a platform device and adding it
> >>> to the system, with some of the fields tweaked to make things
> >>> work.
> >> 
> >> Even the virtual device is not too beautiful. The problem is that
> >> the virtual device is not physical parent for DC, HDMI, etc, so 
> >> dev_get_drvdata(pdev->dev.parent) returns the data from host1x
> >> device, not the virtual device.
> >> 
> >> We'll post with something that goes around this, but it's not
> >> going to be too pretty. Let's try to find the solution once we
> >> get the code out.
> > 
> > After some more discussion with Stephen on IRC we came to the
> > conclusion that the easiest might be to have tegra-drm call into
> > host1x with something like:
> > 
> > void host1x_set_drm_device(struct host1x *host1x, struct device
> > *dev);
> 
> If host1x is registering the dummy device that causes tegradrm to be
> instantiated, then presumably there's no need for the API above, since
> host1x will already have the struct device * for tegradrm, since it
> created it?

Right, that won't be necessary of course. As long as the driver-private
data of the device stays NULL until tegra-drm is ready (has finished
probing) just getting the struct device from the clients and looking at
that should be enough.

Thierry


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Re: new userspace API approaches atomic *

[Rob Clark]

On Thu, Dec 13, 2012 at 3:13 PM, Dave Airlie  wrote:
> So this is a how to get new features pronouncement,
>
> From what I can see people would like to have atomic interfaces for
> pageflip and modesetting merged,
>
> Now how I think developing and merging these will work (i.e. do it
> this way or don't bother)
>
> a) get an API you are happy with working, it doesn't need to be perfect
>
> b) rework the internal drm core/driver APIs for all drivers to allow
> this new interface to be used. Remove
> the old internal apis and create an interface layer between the old
> userspace interface and the new API.

fwiw, I had started to do this w/ my atomic series.. what I did was to
keep (for example) old .page_flip(), as a legacy path so we didn't
have to merge changes for all drivers in one shot, but the idea was
to, after all drivers are updated, to remove the legacy paths.

The userspace API for atomic pageflip is really a small part of the
whole thing.  The bigger thing is atomic fxns and property conversion.
 So we could even leave off the new userspace API for now.  Probably
the addition of the new ioctl(s) should be the last part.

I had started merging my changes w/ Ville's changes.  I got a bit
distracted on writing a new kms driver (should have RFC to send for
that, hopefully this afternoon).. but hopefully should have some more
time to spend on this RSN..

BR,
-R

> c) throw away (a)
>
> d) reimplement a userspace API on top of the new internal driver API
> fixing all the things you have learned,
> were crazy, insane, nuts etc.
>
> e) have a lot of tests.
>
> f) get b merged standalone, transition phase is fine, but every driver
> needs to be ported before the API
> goes in.
>
> g) throw away d
>
> h) write final API and get it merged.
>
> Yes this is probably more work than you or your manager is willing to
> buy in, but then maybe the feature isn't that important.
>
> Dave.
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[PATCH] drm/radeon: fix htile buffer size computation for command stream checker

[j . glisse]

From: Jerome Glisse 

Fix the size computation of the htile buffer.

Signed-off-by: Jerome Glisse 
---
 drivers/gpu/drm/radeon/evergreen_cs.c | 17 +--
 drivers/gpu/drm/radeon/r600_cs.c  | 92 ---
 drivers/gpu/drm/radeon/radeon_drv.c   |  3 +-
 3 files changed, 35 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c 
b/drivers/gpu/drm/radeon/evergreen_cs.c
index 62c2271..fc7e613 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -507,20 +507,28 @@ static int evergreen_cs_track_validate_htile(struct 
radeon_cs_parser *p,
/* height is npipes htiles aligned == npipes * 8 pixel aligned 
*/
nby = round_up(nby, track->npipes * 8);
} else {
+   /* always assume 8x8 htile */
+   /* align is htile align * 8, htile align vary according to
+* number of pipe and tile width and nby
+*/
switch (track->npipes) {
case 8:
+   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
nbx = round_up(nbx, 64 * 8);
nby = round_up(nby, 64 * 8);
break;
case 4:
+   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
nbx = round_up(nbx, 64 * 8);
nby = round_up(nby, 32 * 8);
break;
case 2:
+   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
nbx = round_up(nbx, 32 * 8);
nby = round_up(nby, 32 * 8);
break;
case 1:
+   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
nbx = round_up(nbx, 32 * 8);
nby = round_up(nby, 16 * 8);
break;
@@ -531,9 +539,10 @@ static int evergreen_cs_track_validate_htile(struct 
radeon_cs_parser *p,
}
}
/* compute number of htile */
-   nbx = nbx / 8;
-   nby = nby / 8;
-   size = nbx * nby * 4;
+   nbx = nbx >> 3;
+   nby = nby >> 3;
+   /* size must be aligned on npipes * 2K boundary */
+   size = roundup(nbx * nby * 4, track->npipes * (2 << 10));
size += track->htile_offset;
 
if (size > radeon_bo_size(track->htile_bo)) {
@@ -1790,6 +1799,8 @@ static int evergreen_cs_check_reg(struct radeon_cs_parser 
*p, u32 reg, u32 idx)
case DB_HTILE_SURFACE:
/* 8x8 only */
track->htile_surface = radeon_get_ib_value(p, idx);
+   /* force 8x8 htile width and height */
+   ib[idx] |= 3;
track->db_dirty = true;
break;
case CB_IMMED0_BASE:
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 5d6e7f9..0b4d833 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -657,87 +657,30 @@ static int r600_cs_track_validate_db(struct 
radeon_cs_parser *p)
/* nby is npipes htiles aligned == npipes * 8 pixel 
aligned */
nby = round_up(nby, track->npipes * 8);
} else {
-   /* htile widht & nby (8 or 4) make 2 bits number */
-   tmp = track->htile_surface & 3;
+   /* always assume 8x8 htile */
/* align is htile align * 8, htile align vary according 
to
 * number of pipe and tile width and nby
 */
switch (track->npipes) {
case 8:
-   switch (tmp) {
-   case 3: /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
-   nbx = round_up(nbx, 64 * 8);
-   nby = round_up(nby, 64 * 8);
-   break;
-   case 2: /* HTILE_WIDTH = 4 & HTILE_HEIGHT = 8*/
-   case 1: /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 4*/
-   nbx = round_up(nbx, 64 * 8);
-   nby = round_up(nby, 32 * 8);
-   break;
-   case 0: /* HTILE_WIDTH = 4 & HTILE_HEIGHT = 4*/
-   nbx = round_up(nbx, 32 * 8);
-   nby = round_up(nby, 32 * 8);
-   break;
-   default:
-   return -EINVAL;
-   }
+   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
+   nbx = round_up(nbx, 64 * 8);
+   nby = round_up(nby, 64 * 8);
 

[Bug 50655] ATI RV670 [Radeon HD 3870] Ioquake games causes GPU lockup (waiting for 0x00003039 last fence id 0x00003030)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=50655

--- Comment #34 from Andy Furniss  ---
(In reply to comment #9)
> I think I did everything right in this bisect (I didn't the first attempt).
> 
> fbebd431ec4e2e461a0cbcd5f3a04a000b8f6bbf is the first bad commit
> commit fbebd431ec4e2e461a0cbcd5f3a04a000b8f6bbf
> Author: Marek Olšák 
> Date:   Fri Feb 3 05:05:31 2012 +0100
> 
> r600g: move invariant register updates into start_cs for r6xx-r7xx
> 
> :04 04 dd9232a0c49e54e0cd536fa858dc131982dc2fbe
> 379e1d61c53d98a8706f32da5020dc22c0c0ee33 Msrc

This seems correct, I can get a lock after a few minutes on this commit, but
have so far failed to lock on the one before it.

-- 
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Re: drm: Added ppc64 root device getter

[Bjorn Helgaas]

[+cc Betty]

On Thu, Dec 13, 2012 at 4:04 PM, Lucas Kannebley Tavares
 wrote:
> On architectures such as ppc64, there is no root bus device (it belongs
> to the hypervisor). DRM attempted to get one, causing a null-pointer
> dereference.

In addition to ppc64, at least ia64 and parisc have the same situation
of the PCI host bridge not appearing as a  PCI device itself.

> Signed-off-by: Lucas Kannebley Tavares 
>
> --
> diff --git a/arch/powerpc/platforms/pseries/Makefile
> b/arch/powerpc/platforms/pseries/Makefile
> index 890622b..ddfdda8 100644
> --- a/arch/powerpc/platforms/pseries/Makefile
> +++ b/arch/powerpc/platforms/pseries/Makefile
> @@ -1,6 +1,8 @@
>  ccflags-$(CONFIG_PPC64):= -mno-minimal-toc
>  ccflags-$(CONFIG_PPC_PSERIES_DEBUG)+= -DDEBUG
>
> +drm-y  += drm_pci.o
> +
>  obj-y  := lpar.o hvCall.o nvram.o reconfig.o \
>setup.o iommu.o event_sources.o ras.o \
>firmware.o power.o dlpar.o mobility.o
> diff --git a/arch/powerpc/platforms/pseries/drm_pci.c
> b/arch/powerpc/platforms/pseries/drm_pci.c
> new file mode 100644
> index 000..da6675e
> --- /dev/null
> +++ b/arch/powerpc/platforms/pseries/drm_pci.c
> @@ -0,0 +1,24 @@
> +/*
> + * Copyright (C) 2012 Lucas Kannebley Tavares, IBM Corporation
> + *
> + * pSeries specific routines for DRM.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
> + */
> +
> +inline struct pci_device *drm_get_parent_device(struct drm_device *dev) {
> +   return (dev->pdev->bus->self == NULL) ? dev->pdev :
> dev->pdev->bus->self;

So for DRM devices on a root bus, the parent is the DRM device itself,
while for DRM devices deeper in the hierarchy, the parent is the
upstream P2P bridge?  That doesn't really make sense to me.  If the
caller operates on the DRM device in some cases and on the bridge in
other cases, it's going to need to know the difference, so hiding the
difference in this wrapper seems counterproductive.

> +}
> +
> diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
> index eb37466..5a8a4f5 100644
> --- a/drivers/gpu/drm/drm_pci.c
> +++ b/drivers/gpu/drm/drm_pci.c
> @@ -466,6 +466,10 @@ void drm_pci_exit(struct drm_driver *driver, struct
> pci_driver *pdriver)
>  }
>  EXPORT_SYMBOL(drm_pci_exit);
>
> +inline __weak struct pci_device *drm_get_parent_device(struct drm_device
> *dev) {
> +   return dev->pdev->bus->self;
> +}
> +
>  int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
>  {
> struct pci_dev *root;
> @@ -479,7 +483,7 @@ int drm_pcie_get_speed_cap_mask(struct drm_device *dev,
> u32 *mask)
> return -EINVAL;
>
> // find PCI device for capabilities
> -   root = dev->pdev->bus->self;
> +   root = drm_get_parent_device(dev);
>
> // some architectures might not have host bridges as PCI devices
> if (root == NULL)

What tree does this apply to?  Upstream doesn't have the "if (root ==
NULL)" check yet.  That check looks like the sort of thing you'd need
to avoid the null pointer dereference.  So maybe adding that check and
the associated code is enough to fix the problem, even without adding
drm_get_parent_device().

With the code in the tree, it looks like you'd dereference a null
pointer in pci_pcie_cap(root), so I assume that's what you tripped
over.

I'm not really sure that code outside the PCI core should be looking
at capabilities of upstream devices like this.  It seems like the sort
of thing where the core might need to provide better interfaces.

Bjorn
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[PATCH 1/4] drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2)

[alexdeucher]

From: Alex Deucher 

Allows us to use the DMA ring from userspace.
DMA doesn't have a good NOP packet in which to embed the
reloc idx, so userspace has to add a reloc for each
buffer used and order them to match the command stream.

v2: fix address bounds checking, reloc indexing

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/r600_cs.c |  193 ++
 drivers/gpu/drm/radeon/radeon.h  |1 +
 drivers/gpu/drm/radeon/radeon_asic.c |6 +-
 drivers/gpu/drm/radeon/radeon_asic.h |1 +
 drivers/gpu/drm/radeon/radeon_cs.c   |1 +
 5 files changed, 199 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 5d6e7f9..1e2935e 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -2568,3 +2568,196 @@ void r600_cs_legacy_init(void)
 {
r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_nomm;
 }
+
+/*
+ *  DMA
+ */
+/**
+ * r600_dma_cs_next_reloc() - parse next reloc
+ * @p: parser structure holding parsing context.
+ * @cs_reloc:  reloc informations
+ *
+ * Return the next reloc, do bo validation and compute
+ * GPU offset using the provided start.
+ **/
+int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
+  struct radeon_cs_reloc **cs_reloc)
+{
+   struct radeon_cs_chunk *relocs_chunk;
+   unsigned idx;
+
+   if (p->chunk_relocs_idx == -1) {
+   DRM_ERROR("No relocation chunk !\n");
+   return -EINVAL;
+   }
+   *cs_reloc = NULL;
+   relocs_chunk = &p->chunks[p->chunk_relocs_idx];
+   idx = p->dma_reloc_idx;
+   if (idx >= relocs_chunk->length_dw) {
+   DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
+ idx, relocs_chunk->length_dw);
+   return -EINVAL;
+   }
+   *cs_reloc = p->relocs_ptr[idx];
+   p->dma_reloc_idx++;
+   return 0;
+}
+
+#define GET_DMA_CMD(h) (((h) & 0xf000) >> 28)
+#define GET_DMA_COUNT(h) ((h) & 0x)
+#define GET_DMA_T(h) (((h) & 0x0080) >> 23)
+
+/**
+ * r600_dma_cs_parse() - parse the DMA IB
+ * @p: parser structure holding parsing context.
+ *
+ * Parses the DMA IB from the CS ioctl and updates
+ * the GPU addresses based on the reloc information and
+ * checks for errors. (R6xx-R7xx)
+ * Returns 0 for success and an error on failure.
+ **/
+int r600_dma_cs_parse(struct radeon_cs_parser *p)
+{
+   struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
+   struct radeon_cs_reloc *src_reloc, *dst_reloc;
+   u32 header, cmd, count, tiled;
+   volatile u32 *ib = p->ib.ptr;
+   u32 idx, idx_value;
+   u64 src_offset, dst_offset;
+   int r;
+
+   do {
+   if (p->idx >= ib_chunk->length_dw) {
+   DRM_ERROR("Can not parse packet at %d after CS end %d 
!\n",
+ p->idx, ib_chunk->length_dw);
+   return -EINVAL;
+   }
+   idx = p->idx;
+   header = radeon_get_ib_value(p, idx);
+   cmd = GET_DMA_CMD(header);
+   count = GET_DMA_COUNT(header);
+   tiled = GET_DMA_T(header);
+
+   switch (cmd) {
+   case DMA_PACKET_WRITE:
+   r = r600_dma_cs_next_reloc(p, &dst_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_WRITE\n");
+   return -EINVAL;
+   }
+   if (tiled) {
+   dst_offset = ib[idx+1];
+   dst_offset <<= 8;
+
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset 
>> 8);
+   p->idx += count + 5;
+   } else {
+   dst_offset = ib[idx+1];
+   dst_offset |= ((u64)(ib[idx+2] & 0xff)) << 32;
+
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 
0xfffc);
+   ib[idx+2] += 
upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff;
+   p->idx += count + 3;
+   }
+   if ((dst_offset + (count * 4)) > 
radeon_bo_size(dst_reloc->robj)) {
+   dev_warn(p->dev, "DMA write buffer too small 
(%llu %lu)\n",
+dst_offset + (count * 4), 
radeon_bo_size(dst_reloc->robj));
+   return -EINVAL;
+   }
+   break;
+   case DMA_PACKET_COPY:
+   r = r600_dma_cs_next_reloc(p, &src_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_COPY\n");
+   return -EINVAL;
+   }
+

[PATCH 2/4] drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2)

[alexdeucher]

From: Alex Deucher 

Allows us to use the DMA ring from userspace.
DMA doesn't have a good NOP packet in which to embed the
reloc idx, so userspace has to add a reloc for each
buffer used and order them to match the command stream.

v2: fix address bounds checking

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/evergreen_cs.c |  451 +
 drivers/gpu/drm/radeon/radeon_asic.c  |   14 +-
 drivers/gpu/drm/radeon/radeon_asic.h  |1 +
 3 files changed, 459 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c 
b/drivers/gpu/drm/radeon/evergreen_cs.c
index 62c2271..1e8bd46 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -34,6 +34,8 @@
 #define MAX(a,b)   (((a)>(b))?(a):(b))
 #define MIN(a,b)   (((a)<(b))?(a):(b))
 
+int r600_dma_cs_next_reloc(struct radeon_cs_parser *p,
+  struct radeon_cs_reloc **cs_reloc);
 static int evergreen_cs_packet_next_reloc(struct radeon_cs_parser *p,
  struct radeon_cs_reloc **cs_reloc);
 
@@ -2804,6 +2806,455 @@ int evergreen_cs_parse(struct radeon_cs_parser *p)
return 0;
 }
 
+/*
+ *  DMA
+ */
+
+#define GET_DMA_CMD(h) (((h) & 0xf000) >> 28)
+#define GET_DMA_COUNT(h) ((h) & 0x000f)
+#define GET_DMA_T(h) (((h) & 0x0080) >> 23)
+#define GET_DMA_NEW(h) (((h) & 0x0400) >> 26)
+#define GET_DMA_MISC(h) (((h) & 0x070) >> 20)
+
+/**
+ * evergreen_dma_cs_parse() - parse the DMA IB
+ * @p: parser structure holding parsing context.
+ *
+ * Parses the DMA IB from the CS ioctl and updates
+ * the GPU addresses based on the reloc information and
+ * checks for errors. (Evergreen-Cayman)
+ * Returns 0 for success and an error on failure.
+ **/
+int evergreen_dma_cs_parse(struct radeon_cs_parser *p)
+{
+   struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
+   struct radeon_cs_reloc *src_reloc, *dst_reloc, *dst2_reloc;
+   u32 header, cmd, count, tiled, new_cmd, misc;
+   volatile u32 *ib = p->ib.ptr;
+   u32 idx, idx_value;
+   u64 src_offset, dst_offset, dst2_offset;
+   int r;
+
+   do {
+   if (p->idx >= ib_chunk->length_dw) {
+   DRM_ERROR("Can not parse packet at %d after CS end %d 
!\n",
+ p->idx, ib_chunk->length_dw);
+   return -EINVAL;
+   }
+   idx = p->idx;
+   header = radeon_get_ib_value(p, idx);
+   cmd = GET_DMA_CMD(header);
+   count = GET_DMA_COUNT(header);
+   tiled = GET_DMA_T(header);
+   new_cmd = GET_DMA_NEW(header);
+   misc = GET_DMA_MISC(header);
+
+   switch (cmd) {
+   case DMA_PACKET_WRITE:
+   r = r600_dma_cs_next_reloc(p, &dst_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_WRITE\n");
+   return -EINVAL;
+   }
+   if (tiled) {
+   dst_offset = ib[idx+1];
+   dst_offset <<= 8;
+
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset 
>> 8);
+   p->idx += count + 7;
+   } else {
+   dst_offset = ib[idx+1];
+   dst_offset |= ((u64)(ib[idx+2] & 0xff)) << 32;
+
+   ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 
0xfffc);
+   ib[idx+2] += 
upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff;
+   p->idx += count + 3;
+   }
+   if ((dst_offset + (count * 4)) > 
radeon_bo_size(dst_reloc->robj)) {
+   dev_warn(p->dev, "DMA write buffer too small 
(%llu %lu)\n",
+dst_offset, 
radeon_bo_size(dst_reloc->robj));
+   return -EINVAL;
+   }
+   break;
+   case DMA_PACKET_COPY:
+   r = r600_dma_cs_next_reloc(p, &src_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_COPY\n");
+   return -EINVAL;
+   }
+   r = r600_dma_cs_next_reloc(p, &dst_reloc);
+   if (r) {
+   DRM_ERROR("bad DMA_PACKET_COPY\n");
+   return -EINVAL;
+   }
+   if (tiled) {
+   idx_value = radeon_get_ib_value(p, idx + 2);
+   if (new_cmd) {
+   switch (misc) {
+   case 

[PATCH 3/4] drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI

[alexdeucher]

From: Alex Deucher 

Allows us to use async DMA from userspace.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/evergreen_cs.c |  111 +
 drivers/gpu/drm/radeon/radeon_asic.c  |6 ++
 drivers/gpu/drm/radeon/radeon_asic.h  |1 +
 3 files changed, 118 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c 
b/drivers/gpu/drm/radeon/evergreen_cs.c
index 1e8bd46..5e7ba99 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -3545,3 +3545,114 @@ int evergreen_ib_parse(struct radeon_device *rdev, 
struct radeon_ib *ib)
 
return ret;
 }
+
+/**
+ * evergreen_dma_ib_parse() - parse the DMA IB for VM
+ * @rdev: radeon_device pointer
+ * @ib:radeon_ib pointer
+ *
+ * Parses the DMA IB from the VM CS ioctl
+ * checks for errors. (Cayman-SI)
+ * Returns 0 for success and an error on failure.
+ **/
+int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
+{
+   u32 idx = 0;
+   u32 header, cmd, count, tiled, new_cmd, misc;
+
+   do {
+   header = ib->ptr[idx];
+   cmd = GET_DMA_CMD(header);
+   count = GET_DMA_COUNT(header);
+   tiled = GET_DMA_T(header);
+   new_cmd = GET_DMA_NEW(header);
+   misc = GET_DMA_MISC(header);
+
+   switch (cmd) {
+   case DMA_PACKET_WRITE:
+   if (tiled)
+   idx += count + 7;
+   else
+   idx += count + 3;
+   break;
+   case DMA_PACKET_COPY:
+   if (tiled) {
+   if (new_cmd) {
+   switch (misc) {
+   case 0:
+   /* L2T, frame to fields */
+   idx += 10;
+   break;
+   case 1:
+   /* L2T, T2L partial */
+   idx += 12;
+   break;
+   case 3:
+   /* L2T, broadcast */
+   idx += 10;
+   break;
+   case 4:
+   /* L2T, T2L */
+   idx += 9;
+   break;
+   case 5:
+   /* T2T partial */
+   idx += 13;
+   break;
+   case 7:
+   /* L2T, broadcast */
+   idx += 10;
+   break;
+   default:
+   DRM_ERROR("bad DMA_PACKET_COPY 
misc %u\n", misc);
+   return -EINVAL;
+   }
+   } else {
+   switch (misc) {
+   case 0:
+   idx += 9;
+   break;
+   default:
+   DRM_ERROR("bad DMA_PACKET_COPY 
misc %u\n", misc);
+   return -EINVAL;
+   }
+   }
+   } else {
+   if (new_cmd) {
+   switch (misc) {
+   case 0:
+   /* L2L, byte */
+   idx += 5;
+   break;
+   case 1:
+   /* L2L, partial */
+   idx += 9;
+   break;
+   case 4:
+   /* L2L, dw, broadcast */
+   idx += 7;
+   break;
+   default:
+   DRM_ERROR("bad DMA_PACKET_COPY 
misc %u\n", misc);
+  

[PATCH 4/4] drm/radeon: enable the async DMA rings in the CS ioctl

[alexdeucher]

From: Alex Deucher 

This enables the functionality added in the previous
patches.  Userspace acceleration drivers can use the
CS ioctl to submit command buffers to the async DMA
rings.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/radeon_cs.c |   12 
 include/uapi/drm/radeon_drm.h  |1 +
 2 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_cs.c 
b/drivers/gpu/drm/radeon/radeon_cs.c
index 1b32a5a..396baba 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -112,6 +112,18 @@ static int radeon_cs_get_ring(struct radeon_cs_parser *p, 
u32 ring, s32 priority
} else
p->ring = RADEON_RING_TYPE_GFX_INDEX;
break;
+   case RADEON_CS_RING_DMA:
+   if (p->rdev->family >= CHIP_CAYMAN) {
+   if (p->priority > 0)
+   p->ring = R600_RING_TYPE_DMA_INDEX;
+   else
+   p->ring = CAYMAN_RING_TYPE_DMA1_INDEX;
+   } else if (p->rdev->family >= CHIP_R600) {
+   p->ring = R600_RING_TYPE_DMA_INDEX;
+   } else {
+   return -EINVAL;
+   }
+   break;
}
return 0;
 }
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index 5645a87..eeda917 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -917,6 +917,7 @@ struct drm_radeon_gem_va {
 /* The second dword of RADEON_CHUNK_ID_FLAGS is a uint32 that sets the ring 
type */
 #define RADEON_CS_RING_GFX  0
 #define RADEON_CS_RING_COMPUTE  1
+#define RADEON_CS_RING_DMA  2
 /* The third dword of RADEON_CHUNK_ID_FLAGS is a sint32 that sets the priority 
*/
 /* 0 = normal, + = higher priority, - = lower priority */
 
-- 
1.7.7.5

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Re: [PATCH] drm/radeon: fix htile buffer size computation for command stream checker

[Alex Deucher]

On Thu, Dec 13, 2012 at 12:08 PM,   wrote:
> From: Jerome Glisse 
>
> Fix the size computation of the htile buffer.
>
> Signed-off-by: Jerome Glisse 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/radeon/evergreen_cs.c | 17 +--
>  drivers/gpu/drm/radeon/r600_cs.c  | 92 
> ---
>  drivers/gpu/drm/radeon/radeon_drv.c   |  3 +-
>  3 files changed, 35 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c 
> b/drivers/gpu/drm/radeon/evergreen_cs.c
> index 62c2271..fc7e613 100644
> --- a/drivers/gpu/drm/radeon/evergreen_cs.c
> +++ b/drivers/gpu/drm/radeon/evergreen_cs.c
> @@ -507,20 +507,28 @@ static int evergreen_cs_track_validate_htile(struct 
> radeon_cs_parser *p,
> /* height is npipes htiles aligned == npipes * 8 pixel 
> aligned */
> nby = round_up(nby, track->npipes * 8);
> } else {
> +   /* always assume 8x8 htile */
> +   /* align is htile align * 8, htile align vary according to
> +* number of pipe and tile width and nby
> +*/
> switch (track->npipes) {
> case 8:
> +   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
> nbx = round_up(nbx, 64 * 8);
> nby = round_up(nby, 64 * 8);
> break;
> case 4:
> +   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
> nbx = round_up(nbx, 64 * 8);
> nby = round_up(nby, 32 * 8);
> break;
> case 2:
> +   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
> nbx = round_up(nbx, 32 * 8);
> nby = round_up(nby, 32 * 8);
> break;
> case 1:
> +   /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 8*/
> nbx = round_up(nbx, 32 * 8);
> nby = round_up(nby, 16 * 8);
> break;
> @@ -531,9 +539,10 @@ static int evergreen_cs_track_validate_htile(struct 
> radeon_cs_parser *p,
> }
> }
> /* compute number of htile */
> -   nbx = nbx / 8;
> -   nby = nby / 8;
> -   size = nbx * nby * 4;
> +   nbx = nbx >> 3;
> +   nby = nby >> 3;
> +   /* size must be aligned on npipes * 2K boundary */
> +   size = roundup(nbx * nby * 4, track->npipes * (2 << 10));
> size += track->htile_offset;
>
> if (size > radeon_bo_size(track->htile_bo)) {
> @@ -1790,6 +1799,8 @@ static int evergreen_cs_check_reg(struct 
> radeon_cs_parser *p, u32 reg, u32 idx)
> case DB_HTILE_SURFACE:
> /* 8x8 only */
> track->htile_surface = radeon_get_ib_value(p, idx);
> +   /* force 8x8 htile width and height */
> +   ib[idx] |= 3;
> track->db_dirty = true;
> break;
> case CB_IMMED0_BASE:
> diff --git a/drivers/gpu/drm/radeon/r600_cs.c 
> b/drivers/gpu/drm/radeon/r600_cs.c
> index 5d6e7f9..0b4d833 100644
> --- a/drivers/gpu/drm/radeon/r600_cs.c
> +++ b/drivers/gpu/drm/radeon/r600_cs.c
> @@ -657,87 +657,30 @@ static int r600_cs_track_validate_db(struct 
> radeon_cs_parser *p)
> /* nby is npipes htiles aligned == npipes * 8 pixel 
> aligned */
> nby = round_up(nby, track->npipes * 8);
> } else {
> -   /* htile widht & nby (8 or 4) make 2 bits number */
> -   tmp = track->htile_surface & 3;
> +   /* always assume 8x8 htile */
> /* align is htile align * 8, htile align vary 
> according to
>  * number of pipe and tile width and nby
>  */
> switch (track->npipes) {
> case 8:
> -   switch (tmp) {
> -   case 3: /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 
> 8*/
> -   nbx = round_up(nbx, 64 * 8);
> -   nby = round_up(nby, 64 * 8);
> -   break;
> -   case 2: /* HTILE_WIDTH = 4 & HTILE_HEIGHT = 
> 8*/
> -   case 1: /* HTILE_WIDTH = 8 & HTILE_HEIGHT = 
> 4*/
> -   nbx = round_up(nbx, 64 * 8);
> -   nby = round_up(nby, 32 * 8);
> -   break;
> -   case 0: /* HTILE_WIDTH = 4 & HTILE_HEIGHT = 
> 4*/
> -   nbx = round_up(nbx, 32 * 8);
> -   nby = round_up(nby, 32 * 8);
> -   break;
> -   d

[PATCH] drm/cma: add debugfs helpers

[Rob Clark]

Add helper to display fb's which can be used directly in drm_info_list:

static struct drm_info_list foo_debugfs_list[] = {
...
{ "fb",   drm_fb_cma_debugfs_show, 0 },
};

to display information about CMA fb objects, as well as a
drm_gem_cma_describe() which can be used if the driver bothers to keep
a list of CMA GEM objects.

Signed-off-by: Rob Clark 
---
 drivers/gpu/drm/drm_fb_cma_helper.c  | 53 
 drivers/gpu/drm/drm_gem_cma_helper.c | 21 ++
 include/drm/drm_fb_cma_helper.h  |  5 
 include/drm/drm_gem_cma_helper.h |  4 +++
 4 files changed, 83 insertions(+)

diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c 
b/drivers/gpu/drm/drm_fb_cma_helper.c
index fd9d0af..18866ee 100644
--- a/drivers/gpu/drm/drm_fb_cma_helper.c
+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
@@ -180,6 +180,59 @@ struct drm_gem_cma_object *drm_fb_cma_get_gem_obj(struct 
drm_framebuffer *fb,
 }
 EXPORT_SYMBOL_GPL(drm_fb_cma_get_gem_obj);
 
+#ifdef CONFIG_DEBUG_FS
+/**
+ * drm_fb_cma_describe() - Helper to dump information about a single
+ * CMA framebuffer object
+ */
+void drm_fb_cma_describe(struct drm_framebuffer *fb, struct seq_file *m)
+{
+   struct drm_fb_cma *fb_cma = to_fb_cma(fb);
+   int i, n = drm_format_num_planes(fb->pixel_format);
+
+   seq_printf(m, "fb: %dx%d@%4.4s\n", fb->width, fb->height,
+   (char *)&fb->pixel_format);
+
+   for (i = 0; i < n; i++) {
+   seq_printf(m, "   %d: offset=%d pitch=%d, obj: ",
+   i, fb->offsets[i], fb->pitches[i]);
+   drm_gem_cma_describe(fb_cma->obj[i], m);
+   }
+}
+EXPORT_SYMBOL_GPL(drm_fb_cma_describe);
+
+/**
+ * drm_fb_cma_debugfs_show() - Helper to list CMA framebuffer objects
+ * in debugfs.
+ */
+int drm_fb_cma_debugfs_show(struct seq_file *m, void *arg)
+{
+   struct drm_info_node *node = (struct drm_info_node *) m->private;
+   struct drm_device *dev = node->minor->dev;
+   struct drm_framebuffer *fb;
+   int ret;
+
+   ret = mutex_lock_interruptible(&dev->mode_config.mutex);
+   if (ret)
+   return ret;
+
+   ret = mutex_lock_interruptible(&dev->struct_mutex);
+   if (ret) {
+   mutex_unlock(&dev->mode_config.mutex);
+   return ret;
+   }
+
+   list_for_each_entry(fb, &dev->mode_config.fb_list, head)
+   drm_fb_cma_describe(fb, m);
+
+   mutex_unlock(&dev->struct_mutex);
+   mutex_unlock(&dev->mode_config.mutex);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(drm_fb_cma_debugfs_show);
+#endif
+
 static struct fb_ops drm_fbdev_cma_ops = {
.owner  = THIS_MODULE,
.fb_fillrect= sys_fillrect,
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c 
b/drivers/gpu/drm/drm_gem_cma_helper.c
index 1aa8fee..0a7e011 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -249,3 +249,24 @@ int drm_gem_cma_dumb_destroy(struct drm_file *file_priv,
return drm_gem_handle_delete(file_priv, handle);
 }
 EXPORT_SYMBOL_GPL(drm_gem_cma_dumb_destroy);
+
+#ifdef CONFIG_DEBUG_FS
+void drm_gem_cma_describe(struct drm_gem_cma_object *cma_obj, struct seq_file 
*m)
+{
+   struct drm_gem_object *obj = &cma_obj->base;
+   struct drm_device *dev = obj->dev;
+   uint64_t off = 0;
+
+   WARN_ON(!mutex_is_locked(&dev->struct_mutex));
+
+   if (obj->map_list.map)
+   off = (uint64_t)obj->map_list.hash.key;
+
+   seq_printf(m, "%2d (%2d) %08llx %08Zx %p %d",
+   obj->name, obj->refcount.refcount.counter,
+   off, cma_obj->paddr, cma_obj->vaddr, obj->size);
+
+   seq_printf(m, "\n");
+}
+EXPORT_SYMBOL_GPL(drm_gem_cma_describe);
+#endif
diff --git a/include/drm/drm_fb_cma_helper.h b/include/drm/drm_fb_cma_helper.h
index 76c7098..4a3fc24 100644
--- a/include/drm/drm_fb_cma_helper.h
+++ b/include/drm/drm_fb_cma_helper.h
@@ -23,5 +23,10 @@ struct drm_framebuffer *drm_fb_cma_create(struct drm_device 
*dev,
 struct drm_gem_cma_object *drm_fb_cma_get_gem_obj(struct drm_framebuffer *fb,
unsigned int plane);
 
+#ifdef CONFIG_DEBUG_FS
+void drm_fb_cma_describe(struct drm_framebuffer *fb, struct seq_file *m);
+int drm_fb_cma_debugfs_show(struct seq_file *m, void *arg);
+#endif
+
 #endif
 
diff --git a/include/drm/drm_gem_cma_helper.h b/include/drm/drm_gem_cma_helper.h
index f0f6b1a..63397ce 100644
--- a/include/drm/drm_gem_cma_helper.h
+++ b/include/drm/drm_gem_cma_helper.h
@@ -41,4 +41,8 @@ struct drm_gem_cma_object *drm_gem_cma_create(struct 
drm_device *drm,
 
 extern const struct vm_operations_struct drm_gem_cma_vm_ops;
 
+#ifdef CONFIG_DEBUG_FS
+void drm_gem_cma_describe(struct drm_gem_cma_object *obj, struct seq_file *m);
+#endif
+
 #endif /* __DRM_GEM_CMA_HELPER_H__ */
-- 
1.8.0.2

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[PATCH] drm: small fix in drm_send_vblank_event()

[Rob Clark]

Initialize e->pipe.. some drivers set this themselves, others do not.
Setting it in drm_send_vblank_event() should help ensure more consistent
behavior with the different drivers.

Signed-off-by: Rob Clark 
---
 drivers/gpu/drm/drm_irq.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index 19c01ca..9bb83a5 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -863,6 +863,7 @@ void drm_send_vblank_event(struct drm_device *dev, int crtc,
 
now = get_drm_timestamp();
}
+   e->pipe = crtc;
send_vblank_event(dev, e, seq, &now);
 }
 EXPORT_SYMBOL(drm_send_vblank_event);
-- 
1.8.0.2

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[RFC] drm/lcdc: add TI LCD Controller DRM driver

[Rob Clark]

A simple DRM/KMS driver for the TI LCD Controller found in various
smaller TI parts (AM33xx, OMAPL138, etc).  This driver uses the
CMA helpers.  Currently only the TFP410 DVI encoder is supported
(tested with beaglebone + DVI cape).  There are also various LCD
displays, for which support can be added (as I get hw to test on),
and an external i2c HDMI encoder found on some boards.

The display controller supports a single CRTC.  And the encoder+
connector are split out into sub-devices.  Depending on which LCD
or external encoder is actually present, the appropriate output
module(s) will be loaded.

Signed-off-by: Rob Clark 
---
 drivers/gpu/drm/Kconfig|   2 +
 drivers/gpu/drm/Makefile   |   1 +
 drivers/gpu/drm/lcdc/Kconfig   |  11 +
 drivers/gpu/drm/lcdc/Makefile  |   8 +
 drivers/gpu/drm/lcdc/lcdc_crtc.c   | 544 +
 drivers/gpu/drm/lcdc/lcdc_drv.c| 604 +
 drivers/gpu/drm/lcdc/lcdc_drv.h| 162 ++
 drivers/gpu/drm/lcdc/lcdc_regs.h   | 154 ++
 drivers/gpu/drm/lcdc/lcdc_tfp410.c | 424 ++
 drivers/gpu/drm/lcdc/lcdc_tfp410.h |  26 ++
 10 files changed, 1936 insertions(+)
 create mode 100644 drivers/gpu/drm/lcdc/Kconfig
 create mode 100644 drivers/gpu/drm/lcdc/Makefile
 create mode 100644 drivers/gpu/drm/lcdc/lcdc_crtc.c
 create mode 100644 drivers/gpu/drm/lcdc/lcdc_drv.c
 create mode 100644 drivers/gpu/drm/lcdc/lcdc_drv.h
 create mode 100644 drivers/gpu/drm/lcdc/lcdc_regs.h
 create mode 100644 drivers/gpu/drm/lcdc/lcdc_tfp410.c
 create mode 100644 drivers/gpu/drm/lcdc/lcdc_tfp410.h

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 983201b..255efcb 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -212,3 +212,5 @@ source "drivers/gpu/drm/cirrus/Kconfig"
 source "drivers/gpu/drm/shmobile/Kconfig"
 
 source "drivers/gpu/drm/tegra/Kconfig"
+
+source "drivers/gpu/drm/lcdc/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 6f58c81..8e0a19a 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -50,4 +50,5 @@ obj-$(CONFIG_DRM_UDL) += udl/
 obj-$(CONFIG_DRM_AST) += ast/
 obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
 obj-$(CONFIG_DRM_TEGRA) += tegra/
+obj-$(CONFIG_DRM_LCDC) += lcdc/
 obj-y  += i2c/
diff --git a/drivers/gpu/drm/lcdc/Kconfig b/drivers/gpu/drm/lcdc/Kconfig
new file mode 100644
index 000..084b0a0
--- /dev/null
+++ b/drivers/gpu/drm/lcdc/Kconfig
@@ -0,0 +1,11 @@
+config DRM_LCDC
+   tristate "DRM Support for TI LCDC Display Controller"
+   depends on DRM && OF
+   select DRM_KMS_HELPER
+   select DRM_KMS_CMA_HELPER
+   select DRM_GEM_CMA_HELPER
+   help
+ Choose this option if you have an TI SoC with LCDC display
+ controller, for example AM33xx in beagle-bone, DA8xx, or
+ OMAP-L1xx.  This driver replaces the FB_DA8XX fbdev driver.
+
diff --git a/drivers/gpu/drm/lcdc/Makefile b/drivers/gpu/drm/lcdc/Makefile
new file mode 100644
index 000..db32161
--- /dev/null
+++ b/drivers/gpu/drm/lcdc/Makefile
@@ -0,0 +1,8 @@
+ccflags-y := -Iinclude/drm -Werror
+
+lcdc-y := \
+   lcdc_crtc.o \
+   lcdc_tfp410.o \
+   lcdc_drv.o
+
+obj-$(CONFIG_DRM_LCDC) += lcdc.o
diff --git a/drivers/gpu/drm/lcdc/lcdc_crtc.c b/drivers/gpu/drm/lcdc/lcdc_crtc.c
new file mode 100644
index 000..052c2c1
--- /dev/null
+++ b/drivers/gpu/drm/lcdc/lcdc_crtc.c
@@ -0,0 +1,544 @@
+/*
+ * Copyright (C) 2012 Texas Instruments
+ * Author: Rob Clark 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include "lcdc_drv.h"
+#include "lcdc_regs.h"
+
+struct lcdc_crtc {
+   struct drm_crtc base;
+
+   const struct lcdc_panel_info *info;
+   uint32_t dirty;
+   dma_addr_t start, end;
+   struct drm_pending_vblank_event *event;
+   int dpms;
+   wait_queue_head_t frame_done_wq;
+   bool frame_done;
+};
+#define to_lcdc_crtc(x) container_of(x, struct lcdc_crtc, base)
+
+static void set_scanout(struct drm_crtc *crtc, uint32_t stat)
+{
+   struct lcdc_crtc *lcdc_crtc = to_lcdc_crtc(crtc);
+   struct drm_device *dev = crtc->dev;
+
+   pm_runtime_get_sync(dev->dev);
+   if (stat & LCDC_END_OF_FRAME0) {
+   lcdc_write(dev, LCDC_DMA_FRM_BUF_BASE_ADDR_0_REG,
+   lcdc_crtc->start);
+   lcdc_write(dev, LCDC_DMA_FRM_BUF_CEILI

[pull] drm-intel-fixes for 3.8

[Daniel Vetter]

Hi Dave,

A few leftover fixes for 3.8:
- VIC support for hdmi infoframes with the associated drm helper, fixes
  some black TVs (Paulo Zanoni)
- Modeset state check (and fixup if the BIOS messed with the hw) for
  lid-open. modeset-rework fallout. Somehow the original reporter went
  awol, so this stalled for way too long until we've found a new
  victim^Wreporter with broken BIOS.
- seqno wrap fixes from Mika and Chris.
- Some minor fixes all over from various people.
- Another race fix in the pageflip vs. unpin code from Chris.
- hsw vga resume support and a few more fdi link fixes (only used for vga
  on hsw) from Paulo.
- Regression fix for DMAR from Zhenyu Wang - I've scavenged memory from my
  DMAR for a while and it broke right away :(
- Regression fix from Takashi Iwai for ivb lvds - some w/a needs to be
  (partially) moved back into place. Note that these are regressions in
  -next.
- One more fix for ivb 3 pipe support - it now actually seems to work.

Besides the ilk disaster I have two things pending: Chris has some
corner-case fixes where our own memory shrink code pulls the rug out from
under us - needs more careful ordering in the gtt code. And Damien is
doing some hotplug improvements for ilk+ hdmi/dp - but they seem to grow
still, so need to check out what's going on and whether it makes sense for
-fixes.

Note that I (and most of the intel guys, too) will be on vacation
22th-5th, so if something blows up too badly please just apply the revert.
Since no one's there I don't think running -fixes makes much sense.

Cheers, Daniel


The following changes since commit 2ff4aeac39dbdcac934694413767f09a27965e11:

  drm/i915: Fix pte updates in ggtt clear range (2012-11-29 11:14:44 +0100)

are available in the git repository at:

  git://people.freedesktop.org/~danvet/drm-intel drm-intel-fixes

for you to fetch changes up to 20652097dadd9a7fb4d652f25466299974bc78f9:

  drm/i915: Fix missed needs_dmar setting (2012-12-13 21:40:24 +0100)


Chris Wilson (9):
  drm/i915: Increase the response time for slow SDVO devices
  drm/i915: Wait upon the last request seqno, rather than a future seqno
  drm/i915: Preallocate next seqno before touching the ring
  drm/i915: Simplify flushing activity on the ring
  drm/i915: Rearrange code to only have a single method for waiting upon 
the ring
  drm/i915: Include the last semaphore sync point in the error-state
  drm/i915: Decouple the object from the unbound list before freeing pages
  drm/i915: Clear the existing watermarks for g4x when modifying the cursor 
sr
  drm/i915: Close race between processing unpin task and queueing the flip

Daniel Vetter (3):
  drm/i915: force restore on lid open
  drm/i915: fixup l3 parity sysfs access check
  drm/i915: disable cpt phase pointer fdi rx workaround

Jani Nikula (1):
  drm/i915: do not access BLC_PWM_CTL2 on pre-gen4 hardware

Mika Kuoppala (2):
  drm/i915: fix possible NULL dereference of dev_priv
  drm/i915: Set sync_seqno properly after seqno wrap

Paulo Zanoni (7):
  drm: add drm_mode_cea_vic
  drm/i915: set the VIC of the mode on the AVI InfoFrame
  drm/i915: fix hsw_fdi_link_train "retry" code
  drm/i915: reject modes the LPT FDI receiver can't handle
  drm/i915: add support for mPHY destination on intel_sbi_{read, write}
  drm/i915: add lpt_init_pch_refclk
  drm/i915: set the LPT FDI RX polarity reversal bit when needed

Takashi Iwai (1):
  drm/i915: Fix shifted screen on top of LVDS on IVY laptop

Ville Syrjälä (1):
  drm/i915: Don't allow ring tail to reach the same cacheline as head

Zhenyu Wang (1):
  drm/i915: Fix missed needs_dmar setting

 drivers/gpu/drm/drm_edid.c |   19 ++
 drivers/gpu/drm/i915/i915_debugfs.c|   14 +-
 drivers/gpu/drm/i915/i915_dma.c|9 +-
 drivers/gpu/drm/i915/i915_drv.c|5 +-
 drivers/gpu/drm/i915/i915_drv.h|   18 +-
 drivers/gpu/drm/i915/i915_gem.c|   96 +---
 drivers/gpu/drm/i915/i915_gem_context.c|3 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   30 +--
 drivers/gpu/drm/i915/i915_gem_gtt.c|4 +
 drivers/gpu/drm/i915/i915_irq.c|6 +-
 drivers/gpu/drm/i915/i915_reg.h|   11 +-
 drivers/gpu/drm/i915/i915_sysfs.c  |2 +-
 drivers/gpu/drm/i915/intel_crt.c   |   13 +
 drivers/gpu/drm/i915/intel_ddi.c   |   45 ++--
 drivers/gpu/drm/i915/intel_display.c   |  355 +---
 drivers/gpu/drm/i915/intel_drv.h   |6 +-
 drivers/gpu/drm/i915/intel_hdmi.c  |2 +
 drivers/gpu/drm/i915/intel_lvds.c  |2 +-
 drivers/gpu/drm/i915/intel_panel.c |   21 +-
 drivers/gpu/drm/i915/intel_pm.c|   22 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c|  126 ++
 drivers/gpu/drm/i915/intel_ringbuffer.h|   30 ++-

[Bug 58272] New: Rv670 AGP drm-next ttm errors

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=58272

  Priority: medium
Bug ID: 58272
  Assignee: dri-devel@lists.freedesktop.org
   Summary: Rv670 AGP drm-next ttm errors
  Severity: normal
Classification: Unclassified
OS: Linux (All)
  Reporter: li...@andyfurniss.entadsl.com
  Hardware: x86 (IA32)
Status: NEW
   Version: XOrg CVS
 Component: DRM/Radeon
   Product: DRI

Created attachment 71476
  --> https://bugs.freedesktop.org/attachment.cgi?id=71476&action=edit
errors in kern log with dma

I haven't had time to test latest drm-next but will post this now as may be AFK
tomorrow.

After finding a place on mesa where etqw seems OK with drm-fixes I am getting
errors with drm-next.

On yesterdays head + the wb patch I got attachment 1.

With the tree reset to before the dma changes which required the patch -

drm/ttm: remove no_wait_reserve, v3

I got attachment 2

the last lines repeating for 400k lines and the log also getting filled with
junk.

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[Bug 58272] Rv670 AGP drm-next ttm errors

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=58272

--- Comment #1 from Andy Furniss  ---
Created attachment 71477
  --> https://bugs.freedesktop.org/attachment.cgi?id=71477&action=edit
errors in kern log before dma changes

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[Bug 58272] Rv670 AGP drm-next ttm errors

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=58272

--- Comment #2 from Andy Furniss  ---
Hmm I see using the word  a t t a c h m e n t does strange things  - 1 and 2
are not mine.

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Re: [PATCH 0/3] drm/exynos: add runtime pm support for hdmi and mixer.

[Rahul Sharma]

Hi All,

Kindly review the following patch set for Runtime PM  Changes for
Mixer and Hdmi.

regards,
Rahul Sharma

On Wed, Nov 28, 2012 at 11:30 AM, Rahul Sharma  wrote:
> This patch set adds support for runtime power management for hdmi and
> mixer devices. Its also adds support for hdmiphy power control.
>
> It has been tested for hot plugin-plugout and dpms scenarios.
>
> Based on exynos-drm-next branch of
> http://git.kernel.org/?p=linux/kernel/git/daeinki/drm-exynos.git
>
> Rahul Sharma (3):
>   drm/exynos: added runtime pm support for hdmi
>   drm/exynos: add runtime pm support for mixer
>   drm/exynos: add support for hdmiphy power control for exynos5
>
>  drivers/gpu/drm/exynos/exynos_hdmi.c  |   81 +---
>  drivers/gpu/drm/exynos/exynos_mixer.c |   65 +++---
>  drivers/gpu/drm/exynos/regs-hdmi.h|5 ++
>  3 files changed, 136 insertions(+), 15 deletions(-)
>
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Re: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Inki Dae]

2012/12/14 Daniel Vetter 

> On Thu, Dec 13, 2012 at 4:16 PM, Inki Dae  wrote:
> > How about rebasing this patch to top of
> > git://people.freedesktop.org/~airlied/linux.git drm-next?
> > Exynos's many patches have already been merged to drm-next. Or if you are
> > ok, I'd like to rebase your patch to -next and test it. I don't care
> either
> > way. :)
>
> I've pushed out a rebased version, but somehow I can't compile-test
> exynos any more :( Probably missing some other stuff from linux-next.
> Anyway, I don't mind which patch you pick or whether you just roll
> your own, the important thing is that drm_framebuffer_init is called
> _after_ everything is set up and initialized. Everything else doesn't
> really matter.
>

I've rebase your patch to -next and tested it. But your patch had null
pointer issue to gem object so I fixed it.
For this, you can refer to the below link,

http://git.kernel.org/?p=linux/kernel/git/daeinki/drm-exynos.git;a=shortlog;h=refs/heads/exynos-drm-next

And I gonna request git pull to -next including that patch today. If there
is any problem, please let me know.

Thanks,
Inki Dae.



> -Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [RFC v2 0/5] Common Display Framework

[Vikas Sajjan]

Hi everybody,

Here's the second RFC of what was previously known as the Generic Panel
Framework.

I won't repeat all the background information from the first version here, you
can read it at http://lwn.net/Articles/512363/.


Many developers showed interest in the first RFC, and I've had the opportunity
to discuss it with most of them. I would like to thank (in no particular
order) Tomi Valkeinen for all the time he spend helping me to draft v2, Marcus
Lorentzon for his useful input during Linaro Connect Q4 2012, and Linaro for
inviting me to Connect and providing a venue to discuss this topic.

After discussing the Generic Panel Framework at Linaro Connect we came to the
conclusion that "panel" is too limiting a name. In addition to panel drivers
we also want to share transmitter and bridge drivers between DRM and FBDEV. I
have thus introduced the concept of a display entity in this version to
represent any hardware block that sources, processes or sinks display-related
video streams. This patch set implements the Common Display Framework (CDF).

Display entities are connected to at least one video data bus, and optionally
to a control bus. The video data busses carry display-related video data out
of sources (such as a CRTC in a display controller) to sinks (such as a panel
or a monitor), optionally going through transmitters, encoders, decoders,
bridges or other similar devices. A CRTC or a panel will usually be connected
to a single data bus, while an encoder or a transmitter will be connected to
two data busses.

While some display entities don't require any configuration (DPI panels are a
good example), many of them are connected to a control bus accessible to the
CPU. Control requests can be sent on a dedicated control bus (such as I2C or
SPI) or multiplexed on a mixed control and data bus (such as DBI or DSI). To
support both options the CDF display entity model separates the control and
data busses in different APIs.

Display entities are abstract object that must be implemented by a real
device. The device sits on its control bus and is registered with the Linux
device core and matched with his driver using the control bus specific API.
The CDF doesn't create a display entity class or bus, display entity drivers
thus standard Linux kernel drivers using existing busses.

When a display entity driver probes a device it must create an instance of the
display_entity structure, initialize it and register it with the CDF core. The
display entity exposes abstract operations through function pointers, and the
entity driver must implement those operations. They are divided in two groups,
control operations and video operations.

Control operations are called by upper-level drivers, usually in response to a
request originating from userspace. They control the display entity state and
operation. Currently defined control operations are

- set_state(), to control the state of the entity (off, standby or on)
- update(), to trigger a display update (for entities that implement manual
  update, such as manual-update panels that store frames in their internal
  frame buffer)
- get_modes(), to retrieve the video modes supported by the entity
- get_params(), to retrive the data bus parameters at the entity input (sink)
- get_size(), to retrive the entity physical size (applicable to panels only)

Video operations are called by downstream entities on upstream entities (from
a video data bus point of view) to control the video operation. The only
currently defined video operation is

- set_stream(), to start (in continuous or single-shot mode) the video stream
http://www.ideasonboard.org/media/cdf/cdf.pdf#1 describes how a panel driver
implemented using the CDF interacts with the other components in the system.
The first page shows the panel driver receiving control request from the
display controller driver at its top side, usually in response to a DRM or
FBDEV API call. It then issues requests on its control bus (several possible
control busses are shown on the diagram, the panel driver uses one of them
only) and calls video operations of the display controller on its left side to
control the video stream.

The second page shows a slightly more complex use case, with a display
controller that includes an LVDS transceiver (shown as two separate entities
on the left hand side), connected to an LVDS to DSI converter that is itself
connected to a DSI panel module. The panel module contains a DSI panel
controller that drives the LCD panel. While this particular example is
probably too theoretical to be found in real devices, it illustrates the
concept of display entities chains.

The CDF models this using a Russian doll's model. From the display controller
point of view only the first external entity (LVDS to DSI converter) is
visible. The display controller thus calls the control operations implemented
by the LVDS to DSI transmitter driver (left-most green arrow). The driver is
aware

drm/exynos: fix allocation and cache mapping type

[Inki Dae]

This patch fixes memory alloction(contiguous or not) and
cache mapping types(cachable or not).
For this, it converts each type from user request into dma
attribute properly.

Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_buf.c |   20 ++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.c 
b/drivers/gpu/drm/exynos/exynos_drm_buf.c
index 7dc1309..e05fcfe 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_buf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_buf.c
@@ -61,7 +61,7 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
unsigned int flags, struct exynos_drm_gem_buf *buf)
 {
int ret = 0;
-   enum dma_attr attr = DMA_ATTR_FORCE_CONTIGUOUS;
+   enum dma_attr attr;
unsigned int nr_pages;
 
DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -73,8 +73,24 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
 
init_dma_attrs(&buf->dma_attrs);
 
-   if (flags & EXYNOS_BO_NONCONTIG)
+   /*
+* if EXYNOS_BO_CONTIG, fully physically contiguous memory
+* region will be allocated else physically contiguous
+* as possible.
+*/
+   if (flags & EXYNOS_BO_CONTIG) {
+   attr = DMA_ATTR_FORCE_CONTIGUOUS;
+   dma_set_attr(attr, &buf->dma_attrs);
+   }
+
+   /*
+* if EXYNOS_BO_WC or EXYNOS_BO_NONCACHABLE, writecombine mapping
+* else cachable mapping.
+*/
+   if (flags & EXYNOS_BO_WC || !(flags & EXYNOS_BO_CACHABLE))
attr = DMA_ATTR_WRITE_COMBINE;
+   else
+   attr = DMA_ATTR_NON_CONSISTENT;
 
dma_set_attr(attr, &buf->dma_attrs);
dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &buf->dma_attrs);
-- 
1.7.4.1

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Re: [RFC v2 6/8] gpu: drm: tegra: Remove redundant host1x

[Terje Bergström]

On 13.12.2012 19:58, Stephen Warren wrote:
> On 12/13/2012 01:57 AM, Thierry Reding wrote:
>> After some more discussion with Stephen on IRC we came to the
>> conclusion that the easiest might be to have tegra-drm call into
>> host1x with something like:
>>
>> void host1x_set_drm_device(struct host1x *host1x, struct device
>> *dev);
> 
> If host1x is registering the dummy device that causes tegradrm to be
> instantiated, then presumably there's no need for the API above, since
> host1x will already have the struct device * for tegradrm, since it
> created it?

I didn't add the dummy device in my latest patch set. I first set out to
add it, and moved the drm global data to be drvdata of that device. Then
I noticed that it doesn't actually help at all.

The critical accesses to the global data are from probes of DC, HDMI,
etc. They want to get the global data by getting drvdata of their
parent. The dummy device is not their parent - host1x is. There's no
connection between the dummy and the real client devices. So there's no
logical way for DC and HDMI to find the the dummy device, except perhaps
by searching for "tegradrm" device from platform bus. But then again,
that'd break encapsulation so it's as bad as a global variable - only
with a lot more code to do the same thing.

Accesses after probing can happen via drm->dev_private, so post-probe
we're fine.

Another problem arouse (already mentioned it) when I used the dummy
device to call to drm_platform_init(). It called back into tegradrm,
which calls the CMA FB helper to allocate memory. Unfortunately the
memory is allocated for the dummy device, and it's not initialized to do
do that. I ended up with failed frame buffer allocation. That needs
host1x allocator to fix.

host1x itself shouldn't need any DRM specific calls or callbacks. The
device model already allows traversing through list of host1x children.
The list of drm clients and devices is something that tegradrm needs to
be able to initialize DRM at appropriate time. I also took that into use
for storing the channel and class data. So we should try to keep the
list maintenance as local to tegradrm as we can.

In my latest patch set, I kept the list management inside tegradrm, and
put all DRM global data into struct tegradrm, which is accessed via a
global. I guess global in tegradrm is not as bad as global in host1x,
because one DRM driver can handle multiple devices, so there's no reason
to have multiple tegradrm's trampling on each others data. But if you
can come up with a better solution, I'm all ears.

Terje
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[PATCH v2] drm/exynos: fix allocation and cache mapping type

[Inki Dae]

This patch fixes memory alloction(contiguous or not) and
cache mapping types(cachable or not).
For this, it converts each type from user request into dma
attribute properly.

Changelog v2:
- just code cleanup.

Signed-off-by: Inki Dae 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_buf.c |   18 --
 1 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.c 
b/drivers/gpu/drm/exynos/exynos_drm_buf.c
index 9732043..9601bad 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_buf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_buf.c
@@ -34,7 +34,7 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
unsigned int flags, struct exynos_drm_gem_buf *buf)
 {
int ret = 0;
-   enum dma_attr attr = DMA_ATTR_FORCE_CONTIGUOUS;
+   enum dma_attr attr;
unsigned int nr_pages;
 
DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -46,8 +46,22 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
 
init_dma_attrs(&buf->dma_attrs);
 
-   if (flags & EXYNOS_BO_NONCONTIG)
+   /*
+* if EXYNOS_BO_CONTIG, fully physically contiguous memory
+* region will be allocated else physically contiguous
+* as possible.
+*/
+   if (flags & EXYNOS_BO_CONTIG)
+   dma_set_attr(DMA_ATTR_FORCE_CONTIGUOUS, &buf->dma_attrs);
+
+   /*
+* if EXYNOS_BO_WC or EXYNOS_BO_NONCACHABLE, writecombine mapping
+* else cachable mapping.
+*/
+   if (flags & EXYNOS_BO_WC || !(flags & EXYNOS_BO_CACHABLE))
attr = DMA_ATTR_WRITE_COMBINE;
+   else
+   attr = DMA_ATTR_NON_CONSISTENT;
 
dma_set_attr(attr, &buf->dma_attrs);
dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &buf->dma_attrs);
-- 
1.7.4.1

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[PATCH 1/4] drm/exynos: fix fb offset calculation for plane

[Joonyoung Shim]

There is no any reason to change fb offset when CRTC is out of screen.
Also, this fixes a typing error.

Signed-off-by: Joonyoung Shim 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_plane.c |6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 399b026..83efc66 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -40,7 +40,7 @@ static const uint32_t formats[] = {
  * CRTC 
  *  ^ start^ end
  *
- * There are six cases from a to b.
+ * There are six cases from a to f.
  *
  * <- SCREEN ->
  * 0 last
@@ -104,16 +104,12 @@ int exynos_plane_mode_set(struct drm_plane *plane, struct 
drm_crtc *crtc,
if (crtc_x < 0) {
if (actual_w)
src_x -= crtc_x;
-   else
-   src_x += crtc_w;
crtc_x = 0;
}
 
if (crtc_y < 0) {
if (actual_h)
src_y -= crtc_y;
-   else
-   src_y += crtc_h;
crtc_y = 0;
}
 
-- 
1.7.9.5

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[PATCH 0/4] drm/exynos: update plane and fimd

[Joonyoung Shim]

This patchset is to update plane and fimd of exynos-drm. it includes
modification about coordinates calculation of plane and fimd and device
tree support of fimd.

The patchset is based exynos-drm-next branch on of
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git

Joonyoung Shim (4):
  drm/exynos: fix fb offset calculation for plane
  drm/exynos: fix x, y coordinates for right bottom pixel
  drm/exynos: support extended screen coordinate of fimd
  drm/exynos: support device tree for fimd
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[PATCH 2/4] drm/exynos: fix x, y coordinates for right bottom pixel

[Joonyoung Shim]

The x, y coordinates of right bottom pixel cannot be negative numbers.

Signed-off-by: Joonyoung Shim 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |   18 +++---
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 90ca4b2..ae0153b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -471,6 +471,8 @@ static void fimd_win_commit(struct device *dev, int zpos)
struct fimd_win_data *win_data;
int win = zpos;
unsigned long val, alpha, size;
+   unsigned int last_x;
+   unsigned int last_y;
 
DRM_DEBUG_KMS("%s\n", __FILE__);
 
@@ -524,16 +526,18 @@ static void fimd_win_commit(struct device *dev, int zpos)
VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
writel(val, ctx->regs + VIDOSD_A(win));
 
-   val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x +
-   win_data->ovl_width - 1) |
-   VIDOSDxB_BOTRIGHT_Y(win_data->offset_y +
-   win_data->ovl_height - 1);
+   last_x = win_data->offset_x + win_data->ovl_width;
+   if (last_x)
+   last_x--;
+   last_y = win_data->offset_y + win_data->ovl_height;
+   if (last_y)
+   last_y--;
+
+   val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y);
writel(val, ctx->regs + VIDOSD_B(win));
 
DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
-   win_data->offset_x, win_data->offset_y,
-   win_data->offset_x + win_data->ovl_width - 1,
-   win_data->offset_y + win_data->ovl_height - 1);
+   win_data->offset_x, win_data->offset_y, last_x, last_y);
 
/* hardware window 0 doesn't support alpha channel. */
if (win != 0) {
-- 
1.7.9.5

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[PATCH 3/4] drm/exynos: support extended screen coordinate of fimd

[Joonyoung Shim]

The fimd of exynos5 SoC supports extended screen coordinate.

Signed-off-by: Joonyoung Shim 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |   16 
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index ae0153b..1e4ea96 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -243,7 +243,9 @@ static void fimd_commit(struct device *dev)
 
/* setup horizontal and vertical display size. */
val = VIDTCON2_LINEVAL(timing->yres - 1) |
-  VIDTCON2_HOZVAL(timing->xres - 1);
+  VIDTCON2_HOZVAL(timing->xres - 1) |
+  VIDTCON2_LINEVAL_E(timing->yres - 1) |
+  VIDTCON2_HOZVAL_E(timing->xres - 1);
writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 
/* setup clock source, clock divider, enable dma. */
@@ -518,12 +520,16 @@ static void fimd_win_commit(struct device *dev, int zpos)
 
/* buffer size */
val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
-   VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size);
+   VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size) |
+   VIDW_BUF_SIZE_OFFSET_E(win_data->buf_offsize) |
+   VIDW_BUF_SIZE_PAGEWIDTH_E(win_data->line_size);
writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 
/* OSD position */
val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
-   VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
+   VIDOSDxA_TOPLEFT_Y(win_data->offset_y) |
+   VIDOSDxA_TOPLEFT_X_E(win_data->offset_x) |
+   VIDOSDxA_TOPLEFT_Y_E(win_data->offset_y);
writel(val, ctx->regs + VIDOSD_A(win));
 
last_x = win_data->offset_x + win_data->ovl_width;
@@ -533,7 +539,9 @@ static void fimd_win_commit(struct device *dev, int zpos)
if (last_y)
last_y--;
 
-   val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y);
+   val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y) |
+   VIDOSDxB_BOTRIGHT_X_E(last_x) | VIDOSDxB_BOTRIGHT_Y_E(last_y);
+
writel(val, ctx->regs + VIDOSD_B(win));
 
DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
-- 
1.7.9.5

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[PATCH 4/4] drm/exynos: support device tree for fimd

[Joonyoung Shim]

This adds the of_match_table to exynos-drm fimd driver to be probed from
the device tree.

Signed-off-by: Joonyoung Shim 
Signed-off-by: Kyungmin Park 
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |   19 +++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 1e4ea96..21a4f12 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -106,9 +107,26 @@ struct fimd_context {
struct exynos_drm_panel_info *panel;
 };
 
+#ifdef CONFIG_OF
+static const struct of_device_id fimd_driver_dt_match[] = {
+   { .compatible = "samsung,exynos4-fimd",
+ .data = &exynos4_fimd_driver_data },
+   { .compatible = "samsung,exynos5-fimd",
+ .data = &exynos5_fimd_driver_data },
+   {},
+};
+MODULE_DEVICE_TABLE(of, fimd_driver_dt_match);
+#endif
+
 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
struct platform_device *pdev)
 {
+   const struct of_device_id *of_id =
+   of_match_device(fimd_driver_dt_match, &pdev->dev);
+
+   if (of_id)
+   return (struct fimd_driver_data *)of_id->data;
+
return (struct fimd_driver_data *)
platform_get_device_id(pdev)->driver_data;
 }
@@ -1091,5 +1109,6 @@ struct platform_driver fimd_driver = {
.name   = "exynos4-fb",
.owner  = THIS_MODULE,
.pm = &fimd_pm_ops,
+   .of_match_table = of_match_ptr(fimd_driver_dt_match),
},
 };
-- 
1.7.9.5

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[Bug 58272] Rv670 AGP drm-next ttm errors

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=58272

--- Comment #3 from Maarten Lankhorst  ---
It seems that ttm_mem_evict_first is called way more often in a nasted fashion
than is healthy there. Could you resolve the ttm_mem_evict_first address where
it ends up calling itself back to a specific line?

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Re: [PATCH] drivers: nouveau: Bool tests don't need comparison

[Laurent Navet]

Bool initializations should use true and false.  Bool tests don't need
comparisons.  Based on contributions from Joe Perches, Rusty Russell
and Bruce W Allan.
The semantic patch that makes this output is available
in scripts/coccinelle/misc/boolinit.cocci.

More information about semantic patching is available at
http://coccinelle.lip6.fr/

Signed-off-by: Laurent Navet 
---
 drivers/gpu/drm/nouveau/core/subdev/timer/base.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/core/subdev/timer/base.c
b/drivers/gpu/drm/nouveau/core/subdev/timer/base.c
index 5d417cc..de6d6b7 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/timer/base.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/timer/base.c
@@ -72,7 +72,7 @@ nouveau_timer_wait_cb(void *obj, u64 nsec, bool
(*func)(void *), void *data)
 
time0 = ptimer->read(ptimer);
do {
-   if (func(data) == true)
+   if (func(data))
return true;
} while (ptimer->read(ptimer) - time0 < nsec);
 
-- 
1.7.10.4
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drm: Added ppc64 root device getter

[Lucas Kannebley Tavares]

On architectures such as ppc64, there is no root bus device (it belongs
to the hypervisor). DRM attempted to get one, causing a null-pointer
dereference.

Signed-off-by: Lucas Kannebley Tavares 

--
diff --git a/arch/powerpc/platforms/pseries/Makefile 
b/arch/powerpc/platforms/pseries/Makefile

index 890622b..ddfdda8 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -1,6 +1,8 @@
 ccflags-$(CONFIG_PPC64):= -mno-minimal-toc
 ccflags-$(CONFIG_PPC_PSERIES_DEBUG)+= -DDEBUG

+drm-y  += drm_pci.o
+
 obj-y  := lpar.o hvCall.o nvram.o reconfig.o \
   setup.o iommu.o event_sources.o ras.o \
   firmware.o power.o dlpar.o mobility.o
diff --git a/arch/powerpc/platforms/pseries/drm_pci.c 
b/arch/powerpc/platforms/pseries/drm_pci.c

new file mode 100644
index 000..da6675e
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/drm_pci.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2012 Lucas Kannebley Tavares, IBM Corporation
+ *
+ * pSeries specific routines for DRM.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+inline struct pci_device *drm_get_parent_device(struct drm_device *dev) {
+   return (dev->pdev->bus->self == NULL) ? dev->pdev : 
dev->pdev->bus->self;
+}
+
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index eb37466..5a8a4f5 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -466,6 +466,10 @@ void drm_pci_exit(struct drm_driver *driver, struct 
pci_driver *pdriver)

 }
 EXPORT_SYMBOL(drm_pci_exit);

+inline __weak struct pci_device *drm_get_parent_device(struct 
drm_device *dev) {

+   return dev->pdev->bus->self;
+}
+
 int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
 {
struct pci_dev *root;
@@ -479,7 +483,7 @@ int drm_pcie_get_speed_cap_mask(struct drm_device 
*dev, u32 *mask)

return -EINVAL;

// find PCI device for capabilities
-   root = dev->pdev->bus->self;
+   root = drm_get_parent_device(dev);

// some architectures might not have host bridges as PCI devices
if (root == NULL)

--
Lucas Kannebley Tavares
Software Engineer
IBM Linux Technology Center

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[Bug 56405] Distorted graphics on Radeon HD 6620G

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=56405

--- Comment #48 from klausenb...@hotmail.com ---
(In reply to comment #41)
> Created attachment 71284 [details] [review]
> Patch gpu pipe
> 
> Does this kernel patch fix the issue ?

Does this patch get into kernel 3.8?

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Re: [RFC v2 6/8] gpu: drm: tegra: Remove redundant host1x

[Terje Bergström]

On 12.12.2012 18:08, Thierry Reding wrote:
> I've briefly discussed this with Stephen on IRC because I thought I had
> remembered him objecting to the idea of adding a dummy device just for
> this purpose. It turns out, however, that what he didn't like was to add
> a dummy node to the DT just to make this happen, but he has no (strong)
> objections to a dummy platform device.
> 
> While I'm not very happy about that solution, I've been going over it
> for a week now and haven't come up with any better alternative that
> doesn't have its own disadvantages. So perhaps we should go ahead and
> implement that. For the host1x driver this really just means creating a
> platform device and adding it to the system, with some of the fields
> tweaked to make things work.

Even the virtual device is not too beautiful. The problem is that the
virtual device is not physical parent for DC, HDMI, etc, so
dev_get_drvdata(pdev->dev.parent) returns the data from host1x device,
not the virtual device.

We'll post with something that goes around this, but it's not going to
be too pretty. Let's try to find the solution once we get the code out.

Terje

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[PATCH v2] drm/exynos: clear windows in fimd dpms off

[Prathyush K]

Changelog v2:
Added details of original patch in chromium kernel

Changelog v1:
When fimd is turned off, we disable the clocks which will stop
the dma. Now if we remove the current framebuffer, we cannot
disable the overlay but the current framebuffer will still be freed.
When fimd resumes, the dma will continue from where it left off
and will throw a PAGE FAULT since the memory was freed.

This patch fixes the above problem by disabling the fimd windows
before disabling the fimd clocks. It also keeps track of which
windows were currently active by setting the 'resume' flag. When
fimd resumes, the window with a resume flag set is enabled again.

Now if a current fb is removed when fimd is off, fimd_win_disable
will set the 'resume' flag of that window to zero and return.
So when fimd resumes, that window will not be resumed.

This patch is based on the following two patches:
http://git.chromium.org/gitweb/?p=chromiumos/third_party/kernel.git;a=commitdiff;h=341e973c967304976a762211b6465b0074de62ef
http://git.chromium.org/gitweb/?p=chromiumos/third_party/kernel.git;a=commitdiff;h=cfa22e49b7408547c73532c4bb03de47cc034a05
These two patches are rebased onto the current kernel with
additional changes like removing 'fimd_win_commit' call from
the resume function since this is taken care by encoder
dpms, and the modification of resume flag in win_disable.

Signed-off-by: Prathyush K 
Signed-off-by: Sean Paul 
Signed-off-by: Stephane Marchesin 
Signed-off-by: Inki Dae 
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c |   40 +-
 1 files changed, 39 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 9b5c77d..5067ece 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -83,6 +83,7 @@ struct fimd_win_data {
unsigned intbuf_offsize;
unsigned intline_size;  /* bytes */
boolenabled;
+   boolresume;
 };
 
 struct fimd_context {
@@ -602,6 +603,12 @@ static void fimd_win_disable(struct device *dev, int zpos)
 
win_data = &ctx->win_data[win];
 
+   if (ctx->suspended) {
+   /* do not resume this window*/
+   win_data->resume = false;
+   return;
+   }
+
/* protect windows */
val = readl(ctx->regs + SHADOWCON);
val |= SHADOWCON_WINx_PROTECT(win);
@@ -815,11 +822,38 @@ static int fimd_clock(struct fimd_context *ctx, bool 
enable)
return 0;
 }
 
+static void fimd_window_suspend(struct device *dev)
+{
+   struct fimd_context *ctx = get_fimd_context(dev);
+   struct fimd_win_data *win_data;
+   int i;
+
+   for (i = 0; i < WINDOWS_NR; i++) {
+   win_data = &ctx->win_data[i];
+   win_data->resume = win_data->enabled;
+   fimd_win_disable(dev, i);
+   }
+   fimd_wait_for_vblank(dev);
+}
+
+static void fimd_window_resume(struct device *dev)
+{
+   struct fimd_context *ctx = get_fimd_context(dev);
+   struct fimd_win_data *win_data;
+   int i;
+
+   for (i = 0; i < WINDOWS_NR; i++) {
+   win_data = &ctx->win_data[i];
+   win_data->enabled = win_data->resume;
+   win_data->resume = false;
+   }
+}
+
 static int fimd_activate(struct fimd_context *ctx, bool enable)
 {
+   struct device *dev = ctx->subdrv.dev;
if (enable) {
int ret;
-   struct device *dev = ctx->subdrv.dev;
 
ret = fimd_clock(ctx, true);
if (ret < 0)
@@ -830,7 +864,11 @@ static int fimd_activate(struct fimd_context *ctx, bool 
enable)
/* if vblank was enabled status, enable it again. */
if (test_and_clear_bit(0, &ctx->irq_flags))
fimd_enable_vblank(dev);
+
+   fimd_window_resume(dev);
} else {
+   fimd_window_suspend(dev);
+
fimd_clock(ctx, false);
ctx->suspended = true;
}
-- 
1.7.0.4

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Re: [RFC v2 6/8] gpu: drm: tegra: Remove redundant host1x

[Thierry Reding]

On Thu, Dec 13, 2012 at 10:48:55AM +0200, Terje Bergström wrote:
> On 12.12.2012 18:08, Thierry Reding wrote:
> > I've briefly discussed this with Stephen on IRC because I thought I had
> > remembered him objecting to the idea of adding a dummy device just for
> > this purpose. It turns out, however, that what he didn't like was to add
> > a dummy node to the DT just to make this happen, but he has no (strong)
> > objections to a dummy platform device.
> > 
> > While I'm not very happy about that solution, I've been going over it
> > for a week now and haven't come up with any better alternative that
> > doesn't have its own disadvantages. So perhaps we should go ahead and
> > implement that. For the host1x driver this really just means creating a
> > platform device and adding it to the system, with some of the fields
> > tweaked to make things work.
> 
> Even the virtual device is not too beautiful. The problem is that the
> virtual device is not physical parent for DC, HDMI, etc, so
> dev_get_drvdata(pdev->dev.parent) returns the data from host1x device,
> not the virtual device.
> 
> We'll post with something that goes around this, but it's not going to
> be too pretty. Let's try to find the solution once we get the code out.

After some more discussion with Stephen on IRC we came to the conclusion
that the easiest might be to have tegra-drm call into host1x with
something like:

void host1x_set_drm_device(struct host1x *host1x, struct device *dev);

Once the dummy device has been properly set up and have each client use

struct device *host1x_get_drm_device(struct host1x *host1x);

to obtain a pointer to the dummy device, such that it can receive the
driver-private data using dev_get_drvdata() on the returned device. As
long as tegra-drm hasn't registered with host1x yet, the above function
could return ERR_PTR(-EPROBE_DEFER), so that dependencies are
automatically handled. This is required because, tegra-drm not being the
parent of the child devices, it can be guaranteed that it is probed
before any of the children.

That way we should be able to get around any circular dependencies,
since we only call into host1x from tegra-drm but not the other way
around.

Thierry


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Fan control in nouveau driver with geforce 9600gt

[Ozan Çağlayan]

Hi,

I have a geforce 9600gt (nv94) display adapter which has its fan
running at 100% speed. Yesterday I've compiled and booted with the
latest nouveau-2.6 tree. sensors from lm_sensors can correctly acquire
GPU temperature and PWM speed but as far as I understood setting the
speed is still not supported, am I right?

dmesg lists 3 performance levels with 100% fanspeed all of them.

Are there any other things that I can try? I saw a prlvl_wr module
parameter which enables setting performance level but it is indicated
that it is dangerous. Anyway, anything that I can try and help you?

Thanks.

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Galatasaray University - Computer Engineering Dept.
http://www.ozancaglayan.com
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[Bug 58042] [bisected] Garbled UI in Team Fortress 2 Beta

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=58042

Andreas Boll  changed:

   What|Removed |Added

   Severity|normal  |major
Summary|Garbled UI in Team Fortress |[bisected] Garbled UI in
   |2 Beta  |Team Fortress 2 Beta

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[PATCH] drm: only take the crtc lock for ->cursor_move

[Daniel Vetter]

->cursor_move uses mostly the same facilities in drivers as
->cursor_set, so pretty much nothing to fix up:

- ast/gma500/i915: They all use per-crtc registers to update the
  cursor position. ast again touches the global cursor cache, but
  that's ok since there's only one crtc.

- nouveau: nv50+ is again special, updates happen through the per-crtc
  channel (without pushbufs), so it's not protected by the new evo
  lock introduced earlier. But since this channel is per-crtc, we
  should be fine anyway.

- radeon: A bit a mess: avivo asics need a workaround when both output
  pipes are enabled, which means it'll access the crtc list. Just
  reading that flag is ok though as long as radeon _always_ grabs all
  locks when changing the crtc configuration. Which means with the
  current scheme it cannot do an optimized modeset which only locks
  the relevant crtcs. This can be fixed though by introducing a bit of
  global state with separate locks and ensure in the modeset code that
  the cursor will be updated appropriately when enabling the 2nd pipe
  (on affected asics).

- vmwgfx: I still don't understand what it's doing exactly, so apply
  the same trick for now.

v2: Fixup unlocking for the error cases, spotted by Richard Wilbur.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_crtc.c |7 +++
 drivers/gpu/drm/radeon/radeon_cursor.c |8 +++-
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c|   13 +
 3 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 62b5002..83de97f 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -2031,29 +2031,28 @@ int drm_mode_cursor_ioctl(struct drm_device *dev,
}
crtc = obj_to_crtc(obj);
 
+   mutex_lock(&crtc->mutex);
if (req->flags & DRM_MODE_CURSOR_BO) {
if (!crtc->funcs->cursor_set) {
ret = -ENXIO;
goto out;
}
/* Turns off the cursor if handle is 0 */
-   mutex_lock(&crtc->mutex);
ret = crtc->funcs->cursor_set(crtc, file_priv, req->handle,
  req->width, req->height);
-   mutex_unlock(&crtc->mutex);
}
 
if (req->flags & DRM_MODE_CURSOR_MOVE) {
if (crtc->funcs->cursor_move) {
-   drm_modeset_lock_all(dev);
ret = crtc->funcs->cursor_move(crtc, req->x, req->y);
-   drm_modeset_unlock_all(dev);
} else {
ret = -EFAULT;
goto out;
}
}
 out:
+   mutex_unlock(&crtc->mutex);
+
return ret;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c 
b/drivers/gpu/drm/radeon/radeon_cursor.c
index ad6df62..c1680e6 100644
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -245,8 +245,14 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc,
int i = 0;
struct drm_crtc *crtc_p;
 
-   /* avivo cursor image can't end on 128 pixel boundary or
+   /*
+* avivo cursor image can't end on 128 pixel boundary or
 * go past the end of the frame if both crtcs are enabled
+*
+* NOTE: It is safe to access crtc->enabled of other crtcs
+* without holding either the mode_config lock or the other
+* crtc's lock as long as write access to this flag _always_
+* grabs all locks.
 */
list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, 
head) {
if (crtc_p->enabled)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 74b6734..385b8849 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -264,10 +264,23 @@ int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, 
int y)
du->cursor_x = x + crtc->x;
du->cursor_y = y + crtc->y;
 
+   /*
+* FIXME: Unclear whether there's any global state touched by the
+* cursor_set function, especially vmw_cursor_update_position looks
+* suspicious. For now take the easy route and reacquire all locks. We
+* can do this since the caller in the drm core doesn't check anything
+* which is protected by any looks.
+*/
+   mutex_unlock(&crtc->mutex);
+   drm_modeset_lock_all(dev_priv->dev);
+
vmw_cursor_update_position(dev_priv, shown,
   du->cursor_x + du->hotspot_x,
   du->cursor_y + du->hotspot_y);
 
+   drm_modeset_unlock_all(dev_priv->dev);
+   mutex_lock(&crtc->mutex);
+
return 0;
 }
 
-- 
1.7.10.4

__

[PATCH 1/2] drm/: reorder framebuffer init sequence

[Daniel Vetter]

With more fine-grained locking we can no longer rely on the big
mode_config lock to prevent concurrent access to mode resources
like framebuffers. Instead a framebuffer becomes accessible to
other threads as soon as it is added to the relevant lookup
structures. Hence it needs to be fully set up by the time drivers
call drm_framebuffer_init.

This patch here is the drivers part of that reorg. Nothing really fancy
going on safe for three special cases.

- exynos needs to be careful to properly unref all handles.
- nouveau gets a resource leak fixed for free: one of the error
  cases didn't cleanup the framebuffer, which is now moot since
  the framebuffer is only registered once it is fully set up.
- vmwgfx requires a slight reordering of operations, I'm hoping I didn't
  break anything (but it's refcount management only, so should be safe).

v2: Split out exynos, since it's a bit more hairy than expected.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/ast/ast_main.c|4 ++--
 drivers/gpu/drm/cirrus/cirrus_main.c  |9 +++--
 drivers/gpu/drm/drm_fb_cma_helper.c   |   10 +-
 drivers/gpu/drm/gma500/framebuffer.c  |4 ++--
 drivers/gpu/drm/i915/intel_display.c  |5 +++--
 drivers/gpu/drm/mgag200/mgag200_main.c|8 +---
 drivers/gpu/drm/nouveau/nouveau_display.c |   10 +-
 drivers/gpu/drm/radeon/radeon_display.c   |2 +-
 drivers/gpu/drm/udl/udl_fb.c  |2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   |   28 ++--
 drivers/staging/omapdrm/omap_fb.c |   16 
 11 files changed, 53 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index f668e6c..d5ba709 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -266,13 +266,13 @@ int ast_framebuffer_init(struct drm_device *dev,
 {
int ret;
 
+   drm_helper_mode_fill_fb_struct(&ast_fb->base, mode_cmd);
+   ast_fb->obj = obj;
ret = drm_framebuffer_init(dev, &ast_fb->base, &ast_fb_funcs);
if (ret) {
DRM_ERROR("framebuffer init failed %d\n", ret);
return ret;
}
-   drm_helper_mode_fill_fb_struct(&ast_fb->base, mode_cmd);
-   ast_fb->obj = obj;
return 0;
 }
 
diff --git a/drivers/gpu/drm/cirrus/cirrus_main.c 
b/drivers/gpu/drm/cirrus/cirrus_main.c
index 6a9b12e..2eac87b 100644
--- a/drivers/gpu/drm/cirrus/cirrus_main.c
+++ b/drivers/gpu/drm/cirrus/cirrus_main.c
@@ -42,13 +42,13 @@ int cirrus_framebuffer_init(struct drm_device *dev,
 {
int ret;
 
+   drm_helper_mode_fill_fb_struct(&gfb->base, mode_cmd);
+   gfb->obj = obj;
ret = drm_framebuffer_init(dev, &gfb->base, &cirrus_fb_funcs);
if (ret) {
DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
return ret;
}
-   drm_helper_mode_fill_fb_struct(&gfb->base, mode_cmd);
-   gfb->obj = obj;
return 0;
 }
 
@@ -79,6 +79,11 @@ cirrus_user_framebuffer_create(struct drm_device *dev,
 
ret = cirrus_framebuffer_init(dev, cirrus_fb, mode_cmd, obj);
if (ret) {
+   ret = drm_framebuffer_init(dev, &gfb->base, &cirrus_fb_funcs);
+   if (ret) {
+   DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
+   return ret;
+   }
drm_gem_object_unreference_unlocked(obj);
kfree(cirrus_fb);
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c 
b/drivers/gpu/drm/drm_fb_cma_helper.c
index fd9d0af..e1e0cb0 100644
--- a/drivers/gpu/drm/drm_fb_cma_helper.c
+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
@@ -85,6 +85,11 @@ static struct drm_fb_cma *drm_fb_cma_alloc(struct drm_device 
*dev,
if (!fb_cma)
return ERR_PTR(-ENOMEM);
 
+   drm_helper_mode_fill_fb_struct(&fb_cma->fb, mode_cmd);
+
+   for (i = 0; i < num_planes; i++)
+   fb_cma->obj[i] = obj[i];
+
ret = drm_framebuffer_init(dev, &fb_cma->fb, &drm_fb_cma_funcs);
if (ret) {
dev_err(dev->dev, "Failed to initalize framebuffer: %d\n", ret);
@@ -92,11 +97,6 @@ static struct drm_fb_cma *drm_fb_cma_alloc(struct drm_device 
*dev,
return ERR_PTR(ret);
}
 
-   drm_helper_mode_fill_fb_struct(&fb_cma->fb, mode_cmd);
-
-   for (i = 0; i < num_planes; i++)
-   fb_cma->obj[i] = obj[i];
-
return fb_cma;
 }
 
diff --git a/drivers/gpu/drm/gma500/framebuffer.c 
b/drivers/gpu/drm/gma500/framebuffer.c
index afded54..38e7e75 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -260,13 +260,13 @@ static int psb_framebuffer_init(struct drm_device *dev,
default:
return -EINVAL;
}
+   drm_helper_mode_fill_fb_struct(&fb->base, mode_cmd);
+   fb->gtt = gt;
ret = drm_framebuffer_init(dev, &fb->base, &psb_fb_fun

[PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Daniel Vetter]

For user framebuffers it's easier to just inline the
exynos_drm_framebuffer_init helper instead of trying to adjust it -
most of the things that helper sets up need to be overwritten anyway
again due to the multiple backing storage objects support exynos has,
but does not use for the fbdev.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/exynos/exynos_drm_fb.c |   32 
 1 file changed, 20 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c 
b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index 4ef4cd3..aea6500 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -136,15 +136,15 @@ exynos_drm_framebuffer_init(struct drm_device *dev,
return ERR_PTR(-ENOMEM);
}
 
+   drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
+   exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
+
ret = drm_framebuffer_init(dev, &exynos_fb->fb, &exynos_drm_fb_funcs);
if (ret) {
DRM_ERROR("failed to initialize framebuffer\n");
return ERR_PTR(ret);
}
 
-   drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
-   exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
-
return &exynos_fb->fb;
 }
 
@@ -190,9 +190,8 @@ exynos_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
  struct drm_mode_fb_cmd2 *mode_cmd)
 {
struct drm_gem_object *obj;
-   struct drm_framebuffer *fb;
struct exynos_drm_fb *exynos_fb;
-   int i;
+   int i, ret;
 
DRM_DEBUG_KMS("%s\n", __FILE__);
 
@@ -202,13 +201,13 @@ exynos_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
return ERR_PTR(-ENOENT);
}
 
-   fb = exynos_drm_framebuffer_init(dev, mode_cmd, obj);
-   if (IS_ERR(fb)) {
-   drm_gem_object_unreference_unlocked(obj);
-   return fb;
+   exynos_fb = kzalloc(sizeof(*exynos_fb), GFP_KERNEL);
+   if (!exynos_fb) {
+   DRM_ERROR("failed to allocate exynos drm framebuffer\n");
+   return ERR_PTR(-ENOMEM);
}
 
-   exynos_fb = to_exynos_fb(fb);
+   drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
exynos_fb->buf_cnt = exynos_drm_format_num_buffers(mode_cmd);
 
DRM_DEBUG_KMS("buf_cnt = %d\n", exynos_fb->buf_cnt);
@@ -218,14 +217,23 @@ exynos_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
mode_cmd->handles[i]);
if (!obj) {
DRM_ERROR("failed to lookup gem object\n");
-   exynos_drm_fb_destroy(fb);
+   kfree(exynos_fb);
return ERR_PTR(-ENOENT);
}
 
exynos_fb->exynos_gem_obj[i] = to_exynos_gem_obj(obj);
}
 
-   return fb;
+   ret = drm_framebuffer_init(dev, &exynos_fb->fb, &exynos_drm_fb_funcs);
+   if (ret) {
+   for (i = 0; i < exynos_fb->buf_cnt; i++)
+   
drm_gem_object_unreference_unlocked(&exynos_fb->exynos_gem_obj[i]->base);
+
+   kfree(exynos_fb);
+   return ERR_PTR(ret);
+   }
+
+   return &exynos_fb->fb;
 }
 
 struct exynos_drm_gem_buf *exynos_drm_fb_buffer(struct drm_framebuffer *fb,
-- 
1.7.10.4

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[PATCH] allow shmob+imx drm drivers to be compiled

[Daniel Vetter]

---
 drivers/gpu/drm/shmobile/Kconfig |2 +-
 drivers/staging/imx-drm/Kconfig  |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/shmobile/Kconfig b/drivers/gpu/drm/shmobile/Kconfig
index 7e7d52b..1cf8566 100644
--- a/drivers/gpu/drm/shmobile/Kconfig
+++ b/drivers/gpu/drm/shmobile/Kconfig
@@ -1,6 +1,6 @@
 config DRM_SHMOBILE
tristate "DRM Support for SH Mobile"
-   depends on DRM && (SUPERH || ARCH_SHMOBILE)
+   #depends on DRM && (SUPERH || ARCH_SHMOBILE)
select DRM_KMS_HELPER
select DRM_KMS_CMA_HELPER
select DRM_GEM_CMA_HELPER
diff --git a/drivers/staging/imx-drm/Kconfig b/drivers/staging/imx-drm/Kconfig
index 14b4449..266cc35 100644
--- a/drivers/staging/imx-drm/Kconfig
+++ b/drivers/staging/imx-drm/Kconfig
@@ -3,7 +3,7 @@ config DRM_IMX
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
-   depends on DRM && ARCH_MXC
+   #depends on DRM && ARCH_MXC
help
  enable i.MX graphics support
 
-- 
1.7.10.4

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[PATCH] allow shmob+imx drm drivers to be compiled

[Daniel Vetter]

---
 drivers/gpu/drm/shmobile/Kconfig |2 +-
 drivers/staging/imx-drm/Kconfig  |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/shmobile/Kconfig b/drivers/gpu/drm/shmobile/Kconfig
index 7e7d52b..1cf8566 100644
--- a/drivers/gpu/drm/shmobile/Kconfig
+++ b/drivers/gpu/drm/shmobile/Kconfig
@@ -1,6 +1,6 @@
 config DRM_SHMOBILE
tristate "DRM Support for SH Mobile"
-   depends on DRM && (SUPERH || ARCH_SHMOBILE)
+   #depends on DRM && (SUPERH || ARCH_SHMOBILE)
select DRM_KMS_HELPER
select DRM_KMS_CMA_HELPER
select DRM_GEM_CMA_HELPER
diff --git a/drivers/staging/imx-drm/Kconfig b/drivers/staging/imx-drm/Kconfig
index 14b4449..266cc35 100644
--- a/drivers/staging/imx-drm/Kconfig
+++ b/drivers/staging/imx-drm/Kconfig
@@ -3,7 +3,7 @@ config DRM_IMX
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
-   depends on DRM && ARCH_MXC
+   #depends on DRM && ARCH_MXC
help
  enable i.MX graphics support
 
-- 
1.7.10.4

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[PATCH] drm/ttm: fix fence locking in ttm_buffer_object_transfer

[Daniel Vetter]

Noticed while reviewing the fence locking in the radeon pageflip
handler.

v2: Instead of grabbing the bdev->fence_lock in object_transfer just
move the single callsite of that function a few lines, so that it is
protected by the fence_lock. Suggested by Jerome Glisse.

v3: Fix typo in commit message.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/ttm/ttm_bo_util.c |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c 
b/drivers/gpu/drm/ttm/ttm_bo_util.c
index b9c4e51..c5d83a5 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -654,11 +654,13 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object 
*bo,
 */
 
set_bit(TTM_BO_PRIV_FLAG_MOVING, &bo->priv_flags);
+
+   /* ttm_buffer_object_transfer accesses bo->sync_obj */
+   ret = ttm_buffer_object_transfer(bo, &ghost_obj);
spin_unlock(&bdev->fence_lock);
if (tmp_obj)
driver->sync_obj_unref(&tmp_obj);
 
-   ret = ttm_buffer_object_transfer(bo, &ghost_obj);
if (ret)
return ret;
 
-- 
1.7.10.4

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Re: [Intel-gfx] [PATCH 10/37] drm: add per-crtc locks

[Ville Syrjälä]

On Wed, Dec 12, 2012 at 02:06:50PM +0100, Daniel Vetter wrote:
> *drumroll*
> 
> The basic idea is to protect per-crtc state which can change without
> touching the output configuration with separate mutexes, i.e.  all the
> input side state to a crtc like framebuffers, cursor settings or plane
> configuration. Holding such a crtc lock gives a read-lock on all the
> other crtc state which can be changed by e.g. a modeset.
> 
> All non-crtc state is still protected by the mode_config mutex.
> Callers that need to change modeset state of a crtc (e.g. dpms or
> set_mode) need to grab both the mode_config lock and nested within any
> crtc locks.
> 
> Note that since there can only ever be one holder of the mode_config
> lock we can grab the subordinate crtc locks in any order (if we need
> to grab more than one of them). Lockdep can handle such nesting with
> the mutex_lock_nest_lock call correctly.
> 
> With this functions that only touch connectors/encoders but not crtcs
> only need to take the mode_config lock. The biggest such case is the
> output probing, which means that we can now pageflip and move cursors
> while the output probe code is reading an edid.
> 
> Most cases neatly fall into the three buckets:
> - Only touches connectors and similar output state and so only needs
>   the mode_config lock.
> - Touches the global configuration and so needs all locks.
> - Only touches the crtc input side and so only needs the crtc lock.
> 
> But a few cases that need special consideration:
> 
> - Load detection which requires a crtc. The mode_config lock already
>   prevents a modeset change, so we can use any unused crtc as we like
>   to do load detection. The only thing to consider is that such
>   temporary state changes don't leak out to userspace through ioctls
>   that only take the crtc look (like a pageflip). Hence the load
>   detect code needs to grab the crtc of any output pipes it touches
>   (but only if it touches state used by the pageflip or cursor
>   ioctls).
> 
> - Atomic pageflip when moving planes. The first case is sane hw, where
>   planes have a fixed association with crtcs - nothing needs to be
>   done there. More insane^Wflexible hw needs to have plane->crtc
>   mapping which is separately protect with a lock that nests within
>   the crtc lock. If the plane is unused we can just assign it to the
>   current crtc and continue. But if a plane is already in use by
>   another crtc we can't just reassign it.
> 
>   Two solution present themselves: Either go back to a slow-path which
>   takes all modeset locks, potentially incure quite a hefty delay. Or
>   simply disallowing such changes in one atomic pageflip - in general
>   the vblanks of two crtcs are not synced, so there's no sane way to
>   atomically flip such plane changes accross more than one crtc. I'd
>   heavily favour the later approach, going as far as mandating it as
>   part of the ABI of such a new a nuclear pageflip.

Agreed. Just disallow moving an enabled plane between CRTCs. First
disable on the old CRTC, then enable on the new one. Two ioctls
required to complete the operation. I think everyone should be able to
live with that restriction.

>   And if we _really_ want such semantics, we can always get them by
>   introducing another pageflip mutex between the mode_config.mutex and
>   the individual crtc locks. Pageflips crossing more than one crtc
>   would then need to take that lock first, to lock out concurrent
>   multi-crtc pageflips.

I'm actually concerned with multi CRTC page flips, not for moving planes
between CRTCs, but mainly for updating content on genlocked displays
atomically. We need to avoid deadlocks between multiple CRTC locks. Trying
to take the CRTC locks in the same order would be a solution, but since
user space can send the props in any order, it's going to require extra
of work.

Another lock as you suggest could work. But I suppose the atomic ioctl
would need another flag to signal that the kernel needs to grab the multi
CRTC lock in the beginning. The downside is that modeset would need to take
that lock too, and then you end up in the same situation where a modeset
operation on one display will disturb animations on other displays.

> - Optimized global modeset operations: We could just take the
>   mode_config lock and then lazily lock all crtc which are affected by
>   a modeset operation. This has the advantage that pageflip could
>   continue unhampered on unaffected crtc. But if e.g. global resources
>   like plls need to be reassigned and so affect unrelated crtcs we can
>   still do that - nested locking works in any order.

Right. In my atomic ioctl this could be done in the beginning by
checking the non-block flag. If the flag is not set, then grab the
global lock, and you can lock each CRTC when you see that you need to
touch them.

I would need to change my code to refuse any change to modeset state
when the non-block flag is set. Currently I'm doing that check as late
as p

Re: [Intel-gfx] [PATCH 10/37] drm: add per-crtc locks

[Daniel Vetter]

On Thu, Dec 13, 2012 at 12:38 PM, Ville Syrjälä
 wrote:
>>   And if we _really_ want such semantics, we can always get them by
>>   introducing another pageflip mutex between the mode_config.mutex and
>>   the individual crtc locks. Pageflips crossing more than one crtc
>>   would then need to take that lock first, to lock out concurrent
>>   multi-crtc pageflips.
>
> I'm actually concerned with multi CRTC page flips, not for moving planes
> between CRTCs, but mainly for updating content on genlocked displays
> atomically. We need to avoid deadlocks between multiple CRTC locks. Trying
> to take the CRTC locks in the same order would be a solution, but since
> user space can send the props in any order, it's going to require extra
> of work.

Ordering CRTC locks should also work - modeset_lock_all takes them
always in the same order, and as long as you only take a single crtc
nested within the modeset lock that's still ok (e.g. the load-detect
code). We don't have many CRTCs, so even the dumbest sort will be fast
enough. A bit of work will be required to make lockdep happy. But we
can achieve this by nesting CRTCs within a fake lock encapsulated by
the lock/unlock helper functions.
-Daniel
-- 
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Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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RE: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Inki Dae]

> -Original Message-
> From: dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org
> [mailto:dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org] On
> Behalf Of Daniel Vetter
> Sent: Thursday, December 13, 2012 8:05 PM
> To: DRI Development
> Cc: Nouveau Dev; Intel Graphics Development; Daniel Vetter
> Subject: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence
> 
> For user framebuffers it's easier to just inline the
> exynos_drm_framebuffer_init helper instead of trying to adjust it -
> most of the things that helper sets up need to be overwritten anyway
> again due to the multiple backing storage objects support exynos has,
> but does not use for the fbdev.
> 

Hi Daniel,

I'd rebase this patch to -next. This patch is conflicted with -next.
And if there is no any problem after test, will apply it.

Thanks,
Inki Dae

> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/exynos/exynos_drm_fb.c |   32

> 
>  1 file changed, 20 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c
> b/drivers/gpu/drm/exynos/exynos_drm_fb.c
> index 4ef4cd3..aea6500 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
> @@ -136,15 +136,15 @@ exynos_drm_framebuffer_init(struct drm_device *dev,
>   return ERR_PTR(-ENOMEM);
>   }
> 
> + drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
> + exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
> +
>   ret = drm_framebuffer_init(dev, &exynos_fb->fb,
> &exynos_drm_fb_funcs);
>   if (ret) {
>   DRM_ERROR("failed to initialize framebuffer\n");
>   return ERR_PTR(ret);
>   }
> 
> - drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
> - exynos_fb->exynos_gem_obj[0] = to_exynos_gem_obj(obj);
> -
>   return &exynos_fb->fb;
>  }
> 
> @@ -190,9 +190,8 @@ exynos_user_fb_create(struct drm_device *dev, struct
> drm_file *file_priv,
> struct drm_mode_fb_cmd2 *mode_cmd)
>  {
>   struct drm_gem_object *obj;
> - struct drm_framebuffer *fb;
>   struct exynos_drm_fb *exynos_fb;
> - int i;
> + int i, ret;
> 
>   DRM_DEBUG_KMS("%s\n", __FILE__);
> 
> @@ -202,13 +201,13 @@ exynos_user_fb_create(struct drm_device *dev, struct
> drm_file *file_priv,
>   return ERR_PTR(-ENOENT);
>   }
> 
> - fb = exynos_drm_framebuffer_init(dev, mode_cmd, obj);
> - if (IS_ERR(fb)) {
> - drm_gem_object_unreference_unlocked(obj);
> - return fb;
> + exynos_fb = kzalloc(sizeof(*exynos_fb), GFP_KERNEL);
> + if (!exynos_fb) {
> + DRM_ERROR("failed to allocate exynos drm framebuffer\n");
> + return ERR_PTR(-ENOMEM);
>   }
> 
> - exynos_fb = to_exynos_fb(fb);
> + drm_helper_mode_fill_fb_struct(&exynos_fb->fb, mode_cmd);
>   exynos_fb->buf_cnt = exynos_drm_format_num_buffers(mode_cmd);
> 
>   DRM_DEBUG_KMS("buf_cnt = %d\n", exynos_fb->buf_cnt);
> @@ -218,14 +217,23 @@ exynos_user_fb_create(struct drm_device *dev, struct
> drm_file *file_priv,
>   mode_cmd->handles[i]);
>   if (!obj) {
>   DRM_ERROR("failed to lookup gem object\n");
> - exynos_drm_fb_destroy(fb);
> + kfree(exynos_fb);
>   return ERR_PTR(-ENOENT);
>   }
> 
>   exynos_fb->exynos_gem_obj[i] = to_exynos_gem_obj(obj);
>   }
> 
> - return fb;
> + ret = drm_framebuffer_init(dev, &exynos_fb->fb,
> &exynos_drm_fb_funcs);
> + if (ret) {
> + for (i = 0; i < exynos_fb->buf_cnt; i++)
> + drm_gem_object_unreference_unlocked(&exynos_fb-
> >exynos_gem_obj[i]->base);
> +
> + kfree(exynos_fb);
> + return ERR_PTR(ret);
> + }
> +
> + return &exynos_fb->fb;
>  }
> 
>  struct exynos_drm_gem_buf *exynos_drm_fb_buffer(struct drm_framebuffer
> *fb,
> --
> 1.7.10.4
> 
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Re: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence

[Daniel Vetter]

Hi Inki,

I've pushed out the latest bits to
http://cgit.freedesktop.org/~danvet/drm/log/?h=drm-kms-locking with
some hacks on top to be able to compile all the arm drivers. Testing
feedback of the entire pile would be awesome, especially since you've
had some issues with framebuffer lifecycle and those should now be
correctly fixable with the proper refcounting. If you have too many
conflicts pls yell so that I can include your base into mine and
rebase the entire series.

Thanks, Daniel

On Thu, Dec 13, 2012 at 1:26 PM, Inki Dae  wrote:
>> -Original Message-
>> From: dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org
>> [mailto:dri-devel-bounces+inki.dae=samsung@lists.freedesktop.org] On
>> Behalf Of Daniel Vetter
>> Sent: Thursday, December 13, 2012 8:05 PM
>> To: DRI Development
>> Cc: Nouveau Dev; Intel Graphics Development; Daniel Vetter
>> Subject: [PATCH 2/2] drm/exynos: reorder framebuffer init sequence
>>
>> For user framebuffers it's easier to just inline the
>> exynos_drm_framebuffer_init helper instead of trying to adjust it -
>> most of the things that helper sets up need to be overwritten anyway
>> again due to the multiple backing storage objects support exynos has,
>> but does not use for the fbdev.
>>
>
> Hi Daniel,
>
> I'd rebase this patch to -next. This patch is conflicted with -next.
> And if there is no any problem after test, will apply it.



-- 
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[PATCHv3 2/7] gpu: host1x: Add syncpoint wait and interrupts

[Terje Bergstrom]

Add support for sync point interrupts, and sync point wait. Sync
point wait used interrupts for unblocking wait.

Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile  |3 +-
 drivers/gpu/host1x/dev.c |   44 
 drivers/gpu/host1x/dev.h |   15 ++
 drivers/gpu/host1x/hw/host1x01.c |2 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h |   30 ++-
 drivers/gpu/host1x/hw/intr_hw.c  |  175 +++
 drivers/gpu/host1x/intr.c|  350 ++
 drivers/gpu/host1x/intr.h|  100 +
 drivers/gpu/host1x/syncpt.c  |  161 ++
 drivers/gpu/host1x/syncpt.h  |4 +
 include/linux/host1x.h   |1 +
 11 files changed, 883 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/host1x/hw/intr_hw.c
 create mode 100644 drivers/gpu/host1x/intr.c
 create mode 100644 drivers/gpu/host1x/intr.h

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index a4adcc6..9d00b62 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -2,7 +2,8 @@ ccflags-y = -Idrivers/gpu/host1x
 
 host1x-objs = \
syncpt.o \
-   dev.o
+   dev.o \
+   intr.o
 
 obj-$(CONFIG_TEGRA_HOST1X) += hw/
 obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index b0d630d..9255a49 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include "dev.h"
+#include "intr.h"
 #include "hw/host1x01.h"
 
 #define CREATE_TRACE_POINTS
@@ -48,6 +49,19 @@ u32 host1x_syncpt_read_byid(u32 id)
 }
 EXPORT_SYMBOL(host1x_syncpt_read_byid);
 
+int host1x_syncpt_wait_byid(u32 id, u32 thresh, long timeout, u32 *value)
+{
+   struct host1x_syncpt *sp = host1x->syncpt + id;
+   return host1x_syncpt_wait(sp, thresh, timeout, value);
+}
+EXPORT_SYMBOL(host1x_syncpt_wait_byid);
+
+static void host1x_free_resources(struct host1x *host)
+{
+   kfree(host->intr.syncpt);
+   host->intr.syncpt = 0;
+}
+
 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
 {
void __iomem *sync_regs = host1x->regs + host1x->info.sync_offset;
@@ -62,6 +76,21 @@ u32 host1x_sync_readl(struct host1x *host1x, u32 r)
return readl(sync_regs + r);
 }
 
+static int host1x_alloc_resources(struct host1x *host)
+{
+   host->intr.syncpt = devm_kzalloc(&host->dev->dev,
+   sizeof(struct host1x_intr_syncpt) *
+   host->info.nb_pts,
+   GFP_KERNEL);
+
+   if (!host->intr.syncpt) {
+   /* frees happen in the support removal phase */
+   return -ENOMEM;
+   }
+
+   return 0;
+}
+
 static struct host1x_device_info host1x_info = {
.nb_channels= 8,
.nb_pts = 32,
@@ -118,6 +147,12 @@ static int host1x_probe(struct platform_device *dev)
goto fail;
}
 
+   err = host1x_alloc_resources(host);
+   if (err) {
+   dev_err(&dev->dev, "failed to init chip support\n");
+   goto fail;
+   }
+
if (host->info.init) {
err = host->info.init(host);
if (err)
@@ -132,6 +167,10 @@ static int host1x_probe(struct platform_device *dev)
if (!host->nop_sp)
goto fail;
 
+   err = host1x_intr_init(&host->intr, syncpt_irq);
+   if (err)
+   goto fail;
+
host->clk = devm_clk_get(&dev->dev, NULL);
if (IS_ERR(host->clk)) {
dev_err(&dev->dev, "failed to get clock\n");
@@ -145,6 +184,8 @@ static int host1x_probe(struct platform_device *dev)
 
host1x_syncpt_reset(host);
 
+   host1x_intr_start(&host->intr, clk_get_rate(host->clk));
+
host1x = host;
 
dev_info(&dev->dev, "initialized\n");
@@ -153,6 +194,7 @@ static int host1x_probe(struct platform_device *dev)
 
 fail:
host1x_syncpt_free(host->nop_sp);
+   host1x_free_resources(host);
kfree(host);
return err;
 }
@@ -160,8 +202,10 @@ fail:
 static int __exit host1x_remove(struct platform_device *dev)
 {
struct host1x *host = platform_get_drvdata(dev);
+   host1x_intr_deinit(&host->intr);
host1x_syncpt_deinit(host);
clk_disable_unprepare(host->clk);
+   host1x_free_resources(host);
return 0;
 }
 
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index 8245e24..a1622bb 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -20,6 +20,7 @@
 #include 
 
 #include "syncpt.h"
+#include "intr.h"
 
 struct host1x;
 struct host1x_syncpt;
@@ -36,6 +37,18 @@ struct host1x_syncpt_ops {
const char * (*name)(struct host1x_syncpt *);
 };
 
+struct host1x_intr_ops {
+   void (*init_host_sync)(struct host1x_intr *);
+   void (*set_host_clocks_per_usec)(
+   struct host1x_intr *, u32 clocks

[PATCHv3 5/7] drm: tegra: Remove redundant host1x

[Terje Bergstrom]

From: Arto Merilainen 

This patch removes the redundant host1x driver from tegradrm and
makes necessary bindings to the separate host driver.

The infrastructure for drm client lists is merged to drm.c.

The patch simplifies driver initialization; The original driver had
two lists for registered devices (clients and drm_active). The
clients list included references to all registered devices whereas
the drm_active list included only the devices that the tegradrm
driver itself supported. host1x is separated into a driver of its own
and hence there should be no need to support registration of external
drivers.  Therefore, only the drm_active list is reserved. Removal of
the list also simplifies the driver unregistration.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/drm/tegra/Kconfig  |2 +-
 drivers/gpu/drm/tegra/Makefile |2 +-
 drivers/gpu/drm/tegra/dc.c |   20 ++-
 drivers/gpu/drm/tegra/drm.c|  217 +--
 drivers/gpu/drm/tegra/drm.h|   38 ++---
 drivers/gpu/drm/tegra/fb.c |   17 ++-
 drivers/gpu/drm/tegra/hdmi.c   |   24 ++-
 drivers/gpu/drm/tegra/host1x.c |  325 
 include/drm/tegra_drm.h|   20 +++
 9 files changed, 275 insertions(+), 390 deletions(-)
 delete mode 100644 drivers/gpu/drm/tegra/host1x.c
 create mode 100644 include/drm/tegra_drm.h

diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index be1daf7..4a0290e 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -1,6 +1,6 @@
 config DRM_TEGRA
tristate "NVIDIA Tegra DRM"
-   depends on DRM && OF && ARCH_TEGRA
+   depends on DRM && OF && ARCH_TEGRA && TEGRA_HOST1X
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
diff --git a/drivers/gpu/drm/tegra/Makefile b/drivers/gpu/drm/tegra/Makefile
index 80f73d1..f4c05bb 100644
--- a/drivers/gpu/drm/tegra/Makefile
+++ b/drivers/gpu/drm/tegra/Makefile
@@ -1,7 +1,7 @@
 ccflags-y := -Iinclude/drm
 ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 
-tegra-drm-y := drm.o fb.o dc.o host1x.o
+tegra-drm-y := drm.o fb.o dc.o
 tegra-drm-y += output.o rgb.o hdmi.o
 
 obj-$(CONFIG_DRM_TEGRA) += tegra-drm.o
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 0744103..aae29e8 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -673,10 +673,10 @@ static int tegra_dc_debugfs_exit(struct tegra_dc *dc)
return 0;
 }
 
-static int tegra_dc_drm_init(struct host1x_client *client,
+static int tegra_dc_drm_init(struct tegra_drm_client *client,
 struct drm_device *drm)
 {
-   struct tegra_dc *dc = host1x_client_to_dc(client);
+   struct tegra_dc *dc = tegra_drm_client_to_dc(client);
int err;
 
dc->pipe = drm->mode_config.num_crtc;
@@ -708,9 +708,9 @@ static int tegra_dc_drm_init(struct host1x_client *client,
return 0;
 }
 
-static int tegra_dc_drm_exit(struct host1x_client *client)
+static int tegra_dc_drm_exit(struct tegra_drm_client *client)
 {
-   struct tegra_dc *dc = host1x_client_to_dc(client);
+   struct tegra_dc *dc = tegra_drm_client_to_dc(client);
int err;
 
devm_free_irq(dc->dev, dc->irq, dc);
@@ -730,14 +730,13 @@ static int tegra_dc_drm_exit(struct host1x_client *client)
return 0;
 }
 
-static const struct host1x_client_ops dc_client_ops = {
+static const struct tegra_drm_client_ops dc_client_ops = {
.drm_init = tegra_dc_drm_init,
.drm_exit = tegra_dc_drm_exit,
 };
 
 static int tegra_dc_probe(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
struct resource *regs;
struct tegra_dc *dc;
int err;
@@ -787,9 +786,9 @@ static int tegra_dc_probe(struct platform_device *pdev)
return err;
}
 
-   err = host1x_register_client(host1x, &dc->client);
+   err = tegra_drm_register_client(&dc->client);
if (err < 0) {
-   dev_err(&pdev->dev, "failed to register host1x client: %d\n",
+   dev_err(&pdev->dev, "failed to register tegra drm client: %d\n",
err);
return err;
}
@@ -801,13 +800,12 @@ static int tegra_dc_probe(struct platform_device *pdev)
 
 static int tegra_dc_remove(struct platform_device *pdev)
 {
-   struct host1x *host1x = dev_get_drvdata(pdev->dev.parent);
struct tegra_dc *dc = platform_get_drvdata(pdev);
int err;
 
-   err = host1x_unregister_client(host1x, &dc->client);
+   err = tegra_drm_unregister_client(&dc->client);
if (err < 0) {
-   dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
+   dev_err(&pdev->dev, "failed to unregister tegra_drm client: 
%d\n",
err);
return err;
}
diff --git a/drivers/gpu/drm/tegra/drm.c b/

[PATCHv3 1/7] gpu: host1x: Add host1x driver

[Terje Bergstrom]

Add host1x, the driver for host1x and its client unit 2D.

Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/Makefile  |1 +
 drivers/gpu/host1x/Kconfig|6 +
 drivers/gpu/host1x/Makefile   |8 +
 drivers/gpu/host1x/dev.c  |  182 +++
 drivers/gpu/host1x/dev.h  |   79 ++
 drivers/gpu/host1x/hw/Makefile|6 +
 drivers/gpu/host1x/hw/host1x01.c  |   36 +
 drivers/gpu/host1x/hw/host1x01.h  |   25 
 drivers/gpu/host1x/hw/host1x01_hardware.h |   26 
 drivers/gpu/host1x/hw/hw_host1x01_sync.h  |   66 +
 drivers/gpu/host1x/hw/syncpt_hw.c |  146 +++
 drivers/gpu/host1x/syncpt.c   |  227 +
 drivers/gpu/host1x/syncpt.h   |  128 
 drivers/video/Kconfig |2 +
 include/linux/host1x.h|   41 ++
 include/trace/events/host1x.h |   61 
 16 files changed, 1040 insertions(+)
 create mode 100644 drivers/gpu/host1x/Kconfig
 create mode 100644 drivers/gpu/host1x/Makefile
 create mode 100644 drivers/gpu/host1x/dev.c
 create mode 100644 drivers/gpu/host1x/dev.h
 create mode 100644 drivers/gpu/host1x/hw/Makefile
 create mode 100644 drivers/gpu/host1x/hw/host1x01.c
 create mode 100644 drivers/gpu/host1x/hw/host1x01.h
 create mode 100644 drivers/gpu/host1x/hw/host1x01_hardware.h
 create mode 100644 drivers/gpu/host1x/hw/hw_host1x01_sync.h
 create mode 100644 drivers/gpu/host1x/hw/syncpt_hw.c
 create mode 100644 drivers/gpu/host1x/syncpt.c
 create mode 100644 drivers/gpu/host1x/syncpt.h
 create mode 100644 include/linux/host1x.h
 create mode 100644 include/trace/events/host1x.h

diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index cc92778..7fa2f68 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_TEGRA_HOST1X) += host1x/
 obj-y  += drm/ vga/ stub/
diff --git a/drivers/gpu/host1x/Kconfig b/drivers/gpu/host1x/Kconfig
new file mode 100644
index 000..e89fb2b
--- /dev/null
+++ b/drivers/gpu/host1x/Kconfig
@@ -0,0 +1,6 @@
+config TEGRA_HOST1X
+   tristate "Tegra host1x driver"
+   help
+ Driver for the Tegra host1x hardware.
+
+ Required for enabling tegradrm.
diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
new file mode 100644
index 000..a4adcc6
--- /dev/null
+++ b/drivers/gpu/host1x/Makefile
@@ -0,0 +1,8 @@
+ccflags-y = -Idrivers/gpu/host1x
+
+host1x-objs = \
+   syncpt.o \
+   dev.o
+
+obj-$(CONFIG_TEGRA_HOST1X) += hw/
+obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
new file mode 100644
index 000..b0d630d
--- /dev/null
+++ b/drivers/gpu/host1x/dev.c
@@ -0,0 +1,182 @@
+/*
+ * Tegra host1x driver
+ *
+ * Copyright (c) 2010-2012, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "dev.h"
+#include "hw/host1x01.h"
+
+#define CREATE_TRACE_POINTS
+#include 
+
+#define DRIVER_NAME"tegra-host1x"
+
+struct host1x *host1x;
+
+void host1x_syncpt_incr_byid(u32 id)
+{
+   struct host1x_syncpt *sp = host1x->syncpt + id;
+   return host1x_syncpt_incr(sp);
+}
+EXPORT_SYMBOL(host1x_syncpt_incr_byid);
+
+u32 host1x_syncpt_read_byid(u32 id)
+{
+   struct host1x_syncpt *sp = host1x->syncpt + id;
+   return host1x_syncpt_read(sp);
+}
+EXPORT_SYMBOL(host1x_syncpt_read_byid);
+
+void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info.sync_offset;
+
+   writel(v, sync_regs + r);
+}
+
+u32 host1x_sync_readl(struct host1x *host1x, u32 r)
+{
+   void __iomem *sync_regs = host1x->regs + host1x->info.sync_offset;
+
+   return readl(sync_regs + r);
+}
+
+static struct host1x_device_info host1x_info = {
+   .nb_channels= 8,
+   .nb_pts = 32,
+   .nb_mlocks  = 16,
+   .nb_bases   = 8,
+   .init   = host1x01_init,
+   .sync_offset= 0x3000,
+};
+
+static struct of_device_id host1x_match[] = {
+   { .compatible = "nvidia,tegra30-host1x", .data = &host1x_info, },
+   { .compatible = "nvidia,tegra20-host1x", .data = &host1x_info, 

[PATCHv3 7/7] drm: tegra: Add gr2d device

[Terje Bergstrom]

Add client driver for 2D device.

Signed-off-by: Arto Merilainen 
Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/drm/tegra/Makefile |2 +-
 drivers/gpu/drm/tegra/drm.c|  211 +++-
 drivers/gpu/drm/tegra/drm.h|   29 
 drivers/gpu/drm/tegra/gr2d.c   |  300 
 include/drm/tegra_drm.h|  111 +++
 5 files changed, 651 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/tegra/gr2d.c

diff --git a/drivers/gpu/drm/tegra/Makefile b/drivers/gpu/drm/tegra/Makefile
index f4c05bb..2661f41 100644
--- a/drivers/gpu/drm/tegra/Makefile
+++ b/drivers/gpu/drm/tegra/Makefile
@@ -1,7 +1,7 @@
 ccflags-y := -Iinclude/drm
 ccflags-$(CONFIG_DRM_TEGRA_DEBUG) += -DDEBUG
 
-tegra-drm-y := drm.o fb.o dc.o
+tegra-drm-y := drm.o fb.o dc.o gr2d.o
 tegra-drm-y += output.o rgb.o hdmi.o
 
 obj-$(CONFIG_DRM_TEGRA) += tegra-drm.o
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 530bed4..ab4460a 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -60,8 +60,10 @@ static int tegra_drm_parse_dt(struct tegradrm *tegradrm)
static const char * const compat[] = {
"nvidia,tegra20-dc",
"nvidia,tegra20-hdmi",
+   "nvidia,tegra20-gr2d",
"nvidia,tegra30-dc",
"nvidia,tegra30-hdmi",
+   "nvidia,tegra30-gr2d"
};
unsigned int i;
int err;
@@ -218,12 +220,29 @@ static int tegra_drm_unload(struct drm_device *drm)
 
 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
 {
-   return 0;
+   struct tegra_drm_fpriv *fpriv;
+   int err = 0;
+
+   fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+   if (!fpriv)
+   return -ENOMEM;
+
+   INIT_LIST_HEAD(&fpriv->contexts);
+   filp->driver_priv = fpriv;
+
+   return err;
 }
 
 static void tegra_drm_close(struct drm_device *drm, struct drm_file *filp)
 {
+   struct tegra_drm_fpriv *fpriv = tegra_drm_fpriv(filp);
+   struct tegra_drm_context *context, *tmp;
 
+   list_for_each_entry_safe(context, tmp, &fpriv->contexts, list) {
+   context->client->ops->close_channel(context);
+   kfree(context);
+   }
+   kfree(fpriv);
 }
 
 static void tegra_drm_lastclose(struct drm_device *drm)
@@ -245,8 +264,14 @@ static int __init tegra_drm_init(void)
err = platform_driver_register(&tegra_hdmi_driver);
if (err < 0)
goto unregister_dc;
+
+   err = platform_driver_register(&tegra_gr2d_driver);
+   if (err < 0)
+   goto unregister_hdmi;
return 0;
 
+unregister_hdmi:
+   platform_driver_unregister(&tegra_hdmi_driver);
 unregister_dc:
platform_driver_unregister(&tegra_dc_driver);
 free_tegradrm:
@@ -257,13 +282,197 @@ module_init(tegra_drm_init);
 
 static void __exit tegra_drm_exit(void)
 {
+   platform_driver_unregister(&tegra_gr2d_driver);
platform_driver_unregister(&tegra_hdmi_driver);
platform_driver_unregister(&tegra_dc_driver);
kfree(tegradrm);
 }
 module_exit(tegra_drm_exit);
 
+static int
+tegra_drm_ioctl_syncpt_read(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_read_args *args = data;
+
+   args->value = host1x_syncpt_read_byid(args->id);
+   return 0;
+}
+
+static int
+tegra_drm_ioctl_syncpt_incr(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_incr_args *args = data;
+   host1x_syncpt_incr_byid(args->id);
+   return 0;
+}
+
+static int
+tegra_drm_ioctl_syncpt_wait(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_syncpt_wait_args *args = data;
+   int err;
+
+   err = host1x_syncpt_wait_byid(args->id, args->thresh,
+   args->timeout, &args->value);
+
+   return err;
+}
+
+static int
+tegra_drm_ioctl_open_channel(struct drm_device *drm, void *data,
+struct drm_file *file_priv)
+{
+   struct tegra_drm_open_channel_args *args = data;
+   struct tegra_drm_client *client;
+   struct tegra_drm_context *context;
+   struct tegra_drm_fpriv *fpriv = tegra_drm_fpriv(file_priv);
+   struct tegradrm *tegradrm = drm->dev_private;
+   int err = 0;
+
+   context = kzalloc(sizeof(*context), GFP_KERNEL);
+   if (!context)
+   return -ENOMEM;
+
+   list_for_each_entry(client, &tegradrm->clients, list) {
+   if (client->class == args->class) {
+   dev_dbg(drm->dev, "opening client %x\n", args->class);
+   context->client = client;
+   err = client->ops->open_channel(client, context);
+   if (err)
+   goto out;
+
+  

[PATCHv3 4/7] gpu: host1x: Add debug support

[Terje Bergstrom]

Add support for host1x debugging. Adds debugfs entries, and dumps
channel state to UART in case of stuck job.

Signed-off-by: Terje Bergstrom 
---
 drivers/gpu/host1x/Makefile |1 +
 drivers/gpu/host1x/cdma.c   |   37 +++
 drivers/gpu/host1x/debug.c  |  207 ++
 drivers/gpu/host1x/debug.h  |   49 
 drivers/gpu/host1x/dev.c|3 +
 drivers/gpu/host1x/dev.h|   17 ++
 drivers/gpu/host1x/hw/cdma_hw.c |3 +
 drivers/gpu/host1x/hw/debug_hw.c|  399 +++
 drivers/gpu/host1x/hw/host1x01.c|2 +
 drivers/gpu/host1x/hw/hw_host1x01_channel.h |   12 +
 drivers/gpu/host1x/hw/hw_host1x01_sync.h|   77 ++
 drivers/gpu/host1x/hw/syncpt_hw.c   |1 +
 drivers/gpu/host1x/syncpt.c |3 +
 13 files changed, 811 insertions(+)
 create mode 100644 drivers/gpu/host1x/debug.c
 create mode 100644 drivers/gpu/host1x/debug.h
 create mode 100644 drivers/gpu/host1x/hw/debug_hw.c

diff --git a/drivers/gpu/host1x/Makefile b/drivers/gpu/host1x/Makefile
index f6c1924..541f334 100644
--- a/drivers/gpu/host1x/Makefile
+++ b/drivers/gpu/host1x/Makefile
@@ -8,6 +8,7 @@ host1x-objs = \
intr.o \
channel.o \
job.o \
+   debug.o \
memmgr.o
 
 obj-$(CONFIG_TEGRA_HOST1X_CMA) += cma.o
diff --git a/drivers/gpu/host1x/cdma.c b/drivers/gpu/host1x/cdma.c
index 1193fea..b924f23 100644
--- a/drivers/gpu/host1x/cdma.c
+++ b/drivers/gpu/host1x/cdma.c
@@ -19,6 +19,7 @@
 #include "cdma.h"
 #include "channel.h"
 #include "dev.h"
+#include "debug.h"
 #include "memmgr.h"
 #include 
 
@@ -369,12 +370,45 @@ int host1x_cdma_begin(struct host1x_cdma *cdma, struct 
host1x_job *job)
return 0;
 }
 
+static void trace_write_gather(struct host1x_cdma *cdma,
+   struct mem_handle *ref,
+   u32 offset, u32 words)
+{
+   void *mem = NULL;
+
+   if (host1x_debug_trace_cmdbuf) {
+   mem = host1x_memmgr_mmap(ref);
+   if (IS_ERR_OR_NULL(mem))
+   mem = NULL;
+   };
+
+   if (mem) {
+   u32 i;
+   /*
+* Write in batches of 128 as there seems to be a limit
+* of how much you can output to ftrace at once.
+*/
+   for (i = 0; i < words; i += TRACE_MAX_LENGTH) {
+   trace_host1x_cdma_push_gather(
+   cdma_to_channel(cdma)->dev->name,
+   (u32)ref,
+   min(words - i, TRACE_MAX_LENGTH),
+   offset + i * sizeof(u32),
+   mem);
+   }
+   host1x_memmgr_munmap(ref, mem);
+   }
+}
+
 /*
  * Push two words into a push buffer slot
  * Blocks as necessary if the push buffer is full.
  */
 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2)
 {
+   if (host1x_debug_trace_cmdbuf)
+   trace_host1x_cdma_push(cdma_to_channel(cdma)->dev->name,
+   op1, op2);
host1x_cdma_push_gather(cdma, NULL, 0, op1, op2);
 }
 
@@ -390,6 +424,9 @@ void host1x_cdma_push_gather(struct host1x_cdma *cdma,
u32 slots_free = cdma->slots_free;
struct push_buffer *pb = &cdma->push_buffer;
 
+   if (handle)
+   trace_write_gather(cdma, handle, offset, op1 & 0x);
+
if (slots_free == 0) {
host1x->cdma_op.kick(cdma);
slots_free = host1x_cdma_wait_locked(cdma,
diff --git a/drivers/gpu/host1x/debug.c b/drivers/gpu/host1x/debug.c
new file mode 100644
index 000..8bce9f1
--- /dev/null
+++ b/drivers/gpu/host1x/debug.c
@@ -0,0 +1,207 @@
+/*
+ * Copyright (C) 2010 Google, Inc.
+ * Author: Erik Gilling 
+ *
+ * Copyright (C) 2011-2012 NVIDIA Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "dev.h"
+#include "debug.h"
+#include "channel.h"
+
+pid_t host1x_debug_null_kickoff_pid;
+unsigned int host1x_debug_trace_cmdbuf;
+
+pid_t host1x_debug_force_timeout_pid;
+u32 host1x_debug_force_timeout_val;
+u32 host1x_debug_force_timeout_channel;
+
+void host1x_debug_output(struct output *o, const char *fmt, ...)
+{
+   va_list args;
+   int len;
+
+   va_start(args, fmt);
+   len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
+   va_end(args);
+   o->fn(o->ctx, o->buf, len);
+}
+
+

[PATCHv3 6/7] ARM: tegra: Add board data and 2D clocks

[Terje Bergstrom]

Add a driver alias gr2d for Tegra 2D device, and assign a duplicate
of 2D clock to that driver alias.

Signed-off-by: Terje Bergstrom 
---
 arch/arm/mach-tegra/board-dt-tegra20.c|1 +
 arch/arm/mach-tegra/board-dt-tegra30.c|1 +
 arch/arm/mach-tegra/tegra20_clocks_data.c |2 +-
 arch/arm/mach-tegra/tegra30_clocks_data.c |1 +
 4 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c 
b/arch/arm/mach-tegra/board-dt-tegra20.c
index 734d9cc..2b7a3c2 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -95,6 +95,7 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x5000, "host1x", NULL),
+   OF_DEV_AUXDATA("nvidia,tegra20-gr2d", 0x5414, "gr2d", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x5420, "tegradc.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x5424, "tegradc.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x5428, "hdmi", NULL),
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c 
b/arch/arm/mach-tegra/board-dt-tegra30.c
index 6497d12..6a9e6cb 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -58,6 +58,7 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x5000, "host1x", NULL),
+   OF_DEV_AUXDATA("nvidia,tegra30-gr2d", 0x5414, "gr2d", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x5420, "tegradc.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x5424, "tegradc.1", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x5428, "hdmi", NULL),
diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c 
b/arch/arm/mach-tegra/tegra20_clocks_data.c
index a23a073..15d440a 100644
--- a/arch/arm/mach-tegra/tegra20_clocks_data.c
+++ b/arch/arm/mach-tegra/tegra20_clocks_data.c
@@ -1041,7 +1041,7 @@ static struct clk_duplicate tegra_clk_duplicates[] = {
CLK_DUPLICATE("usbd",   "utmip-pad",NULL),
CLK_DUPLICATE("usbd",   "tegra-ehci.0", NULL),
CLK_DUPLICATE("usbd",   "tegra-otg",NULL),
-   CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"),
+   CLK_DUPLICATE("2d", "gr2d", "gr2d"),
CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"),
CLK_DUPLICATE("epp","tegra_grhost", "epp"),
CLK_DUPLICATE("mpe","tegra_grhost", "mpe"),
diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c 
b/arch/arm/mach-tegra/tegra30_clocks_data.c
index 6942c7a..5787865 100644
--- a/arch/arm/mach-tegra/tegra30_clocks_data.c
+++ b/arch/arm/mach-tegra/tegra30_clocks_data.c
@@ -1338,6 +1338,7 @@ struct clk_duplicate tegra_clk_duplicates[] = {
CLK_DUPLICATE("pll_p", "tegradc.0", "parent"),
CLK_DUPLICATE("pll_p", "tegradc.1", "parent"),
CLK_DUPLICATE("pll_d2_out0", "hdmi", "parent"),
+   CLK_DUPLICATE("2d", "gr2d", "gr2d"),
 };
 
 struct clk *tegra_ptr_clks[] = {
-- 
1.7.9.5

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