[Bug 89699] Regression in 10.5.1 causes flickering/artifacting in a particular video game

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=89699

--- Comment #10 from andre35822 at yahoo.com ---
Certain Mesa devs are able to get this game for free, as well as other Valve
games. Hopefully this may help solve the bug as someone working in Mesa can use
the game on their machines?

http://lists.freedesktop.org/archives/dri-devel/2015-April/081045.html

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[Bug 88364] Xorg hangs after videocard switching

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=88364

--- Comment #11 from Liss  ---
If I try to boot system with radeon.runpm=0 option I'll get behavior described
in comment #1, and if I'll try to boot with radeon.dpm=0 I can run glxgears on
radeon card, but system hangs after some time with no response even on SysRq
keys.

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[Bug 88364] Xorg hangs after videocard switching

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=88364

--- Comment #10 from Liss  ---
Created attachment 115011
  --> https://bugs.freedesktop.org/attachment.cgi?id=115011=edit
full dmesg output

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libva decoding performance regression with kernel 4.0-rc

[Olivier Crête]

Hello,

Thanks for the quick reply!

With my real use-cases:

1. 9x 720p60 mpeg2 videos
 - 4.0-rc6: ~12 frames per second are on time
 - 4.0-rc6 + reverts: a stable 45 frames per second are on time
 - 044307a9: 40-45 frames per second are on time
 - 0a24802a: 45-46 frames per second are on time

2. 1080i30 mpeg2 videos
 - 4.0-rc6:  5 videos
 - 044307a9: 10 videos
 - 0a24802a: 10 videos

So you basically beat my baseline too, good job, thanks a lot! Any
chance you can sneak this into 4.0 ?

Olivier

On Fri, 2015-04-10 at 07:23 +0100, Chris Wilson wrote:
> On Thu, Apr 09, 2015 at 09:00:43PM -0400, Olivier Crête wrote:
> > Hello,
> > 
> > Using an Atom E3845 board, we had a pretty bad performance regression
> > when upgrading to 4.0-rc6 from 3.19. With the help of git bisect, I
> > traced it back to commit 78a42377. Reverting this commit and subsequent
> > related commits (b9ffd80, 71745376, etc) fixes the performance
> > regression for me.
> 
> Can you please test
> 
> http://cgit.freedesktop.org/~ickle/linux-2.6/log/?h=for-olivier-crete
> 
> on your setup.
> 
> First
> http://cgit.freedesktop.org/~ickle/linux-2.6/commit/?h=for-olivier-crete=044307a99b418258ac0d775460d73b20b80277c1
> to get a baseline with nightly as that contains some fine tuning to the
> batch allocations, which is pretty significant for libva on Atom (only
> double clflushing one or two pages every batch rather than 128) and then
> http://cgit.freedesktop.org/~ickle/linux-2.6/commit/?h=for-olivier-crete=0a24802a5b61403b887ce401ce3efd52f5fd1eac
> to see if the command parser tuning helps.
> 
> Hope this helps,
> -Chris
> 

-- 
Olivier Crête
olivier.crete at collabora.com

[PATCH 06/11] drm/i915: Add supporting structure for Displayport Link CTS test 4.2.2.6

[Emil Velikov]

Hi Todd

On 10/04/15 16:12, Todd Previte wrote:
> Displayport compliance test 4.2.2.6 requires that a source device be capable 
> of
> detecting a corrupt EDID. The test specification states that the sink device
> sets up the EDID with an invalid checksum. To do this, the sink sets up an
> invalid EDID header, expecting the source device to generate the checksum and
> compare it to the value stored in the last byte of the block data.
> 
> Unfortunately, the DRM EDID reading and parsing functions are actually too 
> good
> in this case; the header is fixed before the checksum is computed and thus the
> code never sees the invalid checksum. This results in a failure to pass the
> compliance test.
> 
> To correct this issue, a checksum is generated when the EDID header is 
> detected
> as corrupted. If the checksum is invalid, it sets the header_corrupt flag and
> logs the errors. In the case of a more seriously damaged header (fixup score
> less than the threshold) the code does not generate the checksum but does set
> the header_corrupt flag.
> 
> V2:
> - Removed the static bool global
> - Added a bool to the drm_connector struct to reaplce the static one for
>   holding the status of raw edid header corruption detection
> - Modified the function signature of the is_valid function to take an
>   additional parameter to store the corruption detected value
> - Fixed the other callers of the above is_valid function
> V3:
> - Updated the commit message to be more clear about what and why this
>   patch does what it does.
> - Added comment in code to clarify the operations there
> - Removed compliance variable and check_link_status update; those
>   have been moved to a later patch
> - Removed variable assignment from the bottom of the test handler
> 
> Signed-off-by: Todd Previte 
> Cc: dri-devel at lists.freedesktop.org
> ---
>  drivers/gpu/drm/drm_edid.c| 31 ++-
>  drivers/gpu/drm/drm_edid_load.c   |  7 +--
>  drivers/gpu/drm/i2c/tda998x_drv.c |  4 ++--
>  include/drm/drm_crtc.h|  8 +++-
>  4 files changed, 40 insertions(+), 10 deletions(-)
> 
Neither this nor patch 09/11 seems to be i915 specific. If you're doing
another revision you might want to use just "drm:".

Cheers,
Emil

[PATCH libdrm 11/24] intel: remove the drm_mm* symbol workarounds

[Emil Velikov]

On 10/04/15 06:05, Eric Anholt wrote:
> Emil Velikov  writes:
> 
>> Humble ping.
>>
>> Eric, can you please confirm if this and the follow up patch look ok.
> 
> Seems reasonable if you've verified the symbols aren't exposed.
> 
Neither the dri modules (i9[16]5_dri.so) nor libdrm_intel exports these.
Are there any other components that I should take a look at?

Thanks
Emil

[PATCH 0/5] i.MX5/6 mem2mem scaler

[Kamil Debski]

Hi,

From: linux-media-ow...@vger.kernel.org [mailto:linux-media-
owner at vger.kernel.org] On Behalf Of Philipp Zabel
Sent: Tuesday, March 17, 2015 4:48 PM
> 
> Hi,
> 
> this series uses the IPU IC post-processing task, to implement a
> mem2mem device for scaling and colorspace conversion.

This patchset makes changes in two subsystems - media and gpu.
It would be good to merge these patchset through a single subsystem.

The media part of this patchset is good, are there any comments to
the gpu part of this patchset?

I talked with Mauro on the IRC and he acked that this patchset could be
merged via the gpu subsystem. 

Best wishes,
Kamil Debski


> regards
> Philipp
> 
> Philipp Zabel (3):
>   gpu: ipu-v3: Add missing IDMAC channel names
>   gpu: ipu-v3: Add mem2mem image conversion support to IC
>   gpu: ipu-v3: Register scaler platform device
> 
> Sascha Hauer (2):
>   [media] imx-ipu: Add ipu media common code
>   [media] imx-ipu: Add i.MX IPUv3 scaler driver
> 
>  drivers/gpu/ipu-v3/ipu-common.c |   2 +
>  drivers/gpu/ipu-v3/ipu-ic.c | 787
> -
>  drivers/media/platform/Kconfig  |   2 +
>  drivers/media/platform/Makefile |   1 +
>  drivers/media/platform/imx/Kconfig  |  11 +
>  drivers/media/platform/imx/Makefile |   2 +
>  drivers/media/platform/imx/imx-ipu-scaler.c | 869
> 
>  drivers/media/platform/imx/imx-ipu.c| 313 ++
>  drivers/media/platform/imx/imx-ipu.h|  36 ++
>  include/video/imx-ipu-v3.h  |  49 +-
>  10 files changed, 2055 insertions(+), 17 deletions(-)  create mode
> 100644 drivers/media/platform/imx/Kconfig
>  create mode 100644 drivers/media/platform/imx/Makefile
>  create mode 100644 drivers/media/platform/imx/imx-ipu-scaler.c
>  create mode 100644 drivers/media/platform/imx/imx-ipu.c
>  create mode 100644 drivers/media/platform/imx/imx-ipu.h
> 
> --
> 2.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-media"
> in the body of a message to majordomo at vger.kernel.org More majordomo
> info at  http://vger.kernel.org/majordomo-info.html

[Intel-gfx] [PATCH 01/14] drm: Adding drm helper function drm_plane_from_index().

[Konduru, Chandra]

> -Original Message-
> From: Daniel Vetter [mailto:daniel.vetter at ffwll.ch] On Behalf Of Daniel 
> Vetter
> Sent: Friday, April 10, 2015 12:00 AM
> To: Konduru, Chandra
> Cc: intel-gfx at lists.freedesktop.org; Conselvan De Oliveira, Ander; Vetter,
> Daniel; dri-devel at lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 01/14] drm: Adding drm helper function
> drm_plane_from_index().
> 
> On Thu, Apr 09, 2015 at 05:36:21PM -0700, Chandra Konduru wrote:
> > Adding drm helper function to return plane pointer from index where
> > index is a returned by drm_plane_index.
> >
> > v2:
> > -avoided nested loop by adding loop count (Daniel)
> >
> > v3:
> > -updated patch header prefix to 'drm' (Matt)
> >
> > v4:
> > -fixed a kerneldoc issue (kbuild-internal)
> >
> > Cc: dri-devel at lists.freedesktop.org
> >
> > Signed-off-by: Chandra Konduru 
> 
> Applied with Dave's irc-ack. btw when resending patches please pick up r-b 
> tags
> so I don't have to hunt around on the m-l to find them.
Sure, will do.
> 
> Thanks, Daniel
> 
> > ---
> >  drivers/gpu/drm/drm_crtc.c |   23 +++
> >  include/drm/drm_crtc.h |1 +
> >  2 files changed, 24 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> > index d576a4d..ad4d9ae 100644
> > --- a/drivers/gpu/drm/drm_crtc.c
> > +++ b/drivers/gpu/drm/drm_crtc.c
> > @@ -1289,6 +1289,29 @@ unsigned int drm_plane_index(struct drm_plane
> > *plane)  EXPORT_SYMBOL(drm_plane_index);
> >
> >  /**
> > + * drm_plane_from_index - find the registered plane at an index
> > + * @dev: DRM device
> > + * @idx: index of registered plane to find for
> > + *
> > + * Given a plane index, return the registered plane from DRM device's
> > + * list of planes with matching index.
> > + */
> > +struct drm_plane *
> > +drm_plane_from_index(struct drm_device *dev, int idx) {
> > +   struct drm_plane *plane;
> > +   unsigned int i = 0;
> > +
> > +   list_for_each_entry(plane, >mode_config.plane_list, head) {
> > +   if (i == idx)
> > +   return plane;
> > +   i++;
> > +   }
> > +   return NULL;
> > +}
> > +EXPORT_SYMBOL(drm_plane_from_index);
> > +
> > +/**
> >   * drm_plane_force_disable - Forcibly disable a plane
> >   * @plane: plane to disable
> >   *
> > diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index
> > 7b5c661..6b30036 100644
> > --- a/include/drm/drm_crtc.h
> > +++ b/include/drm/drm_crtc.h
> > @@ -1264,6 +1264,7 @@ extern int drm_plane_init(struct drm_device *dev,
> >   bool is_primary);
> >  extern void drm_plane_cleanup(struct drm_plane *plane);  extern
> > unsigned int drm_plane_index(struct drm_plane *plane);
> > +extern struct drm_plane * drm_plane_from_index(struct drm_device
> > +*dev, int idx);
> >  extern void drm_plane_force_disable(struct drm_plane *plane);  extern
> > int drm_plane_check_pixel_format(const struct drm_plane *plane,
> > u32 format);
> > --
> > 1.7.9.5
> >
> > ___
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

[Bug 89944] GPU crash in Civilization 5

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=89944

Sami Liedes  changed:

   What|Removed |Added

 Attachment #115008|R600_DEBUG=ps,vs,gs output  |R600_DEBUG=ps,vs,gs output
description|from first bad commit   |from first bad commit
   |(R600_DEBUG=ps,vs,gs output |(30f51f1a)
   |from last good commit   |
   |(R600_DEBUG=ps,vs,gs output |
   |from last good commit   |
   |(30f51f1a)  |

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[PATCH 3/3] drm/atomic-helper: Don't call atomic_update_plane when it stays off

[Daniel Vetter]

It's a silly thing to do and surprises driver writers. Most likely
this did already blow up for exynos.

It's also a silly thing to change plane state when it's off, but fbdev
is silly (it does an unconditional modeset over all planes). And
userspace can be evil. So I think we need this.

With this check in the helpers we can remove the one in i915 code for
the same conditions (becuase ->crtc iff ->fb).

Cc: Gustavo Padovan 
Cc: dri-devel at lists.freedesktop.org
Cc: Inki Dae 
Cc: Matt Roper 
Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_atomic_helper.c   | 3 ++-
 drivers/gpu/drm/i915/intel_atomic_plane.c | 4 
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 41c38edade74..e1556143d811 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1216,7 +1216,8 @@ void drm_atomic_helper_commit_planes(struct drm_device 
*dev,
if (drm_atomic_plane_disabling(plane, old_plane_state) &&
funcs->atomic_disable)
funcs->atomic_disable(plane, old_plane_state);
-   else
+   else if (plane->state->crtc ||
+drm_atomic_plane_disabling(plane, old_plane_state))
funcs->atomic_update(plane, old_plane_state);
}

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c 
b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 976b89156570..cb383a0fc392 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -172,10 +172,6 @@ static void intel_plane_atomic_update(struct drm_plane 
*plane,
struct intel_plane_state *intel_state =
to_intel_plane_state(plane->state);

-   /* Don't disable an already disabled plane */
-   if (!plane->state->fb && !old_state->fb)
-   return;
-
intel_plane->commit_plane(plane, intel_state);
 }

-- 
2.1.0

[PATCH 4/5] [media] imx-ipu: Add ipu media common code

[Kamil Debski]

From: linux-media-ow...@vger.kernel.org [mailto:linux-media-
owner at vger.kernel.org] On Behalf Of Philipp Zabel
Sent: Tuesday, March 17, 2015 4:48 PM
> To: linux-media at vger.kernel.org
> Cc: dri-devel at lists.freedesktop.org; David Airlie; Mauro Carvalho
> Chehab; Steve Longerbeam; Hans Verkuil; Kamil Debski; Ian Molton; Jean-
> Michel Hautbois; kernel at pengutronix.de; Sascha Hauer; Lucas Stach;
> Philipp Zabel
> Subject: [PATCH 4/5] [media] imx-ipu: Add ipu media common code
> 
> From: Sascha Hauer 
> 
> Add video4linux API routines common to drivers for units that accept or
> provide video data via the i.MX IPU IDMAC channels, such as scaler or
> deinterlacer drivers.
> 
> Signed-off-by: Sascha Hauer 
> Signed-off-by: Lucas Stach 
> Signed-off-by: Philipp Zabel 

Acked-by: Kamil Debski 

> ---
>  drivers/media/platform/Kconfig   |   2 +
>  drivers/media/platform/Makefile  |   1 +
>  drivers/media/platform/imx/Kconfig   |   2 +
>  drivers/media/platform/imx/Makefile  |   1 +
>  drivers/media/platform/imx/imx-ipu.c | 313
> +++
>  drivers/media/platform/imx/imx-ipu.h |  35 
>  6 files changed, 354 insertions(+)
>  create mode 100644 drivers/media/platform/imx/Kconfig
>  create mode 100644 drivers/media/platform/imx/Makefile
>  create mode 100644 drivers/media/platform/imx/imx-ipu.c
>  create mode 100644 drivers/media/platform/imx/imx-ipu.h
> 
> diff --git a/drivers/media/platform/Kconfig
> b/drivers/media/platform/Kconfig index d9b872b..650a9a6 100644
> --- a/drivers/media/platform/Kconfig
> +++ b/drivers/media/platform/Kconfig
> @@ -29,6 +29,8 @@ config VIDEO_VIA_CAMERA
> 
>  source "drivers/media/platform/davinci/Kconfig"
> 
> +source "drivers/media/platform/imx/Kconfig"
> +
>  source "drivers/media/platform/omap/Kconfig"
> 
>  source "drivers/media/platform/blackfin/Kconfig"
> diff --git a/drivers/media/platform/Makefile
> b/drivers/media/platform/Makefile index 3ec1547..2e35581 100644
> --- a/drivers/media/platform/Makefile
> +++ b/drivers/media/platform/Makefile
> @@ -44,6 +44,7 @@ obj-$(CONFIG_SOC_CAMERA)+= soc_camera/
> 
>  obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
> 
> +obj-y+= imx/
>  obj-y+= omap/
> 
>  obj-$(CONFIG_VIDEO_AM437X_VPFE)  += am437x/
> diff --git a/drivers/media/platform/imx/Kconfig
> b/drivers/media/platform/imx/Kconfig
> new file mode 100644
> index 000..a90c973
> --- /dev/null
> +++ b/drivers/media/platform/imx/Kconfig
> @@ -0,0 +1,2 @@
> +config VIDEO_IMX_IPU_COMMON
> + tristate
> diff --git a/drivers/media/platform/imx/Makefile
> b/drivers/media/platform/imx/Makefile
> new file mode 100644
> index 000..5de119c
> --- /dev/null
> +++ b/drivers/media/platform/imx/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_VIDEO_IMX_IPU_COMMON)   += imx-ipu.o
> diff --git a/drivers/media/platform/imx/imx-ipu.c
> b/drivers/media/platform/imx/imx-ipu.c
> new file mode 100644
> index 000..c1b8637
> --- /dev/null
> +++ b/drivers/media/platform/imx/imx-ipu.c
> @@ -0,0 +1,313 @@
> +/*
> + * i.MX IPUv3 common v4l2 support
> + *
> + * Copyright (C) 2011 Sascha Hauer, Pengutronix
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "imx-ipu.h"
> +
> +static struct ipu_fmt ipu_fmt_yuv[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_YUV420,
> + .name = "YUV 4:2:0 planar, YCbCr",
> + .bytes_per_pixel = 1,
> + }, {
> + .fourcc = V4L2_PIX_FMT_YVU420,
> + .name = "YUV 4:2:0 planar, YCrCb",
> + .bytes_per_pixel = 1,
> + }, {
> + .fourcc = V4L2_PIX_FMT_YUV422P,
> + .name = "YUV 4:2:2 planar, YCbCr",
> + .bytes_per_pixel = 1,
> + }, {
> + .fourcc = V4L2_PIX_FMT_NV12,
> + .name = "YUV 4:2:0 partial interleaved, YCbCr",
> + .bytes_per_pixel = 1,
> + }, {
> + .fourcc = V4L2_PIX_FMT_UYVY,
> + .name = "4:2:2, packed, UYVY",
> + .bytes_per_pixel = 2,
> + }, {
> + .fourcc = V4L2_PIX_FMT_YUYV,
> + .name = "4:2:2, packed, YUYV",
> + .bytes_per_pixel = 2,
> + },
> +};
> +
> +static struct ipu_fmt ipu_fmt_rgb[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_RGB32,
> + .name = "RGB888",
> + .bytes_per_pixel = 4,
> + }, {
> + .fourcc = V4L2_PIX_FMT_RGB24,
> + .name = "RGB24",
> + 

[PATCH 5/5] [media] imx-ipu: Add i.MX IPUv3 scaler driver

[Kamil Debski]

From: linux-media-ow...@vger.kernel.org [mailto:linux-media-
owner at vger.kernel.org] On Behalf Of Philipp Zabel
Sent: Tuesday, March 17, 2015 4:48 PM
> 
> From: Sascha Hauer 
> 
> This patch adds support for hardware accelerated scaling and color
> space conversion between memory buffers using the IPUv3 IC.
> Since the maximum output size of the IC unit is 1024x1024 pixels,
> multiple IC tasks with overlapping tiles are used internally to scale
> and convert larger frames.
> 
> The IC operates with a burst size of at least 8 pixels. Depending on
> the frame width and scaling factor, up to 7 junk pixels may be written
> after the end of the frame. The sizeimage is increased accordingly.
> 
> Signed-off-by: Sascha Hauer 
> Signed-off-by: Michael Olbrich 
> Signed-off-by: Philipp Zabel 

Acked-by: Kamil Debski 

> ---
>  drivers/gpu/ipu-v3/ipu-ic.c |  28 +-
>  drivers/media/platform/imx/Kconfig  |   9 +
>  drivers/media/platform/imx/Makefile |   1 +
>  drivers/media/platform/imx/imx-ipu-scaler.c | 869
> 
>  drivers/media/platform/imx/imx-ipu.c|   2 +-
>  drivers/media/platform/imx/imx-ipu.h|   1 +
>  6 files changed, 882 insertions(+), 28 deletions(-)  create mode
> 100644 drivers/media/platform/imx/imx-ipu-scaler.c
> 
> diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
> index 39ee388..984f68f 100644
> --- a/drivers/gpu/ipu-v3/ipu-ic.c
> +++ b/drivers/gpu/ipu-v3/ipu-ic.c
> @@ -701,7 +701,6 @@ static struct image_convert_ctx
> *ipu_image_convert_next(struct ipu_ic *ic)  {
>   struct ipu_ic_priv *priv = ic->priv;
>   struct ipuv3_channel *ch_in = ic->input_channel;
> - struct ipuv3_channel *ch_in_p, *ch_in_n;
>   struct ipuv3_channel *ch_out = ic->output_channel;
>   struct image_convert_ctx *ctx;
>   struct ipu_image *in_p, *in, *in_n;
> @@ -748,32 +747,7 @@ static struct image_convert_ctx
> *ipu_image_convert_next(struct ipu_ic *ic)
>   ipu_cpmem_set_burstsize(ch_in, inburst);
>   ipu_cpmem_set_burstsize(ch_out, outburst);
> 
> - if (ctx->deinterlace) {
> - ch_in_p = ic->input_channel_p;
> - ch_in_n = ic->input_channel_n;
> -
> - ipu_cpmem_zero(ch_in_p);
> - ipu_cpmem_zero(ch_in_n);
> -
> - ipu_ic_task_idma_init(ic, ic->input_channel_p,
> -   in_p->rect.width, in_p->rect.height,
> -   inburst, IPU_ROTATE_NONE);
> - ipu_ic_task_idma_init(ic, ic->input_channel_n,
> -   in_n->rect.width, in_n->rect.height,
> -   inburst, IPU_ROTATE_NONE);
> -
> - ipu_cpmem_set_image(ch_in_p, >in_p);
> - ipu_cpmem_set_image(ch_in_n, >in_n);
> -
> - ipu_cpmem_set_burstsize(ch_in_p, inburst);
> - ipu_cpmem_set_burstsize(ch_in_n, inburst);
> - }
> -
> -
> - if (ctx->deinterlace)
> - in_height = in->rect.height * 2;
> - else
> - in_height = in->rect.height;
> + in_height = in->rect.height;
> 
>   dev_dbg(priv->ipu->dev, "%s: %dx%d(%dx%d@%d,%d) -
> > %dx%d(%dx%d@%d,%d)\n",
>   __func__, in->pix.width, in->pix.height, diff --git
> a/drivers/media/platform/imx/Kconfig
> b/drivers/media/platform/imx/Kconfig
> index a90c973..4694367 100644
> --- a/drivers/media/platform/imx/Kconfig
> +++ b/drivers/media/platform/imx/Kconfig
> @@ -1,2 +1,11 @@
>  config VIDEO_IMX_IPU_COMMON
>   tristate
> +
> +config VIDEO_IMX_IPU_SCALER
> + tristate "i.MX5/6 IPUv3 based image scaler driver"
> + depends on VIDEO_DEV && IMX_IPUV3_CORE
> + select VIDEOBUF2_DMA_CONTIG
> + select VIDEO_IMX_IPU_COMMON
> + select V4L2_MEM2MEM_DEV
> + ---help---
> +   This is a v4l2 scaler video driver for the IPUv3 on i.MX5/6.
> diff --git a/drivers/media/platform/imx/Makefile
> b/drivers/media/platform/imx/Makefile
> index 5de119c..f20aa0b 100644
> --- a/drivers/media/platform/imx/Makefile
> +++ b/drivers/media/platform/imx/Makefile
> @@ -1 +1,2 @@
>  obj-$(CONFIG_VIDEO_IMX_IPU_COMMON)   += imx-ipu.o
> +obj-$(CONFIG_VIDEO_IMX_IPU_SCALER)   += imx-ipu-scaler.o
> diff --git a/drivers/media/platform/imx/imx-ipu-scaler.c
> b/drivers/media/platform/imx/imx-ipu-scaler.c
> new file mode 100644
> index 000..9cf8a70
> --- /dev/null
> +++ b/drivers/media/platform/imx/imx-ipu-scaler.c
> @@ -0,0 +1,869 @@
> +/*
> + * i.MX IPUv3 scaler driver
> + *
> + * Copyright (C) 2011 Sascha Hauer, Pengutronix
> + *
> + * based on the mem2mem test driver
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even 

[Bug 89944] GPU crash in Civilization 5

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=89944

--- Comment #7 from Sami Liedes  ---
Created attachment 115008
  --> https://bugs.freedesktop.org/attachment.cgi?id=115008=edit
R600_DEBUG=ps,vs,gs output from first bad commit (R600_DEBUG=ps,vs,gs output
from last good commit (R600_DEBUG=ps,vs,gs output from last good commit
(30f51f1a)

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[Bug 89944] GPU crash in Civilization 5

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=89944

Sami Liedes  changed:

   What|Removed |Added

 CC||sami.liedes at iki.fi

--- Comment #6 from Sami Liedes  ---
Created attachment 115007
  --> https://bugs.freedesktop.org/attachment.cgi?id=115007=edit
R600_DEBUG=ps,vs,gs output from last good commit (8eb6c109)

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[Bug 80050] [855GM] Incorrect drop shadow color under windows in Cinnamon persists with MESA 10.1.

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=80050

Ville Syrjala  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #1 from Ville Syrjala  ---
Presuming the shadows are fixed by:

commit 40a08e0d6a57cc79ee72a62aeedec20cae774ed5
Author: Ville Syrjälä 
Date:   Thu Aug 7 11:14:35 2014 +0300

i915: Use L8A8 instead of I8 to simulate A8 on gen2

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[Bug 38873] [855gm] gnome-shell misrendered

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=38873

Ville Syrjala  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #3 from Ville Syrjala  ---
Presuming the shadows are fixed by:

commit 40a08e0d6a57cc79ee72a62aeedec20cae774ed5
Author: Ville Syrjälä 
Date:   Thu Aug 7 11:14:35 2014 +0300

i915: Use L8A8 instead of I8 to simulate A8 on gen2

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[PATCH v5 01/12] drm/exynos: add Exynos5433 decon driver

[Hyungwon Hwang]

Dear Varka Bhadram,

On Fri, 10 Apr 2015 11:35:02 +0530
Varka Bhadram  wrote:

> On 04/10/2015 11:25 AM, Hyungwon Hwang wrote:
> 
> > From: Joonyoung Shim 
> >
> > DECON(Display and Enhancement Controller) is new IP replacing FIMD
> > in Exynos5433. This patch adds Exynos5433 decon driver.
> >
> > Signed-off-by: Joonyoung Shim 
> > Signed-off-by: Hyungwon Hwang 
> > ---
> > Changes for v2:
> > - change file names and variable names of decon to represnt
> > exynos5433 instead of exynos to distinguish them from exynos7 decon
> >
> > Changes for v3:
> > - fail fast when the proper image format is not set
> > - remove unnecessary checking code
> > - add and modify the function to make DPMS work well
> >
> > Changes for v4:
> > - rebased to exynos-drm-next with the clean-up patchset by Gustavo
> > Padovan.
> >
> > Changes for v5:
> > - None
> >  .../devicetree/bindings/video/exynos5433-decon.txt |  65 +++
> >  drivers/gpu/drm/exynos/Kconfig |   6 +
> >  drivers/gpu/drm/exynos/Makefile|   1 +
> >  drivers/gpu/drm/exynos/exynos5433_drm_decon.c  | 617
> > +
> > drivers/gpu/drm/exynos/exynos_drm_drv.c|   3 +
> > drivers/gpu/drm/exynos/exynos_drm_drv.h|   1 +
> > include/video/exynos5433_decon.h   | 163 ++ 7
> > files changed, 856 insertions(+) create mode 100644
> > Documentation/devicetree/bindings/video/exynos5433-decon.txt create
> > mode 100644 drivers/gpu/drm/exynos/exynos5433_drm_decon.c create
> > mode 100644 include/video/exynos5433_decon.h
> >
> (...)
> 
> > +   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +   if (!res) {
> > +   dev_err(dev, "cannot find IO resource\n");
> > +   return -ENXIO;
> > +   }
> > +
> 
> Remove the above check. Check one *res* will be done by
> *devm_ioremap_resource()*

OK.

> 
> > +   ctx->addr = devm_ioremap_resource(dev, res);
> > +   if (IS_ERR(ctx->addr)) {
> > +   dev_err(dev, "ioremap failed\n");
> > +   return PTR_ERR(ctx->addr);
> > +   }
> > +
> > +   res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> > +   ctx->i80_if ? "lcd_sys" : "vsync");
> > +   if (!res) {
> > +   dev_err(dev, "cannot find IRQ resource\n");
> > +   return -ENXIO;
> > +   }
> > +
> > +   ret = devm_request_irq(dev, res->start, ctx->i80_if ?
> > +   decon_lcd_sys_irq_handler :
> > decon_vsync_irq_handler, 0,
> > +   "drm_decon", ctx);
> > +   if (ret < 0) {
> > +   dev_err(dev, "lcd_sys irq request failed\n");
> > +   return ret;
> > +   }
> > +
> > +   ret = exynos_drm_component_add(dev,
> > EXYNOS_DEVICE_TYPE_CRTC,
> > +  EXYNOS_DISPLAY_TYPE_LCD);
> > +   if (ret < 0)
> > +   return ret;
> > +
> > +   platform_set_drvdata(pdev, ctx);
> > +
> > +   ret = component_add(dev, _component_ops);
> > +   if (ret < 0) {
> > +   exynos_drm_component_del(dev,
> > EXYNOS_DEVICE_TYPE_CRTC);
> > +   return ret;
> > +   }
> > +
> > +   return 0;
> > +}
> > +
> > +static int exynos5433_decon_remove(struct platform_device *pdev)
> > +{
> > +   component_del(>dev, _component_ops);
> > +   exynos_drm_component_del(>dev,
> > EXYNOS_DEVICE_TYPE_CRTC); +
> > +   return 0;
> > +}
> > +
> > +static const struct of_device_id
> > exynos5433_decon_driver_dt_match[] = {
> > +   { .compatible = "samsung,exynos5433-decon" },
> > +   {},
> > +};
> > +MODULE_DEVICE_TABLE(of, exynos5433_decon_driver_dt_match);
> > +
> > +struct platform_driver exynos5433_decon_driver = {
> > +   .probe  = exynos5433_decon_probe,
> > +   .remove = exynos5433_decon_remove,
> > +   .driver = {
> > +   .name   = "exynos5433-decon",
> > +   .owner  = THIS_MODULE,
> 
> Remove this field. It will be updated by platform core.
> 

OK.

Thanks for your review.

Best regards,
Hyungwon Hwang

> > +   .of_match_table = exynos5433_decon_driver_dt_match,
> > +   },
> > +};
> 

[PATCH v6] drm/exynos: add Exynos5433 decon driver

[Hyungwon Hwang]

From: Joonyoung Shim 

DECON(Display and Enhancement Controller) is new IP replacing FIMD in
Exynos5433. This patch adds Exynos5433 decon driver.

Signed-off-by: Joonyoung Shim 
Signed-off-by: Hyungwon Hwang 
---
Changes for v2:
- change file names and variable names of decon to represnt exynos5433 instead
of exynos to distinguish them from exynos7 decon

Changes for v3:
- fail fast when the proper image format is not set
- remove unnecessary checking code
- add and modify the function to make DPMS work well

Changes for v4:
- rebased to exynos-drm-next with the clean-up patchset by Gustavo Padovan.

Changes for v5:
- None

Changes for v6:
- None
 .../devicetree/bindings/video/exynos5433-decon.txt |  65 +++
 drivers/gpu/drm/exynos/Kconfig |   6 +
 drivers/gpu/drm/exynos/Makefile|   1 +
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c  | 611 +
 drivers/gpu/drm/exynos/exynos_drm_drv.c|   3 +
 drivers/gpu/drm/exynos/exynos_drm_drv.h|   1 +
 include/video/exynos5433_decon.h   | 163 ++
 7 files changed, 850 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/video/exynos5433-decon.txt
 create mode 100644 drivers/gpu/drm/exynos/exynos5433_drm_decon.c
 create mode 100644 include/video/exynos5433_decon.h

diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt 
b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
new file mode 100644
index 000..377afbf
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
@@ -0,0 +1,65 @@
+Device-Tree bindings for Samsung Exynos SoC display controller (DECON)
+
+DECON (Display and Enhancement Controller) is the Display Controller for the
+Exynos series of SoCs which transfers the image data from a video memory
+buffer to an external LCD interface.
+
+Required properties:
+- compatible: value should be "samsung,exynos5433-decon";
+- reg: physical base address and length of the DECON registers set.
+- interrupts: should contain a list of all DECON IP block interrupts in the
+ order: VSYNC, LCD_SYSTEM. The interrupt specifier format
+ depends on the interrupt controller used.
+- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"
+  in the same order as they were listed in the interrupts
+  property.
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+- clock-names: list of clock names sorted in the same order as the clocks
+  property. Must contain "aclk_decon", "aclk_smmu_decon0x",
+  "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",
+  "sclk_decon_eclk"
+- ports: contains a port which is connected to mic node. address-cells and
+size-cells must 1 and 0, respectively.
+- port: contains an endpoint node which is connected to the endpoint in the mic
+   node. The reg value muset be 0.
+- i80-if-timings: specify whether the panel which is connected to decon uses
+ i80 lcd interface or mipi video interface. This node contains
+ no timing information as that of fimd does. Because there is
+ no register in decon to specify i80 interface timing value,
+ it is not needed, but make it remain to use same kind of node
+ in fimd and exynos7 decon.
+
+Example:
+SoC specific DT entry:
+decon: decon at 1380 {
+   compatible = "samsung,exynos5433-decon";
+   reg = <0x1380 0x2104>;
+   clocks = <_disp CLK_ACLK_DECON>, <_disp CLK_ACLK_SMMU_DECON0X>,
+   <_disp CLK_ACLK_XIU_DECON0X>,
+   <_disp CLK_PCLK_SMMU_DECON0X>,
+   <_disp CLK_SCLK_DECON_VCLK>,
+   <_disp CLK_SCLK_DECON_ECLK>;
+   clock-names = "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x",
+   "pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk";
+   interrupt-names = "vsync", "lcd_sys";
+   interrupts = <0 202 0>, <0 203 0>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+   decon_to_mic: endpoint {
+   remote-endpoint = <_to_decon>;
+   };
+   };
+   };
+};
+
+Board specific DT entry:
+ {
+   i80-if-timings {
+   };
+};
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 0a67803..dd6ae21 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -24,6 +24,12 @@ config DRM_EXYNOS_FIMD
help
  Choose this option if you want to use Exynos FIMD for DRM.

+config DRM_EXYNOS5433_DECON
+   bool "Exynos5433 DRM DECON"
+   depends on DRM_EXYNOS
+   help
+ Choose this option if you want to use 

[Bug 89944] GPU crash in Civilization 5

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=89944

--- Comment #5 from Tom Stellard  ---
(In reply to Sami Liedes from comment #3)
> I bisected this down to this commit:
> 
> 
> commit 30f51f1a1a70bc838d5bed449daff0dd9f2e8ef2
> Author: Kenneth Graunke 
> Date:   Wed Oct 22 20:48:21 2014 -0700
> 
> glsl: Optimize "if (cond) discard;" to a conditional discard.   
> 
> 
> 
> st_glsl_to_tgsi and ir_to_mesa have handled conditional discards for a  
> 
> long time; the previous patch added that capability to i965.
> 
> 
> 
> i965 (Haswell) shader-db stats: 
> 
> 
> 
> Without NIR:
> 
> total instructions in shared programs: 5792133 -> 5776360 (-0.27%)  
> 
> instructions in affected programs: 737585 -> 721812 (-2.14%)
> 
> helped:6300 
> 
> HURT:  68   
> 
> GAINED:2
> 
> 
> 
> With NIR:   
> 
> total instructions in shared programs: 5787538 -> 5769569 (-0.31%)  
> 
> instructions in affected programs: 767843 -> 749874 (-2.34%)
> helped:6522
> HURT:  35
> GAINED:6
> 
> Signed-off-by: Kenneth Graunke 
> Reviewed-by: Connor Abbott 
> Reviewed-by: Matt Turner 
> Reviewed-by: Eric Anholt 
> 
> 
> I can also confirm that reverting that commit on top of recent HEAD
> (4deca127) fixes the issue.
> 
> I can attach R600_DEBUG=ps,gs,vs output from the offending commit and its
> parent if you think comparing them is of any use

That would be useful.

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[PATCH 2/6] drm/cache: Implement drm_clflush_*() for ARM

[Thierry Reding]

On Fri, Apr 10, 2015 at 01:03:13PM +0100, Russell King - ARM Linux wrote:
> On Thu, Apr 09, 2015 at 04:34:05PM +0200, Thierry Reding wrote:
> > From: Thierry Reding 
> > 
> > Add implementations for drm_clflush_*() on ARM by borrowing code from
> > the DMA mapping API implementation. Unfortunately ARM doesn't export an
> > API to flush caches on a page by page basis, so this replicates most of
> > the code.
> 
> I'm _really_ not happy with this, because it's poking about in ARM
> internal implementation details of the DMA API.  It's also not going
> to work too well on aliasing caches either - especially when you
> consider that the userspace mapping of a page may have no relationship
> to the address you get from kmap.
> 
> For an aliasing cache, the way things work with the DMA API, we ensure
> that the kernel alias is clean whenever pages are un-kmapped, which
> means that unmapped highmem pages never have L1 cache lines associated
> with the kernel alias of them.  The user aliases are handled separately
> via the normal flush_dcache_page()/flush_anon_page() calls.
> 
> None of this exists here...
> 
> It gets even more hairly on older ARM CPUs - but I hope no one is
> expecting to support DRM's clflush there - we should make that explicit
> though, and ensure that clflush support returns an error there.
> 
> That aside, we have most of this logic already inside
> dma_cache_maint_page(), and even if it was the right thing to be doing,
> we shouldn't be duplicating this architecture specific code inside a
> driver.
> 
> So you can take that as a NAK on this.

Perhaps I should take a step back and explain what I'm trying to solve,
maybe that'll allow us to come up with a more proper solution.

Both the MSM and Tegra drivers allocate framebuffers from shmem in the
presence of an IOMMU. The problem with allocating pages from the shmem
is that pages end up not being flushed, resulting in visual artifacts
on the screen (horizontal black lines) when the cachelines from earlier
allocations of these pages get flushed. The drivers also use the IOMMU
API directly to manage the IOVA space.

Currently both drivers work around this by faking up an sg_table and
calling dma_map_sg(), which ends up doing the right thing. Unfortunately
this only works if nothing backs the DMA API and we end up getting the
regular arm_dma_ops. If an IOMMU registers with the ARM/DMA glue, we'll
end up getting a different set of dma_ops and things break (buffers are
mapped through the IOMMU twice, ...).

Still, this has worked fine on Tegra (and I assume the same is true for
MSM) so far because we don't register an IOMMU with the ARM/DMA glue.
However while porting this to 64-bit ARM I started seeing failures to
map buffers because SWIOTLB is enabled by default and gets in the way.

With regards to code duplication, I suspect we could call something like
arm_dma_ops.sync_sg_for_device() directly, but that raises the question
about which device to pass in. It isn't clear at allocation time which
device will use the buffer. It may in fact be used by multiple devices
at once.

Do you have an alternative suggestion on how to fix this?

Thierry
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[PATCH v2 0/5] i.MX5/6 mem2mem scaler

[Jean-Michel Hautbois]

Hi Philipp,

Thank you for the series !

2015-03-18 11:22 GMT+01:00 Philipp Zabel :
> Hi,
>
> this series uses the IPU IC post-processing task, to implement
> a mem2mem device for scaling and colorspace conversion. The first
> version had a fixup applied to the wrong patch.
>
> Changes since v1:
>  - Removed deinterlacer support left-overs
>
> regards
> Philipp
>
> Philipp Zabel (3):
>   gpu: ipu-v3: Add missing IDMAC channel names
>   gpu: ipu-v3: Add mem2mem image conversion support to IC
>   gpu: ipu-v3: Register scaler platform device
>
> Sascha Hauer (2):
>   [media] imx-ipu: Add ipu media common code
>   [media] imx-ipu: Add i.MX IPUv3 scaler driver
>
>  drivers/gpu/ipu-v3/ipu-common.c |   2 +
>  drivers/gpu/ipu-v3/ipu-ic.c | 787 -
>  drivers/media/platform/Kconfig  |   2 +
>  drivers/media/platform/Makefile |   1 +
>  drivers/media/platform/imx/Kconfig  |  11 +
>  drivers/media/platform/imx/Makefile |   2 +
>  drivers/media/platform/imx/imx-ipu-scaler.c | 869 
> 
>  drivers/media/platform/imx/imx-ipu.c| 313 ++
>  drivers/media/platform/imx/imx-ipu.h|  36 ++
>  include/video/imx-ipu-v3.h  |  49 +-
>  10 files changed, 2055 insertions(+), 17 deletions(-)
>  create mode 100644 drivers/media/platform/imx/Kconfig
>  create mode 100644 drivers/media/platform/imx/Makefile
>  create mode 100644 drivers/media/platform/imx/imx-ipu-scaler.c
>  create mode 100644 drivers/media/platform/imx/imx-ipu.c
>  create mode 100644 drivers/media/platform/imx/imx-ipu.h

It works here, even if v4l2-compliance seems a bit disappointed :
fail: 
/run/media/jm/SSD_JM/Projets/vodabox3/poky/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/v4l-utils/git-r0/git/utils/v4l2-compliance/v4l2-test-formats.cpp(425):
unknown pixelformat  for buftype 1
test VIDIOC_G_FMT: FAIL
test VIDIOC_TRY_FMT: OK (Not Supported)
test VIDIOC_S_FMT: OK (Not Supported)
test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
fail: 
/run/media/jm/SSD_JM/Projets/vodabox3/poky/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/v4l-utils/git-r0/git/utils/v4l2-compliance/v4l2-test-formats.cpp(1200):
doioctl(node, VIDIOC_G_SELECTION, _crop)
fail: 
/run/media/jm/SSD_JM/Projets/vodabox3/poky/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/v4l-utils/git-r0/git/utils/v4l2-compliance/v4l2-test-formats.cpp(1270):
testBasicCrop(node, V4L2_BUF_TYPE_VIDEO_CAPTURE)
test Cropping: FAIL
test Composing: OK (Not Supported)
fail: 
/run/media/jm/SSD_JM/Projets/vodabox3/poky/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/v4l-utils/git-r0/git/utils/v4l2-compliance/v4l2-test-formats.cpp(1381):
doioctl(node, VIDIOC_S_FMT, )
fail: 
/run/media/jm/SSD_JM/Projets/vodabox3/poky/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/v4l-utils/git-r0/git/utils/v4l2-compliance/v4l2-test-formats.cpp(1478):
doioctl(node, VIDIOC_S_FMT, )
test Scaling: FAIL

Codec ioctls:
test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
test VIDIOC_G_ENC_INDEX: OK (Not Supported)
test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)

Buffer ioctls:
test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
fail: 
/run/media/jm/SSD_JM/Projets/vodabox3/poky/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/v4l-utils/git-r0/git/utils/v4l2-compliance/v4l2-test-buffers.cpp(548):
q.has_expbuf(node)
test VIDIOC_EXPBUF: FAIL

Maybe should it be corrected before acceptation ?
Nothing to worry, though...

JM

[PATCH] drm/exynos: use drm_plane_force_disable

[Gustavo Padovan]

Hi Inki,

2015-04-10 Inki Dae :

> On 2015년 04월 10일 05:25, Gustavo Padovan wrote:
> > Hi Joonyoung,
> > 
> > 2015-04-09 Joonyoung Shim :
> > 
> >> Don't call directly disable callback of plane helper, we need to
> >> disconnect the plane from the fb and crtc after disable callback.
> >>
> >> Signed-off-by: Joonyoung Shim 
> >> ---
> >>  drivers/gpu/drm/exynos/exynos_drm_crtc.c| 5 +
> >>  drivers/gpu/drm/exynos/exynos_drm_encoder.c | 2 +-
> >>  2 files changed, 2 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
> >> b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
> >> index 519c569..50c830e 100644
> >> --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
> >> +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
> >> @@ -48,7 +48,6 @@ static void exynos_drm_crtc_disable(struct drm_crtc 
> >> *crtc)
> >>  {
> >>struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
> >>struct drm_plane *plane;
> >> -  int ret;
> >>  
> >>if (!exynos_crtc->enabled)
> >>return;
> >> @@ -69,9 +68,7 @@ static void exynos_drm_crtc_disable(struct drm_crtc 
> >> *crtc)
> >>if (plane->crtc != crtc)
> >>continue;
> >>  
> >> -  ret = plane->funcs->disable_plane(plane);
> >> -  if (ret)
> >> -  DRM_ERROR("Failed to disable plane %d\n", ret);
> >> +  drm_plane_force_disable(plane);
> >>}
> > 
> > Which tree did you based this code? I've removed all this code in atomic.
> > These two pieces of code makes no sense in atomic modesetting, disable would
> > be called from the drm atomic core there.
> 
> Mr. Gustavo,
> 
> Could you check if you have other codes not posted? At least, it seems
> that the codes you posted are same as above.

In fact there was one patch not post. In my head it was just a simple clean up
so I've delayed but I've looked to them again and it exactly the patch you may
need here.

Gustavo

[PATCH] drm/exynos: remove unnecessary calls to disable_plane()

[Gustavo Padovan]

From: Gustavo Padovan 

The planes are already disabled by the drm_atomic_helper_commit() code
so we don't need to disable the in these two places.

Signed-off-by: Gustavo Padovan 
---
 drivers/gpu/drm/exynos/exynos_drm_crtc.c| 11 ---
 drivers/gpu/drm/exynos/exynos_drm_encoder.c |  8 
 2 files changed, 19 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 519c569..9bf25ff 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -47,8 +47,6 @@ static void exynos_drm_crtc_enable(struct drm_crtc *crtc)
 static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
 {
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
-   struct drm_plane *plane;
-   int ret;

if (!exynos_crtc->enabled)
return;
@@ -64,15 +62,6 @@ static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
exynos_crtc->ops->dpms(exynos_crtc, DRM_MODE_DPMS_OFF);

exynos_crtc->enabled = false;
-
-   drm_for_each_legacy_plane(plane, >dev->mode_config.plane_list) {
-   if (plane->crtc != crtc)
-   continue;
-
-   ret = plane->funcs->disable_plane(plane);
-   if (ret)
-   DRM_ERROR("Failed to disable plane %d\n", ret);
-   }
 }

 static bool
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c 
b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
index 0648ba4..7b89fd5 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
@@ -81,17 +81,9 @@ static void exynos_drm_encoder_disable(struct drm_encoder 
*encoder)
 {
struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder);
struct exynos_drm_display *display = exynos_encoder->display;
-   struct drm_plane *plane;
-   struct drm_device *dev = encoder->dev;

if (display->ops->dpms)
display->ops->dpms(display, DRM_MODE_DPMS_OFF);
-
-   /* all planes connected to this encoder should be also disabled. */
-   drm_for_each_legacy_plane(plane, >mode_config.plane_list) {
-   if (plane->crtc && (plane->crtc == encoder->crtc))
-   plane->funcs->disable_plane(plane);
-   }
 }

 static struct drm_encoder_helper_funcs exynos_encoder_helper_funcs = {
-- 
2.1.0

[PATCH v5 12/12] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

[Hyungwon Hwang]

The clock which was named as 'pll_clk' is actually not the clock source
of PLL in MIPI DSI. This patch fixes this disagreement.

Signed-off-by: Hyungwon Hwang 
---
Changes for v5:
- Newly added
 arch/arm/boot/dts/exynos4.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 77ea547..ad23675 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -164,7 +164,7 @@
phys = <_phy 1>;
phy-names = "dsim";
clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>;
-   clock-names = "bus_clk", "pll_clk";
+   clock-names = "bus_clk", "sclk_mipi";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
--
1.9.1

[PATCH v5 11/12] drm/exynos: dsi: do not set TE GPIO direction by input

[Hyungwon Hwang]

On some board, TE GPIO should be configured properly thoughout pinctrl driver
as an wakeup interrupt. So this gpio should be configurable in the board's DT,
not being requested as a input pin.

Signed-off-by: Hyungwon Hwang 
---
Changes for v2:
- None

Changes for v3:
- None

Changes for v4:
- None

Changes for v5:
- None
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index d5a3baf..5aee4b1 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -1321,15 +1321,15 @@ static int exynos_dsi_register_te_irq(struct exynos_dsi 
*dsi)
goto out;
}

-   ret = gpio_request_one(dsi->te_gpio, GPIOF_IN, "te_gpio");
+   ret = gpio_request(dsi->te_gpio, "te_gpio");
if (ret) {
dev_err(dsi->dev, "gpio request failed with %d\n", ret);
goto out;
}

te_gpio_irq = gpio_to_irq(dsi->te_gpio);
-
irq_set_status_flags(te_gpio_irq, IRQ_NOAUTOEN);
+
ret = request_threaded_irq(te_gpio_irq, exynos_dsi_te_irq_handler, NULL,
IRQF_TRIGGER_RISING, "TE", dsi);
if (ret) {
--
1.9.1

[PATCH v5 10/12] drm/exynos: dsi: add support for MIC driver as a bridge

[Hyungwon Hwang]

MIC must be initilized by MIPI DSI when it is being bound.

Signed-off-by: Hyungwon Hwang 
---
Changes for v2:
- None

Changes for v3:
- None

Changes for v4:
- None

Changes for v5:
- None
 .../devicetree/bindings/video/exynos_dsim.txt  | 23 ++---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c| 24 ++
 2 files changed, 44 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt 
b/Documentation/devicetree/bindings/video/exynos_dsim.txt
index 11ccac9..0be0362 100644
--- a/Documentation/devicetree/bindings/video/exynos_dsim.txt
+++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt
@@ -32,10 +32,19 @@ Video interfaces:
   Device node can contain video interface port nodes according to [2].
   The following are properties specific to those nodes:

-  port node:
-- reg: (required) can be 0 for input RGB/I80 port or 1 for DSI port;
+  port node inbound:
+- reg: (required) must be 0.
+  port node outbound:
+- reg: (required) must be 1.

-  endpoint node of DSI port (reg = 1):
+  endpoint node connected from mic node (reg = 0):
+- remote-endpoint: specifies the endpoint in mic node. This node is 
required
+  for Exynos5433 mipi dsi. So mic can access to panel node
+  thoughout this dsi node.
+  endpoint node connected to panel node (reg = 1):
+- remote-endpoint: specifies the endpoint in panel node. This node is
+  required in all kinds of exynos mipi dsi to represent
+  the connection between mipi dsi and panel.
 - samsung,burst-clock-frequency: specifies DSI frequency in high-speed 
burst
   mode
 - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
@@ -74,7 +83,15 @@ Example:
#address-cells = <1>;
#size-cells = <0>;

+   port at 0 {
+   reg = <0>;
+   decon_to_mic: endpoint {
+   remote-endpoint = <_to_decon>;
+   };
+   };
+
port at 1 {
+   reg = <1>;
dsi_ep: endpoint {
reg = <0>;
samsung,burst-clock-frequency = 
<5>;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index ddcb77e..d5a3baf 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -286,6 +287,7 @@ struct exynos_dsi {
struct list_head transfer_list;

struct exynos_dsi_driver_data *driver_data;
+   struct device_node *bridge_node;
 };

 #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host)
@@ -1776,7 +1778,22 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi)

ret = exynos_dsi_of_read_u32(ep, "samsung,esc-clock-frequency",
 >esc_clk_rate);
+   if (ret < 0)
+   goto end;
+
+   of_node_put(ep);
+
+   ep = of_graph_get_next_endpoint(node, NULL);
+   if (!ep) {
+   ret = -ENXIO;
+   goto end;
+   }

+   dsi->bridge_node = of_graph_get_remote_port_parent(ep);
+   if (!dsi->bridge_node) {
+   ret = -ENXIO;
+   goto end;
+   }
 end:
of_node_put(ep);

@@ -1789,6 +1806,7 @@ static int exynos_dsi_bind(struct device *dev, struct 
device *master,
struct exynos_drm_display *display = dev_get_drvdata(dev);
struct exynos_dsi *dsi = display_to_dsi(display);
struct drm_device *drm_dev = data;
+   struct drm_bridge *bridge;
int ret;

ret = exynos_drm_create_enc_conn(drm_dev, display);
@@ -1798,6 +1816,12 @@ static int exynos_dsi_bind(struct device *dev, struct 
device *master,
return ret;
}

+   bridge = of_drm_find_bridge(dsi->bridge_node);
+   if (bridge) {
+   display->encoder->bridge = bridge;
+   drm_bridge_attach(drm_dev, bridge);
+   }
+
return mipi_dsi_host_register(>dsi_host);
 }

--
1.9.1

[PATCH v5 09/12] drm/exynos: dsi: add the backward compatibility for the renamed clock

[Hyungwon Hwang]

>From the commit a45abd04a46048a4956408543cdbdd8bdedd3215
("drm/exynos: dsi: rename pll_clk to sclk_clk'), the compiled dtb
which contains 'pll_clk' becomes not compatible with the current DSI
driver. This patch adds the backward compatibility for this issue.

Signed-off-by: Hyungwon Hwang 
---
Changes for v5:
- Newly added
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 5f03680..ddcb77e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -211,6 +211,8 @@
REG_ADDR((dsi), (reg_idx)))
 #define DSI_READ(dsi, reg_idx) readl(REG_ADDR((dsi), (reg_idx)))

+#define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
+
 static char *clk_names[5] = { "bus_clk", "sclk_mipi",
"phyclk_mipidphy0_bitclkdiv8", "phyclk_mipidphy0_rxclkesc0",
"sclk_rgb_vclk_to_dsim0" };
@@ -1866,6 +1868,12 @@ static int exynos_dsi_probe(struct platform_device *pdev)
for (i = 0; i < dsi->driver_data->num_clks; i++) {
dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
if (IS_ERR(dsi->clks[i])) {
+   if (strcmp(clk_names[i], "sclk_mipi") == 0) {
+   strcpy(clk_names[i], OLD_SCLK_MIPI_CLK_NAME);
+   i--;
+   continue;
+   }
+
dev_info(dev, "failed to get the clock: %s\n",
clk_names[i]);
ret = PTR_ERR(dsi->clks[i]);
--
1.9.1

[PATCH v5 08/12] drm/exynos: dsi: add support for Exynos5433

[Hyungwon Hwang]

This patch adds support for Exynos5433 mipi dsi.

Signed-off-by: Hyungwon Hwang 
---
Changes for v2:
- change the author of "drm/exynos: dsi: add support for Exynos5433 SoC" to
Hyungwon Hwang by the previous author's will

Changes for v3:
- Separated from the patch "drm/exynos: dsi: add support for Exynos5433 SoC"
in version 2.
- use defines for more readable code
- fix typos

Changes for v4:
- None

Changes for v5:
- None
 .../devicetree/bindings/video/exynos_dsim.txt  |  1 +
 drivers/gpu/drm/exynos/Kconfig |  2 +-
 drivers/gpu/drm/exynos/exynos_drm_dsi.c| 69 +-
 3 files changed, 68 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt 
b/Documentation/devicetree/bindings/video/exynos_dsim.txt
index 44659dd..11ccac9 100644
--- a/Documentation/devicetree/bindings/video/exynos_dsim.txt
+++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt
@@ -6,6 +6,7 @@ Required properties:
"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
"samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */
"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs 
*/
+   "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
   - reg: physical base address and length of the registers set for the device
   - interrupts: should contain DSI interrupt
   - clocks: list of clock specifiers, must contain an entry for each required
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 3f649ab..4e4182b 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -47,7 +47,7 @@ config DRM_EXYNOS_DPI

 config DRM_EXYNOS_DSI
bool "EXYNOS DRM MIPI-DSI driver support"
-   depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)
+   depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS5433_DECON || 
DRM_EXYNOS7_DECON)
select DRM_MIPI_DSI
select DRM_PANEL
default n
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index b78d5f5..5f03680 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -131,6 +131,7 @@
 #define DSIM_INT_PLL_STABLE(1 << 31)
 #define DSIM_INT_SW_RST_RELEASE(1 << 30)
 #define DSIM_INT_SFR_FIFO_EMPTY(1 << 29)
+#define DSIM_INT_SFR_HDR_FIFO_EMPTY(1 << 28)
 #define DSIM_INT_BTA   (1 << 25)
 #define DSIM_INT_FRAME_DONE(1 << 24)
 #define DSIM_INT_RX_TIMEOUT(1 << 21)
@@ -179,6 +180,8 @@

 /* DSIM_PHYCTRL */
 #define DSIM_PHYCTRL_ULPS_EXIT(x)  (((x) & 0x1ff) << 0)
+#define DSIM_PHYCTRL_B_DPHYCTL_VREG_LP (1 << 30)
+#define DSIM_PHYCTRL_B_DPHYCTL_SLEW_UP (1 << 14)

 /* DSIM_PHYTIMING */
 #define DSIM_PHYTIMING_LPX(x)  ((x) << 8)
@@ -208,7 +211,9 @@
REG_ADDR((dsi), (reg_idx)))
 #define DSI_READ(dsi, reg_idx) readl(REG_ADDR((dsi), (reg_idx)))

-static char *clk_names[2] = { "bus_clk", "sclk_mipi" };
+static char *clk_names[5] = { "bus_clk", "sclk_mipi",
+   "phyclk_mipidphy0_bitclkdiv8", "phyclk_mipidphy0_rxclkesc0",
+   "sclk_rgb_vclk_to_dsim0" };

 enum exynos_dsi_transfer_type {
EXYNOS_DSI_TX,
@@ -337,6 +342,30 @@ static unsigned int exynos_reg_ofs[] = {
[DSIM_PHYTIMING2_REG] =  0x6c,
 };

+static unsigned int exynos5433_reg_ofs[] = {
+   [DSIM_STATUS_REG] = 0x04,
+   [DSIM_SWRST_REG] = 0x0C,
+   [DSIM_CLKCTRL_REG] = 0x10,
+   [DSIM_TIMEOUT_REG] = 0x14,
+   [DSIM_CONFIG_REG] = 0x18,
+   [DSIM_ESCMODE_REG] = 0x1C,
+   [DSIM_MDRESOL_REG] = 0x20,
+   [DSIM_MVPORCH_REG] = 0x24,
+   [DSIM_MHPORCH_REG] = 0x28,
+   [DSIM_MSYNC_REG] = 0x2C,
+   [DSIM_INTSRC_REG] = 0x34,
+   [DSIM_INTMSK_REG] = 0x38,
+   [DSIM_PKTHDR_REG] = 0x3C,
+   [DSIM_PAYLOAD_REG] = 0x40,
+   [DSIM_RXFIFO_REG] = 0x44,
+   [DSIM_FIFOCTRL_REG] = 0x4C,
+   [DSIM_PLLCTRL_REG] = 0x94,
+   [DSIM_PHYCTRL_REG] = 0xA4,
+   [DSIM_PHYTIMING_REG] = 0xB4,
+   [DSIM_PHYTIMING1_REG] = 0xB8,
+   [DSIM_PHYTIMING2_REG] = 0xBC,
+};
+
 enum reg_value_idx {
RESET_TYPE,
PLL_TIMER,
@@ -373,6 +402,24 @@ static unsigned int reg_values[] = {
[PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0b),
 };

+static unsigned int exynos5433_reg_values[] = {
+   [RESET_TYPE] = DSIM_FUNCRST,
+   [PLL_TIMER] = 22200,
+   [STOP_STATE_CNT] = 0xa,
+   [PHYCTRL_ULPS_EXIT] = DSIM_PHYCTRL_ULPS_EXIT(0x190),
+   [PHYCTRL_VREG_LP] = DSIM_PHYCTRL_B_DPHYCTL_VREG_LP,
+   [PHYCTRL_SLEW_UP] = DSIM_PHYCTRL_B_DPHYCTL_SLEW_UP,
+   [PHYTIMING_LPX] = DSIM_PHYTIMING_LPX(0x07),
+   [PHYTIMING_HS_EXIT] = DSIM_PHYTIMING_HS_EXIT(0x0c),
+   [PHYTIMING_CLK_PREPARE] = DSIM_PHYTIMING1_CLK_PREPARE(0x09),
+   [PHYTIMING_CLK_ZERO] = DSIM_PHYTIMING1_CLK_ZERO(0x2d),
+   

[PATCH v5 07/12] drm/exynos: dsi: make use of array for clock access

[Hyungwon Hwang]

This patch make the driver to use an array for clock access. The number
of clocks are different from the existing MIPI DSI driver and Exynos5433
MIPI DSI driver. So this patch is needed before adding support for
Exynos5433 MIPI DSI driver.

Signed-off-by: Hyungwon Hwang 
---
Changes for v5:
- Newly added
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 64 +++--
 1 file changed, 29 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 83e6798..b78d5f5 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -208,6 +208,8 @@
REG_ADDR((dsi), (reg_idx)))
 #define DSI_READ(dsi, reg_idx) readl(REG_ADDR((dsi), (reg_idx)))

+static char *clk_names[2] = { "bus_clk", "sclk_mipi" };
+
 enum exynos_dsi_transfer_type {
EXYNOS_DSI_TX,
EXYNOS_DSI_RX,
@@ -256,8 +258,7 @@ struct exynos_dsi {

void __iomem *reg_base;
struct phy *phy;
-   struct clk *sclk_clk;
-   struct clk *bus_clk;
+   struct clk **clks;
struct regulator_bulk_data supplies[2];
int irq;
int te_gpio;
@@ -1383,7 +1384,8 @@ static const struct mipi_dsi_host_ops exynos_dsi_ops = {

 static int exynos_dsi_poweron(struct exynos_dsi *dsi)
 {
-   int ret;
+   struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
+   int ret, i;

ret = regulator_bulk_enable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
if (ret < 0) {
@@ -1391,31 +1393,23 @@ static int exynos_dsi_poweron(struct exynos_dsi *dsi)
return ret;
}

-   ret = clk_prepare_enable(dsi->bus_clk);
-   if (ret < 0) {
-   dev_err(dsi->dev, "cannot enable bus clock %d\n", ret);
-   goto err_bus_clk;
-   }
-
-   ret = clk_prepare_enable(dsi->sclk_clk);
-   if (ret < 0) {
-   dev_err(dsi->dev, "cannot enable pll clock %d\n", ret);
-   goto err_sclk_clk;
+   for (i = 0; i < driver_data->num_clks; i++) {
+   ret = clk_prepare_enable(dsi->clks[i]);
+   if (ret < 0)
+   goto err_clk;
}

ret = phy_power_on(dsi->phy);
if (ret < 0) {
dev_err(dsi->dev, "cannot enable phy %d\n", ret);
-   goto err_phy;
+   goto err_clk;
}

return 0;

-err_phy:
-   clk_disable_unprepare(dsi->sclk_clk);
-err_sclk_clk:
-   clk_disable_unprepare(dsi->bus_clk);
-err_bus_clk:
+err_clk:
+   while (--i > -1)
+   clk_disable_unprepare(dsi->clks[i]);
regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);

return ret;
@@ -1423,7 +1417,8 @@ err_bus_clk:

 static void exynos_dsi_poweroff(struct exynos_dsi *dsi)
 {
-   int ret;
+   struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
+   int ret, i;

usleep_range(1, 2);

@@ -1439,8 +1434,8 @@ static void exynos_dsi_poweroff(struct exynos_dsi *dsi)

phy_power_off(dsi->phy);

-   clk_disable_unprepare(dsi->sclk_clk);
-   clk_disable_unprepare(dsi->bus_clk);
+   for (i = driver_data->num_clks - 1; i > -1; i--)
+   clk_disable_unprepare(dsi->clks[i]);

ret = regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
if (ret < 0)
@@ -1762,7 +1757,7 @@ static int exynos_dsi_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct resource *res;
struct exynos_dsi *dsi;
-   int ret;
+   int ret, i;

dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
if (!dsi)
@@ -1802,18 +1797,17 @@ static int exynos_dsi_probe(struct platform_device 
*pdev)
return -EPROBE_DEFER;
}

-   dsi->sclk_clk = devm_clk_get(dev, "sclk_mipi");
-   if (IS_ERR(dsi->sclk_clk)) {
-   dev_info(dev, "failed to get dsi sclk clock\n");
-   ret = PTR_ERR(dsi->sclk_clk);
-   goto err_del_component;
-   }
-
-   dsi->bus_clk = devm_clk_get(dev, "bus_clk");
-   if (IS_ERR(dsi->bus_clk)) {
-   dev_info(dev, "failed to get dsi bus clock\n");
-   ret = PTR_ERR(dsi->bus_clk);
-   goto err_del_component;
+   dsi->clks = devm_kzalloc(dev,
+   sizeof(*dsi->clks) * dsi->driver_data->num_clks,
+   GFP_KERNEL);
+   for (i = 0; i < dsi->driver_data->num_clks; i++) {
+   dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
+   if (IS_ERR(dsi->clks[i])) {
+   dev_info(dev, "failed to get the clock: %s\n",
+   clk_names[i]);
+   ret = PTR_ERR(dsi->clks[i]);
+   goto err_del_component;
+   }
}

res = platform_get_resource(pdev, 

[PATCH v5 06/12] drm/exynos: dsi: make use of driver data for static values

[Hyungwon Hwang]

Exynos MIPI DSI driver uses some static values such as address offsets,
register setting values, and etc. This patch makes the driver get those
values from the driver data.

Signed-off-by: Hyungwon Hwang 
---
Changes for v5:
- Newly added
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 196 +++-
 1 file changed, 145 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 1074dce..83e6798 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -33,38 +33,6 @@
 /* returns true iff both arguments logically differs */
 #define NEQV(a, b) (!(a) ^ !(b))

-#define DSIM_STATUS_REG0x0 /* Status register */
-#define DSIM_SWRST_REG 0x4 /* Software reset register */
-#define DSIM_CLKCTRL_REG   0x8 /* Clock control register */
-#define DSIM_TIMEOUT_REG   0xc /* Time out register */
-#define DSIM_CONFIG_REG0x10/* Configuration register */
-#define DSIM_ESCMODE_REG   0x14/* Escape mode register */
-
-/* Main display image resolution register */
-#define DSIM_MDRESOL_REG   0x18
-#define DSIM_MVPORCH_REG   0x1c/* Main display Vporch register */
-#define DSIM_MHPORCH_REG   0x20/* Main display Hporch register */
-#define DSIM_MSYNC_REG 0x24/* Main display sync area register */
-
-/* Sub display image resolution register */
-#define DSIM_SDRESOL_REG   0x28
-#define DSIM_INTSRC_REG0x2c/* Interrupt source register */
-#define DSIM_INTMSK_REG0x30/* Interrupt mask register */
-#define DSIM_PKTHDR_REG0x34/* Packet Header FIFO register 
*/
-#define DSIM_PAYLOAD_REG   0x38/* Payload FIFO register */
-#define DSIM_RXFIFO_REG0x3c/* Read FIFO register */
-#define DSIM_FIFOTHLD_REG  0x40/* FIFO threshold level register */
-#define DSIM_FIFOCTRL_REG  0x44/* FIFO status and control register */
-
-/* FIFO memory AC characteristic register */
-#define DSIM_PLLCTRL_REG   0x4c/* PLL control register */
-#define DSIM_PHYACCHR_REG  0x54/* D-PHY AC characteristic register */
-#define DSIM_PHYACCHR1_REG 0x58/* D-PHY AC characteristic register1 */
-#define DSIM_PHYCTRL_REG   0x5c
-#define DSIM_PHYTIMING_REG 0x64
-#define DSIM_PHYTIMING1_REG0x68
-#define DSIM_PHYTIMING2_REG0x6c
-
 /* DSIM_STATUS */
 #define DSIM_STOP_STATE_DAT(x) (((x) & 0xf) << 0)
 #define DSIM_STOP_STATE_CLK(1 << 8)
@@ -128,8 +96,8 @@

 /* DSIM_MDRESOL */
 #define DSIM_MAIN_STAND_BY (1 << 31)
-#define DSIM_MAIN_VRESOL(x)(((x) & 0x7ff) << 16)
-#define DSIM_MAIN_HRESOL(x)(((x) & 0X7ff) << 0)
+#define DSIM_MAIN_VRESOL(x, num_bits)  (((x) & ((1 << (num_bits)) - 1)) << 16)
+#define DSIM_MAIN_HRESOL(x, num_bits)  (((x) & ((1 << (num_bits)) - 1)) << 0)

 /* DSIM_MVPORCH */
 #define DSIM_CMD_ALLOW(x)  ((x) << 28)
@@ -234,8 +202,11 @@
 #define DSI_XFER_TIMEOUT_MS100
 #define DSI_RX_FIFO_EMPTY  0x3082

-#define DSI_WRITE(dsi, reg, val)   writel((val), (dsi)->reg_base + (reg))
-#define DSI_READ(dsi, reg) readl((dsi)->reg_base + (reg))
+#define REG_ADDR(dsi, reg_idx) ((dsi)->reg_base + \
+   dsi->driver_data->reg_ofs[(reg_idx)])
+#define DSI_WRITE(dsi, reg_idx, val)   writel((val), \
+   REG_ADDR((dsi), (reg_idx)))
+#define DSI_READ(dsi, reg_idx) readl(REG_ADDR((dsi), (reg_idx)))

 enum exynos_dsi_transfer_type {
EXYNOS_DSI_TX,
@@ -264,10 +235,15 @@ struct exynos_dsi_transfer {
 #define DSIM_STATE_CMD_LPM BIT(2)

 struct exynos_dsi_driver_data {
+   unsigned int *reg_ofs;
unsigned int plltmr_reg;
-
unsigned int has_freqband:1;
unsigned int has_clklane_stop:1;
+   unsigned int num_clks;
+   unsigned int max_freq;
+   unsigned int wait_for_reset;
+   unsigned int num_bits_resol;
+   unsigned int *reg_values;
 };

 struct exynos_dsi {
@@ -312,25 +288,133 @@ static inline struct exynos_dsi *display_to_dsi(struct 
exynos_drm_display *d)
return container_of(d, struct exynos_dsi, display);
 }

+enum reg_idx {
+   DSIM_STATUS_REG,/* Status register */
+   DSIM_SWRST_REG, /* Software reset register */
+   DSIM_CLKCTRL_REG,   /* Clock control register */
+   DSIM_TIMEOUT_REG,   /* Time out register */
+   DSIM_CONFIG_REG,/* Configuration register */
+   DSIM_ESCMODE_REG,   /* Escape mode register */
+   DSIM_MDRESOL_REG,
+   DSIM_MVPORCH_REG,   /* Main display Vporch register */
+   DSIM_MHPORCH_REG,   /* Main display Hporch register */
+   DSIM_MSYNC_REG, /* Main display sync area register */
+   DSIM_INTSRC_REG,/* Interrupt source 

[PATCH v5 05/12] drm/exynos: dsi: add macros for register access

[Hyungwon Hwang]

This patch adds macros for register writing/reading. This is needed for
adding support Exynos5433 MIPI DSI driver, not by using if statement, but
by using driver data.

Signed-off-by: Hyungwon Hwang 
---
Changes for v5:
- Newly added
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 98 +
 1 file changed, 51 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 178be44..1074dce 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -234,6 +234,9 @@
 #define DSI_XFER_TIMEOUT_MS100
 #define DSI_RX_FIFO_EMPTY  0x3082

+#define DSI_WRITE(dsi, reg, val)   writel((val), (dsi)->reg_base + (reg))
+#define DSI_READ(dsi, reg) readl((dsi)->reg_base + (reg))
+
 enum exynos_dsi_transfer_type {
EXYNOS_DSI_TX,
EXYNOS_DSI_RX,
@@ -361,8 +364,10 @@ static void exynos_dsi_wait_for_reset(struct exynos_dsi 
*dsi)

 static void exynos_dsi_reset(struct exynos_dsi *dsi)
 {
+   struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
+
reinit_completion(>completed);
-   writel(DSIM_SWRST, dsi->reg_base + DSIM_SWRST_REG);
+   DSI_WRITE(dsi, DSIM_SWRST_REG, DSIM_SWRST);
 }

 #ifndef MHZ
@@ -372,6 +377,7 @@ static void exynos_dsi_reset(struct exynos_dsi *dsi)
 static unsigned long exynos_dsi_pll_find_pms(struct exynos_dsi *dsi,
unsigned long fin, unsigned long fout, u8 *p, u16 *m, u8 *s)
 {
+   struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
unsigned long best_freq = 0;
u32 min_delta = 0x;
u8 p_min, p_max;
@@ -462,7 +468,7 @@ static unsigned long exynos_dsi_set_pll(struct exynos_dsi 
*dsi,
reg |= DSIM_FREQ_BAND(band);
}

-   writel(reg, dsi->reg_base + DSIM_PLLCTRL_REG);
+   DSI_WRITE(dsi, DSIM_PLLCTRL_REG, reg);

timeout = 1000;
do {
@@ -470,7 +476,7 @@ static unsigned long exynos_dsi_set_pll(struct exynos_dsi 
*dsi,
dev_err(dsi->dev, "PLL failed to stabilize\n");
return 0;
}
-   reg = readl(dsi->reg_base + DSIM_STATUS_REG);
+   reg = DSI_READ(dsi, DSIM_STATUS_REG);
} while ((reg & DSIM_PLL_STABLE) == 0);

return fout;
@@ -500,7 +506,7 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi)
dev_dbg(dsi->dev, "hs_clk = %lu, byte_clk = %lu, esc_clk = %lu\n",
hs_clk, byte_clk, esc_clk);

-   reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG);
+   reg = DSI_READ(dsi, DSIM_CLKCTRL_REG);
reg &= ~(DSIM_ESC_PRESCALER_MASK | DSIM_LANE_ESC_CLK_EN_CLK
| DSIM_LANE_ESC_CLK_EN_DATA_MASK | DSIM_PLL_BYPASS
| DSIM_BYTE_CLK_SRC_MASK);
@@ -510,7 +516,7 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi)
| DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1)
| DSIM_BYTE_CLK_SRC(0)
| DSIM_TX_REQUEST_HSCLK;
-   writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG);
+   DSI_WRITE(dsi, DSIM_CLKCTRL_REG, reg);

return 0;
 }
@@ -525,7 +531,7 @@ static void exynos_dsi_set_phy_ctrl(struct exynos_dsi *dsi)

/* B D-PHY: D-PHY Master & Slave Analog Block control */
reg = DSIM_PHYCTRL_ULPS_EXIT(0x0af);
-   writel(reg, dsi->reg_base + DSIM_PHYCTRL_REG);
+   DSI_WRITE(dsi, DSIM_PHYCTRL_REG, reg);

/*
 * T LPX: Transmitted length of any Low-Power state period
@@ -533,7 +539,7 @@ static void exynos_dsi_set_phy_ctrl(struct exynos_dsi *dsi)
 *  burst
 */
reg = DSIM_PHYTIMING_LPX(0x06) | DSIM_PHYTIMING_HS_EXIT(0x0b);
-   writel(reg, dsi->reg_base + DSIM_PHYTIMING_REG);
+   DSI_WRITE(dsi, DSIM_PHYTIMING_REG, reg);

/*
 * T CLK-PREPARE: Time that the transmitter drives the Clock Lane LP-00
@@ -552,7 +558,7 @@ static void exynos_dsi_set_phy_ctrl(struct exynos_dsi *dsi)
DSIM_PHYTIMING1_CLK_ZERO(0x27) |
DSIM_PHYTIMING1_CLK_POST(0x0d) |
DSIM_PHYTIMING1_CLK_TRAIL(0x08);
-   writel(reg, dsi->reg_base + DSIM_PHYTIMING1_REG);
+   DSI_WRITE(dsi, DSIM_PHYTIMING1_REG, reg);

/*
 * T HS-PREPARE: Time that the transmitter drives the Data Lane LP-00
@@ -565,21 +571,21 @@ static void exynos_dsi_set_phy_ctrl(struct exynos_dsi 
*dsi)
 */
reg = DSIM_PHYTIMING2_HS_PREPARE(0x09) | DSIM_PHYTIMING2_HS_ZERO(0x0d) |
DSIM_PHYTIMING2_HS_TRAIL(0x0b);
-   writel(reg, dsi->reg_base + DSIM_PHYTIMING2_REG);
+   DSI_WRITE(dsi, DSIM_PHYTIMING2_REG, reg);
 }

 static void exynos_dsi_disable_clock(struct exynos_dsi *dsi)
 {
u32 reg;

-   reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG);
+   reg = DSI_READ(dsi, DSIM_CLKCTRL_REG);
reg &= 

[PATCH v5 04/12] drm/exynos: dsi: rename pll_clk to sclk_clk

[Hyungwon Hwang]

This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk
is actually not the pll input clock for dsi. The pll input clock comes
from the board's oscillator directly.

Signed-off-by: Hyungwon Hwang 
---
Changes for v3:
- Newly added

Changes for v4:
- None

Changes for v5:
- None
 .../devicetree/bindings/video/exynos_dsim.txt  |  7 ++---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c| 31 --
 2 files changed, 15 insertions(+), 23 deletions(-)

diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt 
b/Documentation/devicetree/bindings/video/exynos_dsim.txt
index 802aa7e..44659dd 100644
--- a/Documentation/devicetree/bindings/video/exynos_dsim.txt
+++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt
@@ -10,13 +10,14 @@ Required properties:
   - interrupts: should contain DSI interrupt
   - clocks: list of clock specifiers, must contain an entry for each required
 entry in clock-names
-  - clock-names: should include "bus_clk"and "pll_clk" entries
+  - clock-names: should include "bus_clk"and "sclk_mipi" entries
+the use of "pll_clk" is deprecated
   - phys: list of phy specifiers, must contain an entry for each required
 entry in phy-names
   - phy-names: should include "dsim" entry
   - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
   - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
-  - samsung,pll-clock-frequency: specifies frequency of the "pll_clk" clock
+  - samsung,pll-clock-frequency: specifies frequency of the oscillator clock
   - #address-cells, #size-cells: should be set respectively to <1> and <0>
 according to DSI host bindings (see MIPI DSI bindings [1])

@@ -48,7 +49,7 @@ Example:
reg = <0x11C8 0x1>;
interrupts = <0 79 0>;
clocks = < 286>, < 143>;
-   clock-names = "bus_clk", "pll_clk";
+   clock-names = "bus_clk", "sclk_mipi";
phys = <_phy 1>;
phy-names = "dsim";
vddcore-supply = <_reg>;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 0492715..178be44 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -277,7 +277,7 @@ struct exynos_dsi {

void __iomem *reg_base;
struct phy *phy;
-   struct clk *pll_clk;
+   struct clk *sclk_clk;
struct clk *bus_clk;
struct regulator_bulk_data supplies[2];
int irq;
@@ -431,16 +431,7 @@ static unsigned long exynos_dsi_set_pll(struct exynos_dsi 
*dsi,
u16 m;
u32 reg;

-   clk_set_rate(dsi->pll_clk, dsi->pll_clk_rate);
-
-   fin = clk_get_rate(dsi->pll_clk);
-   if (!fin) {
-   dev_err(dsi->dev, "failed to get PLL clock frequency\n");
-   return 0;
-   }
-
-   dev_dbg(dsi->dev, "PLL input frequency: %lu\n", fin);
-
+   fin = dsi->pll_clk_rate;
fout = exynos_dsi_pll_find_pms(dsi, fin, freq, , , );
if (!fout) {
dev_err(dsi->dev,
@@ -1308,10 +1299,10 @@ static int exynos_dsi_poweron(struct exynos_dsi *dsi)
goto err_bus_clk;
}

-   ret = clk_prepare_enable(dsi->pll_clk);
+   ret = clk_prepare_enable(dsi->sclk_clk);
if (ret < 0) {
dev_err(dsi->dev, "cannot enable pll clock %d\n", ret);
-   goto err_pll_clk;
+   goto err_sclk_clk;
}

ret = phy_power_on(dsi->phy);
@@ -1323,8 +1314,8 @@ static int exynos_dsi_poweron(struct exynos_dsi *dsi)
return 0;

 err_phy:
-   clk_disable_unprepare(dsi->pll_clk);
-err_pll_clk:
+   clk_disable_unprepare(dsi->sclk_clk);
+err_sclk_clk:
clk_disable_unprepare(dsi->bus_clk);
 err_bus_clk:
regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
@@ -1350,7 +1341,7 @@ static void exynos_dsi_poweroff(struct exynos_dsi *dsi)

phy_power_off(dsi->phy);

-   clk_disable_unprepare(dsi->pll_clk);
+   clk_disable_unprepare(dsi->sclk_clk);
clk_disable_unprepare(dsi->bus_clk);

ret = regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
@@ -1713,10 +1704,10 @@ static int exynos_dsi_probe(struct platform_device 
*pdev)
return -EPROBE_DEFER;
}

-   dsi->pll_clk = devm_clk_get(dev, "pll_clk");
-   if (IS_ERR(dsi->pll_clk)) {
-   dev_info(dev, "failed to get dsi pll input clock\n");
-   ret = PTR_ERR(dsi->pll_clk);
+   dsi->sclk_clk = devm_clk_get(dev, "sclk_mipi");
+   if (IS_ERR(dsi->sclk_clk)) {
+   dev_info(dev, "failed to get dsi sclk clock\n");
+   ret = PTR_ERR(dsi->sclk_clk);
goto err_del_component;
}

-- 
1.9.1

[PATCH v5 03/12] drm/exynos: mic: add MIC driver

[Hyungwon Hwang]

MIC(Mobile image compressor) is newly added IP in Exynos5433. MIC
resides between decon and mipi dsim, and compresses frame data by 50%.
With dsi, not display port, to send frame data to the panel, the
bandwidth is not enough. That is why this compressor is introduced.

Signed-off-by: Hyungwon Hwang 
---
Changes for v2:
- make mic driver to be registered by exynos drm driver instead as a module
driver
- change the description of mic driver in documentation
- add module author at the top of the source file removing MODULE_OWNER,
MODULE_DESCRIPTION, MODULE_LICENSE

Changes for v3:
- move if statement out of function, so that the function is not called
unnecessarily
- Make it use syscon framework for controlling system register

Changes for v4:
- None

Changes for v5:
- None
 .../devicetree/bindings/video/exynos-mic.txt   |  51 +++
 drivers/gpu/drm/exynos/Kconfig |   6 +
 drivers/gpu/drm/exynos/Makefile|   1 +
 drivers/gpu/drm/exynos/exynos_drm_drv.c|   3 +
 drivers/gpu/drm/exynos/exynos_drm_drv.h|   1 +
 drivers/gpu/drm/exynos/exynos_drm_mic.c| 490 +
 6 files changed, 552 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/video/exynos-mic.txt
 create mode 100644 drivers/gpu/drm/exynos/exynos_drm_mic.c

diff --git a/Documentation/devicetree/bindings/video/exynos-mic.txt 
b/Documentation/devicetree/bindings/video/exynos-mic.txt
new file mode 100644
index 000..0fba2ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/exynos-mic.txt
@@ -0,0 +1,51 @@
+Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC)
+
+MIC (mobile image compressor) resides between decon and mipi dsi. Mipi dsi is
+not capable to transfer high resoltuion frame data as decon can send. MIC
+solves this problem by compressing the frame data by 1/2 before it is
+transferred through mipi dsi. The compressed frame data must be uncompressed in
+the panel PCB.
+
+Required properties:
+- compatible: value should be "samsung,exynos5433-mic".
+- reg: physical base address and length of the MIC registers set and system
+   register of mic.
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+- clock-names: list of clock names sorted in the same order as the clocks
+  property. Must contain "pclk_mic0", "sclk_rgb_vclk_to_mic0".
+- samsung,disp-syscon: the reference node for syscon for DISP block.
+- ports: contains a port which is connected to decon node and dsi node.
+address-cells and size-cells must 1 and 0, respectively.
+- port: contains an endpoint node which is connected to the endpoint in the
+   decon node or dsi node. The reg value must be 0 and 1 respectively.
+
+Example:
+SoC specific DT entry:
+mic: mic at 1393 {
+   compatible = "samsung,exynos5433-mic";
+   reg = <0x1393 0x48>;
+   clocks = <_disp CLK_PCLK_MIC0>,
+  <_disp CLK_SCLK_RGB_VCLK_TO_MIC0>;
+   clock-names = "pclk_mic0", "sclk_rgb_vclk_to_mic0";
+   samsung,disp-syscon = <_disp>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+   mic_to_decon: endpoint {
+   remote-endpoint = <_to_mic>;
+   };
+   };
+
+   port at 1 {
+   reg = <1>;
+   mic_to_dsi: endpoint {
+   remote-endpoint = <_to_mic>;
+   };
+   };
+   };
+};
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index dd6ae21..3f649ab 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -103,3 +103,9 @@ config DRM_EXYNOS_GSC
depends on DRM_EXYNOS_IPP && ARCH_EXYNOS5 && !ARCH_MULTIPLATFORM
help
  Choose this option if you want to use Exynos GSC for DRM.
+
+config DRM_EXYNOS_MIC
+   bool "Exynos DRM MIC"
+   depends on (DRM_EXYNOS && DRM_EXYNOS5433_DECON)
+   help
+ Choose this option if you want to use Exynos MIC for DRM.
diff --git a/drivers/gpu/drm/exynos/Makefile b/drivers/gpu/drm/exynos/Makefile
index fbd084d..7de0b10 100644
--- a/drivers/gpu/drm/exynos/Makefile
+++ b/drivers/gpu/drm/exynos/Makefile
@@ -22,5 +22,6 @@ exynosdrm-$(CONFIG_DRM_EXYNOS_IPP)+= exynos_drm_ipp.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_FIMC)+= exynos_drm_fimc.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_ROTATOR) += exynos_drm_rotator.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_GSC) += exynos_drm_gsc.o
+exynosdrm-$(CONFIG_DRM_EXYNOS_MIC) += exynos_drm_mic.o

 obj-$(CONFIG_DRM_EXYNOS)   += exynosdrm.o
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 78ef497..105fc1a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ 

[PATCH v5 02/12] of: add helper for getting endpoint node of specific identifiers

[Hyungwon Hwang]

When there are multiple ports or multiple endpoints in a port, they have to be
distinguished by the value of reg property. It is common. The drivers can get
the specific endpoint in the specific port via this function. Now the drivers
have to implement this code in themselves or have to force the order of dt nodes
to get the right node.

Signed-off-by: Hyungwon Hwang 
Acked-by: Rob Herring 
---
Changes for v2:
- None

Changes for v3:
- None

Changes for v4:
- None

Changes for v5:
- None
 drivers/of/base.c| 33 +
 include/linux/of_graph.h |  8 
 2 files changed, 41 insertions(+)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index 8f165b1..37bc8e0 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -2158,6 +2158,39 @@ struct device_node *of_graph_get_next_endpoint(const 
struct device_node *parent,
 EXPORT_SYMBOL(of_graph_get_next_endpoint);

 /**
+ * of_graph_get_endpoint_by_regs() - get endpoint node of specific identifiers
+ * @parent: pointer to the parent device node
+ * @port_reg: identifier (value of reg property) of the parent port node
+ * @reg: identifier (value of reg property) of the endpoint node
+ *
+ * Return: An 'endpoint' node pointer which is identified by reg and at the 
same
+ * is the child of a port node identified by port_reg. reg and port_reg are
+ * ignored when they are -1.
+ */
+struct device_node *of_graph_get_endpoint_by_regs(
+   const struct device_node *parent, int port_reg, int reg)
+{
+   struct of_endpoint endpoint;
+   struct device_node *node, *prev_node = NULL;
+
+   while (1) {
+   node = of_graph_get_next_endpoint(parent, prev_node);
+   of_node_put(prev_node);
+   if (!node)
+   break;
+
+   of_graph_parse_endpoint(node, );
+   if (((port_reg == -1) || (endpoint.port == port_reg)) &&
+   ((reg == -1) || (endpoint.id == reg)))
+   return node;
+
+   prev_node = node;
+   }
+
+   return NULL;
+}
+
+/**
  * of_graph_get_remote_port_parent() - get remote port's parent node
  * @node: pointer to a local endpoint device_node
  *
diff --git a/include/linux/of_graph.h b/include/linux/of_graph.h
index befef42..e859eb7 100644
--- a/include/linux/of_graph.h
+++ b/include/linux/of_graph.h
@@ -31,6 +31,8 @@ int of_graph_parse_endpoint(const struct device_node *node,
struct of_endpoint *endpoint);
 struct device_node *of_graph_get_next_endpoint(const struct device_node 
*parent,
struct device_node *previous);
+struct device_node *of_graph_get_endpoint_by_regs(
+   const struct device_node *parent, int port_reg, int reg);
 struct device_node *of_graph_get_remote_port_parent(
const struct device_node *node);
 struct device_node *of_graph_get_remote_port(const struct device_node *node);
@@ -49,6 +51,12 @@ static inline struct device_node *of_graph_get_next_endpoint(
return NULL;
 }

+struct device_node *of_graph_get_endpoint_by_regs(
+   const struct device_node *parent, int port_reg, int reg)
+{
+   return NULL;
+}
+
 static inline struct device_node *of_graph_get_remote_port_parent(
const struct device_node *node)
 {
-- 
1.9.1

[PATCH v5 01/12] drm/exynos: add Exynos5433 decon driver

[Hyungwon Hwang]

From: Joonyoung Shim 

DECON(Display and Enhancement Controller) is new IP replacing FIMD in
Exynos5433. This patch adds Exynos5433 decon driver.

Signed-off-by: Joonyoung Shim 
Signed-off-by: Hyungwon Hwang 
---
Changes for v2:
- change file names and variable names of decon to represnt exynos5433 instead
of exynos to distinguish them from exynos7 decon

Changes for v3:
- fail fast when the proper image format is not set
- remove unnecessary checking code
- add and modify the function to make DPMS work well

Changes for v4:
- rebased to exynos-drm-next with the clean-up patchset by Gustavo Padovan.

Changes for v5:
- None
 .../devicetree/bindings/video/exynos5433-decon.txt |  65 +++
 drivers/gpu/drm/exynos/Kconfig |   6 +
 drivers/gpu/drm/exynos/Makefile|   1 +
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c  | 617 +
 drivers/gpu/drm/exynos/exynos_drm_drv.c|   3 +
 drivers/gpu/drm/exynos/exynos_drm_drv.h|   1 +
 include/video/exynos5433_decon.h   | 163 ++
 7 files changed, 856 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/video/exynos5433-decon.txt
 create mode 100644 drivers/gpu/drm/exynos/exynos5433_drm_decon.c
 create mode 100644 include/video/exynos5433_decon.h

diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt 
b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
new file mode 100644
index 000..377afbf
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
@@ -0,0 +1,65 @@
+Device-Tree bindings for Samsung Exynos SoC display controller (DECON)
+
+DECON (Display and Enhancement Controller) is the Display Controller for the
+Exynos series of SoCs which transfers the image data from a video memory
+buffer to an external LCD interface.
+
+Required properties:
+- compatible: value should be "samsung,exynos5433-decon";
+- reg: physical base address and length of the DECON registers set.
+- interrupts: should contain a list of all DECON IP block interrupts in the
+ order: VSYNC, LCD_SYSTEM. The interrupt specifier format
+ depends on the interrupt controller used.
+- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"
+  in the same order as they were listed in the interrupts
+  property.
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+- clock-names: list of clock names sorted in the same order as the clocks
+  property. Must contain "aclk_decon", "aclk_smmu_decon0x",
+  "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",
+  "sclk_decon_eclk"
+- ports: contains a port which is connected to mic node. address-cells and
+size-cells must 1 and 0, respectively.
+- port: contains an endpoint node which is connected to the endpoint in the mic
+   node. The reg value muset be 0.
+- i80-if-timings: specify whether the panel which is connected to decon uses
+ i80 lcd interface or mipi video interface. This node contains
+ no timing information as that of fimd does. Because there is
+ no register in decon to specify i80 interface timing value,
+ it is not needed, but make it remain to use same kind of node
+ in fimd and exynos7 decon.
+
+Example:
+SoC specific DT entry:
+decon: decon at 1380 {
+   compatible = "samsung,exynos5433-decon";
+   reg = <0x1380 0x2104>;
+   clocks = <_disp CLK_ACLK_DECON>, <_disp CLK_ACLK_SMMU_DECON0X>,
+   <_disp CLK_ACLK_XIU_DECON0X>,
+   <_disp CLK_PCLK_SMMU_DECON0X>,
+   <_disp CLK_SCLK_DECON_VCLK>,
+   <_disp CLK_SCLK_DECON_ECLK>;
+   clock-names = "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x",
+   "pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk";
+   interrupt-names = "vsync", "lcd_sys";
+   interrupts = <0 202 0>, <0 203 0>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+   decon_to_mic: endpoint {
+   remote-endpoint = <_to_decon>;
+   };
+   };
+   };
+};
+
+Board specific DT entry:
+ {
+   i80-if-timings {
+   };
+};
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 0a67803..dd6ae21 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -24,6 +24,12 @@ config DRM_EXYNOS_FIMD
help
  Choose this option if you want to use Exynos FIMD for DRM.

+config DRM_EXYNOS5433_DECON
+   bool "Exynos5433 DRM DECON"
+   depends on DRM_EXYNOS
+   help
+ Choose this option if you want to use Exynos5433 DECON for DRM.
+
 

[PATCH v5 00/12] Add drivers for Exynos5433 display

[Hyungwon Hwang]

This patchset is based on the git(branch name: exynos-drm-next) which is
maintained by Inki Dae.
https://kernel.googlesource.com/pub/scm/linux/kernel/git/...

This patchset adds 2 new device drivers, decon and mic, and adds support for
Exynos5433 mipi dsi. To enable display in a Exynos5433 board, decon(display
controller), MIC(Mobile image compressor), mipi dsi, and panel have to be turned
on. This patchset contains support for 3 drivers for SoC level devices.

Changes for v2:
- change config, file, and variable names of decon to represnt exynos5433
instead of exynos to distinguish them from exynos7 decon
- change the initialization order of decon to make it initialized in order like
FIMD or exynos7 decon
- make mic driver to be registered by exynos drm driver instead as a module
driver
- change the description of mic driver in documentation
- add module author at the top of the source file removing MODULE_OWNER,
MODULE_DESCRIPTION, MODULE_LICENSE
- change the author of "drm/exynos: dsi: add support for Exynos5433 SoC" to
Hyungwon Hwang by the previous author's will

Changes for v3:
< Decon >
- fail fast when the proper image format is not set
- remove unnecessary checking code
- add and modify the function to make DPMS work well
< MIC >
- move if statement out of function, so that the function is not called
unnecessarily
- Make it use syscon framework for controlling system register
< DSI >
- separate the previous one patch to three
- renaming patch: rename pll clock to sclk clock
- generalizing patch: generalize the way to getting address and values
- Exynos5433 patch: adds support for Exynos5433 dsi
- use defines for more readable code
- fix typos

Changes for v4:
- rebased to exynos-drm-next with the clean-up patchset by Gustavo Padovan.

Changes for v5:
- separated the refactoring patch of MIPI DSI driver into 3 patches
- added the patch to make DSI driver compatiable with the old clock name
- added the patch to rename the DSI driver's clock
- rename the newly added dsi variables for clarity

Hyungwon Hwang (11):
  of: add helper for getting endpoint node of specific identifiers
  drm/exynos: mic: add MIC driver
  drm/exynos: dsi: rename pll_clk to sclk_clk
  drm/exynos: dsi: add macros for register access
  drm/exynos: dsi: make use of driver data for static values
  drm/exynos: dsi: make use of array for clock access
  drm/exynos: dsi: add support for Exynos5433
  drm/exynos: dsi: add the backward compatibility for the renamed clock
  drm/exynos: dsi: add support for MIC driver as a bridge
  drm/exynos: dsi: do not set TE GPIO direction by input
  ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

Joonyoung Shim (1):
  drm/exynos: add Exynos5433 decon driver

 .../devicetree/bindings/video/exynos-mic.txt   |  51 ++
 .../devicetree/bindings/video/exynos5433-decon.txt |  65 +++
 .../devicetree/bindings/video/exynos_dsim.txt  |  31 +-
 arch/arm/boot/dts/exynos4.dtsi |   2 +-
 drivers/gpu/drm/exynos/Kconfig |  14 +-
 drivers/gpu/drm/exynos/Makefile|   2 +
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c  | 617 +
 drivers/gpu/drm/exynos/exynos_drm_drv.c|   6 +
 drivers/gpu/drm/exynos/exynos_drm_drv.h|   2 +
 drivers/gpu/drm/exynos/exynos_drm_dsi.c| 464 +++-
 drivers/gpu/drm/exynos/exynos_drm_mic.c| 490 
 drivers/of/base.c  |  33 ++
 include/linux/of_graph.h   |   8 +
 include/video/exynos5433_decon.h   | 163 ++
 14 files changed, 1797 insertions(+), 151 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/video/exynos-mic.txt
 create mode 100644 Documentation/devicetree/bindings/video/exynos5433-decon.txt
 create mode 100644 drivers/gpu/drm/exynos/exynos5433_drm_decon.c
 create mode 100644 drivers/gpu/drm/exynos/exynos_drm_mic.c
 create mode 100644 include/video/exynos5433_decon.h

--
1.9.1

[PATCH 5/6] drm/armada: gem: Use drm_clflush_*() functions

[Thierry Reding]

On Fri, Apr 10, 2015 at 01:08:02PM +0100, Russell King - ARM Linux wrote:
> On Thu, Apr 09, 2015 at 04:34:08PM +0200, Thierry Reding wrote:
> > diff --git a/drivers/gpu/drm/armada/armada_gem.c 
> > b/drivers/gpu/drm/armada/armada_gem.c
> > index 580e10acaa3a..c2d4414031ab 100644
> > --- a/drivers/gpu/drm/armada/armada_gem.c
> > +++ b/drivers/gpu/drm/armada/armada_gem.c
> > @@ -453,19 +453,14 @@ armada_gem_prime_map_dma_buf(struct 
> > dma_buf_attachment *attach,
> > sg_set_page(sg, page, PAGE_SIZE, 0);
> > }
> >  
> > -   if (dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir) == 0) {
> > -   num = sgt->nents;
> > -   goto release;
> > -   }
> > +   drm_clflush_sg(sgt);
> > } else if (dobj->page) {
> > /* Single contiguous page */
> > if (sg_alloc_table(sgt, 1, GFP_KERNEL))
> > goto free_sgt;
> >  
> > sg_set_page(sgt->sgl, dobj->page, dobj->obj.size, 0);
> > -
> > -   if (dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir) == 0)
> > -   goto free_table;
> > +   drm_clflush_sg(sgt);
> > } else if (dobj->linear) {
> > /* Single contiguous physical region - no struct page */
> > if (sg_alloc_table(sgt, 1, GFP_KERNEL))
> > @@ -480,7 +475,6 @@ armada_gem_prime_map_dma_buf(struct dma_buf_attachment 
> > *attach,
> >   release:
> > for_each_sg(sgt->sgl, sg, num, i)
> > page_cache_release(sg_page(sg));
> > - free_table:
> > sg_free_table(sgt);
> >   free_sgt:
> > kfree(sgt);
> > @@ -494,9 +488,6 @@ static void armada_gem_prime_unmap_dma_buf(struct 
> > dma_buf_attachment *attach,
> > struct armada_gem_object *dobj = drm_to_armada_gem(obj);
> > int i;
> >  
> > -   if (!dobj->linear)
> > -   dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, dir);
> > -
> 
> I'm really wonder where this is the right thing to do.

I think it isn't the right thing to do in this case indeed. Both Tegra
and MSM were using this pattern to make sure that caches are invalidated
upon allocation of memory from shmemfs, but I now realize that for the
Armada driver this isn't the case.

Thierry
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[PATCH 5/6] drm/armada: gem: Use drm_clflush_*() functions

[Russell King - ARM Linux]

On Thu, Apr 09, 2015 at 04:34:08PM +0200, Thierry Reding wrote:
> diff --git a/drivers/gpu/drm/armada/armada_gem.c 
> b/drivers/gpu/drm/armada/armada_gem.c
> index 580e10acaa3a..c2d4414031ab 100644
> --- a/drivers/gpu/drm/armada/armada_gem.c
> +++ b/drivers/gpu/drm/armada/armada_gem.c
> @@ -453,19 +453,14 @@ armada_gem_prime_map_dma_buf(struct dma_buf_attachment 
> *attach,
>   sg_set_page(sg, page, PAGE_SIZE, 0);
>   }
>  
> - if (dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir) == 0) {
> - num = sgt->nents;
> - goto release;
> - }
> + drm_clflush_sg(sgt);
>   } else if (dobj->page) {
>   /* Single contiguous page */
>   if (sg_alloc_table(sgt, 1, GFP_KERNEL))
>   goto free_sgt;
>  
>   sg_set_page(sgt->sgl, dobj->page, dobj->obj.size, 0);
> -
> - if (dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir) == 0)
> - goto free_table;
> + drm_clflush_sg(sgt);
>   } else if (dobj->linear) {
>   /* Single contiguous physical region - no struct page */
>   if (sg_alloc_table(sgt, 1, GFP_KERNEL))
> @@ -480,7 +475,6 @@ armada_gem_prime_map_dma_buf(struct dma_buf_attachment 
> *attach,
>   release:
>   for_each_sg(sgt->sgl, sg, num, i)
>   page_cache_release(sg_page(sg));
> - free_table:
>   sg_free_table(sgt);
>   free_sgt:
>   kfree(sgt);
> @@ -494,9 +488,6 @@ static void armada_gem_prime_unmap_dma_buf(struct 
> dma_buf_attachment *attach,
>   struct armada_gem_object *dobj = drm_to_armada_gem(obj);
>   int i;
>  
> - if (!dobj->linear)
> - dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, dir);
> -

I'm really wonder where this is the right thing to do.

DMA coherency on ARMv6 and ARMv7 CPUs is not just a case of "do something
just before DMA" - it's more complicated than that because of the
speculative prefetching.

What you must remember is this:

Any memory which is readable to the CPU may be speculatively
prefetched by the CPU, and cache lines allocated into the L1
and L2 caches.

What this means is that if you're doing this:

Flush caches
Perform DMA to buffer
Read buffer from CPU

You may or may not see the data you expect in the buffer - it's
indeterminant, depending on how aggressive the CPU has been at
prefetching data.

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.

[PATCH 2/6] drm/cache: Implement drm_clflush_*() for ARM

[Russell King - ARM Linux]

On Thu, Apr 09, 2015 at 04:34:05PM +0200, Thierry Reding wrote:
> From: Thierry Reding 
> 
> Add implementations for drm_clflush_*() on ARM by borrowing code from
> the DMA mapping API implementation. Unfortunately ARM doesn't export an
> API to flush caches on a page by page basis, so this replicates most of
> the code.

I'm _really_ not happy with this, because it's poking about in ARM
internal implementation details of the DMA API.  It's also not going
to work too well on aliasing caches either - especially when you
consider that the userspace mapping of a page may have no relationship
to the address you get from kmap.

For an aliasing cache, the way things work with the DMA API, we ensure
that the kernel alias is clean whenever pages are un-kmapped, which
means that unmapped highmem pages never have L1 cache lines associated
with the kernel alias of them.  The user aliases are handled separately
via the normal flush_dcache_page()/flush_anon_page() calls.

None of this exists here...

It gets even more hairly on older ARM CPUs - but I hope no one is
expecting to support DRM's clflush there - we should make that explicit
though, and ensure that clflush support returns an error there.

That aside, we have most of this logic already inside
dma_cache_maint_page(), and even if it was the right thing to be doing,
we shouldn't be duplicating this architecture specific code inside a
driver.

So you can take that as a NAK on this.

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.

[PATCH 11/11] drm: Fix the 'native defer' message in drm_dp_i2c_do_msg()

[Alex Deucher]

On Fri, Apr 10, 2015 at 12:12 PM, Todd Previte  wrote:
> The debug message is missing a newline at the end and it makes the
> logs hard to read when a device defers a lot. Simple 2-character fix
> adds the newline at the end.
>
> Signed-off-by: Todd Previte 
> Cc: dri-devel at lists.freedesktop.org

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/drm_dp_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 9ecfd27..4ac416e 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -433,7 +433,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, 
> struct drm_dp_aux_msg *msg)
> return -EREMOTEIO;
>
> case DP_AUX_NATIVE_REPLY_DEFER:
> -   DRM_DEBUG_KMS("native defer");
> +   DRM_DEBUG_KMS("native defer\n");
> /*
>  * We could check for I2C bit rate capabilities and if
>  * available adjust this interval. We could also be
> --
> 1.9.1
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH v5 01/12] drm/exynos: add Exynos5433 decon driver

[Varka Bhadram]

On 04/10/2015 11:25 AM, Hyungwon Hwang wrote:

> From: Joonyoung Shim 
>
> DECON(Display and Enhancement Controller) is new IP replacing FIMD in
> Exynos5433. This patch adds Exynos5433 decon driver.
>
> Signed-off-by: Joonyoung Shim 
> Signed-off-by: Hyungwon Hwang 
> ---
> Changes for v2:
> - change file names and variable names of decon to represnt exynos5433 instead
> of exynos to distinguish them from exynos7 decon
>
> Changes for v3:
> - fail fast when the proper image format is not set
> - remove unnecessary checking code
> - add and modify the function to make DPMS work well
>
> Changes for v4:
> - rebased to exynos-drm-next with the clean-up patchset by Gustavo Padovan.
>
> Changes for v5:
> - None
>  .../devicetree/bindings/video/exynos5433-decon.txt |  65 +++
>  drivers/gpu/drm/exynos/Kconfig |   6 +
>  drivers/gpu/drm/exynos/Makefile|   1 +
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c  | 617 
> +
>  drivers/gpu/drm/exynos/exynos_drm_drv.c|   3 +
>  drivers/gpu/drm/exynos/exynos_drm_drv.h|   1 +
>  include/video/exynos5433_decon.h   | 163 ++
>  7 files changed, 856 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/video/exynos5433-decon.txt
>  create mode 100644 drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>  create mode 100644 include/video/exynos5433_decon.h
>
(...)

> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!res) {
> + dev_err(dev, "cannot find IO resource\n");
> + return -ENXIO;
> + }
> +

Remove the above check. Check one *res* will be done by 
*devm_ioremap_resource()*

> + ctx->addr = devm_ioremap_resource(dev, res);
> + if (IS_ERR(ctx->addr)) {
> + dev_err(dev, "ioremap failed\n");
> + return PTR_ERR(ctx->addr);
> + }
> +
> + res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> + ctx->i80_if ? "lcd_sys" : "vsync");
> + if (!res) {
> + dev_err(dev, "cannot find IRQ resource\n");
> + return -ENXIO;
> + }
> +
> + ret = devm_request_irq(dev, res->start, ctx->i80_if ?
> + decon_lcd_sys_irq_handler : decon_vsync_irq_handler, 0,
> + "drm_decon", ctx);
> + if (ret < 0) {
> + dev_err(dev, "lcd_sys irq request failed\n");
> + return ret;
> + }
> +
> + ret = exynos_drm_component_add(dev, EXYNOS_DEVICE_TYPE_CRTC,
> +EXYNOS_DISPLAY_TYPE_LCD);
> + if (ret < 0)
> + return ret;
> +
> + platform_set_drvdata(pdev, ctx);
> +
> + ret = component_add(dev, _component_ops);
> + if (ret < 0) {
> + exynos_drm_component_del(dev, EXYNOS_DEVICE_TYPE_CRTC);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int exynos5433_decon_remove(struct platform_device *pdev)
> +{
> + component_del(>dev, _component_ops);
> + exynos_drm_component_del(>dev, EXYNOS_DEVICE_TYPE_CRTC);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id exynos5433_decon_driver_dt_match[] = {
> + { .compatible = "samsung,exynos5433-decon" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, exynos5433_decon_driver_dt_match);
> +
> +struct platform_driver exynos5433_decon_driver = {
> + .probe  = exynos5433_decon_probe,
> + .remove = exynos5433_decon_remove,
> + .driver = {
> + .name   = "exynos5433-decon",
> + .owner  = THIS_MODULE,

Remove this field. It will be updated by platform core.

> + .of_match_table = exynos5433_decon_driver_dt_match,
> + },
> +};

-- 
Varka Bhadram

[PATCH] drm/exynos: use drm_plane_force_disable

[Inki Dae]

On 2015년 04월 10일 05:25, Gustavo Padovan wrote:
> Hi Joonyoung,
> 
> 2015-04-09 Joonyoung Shim :
> 
>> Don't call directly disable callback of plane helper, we need to
>> disconnect the plane from the fb and crtc after disable callback.
>>
>> Signed-off-by: Joonyoung Shim 
>> ---
>>  drivers/gpu/drm/exynos/exynos_drm_crtc.c| 5 +
>>  drivers/gpu/drm/exynos/exynos_drm_encoder.c | 2 +-
>>  2 files changed, 2 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
>> b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
>> index 519c569..50c830e 100644
>> --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
>> +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
>> @@ -48,7 +48,6 @@ static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
>>  {
>>  struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
>>  struct drm_plane *plane;
>> -int ret;
>>  
>>  if (!exynos_crtc->enabled)
>>  return;
>> @@ -69,9 +68,7 @@ static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
>>  if (plane->crtc != crtc)
>>  continue;
>>  
>> -ret = plane->funcs->disable_plane(plane);
>> -if (ret)
>> -DRM_ERROR("Failed to disable plane %d\n", ret);
>> +drm_plane_force_disable(plane);
>>  }
> 
> Which tree did you based this code? I've removed all this code in atomic.
> These two pieces of code makes no sense in atomic modesetting, disable would
> be called from the drm atomic core there.

Mr. Gustavo,

Could you check if you have other codes not posted? At least, it seems
that the codes you posted are same as above.

Thanks,
Inki Dae

> 
>   Gustavo
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
> 

[PATCH 09/13] drm: Fix for DP CTS test 4.2.2.5 - I2C DEFER handling

[Todd Previte]

For test 4.2.2.5 to pass per the Link CTS Core 1.2 rev1.1 spec, the source
device must attempt at least 7 times to read the EDID when it receives an
I2C defer. The normal DRM code makes only 7 retries, regardless of whether
or not the response is a native defer or an I2C defer. Test 4.2.2.5 fails
since there are native defers interspersed with the I2C defers which
results in less than 7 EDID read attempts.

The solution is to decrement the retry counter when an I2C DEFER is returned
such that another read attempt will be made. This situation should normally
only occur in compliance testing, however, as a worse case real-world
scenario, it would result in 13 attempts ( 6 native defers, 7 I2C defers)
for a single transaction to complete. The net result is a slightly slower
response to an EDID read that shouldn't significantly impact overall
performance.

V2:
- Added a check on the number of I2C Defers to limit the number
  of times that the retries variable will be decremented. This
  is to address review feedback regarding possible infinite loops
  from misbehaving sink devices.
V3:
- Fixed the limit value to 7 instead of 8 to get the correct retry
  count.
- Combined the increment of the defer count into the if-statement
V4:
- Removed i915 tag from subject as the patch is not i915-specific

Signed-off-by: Todd Previte 
Cc: dri-devel at lists.freedesktop.org
---
 drivers/gpu/drm/drm_dp_helper.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 79968e3..9ecfd27 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -468,7 +468,12 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, 
struct drm_dp_aux_msg *msg)

case DP_AUX_I2C_REPLY_DEFER:
DRM_DEBUG_KMS("I2C defer\n");
-   aux->i2c_defer_count++;
+   /* DP Compliance Test 4.2.2.5 Requirement:
+* Must have at least 7 retries for I2C defers on the
+* transaction to pass this test
+*/
+   if (++aux->i2c_defer_count < 7)
+   retry = 0;
usleep_range(400, 500);
continue;

-- 
1.9.1

[PATCH 06/13] drm: Add supporting structure for Displayport Link CTS test 4.2.2.6

[Todd Previte]

Displayport compliance test 4.2.2.6 requires that a source device be capable of
detecting a corrupt EDID. The test specification states that the sink device
sets up the EDID with an invalid checksum. To do this, the sink sets up an
invalid EDID header, expecting the source device to generate the checksum and
compare it to the value stored in the last byte of the block data.

Unfortunately, the DRM EDID reading and parsing functions are actually too good
in this case; the header is fixed before the checksum is computed and thus the
code never sees the invalid checksum. This results in a failure to pass the
compliance test.

To correct this issue, a checksum is generated when the EDID header is detected
as corrupted. If the checksum is invalid, it sets the header_corrupt flag and
logs the errors. In the case of a more seriously damaged header (fixup score
less than the threshold) the code does not generate the checksum but does set
the header_corrupt flag.

V2:
- Removed the static bool global
- Added a bool to the drm_connector struct to reaplce the static one for
  holding the status of raw edid header corruption detection
- Modified the function signature of the is_valid function to take an
  additional parameter to store the corruption detected value
- Fixed the other callers of the above is_valid function
V3:
- Updated the commit message to be more clear about what and why this
  patch does what it does.
- Added comment in code to clarify the operations there
- Removed compliance variable and check_link_status update; those
  have been moved to a later patch
- Removed variable assignment from the bottom of the test handler
V4:
- Removed i915 tag from subject line as the patch is not i915-specific

Signed-off-by: Todd Previte 
Cc: dri-devel at lists.freedesktop.org
---
 drivers/gpu/drm/drm_edid.c| 31 ++-
 drivers/gpu/drm/drm_edid_load.c   |  7 +--
 drivers/gpu/drm/i2c/tda998x_drv.c |  4 ++--
 include/drm/drm_crtc.h|  8 +++-
 4 files changed, 40 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 53bc7a6..12e5be7 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1005,7 +1005,6 @@ int drm_edid_header_is_valid(const u8 *raw_edid)
for (i = 0; i < sizeof(edid_header); i++)
if (raw_edid[i] == edid_header[i])
score++;
-
return score;
 }
 EXPORT_SYMBOL(drm_edid_header_is_valid);
@@ -1047,7 +1046,8 @@ static bool drm_edid_is_zero(const u8 *in_edid, int 
length)
  *
  * Return: True if the block is valid, false otherwise.
  */
-bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
+bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
+ bool *header_corrupt)
 {
u8 csum;
struct edid *edid = (struct edid *)raw_edid;
@@ -1062,9 +1062,27 @@ bool drm_edid_block_valid(u8 *raw_edid, int block, bool 
print_bad_edid)
int score = drm_edid_header_is_valid(raw_edid);
if (score == 8) ;
else if (score >= edid_fixup) {
+   /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
+* In order to properly generate the invalid checksum
+* required for this test, it must be generated using
+* the raw EDID data. Otherwise, the fix-up code here
+* will correct the problem, the checksum is then 
correct
+* and the test fails
+*/
+   csum = drm_edid_block_checksum(raw_edid);
+   if (csum) {
+   DRM_DEBUG_DRIVER("Invalid EDID header, score = 
%d\n", score);
+   DRM_DEBUG_DRIVER("Invalid EDID checksum %d\n", 
csum);
+   if (header_corrupt)
+   *header_corrupt = 1;
+   }
DRM_DEBUG("Fixing EDID header, your hardware may be 
failing\n");
memcpy(raw_edid, edid_header, sizeof(edid_header));
} else {
+   if (header_corrupt) {
+   DRM_DEBUG_DRIVER("Invalid EDID header\n");
+   *header_corrupt = 1;
+   }
goto bad;
}
}
@@ -1129,7 +1147,7 @@ bool drm_edid_is_valid(struct edid *edid)
return false;

for (i = 0; i <= edid->extensions; i++)
-   if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
+   if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
return false;

return true;
@@ -1232,7 +1250,8 @@ struct edid *drm_do_get_edid(struct drm_connector 
*connector,
for (i = 0; i < 4; i++) {
   

[PATCH 06/11] drm/i915: Add supporting structure for Displayport Link CTS test 4.2.2.6

[Todd Previte]

Easy enough to do. Tag removed and updated patch posted. Thanks Emil!

On 4/10/2015 10:45 AM, Emil Velikov wrote:
> Hi Todd
>
> On 10/04/15 16:12, Todd Previte wrote:
>> Displayport compliance test 4.2.2.6 requires that a source device be capable 
>> of
>> detecting a corrupt EDID. The test specification states that the sink device
>> sets up the EDID with an invalid checksum. To do this, the sink sets up an
>> invalid EDID header, expecting the source device to generate the checksum and
>> compare it to the value stored in the last byte of the block data.
>>
>> Unfortunately, the DRM EDID reading and parsing functions are actually too 
>> good
>> in this case; the header is fixed before the checksum is computed and thus 
>> the
>> code never sees the invalid checksum. This results in a failure to pass the
>> compliance test.
>>
>> To correct this issue, a checksum is generated when the EDID header is 
>> detected
>> as corrupted. If the checksum is invalid, it sets the header_corrupt flag and
>> logs the errors. In the case of a more seriously damaged header (fixup score
>> less than the threshold) the code does not generate the checksum but does set
>> the header_corrupt flag.
>>
>> V2:
>> - Removed the static bool global
>> - Added a bool to the drm_connector struct to reaplce the static one for
>>holding the status of raw edid header corruption detection
>> - Modified the function signature of the is_valid function to take an
>>additional parameter to store the corruption detected value
>> - Fixed the other callers of the above is_valid function
>> V3:
>> - Updated the commit message to be more clear about what and why this
>>patch does what it does.
>> - Added comment in code to clarify the operations there
>> - Removed compliance variable and check_link_status update; those
>>have been moved to a later patch
>> - Removed variable assignment from the bottom of the test handler
>>
>> Signed-off-by: Todd Previte 
>> Cc: dri-devel at lists.freedesktop.org
>> ---
>>   drivers/gpu/drm/drm_edid.c| 31 ++-
>>   drivers/gpu/drm/drm_edid_load.c   |  7 +--
>>   drivers/gpu/drm/i2c/tda998x_drv.c |  4 ++--
>>   include/drm/drm_crtc.h|  8 +++-
>>   4 files changed, 40 insertions(+), 10 deletions(-)
>>
> Neither this nor patch 09/11 seems to be i915 specific. If you're doing
> another revision you might want to use just "drm:".
>
> Cheers,
> Emil

[PATCH 11/11] drm: Fix the 'native defer' message in drm_dp_i2c_do_msg()

[Todd Previte]

The debug message is missing a newline at the end and it makes the
logs hard to read when a device defers a lot. Simple 2-character fix
adds the newline at the end.

Signed-off-by: Todd Previte 
Cc: dri-devel at lists.freedesktop.org
---
 drivers/gpu/drm/drm_dp_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 9ecfd27..4ac416e 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -433,7 +433,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct 
drm_dp_aux_msg *msg)
return -EREMOTEIO;

case DP_AUX_NATIVE_REPLY_DEFER:
-   DRM_DEBUG_KMS("native defer");
+   DRM_DEBUG_KMS("native defer\n");
/*
 * We could check for I2C bit rate capabilities and if
 * available adjust this interval. We could also be
-- 
1.9.1

[PATCH 09/11] drm/i915: Fix for DP CTS test 4.2.2.5 - I2C DEFER handling

[Todd Previte]

For test 4.2.2.5 to pass per the Link CTS Core 1.2 rev1.1 spec, the source
device must attempt at least 7 times to read the EDID when it receives an
I2C defer. The normal DRM code makes only 7 retries, regardless of whether
or not the response is a native defer or an I2C defer. Test 4.2.2.5 fails
since there are native defers interspersed with the I2C defers which
results in less than 7 EDID read attempts.

The solution is to decrement the retry counter when an I2C DEFER is returned
such that another read attempt will be made. This situation should normally
only occur in compliance testing, however, as a worse case real-world
scenario, it would result in 13 attempts ( 6 native defers, 7 I2C defers)
for a single transaction to complete. The net result is a slightly slower
response to an EDID read that shouldn't significantly impact overall
performance.

V2:
- Added a check on the number of I2C Defers to limit the number
  of times that the retries variable will be decremented. This
  is to address review feedback regarding possible infinite loops
  from misbehaving sink devices.
V3:
- Fixed the limit value to 7 instead of 8 to get the correct retry
  count.
- Combined the increment of the defer count into the if-statement

Signed-off-by: Todd Previte 
Cc: dri-devel at lists.freedesktop.org
---
 drivers/gpu/drm/drm_dp_helper.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 79968e3..9ecfd27 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -468,7 +468,12 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, 
struct drm_dp_aux_msg *msg)

case DP_AUX_I2C_REPLY_DEFER:
DRM_DEBUG_KMS("I2C defer\n");
-   aux->i2c_defer_count++;
+   /* DP Compliance Test 4.2.2.5 Requirement:
+* Must have at least 7 retries for I2C defers on the
+* transaction to pass this test
+*/
+   if (++aux->i2c_defer_count < 7)
+   retry = 0;
usleep_range(400, 500);
continue;

-- 
1.9.1

[PATCH 06/11] drm/i915: Add supporting structure for Displayport Link CTS test 4.2.2.6

[Todd Previte]

Displayport compliance test 4.2.2.6 requires that a source device be capable of
detecting a corrupt EDID. The test specification states that the sink device
sets up the EDID with an invalid checksum. To do this, the sink sets up an
invalid EDID header, expecting the source device to generate the checksum and
compare it to the value stored in the last byte of the block data.

Unfortunately, the DRM EDID reading and parsing functions are actually too good
in this case; the header is fixed before the checksum is computed and thus the
code never sees the invalid checksum. This results in a failure to pass the
compliance test.

To correct this issue, a checksum is generated when the EDID header is detected
as corrupted. If the checksum is invalid, it sets the header_corrupt flag and
logs the errors. In the case of a more seriously damaged header (fixup score
less than the threshold) the code does not generate the checksum but does set
the header_corrupt flag.

V2:
- Removed the static bool global
- Added a bool to the drm_connector struct to reaplce the static one for
  holding the status of raw edid header corruption detection
- Modified the function signature of the is_valid function to take an
  additional parameter to store the corruption detected value
- Fixed the other callers of the above is_valid function
V3:
- Updated the commit message to be more clear about what and why this
  patch does what it does.
- Added comment in code to clarify the operations there
- Removed compliance variable and check_link_status update; those
  have been moved to a later patch
- Removed variable assignment from the bottom of the test handler

Signed-off-by: Todd Previte 
Cc: dri-devel at lists.freedesktop.org
---
 drivers/gpu/drm/drm_edid.c| 31 ++-
 drivers/gpu/drm/drm_edid_load.c   |  7 +--
 drivers/gpu/drm/i2c/tda998x_drv.c |  4 ++--
 include/drm/drm_crtc.h|  8 +++-
 4 files changed, 40 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 53bc7a6..12e5be7 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1005,7 +1005,6 @@ int drm_edid_header_is_valid(const u8 *raw_edid)
for (i = 0; i < sizeof(edid_header); i++)
if (raw_edid[i] == edid_header[i])
score++;
-
return score;
 }
 EXPORT_SYMBOL(drm_edid_header_is_valid);
@@ -1047,7 +1046,8 @@ static bool drm_edid_is_zero(const u8 *in_edid, int 
length)
  *
  * Return: True if the block is valid, false otherwise.
  */
-bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
+bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
+ bool *header_corrupt)
 {
u8 csum;
struct edid *edid = (struct edid *)raw_edid;
@@ -1062,9 +1062,27 @@ bool drm_edid_block_valid(u8 *raw_edid, int block, bool 
print_bad_edid)
int score = drm_edid_header_is_valid(raw_edid);
if (score == 8) ;
else if (score >= edid_fixup) {
+   /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
+* In order to properly generate the invalid checksum
+* required for this test, it must be generated using
+* the raw EDID data. Otherwise, the fix-up code here
+* will correct the problem, the checksum is then 
correct
+* and the test fails
+*/
+   csum = drm_edid_block_checksum(raw_edid);
+   if (csum) {
+   DRM_DEBUG_DRIVER("Invalid EDID header, score = 
%d\n", score);
+   DRM_DEBUG_DRIVER("Invalid EDID checksum %d\n", 
csum);
+   if (header_corrupt)
+   *header_corrupt = 1;
+   }
DRM_DEBUG("Fixing EDID header, your hardware may be 
failing\n");
memcpy(raw_edid, edid_header, sizeof(edid_header));
} else {
+   if (header_corrupt) {
+   DRM_DEBUG_DRIVER("Invalid EDID header\n");
+   *header_corrupt = 1;
+   }
goto bad;
}
}
@@ -1129,7 +1147,7 @@ bool drm_edid_is_valid(struct edid *edid)
return false;

for (i = 0; i <= edid->extensions; i++)
-   if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
+   if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
return false;

return true;
@@ -1232,7 +1250,8 @@ struct edid *drm_do_get_edid(struct drm_connector 
*connector,
for (i = 0; i < 4; i++) {
if (get_edid_block(data, block, 0, EDID_LENGTH))
 

[Intel-gfx] [PATCH 01/14] drm: Adding drm helper function drm_plane_from_index().

[Daniel Vetter]

On Thu, Apr 09, 2015 at 05:36:21PM -0700, Chandra Konduru wrote:
> Adding drm helper function to return plane pointer from index where
> index is a returned by drm_plane_index.
> 
> v2:
> -avoided nested loop by adding loop count (Daniel)
> 
> v3:
> -updated patch header prefix to 'drm' (Matt)
> 
> v4:
> -fixed a kerneldoc issue (kbuild-internal)
> 
> Cc: dri-devel at lists.freedesktop.org
> 
> Signed-off-by: Chandra Konduru 

Applied with Dave's irc-ack. btw when resending patches please pick up r-b
tags so I don't have to hunt around on the m-l to find them.

Thanks, Daniel

> ---
>  drivers/gpu/drm/drm_crtc.c |   23 +++
>  include/drm/drm_crtc.h |1 +
>  2 files changed, 24 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index d576a4d..ad4d9ae 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1289,6 +1289,29 @@ unsigned int drm_plane_index(struct drm_plane *plane)
>  EXPORT_SYMBOL(drm_plane_index);
>  
>  /**
> + * drm_plane_from_index - find the registered plane at an index
> + * @dev: DRM device
> + * @idx: index of registered plane to find for
> + *
> + * Given a plane index, return the registered plane from DRM device's
> + * list of planes with matching index.
> + */
> +struct drm_plane *
> +drm_plane_from_index(struct drm_device *dev, int idx)
> +{
> + struct drm_plane *plane;
> + unsigned int i = 0;
> +
> + list_for_each_entry(plane, >mode_config.plane_list, head) {
> + if (i == idx)
> + return plane;
> + i++;
> + }
> + return NULL;
> +}
> +EXPORT_SYMBOL(drm_plane_from_index);
> +
> +/**
>   * drm_plane_force_disable - Forcibly disable a plane
>   * @plane: plane to disable
>   *
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 7b5c661..6b30036 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -1264,6 +1264,7 @@ extern int drm_plane_init(struct drm_device *dev,
> bool is_primary);
>  extern void drm_plane_cleanup(struct drm_plane *plane);
>  extern unsigned int drm_plane_index(struct drm_plane *plane);
> +extern struct drm_plane * drm_plane_from_index(struct drm_device *dev, int 
> idx);
>  extern void drm_plane_force_disable(struct drm_plane *plane);
>  extern int drm_plane_check_pixel_format(const struct drm_plane *plane,
>   u32 format);
> -- 
> 1.7.9.5
> 
> ___
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

drm/msm/mdp5: undefined CONFIG_MSM_BUS_SCALING

[Valentin Rothberg]

On Thu, Apr 09, 2015 at 04:20:45PM -0400, Rob Clark wrote:
> On Thu, Apr 9, 2015 at 3:44 PM, Valentin Rothberg
>  wrote:
> > On Thu, Apr 09, 2015 at 02:54:29PM -0400, Rob Clark wrote:
> >> On Thu, Apr 9, 2015 at 2:12 PM, Paul Bolle  wrote:
> >> > On Thu, 2015-04-09 at 19:07 +0200, Greg KH wrote:
> >> >> I really don't understand.  Why is this code in the kernel tree if it
> >> >> can't be built?  How does anyone use this?  By taking it and copying it
> >> >> where?  If it can't be built, and no one can update it, and of course
> >> >> not run it, why is it here?  What good is this code doing sitting here?
> >> >
> >> > The Erlangen bot (courtesy of Valentin, Stefan, and Andreas) has taken
> >> > over what I've been doing for quite some time, but doing it much more
> >> > thoroughly. And my experience tells me that the reports they'll send in
> >> > will trigger more discussions like this one.
> >> >
> >> > A lesson I learned from my daily checks for Kconfig oddities is that
> >> > people go to great lengths defending unbuildable code. (Do a web search
> >> > for ATHEROS_AR231X to find a discussion that dragged on for over three
> >> > years!) Personally I stopped caring after someone insisted on having a
> >> > file in the tree that was in no way connected to the build system: not a
> >> > single line in any of the Makefiles pointed at it. So, as far as I'm
> >> > concerned, if people can't point at a patch pending, somehow, somewhere,
> >> > that would make their code buildable one might as well delete the code.
> >> >
> >> > I really think it's as simple as that.
> >> >
> >>
> >> In the example you reference, sure it is as simple as that.  But here
> >> we are not talking about files that aren't even referenced by build
> >> system.  We are talking about a driver which does build and run on
> >> upstream kernel, and which has a few small #ifdef blocks to simplify
> >> backporting to downstream kernels (which we still do need to use for
> >> some generations and some devices)
> >>
> >> Sure, I'd love never to have to deal with a downstream kernel.  But
> >> really.. I didn't create the downstream mess in the arm/android
> >> ecosystem, I'm just trying to cope with it as best as possible.. don't
> >> hate the player, hate the game :-P
> >
> > I really understand your point.  But I also see conflicting interests.
> >
> > The goal of static analysis tools such as Paul's scripts, undertaker or
> > scripts/checkkconfigsymbols.py is to detect and ideally avoid certain
> > kind of bugs.  Having to deal with intentional dead code or entirely
> > dead files makes such analysis quite challenging.  The main issue for
> > the tools is that as soon as there is a CONFIG_ prefixed identifier, it
> > will be treated as a Kconfig variable.  Strictly speaking, it's
> > violating the Kconfig naming convention for the upstream case.
> >
> > Then there is another issue maintaining the code, studying the code,
> > making any kind of analysis.  How should people know which code is meant
> > for upstream, downstream or other streams?  Currently I am working on
> > detecting deprecated functions, data types, etc.  If there were too many
> > of such downstream #ifdefs, it would inherently complicate affords.
> 
> Hmm, admittedly, I hadn't really considered the static analysis case
> before today..
> 
> If at all possible, I would like to keep those, at least for the time
> being, since it is one less thing for me to mess up on backports.
> 
> Not sure if a comment tag could help make things clear (for humans and
> tools), ie.
> 
> #ifdef CONFIG_FOO
> /* downstream bonghits */
> ...
> #endif

The main problem for those analyzers is the 'CONFIG_' prefix.  This
prefix is reserved for Kconfig options only.  Using #ifdef FOO instead
avoids tools to run into this trap.  A comment would also be very
helpful.  The tools would be happy then : )

Kind regards,
 Valentin

> no idea if that would be trivial or difficult to implement?  If the
> latter, I can drop those parts of the code.  But if at all possible,
> I'm always a fan of giving myself less things to screw up.
> 
> > So I try to discourage such cases for the aforementioned reasons.  But
> > that's just my humble opinion and for sure my own interests : )
> >
> > In any case, thank you a lot for taking the time explain everything in
> > such nice detail.  I learned a lot!
> 
> No problem, and thanks for your work
> 
> BR,
> -R
> 
> > Kind regards,
> >  Valentin
> >
> >>
> >> BR,
> >> -R
> >>
> >> >
> >> > Paul Bolle
> >> >

[Intel-gfx] [PATCH 4/9] drm/i915: Add check for corrupt raw EDID header for Displayport compliance testing

[Todd Previte]

On 4/8/2015 3:37 PM, Paulo Zanoni wrote:
> 2015-04-08 18:43 GMT-03:00 Todd Previte:
>> On 4/8/2015 9:51 AM, Paulo Zanoni wrote:
>>> 2015-03-31 14:15 GMT-03:00 Todd Previte:
 Displayport compliance test 4.2.2.6 requires that a source device be
 capable of detecting
 a corrupt EDID. To do this, the test sets up an invalid EDID header to be
 read by the source
 device. Unfortunately, the DRM EDID reading and parsing functions are
 actually too good in
 this case and prevent the source from reading the corrupted EDID. The
 result is a failed
 compliance test.

 In order to successfully pass the test, the raw EDID header must be
 checked on each read
 to see if has been "corrupted". If an invalid raw header is detected, a
 flag is set that
 allows the compliance testing code to acknowledge that fact and react
 appropriately. The
 flag is automatically cleared on read.

 This code is designed to expressly work for compliance testing without
 disrupting normal
 operations for EDID reading and parsing.

 Signed-off-by: Todd Previte
 Cc:dri-devel at lists.freedesktop.org
 ---
drivers/gpu/drm/drm_edid.c   | 33 +
drivers/gpu/drm/i915/intel_dp.c  | 17 +
drivers/gpu/drm/i915/intel_drv.h |  1 +
include/drm/drm_edid.h   |  5 +
4 files changed, 56 insertions(+)

 diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
 index 53bc7a6..3d4f473 100644
 --- a/drivers/gpu/drm/drm_edid.c
 +++ b/drivers/gpu/drm/drm_edid.c
 @@ -990,6 +990,32 @@ static const u8 edid_header[] = {
   0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
};

 +
 +/* Flag for EDID corruption testing
 + * Displayport Link CTS Core 1.2 rev1.1 - 4.2.2.6
 + */
 +static bool raw_edid_header_corrupted;
>>> A static variable like this is not a good design, especially for a
>>> module like drm.ko. If you really need this, please store it inside
>>> some struct. But see below first.
>> Per our discussion this morning, I concur. This has been removed in favor of
>> a different solution that uses a new boolean flag in the drm_connector
>> struct.
>>
>> Capturing more of the discussion here, the static boolean was a bad idea to
>> begin with and needed to be removed. One solution was to make the flag
>> non-static and non-clear-on-read, then add a separate clear() function. But
>> it still had the problem of potential misuse other places in the code. The
>> current solution (which will be posted with V5) modifies the is_valid()
>> function and adds a flag in the drm_connector struct that can be used to
>> detect this low-level header corruption.
>>
>>
 +
 +/**
 + * drm_raw_edid_header_valid - check to see if the raw header is
 + * corrupt or not. Used solely for Displayport compliance
 + * testing and required by Link CTS Core 1.2 rev1.1 4.2.2.6.
 + * @raw_edid: pointer to raw base EDID block
 + *
 + * Indicates whether the original EDID header as read from the
 + * device was corrupt or not. Clears on read.
 + *
 + * Return: true if the raw header was corrupt, otherwise false
 + */
 +bool drm_raw_edid_header_corrupt(void)
 +{
 +   bool corrupted = raw_edid_header_corrupted;
 +
 +   raw_edid_header_corrupted = 0;
 +   return corrupted;
 +}
 +EXPORT_SYMBOL(drm_raw_edid_header_corrupt);
 +
/**
 * drm_edid_header_is_valid - sanity check the header of the base EDID
 block
 * @raw_edid: pointer to raw base EDID block
 @@ -1006,6 +1032,13 @@ int drm_edid_header_is_valid(const u8 *raw_edid)
   if (raw_edid[i] == edid_header[i])
   score++;

 +   if (score != 8) {
 +   /* Log and set flag here for EDID corruption testing
 +* Displayport Link CTS Core 1.2 rev1.1 - 4.2.2.6
 +*/
 +   DRM_DEBUG_DRIVER("Raw EDID header invalid\n");
 +   raw_edid_header_corrupted = 1;
 +   }
>>> The problem is that here we're limiting ourselves to just a bad edid
>>> header, not a bad edid in general, so there are many things which we
>>> might not get - such as a simple wrong checksum edid value. I remember
>>> that on the previous patch you calculated the whole checksum manually,
>>> but I don't see that code anymore. What was the reason for the change?
>> So this code is specifically for the 4.2.2.6 compliance test that is looking
>> for nothing more than an invalid EDID header.
> On the version of the spec I have (1.2 Core, Aug 22 2011), 4.2.2.6 is
> "EDID Corruption Detection", and it mentions "EDID corruption" without
> really getting into the details of header corruption. On the "Test
> procedure" description, it mentions "Reference 

libva decoding performance regression with kernel 4.0-rc

[Chris Wilson]

On Thu, Apr 09, 2015 at 09:00:43PM -0400, Olivier Crête wrote:
> Hello,
> 
> Using an Atom E3845 board, we had a pretty bad performance regression
> when upgrading to 4.0-rc6 from 3.19. With the help of git bisect, I
> traced it back to commit 78a42377. Reverting this commit and subsequent
> related commits (b9ffd80, 71745376, etc) fixes the performance
> regression for me.

Can you please test

http://cgit.freedesktop.org/~ickle/linux-2.6/log/?h=for-olivier-crete

on your setup.

First
http://cgit.freedesktop.org/~ickle/linux-2.6/commit/?h=for-olivier-crete=044307a99b418258ac0d775460d73b20b80277c1
to get a baseline with nightly as that contains some fine tuning to the
batch allocations, which is pretty significant for libva on Atom (only
double clflushing one or two pages every batch rather than 128) and then
http://cgit.freedesktop.org/~ickle/linux-2.6/commit/?h=for-olivier-crete=0a24802a5b61403b887ce401ce3efd52f5fd1eac
to see if the command parser tuning helps.

Hope this helps,
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

[PATCH libdrm 11/24] intel: remove the drm_mm* symbol workarounds

[Eric Anholt]

Emil Velikov  writes:

> Humble ping.
>
> Eric, can you please confirm if this and the follow up patch look ok.

Seems reasonable if you've verified the symbols aren't exposed.
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