[Bug 91294] [R7 370] DPM and power profile change crash the system
https://bugs.freedesktop.org/show_bug.cgi?id=91294 --- Comment #6 from Paul Frederiks --- I have a MSI R7 370 Armor 2x as well and like to report that the suggested workaround does not help in my case. During the boot process the mouse pointer is briefly visible but then the screen goes black. I can use the desktop with radeon.dpm=0. I am returning this card and sticking to my Radeon 6570 for now. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151029/a813c8c9/attachment.html>
[Bug 91268] R6xx freezes with kernel 3.17 and up
https://bugs.freedesktop.org/show_bug.cgi?id=91268 --- Comment #24 from Laurento Frittella --- I'm trying the attached patch to disable WC on my r6xx and it seems to help here as well. 01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] RV620/M82 [Mobility Radeon HD 3450/3470] Linux mybox 4.2.1-custom #3 SMP PREEMPT Mon Oct 26 22:05:24 CET 2015 x86_64 GNU/Linux Debian stretch/sid -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151029/fff45f52/attachment.html>
[PATCH v8 0/17] Add Analogix Core Display Port Driver
Am Mittwoch, 28. Oktober 2015, 16:15:43 schrieb Yakir Yang: > Hi all, > >The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller > share the same IP, so a lot of parts can be re-used. I split the common > code into bridge directory, then rk3288 and exynos only need to keep > some platform code. Cause I can't find the exact IP name of exynos dp > controller, so I decide to name dp core driver with "analogix" which I > find in rk3288 eDP TRM > > But there are still three light registers setting differents bewteen > exynos and rk3288. > 1. RK3288 have five special pll resigters which not indicata in exynos >dp controller. > 2. The address of DP_PHY_PD(dp phy power manager register) are different >between rk3288 and exynos. > 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug >register). > > This series have been well tested on Rockchip platform with eDP panel on > Jerry Chromebook and Display Port Monitor on RK3288 board. Also I have > tested on Samsung Snow and Peach Pit Chromebooks, and thanks to Javier at > Samsung > help to retest the whole series on Samsung Exynos5800 Peach Pi Chromebook, > glad to say that things works rightlly. Patch 15/17 looks like it didn't make it? I haven't found it in neither my inbox nor in the linux-rockchip list archive? So I've used the v7 version for my tests. This series on a rk3288-veyron-pinky and rk3288-veyron-jerry Tested-by: Heiko Stuebner
[Bug 92729] VDPAU: Maybe support H264_CONSTRAINED_BASELINE
https://bugs.freedesktop.org/show_bug.cgi?id=92729 --- Comment #1 from andreaskem at web.de --- Created attachment 119285 --> https://bugs.freedesktop.org/attachment.cgi?id=119285&action=edit vdpauinfo output -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151029/7e846d0a/attachment.html>
[Bug 92729] VDPAU: Maybe support H264_CONSTRAINED_BASELINE
https://bugs.freedesktop.org/show_bug.cgi?id=92729 Bug ID: 92729 Summary: VDPAU: Maybe support H264_CONSTRAINED_BASELINE Product: Mesa Version: 11.0 Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/r600 Assignee: dri-devel at lists.freedesktop.org Reporter: andreaskem at web.de QA Contact: dri-devel at lists.freedesktop.org Hi, I am not sure if this is the proper place to report this, so feel free to send me somewhere else and I apologize in advance. I am on the Mesa 11.0.4 r600 driver with the following device: 00:01.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Wrestler [Radeon HD 7340] and Xorg 1.17.3. (Arch Linux with testing repository enabled, everything up-to-date). vdpauinfo reports (see attachment) that the H.264 profiles H264_BASELINE, H264_MAIN, and H264_HIGH are supported for VDPAU hardware acceleration. However, H264_CONSTRAINED_BASELINE is marked "not supported". Now, if the Wikipedia article about H.264 profiles is to be believed [1], the constrained profile only needs a "subset of features that are in common between the Baseline, Main, and High Profiles." Consequently, I would expect H264_CONSTRAINED_BASELINE to be supported, as well. See also the bug report I filed for mpv a few weeks ago [2]. Moreover, H264_PROGRESSIVE_HIGH and H264_CONSTRAINED_HIGH seem to be "Similar to the High profile, but without support of field coding features." and "Similar to the Progressive High profile, but without support of B (bi-predictive) slices." respectively. However, vdpauinfo reports "not supported" for both. As I am writing this, I also notice that VC1_ADVANCED is supported, but VC1_MAIN and VC1_SIMPLE are not. Reading [3], I would expect the same reasoning to apply. Is there something I am missing? [1] https://en.wikipedia.org/wiki/H.264/MPEG-4_AVC#Profiles [2] https://github.com/mpv-player/mpv/issues/2347 [3] https://en.wikipedia.org/wiki/VC-1#Profiles -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151029/babe2e8d/attachment.html>
[PATCH] drm: sti: remove redundant sign extensions
Hi Rasmus, Thanks for the patch. I will integrated it in the next pull request for the sti driver. BR Vincent On 10/16/2015 03:14 PM, Rasmus Villemoes wrote: > arg is long int, so arg = (arg << 22) >> 22 makes the upper 22 bits of > arg equal to bit 9 (or bit 41). But we then mask away all but bits 0-9, so > this is entirely redundant. > > Signed-off-by: Rasmus Villemoes > --- > gcc seems to be smart enough to realize this - the generated code is > the same. This is thus just a tiny cleanup. > > drivers/gpu/drm/sti/sti_awg_utils.c | 4 > 1 file changed, 4 deletions(-) > > diff --git a/drivers/gpu/drm/sti/sti_awg_utils.c > b/drivers/gpu/drm/sti/sti_awg_utils.c > index 6029a2e3db1d..00d0698be9d3 100644 > --- a/drivers/gpu/drm/sti/sti_awg_utils.c > +++ b/drivers/gpu/drm/sti/sti_awg_utils.c > @@ -65,7 +65,6 @@ static int awg_generate_instr(enum opcode opcode, > > mux = 0; > data_enable = 0; > - arg = (arg << 22) >> 22; > arg &= (0x3ff); > break; > case REPEAT: > @@ -77,14 +76,12 @@ static int awg_generate_instr(enum opcode opcode, > > mux = 0; > data_enable = 0; > - arg = (arg << 22) >> 22; > arg &= (0x3ff); > break; > case JUMP: > mux = 0; > data_enable = 0; > arg |= 0x40; /* for jump instruction 7th bit is 1 */ > - arg = (arg << 22) >> 22; > arg &= 0x3ff; > break; > case STOP: > @@ -94,7 +91,6 @@ static int awg_generate_instr(enum opcode opcode, > case RPTSET: > case RPLSET: > case HOLD: > - arg = (arg << 24) >> 24; > arg &= (0x0ff); > break; > default: >
[PATCH 9/9] drm/amdgpu: remove amdgpu_fence_ref/unref
From: Christian König
Just move the remaining users to fence_put/get.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 30 --
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c| 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c | 3 ++-
4 files changed, 4 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b986ea1..8305a6c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -447,9 +447,6 @@ int amdgpu_fence_wait_next(struct amdgpu_ring *ring);
int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
-struct amdgpu_fence *amdgpu_fence_ref(struct amdgpu_fence *fence);
-void amdgpu_fence_unref(struct amdgpu_fence **fence);
-
bool amdgpu_fence_need_sync(struct amdgpu_fence *fence,
struct amdgpu_ring *ring);
void amdgpu_fence_note_sync(struct amdgpu_fence *fence,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index c4bb282..b912539 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -417,36 +417,6 @@ int amdgpu_fence_wait_empty(struct amdgpu_ring *ring)
}
/**
- * amdgpu_fence_ref - take a ref on a fence
- *
- * @fence: amdgpu fence object
- *
- * Take a reference on a fence (all asics).
- * Returns the fence.
- */
-struct amdgpu_fence *amdgpu_fence_ref(struct amdgpu_fence *fence)
-{
- fence_get(&fence->base);
- return fence;
-}
-
-/**
- * amdgpu_fence_unref - remove a ref on a fence
- *
- * @fence: amdgpu fence object
- *
- * Remove a reference on a fence (all asics).
- */
-void amdgpu_fence_unref(struct amdgpu_fence **fence)
-{
- struct amdgpu_fence *tmp = *fence;
-
- *fence = NULL;
- if (tmp)
- fence_put(&tmp->base);
-}
-
-/**
* amdgpu_fence_count_emitted - get the count of emitted fences
*
* @ring: ring the fence is associated with
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index aad4c1c..e659877 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -95,7 +95,8 @@ void amdgpu_ib_free(struct amdgpu_device *adev, struct
amdgpu_ib *ib)
{
amdgpu_sync_free(adev, &ib->sync, &ib->fence->base);
amdgpu_sa_bo_free(adev, &ib->sa_bo, &ib->fence->base);
- amdgpu_fence_unref(&ib->fence);
+ if (ib->fence)
+ fence_put(&ib->fence->base);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
index 2e946b2..dcf4a8a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
@@ -54,7 +54,8 @@ static struct fence *amdgpu_sched_run_job(struct
amd_sched_job *sched_job)
goto err;
}
- fence = amdgpu_fence_ref(job->ibs[job->num_ibs - 1].fence);
+ fence = job->ibs[job->num_ibs - 1].fence;
+ fence_get(&fence->base);
err:
if (job->free_job)
--
1.9.1
[PATCH 8/9] drm/amdgpu: use common fence for sync
From: Christian König
Stop using the driver internal functions.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 21 +++--
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 371994c..b986ea1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -704,7 +704,7 @@ void amdgpu_semaphore_free(struct amdgpu_device *adev,
*/
struct amdgpu_sync {
struct amdgpu_semaphore *semaphores[AMDGPU_NUM_SYNCS];
- struct amdgpu_fence *sync_to[AMDGPU_MAX_RINGS];
+ struct fence*sync_to[AMDGPU_MAX_RINGS];
DECLARE_HASHTABLE(fences, 4);
struct fence*last_vm_update;
};
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index 0499d2b..c6489b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -108,7 +108,6 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct
amdgpu_sync *sync,
{
struct amdgpu_sync_entry *e;
struct amdgpu_fence *fence;
- struct amdgpu_fence *other;
if (!f)
return 0;
@@ -136,10 +135,7 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct
amdgpu_sync *sync,
return 0;
}
- other = sync->sync_to[fence->ring->idx];
- sync->sync_to[fence->ring->idx] = amdgpu_fence_ref(
- amdgpu_fence_later(fence, other));
- amdgpu_fence_unref(&other);
+ amdgpu_sync_keep_later(&sync->sync_to[fence->ring->idx], f);
return 0;
}
@@ -258,11 +254,11 @@ int amdgpu_sync_wait(struct amdgpu_sync *sync)
return 0;
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
- struct amdgpu_fence *fence = sync->sync_to[i];
+ struct fence *fence = sync->sync_to[i];
if (!fence)
continue;
- r = fence_wait(&fence->base, false);
+ r = fence_wait(fence, false);
if (r)
return r;
}
@@ -287,9 +283,14 @@ int amdgpu_sync_rings(struct amdgpu_sync *sync,
int i, r;
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
- struct amdgpu_fence *fence = sync->sync_to[i];
- struct amdgpu_semaphore *semaphore;
struct amdgpu_ring *other = adev->rings[i];
+ struct amdgpu_semaphore *semaphore;
+ struct amdgpu_fence *fence;
+
+ if (!sync->sync_to[i])
+ continue;
+
+ fence = to_amdgpu_fence(sync->sync_to[i]);
/* check if we really need to sync */
if (!amdgpu_fence_need_sync(fence, ring))
@@ -374,7 +375,7 @@ void amdgpu_sync_free(struct amdgpu_device *adev,
amdgpu_semaphore_free(adev, &sync->semaphores[i], fence);
for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
- amdgpu_fence_unref(&sync->sync_to[i]);
+ fence_put(sync->sync_to[i]);
fence_put(sync->last_vm_update);
}
--
1.9.1
[PATCH 7/9] drm/amdgpu: use the new fence_is_later
From: Christian König
Instead of coding the check ourself.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 30 +-
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index 4921de1..0499d2b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -87,6 +87,15 @@ static bool amdgpu_sync_test_owner(struct fence *f, void
*owner)
return false;
}
+static void amdgpu_sync_keep_later(struct fence **keep, struct fence *fence)
+{
+ if (*keep && fence_is_later(*keep, fence))
+ return;
+
+ fence_put(*keep);
+ *keep = fence_get(fence);
+}
+
/**
* amdgpu_sync_fence - remember to sync to this fence
*
@@ -100,34 +109,21 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct
amdgpu_sync *sync,
struct amdgpu_sync_entry *e;
struct amdgpu_fence *fence;
struct amdgpu_fence *other;
- struct fence *tmp, *later;
if (!f)
return 0;
if (amdgpu_sync_same_dev(adev, f) &&
- amdgpu_sync_test_owner(f, AMDGPU_FENCE_OWNER_VM)) {
- if (sync->last_vm_update) {
- tmp = sync->last_vm_update;
- BUG_ON(f->context != tmp->context);
- later = (f->seqno - tmp->seqno <= INT_MAX) ? f : tmp;
- sync->last_vm_update = fence_get(later);
- fence_put(tmp);
- } else
- sync->last_vm_update = fence_get(f);
- }
+ amdgpu_sync_test_owner(f, AMDGPU_FENCE_OWNER_VM))
+ amdgpu_sync_keep_later(&sync->last_vm_update, f);
fence = to_amdgpu_fence(f);
if (!fence || fence->ring->adev != adev) {
hash_for_each_possible(sync->fences, e, node, f->context) {
- struct fence *new;
if (unlikely(e->fence->context != f->context))
continue;
- new = fence_get(fence_later(e->fence, f));
- if (new) {
- fence_put(e->fence);
- e->fence = new;
- }
+
+ amdgpu_sync_keep_later(&e->fence, f);
return 0;
}
--
1.9.1
[PATCH 6/9] drm/amdgpu: use common fences for VMID management v2
From: Christian König
v2: add missing NULL check.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 27 +++
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
4 files changed, 21 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 6d9c929..371994c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -970,7 +970,7 @@ struct amdgpu_vm_id {
/* last flushed PD/PT update */
struct fence*flushed_updates;
/* last use of vmid */
- struct amdgpu_fence *last_id_use;
+ struct fence*last_id_use;
};
struct amdgpu_vm {
@@ -1003,7 +1003,7 @@ struct amdgpu_vm {
};
struct amdgpu_vm_manager {
- struct amdgpu_fence *active[AMDGPU_NUM_VM];
+ struct fence*active[AMDGPU_NUM_VM];
uint32_tmax_pfn;
/* number of VMIDs */
unsignednvm;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 06e207f..a12c726 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -135,7 +135,7 @@ struct amdgpu_bo_list_entry *amdgpu_vm_get_bos(struct
amdgpu_device *adev,
int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
struct amdgpu_sync *sync)
{
- struct amdgpu_fence *best[AMDGPU_MAX_RINGS] = {};
+ struct fence *best[AMDGPU_MAX_RINGS] = {};
struct amdgpu_vm_id *vm_id = &vm->ids[ring->idx];
struct amdgpu_device *adev = ring->adev;
@@ -154,7 +154,8 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct
amdgpu_ring *ring,
/* skip over VMID 0, since it is the system VM */
for (i = 1; i < adev->vm_manager.nvm; ++i) {
- struct amdgpu_fence *fence = adev->vm_manager.active[i];
+ struct fence *fence = adev->vm_manager.active[i];
+ struct amdgpu_ring *fring;
if (fence == NULL) {
/* found a free one */
@@ -163,21 +164,23 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct
amdgpu_ring *ring,
return 0;
}
- if (amdgpu_fence_is_earlier(fence, best[fence->ring->idx])) {
- best[fence->ring->idx] = fence;
- choices[fence->ring == ring ? 0 : 1] = i;
+ fring = amdgpu_ring_from_fence(fence);
+ if (best[fring->idx] == NULL ||
+ fence_is_later(best[fring->idx], fence)) {
+ best[fring->idx] = fence;
+ choices[fring == ring ? 0 : 1] = i;
}
}
for (i = 0; i < 2; ++i) {
if (choices[i]) {
- struct amdgpu_fence *fence;
+ struct fence *fence;
fence = adev->vm_manager.active[choices[i]];
vm_id->id = choices[i];
trace_amdgpu_vm_grab_id(choices[i], ring->idx);
- return amdgpu_sync_fence(ring->adev, sync,
&fence->base);
+ return amdgpu_sync_fence(ring->adev, sync, fence);
}
}
@@ -246,11 +249,11 @@ void amdgpu_vm_fence(struct amdgpu_device *adev,
unsigned ridx = fence->ring->idx;
unsigned vm_id = vm->ids[ridx].id;
- amdgpu_fence_unref(&adev->vm_manager.active[vm_id]);
- adev->vm_manager.active[vm_id] = amdgpu_fence_ref(fence);
+ fence_put(adev->vm_manager.active[vm_id]);
+ adev->vm_manager.active[vm_id] = fence_get(&fence->base);
- amdgpu_fence_unref(&vm->ids[ridx].last_id_use);
- vm->ids[ridx].last_id_use = amdgpu_fence_ref(fence);
+ fence_put(vm->ids[ridx].last_id_use);
+ vm->ids[ridx].last_id_use = fence_get(&fence->base);
}
/**
@@ -1311,7 +1314,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct
amdgpu_vm *vm)
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
fence_put(vm->ids[i].flushed_updates);
- amdgpu_fence_unref(&vm->ids[i].last_id_use);
+ fence_put(vm->ids[i].last_id_use);
}
mutex_destroy(&vm->mutex);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 4883482..85bbcdc 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -965,7 +965,7 @@ static int gmc_v7_0_sw_fini(void *handle)
if (adev->vm_manager.enabled) {
for (i = 0; i < AMDGPU_NUM_VM; ++i)
- amdgpu_fence_unref(&adev->vm_manager.active[i]);
+ fence_put(adev->vm_manager.act
[PATCH 5/9] drm/amdgpu: move ring_from_fence to common code
From: Christian König
Going to need that elsewhere as well.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 24
drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 23 ++-
3 files changed, 27 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index dd7d2ce..6d9c929 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1231,6 +1231,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct
amdgpu_ring *ring,
struct amdgpu_irq_src *irq_src, unsigned irq_type,
enum amdgpu_ring_type ring_type);
void amdgpu_ring_fini(struct amdgpu_ring *ring);
+struct amdgpu_ring *amdgpu_ring_from_fence(struct fence *f);
/*
* CS.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index b2df348..78e9b0f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -436,6 +436,30 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring)
}
}
+/**
+ * amdgpu_ring_from_fence - get ring from fence
+ *
+ * @f: fence structure
+ *
+ * Extract the ring a fence belongs to. Handles both scheduler as
+ * well as hardware fences.
+ */
+struct amdgpu_ring *amdgpu_ring_from_fence(struct fence *f)
+{
+ struct amdgpu_fence *a_fence;
+ struct amd_sched_fence *s_fence;
+
+ s_fence = to_amd_sched_fence(f);
+ if (s_fence)
+ return container_of(s_fence->sched, struct amdgpu_ring, sched);
+
+ a_fence = to_amdgpu_fence(f);
+ if (a_fence)
+ return a_fence->ring;
+
+ return NULL;
+}
+
/*
* Debugfs info
*/
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 3f48759..0212b31 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@ -139,25 +139,6 @@ int amdgpu_sa_bo_manager_suspend(struct amdgpu_device
*adev,
return r;
}
-static uint32_t amdgpu_sa_get_ring_from_fence(struct fence *f)
-{
- struct amdgpu_fence *a_fence;
- struct amd_sched_fence *s_fence;
-
- s_fence = to_amd_sched_fence(f);
- if (s_fence) {
- struct amdgpu_ring *ring;
-
- ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
- return ring->idx;
- }
-
- a_fence = to_amdgpu_fence(f);
- if (a_fence)
- return a_fence->ring->idx;
- return 0;
-}
-
static void amdgpu_sa_bo_remove_locked(struct amdgpu_sa_bo *sa_bo)
{
struct amdgpu_sa_manager *sa_manager = sa_bo->manager;
@@ -318,7 +299,7 @@ static bool amdgpu_sa_bo_next_hole(struct amdgpu_sa_manager
*sa_manager,
}
if (best_bo) {
- uint32_t idx = amdgpu_sa_get_ring_from_fence(best_bo->fence);
+ uint32_t idx = amdgpu_ring_from_fence(best_bo->fence)->idx;
++tries[idx];
sa_manager->hole = best_bo->olist.prev;
@@ -412,7 +393,7 @@ void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct
amdgpu_sa_bo **sa_bo,
if (fence && !fence_is_signaled(fence)) {
uint32_t idx;
(*sa_bo)->fence = fence_get(fence);
- idx = amdgpu_sa_get_ring_from_fence(fence);
+ idx = amdgpu_ring_from_fence(fence)->idx;
list_add_tail(&(*sa_bo)->flist, &sa_manager->flist[idx]);
} else {
amdgpu_sa_bo_remove_locked(*sa_bo);
--
1.9.1
[PATCH 4/9] drm/amdgpu: switch to common fence_wait_any_timeout v2
From: Christian König
No need to duplicate the functionality any more.
v2: fix handling if no fence is available.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher (v1)
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 --
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 98 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c| 20 ---
3 files changed, 13 insertions(+), 109 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a9c0def..dd7d2ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -447,10 +447,6 @@ int amdgpu_fence_wait_next(struct amdgpu_ring *ring);
int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
-signed long amdgpu_fence_wait_any(struct fence **array,
- uint32_t count,
- bool intr,
- signed long t);
struct amdgpu_fence *amdgpu_fence_ref(struct amdgpu_fence *fence);
void amdgpu_fence_unref(struct amdgpu_fence **fence);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 663caa9..c4bb282 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -822,104 +822,6 @@ static const char *amdgpu_fence_get_timeline_name(struct
fence *f)
return (const char *)fence->ring->name;
}
-static bool amdgpu_test_signaled_any(struct fence **fences, uint32_t count)
-{
- int idx;
- struct fence *fence;
-
- for (idx = 0; idx < count; ++idx) {
- fence = fences[idx];
- if (fence) {
- if (test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->flags))
- return true;
- }
- }
- return false;
-}
-
-struct amdgpu_wait_cb {
- struct fence_cb base;
- struct task_struct *task;
-};
-
-static void amdgpu_fence_wait_cb(struct fence *fence, struct fence_cb *cb)
-{
- struct amdgpu_wait_cb *wait =
- container_of(cb, struct amdgpu_wait_cb, base);
- wake_up_process(wait->task);
-}
-
-/**
- * Wait the fence array with timeout
- *
- * @array:the fence array with amdgpu fence pointer
- * @count:the number of the fence array
- * @intr: when sleep, set the current task interruptable or not
- * @t:timeout to wait
- *
- * It will return when any fence is signaled or timeout.
- */
-signed long amdgpu_fence_wait_any(struct fence **array, uint32_t count,
- bool intr, signed long t)
-{
- struct amdgpu_wait_cb *cb;
- struct fence *fence;
- unsigned idx;
-
- BUG_ON(!array);
-
- cb = kcalloc(count, sizeof(struct amdgpu_wait_cb), GFP_KERNEL);
- if (cb == NULL) {
- t = -ENOMEM;
- goto err_free_cb;
- }
-
- for (idx = 0; idx < count; ++idx) {
- fence = array[idx];
- if (fence) {
- cb[idx].task = current;
- if (fence_add_callback(fence,
- &cb[idx].base, amdgpu_fence_wait_cb)) {
- /* The fence is already signaled */
- goto fence_rm_cb;
- }
- }
- }
-
- while (t > 0) {
- if (intr)
- set_current_state(TASK_INTERRUPTIBLE);
- else
- set_current_state(TASK_UNINTERRUPTIBLE);
-
- /*
-* amdgpu_test_signaled_any must be called after
-* set_current_state to prevent a race with wake_up_process
-*/
- if (amdgpu_test_signaled_any(array, count))
- break;
-
- t = schedule_timeout(t);
-
- if (t > 0 && intr && signal_pending(current))
- t = -ERESTARTSYS;
- }
-
- __set_current_state(TASK_RUNNING);
-
-fence_rm_cb:
- for (idx = 0; idx < count; ++idx) {
- fence = array[idx];
- if (fence && cb[idx].base.func)
- fence_remove_callback(fence, &cb[idx].base);
- }
-
-err_free_cb:
- kfree(cb);
-
- return t;
-}
-
const struct fence_ops amdgpu_fence_ops = {
.get_driver_name = amdgpu_fence_get_driver_name,
.get_timeline_name = amdgpu_fence_get_timeline_name,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 5cb27d5..3f48759 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@ -337,6 +337,7 @@ int amdgpu_sa_bo_new(struct amdgpu_device *adev,
{
struct fence *fences[AMDGPU_MAX_RINGS];
unsigned tries[AMDGPU_MAX_RINGS];
+ unsigned count;
int i, r;
[PATCH 3/9] drm/amdgpu: remove unneeded fence functions
From: Christian König
amdgpu_fence_default_wait isn't needed any more the default wait does the same
thing and amdgpu_test_signaled is dead as well.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 003a219..663caa9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -822,11 +822,6 @@ static const char *amdgpu_fence_get_timeline_name(struct
fence *f)
return (const char *)fence->ring->name;
}
-static inline bool amdgpu_test_signaled(struct amdgpu_fence *fence)
-{
- return test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->base.flags);
-}
-
static bool amdgpu_test_signaled_any(struct fence **fences, uint32_t count)
{
int idx;
@@ -854,12 +849,6 @@ static void amdgpu_fence_wait_cb(struct fence *fence,
struct fence_cb *cb)
wake_up_process(wait->task);
}
-static signed long amdgpu_fence_default_wait(struct fence *f, bool intr,
-signed long t)
-{
- return amdgpu_fence_wait_any(&f, 1, intr, t);
-}
-
/**
* Wait the fence array with timeout
*
@@ -936,6 +925,6 @@ const struct fence_ops amdgpu_fence_ops = {
.get_timeline_name = amdgpu_fence_get_timeline_name,
.enable_signaling = amdgpu_fence_enable_signaling,
.signaled = amdgpu_fence_is_signaled,
- .wait = amdgpu_fence_default_wait,
+ .wait = fence_default_wait,
.release = NULL,
};
--
1.9.1
[PATCH 2/9] dma-buf/fence: add fence_is_later()
From: Christian König
Return true when fence 1 is later than fence 2 without
checking if any of them are signaled.
Useful for driver specific resource handling based on fences.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
---
include/linux/fence.h | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/include/linux/fence.h b/include/linux/fence.h
index a4084d6..bb52201 100644
--- a/include/linux/fence.h
+++ b/include/linux/fence.h
@@ -280,6 +280,22 @@ fence_is_signaled(struct fence *fence)
}
/**
+ * fence_is_later - return if f1 is chronologically later than f2
+ * @f1:[in]the first fence from the same context
+ * @f2:[in]the second fence from the same context
+ *
+ * Returns true if f1 is chronologically later than f2. Both fences must be
+ * from the same context, since a seqno is not re-used across contexts.
+ */
+static inline bool fence_is_later(struct fence *f1, struct fence *f2)
+{
+ if (WARN_ON(f1->context != f2->context))
+ return false;
+
+ return f1->seqno - f2->seqno < INT_MAX;
+}
+
+/**
* fence_later - return the chronologically later fence
* @f1:[in]the first fence from the same context
* @f2:[in]the second fence from the same context
@@ -298,10 +314,10 @@ static inline struct fence *fence_later(struct fence *f1,
struct fence *f2)
* set if enable_signaling wasn't called, and enabling that here is
* overkill.
*/
- if (f2->seqno - f1->seqno <= INT_MAX)
- return fence_is_signaled(f2) ? NULL : f2;
- else
+ if (fence_is_later(f1, f2))
return fence_is_signaled(f1) ? NULL : f1;
+ else
+ return fence_is_signaled(f2) ? NULL : f2;
}
signed long fence_wait_timeout(struct fence *, bool intr, signed long timeout);
--
1.9.1
[PATCH 1/9] dma-buf/fence: add fence_wait_any_timeout function v2
From: Christian König
Waiting for the first fence in an array of fences to signal.
This is useful for device driver specific resource managers
and also Vulkan needs something similar.
v2: more parameter checks, handling for timeout==0,
remove NULL entry support, better callback removal.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
Reviewed-by: Maarten Lankhorst
---
drivers/dma-buf/fence.c | 98 +
include/linux/fence.h | 3 +-
2 files changed, 100 insertions(+), 1 deletion(-)
diff --git a/drivers/dma-buf/fence.c b/drivers/dma-buf/fence.c
index 50ef8bd..7b05dbe 100644
--- a/drivers/dma-buf/fence.c
+++ b/drivers/dma-buf/fence.c
@@ -397,6 +397,104 @@ out:
}
EXPORT_SYMBOL(fence_default_wait);
+static bool
+fence_test_signaled_any(struct fence **fences, uint32_t count)
+{
+ int i;
+
+ for (i = 0; i < count; ++i) {
+ struct fence *fence = fences[i];
+ if (test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->flags))
+ return true;
+ }
+ return false;
+}
+
+/**
+ * fence_wait_any_timeout - sleep until any fence gets signaled
+ * or until timeout elapses
+ * @fences:[in]array of fences to wait on
+ * @count: [in]number of fences to wait on
+ * @intr: [in]if true, do an interruptible wait
+ * @timeout: [in]timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
+ *
+ * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if
+ * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies
+ * on success.
+ *
+ * Synchronous waits for the first fence in the array to be signaled. The
+ * caller needs to hold a reference to all fences in the array, otherwise a
+ * fence might be freed before return, resulting in undefined behavior.
+ */
+signed long
+fence_wait_any_timeout(struct fence **fences, uint32_t count,
+ bool intr, signed long timeout)
+{
+ struct default_wait_cb *cb;
+ signed long ret = timeout;
+ unsigned i;
+
+ if (WARN_ON(!fences || !count || timeout < 0))
+ return -EINVAL;
+
+ if (timeout == 0) {
+ for (i = 0; i < count; ++i)
+ if (fence_is_signaled(fences[i]))
+ return 1;
+
+ return 0;
+ }
+
+ cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL);
+ if (cb == NULL) {
+ ret = -ENOMEM;
+ goto err_free_cb;
+ }
+
+ for (i = 0; i < count; ++i) {
+ struct fence *fence = fences[i];
+
+ if (fence->ops->wait != fence_default_wait) {
+ ret = -EINVAL;
+ goto fence_rm_cb;
+ }
+
+ cb[i].task = current;
+ if (fence_add_callback(fence, &cb[i].base,
+ fence_default_wait_cb)) {
+ /* This fence is already signaled */
+ goto fence_rm_cb;
+ }
+ }
+
+ while (ret > 0) {
+ if (intr)
+ set_current_state(TASK_INTERRUPTIBLE);
+ else
+ set_current_state(TASK_UNINTERRUPTIBLE);
+
+ if (fence_test_signaled_any(fences, count))
+ break;
+
+ ret = schedule_timeout(ret);
+
+ if (ret > 0 && intr && signal_pending(current))
+ ret = -ERESTARTSYS;
+ }
+
+ __set_current_state(TASK_RUNNING);
+
+fence_rm_cb:
+ while (i-- > 0)
+ fence_remove_callback(fences[i], &cb[i].base);
+
+err_free_cb:
+ kfree(cb);
+
+ return ret;
+}
+EXPORT_SYMBOL(fence_wait_any_timeout);
+
/**
* fence_init - Initialize a custom fence.
* @fence: [in]the fence to initialize
diff --git a/include/linux/fence.h b/include/linux/fence.h
index 39efee1..a4084d6 100644
--- a/include/linux/fence.h
+++ b/include/linux/fence.h
@@ -305,7 +305,8 @@ static inline struct fence *fence_later(struct fence *f1,
struct fence *f2)
}
signed long fence_wait_timeout(struct fence *, bool intr, signed long timeout);
-
+signed long fence_wait_any_timeout(struct fence **fences, uint32_t count,
+ bool intr, signed long timeout);
/**
* fence_wait - sleep until the fence gets signaled
--
1.9.1
Patches for 4.4
Hi Alex, as discussed just the whole set of patches for you to pick up. Regards, Christian.
[PATCH v8 06/17] dt-bindings: add document for analogix display port driver
On 10/29/2015 04:40 PM, Heiko Stuebner wrote: > Am Donnerstag, 29. Oktober 2015, 09:12:21 schrieb Yakir Yang: >> Hi Heiko, >> >> On 10/29/2015 04:02 AM, Heiko Stuebner wrote: >>> Hi Yakir, >>> >>> Am Mittwoch, 28. Oktober 2015, 16:26:33 schrieb Yakir Yang: >>>> diff --git >>>> a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >>>> b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >>>> index 7a3a9cd..9905081 100644 >>>> --- a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >>>> +++ b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >>>> @@ -31,45 +31,31 @@ Required properties for dp-controller: >>>>from general PHY binding: the phandle for the PHY >>>> device. >>>>-phy-names: >>>>from general PHY binding: Should be "dp". >>>> - -samsung,color-space: >>>> - input video data format. >>>> - COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2 >>>> - -samsung,dynamic-range: >>>> - dynamic range for input video data. >>>> - VESA = 0, CEA = 1 >>>> - -samsung,ycbcr-coeff: >>>> - YCbCr co-efficients for input video. >>>> - COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1 >>>> - -samsung,color-depth: >>>> - number of bits per colour component. >>>> - COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3 >>>> - -samsung,link-rate: >>>> - link rate supported by the panel. >>>> - LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A >>>> - -samsung,lane-count: >>>> - number of lanes supported by the panel. >>>> - LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4 >>>> - - display-timings: timings for the connected panel as described by >>>> - Documentation/devicetree/bindings/video/display-timing.txt >>> >>> ^^ display/display-timings.txt >>> otherwise this patch does not apply. >> I thought I have deleted this old path of "display-timing.txt", and >> changed it to >> >> -Documentation/devicetree/bindings/video/display-timing.txt > in the changes I got from Rob Hering's dt-branch [0] the path in the file > is already display/display-timing.txt so applying a change with video/... > in it fails. Anyway, as this will probably only make it in after the merge- > window, we can see how this ends up before anyway :-) . Agree > >> + >> Documentation/devicetree/bindings/display/panel/display-timing.txt >> >> And the real path of "display-timing.txt" in linux-next [tag 20151022] >> do under >> the "display/panel/", those change should be right. > > Heiko > > [0] > https://git.kernel.org/cgit/linux/kernel/git/robh/linux.git/commit/?h=dt/next&id=efdbd7345f8836f7495f3ac6ee237d86cb3bb6b0 Found some conflicting things in that commit: He move the display-timing.txt from "video/" to "display/panel" diff --git a/Documentation/devicetree/bindings/video/display-timing.txt b/Documentation/devicetree/bindings/display/panel/display-timing.txt index e1d4a0b..e1d4a0b 100644 --- a/Documentation/devicetree/bindings/video/display-timing.txt <https://git.kernel.org/cgit/linux/kernel/git/robh/linux.git/tree/Documentation/devicetree/bindings/video/display-timing.txt?h=dt/next&id=9ffecb10283508260936b96022d4ee43a7798b4c> +++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt <https://git.kernel.org/cgit/linux/kernel/git/robh/linux.git/tree/Documentation/devicetree/bindings/display/panel/display-timing.txt?h=dt/next&id=efdbd7345f8836f7495f3ac6ee237d86cb3bb6b0> But didn't give the real path to other documents --- a/Documentation/devicetree/bindings/video/fsl,imx-fb.txt <https://git.kernel.org/cgit/linux/kernel/git/robh/linux.git/tree/Documentation/devicetree/bindings/video/fsl,imx-fb.txt?h=dt/next&id=9ffecb10283508260936b96022d4ee43a7798b4c> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt <https://git.kernel.org/cgit/linux/kernel/git/robh/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt?h=dt/next&id=efdbd7345f8836f7495f3ac6ee237d86cb3bb6b0> @@ -9,7 +9,7 @@ Required properties: Required nodes: - display: Phandle to a display node as described in - Documentation/devicetree/bindings/video/display-timing.txt + Documentation/devicetree/bindings/display/display-timing.txt Additional, the display node has to define properties: - bits-per-pixel: Bits per pixel - fsl,pcr: LCDC PCR value Thanks, - Yakir > > > -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151029/d2b5713b/attachment-0001.html>
[patch] drm: crtc: integer overflow in drm_property_create_blob()
The size here comes from the user via the ioctl, it is a number between
1-u32max so the addition here could overflow on 32 bit systems.
Fixes: f453ba046074 ('DRM: add mode setting support')
Signed-off-by: Dan Carpenter
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index e54660a..627b2d0 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -4107,7 +4107,7 @@ drm_property_create_blob(struct drm_device *dev, size_t
length,
struct drm_property_blob *blob;
int ret;
- if (!length)
+ if (!length || length > ULONG_MAX - sizeof(struct drm_property_blob))
return ERR_PTR(-EINVAL);
blob = kzalloc(sizeof(struct drm_property_blob)+length, GFP_KERNEL);
[PATCH v6 2/2] drm/dp: Set aux.dev to the drm_connector device, instead of drm_device.
So far, the i915 driver and some other drivers set it to the drm_device,
which doesn't allow one to know which DP a given aux channel is related
to. Changing this to be the drm_connector provides proper nesting, still
allowing one to get the drm_device from it. Some drivers already set it
to the drm_connector.
This also removes the need to add a sysfs link for the i2c device under
the connector, as it will already be there.
Signed-off-by: Rafael Antognolli
---
drivers/gpu/drm/i915/intel_dp.c | 19 ++-
1 file changed, 2 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8287df4..7aacc08 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1078,36 +1078,21 @@ intel_dp_aux_init(struct intel_dp *intel_dp, struct
intel_connector *connector)
intel_dp->aux_ch_ctl_reg = intel_dp->output_reg + 0x10;
intel_dp->aux.name = name;
- intel_dp->aux.dev = dev->dev;
+ intel_dp->aux.dev = connector->base.kdev;
intel_dp->aux.transfer = intel_dp_aux_transfer;
DRM_DEBUG_KMS("registering %s bus for %s\n", name,
connector->base.kdev->kobj.name);
ret = drm_dp_aux_register(&intel_dp->aux);
- if (ret < 0) {
+ if (ret < 0)
DRM_ERROR("drm_dp_aux_register() for %s failed (%d)\n",
name, ret);
- return;
- }
-
- ret = sysfs_create_link(&connector->base.kdev->kobj,
- &intel_dp->aux.ddc.dev.kobj,
- intel_dp->aux.ddc.dev.kobj.name);
- if (ret < 0) {
- DRM_ERROR("sysfs_create_link() for %s failed (%d)\n", name,
ret);
- drm_dp_aux_unregister(&intel_dp->aux);
- }
}
static void
intel_dp_connector_unregister(struct intel_connector *intel_connector)
{
- struct intel_dp *intel_dp = intel_attached_dp(&intel_connector->base);
-
- if (!intel_connector->mst_port)
- sysfs_remove_link(&intel_connector->base.kdev->kobj,
- intel_dp->aux.ddc.dev.kobj.name);
intel_connector_unregister(intel_connector);
}
--
2.4.3
[PATCH v6 1/2] drm/dp: Add a drm_aux-dev module for reading/writing dpcd registers.
This module is heavily based on i2c-dev. Once loaded, it provides one
dev node per DP AUX channel, named drm_dp_auxN, where N is an integer.
It's possible to know which connector owns this aux channel by looking
at the respective sysfs /sys/class/drm_aux_dev/drm_dp_auxN/connector, if
the connector device pointer was correctly set in the aux helper struct.
Two main operations are provided on the registers read and write. The
address of the register to be read or written is given using lseek. The
seek position is updated upon read or write.
Signed-off-by: Rafael Antognolli
---
drivers/gpu/drm/Kconfig | 8 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/drm_dp_aux_dev.c | 381 +++
drivers/gpu/drm/drm_dp_helper.c | 5 +
include/drm/drm_dp_aux_dev.h | 50 +
5 files changed, 445 insertions(+)
create mode 100644 drivers/gpu/drm/drm_dp_aux_dev.c
create mode 100644 include/drm/drm_dp_aux_dev.h
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c4bf9a1..daefcce 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -25,6 +25,14 @@ config DRM_MIPI_DSI
bool
depends on DRM
+config DRM_DP_AUX_CHARDEV
+ bool "DRM DP AUX Interface"
+ depends on DRM
+ help
+ Choose this option to enable a /dev/drm_dp_auxN node that allows to
+ read and write values to arbitrary DPCD registers on the DP aux
+ channel.
+
config DRM_KMS_HELPER
tristate
depends on DRM
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 1e9ff4c..e48ec8f 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -28,6 +28,7 @@ drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o
drm_probe_helper.o \
drm_kms_helper-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o
drm_kms_helper-$(CONFIG_DRM_FBDEV_EMULATION) += drm_fb_helper.o
drm_kms_helper-$(CONFIG_DRM_KMS_CMA_HELPER) += drm_fb_cma_helper.o
+drm_kms_helper-$(CONFIG_DRM_DP_AUX_CHARDEV) += drm_dp_aux_dev.o
obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
diff --git a/drivers/gpu/drm/drm_dp_aux_dev.c b/drivers/gpu/drm/drm_dp_aux_dev.c
new file mode 100644
index 000..16dbc2e
--- /dev/null
+++ b/drivers/gpu/drm/drm_dp_aux_dev.c
@@ -0,0 +1,381 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Rafael Antognolli
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct drm_dp_aux_dev {
+ unsigned index;
+ struct drm_dp_aux *aux;
+ struct device *dev;
+ struct kref refcount;
+ atomic_t usecount;
+};
+
+#define DRM_AUX_MINORS 256
+#define AUX_MAX_OFFSET (1 << 20)
+static DEFINE_IDR(aux_idr);
+static DEFINE_MUTEX(aux_idr_mutex);
+static struct class *drm_dp_aux_dev_class;
+static int drm_dev_major = -1;
+
+static struct drm_dp_aux_dev *drm_dp_aux_dev_get_by_minor(unsigned index)
+{
+ struct drm_dp_aux_dev *aux_dev = NULL;
+
+ mutex_lock(&aux_idr_mutex);
+ aux_dev = idr_find(&aux_idr, index);
+ if (!kref_get_unless_zero(&aux_dev->refcount))
+ aux_dev = NULL;
+ mutex_unlock(&aux_idr_mutex);
+
+ return aux_dev;
+}
+
+static struct drm_dp_aux_dev *alloc_drm_dp_aux_dev(struct drm_dp_aux *aux)
+{
+ struct drm_dp_aux_dev *aux_dev;
+ int index;
+
+
+ aux_dev = kzalloc(sizeof(*aux_dev), GFP_KERNEL);
+ if (!aux_dev)
+ return ERR_PTR(-ENOMEM);
+ aux_dev->aux = aux;
+ atomic_set(&aux_dev->usecount, 1);
+ kref_init(&aux_dev->refcount);
+
+ mutex_lock(&aux_idr_mutex);
+ index = idr_alloc_cyclic(&aux_idr, aux_dev, 0, DRM_AUX_MINORS,
+GFP_KERNEL);
+ mutex_unlock(&aux_idr_mutex);
+ if (index < 0) {
+ kfree(
[PATCH v6 0/2] Add drm_dp_aux chardev support.
This series implement support to a drm_dp_aux chardev that allows reading and writing an arbitrary amount of bytes to arbitrary dpcd register addresses using regular read, write and lseek operations. v2: - lseek is used to select the register to read/write - read/write are used instead of ioctl - no blocking_notifier is used, just a direct callback v3: - use drm_dp_aux_dev prefix for public functions - chardev is named drm_dp_auxN - read/write don't allocate a buffer anymore, and transfer up to 16 bytes a time - remove notifier list from the implementation - option on menuconfig is now a boolean - add inline stub functions to avoid breakage when this option is disabled v4: - fix build system changes - actually disable this module when not selected. v5: - Use kref to avoid device closing while still in use - Don't use list, use an idr for storing aux_dev - Remove "connector" attribute - set aux.dev to the connector drm_connector device, instead of drm_device v6: - Use atomic_t for usage count - Use a mutex instead of spinlock for idr lock - Destroy chardev immediately on unregister - other minor suggestions from Ville Rafael Antognolli (2): drm/dp: Add a drm_aux-dev module for reading/writing dpcd registers. drm/dp: Set aux.dev to the drm_connector device, instead of drm_device. drivers/gpu/drm/Kconfig | 8 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_dp_aux_dev.c | 381 +++ drivers/gpu/drm/drm_dp_helper.c | 5 + drivers/gpu/drm/i915/intel_dp.c | 19 +- include/drm/drm_dp_aux_dev.h | 50 + 6 files changed, 447 insertions(+), 17 deletions(-) create mode 100644 drivers/gpu/drm/drm_dp_aux_dev.c create mode 100644 include/drm/drm_dp_aux_dev.h -- 2.4.3
[PATCH v4 2/6] apple-gmux: Add switch_ddc support
Hi Alex,
On Mon, Oct 12, 2015 at 05:10:20PM -0400, Alex Deucher wrote:
> On Mon, Oct 12, 2015 at 5:07 PM, Alex Deucher
> wrote:
> > On Fri, Aug 14, 2015 at 12:18 PM, Lukas Wunner wrote:
> >> Originally by Seth Forshee , 2012-10-04:
> >> The gmux allows muxing the DDC independently from the display, so
> >> support this functionality. This will allow reading the EDID for the
> >> inactive GPU, fixing issues with machines that either don't have a
> >> VBT or have invalid mode data in the VBT.
> >>
> >> Modified by Lukas Wunner , 2015-10-07:
> >> Advertise ->switch_ddc handler callback only on the pre-retina
> >> Macbook Pro. The retina uses eDP and its mux is incapable of
> >> switching the AUX channel separately from the main link.
> >> It's an NXP CBTL06142 (alternate parts: TI HD3SS212,
> >> Pericom PPI3VDP12412).
> >>
> >> Sources:
> >> http://www.electronicproducts.com/-whatsinside_text-145.aspx
> >>
> >> http://slideshare.net/jjwu6266/apple-2012-wwdc-apple-macbook-pro-with-retina-display
> >>
> >> http://www.techrepublic.com/blog/cracking-open/teardown-shows-retina-macbook-pro-is-nearly-impossible-to-upgrade-difficult-to-work-on/
> >>
> >> Datasheets:
> >> http://www.nxp.com/documents/data_sheet/CBTL06141.pdf
> >> http://www.ti.com/lit/ds/symlink/hd3ss212.pdf
> >> https://www.pericom.com/assets/Datasheets/PI3VDP12412.pdf
> >>
> >> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
> >> Tested-by: Lukas Wunner
> >> [MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
> >>
> >> Cc: Seth Forshee
> >> Signed-off-by: Lukas Wunner
> >> ---
> >> drivers/platform/x86/apple-gmux.c | 21 +++--
> >> 1 file changed, 19 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/platform/x86/apple-gmux.c
> >> b/drivers/platform/x86/apple-gmux.c
> >> index 0dec3f5..78997b7 100644
> >> --- a/drivers/platform/x86/apple-gmux.c
> >> +++ b/drivers/platform/x86/apple-gmux.c
> >> @@ -276,11 +276,9 @@ static const struct backlight_ops gmux_bl_ops = {
> >> static int gmux_switchto(enum vga_switcheroo_client_id id)
> >> {
> >> if (id == VGA_SWITCHEROO_IGD) {
> >> - gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DDC, 1);
> >> gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DISPLAY, 2);
> >> gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_EXTERNAL, 2);
> >> } else {
> >> - gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DDC, 2);
> >> gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DISPLAY, 3);
> >> gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_EXTERNAL, 3);
> >> }
> >
> > Won't this hunk break manual switching until the later patches land?
> > Seems like you might want to break this out as a separate patch later
> > in the series.
>
> Also. I'm not sure how the gmux works, but this might break ddc on
> external displays that are muxed.
I had to do some experimenting and research to clarify this definitively,
hence the belated reply.
Answer is no, GMUX_PORT_SWITCH_DDC only switches DDC of the panel.
The first two generations of the MacBook Pro (MBP 5 2008/09, MBP 6 2010)
are able to switch the external DP port between GPUs, but only in its
entirety. The mux used for this (NXP CBTL06141) is not capable of
switching DDC separately. It's controlled by GMUX_PORT_SWITCH_EXTERNAL.
The following two generations (MBP 8 2011, MBP 9 2012) replaced the
external DP port with a combined DP/Thunderbolt port which can drive
either a single "dumb" DP display or two daisy-chained Thunderbolt
displays using DP-over-Thunderbolt. The ability to switch the external
port in its entirety was given up but the AUX channel is still switchable,
under the control of GMUX_PORT_SWITCH_EXTERNAL.
The port appears disabled to the Intel GPU, but I hacked i915 to
force-enable pipe B and all DP ports and was then able to retrieve
DPCD and EDID from an external display.
The retina MBP gained a second DP/Thunderbolt port and an HDMI port
and is still able to switch AUX to the integrated GPU on both DP ports!
I wonder why Apple went to these lengths. Maybe they found that HPD is
unreliable, so they let the Intel GPU poll AUX and wake up the discrete
GPU if anything is detected?
Best regards,
Lukas
>
> Alex
>
> >
> > Alex
> >
> >
> >> @@ -288,6 +286,18 @@ static int gmux_switchto(enum
> >> vga_switcheroo_client_id id)
> >> return 0;
> >> }
> >>
> >> +static int gmux_switch_ddc(enum vga_switcheroo_client_id id)
> >> +{
> >> + pr_debug("Switching gmux DDC to %d\n", id);
> >> +
> >> + if (id == VGA_SWITCHEROO_IGD)
> >> + gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DDC, 1);
> >> + else
> >> + gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DDC, 2);
> >> +
> >> + return 0;
> >> +}
> >> +
> >> static int gmux_set_di
[PATCH] drm/sti: Remove select of CONFIG_FW_LOADER_USER_HELPER_FALLBACK
On Thu, 29 Oct 2015 15:37:51 +0100, Emil Velikov wrote: > > On 29 October 2015 at 14:21, Vincent ABRIOU wrote: > > Hi Takashi, > > > > Removing FW_LOADER_USER_HELPER_FALLBACK leads to a failure in our HQVDP > > firmware execution. > > Indeed, our firmware is not built-in. It is a proprietary firmware > > uploaded into the file system that's why we need the > > USER_HELPER_FALLBACK to be able to load it once file system is available. > > > Hmm most other DRM drivers also require firmware. Whist some allow the > firmware to be picked in initrd it's not a strict requirement. > So I'm wondering how come there hasn't been (m)any reports, > considering that neither one sets USER_HELPER_FALLBACK. > > Perhaps they also need it, or something in the sti module is done > differently ? Just some food for thought. It's the option each user decides to set or not, depending on the deployed system. Most of PCs don't need them, and actually enabling this option causes troubles for them. On other embedded systems, this might be still needed. So, it's the system setup issue, and not the thing a driver needs to care. Imagine that your driver has "select EXT3_FS" because your system requires it; without that option, it won't boot, OMG! Is it the right thing? Obviously no. The same logic is applied to this case, too. Takashi
[PATCH] drm/sti: Remove select of CONFIG_FW_LOADER_USER_HELPER_FALLBACK
On Thu, 29 Oct 2015 15:21:35 +0100,
Vincent ABRIOU wrote:
>
> Hi Takashi,
>
> Removing FW_LOADER_USER_HELPER_FALLBACK leads to a failure in our HQVDP
> firmware execution.
> Indeed, our firmware is not built-in. It is a proprietary firmware
> uploaded into the file system that's why we need the
> USER_HELPER_FALLBACK to be able to load it once file system is available.
It's not the option a driver can set. It's a global control option
that is applied *all* drivers.
If the fallback behavior is mandatory by a weird reason, you'd need to
adjust in a different way; e.g. modify the firmware loader code to
provide a new API for the driver to give a fallback (i.e. the another
flip of request_firmware_direct()) and use that API explicitly.
But I don't believe it's the case. Judging from your comment, it's
your system setup that requires the user-space fallback. So don't
make the fallback thing mandatory.
thanks,
Takashi
>
> BR
> Vincent
>
> On 10/19/2015 08:16 AM, Takashi Iwai wrote:
> > The commit [4fdbc678fe4d: drm: sti: add HQVDP plane] added the select
> > of CONFIG_FW_LOADER_USER_HELPER_FALLBACK by some unwritten reason.
> > But this config is known to be harmful, and is present only for
> > compatibility reason for an old exotic system that mandates udev
> > interaction which isn't supposed to be selected by a driver.
> > Let's remove it.
> >
> > Fixes: 4fdbc678fe4d ('drm: sti: add HQVDP plane')
> > Cc:
> > Signed-off-by: Takashi Iwai
> > ---
> > drivers/gpu/drm/sti/Kconfig | 1 -
> > 1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/sti/Kconfig b/drivers/gpu/drm/sti/Kconfig
> > index fbccc105819b..a18159074b76 100644
> > --- a/drivers/gpu/drm/sti/Kconfig
> > +++ b/drivers/gpu/drm/sti/Kconfig
> > @@ -6,7 +6,6 @@ config DRM_STI
> > select DRM_GEM_CMA_HELPER
> > select DRM_KMS_CMA_HELPER
> > select DRM_PANEL
> > - select FW_LOADER_USER_HELPER_FALLBACK
> > help
> > Choose this option to enable DRM on STM stiH41x chipset
> >
> >
[PATCH] ARM: multi_v7_defconfig: enable Exynos DRM Mixer driver
Mixer driver is selected by CONFIG_DRM_EXYNOS_HDMI option. Since Exynos5433 HDMI does not require Mixer and there are separate options to select Mixer and HDMI. Signed-off-by: Andrzej Hajda --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 03deb7f..ca5e928 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -449,6 +449,7 @@ CONFIG_DRM_NOUVEAU=m CONFIG_DRM_EXYNOS=m CONFIG_DRM_EXYNOS_DSI=y CONFIG_DRM_EXYNOS_FIMD=y +CONFIG_DRM_EXYNOS_MIXER=y CONFIG_DRM_EXYNOS_HDMI=y CONFIG_DRM_RCAR_DU=m CONFIG_DRM_TEGRA=y -- 1.9.1
[PATCH] drm/sti: Remove select of CONFIG_FW_LOADER_USER_HELPER_FALLBACK
Hi Takashi,
Removing FW_LOADER_USER_HELPER_FALLBACK leads to a failure in our HQVDP
firmware execution.
Indeed, our firmware is not built-in. It is a proprietary firmware
uploaded into the file system that's why we need the
USER_HELPER_FALLBACK to be able to load it once file system is available.
BR
Vincent
On 10/19/2015 08:16 AM, Takashi Iwai wrote:
> The commit [4fdbc678fe4d: drm: sti: add HQVDP plane] added the select
> of CONFIG_FW_LOADER_USER_HELPER_FALLBACK by some unwritten reason.
> But this config is known to be harmful, and is present only for
> compatibility reason for an old exotic system that mandates udev
> interaction which isn't supposed to be selected by a driver.
> Let's remove it.
>
> Fixes: 4fdbc678fe4d ('drm: sti: add HQVDP plane')
> Cc:
> Signed-off-by: Takashi Iwai
> ---
> drivers/gpu/drm/sti/Kconfig | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/sti/Kconfig b/drivers/gpu/drm/sti/Kconfig
> index fbccc105819b..a18159074b76 100644
> --- a/drivers/gpu/drm/sti/Kconfig
> +++ b/drivers/gpu/drm/sti/Kconfig
> @@ -6,7 +6,6 @@ config DRM_STI
> select DRM_GEM_CMA_HELPER
> select DRM_KMS_CMA_HELPER
> select DRM_PANEL
> - select FW_LOADER_USER_HELPER_FALLBACK
> help
> Choose this option to enable DRM on STM stiH41x chipset
>
>
[Intel-gfx] HDMI 4k modes VIC
On Thu, Oct 29, 2015 at 08:03:29AM +, Sharma, Shashank wrote: > Actually we should update the cea_modedb in drm layer with 4k modes and > appropriate VIC, coz the AVI infoframe functions are > not getting proper VICs for cea modes. Or while processing alternative cea > modes, we should check and return VICs. That's not surprising since the drm mode lists haven't been updated for 861-F. IIRC Thierry may already have some patches for that, as well as HDMI 2.0. > > I was planning to add 4k at 60 modes, I will probably add one patch there, > for handling the 4k modes in CEA db. > As per CEA-861-F compliance, the 4k at 30 and 4k at 60 modes can come in cea > DB as SVD modes. So we should have VICs for them also. > We will also start upstreaming the patches we added for VLV/CHV, for handling > aspect ratio support in libdrm layer as well as kernel. > > Regards > Shashank > -Original Message- > From: Lespiau, Damien > Sent: Wednesday, October 28, 2015 10:21 PM > To: Jani Nikula > Cc: Sharma, Shashank; intel-gfx at lists.freedesktop.org > Subject: Re: [Intel-gfx] HDMI 4k modes VIC > > On Wed, Oct 28, 2015 at 06:38:21PM +0200, Jani Nikula wrote: > > > Are you seeing a bug? it's totally possible, I've never used an > > > actual conformance tool when I wrote that code, so it's likely buggy > > > and the VIC in the AVI infoframe may well be wrong. > > > > Possibly relevant > > https://bugs.freedesktop.org/show_bug.cgi?id=92217 > > That one looks different, we don't do aspect ratio on modes very well, not > even exposing them to user space. > > -- > Damien > ___ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC
[Intel-gfx] HDMI 4k modes VIC
Thanks for the suggestion. I will check with Thierrey also. Regards Shashank -Original Message- From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] Sent: Thursday, October 29, 2015 6:48 PM To: Sharma, Shashank Cc: Lespiau, Damien; Jani Nikula; intel-gfx at lists.freedesktop.org; dri-devel at lists.freedesktop.org; Thierry Reding Subject: Re: [Intel-gfx] HDMI 4k modes VIC On Thu, Oct 29, 2015 at 08:03:29AM +, Sharma, Shashank wrote: > Actually we should update the cea_modedb in drm layer with 4k modes > and appropriate VIC, coz the AVI infoframe functions are not getting proper > VICs for cea modes. Or while processing alternative cea modes, we should > check and return VICs. That's not surprising since the drm mode lists haven't been updated for 861-F. IIRC Thierry may already have some patches for that, as well as HDMI 2.0. > > I was planning to add 4k at 60 modes, I will probably add one patch there, > for handling the 4k modes in CEA db. > As per CEA-861-F compliance, the 4k at 30 and 4k at 60 modes can come in cea > DB as SVD modes. So we should have VICs for them also. > We will also start upstreaming the patches we added for VLV/CHV, for handling > aspect ratio support in libdrm layer as well as kernel. > > Regards > Shashank > -Original Message- > From: Lespiau, Damien > Sent: Wednesday, October 28, 2015 10:21 PM > To: Jani Nikula > Cc: Sharma, Shashank; intel-gfx at lists.freedesktop.org > Subject: Re: [Intel-gfx] HDMI 4k modes VIC > > On Wed, Oct 28, 2015 at 06:38:21PM +0200, Jani Nikula wrote: > > > Are you seeing a bug? it's totally possible, I've never used an > > > actual conformance tool when I wrote that code, so it's likely > > > buggy and the VIC in the AVI infoframe may well be wrong. > > > > Possibly relevant > > https://bugs.freedesktop.org/show_bug.cgi?id=92217 > > That one looks different, we don't do aspect ratio on modes very well, not > even exposing them to user space. > > -- > Damien > ___ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC
[patch] drm: crtc: integer overflow in drm_property_create_blob()
Hi Dan,
On 29 October 2015 at 13:37, Dan Carpenter wrote:
> The size here comes from the user via the ioctl, it is a number between
> 1-u32max so the addition here could overflow on 32 bit systems.
>
> Fixes: f453ba046074 ('DRM: add mode setting support')
> Signed-off-by: Dan Carpenter
Thanks for catching this. I did have a pass through looking for such
issues but couldn't see any. :\
Reviewed-by: Daniel Stone
Cc: stable at kernel.org # v4.2
Cheers,
Daniel
[PATCH] drm/sti: Remove select of CONFIG_FW_LOADER_USER_HELPER_FALLBACK
On 29 October 2015 at 14:21, Vincent ABRIOU wrote: > Hi Takashi, > > Removing FW_LOADER_USER_HELPER_FALLBACK leads to a failure in our HQVDP > firmware execution. > Indeed, our firmware is not built-in. It is a proprietary firmware > uploaded into the file system that's why we need the > USER_HELPER_FALLBACK to be able to load it once file system is available. > Hmm most other DRM drivers also require firmware. Whist some allow the firmware to be picked in initrd it's not a strict requirement. So I'm wondering how come there hasn't been (m)any reports, considering that neither one sets USER_HELPER_FALLBACK. Perhaps they also need it, or something in the sti module is done differently ? Just some food for thought. Regards, Emil
[PATCH v3 2/3] drm/sti: Remove local fbdev emulation Kconfig option
Hi, I am fine with your proposal to remove DRM_STI_FBDEV but I would like to be able to enable it by a module parameter. This is what I propose in "[PATCH 1/1] drm/sti: enable fbdev compatibility through module param" BR Vincent On 10/27/2015 09:10 AM, Archit Taneja wrote: > DRM_STI_FBDEV config is currently used to enable/disable fbdev emulation > for the sti kms driver. > > Remove this local config option and use the top level DRM_FBDEV_EMULATION > config option instead where applicable. > > We replace the #ifdef in sti_drm_load with CONFIG_DRM_FBDEV_EMULATION. > It's probably okay to get remove the #ifdef itself, but just left it here > for now to be safe. It can be removed after some testing. > > Signed-off-by: Archit Taneja > --- > drivers/gpu/drm/sti/Kconfig | 6 -- > drivers/gpu/drm/sti/sti_drv.c | 2 +- > 2 files changed, 1 insertion(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/sti/Kconfig b/drivers/gpu/drm/sti/Kconfig > index fbccc10..e3aa5af 100644 > --- a/drivers/gpu/drm/sti/Kconfig > +++ b/drivers/gpu/drm/sti/Kconfig > @@ -9,9 +9,3 @@ config DRM_STI > select FW_LOADER_USER_HELPER_FALLBACK > help > Choose this option to enable DRM on STM stiH41x chipset > - > -config DRM_STI_FBDEV > - bool "DRM frame buffer device for STMicroelectronics SoC stiH41x Serie" > - depends on DRM_STI > - help > - Choose this option to enable FBDEV on top of DRM for STM stiH41x > chipset > diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c > index f846996..1b2db6c 100644 > --- a/drivers/gpu/drm/sti/sti_drv.c > +++ b/drivers/gpu/drm/sti/sti_drv.c > @@ -160,7 +160,7 @@ static int sti_load(struct drm_device *dev, unsigned long > flags) > > drm_mode_config_reset(dev); > > -#ifdef CONFIG_DRM_STI_FBDEV > +#ifdef CONFIG_DRM_FBDEV_EMULATION > drm_fbdev_cma_init(dev, 32, > dev->mode_config.num_crtc, > dev->mode_config.num_connector); >
[PATCH] drm/dp: add eDP DPCD backlight control bit definitions
On Thu, 2015-10-29 at 11:03 +0200, Jani Nikula wrote: > Cc: Yetunde Adebisi > Signed-off-by: Jani Nikula > --- > include/drm/drm_dp_helper.h | 36 > 1 file changed, 36 insertions(+) > > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index bb9d0deca07c..1252108da0ef 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -455,16 +455,52 @@ > # define DP_EDP_14 0x03 > > #define DP_EDP_GENERAL_CAP_1 0x701 > +# define DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP(1 << 0) > +# define DP_EDP_BACKLIGHT_PIN_ENABLE_CAP (1 << 1) > +# define DP_EDP_BACKLIGHT_AUX_ENABLE_CAP (1 << 2) > +# define DP_EDP_PANEL_SELF_TEST_PIN_ENABLE_CAP (1 << 3) > +# define DP_EDP_PANEL_SELF_TEST_AUX_ENABLE_CAP (1 << 4) > +# define DP_EDP_FRC_ENABLE_CAP (1 << 5) > +# define DP_EDP_COLOR_ENGINE_CAP (1 << 6) > +# define DP_EDP_SET_POWER_CAP(1 << 7) > > #define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP 0x702 > +# define DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP (1 << 0) > +# define DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP (1 << 1) > +# define DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT (1 << 2) > +# define DP_EDP_BACKLIGHT_AUX_PWM_PRODUCT_CAP(1 << 3) > +# define DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_CAP (1 << 4) > +# define DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP (1 << 5) > +# define DP_EDP_DYNAMIC_BACKLIGHT_CAP(1 << 6) > +# define DP_EDP_VBLANK_BACKLIGHT_UPDATE_CAP (1 << 7) > > #define DP_EDP_GENERAL_CAP_2 0x703 > +# define DP_EDP_OVERDRIVE_ENGINE_ENABLED (1 << 0) > > #define DP_EDP_GENERAL_CAP_3 0x704/* eDP 1.4 */ > +# define DP_EDP_X_REGION_CAP_MASK(0xf << 0) > +# define DP_EDP_X_REGION_CAP_SHIFT 0 > +# define DP_EDP_Y_REGION_CAP_MASK(0xf << 4) > +# define DP_EDP_Y_REGION_CAP_SHIFT 4 > > #define DP_EDP_DISPLAY_CONTROL_REGISTER 0x720 > +# define DP_EDP_BACKLIGHT_ENABLE (1 << 0) > +# define DP_EDP_BLACK_VIDEO_ENABLE (1 << 1) > +# define DP_EDP_FRC_ENABLE (1 << 2) > +# define DP_EDP_COLOR_ENGINE_ENABLE (1 << 3) > +# define DP_EDP_VBLANK_BACKLIGHT_UPDATE_ENABLE (1 << 7) > > #define DP_EDP_BACKLIGHT_MODE_SET_REGISTER 0x721 > +# define DP_EDP_BACKLIGHT_CONTROL_MODE_MASK (3 << 0) > +# define DP_EDP_BACKLIGHT_CONTROL_MODE_PWM (0 << 0) > +# define DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET(1 << 0) > +# define DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD (2 << 0) > +# define DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT (3 << 0) > +# define DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_ENABLE (1 << 2) > +# define DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE(1 << 3) > +# define DP_EDP_DYNAMIC_BACKLIGHT_ENABLE (1 << 4) > +# define DP_EDP_REGIONAL_BACKLIGHT_ENABLE(1 << 5) Doesn't DP_EDP_REGIONAL_BACKLIGHT_ENABLE need a /* eDP 1.4 */ comment too? Anyway, it all matches the spec so, Reviewed-by: Ander Conselvan de Oliveira > +# define DP_EDP_UPDATE_REGION_BRIGHTNESS (1 << 6) /* eDP 1.4 > */ > > #define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB 0x722 > #define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB 0x723
[PATCH 1/1] drm/sti: fix typo issue in sti_mode_config_init
Assign width to width and height to height. Signed-off-by: Vincent Abriou --- drivers/gpu/drm/sti/sti_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c index d47b025..a0b7caa 100644 --- a/drivers/gpu/drm/sti/sti_drv.c +++ b/drivers/gpu/drm/sti/sti_drv.c @@ -128,8 +128,8 @@ static void sti_mode_config_init(struct drm_device *dev) * this value would be used to check framebuffer size limitation * at drm_mode_addfb(). */ - dev->mode_config.max_width = STI_MAX_FB_HEIGHT; - dev->mode_config.max_height = STI_MAX_FB_WIDTH; + dev->mode_config.max_width = STI_MAX_FB_WIDTH; + dev->mode_config.max_height = STI_MAX_FB_HEIGHT; dev->mode_config.funcs = &sti_mode_config_funcs; } -- 1.9.1
[PATCH 1/1] drm/sti: set mixer background color through module param
Add bkgcolor module parameter that allow to change the background
color of the mixer. It can be set with an RGB value coded as 0xRRGGBB.
The default value is black.
Signed-off-by: Vincent Abriou
Signed-off-by: Nicolas VANHAELEWYN
---
drivers/gpu/drm/sti/sti_mixer.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/sti/sti_mixer.c b/drivers/gpu/drm/sti/sti_mixer.c
index 4c18b50..49db835 100644
--- a/drivers/gpu/drm/sti/sti_mixer.c
+++ b/drivers/gpu/drm/sti/sti_mixer.c
@@ -10,6 +10,11 @@
#include "sti_mixer.h"
#include "sti_vtg.h"
+/* Module parameter to set the background color of the mixer */
+static unsigned int bkg_color = 0x00;
+MODULE_PARM_DESC(bkgcolor, "Value of the background color 0xRRGGBB");
+module_param_named(bkgcolor, bkg_color, int, 0644);
+
/* Identity: G=Y , B=Cb , R=Cr */
static const u32 mixerColorSpaceMatIdentity[] = {
0x1000, 0x, 0x1000, 0x1000,
@@ -80,11 +85,9 @@ void sti_mixer_set_background_status(struct sti_mixer
*mixer, bool enable)
}
static void sti_mixer_set_background_color(struct sti_mixer *mixer,
- u8 red, u8 green, u8 blue)
+ unsigned int rgb)
{
- u32 val = (red << 16) | (green << 8) | blue;
-
- sti_mixer_reg_write(mixer, GAM_MIXER_BKC, val);
+ sti_mixer_reg_write(mixer, GAM_MIXER_BKC, rgb);
}
static void sti_mixer_set_background_area(struct sti_mixer *mixer,
@@ -174,7 +177,7 @@ int sti_mixer_active_video_area(struct sti_mixer *mixer,
sti_mixer_reg_write(mixer, GAM_MIXER_AVO, ydo << 16 | xdo);
sti_mixer_reg_write(mixer, GAM_MIXER_AVS, yds << 16 | xds);
- sti_mixer_set_background_color(mixer, 0xFF, 0, 0);
+ sti_mixer_set_background_color(mixer, bkg_color);
sti_mixer_set_background_area(mixer, mode);
sti_mixer_set_background_status(mixer, true);
--
1.9.1
[PATCH 1/1] drm/sti: enable fbdev compatibility through module param
DRM_STI_FBDEV is removed and replaced by the fbdev module param.
By default, the fbdev compatibility is disabled.
Signed-off-by: Vincent Abriou
Signed-off-by: Nicolas VANHAELEWYN
---
drivers/gpu/drm/sti/Kconfig | 6 --
drivers/gpu/drm/sti/sti_drv.c | 15 ++-
2 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/sti/Kconfig b/drivers/gpu/drm/sti/Kconfig
index 0a9048c..3f8d590 100644
--- a/drivers/gpu/drm/sti/Kconfig
+++ b/drivers/gpu/drm/sti/Kconfig
@@ -10,9 +10,3 @@ config DRM_STI
select FW_LOADER_USER_HELPER_FALLBACK
help
Choose this option to enable DRM on STM stiH41x chipset
-
-config DRM_STI_FBDEV
- bool "DRM frame buffer device for STMicroelectronics SoC stiH41x Serie"
- depends on DRM_STI
- help
- Choose this option to enable FBDEV on top of DRM for STM stiH41x
chipset
diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
index e19c173..d47b025 100644
--- a/drivers/gpu/drm/sti/sti_drv.c
+++ b/drivers/gpu/drm/sti/sti_drv.c
@@ -30,6 +30,11 @@
#define STI_MAX_FB_HEIGHT 4096
#define STI_MAX_FB_WIDTH 4096
+/* Module parameter to enable fbdev compatibility */
+static bool fbdev_enabled;
+MODULE_PARM_DESC(fbdev, "Enable fbdev compatibility layer");
+module_param_named(fbdev, fbdev_enabled, bool, 0644);
+
static void sti_atomic_schedule(struct sti_private *private,
struct drm_atomic_state *state)
{
@@ -160,11 +165,11 @@ static int sti_load(struct drm_device *dev, unsigned long
flags)
drm_mode_config_reset(dev);
-#ifdef CONFIG_DRM_STI_FBDEV
- drm_fbdev_cma_init(dev, 32,
- dev->mode_config.num_crtc,
- dev->mode_config.num_connector);
-#endif
+ if (fbdev_enabled)
+ drm_fbdev_cma_init(dev, 32,
+ dev->mode_config.num_crtc,
+ dev->mode_config.num_connector);
+
return 0;
}
--
1.9.1
[PATCH 1/2] dma-buf/fence: add fence_wait_any_timeout function v2
Op 29-10-15 om 10:28 schreef Christian König: > Ping! > > Any more comments or can I get an rb on this? Sorry for the hurry, but I want > to get this our of my feet. > > Regards, > Christian. > > Silence is golden. Except when you have kids or wait for code review, then > silence is suspicious. Looks good to me. R-B
[PATCH igt v7 1/4] lib/tests: Add igt_assert_*() self-tests
On 29 October 2015 at 10:31, Daniel Stone wrote:
> Make sure our igt_assert variants are doing something that looks vaguely
> like the right thing.
>
> Signed-off-by: Daniel Stone
> ---
> lib/tests/Makefile.sources | 1 +
> lib/tests/igt_simple.c | 173
> +
> 2 files changed, 174 insertions(+)
> create mode 100644 lib/tests/igt_simple.c
The binary name needs to be added to lib/tests/.gitignore.
Also, "igt_assert" might be a more descriptive name for the test.
>
> diff --git a/lib/tests/Makefile.sources b/lib/tests/Makefile.sources
> index 58ae36b..fe5df6e 100644
> --- a/lib/tests/Makefile.sources
> +++ b/lib/tests/Makefile.sources
> @@ -10,6 +10,7 @@ check_PROGRAMS = \
> igt_timeout \
> igt_invalid_subtest_name \
> igt_segfault \
> + igt_simple \
> $(NULL)
>
> check_SCRIPTS = \
> diff --git a/lib/tests/igt_simple.c b/lib/tests/igt_simple.c
> new file mode 100644
> index 000..306b1fb
> --- /dev/null
> +++ b/lib/tests/igt_simple.c
> @@ -0,0 +1,173 @@
> +/*
> + * Copyright © 2015 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "igt_core.h"
> +
> +/*
> + * We need to hide assert from the cocci igt test refactor spatch.
> + *
> + * IMPORTANT: Test infrastructure tests are the only valid places where using
> + * assert is allowed.
> + */
> +#define internal_assert assert
> +
> +char test[] = "test";
> +char *argv_run[] = { test };
> +void (*test_to_run)(void) = NULL;
> +
> +/*
> + * A really tedious way of making sure we execute every negative test, and
> that
> + * they all really fail.
> + */
> +#define CHECK_NEG(x) { \
> + igt_subtest_f("XFAIL_simple_%d", __LINE__) { \
> + (*exec_before)++; \
> + x; \
> + raise(SIGBUS); \
> + } \
> + exec_total++; \
> +}
> +
> +static int do_fork(void)
> +{
> + int pid, status;
> + int argc;
> +
> + switch (pid = fork()) {
> + case -1:
> + internal_assert(0);
> + case 0:
> + argc = 1;
> + igt_simple_init(argc, argv_run);
> + test_to_run();
> + igt_exit();
> + default:
> + while (waitpid(pid, &status, 0) == -1 &&
> + errno == EINTR)
> + ;
> +
> + if(WIFSIGNALED(status))
> + return WTERMSIG(status) + 128;
> +
> + return WEXITSTATUS(status);
> + }
> +}
> +
> +static void test_cmpint_negative(void)
> +{
> + int *exec_before = calloc(1, sizeof(int));
> + int exec_total = 0;
> +
> + CHECK_NEG(igt_assert_eq(INT_MIN, INT_MAX));
> +
> + CHECK_NEG(igt_assert_eq_u32(0xfffeUL, 0xUL));
> +
> + CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
> 0xULL));
> + CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
> 0xULL));
> + CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
> 0xULL));
> +
> + CHECK_NEG(igt_assert_eq_double(0.0, DBL_MAX));
> + CHECK_NEG(igt_assert_eq_double(DBL_MAX, nexttoward(DBL_MAX, 0.0)));
> +
> + if (*exec_before != exec_total)
> + raise(SIGSEGV);
> +}
> +
> +static void test_cmpint(void)
> +{
> + igt_assert_eq(0, 0);
> + igt_assert_eq(INT_MAX, INT_MAX);
> + igt_assert_eq(INT_MAX, INT_MAX);
> + igt_assert_neq(INT_MIN, INT_MAX);
> +
> + igt_assert_eq_u32(0, 0);
> + igt_assert_eq_u32(0xUL, 0xUL);
> + igt_assert_neq_u32(0xfffeUL, 0xUL);
> +
> + igt_assert_eq_u64(0, 0);
> + igt_assert_eq_u64(
No backlight since linux-4.2.4 - drivers/gpu/drm/radeon/atombios_encoders.c
On 29.10.2015 04:03, Alex Deucher wrote: > On Wed, Oct 28, 2015 at 3:11 AM, Michel Dänzer wrote: >> On 28.10.2015 01:43, Alex Deucher wrote: >>> On Tue, Oct 27, 2015 at 12:23 PM, Michael Burian >>> wrote: On 10/27/15 16:10, Alex Deucher wrote: > > It would appear that your system does not use the gpu backlight > controller. Either it's lying or messing with the GPU backlight > controller causes some bad interaction with whatever does control it. > Does the attached radeon patch help? I'm also attaching an amdgpu > patch for reference in case the same problem appears on amdgpu. > no, still no backlight when applied against current current mainline 858e904bd71dd0057a548d6785d94ce5ec4aeabd (Merge tag 'iommu-fixes-v4.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu) >>> >>> I see the problem. We don't enable native backlight control on older >>> asics like yours by default. Does the attached patch help? >> >> My only doubt about this patch is: Should we also fall back to the old >> beahviour in the !(rdev->mode_info.firmware_flags & >> ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU) case? > > Theoretically, it's not necessary, but I guess better safe than sorry. > Updated patches attached. Both patches are Reviewed-by: Michel Dänzer Apologies for the regression, and thanks for the fixes Alex! -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer
[PATCH igt v7 4/4] kms_atomic: Add basic atomic modesetting tests
Hi Dan,
Suspecting that these were meant for the intel-gfx list, although I
doubt people will object seeing them here :-)
On 29 October 2015 at 10:35, Daniel Stone wrote:
> Add tests for KMS atomic modesetting, to exercise the basic interface
> and test failure/corner cases. Should ensure coherency between the
> legacy and atomic interfaces.
>
> v2: New patch.
> v3: Disable connector checking for now, as it was causing GPU hangs on
> newer kernels.
> v4: Rebase.
> v5: Use do_ioctl or do_ioctl_err consistently. Use igt_assert_*()
> helper macros rather than igt_assert() directly.
> Move assertions into helper/check functions. Define atomic commit
> helper.
> v6: Use do_ioctl_err, and define macros to move errors to
> actual callsite, rather than helper functions.
> v7: Fix RELAX_MODE thinko and refresh CRTC state in find_crtc.
>
> Co-authored-by: Micah Fedke
> Signed-off-by: Daniel Stone
> ---
> configure.ac |2 +-
> tests/.gitignore |1 +
> tests/Makefile.sources |1 +
> tests/kms_atomic.c | 1345
>
> 4 files changed, 1348 insertions(+), 1 deletion(-)
> create mode 100644 tests/kms_atomic.c
>
> diff --git a/configure.ac b/configure.ac
> index 5f97466..97de58a 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -85,7 +85,7 @@ if test "x$GCC" = "xyes"; then
> fi
> AC_SUBST(ASSEMBLER_WARN_CFLAGS)
>
> -PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.55 libdrm])
> +PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.64 libdrm])
Afaics you're not using anything intel specific here. I'd suspect one
wants to bump (add) the libdrm version, this way igt can remove a lot
of the local duplication.
[snip]
> --- /dev/null
> +++ b/tests/kms_atomic.c
[snip]
> +#ifndef DRM_CLIENT_CAP_ATOMIC
> +#define DRM_CLIENT_CAP_ATOMIC 3
> +#endif
> +
> +#ifndef DRM_CAP_CURSOR_WIDTH
> +#define DRM_CAP_CURSOR_WIDTH 0x8
> +#endif
> +
> +#ifndef DRM_CAP_CURSOR_HEIGHT
> +#define DRM_CAP_CURSOR_HEIGHT 0x9
> +#endif
> +
> +#ifndef DRM_MODE_ATOMIC_TEST_ONLY
> +#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
> +#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
> +#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
> +
> +struct drm_mode_atomic {
> + __u32 flags;
> + __u32 count_objs;
> + __u64 objs_ptr;
> + __u64 count_props_ptr;
> + __u64 props_ptr;
> + __u64 prop_values_ptr;
> + __u64 reserved;
> + __u64 user_data;
> +};
> +#endif
> +
... like the above but we still need the cursor bits :-(
[snip]
> +#define MAX_PLANES 15
> +#define MAX_CRTCS 3
> +#define MAX_CONNECTORS 8
> +
Worth adding a note where these MAX values come from - intel specific,
educated guess, etc ?
[snip]
> +#if 0
> +/* XXX: Checking this repeatedly actually hangs the GPU. I have literally no
> + * idea why. */
> +static void
> +connector_check_current_state(struct kms_atomic_connector_state *connector)
Perhaps add a reference to the bugzilla ticket/discussion thread ?
As it goes - just my 2c, fwiw.
Cheers,
Emil
[pull] radeon drm-fixes-4.3
Hi Dave, A regression fix for 4.3 for backlights on really old laptops. The following changes since commit 22ca7ca52e80524360b43944a0556b2a6dc1aa21: Merge branch 'vmwgfx-fixes-4.3' of git://people.freedesktop.org/~thomash/linux (2015-10-25 05:02:33 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-fixes-4.3 for you to fetch changes up to ae93580ee59c02395c1711d3e6b90546b8137b86: drm/radeon: fix dpms when driver backlight control is disabled (2015-10-29 11:13:40 -0400) Alex Deucher (2): drm/radeon: move bl encoder assignment into bl init drm/radeon: fix dpms when driver backlight control is disabled drivers/gpu/drm/radeon/atombios_encoders.c | 19 +++ drivers/gpu/drm/radeon/radeon_encoders.c| 1 - drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 1 + 3 files changed, 16 insertions(+), 5 deletions(-)
[PATCH] drm: Correct arguments to list_tail_add in create blob ioctl
Hi Dave, On 8 October 2015 at 15:51, Jani Nikula wrote: > On Thu, 08 Oct 2015, Sean Paul wrote: >> From: Maneet Singh >> >> From: Maneet Singh >> >> Arguments passed to list_add_tail were reversed resulting in deletion >> of old blob property everytime the new one is added. >> >> Signed-off-by: Maneet Singh >> [seanpaul tweaked commit subject a little] >> Signed-off-by: Sean Paul >> Reviewed-by: Daniel Stone > > Reviewed-by: Jani Nikula > > Fixes > > commit e2f5d2ea479b9b2619965d43db70939589afe43a > Author: Daniel Stone > Date: Fri May 22 13:34:51 2015 +0100 > > drm/mode: Add user blob-creation ioctl Could you please pick this up, CC'ed to stable for 4.2? igt to catch this is here: http://lists.freedesktop.org/archives/intel-gfx/2015-October/079069.html Cheers, Daniel
[PATCH] drm/dp: add eDP DPCD backlight control bit definitions
Cc: Yetunde Adebisi Signed-off-by: Jani Nikula --- include/drm/drm_dp_helper.h | 36 1 file changed, 36 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index bb9d0deca07c..1252108da0ef 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -455,16 +455,52 @@ # define DP_EDP_14 0x03 #define DP_EDP_GENERAL_CAP_1 0x701 +# define DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP (1 << 0) +# define DP_EDP_BACKLIGHT_PIN_ENABLE_CAP (1 << 1) +# define DP_EDP_BACKLIGHT_AUX_ENABLE_CAP (1 << 2) +# define DP_EDP_PANEL_SELF_TEST_PIN_ENABLE_CAP (1 << 3) +# define DP_EDP_PANEL_SELF_TEST_AUX_ENABLE_CAP (1 << 4) +# define DP_EDP_FRC_ENABLE_CAP (1 << 5) +# define DP_EDP_COLOR_ENGINE_CAP (1 << 6) +# define DP_EDP_SET_POWER_CAP (1 << 7) #define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP 0x702 +# define DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP (1 << 0) +# define DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP (1 << 1) +# define DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT(1 << 2) +# define DP_EDP_BACKLIGHT_AUX_PWM_PRODUCT_CAP (1 << 3) +# define DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_CAP(1 << 4) +# define DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP (1 << 5) +# define DP_EDP_DYNAMIC_BACKLIGHT_CAP (1 << 6) +# define DP_EDP_VBLANK_BACKLIGHT_UPDATE_CAP(1 << 7) #define DP_EDP_GENERAL_CAP_2 0x703 +# define DP_EDP_OVERDRIVE_ENGINE_ENABLED (1 << 0) #define DP_EDP_GENERAL_CAP_3 0x704/* eDP 1.4 */ +# define DP_EDP_X_REGION_CAP_MASK (0xf << 0) +# define DP_EDP_X_REGION_CAP_SHIFT 0 +# define DP_EDP_Y_REGION_CAP_MASK (0xf << 4) +# define DP_EDP_Y_REGION_CAP_SHIFT 4 #define DP_EDP_DISPLAY_CONTROL_REGISTER 0x720 +# define DP_EDP_BACKLIGHT_ENABLE (1 << 0) +# define DP_EDP_BLACK_VIDEO_ENABLE (1 << 1) +# define DP_EDP_FRC_ENABLE (1 << 2) +# define DP_EDP_COLOR_ENGINE_ENABLE(1 << 3) +# define DP_EDP_VBLANK_BACKLIGHT_UPDATE_ENABLE (1 << 7) #define DP_EDP_BACKLIGHT_MODE_SET_REGISTER 0x721 +# define DP_EDP_BACKLIGHT_CONTROL_MODE_MASK(3 << 0) +# define DP_EDP_BACKLIGHT_CONTROL_MODE_PWM (0 << 0) +# define DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET (1 << 0) +# define DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD(2 << 0) +# define DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT (3 << 0) +# define DP_EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU_ENABLE (1 << 2) +# define DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE (1 << 3) +# define DP_EDP_DYNAMIC_BACKLIGHT_ENABLE (1 << 4) +# define DP_EDP_REGIONAL_BACKLIGHT_ENABLE (1 << 5) +# define DP_EDP_UPDATE_REGION_BRIGHTNESS (1 << 6) /* eDP 1.4 */ #define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB 0x722 #define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB 0x723 -- 2.1.4
[PATCH igt v7 4/4] kms_atomic: Add basic atomic modesetting tests
Add tests for KMS atomic modesetting, to exercise the basic interface
and test failure/corner cases. Should ensure coherency between the
legacy and atomic interfaces.
v2: New patch.
v3: Disable connector checking for now, as it was causing GPU hangs on
newer kernels.
v4: Rebase.
v5: Use do_ioctl or do_ioctl_err consistently. Use igt_assert_*()
helper macros rather than igt_assert() directly.
Move assertions into helper/check functions. Define atomic commit
helper.
v6: Use do_ioctl_err, and define macros to move errors to
actual callsite, rather than helper functions.
v7: Fix RELAX_MODE thinko and refresh CRTC state in find_crtc.
Co-authored-by: Micah Fedke
Signed-off-by: Daniel Stone
---
configure.ac |2 +-
tests/.gitignore |1 +
tests/Makefile.sources |1 +
tests/kms_atomic.c | 1345
4 files changed, 1348 insertions(+), 1 deletion(-)
create mode 100644 tests/kms_atomic.c
diff --git a/configure.ac b/configure.ac
index 5f97466..97de58a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -85,7 +85,7 @@ if test "x$GCC" = "xyes"; then
fi
AC_SUBST(ASSEMBLER_WARN_CFLAGS)
-PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.55 libdrm])
+PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.64 libdrm])
PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
PKG_CHECK_MODULES(OVERLAY_XVLIB, [xv x11 xext dri2proto >= 2.6],
enable_overlay_xvlib=yes, enable_overlay_xvlib=no)
PKG_CHECK_MODULES(OVERLAY_XLIB, [cairo-xlib dri2proto >= 2.6],
enable_overlay_xlib=yes, enable_overlay_xlib=no)
diff --git a/tests/.gitignore b/tests/.gitignore
index beda511..80af9a7 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -126,6 +126,7 @@ gen3_render_tiledy_blits
gen7_forcewake_mt
kms_3d
kms_addfb_basic
+kms_atomic
kms_crtc_background_color
kms_cursor_crc
kms_draw_crc
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index ac731f9..8fb2de8 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -63,6 +63,7 @@ TESTS_progs_M = \
gem_userptr_blits \
gem_write_read_ring_switch \
kms_addfb_basic \
+ kms_atomic \
kms_cursor_crc \
kms_draw_crc \
kms_fbc_crc \
diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c
new file mode 100644
index 000..0f7b896
--- /dev/null
+++ b/tests/kms_atomic.c
@@ -0,0 +1,1345 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ * Copyright © 2014-2015 Collabora, Ltd.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Micah Fedke
+ *Daniel Stone
+ *Pekka Paalanen
+ */
+
+/*
+ * Testcase: testing atomic modesetting API
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "drm.h"
+#include "ioctl_wrappers.h"
+#include "drmtest.h"
+#include "igt.h"
+#include "igt_aux.h"
+
+#ifndef DRM_CLIENT_CAP_ATOMIC
+#define DRM_CLIENT_CAP_ATOMIC 3
+#endif
+
+#ifndef DRM_CAP_CURSOR_WIDTH
+#define DRM_CAP_CURSOR_WIDTH 0x8
+#endif
+
+#ifndef DRM_CAP_CURSOR_HEIGHT
+#define DRM_CAP_CURSOR_HEIGHT 0x9
+#endif
+
+#ifndef DRM_MODE_ATOMIC_TEST_ONLY
+#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
+#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
+#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
+
+struct drm_mode_atomic {
+ __u32 flags;
+ __u32 count_objs;
+ __u64 objs_ptr;
+ __u64 count_props_ptr;
+ __u64 props_ptr;
+ __u64 prop_values_ptr;
+ __u64 reserved;
+ __u64 user_data;
+};
+#endif
+
+IGT_TEST_DESCRIPTION("Test atomic modesetting API");
+
+enum kms_atomic_check_relax {
+ ATOMIC_RELAX_NONE = 0,
+ CRTC_RELAX_MODE = (1 << 0),
+ PLANE_RELAX_FB = (1 << 1)
+};
+
+/**
+ * KMS plane type enum
+ *
+ * KMS plane types are represented by enums, which do not have stable numeric
+ * values, but must be looked up by their string value each time.
+ *
+ * To make the code more simple, w
[PATCH igt v7 3/4] tests/core_prop_blob: Add multiple blobs per connection
This should hit the bug fixed in:
XXX FIXME INSERT SEANPAUL COMMIT CITE
which was introduced with the initial blob support in:
commit e2f5d2ea479b9b2619965d43db70939589afe43a
Author: Daniel Stone
Date: Fri May 22 13:34:51 2015 +0100
drm/mode: Add user blob-creation ioctl
Add an ioctl which allows users to create blob properties from supplied
data. Currently this only supports modes, creating a drm_display_mode
from
the userspace drm_mode_modeinfo.
v2: Removed size/type checks.
Rebased on new patches to allow error propagation from create_blob,
as well as avoiding double-allocation.
Signed-off-by: Daniel Stone
Reviewed-by: Maarten Lankhorst
Tested-by: Sean Paul
Signed-off-by: Daniel Vetter
Signed-off-by: Daniel Stone
---
tests/core_prop_blob.c | 40
1 file changed, 40 insertions(+)
diff --git a/tests/core_prop_blob.c b/tests/core_prop_blob.c
index df4f3ad..365d728 100644
--- a/tests/core_prop_blob.c
+++ b/tests/core_prop_blob.c
@@ -208,6 +208,43 @@ test_lifetime(int fd)
}
static void
+test_multiple(int fd)
+{
+ uint32_t prop_ids[5];
+ int fd2;
+ int i;
+
+ fd2 = drm_open_driver(DRIVER_ANY);
+ igt_assert_fd(fd2);
+
+ /* Ensure destroying multiple properties explicitly works as needed. */
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) {
+ prop_ids[i] = create_prop(fd2);
+ igt_assert_eq(validate_prop(fd, prop_ids[i]), 0);
+ igt_assert_eq(validate_prop(fd2, prop_ids[i]), 0);
+ }
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) {
+ igt_assert_eq(destroy_prop(fd2, prop_ids[i]), 0);
+ igt_assert_eq(validate_prop(fd2, prop_ids[i]), ENOENT);
+ }
+ igt_assert_eq(close(fd2), 0);
+
+ fd2 = drm_open_driver(DRIVER_ANY);
+ igt_assert_fd(fd2);
+
+ /* Ensure that multiple properties get cleaned up on fd close. */
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) {
+ prop_ids[i] = create_prop(fd2);
+ igt_assert_eq(validate_prop(fd, prop_ids[i]), 0);
+ igt_assert_eq(validate_prop(fd2, prop_ids[i]), 0);
+ }
+ igt_assert_eq(close(fd2), 0);
+
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++)
+ igt_assert_eq(validate_prop(fd, prop_ids[i]), ENOENT);
+}
+
+static void
test_core(int fd)
{
uint32_t prop_id;
@@ -256,6 +293,9 @@ igt_main
igt_subtest("blob-prop-lifetime")
test_lifetime(fd);
+ igt_subtest("blob-multiple")
+ test_multiple(fd);
+
igt_fixture
close(fd);
}
--
2.5.0
[PATCH igt v7 2/4] tests: Run igt.cocci
Signed-off-by: Daniel Stone
---
tests/drm_import_export.c| 2 +-
tests/gem_bad_reloc.c| 8 ++
tests/gem_concurrent_all.c | 6 ++--
tests/gem_ctx_exec.c | 9 ++
tests/gem_ctx_param_basic.c | 4 +--
tests/gem_mmap_gtt.c | 8 ++
tests/gem_pin.c | 4 +--
tests/gem_pwrite_pread.c | 12
tests/gem_reg_read.c | 2 +-
tests/gem_tiled_swapping.c | 4 +--
tests/gem_tiled_wb.c | 2 +-
tests/gem_tiled_wc.c | 2 +-
tests/kms_draw_crc.c | 6 ++--
tests/kms_frontbuffer_tracking.c | 60
tests/kms_panel_fitting.c| 2 +-
tests/kms_pipe_b_c_ivb.c | 30 ++--
tests/kms_plane_scaling.c| 2 +-
tests/kms_rotation_crc.c | 4 +--
tests/pm_backlight.c | 20 +++---
19 files changed, 88 insertions(+), 99 deletions(-)
diff --git a/tests/drm_import_export.c b/tests/drm_import_export.c
index 29c228f..49486ab 100644
--- a/tests/drm_import_export.c
+++ b/tests/drm_import_export.c
@@ -212,7 +212,7 @@ static void test_import_close_race(void)
else {
pthread_mutex_lock(&t_data.mutex);
igt_assert_eq(drm_intel_bo_gem_export_to_prime(bo,
&(t_data.prime_fd)), 0);
- igt_assert(t_data.prime_fd != -1);
+ igt_assert_neq(t_data.prime_fd, -1);
pthread_mutex_unlock(&t_data.mutex);
}
diff --git a/tests/gem_bad_reloc.c b/tests/gem_bad_reloc.c
index 9c285ed..e8701da 100644
--- a/tests/gem_bad_reloc.c
+++ b/tests/gem_bad_reloc.c
@@ -107,9 +107,7 @@ static int negative_reloc(int fd, unsigned flags)
execbuf.buffer_count = 2;
execbuf.batch_len = 8;
- do_or_die(drmIoctl(fd,
- DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
gem_close(fd, gem_exec[1].handle);
igt_info("Found offset %lld for 4k batch\n", (long
long)gem_exec[0].offset);
@@ -136,9 +134,7 @@ static int negative_reloc(int fd, unsigned flags)
execbuf.buffer_count = 1;
execbuf.flags = flags & USE_LUT;
- do_or_die(drmIoctl(fd,
- DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
igt_info("Batch is now at offset %lld\n", (long
long)gem_exec[0].offset);
diff --git a/tests/gem_concurrent_all.c b/tests/gem_concurrent_all.c
index 1d2d787..3970fc6 100644
--- a/tests/gem_concurrent_all.c
+++ b/tests/gem_concurrent_all.c
@@ -298,8 +298,8 @@ gpu_set_bo(drm_intel_bo *bo, uint32_t val, int width, int
height)
gem_pwrite.offset = 0;
gem_pwrite.size = execbuf.batch_len;
gem_pwrite.data_ptr = (uintptr_t)buf;
- do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite));
- do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle);
}
@@ -868,7 +868,7 @@ static void bit17_require(void)
arg.handle = gem_create(fd, 4096);
gem_set_tiling(fd, arg.handle, I915_TILING_X, 512);
- do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg);
gem_close(fd, arg.handle);
igt_require(arg.phys_swizzle_mode == arg.swizzle_mode);
}
diff --git a/tests/gem_ctx_exec.c b/tests/gem_ctx_exec.c
index f2b7cb6..179e991 100644
--- a/tests/gem_ctx_exec.c
+++ b/tests/gem_ctx_exec.c
@@ -116,8 +116,7 @@ static void big_exec(int fd, uint32_t handle, int ring)
execbuf.buffer_count = 1;
i915_execbuffer2_set_context_id(execbuf, ctx_id1);
- igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf) == 0);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
for (i = 0; i < num_buffers; i++) {
uint32_t tmp_handle = gem_create(fd, 4096);
@@ -141,12 +140,10 @@ static void big_exec(int fd, uint32_t handle, int ring)
i - 1, num_buffers);
/* double check that it works */
- igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf) == 0);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
i915_execbuffer2_set_context_id(execbuf, ctx_id2);
- igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf) == 0);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
gem_sync(fd, handle);
}
diff --git a/tests/gem_ctx_param_basic.c b/tests/gem_ctx_param_basic.c
index 94245ce..b75800c 100644
-
[PATCH igt v7 1/4] lib/tests: Add igt_assert_*() self-tests
Make sure our igt_assert variants are doing something that looks vaguely
like the right thing.
Signed-off-by: Daniel Stone
---
lib/tests/Makefile.sources | 1 +
lib/tests/igt_simple.c | 173 +
2 files changed, 174 insertions(+)
create mode 100644 lib/tests/igt_simple.c
diff --git a/lib/tests/Makefile.sources b/lib/tests/Makefile.sources
index 58ae36b..fe5df6e 100644
--- a/lib/tests/Makefile.sources
+++ b/lib/tests/Makefile.sources
@@ -10,6 +10,7 @@ check_PROGRAMS = \
igt_timeout \
igt_invalid_subtest_name \
igt_segfault \
+ igt_simple \
$(NULL)
check_SCRIPTS = \
diff --git a/lib/tests/igt_simple.c b/lib/tests/igt_simple.c
new file mode 100644
index 000..306b1fb
--- /dev/null
+++ b/lib/tests/igt_simple.c
@@ -0,0 +1,173 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "igt_core.h"
+
+/*
+ * We need to hide assert from the cocci igt test refactor spatch.
+ *
+ * IMPORTANT: Test infrastructure tests are the only valid places where using
+ * assert is allowed.
+ */
+#define internal_assert assert
+
+char test[] = "test";
+char *argv_run[] = { test };
+void (*test_to_run)(void) = NULL;
+
+/*
+ * A really tedious way of making sure we execute every negative test, and that
+ * they all really fail.
+ */
+#define CHECK_NEG(x) { \
+ igt_subtest_f("XFAIL_simple_%d", __LINE__) { \
+ (*exec_before)++; \
+ x; \
+ raise(SIGBUS); \
+ } \
+ exec_total++; \
+}
+
+static int do_fork(void)
+{
+ int pid, status;
+ int argc;
+
+ switch (pid = fork()) {
+ case -1:
+ internal_assert(0);
+ case 0:
+ argc = 1;
+ igt_simple_init(argc, argv_run);
+ test_to_run();
+ igt_exit();
+ default:
+ while (waitpid(pid, &status, 0) == -1 &&
+ errno == EINTR)
+ ;
+
+ if(WIFSIGNALED(status))
+ return WTERMSIG(status) + 128;
+
+ return WEXITSTATUS(status);
+ }
+}
+
+static void test_cmpint_negative(void)
+{
+ int *exec_before = calloc(1, sizeof(int));
+ int exec_total = 0;
+
+ CHECK_NEG(igt_assert_eq(INT_MIN, INT_MAX));
+
+ CHECK_NEG(igt_assert_eq_u32(0xfffeUL, 0xUL));
+
+ CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
0xULL));
+ CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
0xULL));
+ CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
0xULL));
+
+ CHECK_NEG(igt_assert_eq_double(0.0, DBL_MAX));
+ CHECK_NEG(igt_assert_eq_double(DBL_MAX, nexttoward(DBL_MAX, 0.0)));
+
+ if (*exec_before != exec_total)
+ raise(SIGSEGV);
+}
+
+static void test_cmpint(void)
+{
+ igt_assert_eq(0, 0);
+ igt_assert_eq(INT_MAX, INT_MAX);
+ igt_assert_eq(INT_MAX, INT_MAX);
+ igt_assert_neq(INT_MIN, INT_MAX);
+
+ igt_assert_eq_u32(0, 0);
+ igt_assert_eq_u32(0xUL, 0xUL);
+ igt_assert_neq_u32(0xfffeUL, 0xUL);
+
+ igt_assert_eq_u64(0, 0);
+ igt_assert_eq_u64(0xULL, 0xULL);
+ igt_assert_neq_u64(0xfffeULL, 0xULL);
+
+ igt_assert_eq_double(0.0, 0.0);
+ igt_assert_eq_double(DBL_MAX, DBL_MAX);
+ igt_assert_neq_double(0.0, DBL_MAX);
+}
+
+static void test_fd_negative(void)
+{
+ int *exec_before = calloc(1, sizeof(int));
+ int exec_total = 0;
+
+ CHECK_NEG(igt_assert_fd(-1));
+ CHECK_NEG(igt_assert_fd(INT_MIN));
+
+ if (*exec_before
[PATCH igt v7 0/4] Assert tests, atomic, multi-blob
Hi, Following on from the previous few series, most of which have been merged ... Add some self-tests for igt-assert_*() to make sure they do the right thing, including for fds. This is a bit gross, but does work. Do a Cocci run through the tree. This doesn't actually pick up a lot of the changes for some reason, but I have not a clue why. Add a new subtest to core_prop_blob which creates multiple blobs per connection, exercising a kernel bug. Resubmit the atomic tests, with only minor changes this time. Cheers, Daniel
[PATCH igt v7 4/4] kms_atomic: Add basic atomic modesetting tests
Add tests for KMS atomic modesetting, to exercise the basic interface
and test failure/corner cases. Should ensure coherency between the
legacy and atomic interfaces.
v2: New patch.
v3: Disable connector checking for now, as it was causing GPU hangs on
newer kernels.
v4: Rebase.
v5: Use do_ioctl or do_ioctl_err consistently. Use igt_assert_*()
helper macros rather than igt_assert() directly.
Move assertions into helper/check functions. Define atomic commit
helper.
v6: Use do_ioctl_err, and define macros to move errors to
actual callsite, rather than helper functions.
v7: Fix RELAX_MODE thinko and refresh CRTC state in find_crtc.
Co-authored-by: Micah Fedke
Signed-off-by: Daniel Stone
---
configure.ac |2 +-
tests/.gitignore |1 +
tests/Makefile.sources |1 +
tests/kms_atomic.c | 1345
4 files changed, 1348 insertions(+), 1 deletion(-)
create mode 100644 tests/kms_atomic.c
diff --git a/configure.ac b/configure.ac
index 5f97466..97de58a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -85,7 +85,7 @@ if test "x$GCC" = "xyes"; then
fi
AC_SUBST(ASSEMBLER_WARN_CFLAGS)
-PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.55 libdrm])
+PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.64 libdrm])
PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
PKG_CHECK_MODULES(OVERLAY_XVLIB, [xv x11 xext dri2proto >= 2.6],
enable_overlay_xvlib=yes, enable_overlay_xvlib=no)
PKG_CHECK_MODULES(OVERLAY_XLIB, [cairo-xlib dri2proto >= 2.6],
enable_overlay_xlib=yes, enable_overlay_xlib=no)
diff --git a/tests/.gitignore b/tests/.gitignore
index beda511..80af9a7 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -126,6 +126,7 @@ gen3_render_tiledy_blits
gen7_forcewake_mt
kms_3d
kms_addfb_basic
+kms_atomic
kms_crtc_background_color
kms_cursor_crc
kms_draw_crc
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index ac731f9..8fb2de8 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -63,6 +63,7 @@ TESTS_progs_M = \
gem_userptr_blits \
gem_write_read_ring_switch \
kms_addfb_basic \
+ kms_atomic \
kms_cursor_crc \
kms_draw_crc \
kms_fbc_crc \
diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c
new file mode 100644
index 000..0f7b896
--- /dev/null
+++ b/tests/kms_atomic.c
@@ -0,0 +1,1345 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ * Copyright © 2014-2015 Collabora, Ltd.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Micah Fedke
+ *Daniel Stone
+ *Pekka Paalanen
+ */
+
+/*
+ * Testcase: testing atomic modesetting API
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "drm.h"
+#include "ioctl_wrappers.h"
+#include "drmtest.h"
+#include "igt.h"
+#include "igt_aux.h"
+
+#ifndef DRM_CLIENT_CAP_ATOMIC
+#define DRM_CLIENT_CAP_ATOMIC 3
+#endif
+
+#ifndef DRM_CAP_CURSOR_WIDTH
+#define DRM_CAP_CURSOR_WIDTH 0x8
+#endif
+
+#ifndef DRM_CAP_CURSOR_HEIGHT
+#define DRM_CAP_CURSOR_HEIGHT 0x9
+#endif
+
+#ifndef DRM_MODE_ATOMIC_TEST_ONLY
+#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
+#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
+#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
+
+struct drm_mode_atomic {
+ __u32 flags;
+ __u32 count_objs;
+ __u64 objs_ptr;
+ __u64 count_props_ptr;
+ __u64 props_ptr;
+ __u64 prop_values_ptr;
+ __u64 reserved;
+ __u64 user_data;
+};
+#endif
+
+IGT_TEST_DESCRIPTION("Test atomic modesetting API");
+
+enum kms_atomic_check_relax {
+ ATOMIC_RELAX_NONE = 0,
+ CRTC_RELAX_MODE = (1 << 0),
+ PLANE_RELAX_FB = (1 << 1)
+};
+
+/**
+ * KMS plane type enum
+ *
+ * KMS plane types are represented by enums, which do not have stable numeric
+ * values, but must be looked up by their string value each time.
+ *
+ * To make the code more simple, w
[PATCH igt v7 3/4] tests/core_prop_blob: Add multiple blobs per connection
This should hit the bug fixed in:
XXX FIXME INSERT SEANPAUL COMMIT CITE
which was introduced with the initial blob support in:
commit e2f5d2ea479b9b2619965d43db70939589afe43a
Author: Daniel Stone
Date: Fri May 22 13:34:51 2015 +0100
drm/mode: Add user blob-creation ioctl
Add an ioctl which allows users to create blob properties from supplied
data. Currently this only supports modes, creating a drm_display_mode
from
the userspace drm_mode_modeinfo.
v2: Removed size/type checks.
Rebased on new patches to allow error propagation from create_blob,
as well as avoiding double-allocation.
Signed-off-by: Daniel Stone
Reviewed-by: Maarten Lankhorst
Tested-by: Sean Paul
Signed-off-by: Daniel Vetter
Signed-off-by: Daniel Stone
---
tests/core_prop_blob.c | 40
1 file changed, 40 insertions(+)
diff --git a/tests/core_prop_blob.c b/tests/core_prop_blob.c
index df4f3ad..365d728 100644
--- a/tests/core_prop_blob.c
+++ b/tests/core_prop_blob.c
@@ -208,6 +208,43 @@ test_lifetime(int fd)
}
static void
+test_multiple(int fd)
+{
+ uint32_t prop_ids[5];
+ int fd2;
+ int i;
+
+ fd2 = drm_open_driver(DRIVER_ANY);
+ igt_assert_fd(fd2);
+
+ /* Ensure destroying multiple properties explicitly works as needed. */
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) {
+ prop_ids[i] = create_prop(fd2);
+ igt_assert_eq(validate_prop(fd, prop_ids[i]), 0);
+ igt_assert_eq(validate_prop(fd2, prop_ids[i]), 0);
+ }
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) {
+ igt_assert_eq(destroy_prop(fd2, prop_ids[i]), 0);
+ igt_assert_eq(validate_prop(fd2, prop_ids[i]), ENOENT);
+ }
+ igt_assert_eq(close(fd2), 0);
+
+ fd2 = drm_open_driver(DRIVER_ANY);
+ igt_assert_fd(fd2);
+
+ /* Ensure that multiple properties get cleaned up on fd close. */
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++) {
+ prop_ids[i] = create_prop(fd2);
+ igt_assert_eq(validate_prop(fd, prop_ids[i]), 0);
+ igt_assert_eq(validate_prop(fd2, prop_ids[i]), 0);
+ }
+ igt_assert_eq(close(fd2), 0);
+
+ for (i = 0; i < ARRAY_SIZE(prop_ids); i++)
+ igt_assert_eq(validate_prop(fd, prop_ids[i]), ENOENT);
+}
+
+static void
test_core(int fd)
{
uint32_t prop_id;
@@ -256,6 +293,9 @@ igt_main
igt_subtest("blob-prop-lifetime")
test_lifetime(fd);
+ igt_subtest("blob-multiple")
+ test_multiple(fd);
+
igt_fixture
close(fd);
}
--
2.5.0
[PATCH igt v7 2/4] tests: Run igt.cocci
Signed-off-by: Daniel Stone
---
tests/drm_import_export.c| 2 +-
tests/gem_bad_reloc.c| 8 ++
tests/gem_concurrent_all.c | 6 ++--
tests/gem_ctx_exec.c | 9 ++
tests/gem_ctx_param_basic.c | 4 +--
tests/gem_mmap_gtt.c | 8 ++
tests/gem_pin.c | 4 +--
tests/gem_pwrite_pread.c | 12
tests/gem_reg_read.c | 2 +-
tests/gem_tiled_swapping.c | 4 +--
tests/gem_tiled_wb.c | 2 +-
tests/gem_tiled_wc.c | 2 +-
tests/kms_draw_crc.c | 6 ++--
tests/kms_frontbuffer_tracking.c | 60
tests/kms_panel_fitting.c| 2 +-
tests/kms_pipe_b_c_ivb.c | 30 ++--
tests/kms_plane_scaling.c| 2 +-
tests/kms_rotation_crc.c | 4 +--
tests/pm_backlight.c | 20 +++---
19 files changed, 88 insertions(+), 99 deletions(-)
diff --git a/tests/drm_import_export.c b/tests/drm_import_export.c
index 29c228f..49486ab 100644
--- a/tests/drm_import_export.c
+++ b/tests/drm_import_export.c
@@ -212,7 +212,7 @@ static void test_import_close_race(void)
else {
pthread_mutex_lock(&t_data.mutex);
igt_assert_eq(drm_intel_bo_gem_export_to_prime(bo,
&(t_data.prime_fd)), 0);
- igt_assert(t_data.prime_fd != -1);
+ igt_assert_neq(t_data.prime_fd, -1);
pthread_mutex_unlock(&t_data.mutex);
}
diff --git a/tests/gem_bad_reloc.c b/tests/gem_bad_reloc.c
index 9c285ed..e8701da 100644
--- a/tests/gem_bad_reloc.c
+++ b/tests/gem_bad_reloc.c
@@ -107,9 +107,7 @@ static int negative_reloc(int fd, unsigned flags)
execbuf.buffer_count = 2;
execbuf.batch_len = 8;
- do_or_die(drmIoctl(fd,
- DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
gem_close(fd, gem_exec[1].handle);
igt_info("Found offset %lld for 4k batch\n", (long
long)gem_exec[0].offset);
@@ -136,9 +134,7 @@ static int negative_reloc(int fd, unsigned flags)
execbuf.buffer_count = 1;
execbuf.flags = flags & USE_LUT;
- do_or_die(drmIoctl(fd,
- DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
igt_info("Batch is now at offset %lld\n", (long
long)gem_exec[0].offset);
diff --git a/tests/gem_concurrent_all.c b/tests/gem_concurrent_all.c
index 1d2d787..3970fc6 100644
--- a/tests/gem_concurrent_all.c
+++ b/tests/gem_concurrent_all.c
@@ -298,8 +298,8 @@ gpu_set_bo(drm_intel_bo *bo, uint32_t val, int width, int
height)
gem_pwrite.offset = 0;
gem_pwrite.size = execbuf.batch_len;
gem_pwrite.data_ptr = (uintptr_t)buf;
- do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite));
- do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle);
}
@@ -868,7 +868,7 @@ static void bit17_require(void)
arg.handle = gem_create(fd, 4096);
gem_set_tiling(fd, arg.handle, I915_TILING_X, 512);
- do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg));
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg);
gem_close(fd, arg.handle);
igt_require(arg.phys_swizzle_mode == arg.swizzle_mode);
}
diff --git a/tests/gem_ctx_exec.c b/tests/gem_ctx_exec.c
index f2b7cb6..179e991 100644
--- a/tests/gem_ctx_exec.c
+++ b/tests/gem_ctx_exec.c
@@ -116,8 +116,7 @@ static void big_exec(int fd, uint32_t handle, int ring)
execbuf.buffer_count = 1;
i915_execbuffer2_set_context_id(execbuf, ctx_id1);
- igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf) == 0);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
for (i = 0; i < num_buffers; i++) {
uint32_t tmp_handle = gem_create(fd, 4096);
@@ -141,12 +140,10 @@ static void big_exec(int fd, uint32_t handle, int ring)
i - 1, num_buffers);
/* double check that it works */
- igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf) == 0);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
i915_execbuffer2_set_context_id(execbuf, ctx_id2);
- igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
- &execbuf) == 0);
+ do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
gem_sync(fd, handle);
}
diff --git a/tests/gem_ctx_param_basic.c b/tests/gem_ctx_param_basic.c
index 94245ce..b75800c 100644
-
[PATCH igt v7 1/4] lib/tests: Add igt_assert_*() self-tests
Make sure our igt_assert variants are doing something that looks vaguely
like the right thing.
Signed-off-by: Daniel Stone
---
lib/tests/Makefile.sources | 1 +
lib/tests/igt_simple.c | 173 +
2 files changed, 174 insertions(+)
create mode 100644 lib/tests/igt_simple.c
diff --git a/lib/tests/Makefile.sources b/lib/tests/Makefile.sources
index 58ae36b..fe5df6e 100644
--- a/lib/tests/Makefile.sources
+++ b/lib/tests/Makefile.sources
@@ -10,6 +10,7 @@ check_PROGRAMS = \
igt_timeout \
igt_invalid_subtest_name \
igt_segfault \
+ igt_simple \
$(NULL)
check_SCRIPTS = \
diff --git a/lib/tests/igt_simple.c b/lib/tests/igt_simple.c
new file mode 100644
index 000..306b1fb
--- /dev/null
+++ b/lib/tests/igt_simple.c
@@ -0,0 +1,173 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "igt_core.h"
+
+/*
+ * We need to hide assert from the cocci igt test refactor spatch.
+ *
+ * IMPORTANT: Test infrastructure tests are the only valid places where using
+ * assert is allowed.
+ */
+#define internal_assert assert
+
+char test[] = "test";
+char *argv_run[] = { test };
+void (*test_to_run)(void) = NULL;
+
+/*
+ * A really tedious way of making sure we execute every negative test, and that
+ * they all really fail.
+ */
+#define CHECK_NEG(x) { \
+ igt_subtest_f("XFAIL_simple_%d", __LINE__) { \
+ (*exec_before)++; \
+ x; \
+ raise(SIGBUS); \
+ } \
+ exec_total++; \
+}
+
+static int do_fork(void)
+{
+ int pid, status;
+ int argc;
+
+ switch (pid = fork()) {
+ case -1:
+ internal_assert(0);
+ case 0:
+ argc = 1;
+ igt_simple_init(argc, argv_run);
+ test_to_run();
+ igt_exit();
+ default:
+ while (waitpid(pid, &status, 0) == -1 &&
+ errno == EINTR)
+ ;
+
+ if(WIFSIGNALED(status))
+ return WTERMSIG(status) + 128;
+
+ return WEXITSTATUS(status);
+ }
+}
+
+static void test_cmpint_negative(void)
+{
+ int *exec_before = calloc(1, sizeof(int));
+ int exec_total = 0;
+
+ CHECK_NEG(igt_assert_eq(INT_MIN, INT_MAX));
+
+ CHECK_NEG(igt_assert_eq_u32(0xfffeUL, 0xUL));
+
+ CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
0xULL));
+ CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
0xULL));
+ CHECK_NEG(igt_assert_eq_u64(0xfffeULL,
0xULL));
+
+ CHECK_NEG(igt_assert_eq_double(0.0, DBL_MAX));
+ CHECK_NEG(igt_assert_eq_double(DBL_MAX, nexttoward(DBL_MAX, 0.0)));
+
+ if (*exec_before != exec_total)
+ raise(SIGSEGV);
+}
+
+static void test_cmpint(void)
+{
+ igt_assert_eq(0, 0);
+ igt_assert_eq(INT_MAX, INT_MAX);
+ igt_assert_eq(INT_MAX, INT_MAX);
+ igt_assert_neq(INT_MIN, INT_MAX);
+
+ igt_assert_eq_u32(0, 0);
+ igt_assert_eq_u32(0xUL, 0xUL);
+ igt_assert_neq_u32(0xfffeUL, 0xUL);
+
+ igt_assert_eq_u64(0, 0);
+ igt_assert_eq_u64(0xULL, 0xULL);
+ igt_assert_neq_u64(0xfffeULL, 0xULL);
+
+ igt_assert_eq_double(0.0, 0.0);
+ igt_assert_eq_double(DBL_MAX, DBL_MAX);
+ igt_assert_neq_double(0.0, DBL_MAX);
+}
+
+static void test_fd_negative(void)
+{
+ int *exec_before = calloc(1, sizeof(int));
+ int exec_total = 0;
+
+ CHECK_NEG(igt_assert_fd(-1));
+ CHECK_NEG(igt_assert_fd(INT_MIN));
+
+ if (*exec_before
[PATCH igt v7 0/4] Assert tests, atomic, multi-blob
Hi, Following on from the previous few series, most of which have been merged ... Add some self-tests for igt-assert_*() to make sure they do the right thing, including for fds. This is a bit gross, but does work. Do a Cocci run through the tree. This doesn't actually pick up a lot of the changes for some reason, but I have not a clue why. Add a new subtest to core_prop_blob which creates multiple blobs per connection, exercising a kernel bug. Resubmit the atomic tests, with only minor changes this time. Cheers, Daniel
[PATCH 1/2] dma-buf/fence: add fence_wait_any_timeout function v2
Ping!
Any more comments or can I get an rb on this? Sorry for the hurry, but I
want to get this our of my feet.
Regards,
Christian.
Silence is golden. Except when you have kids or wait for code review,
then silence is suspicious.
On 27.10.2015 17:04, Christian König wrote:
> From: Christian König
>
> Waiting for the first fence in an array of fences to signal.
>
> This is useful for device driver specific resource managers
> and also Vulkan needs something similar.
>
> v2: more parameter checks, handling for timeout==0,
> remove NULL entry support, better callback removal.
>
> Signed-off-by: Christian König
> Reviewed-by: Alex Deucher
> ---
> drivers/dma-buf/fence.c | 98
> +
> include/linux/fence.h | 3 +-
> 2 files changed, 100 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/dma-buf/fence.c b/drivers/dma-buf/fence.c
> index 50ef8bd..7b05dbe 100644
> --- a/drivers/dma-buf/fence.c
> +++ b/drivers/dma-buf/fence.c
> @@ -397,6 +397,104 @@ out:
> }
> EXPORT_SYMBOL(fence_default_wait);
>
> +static bool
> +fence_test_signaled_any(struct fence **fences, uint32_t count)
> +{
> + int i;
> +
> + for (i = 0; i < count; ++i) {
> + struct fence *fence = fences[i];
> + if (test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->flags))
> + return true;
> + }
> + return false;
> +}
> +
> +/**
> + * fence_wait_any_timeout - sleep until any fence gets signaled
> + * or until timeout elapses
> + * @fences: [in]array of fences to wait on
> + * @count: [in]number of fences to wait on
> + * @intr:[in]if true, do an interruptible wait
> + * @timeout: [in]timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
> + *
> + * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if
> + * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies
> + * on success.
> + *
> + * Synchronous waits for the first fence in the array to be signaled. The
> + * caller needs to hold a reference to all fences in the array, otherwise a
> + * fence might be freed before return, resulting in undefined behavior.
> + */
> +signed long
> +fence_wait_any_timeout(struct fence **fences, uint32_t count,
> +bool intr, signed long timeout)
> +{
> + struct default_wait_cb *cb;
> + signed long ret = timeout;
> + unsigned i;
> +
> + if (WARN_ON(!fences || !count || timeout < 0))
> + return -EINVAL;
> +
> + if (timeout == 0) {
> + for (i = 0; i < count; ++i)
> + if (fence_is_signaled(fences[i]))
> + return 1;
> +
> + return 0;
> + }
> +
> + cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL);
> + if (cb == NULL) {
> + ret = -ENOMEM;
> + goto err_free_cb;
> + }
> +
> + for (i = 0; i < count; ++i) {
> + struct fence *fence = fences[i];
> +
> + if (fence->ops->wait != fence_default_wait) {
> + ret = -EINVAL;
> + goto fence_rm_cb;
> + }
> +
> + cb[i].task = current;
> + if (fence_add_callback(fence, &cb[i].base,
> +fence_default_wait_cb)) {
> + /* This fence is already signaled */
> + goto fence_rm_cb;
> + }
> + }
> +
> + while (ret > 0) {
> + if (intr)
> + set_current_state(TASK_INTERRUPTIBLE);
> + else
> + set_current_state(TASK_UNINTERRUPTIBLE);
> +
> + if (fence_test_signaled_any(fences, count))
> + break;
> +
> + ret = schedule_timeout(ret);
> +
> + if (ret > 0 && intr && signal_pending(current))
> + ret = -ERESTARTSYS;
> + }
> +
> + __set_current_state(TASK_RUNNING);
> +
> +fence_rm_cb:
> + while (i-- > 0)
> + fence_remove_callback(fences[i], &cb[i].base);
> +
> +err_free_cb:
> + kfree(cb);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL(fence_wait_any_timeout);
> +
> /**
>* fence_init - Initialize a custom fence.
>* @fence: [in]the fence to initialize
> diff --git a/include/linux/fence.h b/include/linux/fence.h
> index ddc0f26..bb52201 100644
> --- a/include/linux/fence.h
> +++ b/include/linux/fence.h
> @@ -321,7 +321,8 @@ static inline struct fence *fence_later(struct fence *f1,
> struct fence *f2)
> }
>
> signed long fence_wait_timeout(struct fence *, bool intr, signed long
> timeout);
> -
> +signed long fence_wait_any_timeout(struct fence **fences, uint32_t count,
> +bool intr, signed long timeout);
>
> /**
>* fence_wait - sleep until the fence gets signaled
[PATCH v9 10/17] phy: Add driver for rockchip Display Port PHY
Add phy driver for the Rockchip DisplayPort PHY module. This
is required to get DisplayPort working in Rockchip SoCs.
Reviewed-by: Heiko Stuebner
Signed-off-by: Yakir Yang
---
Changes in v9:
- Removed the unused the variable "res" in probe function. (Heiko)
- Removed the unused head file.
Changes in v8:
- Fix the mixed spacers on macro definitions. (Heiko)
- Remove the unnecessary empty line after clk_prepare_enable. (Heiko)
Changes in v7:
- Simply the commit message. (Kishon)
- Symmetrical enable/disbale the phy clock and power. (Kishon)
Changes in v6: None
Changes in v5:
- Remove "reg" DT property, cause driver could poweron/poweroff phy via
the exist "grf" syscon already. And rename the example DT node from
"edp_phy: phy at ff770274" to "edp_phy: edp-phy" directly. (Heiko)
- Add deivce_node at the front of driver, update phy_ops type from "static
struct" to "static const struct". And correct the input paramters of
devm_phy_create() interfaces. (Heiko)
Changes in v4:
- Add commit message, and remove the redundant rockchip_dp_phy_init()
function, move those code to probe() method. And remove driver .owner
number. (Kishon)
Changes in v3:
- Suggest, add rockchip dp phy driver, collect the phy clocks and
power control. (Heiko)
Changes in v2: None
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-rockchip-dp.c | 151 ++
3 files changed, 159 insertions(+)
create mode 100644 drivers/phy/phy-rockchip-dp.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 7eb5859d..7355819 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -319,6 +319,13 @@ config PHY_ROCKCHIP_USB
help
Enable this to support the Rockchip USB 2.0 PHY.
+config PHY_ROCKCHIP_DP
+ tristate "Rockchip Display Port PHY Driver"
+ depends on ARCH_ROCKCHIP && OF
+ select GENERIC_PHY
+ help
+ Enable this to support the Rockchip Display Port PHY.
+
config PHY_ST_SPEAR1310_MIPHY
tristate "ST SPEAR1310-MIPHY driver"
select GENERIC_PHY
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 075db1a..b1700cd 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -35,6 +35,7 @@ phy-exynos-usb2-$(CONFIG_PHY_S5PV210_USB2)+=
phy-s5pv210-usb2.o
obj-$(CONFIG_PHY_EXYNOS5_USBDRD) += phy-exynos5-usbdrd.o
obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)+= phy-qcom-apq8064-sata.o
obj-$(CONFIG_PHY_ROCKCHIP_USB) += phy-rockchip-usb.o
+obj-$(CONFIG_PHY_ROCKCHIP_DP) += phy-rockchip-dp.o
obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)+= phy-qcom-ipq806x-sata.o
obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY) += phy-spear1310-miphy.o
obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY) += phy-spear1340-miphy.o
diff --git a/drivers/phy/phy-rockchip-dp.c b/drivers/phy/phy-rockchip-dp.c
new file mode 100644
index 000..f3e0058
--- /dev/null
+++ b/drivers/phy/phy-rockchip-dp.c
@@ -0,0 +1,151 @@
+/*
+ * Rockchip DP PHY driver
+ *
+ * Copyright (C) 2015 FuZhou Rockchip Co., Ltd.
+ * Author: Yakir Yang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define GRF_SOC_CON12 0x0274
+
+#define GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK BIT(4)
+#define GRF_EDP_REF_CLK_SEL_INTER BIT(4)
+
+#define GRF_EDP_PHY_SIDDQ_HIWORD_MASK BIT(21)
+#define GRF_EDP_PHY_SIDDQ_ON0
+#define GRF_EDP_PHY_SIDDQ_OFF BIT(5)
+
+struct rockchip_dp_phy {
+ struct device *dev;
+ struct regmap *grf;
+ struct clk *phy_24m;
+};
+
+static int rockchip_set_phy_state(struct phy *phy, bool enable)
+{
+ struct rockchip_dp_phy *dp = phy_get_drvdata(phy);
+ int ret;
+
+ if (enable) {
+ ret = regmap_write(dp->grf, GRF_SOC_CON12,
+ GRF_EDP_PHY_SIDDQ_HIWORD_MASK |
+ GRF_EDP_PHY_SIDDQ_ON);
+ if (ret < 0) {
+ dev_err(dp->dev, "Can't enable PHY power %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(dp->phy_24m);
+ } else {
+ clk_disable_unprepare(dp->phy_24m);
+
+ ret = regmap_write(dp->grf, GRF_SOC_CON12,
+ GRF_EDP_PHY_SIDDQ_HIWORD_MASK |
+ GRF_EDP_PHY_SIDDQ_OFF);
+ }
+
+ return ret;
+}
+
+static int rockchip_dp_phy_power_on(struct phy *phy)
+{
+ return rockchip_set_phy_state(phy, true);
+}
+
+static int rockchip_dp_phy_power_off(struct phy *phy)
+{
+ return rockchip_set_phy_state(phy, false);
+}
+
+static const struct phy_ops rockchip_dp_phy_ops = {
+ .p
[PATCH v8 06/17] dt-bindings: add document for analogix display port driver
Am Donnerstag, 29. Oktober 2015, 09:12:21 schrieb Yakir Yang: > Hi Heiko, > > On 10/29/2015 04:02 AM, Heiko Stuebner wrote: > > Hi Yakir, > > > > Am Mittwoch, 28. Oktober 2015, 16:26:33 schrieb Yakir Yang: > >> diff --git > >> a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt > >> b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt > >> index 7a3a9cd..9905081 100644 > >> --- a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt > >> +++ b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt > >> @@ -31,45 +31,31 @@ Required properties for dp-controller: > >>from general PHY binding: the phandle for the PHY device. > >>-phy-names: > >>from general PHY binding: Should be "dp". > >> - -samsung,color-space: > >> - input video data format. > >> - COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2 > >> - -samsung,dynamic-range: > >> - dynamic range for input video data. > >> - VESA = 0, CEA = 1 > >> - -samsung,ycbcr-coeff: > >> - YCbCr co-efficients for input video. > >> - COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1 > >> - -samsung,color-depth: > >> - number of bits per colour component. > >> - COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3 > >> - -samsung,link-rate: > >> - link rate supported by the panel. > >> - LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A > >> - -samsung,lane-count: > >> - number of lanes supported by the panel. > >> - LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4 > >> - - display-timings: timings for the connected panel as described by > >> - Documentation/devicetree/bindings/video/display-timing.txt > > > > ^^ display/display-timings.txt > > otherwise this patch does not apply. > > I thought I have deleted this old path of "display-timing.txt", and > changed it to > > - Documentation/devicetree/bindings/video/display-timing.txt in the changes I got from Rob Hering's dt-branch [0] the path in the file is already display/display-timing.txt so applying a change with video/... in it fails. Anyway, as this will probably only make it in after the merge- window, we can see how this ends up before anyway :-) . > > + > Documentation/devicetree/bindings/display/panel/display-timing.txt > > And the real path of "display-timing.txt" in linux-next [tag 20151022] > do under > the "display/panel/", those change should be right. Heiko [0] https://git.kernel.org/cgit/linux/kernel/git/robh/linux.git/commit/?h=dt/next&id=efdbd7345f8836f7495f3ac6ee237d86cb3bb6b0
[PATCH v8 10/17] phy: Add driver for rockchip Display Port PHY
Hi Heiko,
On 10/29/2015 04:36 AM, Heiko Stuebner wrote:
> Hi Yakir,
>
> Am Mittwoch, 28. Oktober 2015, 16:30:33 schrieb Yakir Yang:
>> +static int rockchip_dp_phy_probe(struct platform_device *pdev)
>> +{
>> +struct device *dev = &pdev->dev;
>> +struct device_node *np = dev->of_node;
>> +struct phy_provider *phy_provider;
>> +struct rockchip_dp_phy *dp;
>> +struct resource *res;
> drivers/phy/phy-rockchip-dp.c: In function 'rockchip_dp_phy_probe':
> drivers/phy/phy-rockchip-dp.c:86:19: warning: unused variable 'res'
> [-Wunused-variable]
Oh, thanks, would send v9 of this one alone.
- Yakir
>> +struct phy *phy;
>> +int ret;
>> +
>> +if (!np)
>> +return -ENODEV;
>> +
>> +dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
>> +if (IS_ERR(dp))
>> +return -ENOMEM;
>> +
>> +dp->dev = dev;
>> +
>> +dp->phy_24m = devm_clk_get(dev, "24m");
>> +if (IS_ERR(dp->phy_24m)) {
>> +dev_err(dev, "cannot get clock 24m\n");
>> +return PTR_ERR(dp->phy_24m);
>> +}
>> +
>> +ret = clk_set_rate(dp->phy_24m, 2400);
>> +if (ret < 0) {
>> +dev_err(dp->dev, "cannot set clock phy_24m %d\n", ret);
>> +return ret;
>> +}
>> +
>
>
>
[PATCH v8 06/17] dt-bindings: add document for analogix display port driver
Hi Heiko, On 10/29/2015 04:02 AM, Heiko Stuebner wrote: > Hi Yakir, > > Am Mittwoch, 28. Oktober 2015, 16:26:33 schrieb Yakir Yang: >> diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >> b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >> index 7a3a9cd..9905081 100644 >> --- a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >> +++ b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt >> @@ -31,45 +31,31 @@ Required properties for dp-controller: >> from general PHY binding: the phandle for the PHY device. >> -phy-names: >> from general PHY binding: Should be "dp". >> --samsung,color-space: >> -input video data format. >> -COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2 >> --samsung,dynamic-range: >> -dynamic range for input video data. >> -VESA = 0, CEA = 1 >> --samsung,ycbcr-coeff: >> -YCbCr co-efficients for input video. >> -COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1 >> --samsung,color-depth: >> -number of bits per colour component. >> -COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3 >> --samsung,link-rate: >> -link rate supported by the panel. >> -LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A >> --samsung,lane-count: >> -number of lanes supported by the panel. >> -LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4 >> -- display-timings: timings for the connected panel as described by >> -Documentation/devicetree/bindings/video/display-timing.txt > > ^^ display/display-timings.txt > otherwise this patch does not apply. I thought I have deleted this old path of "display-timing.txt", and changed it to - Documentation/devicetree/bindings/video/display-timing.txt + Documentation/devicetree/bindings/display/panel/display-timing.txt And the real path of "display-timing.txt" in linux-next [tag 20151022] do under the "display/panel/", those change should be right. Thanks, - Yakir
[Bug 92722] radeon 0000:01:00.0: VCE init error (-22) on Kernel >= 4.2
https://bugs.freedesktop.org/show_bug.cgi?id=92722 Bug ID: 92722 Summary: radeon :01:00.0: VCE init error (-22) on Kernel >= 4.2 Product: Mesa Version: 11.0 Hardware: Other OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel at lists.freedesktop.org Reporter: lblmr at yopmail.com QA Contact: dri-devel at lists.freedesktop.org Hey guys, When I run any 4.2 kernel, I get this VCE init error Oct 28 21:44:46 hosty kernel: [drm] PCIE gen 3 link speeds already enabled Oct 28 21:44:46 hosty kernel: [drm] PCIE GART of 2048M enabled (table at 0x0004). Oct 28 21:44:46 hosty kernel: radeon :01:00.0: WB enabled Oct 28 21:44:46 hosty kernel: radeon :01:00.0: fence driver on ring 0 use gpu addr 0x8c00 and cpu addr 0x88021d960c00 Oct 28 21:44:46 hosty kernel: radeon :01:00.0: fence driver on ring 1 use gpu addr 0x8c04 and cpu addr 0x88021d960c04 Oct 28 21:44:46 hosty kernel: radeon :01:00.0: fence driver on ring 2 use gpu addr 0x8c08 and cpu addr 0x88021d960c08 Oct 28 21:44:46 hosty kernel: radeon :01:00.0: fence driver on ring 3 use gpu addr 0x8c0c and cpu addr 0x88021d960c0c Oct 28 21:44:46 hosty kernel: radeon :01:00.0: fence driver on ring 4 use gpu addr 0x8c10 and cpu addr 0x88021d960c10 Oct 28 21:44:46 hosty kernel: radeon :01:00.0: VCE init error (-22). Oct 28 21:44:46 hosty kernel: [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). Oct 28 21:44:46 hosty kernel: [drm] Driver supports precise vblank timestamp query. Oct 28 21:44:46 hosty kernel: radeon :01:00.0: radeon: MSI limited to 32-bit Oct 28 21:44:46 hosty kernel: radeon :01:00.0: radeon: using MSI. Oct 28 21:44:46 hosty kernel: [drm] radeon: irq initialized. More info here: https://bugzilla.redhat.com/show_bug.cgi?id=1262649#c4 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151029/212974e4/attachment.html>
[Bug 92709] "LLVM triggered Diagnostic Handler: unsupported call to function ldexpf in main" when starting race in stuntrally
https://bugs.freedesktop.org/show_bug.cgi?id=92709
Michel Dänzer changed:
What|Removed |Added
CC||arsenm2 at gmail.com,
||tstellar at gmail.com
--- Comment #1 from Michel Dänzer ---
This happens since Mesa commit d72a26ec ("radeonsi: don't emit AMDGPU
intrinsics for EX2, ROUND, TRUNC") because the LLVM function
LibCallSimplifier::optimizeExp2() replaces the llvm.exp2.f32 call (which could
be handled by the AMDGPU backend AFAICT) with an ldexpf one.
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