[Bug 198551] amdgpu error on shutdown or gpu intense game

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=198551

--- Comment #1 from fin4...@hotmail.com ---
You are using really old kernel and amdgpu driver. Use this one before making
bug reports:
https://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-4.17-wip

And follow when a new wip kernel repository is created. Also use Oibaf ppa or
similar fresh Mesa. Easiest to use amdgpu open source drivers is with Debian
testing Xfce.

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[Bug 104804] A gpu lockup occurred on E6760 while using qtcreator

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104804

--- Comment #1 from Appenper  ---
Created attachment 136981
  --> https://bugs.freedesktop.org/attachment.cgi?id=136981&action=edit
Xorg log

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[PATCH 8/9] drm/dp: Export AUX_RETRY_INTERVAL

[Dhinakaran Pandiyan]

Drivers can use this in their retry loops too.

Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Dhinakaran Pandiyan 
---
 drivers/gpu/drm/drm_dp_helper.c | 12 +---
 include/drm/drm_dp_helper.h |  2 ++
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index ffe14ec3e7f2..0a7c8d6e7d8c 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -169,8 +169,6 @@ int drm_dp_bw_code_to_link_rate(u8 link_bw)
 }
 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
 
-#define AUX_RETRY_INTERVAL 500 /* us */
-
 /**
  * DOC: dp helpers
  *
@@ -206,8 +204,8 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 
request,
 */
for (retry = 0; retry < 32; retry++) {
if (ret != 0 && ret != -ETIMEDOUT) {
-   usleep_range(AUX_RETRY_INTERVAL,
-AUX_RETRY_INTERVAL + 100);
+   usleep_range(DP_AUX_RETRY_INTERVAL,
+DP_AUX_RETRY_INTERVAL + 100);
}
 
ret = aux->transfer(aux, &msg);
@@ -718,7 +716,7 @@ static int drm_dp_i2c_retry_count(const struct 
drm_dp_aux_msg *msg,
drm_dp_aux_reply_duration(msg);
int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz);
 
-   return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL);
+   return DIV_ROUND_UP(i2c_time_us, aux_time_us + DP_AUX_RETRY_INTERVAL);
 }
 
 /*
@@ -795,7 +793,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct 
drm_dp_aux_msg *msg)
 * For now just defer for long enough to hopefully be
 * safe for all use-cases.
 */
-   usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 
100);
+   usleep_range(DP_AUX_RETRY_INTERVAL, 
DP_AUX_RETRY_INTERVAL + 100);
continue;
 
default:
@@ -827,7 +825,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct 
drm_dp_aux_msg *msg)
aux->i2c_defer_count++;
if (defer_i2c < 7)
defer_i2c++;
-   usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 
100);
+   usleep_range(DP_AUX_RETRY_INTERVAL, 
DP_AUX_RETRY_INTERVAL + 100);
drm_dp_i2c_msg_write_status_update(msg);
 
continue;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c239e6e24a10..2eae1aed2d26 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -61,6 +61,8 @@
 #define DP_AUX_I2C_REPLY_DEFER (0x2 << 2)
 #define DP_AUX_I2C_REPLY_MASK  (0x3 << 2)
 
+#define DP_AUX_RETRY_INTERVAL  500 /* us */
+
 /* AUX CH addresses */
 /* DPCD */
 #define DP_DPCD_REV 0x000
-- 
2.14.1

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[Bug 104804] A gpu lockup occurred on E6760 while using qtcreator

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104804

Bug ID: 104804
   Summary: A gpu lockup occurred on E6760 while using qtcreator
   Product: Mesa
   Version: 11.2
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/Gallium/r600
  Assignee: dri-devel@lists.freedesktop.org
  Reporter: appen...@gmail.com
QA Contact: dri-devel@lists.freedesktop.org

Created attachment 136980
  --> https://bugs.freedesktop.org/attachment.cgi?id=136980&action=edit
lspci output

[  695.093933] radeon :01:00.0: ring 0 stalled for more than 10150msec
[  695.100523] radeon :01:00.0: GPU lockup (current fence id
0xbefe last fence id 0xbf3e on ring 0)
[  695.100673] radeon :01:00.0: failed to get a new IB (-35)
[  695.100676] radeon :01:00.0: failed to get a new IB (-35)
[  695.100678] radeon :01:00.0: failed to get a new IB (-35)
[  695.100681] radeon :01:00.0: failed to get a new IB (-35)
[  695.100691] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100695] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100701] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100707] radeon :01:00.0: failed to get a new IB (-35)
[  695.100710] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100712] radeon :01:00.0: failed to get a new IB (-35)
[  695.100715] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100721] radeon :01:00.0: failed to get a new IB (-35)
[  695.100723] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100727] radeon :01:00.0: failed to get a new IB (-35)
[  695.100730] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100734] radeon :01:00.0: failed to get a new IB (-35)
[  695.100737] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100741] radeon :01:00.0: failed to get a new IB (-35)
[  695.100744] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100747] radeon :01:00.0: failed to get a new IB (-35)
[  695.100749] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100753] radeon :01:00.0: failed to get a new IB (-35)
[  695.100756] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100759] radeon :01:00.0: failed to get a new IB (-35)
[  695.100762] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.100766] radeon :01:00.0: failed to get a new IB (-35)
[  695.119228] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  695.968594] [drm:radeon_cs_ioctl] *ERROR* Failed to get ib !
[  696.004823] radeon :01:00.0: Saved 2034 dwords of commands on ring 0.
[  696.004856] radeon :01:00.0: GPU softreset: 0x0008
[  696.004861] radeon :01:00.0:   GRBM_STATUS   = 0xA0003828
[  696.004866] radeon :01:00.0:   GRBM_STATUS_SE0   = 0x0007
[  696.004871] radeon :01:00.0:   GRBM_STATUS_SE1   = 0x0007
[  696.004876] radeon :01:00.0:   SRBM_STATUS   = 0x20C0
[  696.004880] radeon :01:00.0:   SRBM_STATUS2  = 0x
[  696.004885] radeon :01:00.0:   R_008674_CP_STALLED_STAT1 = 0x
[  696.004889] radeon :01:00.0:   R_008678_CP_STALLED_STAT2 = 0x4100
[  696.004894] radeon :01:00.0:   R_00867C_CP_BUSY_STAT = 0x00020182
[  696.004899] radeon :01:00.0:   R_008680_CP_STAT  = 0x80028243
[  696.004903] radeon :01:00.0:   R_00D034_DMA_STATUS_REG   = 0x44C83D57
[  696.054035] radeon :01:00.0: GRBM_SOFT_RESET=0x4001
[  696.054093] radeon :01:00.0: SRBM_SOFT_RESET=0x0100
[  696.055256] radeon :01:00.0:   GRBM_STATUS   = 0x3828
[  696.055260] radeon :01:00.0:   GRBM_STATUS_SE0   = 0x0007
[  696.055265] radeon :01:00.0:   GRBM_STATUS_SE1   = 0x0007
[  696.055269] radeon :01:00.0:   SRBM_STATUS   = 0x20C0
[  696.055274] radeon :01:00.0:   SRBM_STATUS2  = 0x
[  696.055278] radeon :01:00.0:   R_008674_CP_STALLED_STAT1 = 0x
[  696.055282] radeon :01:00.0:   R_008678_CP_STALLED_STAT2 = 0x
[  696.055286] radeon :01:00.0:   R_00867C_CP_BUSY_STAT = 0x
[  696.055290] radeon :01:00.0:   R_008680_CP_STAT  = 0x
[  696.055295] radeon :01:00.0:   R_00D034_DMA_STATUS_REG   = 0x44C83D57
[  696.055332] radeon :01:00.0: GPU reset succeeded, trying to resume
[  696.067624] [drm] PCIE gen 2 link speeds already enabled
[  696.129090] [drm] PCIE GART of 1024M enabled (table at 0x00162000).
[  696.129270] radeon :01:00.0: WB enabled
[  696.129277] radeon :01:00.0: fence driver on ring 0 use gpu addr
0x2c00 and cpu addr 0xffc4eaa7bc00
[  696.129283] radeon :01:00.0: fence driver on ring 3 use gpu addr
0x2c0c and cpu addr 0xffc4eaa7bc0c
[  696.151289] radeon :01:00.0: fence driver on

[Bug 104730] VLC crashes on playback with "READ_ONLY without WC is disallowed"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104730

--- Comment #4 from EoD  ---
(In reply to Marek Olšák from comment #3)
> Fixed by that commit.

Yes, VLC plays fine again. Thanks.

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[Bug 104730] VLC crashes on playback with "READ_ONLY without WC is disallowed"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104730

Marek Olšák  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|NEW |RESOLVED

--- Comment #3 from Marek Olšák  ---
Fixed by that commit.

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[Bug 104730] VLC crashes on playback with "READ_ONLY without WC is disallowed"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104730

--- Comment #2 from Christoph Haag  ---
https://cgit.freedesktop.org/mesa/mesa/commit/?id=17423c993d0b083c7a77a404b85788687f5efe36
should fix it.

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[Bug 104306] Mesa 17.3 breaks Firefox and other Xwayland apps on AMD HD7750

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104306

--- Comment #16 from eric vz  ---
Thanks a lot, Michel!  I confirmed that 255573996 plus the linked patch works
for me as well.

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[Bug 104762] Various segfaults/problems in qt/plasma

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104762

Timothy Arceri  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|NEW |RESOLVED

--- Comment #11 from Timothy Arceri  ---
Shoul be fixed by the following commit. Please reopen if the issue continues.

commit 041b18cf23a0acf7b0eddf63cd7a2a10192432a1
Author: Timothy Arceri 
Date:   Fri Jan 26 11:56:50 2018 +1100

st/shader_cache: restore num_tgsi_tokens when loading from cache

Without this we will fail to correctly serialise programs when
using glGetProgramBinary() if the program was retrieved from
the disk cache rather than freshly compiled.

Fixes: c69b0dd6817b "st/glsl_to_tgsi: store num_tgsi_tokens in
st_*_program"

Reviewed-by: Gert Wollny 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104762

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[Bug 104281] black / corrupted screen when resuming from S3 [AMDGPU]

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104281

--- Comment #7 from Alex Deucher  ---
Does it work with drm-next-4.17-wip?  There was a non-drm bug that broke S3 in
the kernel what was not fixed until rc6.  amd-staging-drm-next is still based
on rc4.

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Re: [PATCH] include: Move ascii85 functions from i915 to linux/ascii85.h

[Chris Wilson]

Quoting Jordan Crouse (2018-01-26 20:59:22)
> The i915 DRM driver very cleverly used ascii85 encoding for their

All gfx drivers must eventually become PostScript.

> GPU state file. Move the encode functions to a general header file to
> support other drivers that might be interested in the same
> functionality.
> 
> Signed-off-by: Jordan Crouse 
> ---
> diff --git a/include/linux/ascii85.h b/include/linux/ascii85.h
> new file mode 100644
> index 000..7ee39f9
> --- /dev/null
> +++ b/include/linux/ascii85.h
> @@ -0,0 +1,52 @@
> +/*
> + * Copyright (c) 2008 Intel Corporation

Just cut this down to
/*
 * SPDX-License-Identifier: GPL-2.0
 *
 * Copyright (c) 2008 Intel Corporation
 * Copyright (c) 2018 My Name Here
 */

Fortunately ideas themselves are not copyrightable, otherwise Adobe has
a strong claim to ownership.
-Chris
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Re: [PATCH] include: Move ascii85 functions from i915 to linux/ascii85.h

[Chris Wilson]

Quoting Jordan Crouse (2018-01-26 20:59:22)
> The i915 DRM driver very cleverly used ascii85 encoding for their
> GPU state file. Move the encode functions to a general header file to
> support other drivers that might be interested in the same
> functionality.
> 
> Signed-off-by: Jordan Crouse 
> ---
>  drivers/gpu/drm/i915/i915_gpu_error.c | 24 +---
>  include/linux/ascii85.h   | 52 
> +++
>  2 files changed, 53 insertions(+), 23 deletions(-)
>  create mode 100644 include/linux/ascii85.h
> 
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 48418fb..2588f37 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -31,6 +31,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "i915_drv.h"
>  
> @@ -501,29 +502,6 @@ void i915_error_printf(struct drm_i915_error_state_buf 
> *e, const char *f, ...)
> va_end(args);
>  }
>  
> -static int
> -ascii85_encode_len(int len)
> -{
> -   return DIV_ROUND_UP(len, 4);
> -}
> -
> -static bool
> -ascii85_encode(u32 in, char *out)
> -{
> -   int i;
> -
> -   if (in == 0)
> -   return false;
> -
> -   out[5] = '\0';
> -   for (i = 5; i--; ) {
> -   out[i] = '!' + in % 85;
> -   in /= 85;
> -   }
> -
> -   return true;
> -}
> -
>  static void print_error_obj(struct drm_i915_error_state_buf *m,
> struct intel_engine_cs *engine,
> const char *name,
> diff --git a/include/linux/ascii85.h b/include/linux/ascii85.h
> new file mode 100644
> index 000..7ee39f9
> --- /dev/null
> +++ b/include/linux/ascii85.h
> @@ -0,0 +1,52 @@
> +/*
> + * Copyright (c) 2008 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#ifndef _ASCII85_H_
> +#define _ASCII85_H_
> +
> +#include 
> +
> +static inline int
> +ascii85_encode_len(int len)
> +{
> +   return DIV_ROUND_UP(len, 4);
> +}

Use longs for generic stuff.

> +
> +static inline bool
> +ascii85_encode(u32 in, char *out)
> +{
> +   int i;
> +
> +   if (in == 0)
> +   return false;
> +
> +   out[5] = '\0';
> +   for (i = 5; i--; ) {
> +   out[i] = '!' + in % 85;
> +   in /= 85;
> +   }
> +
> +   return true;
> +}

I think you'll want to capture the special case 0 == 'z' in the common
routines.

{
char buf[ASCII85_BUFSZ];
int i, len;

len = ascii85_encode_len(PAGE_SIZE);
for (i = 0; i < len; i++)
err_puts(m, ascii85_encode(obj->pages[page][i], buf));
}   

Looks reasonable for the caller, so

#define ASCII85_BUFSZ 6

static inline const char *
ascii85_encode(u32 in, char *out)
{
int i;

/* check whether out[0] = 'z'; out[1] = '\0'; generates better code */
if (in == 0)
return "z";

out[5] = '\0';
for (i = 5; i--; ) {
out[i] = '!' + in % 85;
in /= 85;
}

return out;
}

-Chris
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[PATCH 1/6] drm/msm: gpu: Capture the state of the GPU

[Jordan Crouse]

Add the infrastructure to capture the state current state of the
GPU and store it in memory.  This is useful for storing the state
of a hung GPU so it can be dumped later.

For now grab the same basic ringbuffer information and registers
that are provided by the debugfs 'gpu' node but obviously this can
be extended to capture a much larger set of GPU information.

Signed-off-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   | 15 +
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   | 14 +
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 22 ++
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 54 +
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  3 ++
 drivers/gpu/drm/msm/msm_gpu.h   | 19 
 6 files changed, 127 insertions(+)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 4baef27..012e997 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -426,6 +426,19 @@ static void a3xx_dump(struct msm_gpu *gpu)
gpu_read(gpu, REG_A3XX_RBBM_STATUS));
adreno_dump(gpu);
 }
+
+static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu)
+{
+   struct msm_gpu_state *state = adreno_gpu_state_get(gpu);
+
+   if (IS_ERR(state))
+   return state;
+
+   state->rbbm_status = gpu_read(gpu, REG_A3XX_RBBM_STATUS);
+
+   return state;
+}
+
 /* Register offset defines for A3XX */
 static const unsigned int a3xx_register_offsets[REG_ADRENO_REGISTER_MAX] = {
REG_ADRENO_DEFINE(REG_ADRENO_CP_RB_BASE, REG_AXXX_CP_RB_BASE),
@@ -452,6 +465,8 @@ static void a3xx_dump(struct msm_gpu *gpu)
 #ifdef CONFIG_DEBUG_FS
.show = a3xx_show,
 #endif
+   .gpu_state_get = a3xx_gpu_state_get,
+   .gpu_state_put = adreno_gpu_state_put,
},
 };
 
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 8199a4b..c875dccc 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -464,6 +464,18 @@ static void a4xx_show(struct msm_gpu *gpu, struct seq_file 
*m)
 }
 #endif
 
+static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu)
+{
+   struct msm_gpu_state *state = adreno_gpu_state_get(gpu);
+
+   if (IS_ERR(state))
+   return state;
+
+   state->rbbm_status = gpu_read(gpu, REG_A4XX_RBBM_STATUS);
+
+   return state;
+}
+
 /* Register offset defines for A4XX, in order of enum adreno_regs */
 static const unsigned int a4xx_register_offsets[REG_ADRENO_REGISTER_MAX] = {
REG_ADRENO_DEFINE(REG_ADRENO_CP_RB_BASE, REG_A4XX_CP_RB_BASE),
@@ -540,6 +552,8 @@ static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t 
*value)
 #ifdef CONFIG_DEBUG_FS
.show = a4xx_show,
 #endif
+   .gpu_state_get = a4xx_gpu_state_get,
+   .gpu_state_put = adreno_gpu_state_put,
},
.get_timestamp = a4xx_get_timestamp,
 };
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 7e09d44..6199a67 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1149,6 +1149,26 @@ static int a5xx_get_timestamp(struct msm_gpu *gpu, 
uint64_t *value)
return 0;
 }
 
+static struct msm_gpu_state *a5xx_gpu_state_get(struct msm_gpu *gpu)
+{
+   struct msm_gpu_state *state;
+
+   /*
+* Temporarily disable hardware clock gating before going into
+* adreno_show to avoid issues while reading the registers
+*/
+   a5xx_set_hwcg(gpu, false);
+
+   state = adreno_gpu_state_get(gpu);
+
+   if (!IS_ERR(state))
+   state->rbbm_status = gpu_read(gpu, REG_A5XX_RBBM_STATUS);
+
+   a5xx_set_hwcg(gpu, true);
+
+   return state;
+}
+
 #ifdef CONFIG_DEBUG_FS
 static void a5xx_show(struct msm_gpu *gpu, struct seq_file *m)
 {
@@ -1197,6 +1217,8 @@ static int a5xx_gpu_busy(struct msm_gpu *gpu, uint64_t 
*value)
.show = a5xx_show,
 #endif
.gpu_busy = a5xx_gpu_busy,
+   .gpu_state_get = a5xx_gpu_state_get,
+   .gpu_state_put = adreno_gpu_state_put,
},
.get_timestamp = a5xx_get_timestamp,
 };
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index de63ff2..754b88b 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -362,6 +362,60 @@ bool adreno_idle(struct msm_gpu *gpu, struct 
msm_ringbuffer *ring)
return false;
 }
 
+struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu *gpu)
+{
+   struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+   struct msm_gpu_state *state;
+   int i, count = 0;
+
+   state = kzalloc(sizeof(*state), GFP_KERNEL);
+   if (!state)
+   return ERR_PTR(-ENOMEM);
+
+   do_gettimeofday(&sta

[PATCH 6/6] drm/msm/adreno: Add a5xx specific registers for the GPU state

[Jordan Crouse]

HLSQ, SP and TP registers are only accessible from a special
aperture and to make matters worsex, the aperture is blocked from
the CPU on targets that can support secure rendering. Luckily the
GPU hardware has its own purpose built register dumper that can
access the registers from the aperture. Add a5xx specific code
to program the crashdumper and retrieve the wayward registers
and dump them for the crash state.

Also, remove a block of registers the regular CPU accessible
list that aren't useful for debug which helps reduce the size
of the crash state file by a goodly amount.

Signed-off-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   |   8 +-
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   |   8 +-
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 234 ++--
 drivers/gpu/drm/msm/adreno/adreno_gpu.c |  23 ++--
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |   4 +-
 5 files changed, 246 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 72e523f1..14340e3 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -420,10 +420,12 @@ static void a3xx_dump(struct msm_gpu *gpu)
 
 static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu)
 {
-   struct msm_gpu_state *state = adreno_gpu_state_get(gpu);
+   struct msm_gpu_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
 
-   if (IS_ERR(state))
-   return state;
+   if (!state)
+   return ERR_PTR(-ENOMEM);
+
+   adreno_gpu_state_get(gpu, state);
 
state->rbbm_status = gpu_read(gpu, REG_A3XX_RBBM_STATUS);
 
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index e363e65..4dde681 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -456,10 +456,12 @@ static irqreturn_t a4xx_irq(struct msm_gpu *gpu)
 
 static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu)
 {
-   struct msm_gpu_state *state = adreno_gpu_state_get(gpu);
+   struct msm_gpu_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
 
-   if (IS_ERR(state))
-   return state;
+   if (!state)
+   return ERR_PTR(-ENOMEM);
+
+   adreno_gpu_state_get(gpu, state);
 
state->rbbm_status = gpu_read(gpu, REG_A4XX_RBBM_STATUS);
 
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 971aaee..1fd158b 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "msm_gem.h"
 #include "msm_mmu.h"
 #include "a5xx_gpu.h"
@@ -1077,8 +1078,9 @@ static irqreturn_t a5xx_irq(struct msm_gpu *gpu)
0xE800, 0xE806, 0xE810, 0xE89A, 0xE8A0, 0xE8A4, 0xE8AA, 0xE8EB,
0xE900, 0xE905, 0xEB80, 0xEB8F, 0xEBB0, 0xEBB0, 0xEC00, 0xEC05,
0xEC08, 0xECE9, 0xECF0, 0xECF0, 0xEA80, 0xEA80, 0xEA82, 0xEAA3,
-   0xEAA5, 0xEAC2, 0xA800, 0xA8FF, 0xAC60, 0xAC60, 0xB000, 0xB97F,
-   0xB9A0, 0xB9BF, ~0
+   0xEAA5, 0xEAC2, 0xA800, 0xA800, 0xA820, 0xA828, 0xA840, 0xA87D,
+   0XA880, 0xA88D, 0xA890, 0xA8A3, 0xA8D0, 0xA8D8, 0xA8E0, 0xA8F5,
+   0xAC60, 0xAC60, ~0,
 };
 
 static void a5xx_dump(struct msm_gpu *gpu)
@@ -1149,24 +1151,230 @@ static int a5xx_get_timestamp(struct msm_gpu *gpu, 
uint64_t *value)
return 0;
 }
 
+struct a5xx_crashdumper {
+   void *ptr;
+   struct drm_gem_object *bo;
+   u64 iova;
+};
+
+struct a5xx_gpu_state {
+   struct msm_gpu_state base;
+   u32 *hlsqregs;
+};
+
+#define gpu_poll_timeout(gpu, addr, val, cond, interval, timeout) \
+   readl_poll_timeout((gpu)->mmio + ((addr) << 2), val, cond, \
+   interval, timeout)
+
+static int a5xx_crashdumper_init(struct msm_gpu *gpu,
+   struct a5xx_crashdumper *dumper)
+{
+   dumper->ptr = msm_gem_kernel_new_locked(gpu->dev,
+   SZ_1M, MSM_BO_UNCACHED, gpu->aspace,
+   &dumper->bo, &dumper->iova);
+
+   if (IS_ERR(dumper->ptr))
+   return PTR_ERR(dumper->ptr);
+
+   return 0;
+}
+
+static void a5xx_crashdumper_free(struct msm_gpu *gpu,
+   struct a5xx_crashdumper *dumper)
+{
+   msm_gem_put_iova(dumper->bo, gpu->aspace);
+
+   drm_gem_object_unreference(dumper->bo);
+}
+
+static int a5xx_crashdumper_run(struct msm_gpu *gpu,
+   struct a5xx_crashdumper *dumper)
+{
+   u32 val;
+
+   if (IS_ERR_OR_NULL(dumper->ptr))
+   return -EINVAL;
+
+   gpu_write64(gpu, REG_A5XX_CP_CRASH_SCRIPT_BASE_LO,
+   REG_A5XX_CP_CRASH_SCRIPT_BASE_HI, dumper->iova);
+
+   gpu_write(gpu, REG_A5XX_CP_CRASH_DUMP_CNTL, 1);
+
+   return gpu_poll_timeout(gpu, REG_A5XX_CP_CRASH_DUMP_CNTL, val,
+   val & 0x04, 100, 1);
+}
+
+/*
+ * These are a list of the registers that need to be read through t

[PATCH 3/6] drm/msm: gpu: Capture the GPU state on a GPU hang

[Jordan Crouse]

Capture the GPU state on a GPU hang and store it for later playback
using the 'crash' node in the debugfs directory.  Only one crash
state is stored at a time on the assumption that the first hang is
usually the most interesting. The existing crash state can be cleared
by writing to the debugfs node and then a new one will be captured
on the next hang.

Signed-off-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 18 --
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  2 +-
 drivers/gpu/drm/msm/msm_debugfs.c   | 61 +
 drivers/gpu/drm/msm/msm_gpu.c   | 47 -
 drivers/gpu/drm/msm/msm_gpu.h   | 36 ++-
 5 files changed, 151 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 81da214..963fce3 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -372,6 +372,8 @@ struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu 
*gpu)
if (!state)
return ERR_PTR(-ENOMEM);
 
+   kref_init(&state->ref);
+
do_gettimeofday(&state->time);
 
for (i = 0; i < gpu->nr_rings; i++) {
@@ -407,15 +409,25 @@ struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu 
*gpu)
return state;
 }
 
-void adreno_gpu_state_put(struct msm_gpu_state *state)
+static void adreno_gpu_state_destroy(struct kref *kref)
 {
-   if (IS_ERR_OR_NULL(state))
-   return;
+   struct msm_gpu_state *state = container_of(kref,
+   struct msm_gpu_state, ref);
 
+   kfree(state->comm);
+   kfree(state->cmd);
kfree(state->registers);
kfree(state);
 }
 
+int adreno_gpu_state_put(struct msm_gpu_state *state)
+{
+   if (IS_ERR_OR_NULL(state))
+   return 1;
+
+   return kref_put(&state->ref, adreno_gpu_state_destroy);
+}
+
 #ifdef CONFIG_DEBUG_FS
 void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
struct seq_file *m)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index b44e0b9..bcf755e 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -221,7 +221,7 @@ int adreno_gpu_init(struct drm_device *drm, struct 
platform_device *pdev,
 void adreno_gpu_cleanup(struct adreno_gpu *gpu);
 
 struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu *gpu);
-void adreno_gpu_state_put(struct msm_gpu_state *state);
+int adreno_gpu_state_put(struct msm_gpu_state *state);
 
 /* ringbuffer helpers (the parts that are adreno specific) */
 
diff --git a/drivers/gpu/drm/msm/msm_debugfs.c 
b/drivers/gpu/drm/msm/msm_debugfs.c
index 89ee74b..50e049c 100644
--- a/drivers/gpu/drm/msm/msm_debugfs.c
+++ b/drivers/gpu/drm/msm/msm_debugfs.c
@@ -16,11 +16,69 @@
  */
 
 #ifdef CONFIG_DEBUG_FS
+
+#include 
+#include 
 #include "msm_drv.h"
 #include "msm_gpu.h"
 #include "msm_kms.h"
 #include "msm_debugfs.h"
 
+static int msm_gpu_crash_show(struct seq_file *m, void *data)
+{
+   struct msm_gpu *gpu = m->private;
+   struct msm_gpu_state *state;
+
+   state = msm_gpu_crashstate_get(gpu);
+   if (!state)
+   return 0;
+
+   seq_printf(m, "%s Crash Status:\n", gpu->name);
+   seq_puts(m, "Kernel: " UTS_RELEASE "\n");
+   seq_printf(m, "Time: %ld s %ld us\n",
+   state->time.tv_sec, state->time.tv_usec);
+   if (state->comm)
+   seq_printf(m, "comm: %s\n", state->comm);
+   if (state->cmd)
+   seq_printf(m, "cmdline: %s\n", state->cmd);
+
+   gpu->funcs->show(gpu, state, m);
+
+   msm_gpu_crashstate_put(gpu);
+
+   return 0;
+}
+
+static ssize_t msm_gpu_crash_write(struct file *file, const char __user *buf,
+   size_t count, loff_t *pos)
+{
+   struct msm_gpu *gpu = ((struct seq_file *)file->private_data)->private;
+
+   dev_err(gpu->dev->dev, "Releasing the GPU crash state\n");
+   msm_gpu_crashstate_put(gpu);
+
+   return count;
+}
+
+static int msm_gpu_crash_open(struct inode *inode, struct file *file)
+{
+   struct msm_drm_private *priv = inode->i_private;
+
+   if (!priv->gpu)
+   return -ENODEV;
+
+   return single_open(file, msm_gpu_crash_show, priv->gpu);
+}
+
+static const struct file_operations msm_gpu_crash_fops = {
+   .owner = THIS_MODULE,
+   .open = msm_gpu_crash_open,
+   .read = seq_read,
+   .llseek = seq_lseek,
+   .release = single_release,
+   .write = msm_gpu_crash_write,
+};
+
 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
 {
struct msm_drm_private *priv = dev->dev_private;
@@ -170,6 +228,9 @@ int msm_debugfs_init(struct drm_minor *minor)
return ret;
}
 
+   debugfs_create_file("crash", 0644, minor->debugfs_root,
+   priv, &msm_gpu_crash_fops);
+
if (pri

[PATCH 4/6] drm/msm/adreno: Convert the show/crash file format

[Jordan Crouse]

Convert the format of the 'show' and 'crash' debugfs files to
mostly standard YAML. This should be easier to parse and be
more flexible for future changes and expansions.

Signed-off-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 23 ++-
 drivers/gpu/drm/msm/msm_debugfs.c   |  8 +---
 2 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 963fce3..9e83c70 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -438,23 +438,28 @@ void adreno_show(struct msm_gpu *gpu, struct 
msm_gpu_state *state,
if (IS_ERR_OR_NULL(state))
return;
 
-   seq_printf(m, "status:   %08x\n", state->rbbm_status);
seq_printf(m, "revision: %d (%d.%d.%d.%d)\n",
adreno_gpu->info->revn, adreno_gpu->rev.core,
adreno_gpu->rev.major, adreno_gpu->rev.minor,
adreno_gpu->rev.patchid);
 
-   for (i = 0; i < gpu->nr_rings; i++) {
-   seq_printf(m, "rb %d: fence:%d/%d\n", i,
-   state->ring[i].fence, state->ring[i].seqno);
+   seq_printf(m, "rbbm-status: 0x%08x\n", state->rbbm_status);
+
+   seq_printf(m, "ringbuffer:\n");
 
-   seq_printf(m, "  rptr: %d\n", state->ring[i].rptr);
-   seq_printf(m, "rb wptr:  %d\n", state->ring[i].wptr);
+   for (i = 0; i < gpu->nr_rings; i++) {
+   seq_printf(m, "  - id: %d\n", i);
+   seq_printf(m, "last-fence: %d\n", state->ring[i].seqno);
+   seq_printf(m, "retired-fence: %d\n", state->ring[i].fence);
+   seq_printf(m, "rptr: %d\n", state->ring[i].rptr);
+   seq_printf(m, "wptr: %d\n", state->ring[i].wptr);
}
 
-   seq_printf(m, "IO:region %s  0002\n", gpu->name);
-   for (i = 0; i < state->nr_registers; i++) {
-   seq_printf(m, "IO:R %08x %08x\n",
+   seq_printf(m, "registers:\n");
+   seq_printf(m, "  - [offset, value]\n");
+
+   for(i = 0; i < state->nr_registers; i++) {
+   seq_printf(m, "  - [0x%04x, 0x%08x]\n",
state->registers[i * 2] << 2,
state->registers[(i * 2) + 1]);
}
diff --git a/drivers/gpu/drm/msm/msm_debugfs.c 
b/drivers/gpu/drm/msm/msm_debugfs.c
index 50e049c..e6d41d9 100644
--- a/drivers/gpu/drm/msm/msm_debugfs.c
+++ b/drivers/gpu/drm/msm/msm_debugfs.c
@@ -33,9 +33,11 @@ static int msm_gpu_crash_show(struct seq_file *m, void *data)
if (!state)
return 0;
 
-   seq_printf(m, "%s Crash Status:\n", gpu->name);
-   seq_puts(m, "Kernel: " UTS_RELEASE "\n");
-   seq_printf(m, "Time: %ld s %ld us\n",
+   /* FIXME: add tags? */
+   seq_puts(m, "---\n");
+   seq_puts(m, "kernel: " UTS_RELEASE "\n");
+   seq_printf(m, "module: " KBUILD_MODNAME "\n");
+   seq_printf(m, "time: %ld.%ld\n",
state->time.tv_sec, state->time.tv_usec);
if (state->comm)
seq_printf(m, "comm: %s\n", state->comm);
-- 
1.9.1

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[PATCH 5/6] drm/msm/adreno: Add ringbuffer contexts to the GPU state

[Jordan Crouse]

Add the contents of each ringbuffer to the GPU state and dump the
data in the crash file encoded with ascii85. To save space only
the used portions of the ringbuffer are saved.

Signed-off-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 44 +
 drivers/gpu/drm/msm/msm_gpu.h   |  2 ++
 2 files changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 9e83c70..79df82b 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -17,6 +17,7 @@
  * this program.  If not, see .
  */
 
+#include 
 #include 
 #include "adreno_gpu.h"
 #include "msm_gem.h"
@@ -377,10 +378,29 @@ struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu 
*gpu)
do_gettimeofday(&state->time);
 
for (i = 0; i < gpu->nr_rings; i++) {
+   int size = 0, j;
+
state->ring[i].fence = gpu->rb[i]->memptrs->fence;
state->ring[i].seqno = gpu->rb[i]->seqno;
state->ring[i].rptr = get_rptr(adreno_gpu, gpu->rb[i]);
state->ring[i].wptr = get_wptr(gpu->rb[i]);
+
+   /*
+* Only copy used parts of the ring buffers (this should save
+* data size for lightly used rings)
+*/
+   for(j = 0; j < MSM_GPU_RINGBUFFER_SZ >> 2; j++)
+   if (gpu->rb[i]->start[j])
+   size = j;
+
+   if (size) {
+   state->ring[i].data = kmalloc((size + 1) << 2, 
GFP_KERNEL);
+   if (state->ring[i].data) {
+   memcpy(state->ring[i].data, gpu->rb[i]->start,
+   (size + 1) << 2);
+   state->ring[i].data_size = (size + 1) << 2;
+   }
+   }
}
 
/* Count the number of registers */
@@ -411,9 +431,13 @@ struct msm_gpu_state *adreno_gpu_state_get(struct msm_gpu 
*gpu)
 
 static void adreno_gpu_state_destroy(struct kref *kref)
 {
+   int i;
struct msm_gpu_state *state = container_of(kref,
struct msm_gpu_state, ref);
 
+   for(i = 0; i < ARRAY_SIZE(state->ring); i++)
+   kfree(state->ring[i].data);
+
kfree(state->comm);
kfree(state->cmd);
kfree(state->registers);
@@ -453,6 +477,26 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state 
*state,
seq_printf(m, "retired-fence: %d\n", state->ring[i].fence);
seq_printf(m, "rptr: %d\n", state->ring[i].rptr);
seq_printf(m, "wptr: %d\n", state->ring[i].wptr);
+   seq_printf(m, "size: %d\n", MSM_GPU_RINGBUFFER_SZ);
+
+   if (state->ring[i].data && state->ring[i].data_size) {
+   u32 *ptr = (u32 *) state->ring[i].data;
+   char out[6];
+   int len = ascii85_encode_len(state->ring[i].data_size);
+   int j;
+
+   seq_printf(m, "data: !!ascii85 |\n");
+   seq_printf(m, " ");
+
+   for(j = 0; j < len; j++) {
+   if (ascii85_encode(ptr[j], out))
+   seq_printf(m, out);
+   else
+   seq_printf(m, "z");
+   }
+
+   seq_printf(m, "\n");
+   }
}
 
seq_printf(m, "registers:\n");
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 23e3b06..e13b23b 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -188,6 +188,8 @@ struct msm_gpu_state {
u32 seqno;
u32 rptr;
u32 wptr;
+   void *data;
+   int data_size;
} ring[MSM_GPU_MAX_RINGS];
 
int nr_registers;
-- 
1.9.1

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[PATCH 2/6] drm/msm: gpu: Convert the GPU show function to use the GPU state

[Jordan Crouse]

Convert the existing GPU show function to use the GPU state to
dump the information rather than reading it directly from the hardware.
This will require an additional step to capture the state before
dumping it for the existing nodes but it will greatly facilitate reusing
the same code for dumping a previously captured state from a GPU hang.

Signed-off-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   | 11 +--
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   | 12 +---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 18 +-
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 30 +-
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  4 ++--
 drivers/gpu/drm/msm/msm_debugfs.c   | 21 +++--
 drivers/gpu/drm/msm/msm_gpu.h   |  3 ++-
 7 files changed, 35 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 012e997..72e523f1 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -410,15 +410,6 @@ static irqreturn_t a3xx_irq(struct msm_gpu *gpu)
~0   /* sentinel */
 };
 
-#ifdef CONFIG_DEBUG_FS
-static void a3xx_show(struct msm_gpu *gpu, struct seq_file *m)
-{
-   seq_printf(m, "status:   %08x\n",
-   gpu_read(gpu, REG_A3XX_RBBM_STATUS));
-   adreno_show(gpu, m);
-}
-#endif
-
 /* would be nice to not have to duplicate the _show() stuff with printk(): */
 static void a3xx_dump(struct msm_gpu *gpu)
 {
@@ -463,7 +454,7 @@ static struct msm_gpu_state *a3xx_gpu_state_get(struct 
msm_gpu *gpu)
.irq = a3xx_irq,
.destroy = a3xx_destroy,
 #ifdef CONFIG_DEBUG_FS
-   .show = a3xx_show,
+   .show = adreno_show,
 #endif
.gpu_state_get = a3xx_gpu_state_get,
.gpu_state_put = adreno_gpu_state_put,
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index c875dccc..e363e65 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -454,16 +454,6 @@ static irqreturn_t a4xx_irq(struct msm_gpu *gpu)
~0 /* sentinel */
 };
 
-#ifdef CONFIG_DEBUG_FS
-static void a4xx_show(struct msm_gpu *gpu, struct seq_file *m)
-{
-   seq_printf(m, "status:   %08x\n",
-   gpu_read(gpu, REG_A4XX_RBBM_STATUS));
-   adreno_show(gpu, m);
-
-}
-#endif
-
 static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu)
 {
struct msm_gpu_state *state = adreno_gpu_state_get(gpu);
@@ -550,7 +540,7 @@ static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t 
*value)
.irq = a4xx_irq,
.destroy = a4xx_destroy,
 #ifdef CONFIG_DEBUG_FS
-   .show = a4xx_show,
+   .show = adreno_show,
 #endif
.gpu_state_get = a4xx_gpu_state_get,
.gpu_state_put = adreno_gpu_state_put,
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 6199a67..971aaee 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1169,22 +1169,6 @@ static struct msm_gpu_state *a5xx_gpu_state_get(struct 
msm_gpu *gpu)
return state;
 }
 
-#ifdef CONFIG_DEBUG_FS
-static void a5xx_show(struct msm_gpu *gpu, struct seq_file *m)
-{
-   seq_printf(m, "status:   %08x\n",
-   gpu_read(gpu, REG_A5XX_RBBM_STATUS));
-
-   /*
-* Temporarily disable hardware clock gating before going into
-* adreno_show to avoid issues while reading the registers
-*/
-   a5xx_set_hwcg(gpu, false);
-   adreno_show(gpu, m);
-   a5xx_set_hwcg(gpu, true);
-}
-#endif
-
 static struct msm_ringbuffer *a5xx_active_ring(struct msm_gpu *gpu)
 {
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
@@ -1214,7 +1198,7 @@ static int a5xx_gpu_busy(struct msm_gpu *gpu, uint64_t 
*value)
.irq = a5xx_irq,
.destroy = a5xx_destroy,
 #ifdef CONFIG_DEBUG_FS
-   .show = a5xx_show,
+   .show = adreno_show,
 #endif
.gpu_busy = a5xx_gpu_busy,
.gpu_state_get = a5xx_gpu_state_get,
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 754b88b..81da214 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -417,38 +417,34 @@ void adreno_gpu_state_put(struct msm_gpu_state *state)
 }
 
 #ifdef CONFIG_DEBUG_FS
-void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
+void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
+   struct seq_file *m)
 {
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
int i;
 
+   if (IS_ERR_OR_NULL(state))
+   return;
+
+   seq_printf(m, "status:   %08x\n", state->rbbm_status);
seq_printf(m, "revision: %d (%

[RFC v2 0/6] drm/msm: GPU crash state

[Jordan Crouse]

This is an update for my previous stack of GPU state code
(https://patchwork.freedesktop.org/series/36097/).

The goal is to store and provide enough information to debug software
and hardware issues on the Adreno hardware in a semi human-readable
format that can also be parsed by scripts.

Based on previous suggestions, I re-organized the output into a mostly
YAML compatible format that should be extensible for future changes.
Once I get basic consensus on the format I'll write up official
format documentation. I also removed some of the "cleanup" code
for the show function that just ended up being more trouble than it is worth.
Finally, I added code to dump the ringbuffers in ascii85 format and started
work on a5xx specific code.

Future additions will include tweaking the format, adding more 5xx specific
components and dumping active buffers that contributed to the crash.

You can see an example of the output for a simple invalid opcode error on the
db820c here: https://hastebin.com/olaruyakaz.bash

Jordan Crouse (6):
  drm/msm: gpu: Capture the state of the GPU
  drm/msm: gpu: Convert the GPU show function to use the GPU state
  drm/msm: gpu: Capture the GPU state on a GPU hang
  drm/msm/adreno: Convert the show/crash file format
  drm/msm/adreno: Add ringbuffer contexts to the GPU state
  drm/msm/adreno: Add a5xx specific registers for the GPU state

 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   |  28 ++--
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   |  20 ++-
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 238 ++--
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 148 +---
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |   7 +-
 drivers/gpu/drm/msm/msm_debugfs.c   |  84 ++-
 drivers/gpu/drm/msm/msm_gpu.c   |  47 +--
 drivers/gpu/drm/msm/msm_gpu.h   |  58 +++-
 8 files changed, 567 insertions(+), 63 deletions(-)

-- 
1.9.1

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[RFC v3 3/4] drm/nouveau: Add support for BLCG on Kepler2

[Lyude Paul]

Same as the previous patch, but for Kepler2 now

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h  |  1 +
 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c |  8 +--
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c| 62 
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/Kbuild |  1 +
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c| 71 +++
 5 files changed, 139 insertions(+), 4 deletions(-)
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h 
b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
index adb78f7d083a..92be0e5269c6 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
@@ -75,6 +75,7 @@ int mcp89_fb_new(struct nvkm_device *, int, struct nvkm_fb 
**);
 int gf100_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
 int gf108_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
 int gk104_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
+int gk110_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
 int gk20a_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
 int gm107_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
 int gm200_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 
b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 74bd09b1c893..7590a30b7ff0 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -1812,7 +1812,7 @@ nvf0_chipset = {
.bus = gf100_bus_new,
.clk = gk104_clk_new,
.devinit = gf100_devinit_new,
-   .fb = gk104_fb_new,
+   .fb = gk110_fb_new,
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
@@ -1850,7 +1850,7 @@ nvf1_chipset = {
.bus = gf100_bus_new,
.clk = gk104_clk_new,
.devinit = gf100_devinit_new,
-   .fb = gk104_fb_new,
+   .fb = gk110_fb_new,
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
@@ -1888,7 +1888,7 @@ nv106_chipset = {
.bus = gf100_bus_new,
.clk = gk104_clk_new,
.devinit = gf100_devinit_new,
-   .fb = gk104_fb_new,
+   .fb = gk110_fb_new,
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
@@ -1926,7 +1926,7 @@ nv108_chipset = {
.bus = gf100_bus_new,
.clk = gk104_clk_new,
.devinit = gf100_devinit_new,
-   .fb = gk104_fb_new,
+   .fb = gk110_fb_new,
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c 
b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
index a38e19b61c1d..a528894231d0 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
@@ -22,6 +22,7 @@
  * Authors: Ben Skeggs 
  */
 #include "gf100.h"
+#include "gk104.h"
 #include "ctxgf100.h"
 
 #include 
@@ -156,6 +157,66 @@ gk110_gr_pack_mmio[] = {
{}
 };
 
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_blcg_init_sked_0[] = {
+   { 0x407000, 1, 0x4041 },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_blcg_init_gpc_gcc_0[] = {
+   { 0x419020, 1, 0x0042 },
+   { 0x419038, 1, 0x0042 },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_blcg_init_gpc_l1c_0[] = {
+   { 0x419cd4, 2, 0x4042 },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_blcg_init_gpc_mp_0[] = {
+   { 0x419fd0, 1, 0x4043 },
+   { 0x419fd8, 1, 0x4049 },
+   { 0x419fe0, 2, 0x4042 },
+   { 0x419ff0, 1, 0x0046 },
+   { 0x419ff8, 1, 0x4042 },
+   { 0x419f90, 1, 0x4042 },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_pack
+gk110_clkgate_pack[] = {
+   { gk104_clkgate_blcg_init_main_0 },
+   { gk104_clkgate_blcg_init_rstr2d_0 },
+   { gk104_clkgate_blcg_init_unk_0 },
+   { gk104_clkgate_blcg_init_gcc_0 },
+   { gk110_clkgate_blcg_init_sked_0 },
+   { gk104_clkgate_blcg_init_unk_1 },
+   { gk104_clkgate_blcg_init_gpc_ctxctl_0 },
+   { gk104_clkgate_blcg_init_gpc_unk_0 },
+   { gk104_clkgate_blcg_init_gpc_esetup_0 },
+   { gk104_clkgate_blcg_init_gpc_tpbus_0 },
+   { gk104_clkgate_blcg_init_gpc_zcull_0 },
+   { gk104_clkgate_blcg_init_gpc_tpconf_0 },
+   { gk104_clkgate_blcg_init_gpc_unk_1 },
+   { gk110_clkgate_blcg_init_gpc_gcc_0 },
+   { gk104_clkgate_blcg_init_gpc_ffb_0 },
+   { gk104_clkgate_blcg_init_gpc_tex_0 },
+   { gk104_clkgate_blcg_init_gpc_poly_0 },
+   { gk110_clkgate_blcg_init_gpc_l1c_0 },
+   { gk104_clkgate_blcg_init_gpc_unk_2 },
+   { gk110_clkgate_blcg_init_gpc_mp_0 },
+   { gk104_clkg

[RFC v3 4/4] drm/nouveau: Add support for SLCG for Kepler2

[Lyude Paul]

That's right, there's still more power saving to go! Starting with
kepler 2, nvidia hardware has an additional level of clockgating known
as second level clockgating.  The details of this are not exact, but it
seems to work by waiting for a collection of dependent hardware blocks
to be gated before taking affect. As with the previous series, this
results in another noticeable drop in power consumption and is
programmed in the same manner.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c | 93 ++
 1 file changed, 93 insertions(+)

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c 
b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
index a528894231d0..4da916a9fc73 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
@@ -187,6 +187,87 @@ gk110_clkgate_blcg_init_gpc_mp_0[] = {
{}
 };
 
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_main_0[] = {
+   { 0x4041f4, 1, 0x },
+   { 0x409894, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_unk_0[] = {
+   { 0x406004, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_sked_0[] = {
+   { 0x407004, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_ctxctl_0[] = {
+   { 0x41a894, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_unk_0[] = {
+   { 0x418504, 1, 0x },
+   { 0x41860c, 1, 0x },
+   { 0x41868c, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_esetup_0[] = {
+   { 0x41882c, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_zcull_0[] = {
+   { 0x418974, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_l1c_0[] = {
+   { 0x419cd8, 2, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_unk_1[] = {
+   { 0x419c74, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_mp_0[] = {
+   { 0x419fd4, 1, 0x4a4a },
+   { 0x419fdc, 1, 0x0014 },
+   { 0x419fe4, 1, 0x },
+   { 0x419ff4, 1, 0x1724 },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_gpc_ppc_0[] = {
+   { 0x41be2c, 1, 0x },
+   {}
+};
+
+static const struct nvkm_therm_clkgate_init
+gk110_clkgate_slcg_init_pcounter_0[] = {
+   { 0x1be018, 1, 0x01ff },
+   { 0x1bc018, 1, 0x01ff },
+   { 0x1b8018, 1, 0x01ff },
+   { 0x1b4124, 1, 0x },
+   {}
+};
+
 static const struct nvkm_therm_clkgate_pack
 gk110_clkgate_pack[] = {
{ gk104_clkgate_blcg_init_main_0 },
@@ -214,6 +295,18 @@ gk110_clkgate_pack[] = {
{ gk104_clkgate_blcg_init_rop_0 },
{ gk104_clkgate_blcg_init_rop_crop_0 },
{ gk104_clkgate_blcg_init_pxbar_0 },
+   { gk110_clkgate_slcg_init_main_0 },
+   { gk110_clkgate_slcg_init_unk_0 },
+   { gk110_clkgate_slcg_init_sked_0 },
+   { gk110_clkgate_slcg_init_gpc_ctxctl_0 },
+   { gk110_clkgate_slcg_init_gpc_unk_0 },
+   { gk110_clkgate_slcg_init_gpc_esetup_0 },
+   { gk110_clkgate_slcg_init_gpc_zcull_0 },
+   { gk110_clkgate_slcg_init_gpc_l1c_0 },
+   { gk110_clkgate_slcg_init_gpc_unk_1 },
+   { gk110_clkgate_slcg_init_gpc_mp_0 },
+   { gk110_clkgate_slcg_init_gpc_ppc_0 },
+   { gk110_clkgate_slcg_init_pcounter_0 },
{}
 };
 
-- 
2.14.3

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[RFC v3 2/4] drm/nouveau: Add support for BLCG on Kepler1

[Lyude Paul]

This enables BLCG optimization for kepler1. When using clockgating,
nvidia's firmware has a set of registers which are initially programmed
by the vbios with various engine delays and other mysterious settings
that are safe enough to bring up the GPU. However, the values used by
the vbios are more power hungry then they need to be, so the nvidia driver
writes it's own more optimized set of BLCG settings before enabling
CG_CTRL. This adds support for programming the optimized BLCG values
during engine/subdev init, which enables rather significant power
savings.

This introduces the nvkm_therm_clkgate_init() helper, which we use to
program the optimized BLCG settings before enabling clockgating with
nvkm_therm_clkgate_enable.

As well, this commit shares a lot more code with Fermi since BLCG is
mostly the same there as far as we can tell. In the future, it's likely
we'll reformat the clkgate_packs for kepler1 so that they share a list
of mmio packs with Fermi.

Signed-off-by: Lyude Paul 
---
 .../gpu/drm/nouveau/include/nvkm/subdev/therm.h|  12 ++
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h |   1 +
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c | 207 +
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.h |  55 ++
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c |   6 +
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c |  47 +
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.h |  35 
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h  |   2 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild   |   1 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c   |  10 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.c  |  75 
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c  |   1 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c  |   2 +-
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h   |   8 +
 14 files changed, 461 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.h
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.h
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.c

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h 
b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
index 240b19bb4667..9398d9f09339 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
@@ -46,6 +46,16 @@ enum nvkm_therm_attr_type {
NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST = 17,
 };
 
+struct nvkm_therm_clkgate_init {
+   u32 addr;
+   u8  count;
+   u32 data;
+};
+
+struct nvkm_therm_clkgate_pack {
+   const struct nvkm_therm_clkgate_init *init;
+};
+
 struct nvkm_therm {
const struct nvkm_therm_func *func;
struct nvkm_subdev subdev;
@@ -92,6 +102,8 @@ struct nvkm_therm {
 int nvkm_therm_temp_get(struct nvkm_therm *);
 int nvkm_therm_fan_sense(struct nvkm_therm *);
 int nvkm_therm_cstate(struct nvkm_therm *, int, int);
+void nvkm_therm_clkgate_init(struct nvkm_therm *,
+const struct nvkm_therm_clkgate_pack *);
 void nvkm_therm_clkgate_enable(struct nvkm_therm *);
 void nvkm_therm_clkgate_fini(struct nvkm_therm *, bool);
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h 
b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
index d7c2adb9b543..c8ec3fd97155 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
@@ -137,6 +137,7 @@ struct gf100_gr_func {
int (*rops)(struct gf100_gr *);
int ppc_nr;
const struct gf100_grctx_func *grctx;
+   const struct nvkm_therm_clkgate_pack *clkgate_pack;
struct nvkm_sclass sclass[];
 };
 
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c 
b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
index 5e82f94c2245..17cea9c70f7f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
@@ -22,6 +22,7 @@
  * Authors: Ben Skeggs 
  */
 #include "gf100.h"
+#include "gk104.h"
 #include "ctxgf100.h"
 
 #include 
@@ -173,6 +174,208 @@ gk104_gr_pack_mmio[] = {
{}
 };
 
+const struct nvkm_therm_clkgate_init
+gk104_clkgate_blcg_init_main_0[] = {
+   { 0x4041f0, 1, 0x4046 },
+   { 0x409890, 1, 0x0045 },
+   { 0x4098b0, 1, 0x007f },
+   {}
+};
+
+const struct nvkm_therm_clkgate_init
+gk104_clkgate_blcg_init_rstr2d_0[] = {
+   { 0x4078c0, 1, 0x0042 },
+   {}
+};
+
+const struct nvkm_therm_clkgate_init
+gk104_clkgate_blcg_init_unk_0[] = {
+   { 0x406000, 1, 0x4044 },
+   { 0x405860, 1, 0x4042 },
+   { 0x40590c, 1, 0x4042 },
+   {}
+};
+
+const struct nvkm_therm_clkgate_init
+gk104_clkgate_blcg_init_gcc_0[] = {
+   { 0x408040, 1, 0x4044 },
+   {}
+};
+
+const struct nvkm_therm_clkgate_init
+gk104_clkgate_blcg_init_sked_0[] = {
+   { 0x407000, 1, 0x4044 },
+   {}
+};
+
+const struct nvk

[RFC v3 1/4] drm/nouveau: Add support for basic clockgating on Kepler1

[Lyude Paul]

This adds support for enabling automatic clockgating on nvidia GPUs for
Kepler1. While this is not technically a clockgating level, it does
enable clockgating using the clockgating values initially set by the
vbios (which should be safe to use).

This introduces two therm helpers for controlling basic clockgating:
nvkm_therm_clkgate_enable() - enables clockgating through
CG_CTRL, done after initializing the GPU fully
nvkm_therm_clkgate_fini() - prepares clockgating for suspend or
driver unload

As well, we add the nouveau kernel config parameter NvPmEnableGating,
which can be toggled on or off in order to enable/disable clockgating.
Since we've only had limited testing on this thus far, we disable this
by default.

A lot of this code was originally going to be based off of fermi;
however it turns out that while Fermi's the first line of GPUs that
introduced this kind of power saving, Fermi requires more fine tuned
control of the CG_CTRL registers from the driver while reclocking that
we don't entirely understand yet.

For the simple parts we will be sharing with Fermi for certain however,
we at least add those into a new subdev/therm/gf100.h header.

Signed-off-by: Lyude Paul 
---
 .../gpu/drm/nouveau/include/nvkm/subdev/therm.h|   5 +
 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c  |  17 +--
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild   |   1 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c   |  60 +++--
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.h  |  35 ++
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.c  |   8 +-
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c  | 135 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.h  |  48 
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h   |  15 ++-
 9 files changed, 303 insertions(+), 21 deletions(-)
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.h
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.h

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h 
b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
index b1ac47eb786e..240b19bb4667 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
@@ -85,17 +85,22 @@ struct nvkm_therm {
 
int (*attr_get)(struct nvkm_therm *, enum nvkm_therm_attr_type);
int (*attr_set)(struct nvkm_therm *, enum nvkm_therm_attr_type, int);
+
+   bool clkgating_enabled;
 };
 
 int nvkm_therm_temp_get(struct nvkm_therm *);
 int nvkm_therm_fan_sense(struct nvkm_therm *);
 int nvkm_therm_cstate(struct nvkm_therm *, int, int);
+void nvkm_therm_clkgate_enable(struct nvkm_therm *);
+void nvkm_therm_clkgate_fini(struct nvkm_therm *, bool);
 
 int nv40_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
 int nv50_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
 int g84_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
 int gt215_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
 int gf119_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
+int gk104_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
 int gm107_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
 int gm200_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
 int gp100_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 
b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 08e77cd55e6e..74bd09b1c893 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -28,6 +28,7 @@
 #include 
 
 #include 
+#include 
 
 static DEFINE_MUTEX(nv_devices_mutex);
 static LIST_HEAD(nv_devices);
@@ -1682,7 +1683,7 @@ nve4_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gk104_pmu_new,
-   .therm = gf119_therm_new,
+   .therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@@ -1721,7 +1722,7 @@ nve6_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gk104_pmu_new,
-   .therm = gf119_therm_new,
+   .therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@@ -1760,7 +1761,7 @@ nve7_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gk104_pmu_new,
-   .therm = gf119_therm_new,
+   .therm = gk104_therm_new,
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@@ -1824,7 +1825,7 @@ nvf0_chipset = {
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
.pmu = gk110_pmu_new,
-   .therm = gf119_therm_new,
+   .therm = gk104_therm_new,
.timer = nv41_timer_new,
.top =

[RFC v3 0/4] Implement full clockgating for Kepler1 and 2

[Lyude Paul]

Next version of my patchseries for adding clockgating support for
kepler1 and 2 on nouveau. The first version of this series can be found
here:

https://patchwork.freedesktop.org/series/36504/

Some very important changes:
 - Fix gf100_clkgate_init() to actually write registers! This got broken
   in the last version by accident
 - Dump the register packs and the resulting register writes into
   nvkm_trace() in gf100_clkgate_init() so we can make sure this doesn't
   happen again
And some more minor changes:
 - Make all SLCG/BLCG mmiopacks for kepler2 static

Additionally, I just discovered that these patches have a higher chance of
crashing your card if you reclock under load. However, reclocking under
load has never been supported by nouveau in the first place and has
always caused trouble so that's nothing new :). Reclocking while not
under load with powergating works A-OK.

Lyude Paul (4):
  drm/nouveau: Add support for basic clockgating on Kepler1
  drm/nouveau: Add support for BLCG on Kepler1
  drm/nouveau: Add support for BLCG on Kepler2
  drm/nouveau: Add support for SLCG for Kepler2

 drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h   |   1 +
 .../gpu/drm/nouveau/include/nvkm/subdev/therm.h|  17 ++
 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c  |  25 +--
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h |   1 +
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c | 207 +
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.h |  55 ++
 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c | 155 +++
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/Kbuild  |   1 +
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c |   6 +
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c |  47 +
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.h |  35 
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c |  71 +++
 drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h  |   2 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild   |   2 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c   |  70 ++-
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.c  |  75 
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.h  |  35 
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.c  |   8 +-
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c  | 136 ++
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.h  |  48 +
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c  |   2 +-
 drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h   |  23 ++-
 22 files changed, 996 insertions(+), 26 deletions(-)
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.h
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.h
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.c
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.h
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c
 create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.h

-- 
2.14.3

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[PATCH] include: Move ascii85 functions from i915 to linux/ascii85.h

[Jordan Crouse]

The i915 DRM driver very cleverly used ascii85 encoding for their
GPU state file. Move the encode functions to a general header file to
support other drivers that might be interested in the same
functionality.

Signed-off-by: Jordan Crouse 
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 24 +---
 include/linux/ascii85.h   | 52 +++
 2 files changed, 53 insertions(+), 23 deletions(-)
 create mode 100644 include/linux/ascii85.h

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 48418fb..2588f37 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -31,6 +31,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "i915_drv.h"
 
@@ -501,29 +502,6 @@ void i915_error_printf(struct drm_i915_error_state_buf *e, 
const char *f, ...)
va_end(args);
 }
 
-static int
-ascii85_encode_len(int len)
-{
-   return DIV_ROUND_UP(len, 4);
-}
-
-static bool
-ascii85_encode(u32 in, char *out)
-{
-   int i;
-
-   if (in == 0)
-   return false;
-
-   out[5] = '\0';
-   for (i = 5; i--; ) {
-   out[i] = '!' + in % 85;
-   in /= 85;
-   }
-
-   return true;
-}
-
 static void print_error_obj(struct drm_i915_error_state_buf *m,
struct intel_engine_cs *engine,
const char *name,
diff --git a/include/linux/ascii85.h b/include/linux/ascii85.h
new file mode 100644
index 000..7ee39f9
--- /dev/null
+++ b/include/linux/ascii85.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef _ASCII85_H_
+#define _ASCII85_H_
+
+#include 
+
+static inline int
+ascii85_encode_len(int len)
+{
+   return DIV_ROUND_UP(len, 4);
+}
+
+static inline bool
+ascii85_encode(u32 in, char *out)
+{
+   int i;
+
+   if (in == 0)
+   return false;
+
+   out[5] = '\0';
+   for (i = 5; i--; ) {
+   out[i] = '!' + in % 85;
+   in /= 85;
+   }
+
+   return true;
+}
+
+#endif
-- 
1.9.1

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[RFC] Move i915 ascii85 functions to linux/ascii85.h

[Jordan Crouse]

I've been working on a crash dump utility for the drm/msm GPU driver
to get the useful GPU information out after a hang. Taking inspiration
from the i915 driver I thought it was very smart to use ascii85 format
to encode the binary buffers and other bits.  This patch moves the two
very simple functions to encode binaries as ascii85 from the i915
driver to a linux header to be enjoyed by all.

I debated if it was better to move them to drm/ or go all the way and 
obviously I picked all the way, but if the owners and maintainers feel
like this is something we want to keep closer to home then by all means
lets do what feels best.

Suggestions and flames welcome. Coming immediately after will be the drm/msm
stack that uses this in anger.

Jordan Crouse (1):
  include: Move ascii85 functions from i915 to linux/ascii85.h

 drivers/gpu/drm/i915/i915_gpu_error.c | 24 +---
 include/linux/ascii85.h   | 52 +++
 2 files changed, 53 insertions(+), 23 deletions(-)
 create mode 100644 include/linux/ascii85.h

-- 
1.9.1

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Re: [PATCH 02/12] drm/ttm: Add a default BO destructor to simplify code

[Ville Syrjälä]

On Fri, Jan 26, 2018 at 02:23:39PM -0500, Felix Kuehling wrote:
> On 2018-01-26 01:29 PM, Tom St Denis wrote:
> > Signed-off-by: Tom St Denis 
> > ---
> >  drivers/gpu/drm/ttm/ttm_bo.c | 14 +-
> >  1 file changed, 9 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
> > index 8cf89da7030d..4e85c32fea26 100644
> > --- a/drivers/gpu/drm/ttm/ttm_bo.c
> > +++ b/drivers/gpu/drm/ttm/ttm_bo.c
> > @@ -49,6 +49,12 @@ static struct attribute ttm_bo_count = {
> > .mode = S_IRUGO
> >  };
> >  
> > +/* default destructor */
> > +static void ttm_bo_default_destroy(struct ttm_buffer_object *bo)
> > +{
> > +   kfree(bo);
> > +};
> 
> Stray semicolon.
> 
> > +
> >  static inline int ttm_mem_type_from_place(const struct ttm_place *place,
> >   uint32_t *mem_type)
> >  {
> > @@ -147,10 +153,7 @@ static void ttm_bo_release_list(struct kref *list_kref)
> > dma_fence_put(bo->moving);
> > reservation_object_fini(&bo->ttm_resv);
> > mutex_destroy(&bo->wu_mutex);
> > -   if (bo->destroy)
> > -   bo->destroy(bo);
> > -   else
> > -   kfree(bo);
> > +   bo->destroy(bo);
> > ttm_mem_global_free(bdev->glob->mem_glob, acc_size);
> >  }
> >  
> > @@ -1176,7 +1179,8 @@ int ttm_bo_init_reserved(struct ttm_bo_device *bdev,
> > ttm_mem_global_free(mem_glob, acc_size);
> > return -EINVAL;
> > }
> > -   bo->destroy = destroy;
> > +   bo->destroy =
> > +   (destroy == NULL) ? ttm_bo_default_destroy : destroy;
> 
> This could be written shorter as "!destroy ? ttm_bo_default_destroy :
> destroy", or even "destroy ? destroy : ttm_bo_default_destroy".

Or even 'destroy ?: ttm_bo_default_destroy' if you think
the gcc extension is cool enough. It is used elsewhere in
the kernel.

-- 
Ville Syrjälä
Intel OTC
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Re: [RFC][PATCH 2/4 v2] drm_hwcomposer: Add platformhisi buffer importer for hikey and hikey960

[John Stultz]

On Wed, Jan 24, 2018 at 11:32 AM, Rob Herring  wrote:
> On Wed, Jan 24, 2018 at 1:05 PM, John Stultz  wrote:
>> On Wed, Jan 24, 2018 at 7:23 AM, Sean Paul  wrote:
>>> On Tue, Jan 23, 2018 at 03:16:37PM -0800, John Stultz wrote:
 This allows for importing buffers allocated from the
 hikey and hikey960 gralloc implelementations.

 Cc: Marissa Wall 
 Cc: Sean Paul 
 Cc: Dmitry Shmidt 
 Cc: Robert Foss 
 Cc: Matt Szczesiak 
 Cc: Liviu Dudau 
 Cc: David Hanna 
 Cc: Rob Herring 
 Signed-off-by: John Stultz 
 ---
 v2:
 * Make platformhisi and the generic importer exclusive in the build
>>>
>>> I actually prefer the opposite. If everything is always compiled, we reduce 
>>> the
>>> chance of breaking boards when the base class is updated. I'm sure there is 
>>> a
>>> good reason for this, but perhaps there's another way?
>>
>> The main reason for this was avoiding the build breaking when
>> "gralloc_priv.h" isn't supplied or present.
>>
>> Similarly the current freedesktop/master code won't build in the
>> Android environment as the platformdrmgeneric.cpp file depends on the
>> gralloc_drm_handle.h, which doesn't exist.
>
> That will be fixed soon. We're moving the handle definition to libdrm.

How soon is that eta? Do you have a current patch for libdrm I should
work against?

thanks
-john
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Re: [PATCH 07/12] drm/ttm: Simplify ttm_dma_find_pool()

[Felix Kuehling]

On 2018-01-26 01:29 PM, Tom St Denis wrote:
> Signed-off-by: Tom St Denis 
> ---
>  drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 12 +---
>  1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c 
> b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> index 962838cfb1a3..579c4aedc17e 100644
> --- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> +++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
> @@ -680,10 +680,10 @@ static struct dma_pool *ttm_dma_pool_init(struct device 
> *dev, gfp_t flags,
>  static struct dma_pool *ttm_dma_find_pool(struct device *dev,
> enum pool_type type)
>  {
> - struct dma_pool *pool, *tmp, *found = NULL;
> + struct dma_pool *pool, *tmp;
>  
>   if (type == IS_UNDEFINED)
> - return found;
> + return NULL;
>  
>   /* NB: We iterate on the 'struct dev' which has no spinlock, but
>* it does have a kref which we have taken. The kref is taken during
> @@ -697,12 +697,10 @@ static struct dma_pool *ttm_dma_find_pool(struct device 
> *dev,
>* driver so this function will not be called.
>*/
>   list_for_each_entry_safe(pool, tmp, &dev->dma_pools, pools) {
> - if (pool->type != type)
> - continue;
> - found = pool;
> - break;
> + if (pool->type == type)
> + return pool;
>   }

Now you could also remove the braces around the loop body, because it's
only a single statement.

Regards,
  Felix

> - return found;
> + return NULL;
>  }
>  
>  /*

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Re: [PATCH 02/12] drm/ttm: Add a default BO destructor to simplify code

[Felix Kuehling]

On 2018-01-26 01:29 PM, Tom St Denis wrote:
> Signed-off-by: Tom St Denis 
> ---
>  drivers/gpu/drm/ttm/ttm_bo.c | 14 +-
>  1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
> index 8cf89da7030d..4e85c32fea26 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo.c
> @@ -49,6 +49,12 @@ static struct attribute ttm_bo_count = {
>   .mode = S_IRUGO
>  };
>  
> +/* default destructor */
> +static void ttm_bo_default_destroy(struct ttm_buffer_object *bo)
> +{
> + kfree(bo);
> +};

Stray semicolon.

> +
>  static inline int ttm_mem_type_from_place(const struct ttm_place *place,
> uint32_t *mem_type)
>  {
> @@ -147,10 +153,7 @@ static void ttm_bo_release_list(struct kref *list_kref)
>   dma_fence_put(bo->moving);
>   reservation_object_fini(&bo->ttm_resv);
>   mutex_destroy(&bo->wu_mutex);
> - if (bo->destroy)
> - bo->destroy(bo);
> - else
> - kfree(bo);
> + bo->destroy(bo);
>   ttm_mem_global_free(bdev->glob->mem_glob, acc_size);
>  }
>  
> @@ -1176,7 +1179,8 @@ int ttm_bo_init_reserved(struct ttm_bo_device *bdev,
>   ttm_mem_global_free(mem_glob, acc_size);
>   return -EINVAL;
>   }
> - bo->destroy = destroy;
> + bo->destroy =
> + (destroy == NULL) ? ttm_bo_default_destroy : destroy;

This could be written shorter as "!destroy ? ttm_bo_default_destroy :
destroy", or even "destroy ? destroy : ttm_bo_default_destroy".

Regards,
  Felix

>  
>   kref_init(&bo->kref);
>   kref_init(&bo->list_kref);

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Re: [PATCH 11/12] drm/ttm: Fix 'buf' pointer update in ttm_bo_vm_access_kmap()

[Felix Kuehling]

On 2018-01-26 01:29 PM, Tom St Denis wrote:
> Signed-off-by: Tom St Denis 
> ---
>  drivers/gpu/drm/ttm/ttm_bo_vm.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
> index 07b22f04b969..6311f8a481ea 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
> @@ -345,6 +345,7 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object 
> *bo,
>   page++;
>   bytes_left -= bytes;
>   offset = 0;
> + buf += bytes;

I'd put this right before the bytes_left -= bytes.

Also, buf is a void *. That makes pointer arithmetic on it somewhat
undefined. From what I can find, GCC supports it as an extension. See
also
https://stackoverflow.com/questions/3523145/pointer-arithmetic-for-void-pointer-in-c.

If it compiles without a warning, I guess it's OK as is.

Regards,
  Felix

>   } while (bytes_left);
>  
>   return len;

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[Bug 88861] [efi, i915, vgaswitcheroo, black screen, nouveau] Screen goes black when switching from dedicated nvidia graphics card (nouveau) to integrated

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=88861

--- Comment #27 from Wilfried Klaebe (linux-ker...@lebenslange-mailadresse.de) 
---
Created attachment 273877
  --> https://bugzilla.kernel.org/attachment.cgi?id=273877&action=edit
dmesg of logdep splat on 4.15-rc9 minus 4eebd5a4e726

logdep splat from Linux 4.15-rc9 with commit 4eebd5a4e726 reverted.
The splat occurred after echoing first "DIS", then "OFF" into
/sys/kernel/debug/vgaswitcheroo/switch. The "switched off" in the first line
likely is from drivers/gpu/drm/i915/i915_drv.c:584,
i915_switcheroo_set_state().

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Re: Various TTM cleanups/fixes

[Tom St Denis]

On 26/01/18 01:38 PM, Christian König wrote:
Instead of "fix indentation" better write "fix coding style" and add 
some commit message to each patch. Something like "No functional 
change..." for the style changes should be ok.


Additional to that please move patch #11 to the top of the list and 
triple check in patch #10 that this is indeed safe.


With that done the series is Reviewed-by: Christian König 
.


I'll do those changes on Monday and resubmit en masse.  This will give 
time for other dri/ttm folk to review and I can avoid too much churn if 
anyone else has issues.


I agree that #10 is a bit tricky because retval had a default value 
which hopefully I captured with the assignment towards the end of the 
function.  It just seemed kinda awkward to have ret and retval :-)


Thanks,
Tom



Regards,
Christian.

Am 26.01.2018 um 19:28 schrieb Tom St Denis:

This series includes mostly no-functional-changes to simplify
or cleanup various routines.

Patch #11 includes an fix to functional behaviour.

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Re: Various TTM cleanups/fixes

[Christian König]

Instead of "fix indentation" better write "fix coding style" and add 
some commit message to each patch. Something like "No functional 
change..." for the style changes should be ok.


Additional to that please move patch #11 to the top of the list and 
triple check in patch #10 that this is indeed safe.


With that done the series is Reviewed-by: Christian König 
.


Regards,
Christian.

Am 26.01.2018 um 19:28 schrieb Tom St Denis:

This series includes mostly no-functional-changes to simplify
or cleanup various routines.

Patch #11 includes an fix to functional behaviour.

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Re: [PATCH] libdrm: intel/Android.mk: Filter libdrm_intel library requirements on x86

[Emil Velikov]

Hi all,

Couple of ideas/notes,

On 10 January 2018 at 20:36, Rob Herring  wrote:
> On Wed, Jan 10, 2018 at 1:09 PM, John Stultz  wrote:
>> On Wed, Jan 10, 2018 at 5:48 AM, Rob Herring  wrote:
>>> On Tue, Jan 9, 2018 at 11:25 PM, John Stultz  wrote:
 When building AOSP after updating libdrm project to the
 freedesktop/master branch, I've seen the following build errors:

 external/libdrm/intel/Android.mk: error: libdrm_intel
>>>
>>> This is only needed for i915 (not i965) now BTW. I'm not sure at what
>>> point we stop caring about i915.
If you're using any other Intel components - say Beignet or the va
driver, I think those still use libdrm_intel.

An alternative solution IMHO, is to drop/tweak the API to not bother
libpciaccess.
I have some ancient cleanup/rework branch

https://github.com/evelikov/libdrm/commits/intel-remove-legacy


>>>
 (SHARED_LIBRARIES android-arm64) missing libpciaccess
 (SHARED_LIBRARIES android-arm64) You can set
 ALLOW_MISSING_DEPENDENCIES=true in your environment if this is
 intentional, but that may defer real problems until later in the
 build.

 Using ALLOW_MISSING_DEPENDENCIES=true when building allows
 things to function properly, but is not ideal.

 So basically, while I'm not including the libdrm_intel package
 into the build, just the fact that the Android.mk file references
 libpciaccess which isn't a repo included in AOSP causes the build
 failure.

 So it seems we need some sort of conditional filter in the
 Android.mk to skip over it if we're not building for intel.

 This is my initial attempt at solving this.

 Feedback would be greatly appreciated!

 I note that in the AOSP version of libdrm, the reference to
 libpciaccess has been removed. See:
  
 https://android.googlesource.com/platform/external/libdrm/+/f6a1130dffae8de9ddd0c379066daf1df27fc8af%5E%21/
 So I wonder if it make sense to instead remove this upstream as
 well?
>>>
>>> Only if we drop i915.
>>
>> To be more precise, drop i915 for Android builds (I'm not suggesting
>> dropping it elsewhere, just for the Android.mk). I'm really not sure
>> which devices might be affected. Anyone able to point me to someone in
>> Intel who would know?
>
> The android-x86 folks would be the ones to ask. I added Chih-Wei.
>
A really silly question - how are you triggering any of this if you're
building on !x86?
Is that because the GPU driver is not selected thus you we fall-back
to "build all"?

If so, it might be better to change things to:
 - error out if none selected
 - allow one to select "all", "x86", "arm" and similar groups thus
only the things that can build are build
eg. RobH had fun with x86 intrinsics while building the intel Vulkan
driver on ARM

-Emil
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[PATCH 09/12] drm/ttm: Fix indentation in ttm_bo_move_memcpy()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_bo_util.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c 
b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 153de1bf0232..33ffe286f3a5 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -402,8 +402,9 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo,
PAGE_KERNEL);
ret = ttm_copy_io_ttm_page(ttm, old_iomap, page,
   prot);
-   } else
+   } else {
ret = ttm_copy_io_page(new_iomap, old_iomap, page);
+   }
if (ret)
goto out1;
}
-- 
2.14.3

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[PATCH 05/12] drm/ttm: Fix indentation in ttm_pool_store()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c 
b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
index 9e90d0ebc773..647eb5f40ab9 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
@@ -210,6 +210,7 @@ static ssize_t ttm_pool_store(struct kobject *kobj, struct 
attribute *attr,
container_of(kobj, struct ttm_pool_manager, kobj);
int chars;
unsigned val;
+
chars = sscanf(buffer, "%u", &val);
if (chars == 0)
return size;
@@ -217,11 +218,11 @@ static ssize_t ttm_pool_store(struct kobject *kobj, 
struct attribute *attr,
/* Convert kb to number of pages */
val = val / (PAGE_SIZE >> 10);
 
-   if (attr == &ttm_page_pool_max)
+   if (attr == &ttm_page_pool_max) {
m->options.max_size = val;
-   else if (attr == &ttm_page_pool_small)
+   } else if (attr == &ttm_page_pool_small) {
m->options.small = val;
-   else if (attr == &ttm_page_pool_alloc_size) {
+   } else if (attr == &ttm_page_pool_alloc_size) {
if (val > NUM_PAGES_TO_ALLOC*8) {
pr_err("Setting allocation size to %lu is not allowed. 
Recommended size is %lu\n",
   NUM_PAGES_TO_ALLOC*(PAGE_SIZE >> 7),
-- 
2.14.3

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[PATCH 11/12] drm/ttm: Fix 'buf' pointer update in ttm_bo_vm_access_kmap()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_bo_vm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index 07b22f04b969..6311f8a481ea 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -345,6 +345,7 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object 
*bo,
page++;
bytes_left -= bytes;
offset = 0;
+   buf += bytes;
} while (bytes_left);
 
return len;
-- 
2.14.3

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[PATCH 10/12] drm/ttm: Remove unncessary retval from ttm_bo_vm_fault()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_bo_vm.c | 28 +---
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index 08a3c324242e..07b22f04b969 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -118,7 +118,6 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
int ret;
int i;
unsigned long address = vmf->address;
-   int retval = VM_FAULT_NOPAGE;
struct ttm_mem_type_manager *man =
&bdev->man[bo->mem.mem_type];
struct vm_area_struct cvma;
@@ -158,7 +157,7 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
 * (if at all) by redirecting mmap to the exporter.
 */
if (bo->ttm && (bo->ttm->page_flags & TTM_PAGE_FLAG_SG)) {
-   retval = VM_FAULT_SIGBUS;
+   ret = VM_FAULT_SIGBUS;
goto out_unlock;
}
 
@@ -169,10 +168,10 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
break;
case -EBUSY:
case -ERESTARTSYS:
-   retval = VM_FAULT_NOPAGE;
+   ret = VM_FAULT_NOPAGE;
goto out_unlock;
default:
-   retval = VM_FAULT_SIGBUS;
+   ret = VM_FAULT_SIGBUS;
goto out_unlock;
}
}
@@ -183,12 +182,10 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
 */
ret = ttm_bo_vm_fault_idle(bo, vmf);
if (unlikely(ret != 0)) {
-   retval = ret;
-
-   if (retval == VM_FAULT_RETRY &&
+   if (ret == VM_FAULT_RETRY &&
!(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) {
/* The BO has already been unreserved. */
-   return retval;
+   return ret;
}
 
goto out_unlock;
@@ -196,12 +193,12 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
 
ret = ttm_mem_io_lock(man, true);
if (unlikely(ret != 0)) {
-   retval = VM_FAULT_NOPAGE;
+   ret = VM_FAULT_NOPAGE;
goto out_unlock;
}
ret = ttm_mem_io_reserve_vm(bo);
if (unlikely(ret != 0)) {
-   retval = VM_FAULT_SIGBUS;
+   ret = VM_FAULT_SIGBUS;
goto out_io_unlock;
}
 
@@ -211,7 +208,7 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
drm_vma_node_start(&bo->vma_node);
 
if (unlikely(page_offset >= bo->num_pages)) {
-   retval = VM_FAULT_SIGBUS;
+   ret = VM_FAULT_SIGBUS;
goto out_io_unlock;
}
 
@@ -238,7 +235,7 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
 
/* Allocate all page at once, most common usage */
if (ttm->bdev->driver->ttm_tt_populate(ttm, &ctx)) {
-   retval = VM_FAULT_OOM;
+   ret = VM_FAULT_OOM;
goto out_io_unlock;
}
}
@@ -255,7 +252,7 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
} else {
page = ttm->pages[page_offset];
if (unlikely(!page && i == 0)) {
-   retval = VM_FAULT_OOM;
+   ret = VM_FAULT_OOM;
goto out_io_unlock;
} else if (unlikely(!page)) {
break;
@@ -280,7 +277,7 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
if (unlikely((ret == -EBUSY) || (ret != 0 && i > 0)))
break;
else if (unlikely(ret != 0)) {
-   retval =
+   ret =
(ret == -ENOMEM) ? VM_FAULT_OOM : VM_FAULT_SIGBUS;
goto out_io_unlock;
}
@@ -289,11 +286,12 @@ static int ttm_bo_vm_fault(struct vm_fault *vmf)
if (unlikely(++page_offset >= page_last))
break;
}
+   ret = VM_FAULT_NOPAGE;
 out_io_unlock:
ttm_mem_io_unlock(man);
 out_unlock:
ttm_bo_unreserve(bo);
-   return retval;
+   return ret;
 }
 
 static void ttm_bo_vm_open(struct vm_area_struct *vma)
-- 
2.14.3

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[PATCH 06/12] drm/ttm: Simplify ttm_dma_page_put()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c 
b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
index 647eb5f40ab9..962838cfb1a3 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
@@ -390,14 +390,12 @@ static void ttm_dma_page_put(struct dma_pool *pool, 
struct dma_page *d_page)
 {
struct page *page = d_page->p;
unsigned i, num_pages;
-   int ret;
 
/* Don't set WB on WB page pool. */
if (!(pool->type & IS_CACHED)) {
num_pages = pool->size / PAGE_SIZE;
for (i = 0; i < num_pages; ++i, ++page) {
-   ret = set_pages_array_wb(&page, 1);
-   if (ret) {
+   if (set_pages_array_wb(&page, 1)) {
pr_err("%s: Failed to set %d pages to wb!\n",
   pool->dev_name, 1);
}
-- 
2.14.3

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[PATCH 08/12] drm/ttm: Fix indentation in ttm_dma_pool_alloc_new_pages()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c 
b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
index 579c4aedc17e..aa1ec35dc187 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
@@ -762,10 +762,9 @@ static int ttm_dma_pool_alloc_new_pages(struct dma_pool 
*pool,
return -ENOMEM;
}
 
-   if (count > 1) {
+   if (count > 1)
pr_debug("%s: (%s:%d) Getting %d pages\n",
 pool->dev_name, pool->name, current->pid, count);
-   }
 
for (i = 0, cpages = 0; i < count; ++i) {
dma_p = __ttm_dma_alloc_page(pool);
-- 
2.14.3

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[PATCH 12/12] drm/ttm: Simplify ttm_eu_reserve_buffers()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_execbuf_util.c | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c 
b/drivers/gpu/drm/ttm/ttm_execbuf_util.c
index 373ced0b2fc2..fa44f7b15285 100644
--- a/drivers/gpu/drm/ttm/ttm_execbuf_util.c
+++ b/drivers/gpu/drm/ttm/ttm_execbuf_util.c
@@ -139,12 +139,14 @@ int ttm_eu_reserve_buffers(struct ww_acquire_ctx *ticket,
 */
ttm_eu_backoff_reservation_reverse(list, entry);
 
-   if (ret == -EDEADLK && intr) {
-   ret = ww_mutex_lock_slow_interruptible(&bo->resv->lock,
-  ticket);
-   } else if (ret == -EDEADLK) {
-   ww_mutex_lock_slow(&bo->resv->lock, ticket);
-   ret = 0;
+   if (ret == -EDEADLK) {
+   if (intr) {
+   ret = 
ww_mutex_lock_slow_interruptible(&bo->resv->lock,
+  ticket);
+   } else {
+   ww_mutex_lock_slow(&bo->resv->lock, ticket);
+   ret = 0;
+   }
}
 
if (!ret && entry->shared)
-- 
2.14.3

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[PATCH 07/12] drm/ttm: Simplify ttm_dma_find_pool()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c 
b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
index 962838cfb1a3..579c4aedc17e 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
@@ -680,10 +680,10 @@ static struct dma_pool *ttm_dma_pool_init(struct device 
*dev, gfp_t flags,
 static struct dma_pool *ttm_dma_find_pool(struct device *dev,
  enum pool_type type)
 {
-   struct dma_pool *pool, *tmp, *found = NULL;
+   struct dma_pool *pool, *tmp;
 
if (type == IS_UNDEFINED)
-   return found;
+   return NULL;
 
/* NB: We iterate on the 'struct dev' which has no spinlock, but
 * it does have a kref which we have taken. The kref is taken during
@@ -697,12 +697,10 @@ static struct dma_pool *ttm_dma_find_pool(struct device 
*dev,
 * driver so this function will not be called.
 */
list_for_each_entry_safe(pool, tmp, &dev->dma_pools, pools) {
-   if (pool->type != type)
-   continue;
-   found = pool;
-   break;
+   if (pool->type == type)
+   return pool;
}
-   return found;
+   return NULL;
 }
 
 /*
-- 
2.14.3

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[PATCH 04/12] drm/ttm: Fix indentation in ttm_tt_swapout()

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_tt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index e90d3ed6283f..95a77dab8cc9 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -352,8 +352,9 @@ int ttm_tt_swapout(struct ttm_tt *ttm, struct file 
*persistent_swap_storage)
pr_err("Failed allocating swap storage\n");
return PTR_ERR(swap_storage);
}
-   } else
+   } else {
swap_storage = persistent_swap_storage;
+   }
 
swap_space = swap_storage->f_mapping;
 
-- 
2.14.3

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[PATCH 01/12] drm/ttm: Clean up indentation in ttm_bo.c

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_bo.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index d33a6bb742a1..8cf89da7030d 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -149,9 +149,8 @@ static void ttm_bo_release_list(struct kref *list_kref)
mutex_destroy(&bo->wu_mutex);
if (bo->destroy)
bo->destroy(bo);
-   else {
+   else
kfree(bo);
-   }
ttm_mem_global_free(bdev->glob->mem_glob, acc_size);
 }
 
@@ -163,7 +162,6 @@ void ttm_bo_add_to_lru(struct ttm_buffer_object *bo)
reservation_object_assert_held(bo->resv);
 
if (!(bo->mem.placement & TTM_PL_FLAG_NO_EVICT)) {
-
BUG_ON(!list_empty(&bo->lru));
 
man = &bdev->man[bo->mem.mem_type];
@@ -614,10 +612,9 @@ static void ttm_bo_delayed_workqueue(struct work_struct 
*work)
struct ttm_bo_device *bdev =
container_of(work, struct ttm_bo_device, wq.work);
 
-   if (!ttm_bo_delayed_delete(bdev, false)) {
+   if (!ttm_bo_delayed_delete(bdev, false))
schedule_delayed_work(&bdev->wq,
  ((HZ / 100) < 1) ? 1 : HZ / 100);
-   }
 }
 
 static void ttm_bo_release(struct kref *kref)
-- 
2.14.3

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[PATCH 02/12] drm/ttm: Add a default BO destructor to simplify code

[Tom St Denis]

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_bo.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 8cf89da7030d..4e85c32fea26 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -49,6 +49,12 @@ static struct attribute ttm_bo_count = {
.mode = S_IRUGO
 };
 
+/* default destructor */
+static void ttm_bo_default_destroy(struct ttm_buffer_object *bo)
+{
+   kfree(bo);
+};
+
 static inline int ttm_mem_type_from_place(const struct ttm_place *place,
  uint32_t *mem_type)
 {
@@ -147,10 +153,7 @@ static void ttm_bo_release_list(struct kref *list_kref)
dma_fence_put(bo->moving);
reservation_object_fini(&bo->ttm_resv);
mutex_destroy(&bo->wu_mutex);
-   if (bo->destroy)
-   bo->destroy(bo);
-   else
-   kfree(bo);
+   bo->destroy(bo);
ttm_mem_global_free(bdev->glob->mem_glob, acc_size);
 }
 
@@ -1176,7 +1179,8 @@ int ttm_bo_init_reserved(struct ttm_bo_device *bdev,
ttm_mem_global_free(mem_glob, acc_size);
return -EINVAL;
}
-   bo->destroy = destroy;
+   bo->destroy =
+   (destroy == NULL) ? ttm_bo_default_destroy : destroy;
 
kref_init(&bo->kref);
kref_init(&bo->list_kref);
-- 
2.14.3

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[PATCH 03/12] drm/ttm: Change ttm_tt page allocations to return errors

[Tom St Denis]

Explicitly return errors in ttm_tt_alloc_page_directory() and
ttm_dma_tt_alloc_page_directory() instead of relying on
further logic to detect errors.

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/ttm/ttm_tt.c | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index 9e4d43d68e91..e90d3ed6283f 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -50,19 +50,25 @@
 /**
  * Allocates storage for pointers to the pages that back the ttm.
  */
-static void ttm_tt_alloc_page_directory(struct ttm_tt *ttm)
+static int ttm_tt_alloc_page_directory(struct ttm_tt *ttm)
 {
ttm->pages = kvmalloc_array(ttm->num_pages, sizeof(void*),
GFP_KERNEL | __GFP_ZERO);
+   if (!ttm->pages)
+   return -ENOMEM;
+   return 0;
 }
 
-static void ttm_dma_tt_alloc_page_directory(struct ttm_dma_tt *ttm)
+static int ttm_dma_tt_alloc_page_directory(struct ttm_dma_tt *ttm)
 {
ttm->ttm.pages = kvmalloc_array(ttm->ttm.num_pages,
  sizeof(*ttm->ttm.pages) +
  sizeof(*ttm->dma_address),
  GFP_KERNEL | __GFP_ZERO);
+   if (!ttm->ttm.pages)
+   return -ENOMEM;
ttm->dma_address = (void *) (ttm->ttm.pages + ttm->ttm.num_pages);
+   return 0;
 }
 
 #ifdef CONFIG_X86
@@ -197,8 +203,7 @@ int ttm_tt_init(struct ttm_tt *ttm, struct ttm_bo_device 
*bdev,
ttm->state = tt_unpopulated;
ttm->swap_storage = NULL;
 
-   ttm_tt_alloc_page_directory(ttm);
-   if (!ttm->pages) {
+   if (ttm_tt_alloc_page_directory(ttm)) {
ttm_tt_destroy(ttm);
pr_err("Failed allocating page table\n");
return -ENOMEM;
@@ -230,8 +235,7 @@ int ttm_dma_tt_init(struct ttm_dma_tt *ttm_dma, struct 
ttm_bo_device *bdev,
ttm->swap_storage = NULL;
 
INIT_LIST_HEAD(&ttm_dma->pages_list);
-   ttm_dma_tt_alloc_page_directory(ttm_dma);
-   if (!ttm->pages) {
+   if (ttm_dma_tt_alloc_page_directory(ttm_dma)) {
ttm_tt_destroy(ttm);
pr_err("Failed allocating page table\n");
return -ENOMEM;
-- 
2.14.3

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Various TTM cleanups/fixes

[Tom St Denis]

This series includes mostly no-functional-changes to simplify
or cleanup various routines.

Patch #11 includes an fix to functional behaviour.

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Re: [PATCH libdrm 7/7] meson: cleanup whitespace

[Dylan Baker]

Reviewed-by: Dylan Baker 

Quoting Eric Engestrom (2018-01-26 03:30:47)
> Signed-off-by: Eric Engestrom 
> ---
>  meson.build | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/meson.build b/meson.build
> index 1fd58b071bb90a49996e..1bccdb2c03d7846e7bfb 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -207,8 +207,8 @@ foreach a : ['-Wall', '-Wextra', '-Wsign-compare', 
> '-Werror=undef',
>   '-Werror-implicit-function-declaration', '-Wpointer-arith',
>   '-Wwrite-strings', '-Wstrict-prototypes', 
> '-Wmissing-prototypes',
>   '-Wmissing-declarations', '-Wnested-externs', '-Wpacked',
> - '-Wswitch-enum', '-Wmissing-format-attribute', 
> - '-Wstrict-aliasing=2', '-Winit-self', '-Winline', '-Wshadow', 
> + '-Wswitch-enum', '-Wmissing-format-attribute',
> + '-Wstrict-aliasing=2', '-Winit-self', '-Winline', '-Wshadow',
>   '-Wdeclaration-after-statement', '-Wold-style-definition']
>if cc.has_argument(a)
>  warn_c_args += a
> @@ -216,7 +216,7 @@ foreach a : ['-Wall', '-Wextra', '-Wsign-compare', 
> '-Werror=undef',
>  endforeach
>  # GCC will never error for -Wno-*, so check for -W* then add -Wno-* to the 
> list
>  # of options
> -foreach a : ['unused-parameter', 'attributes', 'long-long', 
> +foreach a : ['unused-parameter', 'attributes', 'long-long',
>   'missing-field-initializers']
>if cc.has_argument('-W@0@'.format(a))
>  warn_c_args += '-Wno-@0@'.format(a)
> @@ -326,7 +326,7 @@ pkg.generate(
>version : meson.project_version(),
>description : 'Userspace interface to kernel DRM services',
>  )
> - 
> +
>  if with_libkms
>subdir('libkms')
>  endif
> -- 
> Cheers,
>   Eric
> 
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Re: [PATCH libdrm 01/13] meson: add missing HAVE_RADEON

[Dylan Baker]

For the series:
Reviewed-by: Dylan Baker 

Quoting Eric Engestrom (2018-01-26 08:45:40)
> Signed-off-by: Eric Engestrom 
> ---
>  meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/meson.build b/meson.build
> index 1bccdb2c03d7846e7bfb..73058e7d772b7744a359 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -255,7 +255,7 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 
> 'VMWGFX'],
>   [with_nouveau, 'NOUVEAU'], [with_omap, 'OMAP'],
>   [with_exynos, 'EXYNOS'], [with_freedreno, 'FREEDRENO'],
>   [with_tegra, 'TEGRA'], [with_vc4, 'VC4'],
> - [with_etnaviv, 'ETNAVIV']]
> + [with_etnaviv, 'ETNAVIV'], [with_radeon, 'RADEON']]
>if t[0]
>  config.set10('HAVE_@0@'.format(t[1]), true)
>endif
> -- 
> Cheers,
>   Eric
> 
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Re: [PATCH libdrm 1/7] meson, configure: add warning when using undefined preprocessor tokens

[Dylan Baker]

Quoting Eric Engestrom (2018-01-26 09:17:43)
> On Friday, 2018-01-26 17:14:06 +, Emil Velikov wrote:
> > On 26 January 2018 at 11:30, Eric Engestrom  
> > wrote:
> > > Signed-off-by: Eric Engestrom 
> > > ---
> > >  configure.ac | 2 +-
> > >  meson.build  | 2 +-
> > >  2 files changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/configure.ac b/configure.ac
> > > index 35378b3384290f8e1e26..3fc4e7794cd974171c0a 100644
> > > --- a/configure.ac
> > > +++ b/configure.ac
> > > @@ -197,7 +197,7 @@ dnl skipped and all flags rechecked.  So there's no 
> > > need to do anything
> > >  dnl else.  If for any reason you need to force a recheck, just change
> > >  dnl MAYBE_WARN in an ignorable way (like adding whitespace)
> > >
> > > -MAYBE_WARN="-Wall -Wextra \
> > > +MAYBE_WARN="-Wall -Wextra -Wundef \
> > >  -Wsign-compare -Werror-implicit-function-declaration \
> > >  -Wpointer-arith -Wwrite-strings -Wstrict-prototypes \
> > >  -Wmissing-prototypes -Wmissing-declarations -Wnested-externs \
> > > diff --git a/meson.build b/meson.build
> > > index d7a50cf96f905b53d37a..a410627fbf16a2c6d748 100644
> > > --- a/meson.build
> > > +++ b/meson.build
> > > @@ -203,7 +203,7 @@ if cc.has_function('open_memstream')
> > >  endif
> > >
> > >  warn_c_args = []
> > > -foreach a : ['-Wall', '-Wextra', '-Wsign-compare',
> > > +foreach a : ['-Wall', '-Wextra', '-Wsign-compare', '-Wundef',
> > 
> > Unless we have [m]any undef warnings, I'd just make that Werror=undef,
> > across build systems.
> 
> This is what patch 6/7 of this series does.
> I chose to make it a two step thing, first enable the warning, fix the
> code, and then turn the warning into an error.
> 
> I guess I could just skip this patch, and introduce the warning as an
> error in 6/7.
> 
> > 
> > -Emil

I'd either leave 1/7 as-is or drop it completely, so we can bisect across this
series. I don't care which.

Dylan


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Re: [PATCH libdrm 01/13] meson: add missing HAVE_RADEON

[Dylan Baker]

Reviewed-by: Dylan Baker 

Quoting Eric Engestrom (2018-01-26 08:45:40)
> Signed-off-by: Eric Engestrom 
> ---
>  meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/meson.build b/meson.build
> index 1bccdb2c03d7846e7bfb..73058e7d772b7744a359 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -255,7 +255,7 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 
> 'VMWGFX'],
>   [with_nouveau, 'NOUVEAU'], [with_omap, 'OMAP'],
>   [with_exynos, 'EXYNOS'], [with_freedreno, 'FREEDRENO'],
>   [with_tegra, 'TEGRA'], [with_vc4, 'VC4'],
> - [with_etnaviv, 'ETNAVIV']]
> + [with_etnaviv, 'ETNAVIV'], [with_radeon, 'RADEON']]
>if t[0]
>  config.set10('HAVE_@0@'.format(t[1]), true)
>endif
> -- 
> Cheers,
>   Eric
> 
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Re: [RFC v2 3/4] drm/nouveau: Add support for BLCG on Kepler2

[Lyude Paul]

On Fri, 2018-01-26 at 02:53 -0500, Ilia Mirkin wrote:
> On Thu, Jan 25, 2018 at 10:35 PM, Lyude Paul  wrote:
> > Same as the previous patch, but for Kepler2 now
> > 
> > Signed-off-by: Lyude Paul 
> > ---
> >  drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h  |  1 +
> >  drivers/gpu/drm/nouveau/nvkm/engine/device/base.c |  8 +--
> >  drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c| 62 
> >  drivers/gpu/drm/nouveau/nvkm/subdev/fb/Kbuild |  1 +
> >  drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c| 71
> > +++
> >  5 files changed, 139 insertions(+), 4 deletions(-)
> >  create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.c
> > 
> > diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
> > b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
> > index adb78f7d083a..92be0e5269c6 100644
> > --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
> > +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
> > @@ -75,6 +75,7 @@ int mcp89_fb_new(struct nvkm_device *, int, struct nvkm_fb
> > **);
> >  int gf100_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
> >  int gf108_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
> >  int gk104_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
> > +int gk110_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
> >  int gk20a_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
> >  int gm107_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
> >  int gm200_fb_new(struct nvkm_device *, int, struct nvkm_fb **);
> > diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > index 74bd09b1c893..7590a30b7ff0 100644
> > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > @@ -1812,7 +1812,7 @@ nvf0_chipset = {
> > .bus = gf100_bus_new,
> > .clk = gk104_clk_new,
> > .devinit = gf100_devinit_new,
> > -   .fb = gk104_fb_new,
> > +   .fb = gk110_fb_new,
> > .fuse = gf100_fuse_new,
> > .gpio = gk104_gpio_new,
> > .i2c = gk104_i2c_new,
> > @@ -1850,7 +1850,7 @@ nvf1_chipset = {
> > .bus = gf100_bus_new,
> > .clk = gk104_clk_new,
> > .devinit = gf100_devinit_new,
> > -   .fb = gk104_fb_new,
> > +   .fb = gk110_fb_new,
> > .fuse = gf100_fuse_new,
> > .gpio = gk104_gpio_new,
> > .i2c = gk104_i2c_new,
> > @@ -1888,7 +1888,7 @@ nv106_chipset = {
> > .bus = gf100_bus_new,
> > .clk = gk104_clk_new,
> > .devinit = gf100_devinit_new,
> > -   .fb = gk104_fb_new,
> > +   .fb = gk110_fb_new,
> > .fuse = gf100_fuse_new,
> > .gpio = gk104_gpio_new,
> > .i2c = gk104_i2c_new,
> > @@ -1926,7 +1926,7 @@ nv108_chipset = {
> > .bus = gf100_bus_new,
> > .clk = gk104_clk_new,
> > .devinit = gf100_devinit_new,
> > -   .fb = gk104_fb_new,
> > +   .fb = gk110_fb_new,
> > .fuse = gf100_fuse_new,
> > .gpio = gk104_gpio_new,
> > .i2c = gk104_i2c_new,
> > diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
> > b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
> > index a38e19b61c1d..38d3328e45f1 100644
> > --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
> > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
> > @@ -22,6 +22,7 @@
> >   * Authors: Ben Skeggs 
> >   */
> >  #include "gf100.h"
> > +#include "gk104.h"
> >  #include "ctxgf100.h"
> > 
> >  #include 
> > @@ -156,6 +157,66 @@ gk110_gr_pack_mmio[] = {
> > {}
> >  };
> > 
> > +const struct nvkm_therm_clkgate_init
> 
> These should all be static, no?
True, will send out a V3 in a moment

> 
> > +gk110_clkgate_blcg_init_sked_0[] = {
> > +   { 0x407000, 1, 0x4041 },
> > +   {}
> > +};
> > +
> > +const struct nvkm_therm_clkgate_init
> > +gk110_clkgate_blcg_init_gpc_gcc_0[] = {
> > +   { 0x419020, 1, 0x0042 },
> > +   { 0x419038, 1, 0x0042 },
> > +   {}
> > +};
> > +
> > +const struct nvkm_therm_clkgate_init
> > +gk110_clkgate_blcg_init_gpc_l1c_0[] = {
> > +   { 0x419cd4, 2, 0x4042 },
> > +   {}
> > +};
> > +
> > +const struct nvkm_therm_clkgate_init
> > +gk110_clkgate_blcg_init_gpc_mp_0[] = {
> > +   { 0x419fd0, 1, 0x4043 },
> > +   { 0x419fd8, 1, 0x4049 },
> > +   { 0x419fe0, 2, 0x4042 },
> > +   { 0x419ff0, 1, 0x0046 },
> > +   { 0x419ff8, 1, 0x4042 },
> > +   { 0x419f90, 1, 0x4042 },
> > +   {}
> > +};
> > +
> > +const struct nvkm_therm_clkgate_pack
> > +gk110_clkgate_pack[] = {
> > +   { gk104_clkgate_blcg_init_main_0 },
> > +   { gk104_clkgate_blcg_init_rstr2d_0 },
> > +   { gk104_clkgate_blcg_init_unk_0 },
> > +   { gk104_clkgate_blcg_init_gcc_0 },
> > +   { gk110_clkgate_blcg_init_sked_0 },
> > +   { gk104_clkgate_blcg_init_unk_1 },
> > +   { gk104_clkgate_blcg_init_gpc_ctxctl_0 },

Re: [PATCH libdrm 0/2] drm/tegra: Sanitize format modifiers

[Emil Velikov]

On 12 January 2018 at 17:02, Thierry Reding  wrote:
> From: Thierry Reding 
>
> These UABI changes have now been merged into drm-next, so synchronize
> the libdrm headers and fixup the format modifiers in modetest.
>
Hi Thierry,

I haven't checked the diff in detail, but on quick look it seems fine.

Please a add reference to branch/sha1, that these are based on, in the
commit message of the respective patches. With that the series is
Acked-by: Emil Velikov 

-Emil
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Re: [Intel-gfx] [PATCH libdrm] tests: Add drm_set_cgrp_param

[Emil Velikov]

On 26 January 2018 at 17:27, Matt Roper  wrote:
> On Fri, Jan 26, 2018 at 05:08:48PM +, Emil Velikov wrote:
>> On 22 January 2018 at 15:44, Matt Roper  wrote:
>> > drm_set_cgrp_param is a simple tool to set DRM parameters associated with a
>> > cgroup.  It is intended to be called at system initialization time (e.g., 
>> > from
>> > a sysv-init script or systemd service) to configure graphics policy and
>> > resource management according to the wishes of the system integrator.
>> >
>> > Signed-off-by: Matt Roper 
>> > ---
>> >  configure.ac  |  1 +
>> >  tests/Makefile.am |  2 +-
>> >  tests/drm_set_cgrp_param/Makefile.am  | 18 ++
>> >  tests/drm_set_cgrp_param/drm_set_cgrp_param.c | 80 
>> > +++
>> >  4 files changed, 100 insertions(+), 1 deletion(-)
>> >  create mode 100644 tests/drm_set_cgrp_param/Makefile.am
>> >  create mode 100644 tests/drm_set_cgrp_param/drm_set_cgrp_param.c
>> >
>> Hi Matt,
>>
>> Adding a small test/demo in libdrm sounds good. Although I think we
>> need some IGT tests, if you haven't prepped them already.
>> After all we need to ensure the kernel correctly validates and errors
>> when we feed it the wrong info through the IOCTL.
>
> Yeah, agreed.  Writing real IGT's was in the TODO list of the
> cover-letter for my kernel patch series.  This kernel work is still a
> pretty early RFC just to gather feedback on the general approach of
> integrating cgroups with DRM; I figured I'd wait on writing real IGT's
> until we're more confident that this is the right approach in general.
>
> I'm working on a v2 right now that makes some pretty significant changes
> to the series, but I'm not sure yet whether the uapi will change in my
> next iteration or not.
>
Good call - have an agreement about the interface and usage first.
Then iron out all the fiddly bits.

>> There's a small suggestions about the IOCTL design.
>> s/reserved/flags/ to make future extension are possible - as mentioned in [2]
>
> Yeah, that's why I added the reserved field; we don't have any actual
> flags yet, but as soon as we do we'd rename the field to flags and
> document it accordingly.  I can rename the field immediately if you
> think that's easier.  I think the most important thing that's missing at
> the moment is that the kernel patches forgot to check that the reserved
> field is actually empty (i.e., we should reject calls with any garbage
> in there now so that we don't break ABI in the future when we start
> really using those bits for something).
>
Please rename it now. Otherwise we'll get a build break for new kernel
and old userspace.
And yes, validating (returning -EINVAL IIRC) the flags is a must.

Thanks
Emil
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[Bug 198123] Console is the wrong color at boot with radeon 6670

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=198123

--- Comment #24 from Michel Dänzer (mic...@daenzer.net) ---
The radeon driver already calls load_lut when the CRTC dpms hook is called with
DRM_MODE_DPMS_ON. Does the ast patch call load_lut even when DPMS is already
on? If so, I wonder if it doesn't just paper over the real issue, which is that
something changes the LUT but then doesn't call load_lut.

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Re: [PATCH libdrm 13/13] xf86atomic: fix -Wundef error

[Emil Velikov]

On 26 January 2018 at 16:45, Eric Engestrom  wrote:
> Signed-off-by: Eric Engestrom 
> ---
>  xf86atomic.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/xf86atomic.h b/xf86atomic.h
> index 922b37da62517bc1ee2f..70e918663c3b015f2881 100644
> --- a/xf86atomic.h
> +++ b/xf86atomic.h
> @@ -101,7 +101,7 @@ typedef struct { LIBDRM_ATOMIC_TYPE atomic; } atomic_t;
>
>  #endif
>
> -#if ! HAS_ATOMIC_OPS
> +#if !defined(HAS_ATOMIC_OPS)
>  #error libdrm requires atomic operations, please define them for your 
> CPU/compiler.
>  #endif
>
The series is
Reviewed-by: Emil Velikov 

Unrelated: I've been wondering if/how many libkms users there are and
if we could nuke it.
It will drop a fair bit of build magic ;-)

-Emil
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Re: [PATCH libdrm 1/7] remove unnecessary empty statements

[Emil Velikov]

I think you meant s/empty statements/double semi-colon/.

 - please keep the nouveau debug patch out for the time being
 - regardless if you keep as-is or fold the Wundef patch with the Werror one
 - with the shadowing issue pointed by Chrisian

Both 7 patch series are
Reviewed-by: Emil Velikov 

-Emil
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[Bug 104306] Mesa 17.3 breaks Firefox and other Xwayland apps on AMD HD7750

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104306

--- Comment #15 from Michel Dänzer  ---
Thanks for the help, Eric.

https://patchwork.freedesktop.org/patch/200999/ fixes this for me.

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Re: [Intel-gfx] [PATCH libdrm] tests: Add drm_set_cgrp_param

[Matt Roper]

On Fri, Jan 26, 2018 at 05:08:48PM +, Emil Velikov wrote:
> On 22 January 2018 at 15:44, Matt Roper  wrote:
> > drm_set_cgrp_param is a simple tool to set DRM parameters associated with a
> > cgroup.  It is intended to be called at system initialization time (e.g., 
> > from
> > a sysv-init script or systemd service) to configure graphics policy and
> > resource management according to the wishes of the system integrator.
> >
> > Signed-off-by: Matt Roper 
> > ---
> >  configure.ac  |  1 +
> >  tests/Makefile.am |  2 +-
> >  tests/drm_set_cgrp_param/Makefile.am  | 18 ++
> >  tests/drm_set_cgrp_param/drm_set_cgrp_param.c | 80 
> > +++
> >  4 files changed, 100 insertions(+), 1 deletion(-)
> >  create mode 100644 tests/drm_set_cgrp_param/Makefile.am
> >  create mode 100644 tests/drm_set_cgrp_param/drm_set_cgrp_param.c
> >
> Hi Matt,
> 
> Adding a small test/demo in libdrm sounds good. Although I think we
> need some IGT tests, if you haven't prepped them already.
> After all we need to ensure the kernel correctly validates and errors
> when we feed it the wrong info through the IOCTL.

Yeah, agreed.  Writing real IGT's was in the TODO list of the
cover-letter for my kernel patch series.  This kernel work is still a
pretty early RFC just to gather feedback on the general approach of
integrating cgroups with DRM; I figured I'd wait on writing real IGT's
until we're more confident that this is the right approach in general.

I'm working on a v2 right now that makes some pretty significant changes
to the series, but I'm not sure yet whether the uapi will change in my
next iteration or not.

> There's a small suggestions about the IOCTL design.
> s/reserved/flags/ to make future extension are possible - as mentioned in [2]

Yeah, that's why I added the reserved field; we don't have any actual
flags yet, but as soon as we do we'd rename the field to flags and
document it accordingly.  I can rename the field immediately if you
think that's easier.  I think the most important thing that's missing at
the moment is that the kernel patches forgot to check that the reserved
field is actually empty (i.e., we should reject calls with any garbage
in there now so that we don't break ABI in the future when we start
really using those bits for something).

Thanks for the feedback!

Matt

> 
> Thanks
> Emil
> 
> [2] 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/ioctl/botching-up-ioctls.txt?h=v4.15-rc9#n64

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[PATCH libdrm] meson: fix libdrm_nouveau pkgconfig include directories

[Dylan Baker]

Signed-off-by: Dylan Baker 
---

I have tested building every mesa driver against this (with and without udev!)
so I'm pretty sure that this is the last pkgbuild problem.

I'm sure I'll be sad in a day or two...

 nouveau/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/nouveau/meson.build b/nouveau/meson.build
index bfecf84b..f031cd63 100644
--- a/nouveau/meson.build
+++ b/nouveau/meson.build
@@ -45,7 +45,7 @@ install_headers(
 pkg.generate(
   name : 'libdrm_nouveau',
   libraries : libdrm_nouveau,
-  subdirs : ['.', 'nouveau'],
+  subdirs : ['.', 'libdrm', 'libdrm/nouveau'],
   version : meson.project_version(),
   requires_private : 'libdrm',
   description : 'Userspace interface to nouveau kernel DRM services',
-- 
2.16.0

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Re: [PATCH 1/2] meson: set proper pkg-config version for libdrm_freedreno

[Dylan Baker]

Quoting Emil Velikov (2018-01-25 02:30:10)
> Hi Dylan,
> 
> To make it easier to spot these, do set the git subject prefix to PATCH 
> libdrm.
> See autogen.sh for an example.
> 
> On 12 January 2018 at 19:57, Dylan Baker  wrote:
> > Copy and paste error from exynos.
> >
> > Signed-off-by: Dylan Baker 
> > ---
> >  freedreno/meson.build | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/freedreno/meson.build b/freedreno/meson.build
> > index b4035e1..de6a413 100644
> > --- a/freedreno/meson.build
> > +++ b/freedreno/meson.build
> > @@ -64,7 +64,7 @@ pkg.generate(
> >name : 'libdrm_freedreno',
> >libraries : libdrm_freedreno,
> >subdirs : ['.', 'libdrm', 'freedreno'],
> > -  version : '0.7',
> > +  version : meson.project_version(),
> 
> Ideally we'll have version file(s) to share across builds - both the
> shared libraries' --version-info and the pkg-config ones.
> Otherwise things will be out of sync far too often. But that can
> happen as a follow-up.

I guess thing to do for libdrm is decide how long we need both build systems.
libdrm is a much simpler build than mesa so, I would hope we can iron out any
remaining bugs pretty quickly. We can also cut releases whenever we want with
libdrm (unlike mesa where we use a 3 month cadence). If we think that we need to
have them co-exist for a long time then yes, we absolutely should do something
like add a VERSION file.

> The series is
> Reviewed-by: Emil Velikov 

Thanks for looking at this!

> 
> -Emil

Odd, I have format.subjectPrefix set in my libdrm git repo. Maybe adding --to
changes that?

Dylan


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Re: [PATCH libdrm 2/7] nouveau: remove always-true #ifdef guards

[Emil Velikov]

On 26 January 2018 at 11:30, Eric Engestrom  wrote:
> `DEBUG` has always been defined since 292da616fe1f936ca78a3 "nouveau:
> pull in major libdrm rewrite" in 2011
>
> Signed-off-by: Eric Engestrom 
> ---
>  nouveau/Makefile.am | 3 +--
>  nouveau/nouveau.c   | 4 
>  nouveau/private.h   | 5 -
>  3 files changed, 1 insertion(+), 11 deletions(-)
>
> diff --git a/nouveau/Makefile.am b/nouveau/Makefile.am
> index 344a84454e420044afb5..60ebe243d4236e6aa814 100644
> --- a/nouveau/Makefile.am
> +++ b/nouveau/Makefile.am
> @@ -4,8 +4,7 @@ AM_CFLAGS = \
> $(WARN_CFLAGS) \
> -I$(top_srcdir) \
> $(PTHREADSTUBS_CFLAGS) \
> -   -I$(top_srcdir)/include/drm \
> -   -DDEBUG
> +   -I$(top_srcdir)/include/drm
>
>  libdrm_nouveau_la_LTLIBRARIES = libdrm_nouveau.la
>  libdrm_nouveau_ladir = $(libdir)
> diff --git a/nouveau/nouveau.c b/nouveau/nouveau.c
> index e113a8fe780757a096b2..e68de16fe42c1953e9c0 100644
> --- a/nouveau/nouveau.c
> +++ b/nouveau/nouveau.c
> @@ -50,7 +50,6 @@
>  #include "nvif/ioctl.h"
>  #include "nvif/unpack.h"
>
> -#ifdef DEBUG
>  drm_private uint32_t nouveau_debug = 0;
>
>  static void
> @@ -62,7 +61,6 @@ debug_init(char *args)
> nouveau_debug = n;
> }
>  }
> -#endif
>
>  static int
>  nouveau_object_ioctl(struct nouveau_object *obj, void *data, uint32_t size)
> @@ -331,9 +329,7 @@ nouveau_drm_new(int fd, struct nouveau_drm **pdrm)
> struct nouveau_drm *drm;
> drmVersionPtr ver;
>
> -#ifdef DEBUG
> debug_init(getenv("NOUVEAU_LIBDRM_DEBUG"));
> -#endif
>
> if (!(drm = calloc(1, sizeof(*drm
> return -ENOMEM;
> diff --git a/nouveau/private.h b/nouveau/private.h
> index 83060f965244fac3f087..8eca0a067195d7c5c54c 100644
> --- a/nouveau/private.h
> +++ b/nouveau/private.h
> @@ -9,17 +9,12 @@
>
>  #include "nouveau.h"
>
> -#ifdef DEBUG
>  drm_private uint32_t nouveau_debug;
>  #define dbg_on(lvl) (nouveau_debug & (1 << lvl))
>  #define dbg(lvl, fmt, args...) do {  
>   \
> if (dbg_on((lvl)))
>  \
> fprintf(stderr, "nouveau: "fmt, ##args);  
>  \
>  } while(0)
> -#else
> -#define dbg_on(lvl) (0)
> -#define dbg(lvl, fmt, args...)
> -#endif
>  #define err(fmt, args...) fprintf(stderr, "nouveau: "fmt, ##args)
>
I've been meaning to ask Ben about the the DEBUG and SIMULATE bits in nouveau.
The latter seems like a debug left-over (that we can drop), while the
former is...

Ben can you shed some light?

-Emil
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Re: [PATCH libdrm 4/7] tests/amdgpu: fix bad sign comparisons

[Christian König]

Am 26.01.2018 um 18:15 schrieb Eric Engestrom:

On Friday, 2018-01-26 12:38:35 +0100, Christian König wrote:

Am 26.01.2018 um 12:32 schrieb Eric Engestrom:

Signed-off-by: Eric Engestrom 
---
   tests/amdgpu/cs_tests.c  |  2 +-
   tests/amdgpu/uvd_enc_tests.c | 10 +-
   tests/amdgpu/vce_tests.c | 10 +-
   tests/amdgpu/vcn_tests.c |  4 ++--
   4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c
index a5361cd59457d039dea9..40700f53d35f3340b895 100644
--- a/tests/amdgpu/cs_tests.c
+++ b/tests/amdgpu/cs_tests.c
@@ -396,7 +396,7 @@ static void amdgpu_cs_uvd_decode(void)
CU_ASSERT_EQUAL(r, 0);
/* TODO: use a real CRC32 */
-   for (i = 0, sum = 0; i < dt_size; ++i)
+   for (uint64_t i = 0, sum = 0; i < dt_size; ++i)

Please keep the define local to the function,

I assume this applies to all the hunks in this patch, right?


Yeah, in general we try to follow kernel coding style rules with the 
libdrm amdgpu stuff.



I'll send a v2 later (ie. next week).


even worse this seems to shadow a local defined i.

It does shadow the function-wide `i`, because it's a different kind of
index. I guess really it should have a different name, but I don't know
enought about what this is all doing to think of a good name; any ideas?


Just make the function wide i uint64_t, that should work and nothing of 
that code is performance critical.


Christian.




Christian.


sum += ptr[i];
CU_ASSERT_EQUAL(sum, SUM_DECODE);
diff --git a/tests/amdgpu/uvd_enc_tests.c b/tests/amdgpu/uvd_enc_tests.c
index 0377c1a5d7e1b789d782..c1b840e3e56d83d0a3af 100644
--- a/tests/amdgpu/uvd_enc_tests.c
+++ b/tests/amdgpu/uvd_enc_tests.c
@@ -261,7 +261,7 @@ static void check_result(struct amdgpu_uvd_enc *enc)
uint64_t sum;
uint32_t s = 175602;
uint32_t *ptr, size;
-   int j, r;
+   int r;
r = amdgpu_bo_cpu_map(enc->fb.handle, (void **)&enc->fb.ptr);
CU_ASSERT_EQUAL(r, 0);
@@ -271,7 +271,7 @@ static void check_result(struct amdgpu_uvd_enc *enc)
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_cpu_map(enc->bs.handle, (void **)&enc->bs.ptr);
CU_ASSERT_EQUAL(r, 0);
-   for (j = 0, sum = 0; j < size; ++j)
+   for (uint32_t j = 0, sum = 0; j < size; ++j)
sum += enc->bs.ptr[j];
CU_ASSERT_EQUAL(sum, s);
r = amdgpu_bo_cpu_unmap(enc->bs.handle);
@@ -331,7 +331,7 @@ static void amdgpu_cs_uvd_enc_session_init(void)
   static void amdgpu_cs_uvd_enc_encode(void)
   {
-   int len, r, i;
+   int len, r;
uint64_t luma_offset, chroma_offset;
uint32_t vbuf_size, bs_size = 0x003f4800, cpb_size;
unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
@@ -354,11 +354,11 @@ static void amdgpu_cs_uvd_enc_encode(void)
CU_ASSERT_EQUAL(r, 0);
memset(enc.vbuf.ptr, 0, vbuf_size);
-   for (i = 0; i < enc.height; ++i) {
+   for (unsigned i = 0; i < enc.height; ++i) {
memcpy(enc.vbuf.ptr, (frame + i * enc.width), enc.width);
enc.vbuf.ptr += ALIGN(enc.width, align);
}
-   for (i = 0; i < enc.height / 2; ++i) {
+   for (unsigned i = 0; i < enc.height / 2; ++i) {
memcpy(enc.vbuf.ptr, ((frame + enc.height * enc.width) + i * 
enc.width), enc.width);
enc.vbuf.ptr += ALIGN(enc.width, align);
}
diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c
index 75821bbb1e6c92e91fe7..6da6511793a1cf0ab488 100644
--- a/tests/amdgpu/vce_tests.c
+++ b/tests/amdgpu/vce_tests.c
@@ -425,8 +425,8 @@ static void check_result(struct amdgpu_vce_encode *enc)
   {
uint64_t sum;
uint32_t s[2] = {180325, 15946};
-   uint32_t *ptr, size;
-   int i, j, r;
+   uint32_t *ptr, i, j, size;
+   int r;
for (i = 0; i < 2; ++i) {
r = amdgpu_bo_cpu_map(enc->fb[i].handle, (void 
**)&enc->fb[i].ptr);
@@ -449,7 +449,7 @@ static void amdgpu_cs_vce_encode(void)
   {
uint32_t vbuf_size, bs_size = 0x154000, cpb_size;
unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
-   int i, r;
+   int r;
vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
cpb_size = vbuf_size * 10;
@@ -472,11 +472,11 @@ static void amdgpu_cs_vce_encode(void)
CU_ASSERT_EQUAL(r, 0);
memset(enc.vbuf.ptr, 0, vbuf_size);
-   for (i = 0; i < enc.height; ++i) {
+   for (unsigned i = 0; i < enc.height; ++i) {
memcpy(enc.vbuf.ptr, (frame + i * enc.width), enc.width);
enc.vbuf.ptr += ALIGN(enc.width, align);
}
-   for (i = 0; i < enc.height / 2; ++i) {
+   for (unsigned i = 0; i < enc.height / 2; ++i) {
memcpy(enc.vbuf.ptr, ((frame + enc.height * enc.width) + i * 
enc.width), enc.width);
enc.vbuf.ptr += ALIGN(enc.width, align);
}
diff --git a/tests/

Re: [PATCH libdrm 1/7] meson, configure: add warning when using undefined preprocessor tokens

[Eric Engestrom]

On Friday, 2018-01-26 17:14:06 +, Emil Velikov wrote:
> On 26 January 2018 at 11:30, Eric Engestrom  wrote:
> > Signed-off-by: Eric Engestrom 
> > ---
> >  configure.ac | 2 +-
> >  meson.build  | 2 +-
> >  2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/configure.ac b/configure.ac
> > index 35378b3384290f8e1e26..3fc4e7794cd974171c0a 100644
> > --- a/configure.ac
> > +++ b/configure.ac
> > @@ -197,7 +197,7 @@ dnl skipped and all flags rechecked.  So there's no 
> > need to do anything
> >  dnl else.  If for any reason you need to force a recheck, just change
> >  dnl MAYBE_WARN in an ignorable way (like adding whitespace)
> >
> > -MAYBE_WARN="-Wall -Wextra \
> > +MAYBE_WARN="-Wall -Wextra -Wundef \
> >  -Wsign-compare -Werror-implicit-function-declaration \
> >  -Wpointer-arith -Wwrite-strings -Wstrict-prototypes \
> >  -Wmissing-prototypes -Wmissing-declarations -Wnested-externs \
> > diff --git a/meson.build b/meson.build
> > index d7a50cf96f905b53d37a..a410627fbf16a2c6d748 100644
> > --- a/meson.build
> > +++ b/meson.build
> > @@ -203,7 +203,7 @@ if cc.has_function('open_memstream')
> >  endif
> >
> >  warn_c_args = []
> > -foreach a : ['-Wall', '-Wextra', '-Wsign-compare',
> > +foreach a : ['-Wall', '-Wextra', '-Wsign-compare', '-Wundef',
> 
> Unless we have [m]any undef warnings, I'd just make that Werror=undef,
> across build systems.

This is what patch 6/7 of this series does.
I chose to make it a two step thing, first enable the warning, fix the
code, and then turn the warning into an error.

I guess I could just skip this patch, and introduce the warning as an
error in 6/7.

> 
> -Emil
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Re: [PATCH libdrm 4/7] tests/amdgpu: fix bad sign comparisons

[Eric Engestrom]

On Friday, 2018-01-26 12:38:35 +0100, Christian König wrote:
> Am 26.01.2018 um 12:32 schrieb Eric Engestrom:
> > Signed-off-by: Eric Engestrom 
> > ---
> >   tests/amdgpu/cs_tests.c  |  2 +-
> >   tests/amdgpu/uvd_enc_tests.c | 10 +-
> >   tests/amdgpu/vce_tests.c | 10 +-
> >   tests/amdgpu/vcn_tests.c |  4 ++--
> >   4 files changed, 13 insertions(+), 13 deletions(-)
> > 
> > diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c
> > index a5361cd59457d039dea9..40700f53d35f3340b895 100644
> > --- a/tests/amdgpu/cs_tests.c
> > +++ b/tests/amdgpu/cs_tests.c
> > @@ -396,7 +396,7 @@ static void amdgpu_cs_uvd_decode(void)
> > CU_ASSERT_EQUAL(r, 0);
> > /* TODO: use a real CRC32 */
> > -   for (i = 0, sum = 0; i < dt_size; ++i)
> > +   for (uint64_t i = 0, sum = 0; i < dt_size; ++i)
> 
> Please keep the define local to the function,

I assume this applies to all the hunks in this patch, right?
I'll send a v2 later (ie. next week).

> even worse this seems to shadow a local defined i.

It does shadow the function-wide `i`, because it's a different kind of
index. I guess really it should have a different name, but I don't know
enought about what this is all doing to think of a good name; any ideas?

> 
> Christian.
> 
> > sum += ptr[i];
> > CU_ASSERT_EQUAL(sum, SUM_DECODE);
> > diff --git a/tests/amdgpu/uvd_enc_tests.c b/tests/amdgpu/uvd_enc_tests.c
> > index 0377c1a5d7e1b789d782..c1b840e3e56d83d0a3af 100644
> > --- a/tests/amdgpu/uvd_enc_tests.c
> > +++ b/tests/amdgpu/uvd_enc_tests.c
> > @@ -261,7 +261,7 @@ static void check_result(struct amdgpu_uvd_enc *enc)
> > uint64_t sum;
> > uint32_t s = 175602;
> > uint32_t *ptr, size;
> > -   int j, r;
> > +   int r;
> > r = amdgpu_bo_cpu_map(enc->fb.handle, (void **)&enc->fb.ptr);
> > CU_ASSERT_EQUAL(r, 0);
> > @@ -271,7 +271,7 @@ static void check_result(struct amdgpu_uvd_enc *enc)
> > CU_ASSERT_EQUAL(r, 0);
> > r = amdgpu_bo_cpu_map(enc->bs.handle, (void **)&enc->bs.ptr);
> > CU_ASSERT_EQUAL(r, 0);
> > -   for (j = 0, sum = 0; j < size; ++j)
> > +   for (uint32_t j = 0, sum = 0; j < size; ++j)
> > sum += enc->bs.ptr[j];
> > CU_ASSERT_EQUAL(sum, s);
> > r = amdgpu_bo_cpu_unmap(enc->bs.handle);
> > @@ -331,7 +331,7 @@ static void amdgpu_cs_uvd_enc_session_init(void)
> >   static void amdgpu_cs_uvd_enc_encode(void)
> >   {
> > -   int len, r, i;
> > +   int len, r;
> > uint64_t luma_offset, chroma_offset;
> > uint32_t vbuf_size, bs_size = 0x003f4800, cpb_size;
> > unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
> > @@ -354,11 +354,11 @@ static void amdgpu_cs_uvd_enc_encode(void)
> > CU_ASSERT_EQUAL(r, 0);
> > memset(enc.vbuf.ptr, 0, vbuf_size);
> > -   for (i = 0; i < enc.height; ++i) {
> > +   for (unsigned i = 0; i < enc.height; ++i) {
> > memcpy(enc.vbuf.ptr, (frame + i * enc.width), enc.width);
> > enc.vbuf.ptr += ALIGN(enc.width, align);
> > }
> > -   for (i = 0; i < enc.height / 2; ++i) {
> > +   for (unsigned i = 0; i < enc.height / 2; ++i) {
> > memcpy(enc.vbuf.ptr, ((frame + enc.height * enc.width) + i * 
> > enc.width), enc.width);
> > enc.vbuf.ptr += ALIGN(enc.width, align);
> > }
> > diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c
> > index 75821bbb1e6c92e91fe7..6da6511793a1cf0ab488 100644
> > --- a/tests/amdgpu/vce_tests.c
> > +++ b/tests/amdgpu/vce_tests.c
> > @@ -425,8 +425,8 @@ static void check_result(struct amdgpu_vce_encode *enc)
> >   {
> > uint64_t sum;
> > uint32_t s[2] = {180325, 15946};
> > -   uint32_t *ptr, size;
> > -   int i, j, r;
> > +   uint32_t *ptr, i, j, size;
> > +   int r;
> > for (i = 0; i < 2; ++i) {
> > r = amdgpu_bo_cpu_map(enc->fb[i].handle, (void 
> > **)&enc->fb[i].ptr);
> > @@ -449,7 +449,7 @@ static void amdgpu_cs_vce_encode(void)
> >   {
> > uint32_t vbuf_size, bs_size = 0x154000, cpb_size;
> > unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
> > -   int i, r;
> > +   int r;
> > vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
> > cpb_size = vbuf_size * 10;
> > @@ -472,11 +472,11 @@ static void amdgpu_cs_vce_encode(void)
> > CU_ASSERT_EQUAL(r, 0);
> > memset(enc.vbuf.ptr, 0, vbuf_size);
> > -   for (i = 0; i < enc.height; ++i) {
> > +   for (unsigned i = 0; i < enc.height; ++i) {
> > memcpy(enc.vbuf.ptr, (frame + i * enc.width), enc.width);
> > enc.vbuf.ptr += ALIGN(enc.width, align);
> > }
> > -   for (i = 0; i < enc.height / 2; ++i) {
> > +   for (unsigned i = 0; i < enc.height / 2; ++i) {
> > memcpy(enc.vbuf.ptr, ((frame + enc.height * enc.width) + i * 
> > enc.width), enc.width);
> > enc.vbuf.ptr += ALIGN(enc.width, align);
> > }
> > diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c
> > index 2eb8c4347be094a70958..b228db609f0e0c0fefdd 100644
> > --- a/tests/amd

Re: [PATCH libdrm 1/7] meson, configure: add warning when using undefined preprocessor tokens

[Emil Velikov]

On 26 January 2018 at 11:30, Eric Engestrom  wrote:
> Signed-off-by: Eric Engestrom 
> ---
>  configure.ac | 2 +-
>  meson.build  | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/configure.ac b/configure.ac
> index 35378b3384290f8e1e26..3fc4e7794cd974171c0a 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -197,7 +197,7 @@ dnl skipped and all flags rechecked.  So there's no need 
> to do anything
>  dnl else.  If for any reason you need to force a recheck, just change
>  dnl MAYBE_WARN in an ignorable way (like adding whitespace)
>
> -MAYBE_WARN="-Wall -Wextra \
> +MAYBE_WARN="-Wall -Wextra -Wundef \
>  -Wsign-compare -Werror-implicit-function-declaration \
>  -Wpointer-arith -Wwrite-strings -Wstrict-prototypes \
>  -Wmissing-prototypes -Wmissing-declarations -Wnested-externs \
> diff --git a/meson.build b/meson.build
> index d7a50cf96f905b53d37a..a410627fbf16a2c6d748 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -203,7 +203,7 @@ if cc.has_function('open_memstream')
>  endif
>
>  warn_c_args = []
> -foreach a : ['-Wall', '-Wextra', '-Wsign-compare',
> +foreach a : ['-Wall', '-Wextra', '-Wsign-compare', '-Wundef',

Unless we have [m]any undef warnings, I'd just make that Werror=undef,
across build systems.

-Emil
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Re: [Intel-gfx] [PATCH libdrm] tests: Add drm_set_cgrp_param

[Emil Velikov]

On 22 January 2018 at 15:44, Matt Roper  wrote:
> drm_set_cgrp_param is a simple tool to set DRM parameters associated with a
> cgroup.  It is intended to be called at system initialization time (e.g., from
> a sysv-init script or systemd service) to configure graphics policy and
> resource management according to the wishes of the system integrator.
>
> Signed-off-by: Matt Roper 
> ---
>  configure.ac  |  1 +
>  tests/Makefile.am |  2 +-
>  tests/drm_set_cgrp_param/Makefile.am  | 18 ++
>  tests/drm_set_cgrp_param/drm_set_cgrp_param.c | 80 
> +++
>  4 files changed, 100 insertions(+), 1 deletion(-)
>  create mode 100644 tests/drm_set_cgrp_param/Makefile.am
>  create mode 100644 tests/drm_set_cgrp_param/drm_set_cgrp_param.c
>
Hi Matt,

Adding a small test/demo in libdrm sounds good. Although I think we
need some IGT tests, if you haven't prepped them already.
After all we need to ensure the kernel correctly validates and errors
when we feed it the wrong info through the IOCTL.

There's a small suggestions about the IOCTL design.
s/reserved/flags/ to make future extension are possible - as mentioned in [2]

Thanks
Emil

[2] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/ioctl/botching-up-ioctls.txt?h=v4.15-rc9#n64
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Re: 'buf' pointer in ttm_bo_vm_access_kmap()

[Felix Kuehling]

On 2018-01-26 09:40 AM, Tom St Denis wrote:
> On 26/01/18 09:38 AM, Christian König wrote:
>> Am 26.01.2018 um 15:31 schrieb Tom St Denis:
>>> Hi all,
>>>
>>> In the function ttm_bo_vm_access_kmap() it doesn't seem to me like
>>> the 'buf' pointer is incremented.  That seems like a bug no?
>>
>> Yeah, looks suspicious to me as well. But TTM questions should CC the
>> dri list as well.
>>
>> And in this particular case I think Felix was the author that function.
>>
>
> Hi Christian,
>
> I'm authoring a set of mostly NFC patches for TTM and already crafted
> a fix for this in the process.
>
> If the fix (which is literally "buf += bytes" at the end of the while
> loop) doesn't get NAK'ed I'll submit it as part of my cleanup patches.

Thanks for catching that. The fix sounds reasonable. Since buf is a void
pointer, you may need to cast it to (uint8_t *) or (char *) for sane
pointer arithmetics.

I'll update KFDTest to include ptace system memory accesses across page
boundaries. I did a similar thing for the VRAM test crossing
non-contiguous VRAM boundaries.

Regards,
  Felix

>
> Cheers,
> Tom

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Re: [PATCH libdrm 2/7] tests/amdgpu: add parentheses to make operation priority explicit

[Eric Engestrom]

On Friday, 2018-01-26 08:26:15 -0500, Andrey Grodzovsky wrote:
> 
> 
> On 01/26/2018 06:32 AM, Eric Engestrom wrote:
> > While at it, align with the other half on the next line.
> > 
> > Cc: Andrey Grodzovsky 
> > Signed-off-by: Eric Engestrom 
> > ---
> > Andrey, is that `0xfffc` right? It looks weird to me to be
> > discarding the bottom two bits.
> 
> That correct  according to the PM4 packet spec,
> (e.g. 
> http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/10/si_programming_guide_v2.pdf
> 2.9.4 WRITE_DATA, DST_ADDR_LO field, when destination is memory the bits
> range is [31:2] for 32 bit addresses
> and [31:3] for 64 bit addresses) Those 2 bits are always 0 in this case
> anyway.

Thanks for the confirmation :)

> 
> Thanks,
> Andrey
> 
> > ---
> >   tests/amdgpu/basic_tests.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
> > index 0f75e8961bb7c0c9ecd9..6ee0aa3b044aeffc6adf 100644
> > --- a/tests/amdgpu/basic_tests.c
> > +++ b/tests/amdgpu/basic_tests.c
> > @@ -1608,7 +1608,7 @@ static void amdgpu_sync_dependency_test(void)
> > j = i;
> > ptr[i++] = PACKET3(PACKET3_WRITE_DATA, 3);
> > ptr[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM;
> > -   ptr[i++] = 0xfffc & ib_result_mc_address + DATA_OFFSET * 4;
> > +   ptr[i++] =  0xfffc & (ib_result_mc_address + DATA_OFFSET * 
> > 4);
> > ptr[i++] = (0x & (ib_result_mc_address + DATA_OFFSET * 
> > 4)) >> 32;
> > ptr[i++] = 99;
> 
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[PATCH libdrm 09/13] always define HAVE_FREEDRENO_KGSL

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 2 ++
 freedreno/freedreno_bo.c | 2 +-
 freedreno/freedreno_device.c | 2 +-
 meson.build  | 8 +++-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/configure.ac b/configure.ac
index e09eded5884da7891862..a745d694a3bb2e8b9761 100644
--- a/configure.ac
+++ b/configure.ac
@@ -399,6 +399,8 @@ fi
 AM_CONDITIONAL(HAVE_FREEDRENO_KGSL, [test "x$FREEDRENO_KGSL" = xyes])
 if test "x$FREEDRENO_KGSL" = xyes; then
AC_DEFINE(HAVE_FREEDRENO_KGSL, 1, [Have freedreno support for KGSL 
kernel interface])
+else
+   AC_DEFINE(HAVE_FREEDRENO_KGSL, 0)
 fi
 
 AM_CONDITIONAL(HAVE_RADEON, [test "x$RADEON" = xyes])
diff --git a/freedreno/freedreno_bo.c b/freedreno/freedreno_bo.c
index 7f8ea59c2a2433404f62..df35c36a2dacdd2c6fdc 100644
--- a/freedreno/freedreno_bo.c
+++ b/freedreno/freedreno_bo.c
@@ -326,7 +326,7 @@ void fd_bo_cpu_fini(struct fd_bo *bo)
bo->funcs->cpu_fini(bo);
 }
 
-#ifndef HAVE_FREEDRENO_KGSL
+#if !HAVE_FREEDRENO_KGSL
 struct fd_bo * fd_bo_from_fbdev(struct fd_pipe *pipe, int fbfd, uint32_t size)
 {
 return NULL;
diff --git a/freedreno/freedreno_device.c b/freedreno/freedreno_device.c
index 12b95fd0223e39b6b7f9..a0334bf4764e009f6c32 100644
--- a/freedreno/freedreno_device.c
+++ b/freedreno/freedreno_device.c
@@ -65,7 +65,7 @@ struct fd_device * fd_device_new(int fd)
 
dev = msm_device_new(fd);
dev->version = version->version_minor;
-#ifdef HAVE_FREEDRENO_KGSL
+#if HAVE_FREEDRENO_KGSL
} else if (!strcmp(version->name, "kgsl")) {
DEBUG_MSG("kgsl DRM device");
dev = kgsl_device_new(fd);
diff --git a/meson.build b/meson.build
index 6ed080ece9c3dff1a1e1..b7dbe07949b3957e2523 100644
--- a/meson.build
+++ b/meson.build
@@ -255,14 +255,12 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 
'VMWGFX'],
  [with_nouveau, 'NOUVEAU'],
  [with_exynos, 'EXYNOS'],
  [with_vc4, 'VC4'],
+ [with_freedreno_kgsl, 'FREEDRENO_KGSL'],
  [with_radeon, 'RADEON']]
   config.set10('HAVE_@0@'.format(t[1]), t[0])
 endforeach
-if with_freedreno_kgsl
-  if not with_freedreno
-error('cannot enable freedreno-kgsl without freedreno support')
-  endif
-  config.set10('HAVE_FREEDRENO_KGSL', true)
+if with_freedreno_kgsl and not with_freedreno
+  error('cannot enable freedreno-kgsl without freedreno support')
 endif
 if dep_cairo.found()
   config.set10('HAVE_CAIRO', true)
-- 
Cheers,
  Eric

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[PATCH libdrm 11/13] always define HAVE_VALGRIND

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac   | 2 ++
 freedreno/freedreno_priv.h | 2 +-
 intel/intel_bufmgr_gem.c   | 4 ++--
 meson.build| 5 +
 4 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/configure.ac b/configure.ac
index 4ebebb4feb8073771ef9..321ab2c0fb4f18dad002 100644
--- a/configure.ac
+++ b/configure.ac
@@ -513,6 +513,8 @@ if test "x$VALGRIND" = "xyes"; then
AC_MSG_ERROR([Valgrind support required but not present])
fi
AC_DEFINE([HAVE_VALGRIND], 1, [Use valgrind intrinsics to suppress 
false warnings])
+else
+   AC_DEFINE([HAVE_VALGRIND], 0)
 fi
 
 AC_MSG_RESULT([$VALGRIND])
diff --git a/freedreno/freedreno_priv.h b/freedreno/freedreno_priv.h
index 273074727375c7d6ff01..3be5767d2ebd2566734f 100644
--- a/freedreno/freedreno_priv.h
+++ b/freedreno/freedreno_priv.h
@@ -200,7 +200,7 @@ offset_bytes(void *end, void *start)
return ((char *)end) - ((char *)start);
 }
 
-#ifdef HAVE_VALGRIND
+#if HAVE_VALGRIND
 #  include 
 
 /*
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 71f140f54dd0e6116261..386da30e230627242be2 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -66,7 +66,7 @@
 #include "i915_drm.h"
 #include "uthash.h"
 
-#ifdef HAVE_VALGRIND
+#if HAVE_VALGRIND
 #include 
 #include 
 #define VG(x) x
@@ -1629,7 +1629,7 @@ int
 drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo)
 {
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
-#ifdef HAVE_VALGRIND
+#if HAVE_VALGRIND
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
 #endif
int ret;
diff --git a/meson.build b/meson.build
index 31a7990bb3ee140c4de1..19413632464da9816ca1 100644
--- a/meson.build
+++ b/meson.build
@@ -257,16 +257,13 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 
'VMWGFX'],
  [with_vc4, 'VC4'],
  [with_freedreno_kgsl, 'FREEDRENO_KGSL'],
  [dep_cairo.found(), 'CAIRO'],
+ [dep_valgrind.found(), 'VALGRIND'],
  [with_radeon, 'RADEON']]
   config.set10('HAVE_@0@'.format(t[1]), t[0])
 endforeach
 if with_freedreno_kgsl and not with_freedreno
   error('cannot enable freedreno-kgsl without freedreno support')
 endif
-if dep_valgrind.found()
-  config.set10('HAVE_VALGRIND', true)
-endif
-
 config.set10('_GNU_SOURCE', true)
 config_file = configure_file(
   configuration : config,
-- 
Cheers,
  Eric

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[PATCH libdrm 06/13] meson, configure: remove unused HAVE_FREEDRENO define

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 3 ---
 meson.build  | 2 +-
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/configure.ac b/configure.ac
index 8b3cd7cccb21989cc548..09dc359a11d0855b9d93 100644
--- a/configure.ac
+++ b/configure.ac
@@ -382,9 +382,6 @@ if test "x$EXYNOS" = xyes; then
 fi
 
 AM_CONDITIONAL(HAVE_FREEDRENO, [test "x$FREEDRENO" = xyes])
-if test "x$FREEDRENO" = xyes; then
-   AC_DEFINE(HAVE_FREEDRENO, 1, [Have freedreno support])
-fi
 
 if test "x$FREEDRENO_KGSL" = xyes; then
if test "x$FREEDRENO" != xyes; then
diff --git a/meson.build b/meson.build
index 94eb1c6a7ba9c0506493..b2027df7e2e2ccc8795c 100644
--- a/meson.build
+++ b/meson.build
@@ -253,7 +253,7 @@ endif
 
 foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 'VMWGFX'],
  [with_nouveau, 'NOUVEAU'],
- [with_exynos, 'EXYNOS'], [with_freedreno, 'FREEDRENO'],
+ [with_exynos, 'EXYNOS'],
  [with_vc4, 'VC4'],
  [with_etnaviv, 'ETNAVIV'], [with_radeon, 'RADEON']]
   if t[0]
-- 
Cheers,
  Eric

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[PATCH libdrm 13/13] xf86atomic: fix -Wundef error

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 xf86atomic.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xf86atomic.h b/xf86atomic.h
index 922b37da62517bc1ee2f..70e918663c3b015f2881 100644
--- a/xf86atomic.h
+++ b/xf86atomic.h
@@ -101,7 +101,7 @@ typedef struct { LIBDRM_ATOMIC_TYPE atomic; } atomic_t;
 
 #endif
 
-#if ! HAS_ATOMIC_OPS
+#if !defined(HAS_ATOMIC_OPS)
 #error libdrm requires atomic operations, please define them for your 
CPU/compiler.
 #endif
 
-- 
Cheers,
  Eric

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[PATCH libdrm 10/13] always define HAVE_CAIRO

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 2 ++
 meson.build  | 4 +---
 tests/util/pattern.c | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/configure.ac b/configure.ac
index a745d694a3bb2e8b9761..4ebebb4feb8073771ef9 100644
--- a/configure.ac
+++ b/configure.ac
@@ -470,6 +470,8 @@ if test "x$CAIRO" = xyes; then
AC_MSG_ERROR([Cairo support required but not present])
fi
AC_DEFINE(HAVE_CAIRO, 1, [Have Cairo support])
+else
+   AC_DEFINE(HAVE_CAIRO, 0)
 fi
 AC_MSG_RESULT([$CAIRO])
 AM_CONDITIONAL(HAVE_CAIRO, [test "x$CAIRO" = xyes])
diff --git a/meson.build b/meson.build
index b7dbe07949b3957e2523..31a7990bb3ee140c4de1 100644
--- a/meson.build
+++ b/meson.build
@@ -256,15 +256,13 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 
'VMWGFX'],
  [with_exynos, 'EXYNOS'],
  [with_vc4, 'VC4'],
  [with_freedreno_kgsl, 'FREEDRENO_KGSL'],
+ [dep_cairo.found(), 'CAIRO'],
  [with_radeon, 'RADEON']]
   config.set10('HAVE_@0@'.format(t[1]), t[0])
 endforeach
 if with_freedreno_kgsl and not with_freedreno
   error('cannot enable freedreno-kgsl without freedreno support')
 endif
-if dep_cairo.found()
-  config.set10('HAVE_CAIRO', true)
-endif
 if dep_valgrind.found()
   config.set10('HAVE_VALGRIND', true)
 endif
diff --git a/tests/util/pattern.c b/tests/util/pattern.c
index 2366b00613a7f1c63cde..75a458d4b7ce78204991 100644
--- a/tests/util/pattern.c
+++ b/tests/util/pattern.c
@@ -34,7 +34,7 @@
 
 #include 
 
-#ifdef HAVE_CAIRO
+#if HAVE_CAIRO
 #include 
 #include 
 #endif
@@ -546,7 +546,7 @@ static void fill_smpte(const struct util_format_info *info, 
void *planes[3],
 static void make_pwetty(void *data, unsigned int width, unsigned int height,
unsigned int stride, uint32_t format)
 {
-#ifdef HAVE_CAIRO
+#if HAVE_CAIRO
cairo_surface_t *surface;
cairo_t *cr;
cairo_format_t cairo_format;
-- 
Cheers,
  Eric

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[PATCH libdrm 12/13] meson: sort HAVE_* defines

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 meson.build | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/meson.build b/meson.build
index 19413632464da9816ca1..1342a5b3115abc26ce05 100644
--- a/meson.build
+++ b/meson.build
@@ -251,14 +251,17 @@ if cc.compiles('''int foo_hidden(void) 
__attribute__((visibility(("hidden";'
   config.set10('HAVE_VISIBILITY', true)
 endif
 
-foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 'VMWGFX'],
- [with_nouveau, 'NOUVEAU'],
+foreach t : [
  [with_exynos, 'EXYNOS'],
- [with_vc4, 'VC4'],
  [with_freedreno_kgsl, 'FREEDRENO_KGSL'],
+ [with_intel, 'INTEL'],
+ [with_nouveau, 'NOUVEAU'],
+ [with_radeon, 'RADEON'],
+ [with_vc4, 'VC4'],
+ [with_vmwgfx, 'VMWGFX'],
  [dep_cairo.found(), 'CAIRO'],
  [dep_valgrind.found(), 'VALGRIND'],
- [with_radeon, 'RADEON']]
+]
   config.set10('HAVE_@0@'.format(t[1]), t[0])
 endforeach
 if with_freedreno_kgsl and not with_freedreno
-- 
Cheers,
  Eric

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[PATCH libdrm 05/13] meson, configure: remove unused HAVE_TEGRA define

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 3 ---
 meson.build  | 2 +-
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/configure.ac b/configure.ac
index 523ab4fc983c9c7ab737..8b3cd7cccb21989cc548 100644
--- a/configure.ac
+++ b/configure.ac
@@ -431,9 +431,6 @@ if test "x$AMDGPU" = xyes; then
 fi
 
 AM_CONDITIONAL(HAVE_TEGRA, [test "x$TEGRA" = xyes])
-if test "x$TEGRA" = xyes; then
-   AC_DEFINE(HAVE_TEGRA, 1, [Have Tegra support])
-fi
 
 AM_CONDITIONAL(HAVE_VC4, [test "x$VC4" = xyes])
 if test "x$VC4" = xyes; then
diff --git a/meson.build b/meson.build
index f81670aa10ce3981e3d3..94eb1c6a7ba9c0506493 100644
--- a/meson.build
+++ b/meson.build
@@ -254,7 +254,7 @@ endif
 foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 'VMWGFX'],
  [with_nouveau, 'NOUVEAU'],
  [with_exynos, 'EXYNOS'], [with_freedreno, 'FREEDRENO'],
- [with_tegra, 'TEGRA'], [with_vc4, 'VC4'],
+ [with_vc4, 'VC4'],
  [with_etnaviv, 'ETNAVIV'], [with_radeon, 'RADEON']]
   if t[0]
 config.set10('HAVE_@0@'.format(t[1]), true)
-- 
Cheers,
  Eric

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[PATCH libdrm 08/13] meson, configure: always define HAVE_{INTE, VMWGFX, NOUVEAU, EXYNOS, VC4, RADEON}

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac   | 14 ++
 libkms/linux.c | 10 +-
 meson.build|  4 +---
 3 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/configure.ac b/configure.ac
index a0449404eaddfd347d60..e09eded5884da7891862 100644
--- a/configure.ac
+++ b/configure.ac
@@ -362,16 +362,22 @@ AM_CONDITIONAL(HAVE_LIBKMS, [test "x$LIBKMS" = xyes])
 AM_CONDITIONAL(HAVE_INTEL, [test "x$INTEL" = xyes])
 if test "x$INTEL" = xyes; then
AC_DEFINE(HAVE_INTEL, 1, [Have intel support])
+else
+   AC_DEFINE(HAVE_INTEL, 0)
 fi
 
 AM_CONDITIONAL(HAVE_VMWGFX, [test "x$VMWGFX" = xyes])
 if test "x$VMWGFX" = xyes; then
AC_DEFINE(HAVE_VMWGFX, 1, [Have vmwgfx kernel headers])
+else
+   AC_DEFINE(HAVE_VMWGFX, 0)
 fi
 
 AM_CONDITIONAL(HAVE_NOUVEAU, [test "x$NOUVEAU" = xyes])
 if test "x$NOUVEAU" = xyes; then
AC_DEFINE(HAVE_NOUVEAU, 1, [Have nouveau (nvidia) support])
+else
+   AC_DEFINE(HAVE_NOUVEAU, 0)
 fi
 
 AM_CONDITIONAL(HAVE_OMAP, [test "x$OMAP" = xyes])
@@ -379,6 +385,8 @@ AM_CONDITIONAL(HAVE_OMAP, [test "x$OMAP" = xyes])
 AM_CONDITIONAL(HAVE_EXYNOS, [test "x$EXYNOS" = xyes])
 if test "x$EXYNOS" = xyes; then
AC_DEFINE(HAVE_EXYNOS, 1, [Have EXYNOS support])
+else
+   AC_DEFINE(HAVE_EXYNOS, 0)
 fi
 
 AM_CONDITIONAL(HAVE_FREEDRENO, [test "x$FREEDRENO" = xyes])
@@ -396,6 +404,8 @@ fi
 AM_CONDITIONAL(HAVE_RADEON, [test "x$RADEON" = xyes])
 if test "x$RADEON" = xyes; then
AC_DEFINE(HAVE_RADEON, 1, [Have radeon support])
+else
+   AC_DEFINE(HAVE_RADEON, 0)
 fi
 
 if test "x$AMDGPU" != xno; then
@@ -425,6 +435,8 @@ if test "x$AMDGPU" = xyes; then
if test "x$have_cunit" = "xno"; then
AC_MSG_WARN([Could not find cunit library. Disabling amdgpu 
tests])
fi
+else
+   AC_DEFINE(HAVE_AMDGPU, 0)
 fi
 
 AM_CONDITIONAL(HAVE_TEGRA, [test "x$TEGRA" = xyes])
@@ -432,6 +444,8 @@ AM_CONDITIONAL(HAVE_TEGRA, [test "x$TEGRA" = xyes])
 AM_CONDITIONAL(HAVE_VC4, [test "x$VC4" = xyes])
 if test "x$VC4" = xyes; then
AC_DEFINE(HAVE_VC4, 1, [Have VC4 support])
+else
+   AC_DEFINE(HAVE_VC4, 0)
 fi
 
 AM_CONDITIONAL(HAVE_ETNAVIV, [test "x$ETNAVIV" = xyes])
diff --git a/libkms/linux.c b/libkms/linux.c
index 0b50777efbc8ae3ba66d..1431eb1078307ecebe54 100644
--- a/libkms/linux.c
+++ b/libkms/linux.c
@@ -110,27 +110,27 @@ linux_from_sysfs(int fd, struct kms_driver **out)
if (ret)
return ret;
 
-#ifdef HAVE_INTEL
+#if HAVE_INTEL
if (!strcmp(name, "intel"))
ret = intel_create(fd, out);
else
 #endif
-#ifdef HAVE_VMWGFX
+#if HAVE_VMWGFX
if (!strcmp(name, "vmwgfx"))
ret = vmwgfx_create(fd, out);
else
 #endif
-#ifdef HAVE_NOUVEAU
+#if HAVE_NOUVEAU
if (!strcmp(name, "nouveau"))
ret = nouveau_create(fd, out);
else
 #endif
-#ifdef HAVE_RADEON
+#if HAVE_RADEON
if (!strcmp(name, "radeon"))
ret = radeon_create(fd, out);
else
 #endif
-#ifdef HAVE_EXYNOS
+#if HAVE_EXYNOS
if (!strcmp(name, "exynos"))
ret = exynos_create(fd, out);
else
diff --git a/meson.build b/meson.build
index 15a9f523a498c137e369..6ed080ece9c3dff1a1e1 100644
--- a/meson.build
+++ b/meson.build
@@ -256,9 +256,7 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 'VMWGFX'],
  [with_exynos, 'EXYNOS'],
  [with_vc4, 'VC4'],
  [with_radeon, 'RADEON']]
-  if t[0]
-config.set10('HAVE_@0@'.format(t[1]), true)
-  endif
+  config.set10('HAVE_@0@'.format(t[1]), t[0])
 endforeach
 if with_freedreno_kgsl
   if not with_freedreno
-- 
Cheers,
  Eric

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[PATCH libdrm 07/13] meson, configure: remove unused HAVE_ETNAVIV define

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 3 ---
 meson.build  | 2 +-
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/configure.ac b/configure.ac
index 09dc359a11d0855b9d93..a0449404eaddfd347d60 100644
--- a/configure.ac
+++ b/configure.ac
@@ -435,9 +435,6 @@ if test "x$VC4" = xyes; then
 fi
 
 AM_CONDITIONAL(HAVE_ETNAVIV, [test "x$ETNAVIV" = xyes])
-if test "x$ETNAVIV" = xyes; then
-   AC_DEFINE(HAVE_ETNAVIV, 1, [Have etnaviv support])
-fi
 
 AM_CONDITIONAL(HAVE_INSTALL_TESTS, [test "x$INSTALL_TESTS" = xyes])
 
diff --git a/meson.build b/meson.build
index b2027df7e2e2ccc8795c..15a9f523a498c137e369 100644
--- a/meson.build
+++ b/meson.build
@@ -255,7 +255,7 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 'VMWGFX'],
  [with_nouveau, 'NOUVEAU'],
  [with_exynos, 'EXYNOS'],
  [with_vc4, 'VC4'],
- [with_etnaviv, 'ETNAVIV'], [with_radeon, 'RADEON']]
+ [with_radeon, 'RADEON']]
   if t[0]
 config.set10('HAVE_@0@'.format(t[1]), true)
   endif
-- 
Cheers,
  Eric

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[PATCH libdrm 02/13] configure: remove unused HAVE_CUNIT define

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 2 --
 1 file changed, 2 deletions(-)

diff --git a/configure.ac b/configure.ac
index 031e849bd0fc97d8762b..53432a2fbcdb72c8a767 100644
--- a/configure.ac
+++ b/configure.ac
@@ -428,8 +428,6 @@ AM_CONDITIONAL(HAVE_AMDGPU, [test "x$AMDGPU" = xyes])
 if test "x$AMDGPU" = xyes; then
AC_DEFINE(HAVE_AMDGPU, 1, [Have amdgpu support])
 
-   AC_DEFINE(HAVE_CUNIT, [test "x$have_cunit" != "xno"], [Enable CUNIT 
Have amdgpu support])
-
if test "x$have_cunit" = "xno"; then
AC_MSG_WARN([Could not find cunit library. Disabling amdgpu 
tests])
fi
-- 
Cheers,
  Eric

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[PATCH libdrm 03/13] configure: remove unused HAVE_INSTALL_TESTS define

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/configure.ac b/configure.ac
index 53432a2fbcdb72c8a767..97613ce257297a77a245 100644
--- a/configure.ac
+++ b/configure.ac
@@ -449,9 +449,6 @@ if test "x$ETNAVIV" = xyes; then
 fi
 
 AM_CONDITIONAL(HAVE_INSTALL_TESTS, [test "x$INSTALL_TESTS" = xyes])
-if test "x$INSTALL_TESTS" = xyes; then
-   AC_DEFINE(HAVE_INSTALL_TESTS, 1, [Install test programs])
-fi
 
 AC_ARG_ENABLE([cairo-tests],
   [AS_HELP_STRING([--enable-cairo-tests],
-- 
Cheers,
  Eric

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[PATCH libdrm 04/13] meson,configure: remove unused HAVE_OMAP define

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 configure.ac | 3 ---
 meson.build  | 2 +-
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/configure.ac b/configure.ac
index 97613ce257297a77a245..523ab4fc983c9c7ab737 100644
--- a/configure.ac
+++ b/configure.ac
@@ -375,9 +375,6 @@ if test "x$NOUVEAU" = xyes; then
 fi
 
 AM_CONDITIONAL(HAVE_OMAP, [test "x$OMAP" = xyes])
-if test "x$OMAP" = xyes; then
-   AC_DEFINE(HAVE_OMAP, 1, [Have OMAP support])
-fi
 
 AM_CONDITIONAL(HAVE_EXYNOS, [test "x$EXYNOS" = xyes])
 if test "x$EXYNOS" = xyes; then
diff --git a/meson.build b/meson.build
index 73058e7d772b7744a359..f81670aa10ce3981e3d3 100644
--- a/meson.build
+++ b/meson.build
@@ -252,7 +252,7 @@ if cc.compiles('''int foo_hidden(void) 
__attribute__((visibility(("hidden";'
 endif
 
 foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 'VMWGFX'],
- [with_nouveau, 'NOUVEAU'], [with_omap, 'OMAP'],
+ [with_nouveau, 'NOUVEAU'],
  [with_exynos, 'EXYNOS'], [with_freedreno, 'FREEDRENO'],
  [with_tegra, 'TEGRA'], [with_vc4, 'VC4'],
  [with_etnaviv, 'ETNAVIV'], [with_radeon, 'RADEON']]
-- 
Cheers,
  Eric

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[PATCH libdrm 01/13] meson: add missing HAVE_RADEON

[Eric Engestrom]

Signed-off-by: Eric Engestrom 
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index 1bccdb2c03d7846e7bfb..73058e7d772b7744a359 100644
--- a/meson.build
+++ b/meson.build
@@ -255,7 +255,7 @@ foreach t : [[with_intel, 'INTEL'], [with_vmwgfx, 'VMWGFX'],
  [with_nouveau, 'NOUVEAU'], [with_omap, 'OMAP'],
  [with_exynos, 'EXYNOS'], [with_freedreno, 'FREEDRENO'],
  [with_tegra, 'TEGRA'], [with_vc4, 'VC4'],
- [with_etnaviv, 'ETNAVIV']]
+ [with_etnaviv, 'ETNAVIV'], [with_radeon, 'RADEON']]
   if t[0]
 config.set10('HAVE_@0@'.format(t[1]), true)
   endif
-- 
Cheers,
  Eric

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Re: [PATCH v3 1/6] drm: Add drm_mode_config->normalize_zpos boolean

[Ville Syrjälä]

On Fri, Jan 26, 2018 at 11:29:03AM +0200, Peter Ujfalusi wrote:
> Ville,
> 
> On 2018-01-25 16:51, Ville Syrjälä wrote:
> > On Thu, Jan 25, 2018 at 04:40:48PM +0200, Ville Syrjälä wrote:
> >> On Thu, Jan 25, 2018 at 04:26:25PM +0200, Peter Ujfalusi wrote:
> >>> Instead of drivers duplicating the drm_atomic_helper_check() code to be
> >>> able to normalize the zpos they can use the normalize_zpos flag to let the
> >>> drm core to do it.
> >>>
> >>> Signed-off-by: Peter Ujfalusi 
> >>> ---
> >>>  drivers/gpu/drm/drm_atomic_helper.c | 11 +++
> >>>  include/drm/drm_mode_config.h   |  8 
> >>>  include/drm/drm_plane.h |  4 ++--
> >>>  3 files changed, 21 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
> >>> b/drivers/gpu/drm/drm_atomic_helper.c
> >>> index ab4032167094..0f6a4949e6dc 100644
> >>> --- a/drivers/gpu/drm/drm_atomic_helper.c
> >>> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> >>> @@ -873,6 +873,11 @@ EXPORT_SYMBOL(drm_atomic_helper_check_planes);
> >>>   * functions depend upon an updated adjusted_mode.clock to e.g. properly 
> >>> compute
> >>>   * watermarks.
> >>>   *
> >>> + * Note that zpos normalization will add all enable planes to the state 
> >>> which
> >>> + * might not desired for some drivers.
> >>> + * For example enable/disable of a cursor plane which have fixed zpos 
> >>> value
> >>> + * would trigger all other enabled planes to be forced to the state 
> >>> change.
> >>> + *
> >>>   * RETURNS:
> >>>   * Zero for success or -errno
> >>>   */
> >>> @@ -885,6 +890,12 @@ int drm_atomic_helper_check(struct drm_device *dev,
> >>>   if (ret)
> >>>   return ret;
> >>>  
> >>> + if (dev->mode_config.normalize_zpos) {
> >>> + ret = drm_atomic_normalize_zpos(dev, state);
> >>> + if (ret)
> >>> + return ret;
> >>> + }
> >>
> >> I think we originally had this in drm_atomic_helper_check_planes().
> >> Looking through some of the drivers it looks like we could maybe
> >> kill a few more LOC by putting it there.
> > 
> > Actually, I guess it's fine as is. I though the "async" flip thing I
> > saw in some of the drivers wasn't in the atomic helper. But it is
> > there.
> > 
> > That actually makes me slightly worried whether it's safe to just
> > blindly replace the hand rolled stuff w/o "async" with
> > drm_atomic_helper_check(). The commit messages should perhaps
> > justify that somehow.
> 
> I only changed 'hand rolled' stuff in the drivers where the local
> .atomic_check implementation is the same as the
> drm_atomic_helper_check() or in case of rcar-du, where I removed the
> drm_atomic_helper_check() part from the custom callback and let it call
> the function itself.
> 
> I'm not sure if I understand the problem. This series does the following
> in essence:
> 
> drm_atomic_helper_check(...)
> {
>   /* does A */
> }
> 
> driver_hand_rolled_atomic_helper_check(...)
> {
>   /* does A */
> }
> 
> - .atomic_check = driver_hand_rolled_atomic_helper_check,
> + .atomic_check = drm_atomic_helper_check,
> 
> I'm most likely missing something, but not sure what.

The 

if (state->legacy_cursor_update)
state->async_update = !drm_atomic_helper_async_check(drm, state);

part.

The helper has it, as does tegra, but sti does not. Would be nice to
have something in the comment message documenting why it's safe to add
it to sti and other drivers that didn't already have it.

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH] drm/i915: Fix DSI panels with v1 MIPI sequences without a DEASSERT sequence v2

[Ville Syrjälä]

On Fri, Jan 26, 2018 at 08:52:07AM +0100, Hans de Goede wrote:
> So far models of the Dell Venue 8 Pro, with a panel with MIPI panel
> index = 3, one of which has been kindly provided to me by Jan Brummer,
> where not working with the i915 driver, giving a black screen on the
> first modeset.
> 
> The problem with at least these Dells is that their VBT defines a MIPI
> ASSERT sequence, but not a DEASSERT sequence. Instead they DEASSERT the
> reset in their INIT_OTP sequence, but the deassert must be done before
> calling intel_dsi_device_ready(), so that is too late.
> 
> Simply doing the INIT_OTP sequence earlier is not enough to fix this,
> because the INIT_OTP sequence also sends various MIPI packets to the
> panel, which can only happen after calling intel_dsi_device_ready().
> 
> This commit fixes this by splitting the INIT_OTP sequence into everything
> before the first DSI packet and everything else, including the first DSI
> packet. The first part (everything before the first DSI packet) is then
> used as deassert sequence.
> 
> Changed in v2:
> -Split the init OTP sequence into a deassert reset and the actual init
>  OTP sequence, instead of calling it earlier and then having the first
>  mipi_exec_send_packet() call call intel_dsi_device_ready().
> 
> BugLink: https://bugs.freedesktop.org/show_bug.cgi?id=82880
> Related: https://bugs.freedesktop.org/show_bug.cgi?id=101205
> Cc: Jan-Michael Brummer 
> Reported-by: Jan-Michael Brummer 
> Tested-by: Hans de Goede 
> Signed-off-by: Hans de Goede 
> ---
>  drivers/gpu/drm/i915/intel_dsi.c |  1 +
>  drivers/gpu/drm/i915/intel_dsi.h |  2 +
>  drivers/gpu/drm/i915/intel_dsi_vbt.c | 82 
> 
>  3 files changed, 85 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c 
> b/drivers/gpu/drm/i915/intel_dsi.c
> index f67d321376e4..b59ef34d25f6 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -1642,6 +1642,7 @@ static void intel_dsi_encoder_destroy(struct 
> drm_encoder *encoder)
>   if (intel_dsi->gpio_panel)
>   gpiod_put(intel_dsi->gpio_panel);
>  
> + kfree(intel_dsi->deassert_seq);
>   intel_encoder_destroy(encoder);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h 
> b/drivers/gpu/drm/i915/intel_dsi.h
> index 7afeb9580f41..5895588144ad 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -46,6 +46,8 @@ struct intel_dsi {
>  
>   struct intel_connector *attached_connector;
>  
> + u8 *deassert_seq;
> +

Should this perhaps live next to the other DSI VBT stuff? I think that
might make more sense. And should probably also move the
intel_dsi_fixup_dsi_sequences() call to parse_mipi_sequence() as well
since we're actually modifying dev_priv->vbt.data. Doing that from the
encoder init doesn't really feel right to me.

Jani, any thoughts?

>   /* bit mask of ports being driven */
>   u16 ports;
>  
> diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c 
> b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> index 91c07b0c8db9..84664f79cbef 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
> @@ -499,6 +499,86 @@ int intel_dsi_vbt_get_modes(struct intel_dsi *intel_dsi)
>   return 1;
>  }
>  
> +/*
> + * Get len of pre-fixed deassert from init OTP, skip all delay + gpio 
> operands
> + * and stop at the first DSI packet op.
> + */
> +static int intel_vbi_get_deassert_len(const u8 *data, int total)
> +{
> + int index, len;

if (WARN_ON(seq_version != 1))
return 0;

or something might be nice here to document the requirements and
to deter anyone from using this with other seq versions.

> +
> + /* index = 1 to skip sequence byte */
> + for (index = 1; index < total; index += len) {
> + switch (data[index]) {
> + case MIPI_SEQ_ELEM_SEND_PKT:
> + return index;

What if this is the first element?

Hmm. It does seem to work out in the end. We do end up with
an empty deassert sequence, but I guess hat's fine.

> + case MIPI_SEQ_ELEM_DELAY:
> + len = 5; /* 1 byte for operand + uint32 */
> + break;
> + case MIPI_SEQ_ELEM_GPIO:
> + len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
> + break;
> + default:
> + return 0;
> + }
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
> + * The deassert must be done before calling intel_dsi_device_ready, so for
> + * these devices we split the init OTP sequence into a deassert sequence and
> + * the actual init OTP part.
> + */
> +static void intel_dsi_fixup_dsi_sequences(struct intel_dsi *intel_dsi)
> +{
> + struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
> + int init_otp_index, len;
> + u8 *init_

Re: [Nouveau] [RFC v2 1/4] drm/nouveau: Add support for basic clockgating on Kepler1

[Lyude Paul]

On Fri, 2018-01-26 at 12:34 +0100, Karol Herbst wrote:
> On Fri, Jan 26, 2018 at 4:35 AM, Lyude Paul  wrote:
> > This adds support for enabling automatic clockgating on nvidia GPUs for
> > Kepler1. While this is not technically a clockgating level, it does
> > enable clockgating using the clockgating values initially set by the
> > vbios (which should be safe to use).
> > 
> > This introduces two therm helpers for controlling basic clockgating:
> > nvkm_therm_clkgate_enable() - enables clockgating through
> > CG_CTRL, done after initializing the GPU fully
> > nvkm_therm_clkgate_fini() - prepares clockgating for suspend or
> > driver unload
> > 
> > As well, we add the nouveau kernel config parameter NvPmEnableGating,
> > which can be toggled on or off in order to enable/disable clockgating.
> > Since we've only had limited testing on this thus far, we disable this
> > by default.
> > 
> > A lot of this code was originally going to be based off of fermi;
> > however it turns out that while Fermi's the first line of GPUs that
> > introduced this kind of power saving, Fermi requires more fine tuned
> > control of the CG_CTRL registers from the driver while reclocking that
> > we don't entirely understand yet.
> > 
> > For the simple parts we will be sharing with Fermi for certain however,
> > we at least add those into a new subdev/therm/gf100.h header.
> > 
> > Signed-off-by: Lyude Paul 
> > ---
> >  .../gpu/drm/nouveau/include/nvkm/subdev/therm.h|   5 +
> >  drivers/gpu/drm/nouveau/nvkm/engine/device/base.c  |  17 +--
> >  drivers/gpu/drm/nouveau/nvkm/subdev/therm/Kbuild   |   1 +
> >  drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c   |  60 +++--
> >  drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.h  |  35 ++
> >  drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.c  |   8 +-
> >  drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c  | 135
> > +
> >  drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.h  |  48 
> >  drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h   |  15 ++-
> >  9 files changed, 303 insertions(+), 21 deletions(-)
> >  create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.h
> >  create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c
> >  create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.h
> > 
> > diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
> > b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
> > index b1ac47eb786e..240b19bb4667 100644
> > --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
> > +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
> > @@ -85,17 +85,22 @@ struct nvkm_therm {
> > 
> > int (*attr_get)(struct nvkm_therm *, enum nvkm_therm_attr_type);
> > int (*attr_set)(struct nvkm_therm *, enum nvkm_therm_attr_type,
> > int);
> > +
> > +   bool clkgating_enabled;
> >  };
> > 
> >  int nvkm_therm_temp_get(struct nvkm_therm *);
> >  int nvkm_therm_fan_sense(struct nvkm_therm *);
> >  int nvkm_therm_cstate(struct nvkm_therm *, int, int);
> > +void nvkm_therm_clkgate_enable(struct nvkm_therm *);
> > +void nvkm_therm_clkgate_fini(struct nvkm_therm *, bool);
> > 
> >  int nv40_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> >  int nv50_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> >  int g84_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> >  int gt215_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> >  int gf119_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> > +int gk104_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> >  int gm107_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> >  int gm200_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> >  int gp100_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
> > diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > index 08e77cd55e6e..74bd09b1c893 100644
> > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
> > @@ -28,6 +28,7 @@
> >  #include 
> > 
> >  #include 
> > +#include 
> > 
> >  static DEFINE_MUTEX(nv_devices_mutex);
> >  static LIST_HEAD(nv_devices);
> > @@ -1682,7 +1683,7 @@ nve4_chipset = {
> > .mxm = nv50_mxm_new,
> > .pci = gk104_pci_new,
> > .pmu = gk104_pmu_new,
> > -   .therm = gf119_therm_new,
> > +   .therm = gk104_therm_new,
> > .timer = nv41_timer_new,
> > .top = gk104_top_new,
> > .volt = gk104_volt_new,
> > @@ -1721,7 +1722,7 @@ nve6_chipset = {
> > .mxm = nv50_mxm_new,
> > .pci = gk104_pci_new,
> > .pmu = gk104_pmu_new,
> > -   .therm = gf119_therm_new,
> > +   .therm = gk104_therm_new,
> > .timer = nv41_timer_new,
> > .top = gk104_top_new,
> > .volt = gk104_volt_new,
> > @@ -1760,7 +1761,7 @

[PATCH hwc v1] drm_hwcomposer: Ignore unknown connector types

[Alexandru Gheorghe]

drm_hwcomposer splits the connectors in two categories: internal and
external, the other ones just fall through the cracks a break things
down the line.
Found this issue on mali-dp with the writeback connector patches
from [1].

[1] https://patchwork.kernel.org/patch/9727637/

Signed-off-by: Alexandru Gheorghe 
---
 drmresources.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drmresources.cpp b/drmresources.cpp
index 32dd376..d582b3a 100644
--- a/drmresources.cpp
+++ b/drmresources.cpp
@@ -153,8 +153,8 @@ int DrmResources::Init() {
   ALOGE("Init connector %d failed", res->connectors[i]);
   break;
 }
-
-connectors_.emplace_back(std::move(conn));
+if (conn->valid_type())
+  connectors_.emplace_back(std::move(conn));
   }
 
   // First look for primary amongst internal connectors
-- 
2.7.4

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Re: [PATCH 2/2] drm/sun4i: Handle DRM_MODE_FLAG_**SYNC_POSITIVE correctly

[Maxime Ripard]

On Thu, Jan 25, 2018 at 05:50:18PM +0100, Giulio Benetti wrote:
> > > > > > On Sat, Jan 20, 2018 at 07:50:21PM +0100, Giulio Benetti wrote:
> > > > > > > On previous handling, if specified DRM_MODE_FLAG_N*SYNC,
> > > > > > > it was ignored,
> > > > > > > because only PHSYNC and PVSYNC were taken into account.
> > > > > > > DRM_MODE_FLAG_P*SYNC and DRM_MODE_FLAG_N*SYNC are not exclusive.
> > > > > > > 
> > > > > > > If flags contains PVSYNC, it doesn't mean it is NVSYNC.
> > > > > > > And it's true also the contrary.
> > > > > > > Also, as I've checked with scope on A20,
> > > > > > > if (flags & PVSYNC) then SUN4I_TCON0_IO_POL_VSYNC_POSITIVE
> > > > > > > must be set, as name suggests.
> > > > > > > It seems all display io polarities starts inverted if 0.
> > > > > > > 
> > > > > > > Signed-off-by: Giulio Benetti 
> > > > > > > 
> > > > > > > PVSYNC and PHSYNC only
> > > > > > > 
> > > > > > > Signed-off-by: Giulio Benetti 
> > > > > > 
> > > > > > Checkpatch:
> > > > > > WARNING: Duplicate signature
> > > > > 
> > > > > Sorry I didn't use ./scripts/checkpatch.pl
> > > > > 
> > > > > > 
> > > > > > > ---
> > > > > > >    drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++--
> > > > > > >    1 file changed, 2 insertions(+), 2 deletions(-)
> > > > > > > 
> > > > > > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> > > > > > > b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> > > > > > > index 6121210..e873a37 100644
> > > > > > > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> > > > > > > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> > > > > > > @@ -224,10 +224,10 @@ static void
> > > > > > > sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
> > > > > > >     SUN4I_TCON0_BASIC3_H_SYNC(hsync));
> > > > > > >    /* Setup the polarity of the various signals */
> > > > > > > -    if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
> > > > > > > +    if (mode->flags & DRM_MODE_FLAG_PHSYNC)
> > > > > > >    val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE;
> > > > > > > -    if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
> > > > > > > +    if (mode->flags & DRM_MODE_FLAG_PVSYNC)
> > > > > > >    val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
> > > > > > 
> > > > > > I'm not sure why you were talking of the differences between NVSYNC
> > > > > > and PVSYNC if you're not making use of any of it here?
> > > > > 
> > > > > Thinking about it more now, the point is that all Lcd IOs seem to be
> > > > > inverted by default(at least on A20).
> > > > > With inverted, I mean that if for example PVSYNC,
> > > > > I should see vsync line low and when asserted to give VSync,
> > > > > it goes high.
> > > > > This is what I've checked with oscilloscope on A20.
> > > > > Can someone give a try on A33? Otherwise I will,
> > > > > but I will take some time.
> > > > > On uboot, everything is treated equal to kernel,
> > > > > but to have my falling edge dclk and low h/vsync I had to specify:
> > > > > CONFIG_VIDEO_LCD_DCLK_PHASE=0 (giving me falling edge on dclk)
> > > > > and
> > > > > CONFIG_VIDEO_LCD_MODE=",sync:3,..."
> > > > > but digging into code, I see "sync:3" means H/VSYNC HIGH,
> > > > > but I experience both LOW during their pulse.
> > > > > 
> > > > > > 
> > > > > > Also, how was it tested? This seems quite weird that we haven't 
> > > > > > caught
> > > > > > that one sooner, and I'm a bit worried about the possible 
> > > > > > regressions
> > > > > > here.
> > > > > 
> > > > > It sounds really strange to me too,
> > > > > because everybody under uboot use "sync:3"(HIGH).
> > > > > I will retry to measure,
> > > > > unfortunately at home I don't have a scope,
> > > > > but I think I'm going to have one soon, because of this. :)
> > > > 
> > > > Here I am with scope captures and tcon0 registers dump:
> > > > tcon0_regs => https://pasteboard.co/H4r8Zcs.png
> > > > dclk_d0 => https://pasteboard.co/H4r8QRe.png
> > > > dclk_de => https://pasteboard.co/H4r8zh4R.png
> > > > dclk_vsnc => https://pasteboard.co/H4r8Hye.png
> > > > 
> > > > As you can see circled in reg on registers,
> > > > TCON0_IO_POL_REG = 0x.
> > > > But on all the waveforms you can see:
> > > > - dclk_d0: clock phase is 0, but it starts with falling edge, otherwise
> > > > the rising front overlaps dclk rising edge(not good), so to me this is
> > > > falling, then I mean it Negative.
> > > > - dclk_de: de pulse is clearly negative, even if register is 0 and its'
> > > > polarity bit is 0.
> > > > - dclk_vsnc: same as dclk_de
> > > > - dclk_hsync: I didn't take scope screenshot but I can assure you it's
> > > > negative.
> > > > 
> > > > You can also check all the other registers about TCON0.
> > > > 
> > > > Now I proceed testing it on A33, maybe the peripheral is slightly
> > > > different between Axx SoCs, if I find it that way,
> > > > it should be only a check about SoC or peripheral ID,
> > > > and treat polarity as it should be done.
> > > 
> > > Here I am with A33 waveforms:
> > > tcon0_regs => https://pasteboard.co/H4rXfN0M.png
> > > dclk_d0 => https://pa

Re: 'buf' pointer in ttm_bo_vm_access_kmap()

[Tom St Denis]

On 26/01/18 09:38 AM, Christian König wrote:

Am 26.01.2018 um 15:31 schrieb Tom St Denis:

Hi all,

In the function ttm_bo_vm_access_kmap() it doesn't seem to me like the 
'buf' pointer is incremented.  That seems like a bug no?


Yeah, looks suspicious to me as well. But TTM questions should CC the 
dri list as well.


And in this particular case I think Felix was the author that function.



Hi Christian,

I'm authoring a set of mostly NFC patches for TTM and already crafted a 
fix for this in the process.


If the fix (which is literally "buf += bytes" at the end of the while 
loop) doesn't get NAK'ed I'll submit it as part of my cleanup patches.


Cheers,
Tom
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Re: [PATCH 1/2] [WIP]drm/ttm: add waiter list to prevent allocation not in order

[Christian König]

I just realized that a change I'm thinking about for a while would solve 
your problem as well, but keep concurrent allocation possible.


See ttm_mem_evict_first() unlocks the BO after evicting it:

    ttm_bo_del_from_lru(bo);
    spin_unlock(&glob->lru_lock);

    ret = ttm_bo_evict(bo, ctx);
    if (locked) {
    ttm_bo_unreserve(bo); < here
    } else {
    spin_lock(&glob->lru_lock);
    ttm_bo_add_to_lru(bo);
    spin_unlock(&glob->lru_lock);
    }

    kref_put(&bo->list_kref, ttm_bo_release_list);


The effect is that in your example process C can not only beat process B 
once, but many many times because we run into a ping/pong situation 
where B evicts resources while C moves them back in.


For a while now I'm thinking about dropping those reservations only 
after the original allocation succeeded.


The effect would be that process C can still beat process B initially, 
but sooner or process B would evict some resources from process C as 
well and then it can succeed with its allocation.


The problem is for this approach to work we need to core change to the 
ww_mutexes to be able to handle this efficiently.


Regards,
Christian.

Am 26.01.2018 um 14:59 schrieb Christian König:
I know, but this has the same effect. You prevent concurrent 
allocation from happening.


What we could do is to pipeline reusing of deleted memory as well, 
this makes it less likely to cause the problem you are seeing because 
the evicting processes doesn't need to block for deleted BOs any more.


But that other processes can grab memory during eviction is 
intentional. Otherwise greedy processes would completely dominate 
command submission.


Regards,
Christian.

Am 26.01.2018 um 14:50 schrieb Zhou, David(ChunMing):
I don't want to prevent all, my new approach is to prevent the later 
allocation is trying and ahead of front to get the memory space that 
the front made from eviction.



发自坚果 Pro

Christian K鰊ig  于 2018年1月26日 
下午9:24写道：


Yes, exactly that's the problem.

See when you want to prevent a process B from allocating the memory 
process A has evicted, you need to prevent all concurrent allocation.


And we don't do that because it causes a major performance drop.

Regards,
Christian.

Am 26.01.2018 um 14:21 schrieb Zhou, David(ChunMing):
You patch will prevent concurrent allocation, and will result in 
allocation performance drop much.


发自坚果 Pro

Christian K鰊ig  于 2018年1月26日 
下午9:04写道：


Attached is what you actually want to do cleanly implemented. But as 
I said this is a NO-GO.


Regards,
Christian.

Am 26.01.2018 um 13:43 schrieb Christian König:
After my investigation, this issue should be detect of TTM design 
self, which breaks scheduling balance.

Yeah, but again. This is indented design we can't change easily.

Regards,
Christian.

Am 26.01.2018 um 13:36 schrieb Zhou, David(ChunMing):

I am off work, so reply mail by phone, the format could not be text.

back to topic itself:
the problem indeed happen on amdgpu driver, someone reports me 
that application runs with two instances, the performance are 
different.
I also reproduced the issue with unit test(bo_eviction_test). They 
always think our scheduler isn't working as expected.


After my investigation, this issue should be detect of TTM design 
self, which breaks scheduling balance.


Further, if we run containers for our gpu, container A could run 
high score, container B runs low score with same benchmark.


So this is bug that we need fix.

Regards,
David Zhou

发自坚果 Pro

Christian K鰊ig  于 2018年1月26日 
下午6:31写道：


Am 26.01.2018 um 11:22 schrieb Chunming Zhou:
> there is a scheduling balance issue about get node like:
> a. process A allocates full memory and use it for submission.
> b. process B tries to allocates memory, will wait for process A 
BO idle in eviction.
> c. process A completes the job, process B eviction will put 
process A BO node,
> but in the meantime, process C is comming to allocate BO, whill 
directly get node successfully, and do submission,

> process B will again wait for process C BO idle.
> d. repeat the above setps, process B could be delayed much more.
>
> later allocation must not be ahead of front in same place.

Again NAK to the whole approach.

At least with amdgpu the problem you described above never occurs
because evictions are pipelined operations. We could only block for
deleted regions to become free.

But independent of that incoming memory requests while we make 
room for

eviction are intended to be served first.

Changing that is certainly a no-go cause that would favor memory 
hungry

applications over small clients.

Regards,
Christian.

>
> Change-Id: I3daa892e50f82226c552cc008a29e55894a98f18
> Signed-off-by: Chunming Zhou 
> ---
>   drivers/gpu/drm/ttm/ttm_bo.c    | 69 
+++--

>   include/drm/ttm/ttm_bo_api.h    |  7 +
>   include/drm/ttm/ttm_bo_driver.h |  7 +
>   3 fil

Re: [PATCH] drm/pl111: Use max memory bandwidth for resolution

[Linus Walleij]

On Fri, Jan 26, 2018 at 2:27 PM, Linus Walleij  wrote:
> On Thu, Jan 25, 2018 at 4:46 AM, Eric Anholt  wrote:
>
>>> + pl111_choose_max_resolution(dev, priv->memory_bw,
>>> + &mode_config->max_width,
>>> + &mode_config->max_height, &bpp);
>>> + dev_info(dev->dev, "cap resolution at %u x %u, %u BPP\n",
>>> +  mode_config->max_width, mode_config->max_height, bpp);
>>
>> I think this is the wrong place in the pipeline to be doing this, but I
>> don't have a complete solution so I'm not necessarily saying no.
>
> So currently the driver does this:
>
> mode_config->max_width = 1024;
> mode_config->max_height = 768;
>
> And that is because it cannot really handle anything. I guess ideally
> the DRM driver should set these to -1 or something so that any widths
> and heights negotiated will work.
>
>>  Things I think we should do for bandwidth limits:
>>
>> A new pl111_mode_valid() rejects modes with width*height*2 > bandwidth
>> (if we can't scan it out with our smallest format, don't advertise it).
>>
>> pl111_display_check() rejects modes with width*height*bpp > bandwidth
>> (if we can't scan out this particular configuration, let them know we
>> can't set the mode).
>>
>> Ideally given those two things, fbdev and X11 would notice that the
>> preferred mode fails at 24bpp and fall back to 16bpp.  I don't think
>> either of those does so today, though.
>>
>> Interested in tackling any of these?
>
> I tried the pl111_display_check() version. It just made the driver
> fail to initialize anything, at least when using the dumb VGA
> bridge.

I guess this is because it gets called from
drm_simple_display_pipe_funcs
at which point the driver framework has already decided to go with
this format. And that is backed by crtc.

We would need to extend this with a new function such as
.crtc_valid() that can check both mode (for resolution)
and format (for BPP).

But then I start to wonde how "simple" drm_simple_display_pipe
is becoming :/

I can't figure out if the crtc is even the right place to address this...

> There are .mode_valid() callbacks on the bridges we use
> (panel and dumb VGA) but neither uses it at the moment, hm.
> I could just assign my own .mode_valid() callback to the bridge,
> but it seems a bit fragile. But it's worth a hack, I'll try it.

It turns out that this passes only an struct drm_display_mode
which does not concern itself with display engine details
like BPP.

So the bridges just put limitations on modes, not on BPP,
which makes a lot of sense, it corresponds to what the
hardware does.

It's evident when I think about it...

The check needs to be done in the
drm_simple_display_pipe_funcs  or setting that up as
per above. I just don't really see exactly where?

Yours,
Linus Walleij
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[PATCH v3 2/2] drm/virtio: Handle buffers from the compositor

[Tomeu Vizoso]

When retrieving queued messages from the compositor in the host for
clients in the guest, handle buffers that may be passed.

These buffers should have been mapped to the guest's address space, for
example via the KVM_SET_USER_MEMORY_REGION ioctl.

Signed-off-by: Tomeu Vizoso 
---

 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 54 ++
 1 file changed, 54 insertions(+)

diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c 
b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
index d4230b1fa91d..57b1ad51d251 100644
--- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c
+++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c
@@ -545,14 +545,58 @@ static unsigned int winsrv_poll(struct file *filp,
return mask;
 }
 
+struct virtio_gpu_winsrv_region {
+   uint64_t pfn;
+   size_t size;
+};
+
+static int winsrv_fd_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+   struct virtio_gpu_winsrv_region *region = filp->private_data;
+   unsigned long vm_size = vma->vm_end - vma->vm_start;
+   int ret = 0;
+
+   if (vm_size +
+   (vma->vm_pgoff << PAGE_SHIFT) > PAGE_ALIGN(region->size))
+   return -EINVAL;
+
+   ret = io_remap_pfn_range(vma, vma->vm_start, region->pfn, vm_size,
+vma->vm_page_prot);
+   if (ret)
+   return ret;
+
+   vma->vm_flags |= VM_PFNMAP | VM_IO | VM_DONTEXPAND | VM_DONTDUMP;
+
+   return ret;
+}
+
+static int winsrv_fd_release(struct inode *inodep, struct file *filp)
+{
+   struct virtio_gpu_winsrv_region *region = filp->private_data;
+
+   kfree(region);
+
+   return 0;
+}
+
+static const struct file_operations winsrv_fd_fops = {
+   .mmap = winsrv_fd_mmap,
+   .release = winsrv_fd_release,
+};
+
 static int winsrv_ioctl_rx(struct virtio_gpu_device *vgdev,
   struct virtio_gpu_winsrv_conn *conn,
   struct drm_virtgpu_winsrv *cmd)
 {
struct virtio_gpu_winsrv_rx_qentry *qentry, *tmp;
struct virtio_gpu_winsrv_rx *virtio_cmd;
+   struct virtio_gpu_winsrv_region *region;
int available_len = cmd->len;
int read_count = 0;
+   int i;
+
+   for (i = 0; i < VIRTGPU_WINSRV_MAX_ALLOCS; i++)
+   cmd->fds[i] = -1;
 
list_for_each_entry_safe(qentry, tmp, &conn->cmdq, next) {
virtio_cmd = qentry->cmd;
@@ -567,6 +611,16 @@ static int winsrv_ioctl_rx(struct virtio_gpu_device *vgdev,
return -EFAULT;
}
 
+   for (i = 0; virtio_cmd->pfns[i]; i++) {
+   region = kmalloc(sizeof(*region), GFP_KERNEL);
+   region->pfn = virtio_cmd->pfns[i];
+   region->size = virtio_cmd->lens[i];
+   cmd->fds[i] = anon_inode_getfd("[winsrv_fd]",
+  &winsrv_fd_fops,
+  region,
+  O_CLOEXEC | O_RDWR);
+   }
+
available_len -= virtio_cmd->len;
read_count += virtio_cmd->len;
 
-- 
2.14.3

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[PATCH v3 0/2] drm/virtio: Add window server support

[Tomeu Vizoso]

Hi,

this work is based on the virtio_wl driver in the ChromeOS kernel by
Zach Reizner, currently at:

https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.4/drivers/virtio/virtio_wl.c

There's one feature missing currently, which is letting clients write
directly to the host part of a resource, so the extra copy in
TRANSFER_TO_HOST isn't needed.

Have pushed the QEMU counterpart to this branch, though it isn't as
polished atm:

https://gitlab.collabora.com/tomeu/qemu/commits/winsrv-wip

Thanks,

Tomeu


Tomeu Vizoso (2):
  drm/virtio: Add window server support
  drm/virtio: Handle buffers from the compositor

 drivers/gpu/drm/virtio/virtgpu_drv.c   |   1 +
 drivers/gpu/drm/virtio/virtgpu_drv.h   |  39 -
 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 219 +
 drivers/gpu/drm/virtio/virtgpu_kms.c   |  66 ++--
 drivers/gpu/drm/virtio/virtgpu_vq.c| 285 -
 include/uapi/drm/virtgpu_drm.h |  29 
 include/uapi/linux/virtio_gpu.h|  43 +
 7 files changed, 667 insertions(+), 15 deletions(-)

-- 
2.14.3

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[PATCH v3 1/2] drm/virtio: Add window server support

[Tomeu Vizoso]

This is to allow clients running within VMs to be able to communicate
with a compositor in the host. Clients will use the communication
protocol that the compositor supports, and virtio-gpu will assist with
making buffers available in both sides, and copying content as needed.

It is expected that a service in the guest will act as a proxy,
interacting with virtio-gpu to support unmodified clients. For some
features of the protocol, the hypervisor might have to intervene and
also parse the protocol data to properly bridge resources. The following
IOCTLs have been added to this effect:

*_WINSRV_CONNECT: Opens a connection to the compositor in the host,
returns a FD that represents this connection and on which the following
IOCTLs can be used. Callers are expected to poll this FD for new
messages from the compositor.

*_WINSRV_TX: Asks the hypervisor to forward a message to the compositor

*_WINSRV_RX: Returns all queued messages

Alongside protocol data that is opaque to the kernel, the client can
send file descriptors that reference GEM buffers allocated by
virtio-gpu. The guest proxy is expected to figure out when a client is
passing a FD that refers to shared memory in the guest and allocate a
virtio-gpu buffer of the same size with DRM_VIRTGPU_RESOURCE_CREATE.

When the client notifies the compositor that it can read from that buffer,
the proxy should copy the contents from the SHM region to the virtio-gpu
resource and call DRM_VIRTGPU_TRANSFER_TO_HOST.

This has been tested with Wayland clients that make use of wl_shm to
pass buffers to the compositor, but is expected to work similarly for X
clients that make use of MIT-SHM with FD passing.

v2: * Add padding to two virtio command structs
* Properly cast two __user pointers (kbuild test robot)

v3: * Handle absence of winsrv support in QEMU (Dave Airlie)

Signed-off-by: Tomeu Vizoso 
---

 drivers/gpu/drm/virtio/virtgpu_drv.c   |   1 +
 drivers/gpu/drm/virtio/virtgpu_drv.h   |  39 -
 drivers/gpu/drm/virtio/virtgpu_ioctl.c | 165 +++
 drivers/gpu/drm/virtio/virtgpu_kms.c   |  66 ++--
 drivers/gpu/drm/virtio/virtgpu_vq.c| 285 -
 include/uapi/drm/virtgpu_drm.h |  29 
 include/uapi/linux/virtio_gpu.h|  43 +
 7 files changed, 613 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.c 
b/drivers/gpu/drm/virtio/virtgpu_drv.c
index 49a3d8d5a249..a528ddedd09f 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.c
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.c
@@ -79,6 +79,7 @@ static unsigned int features[] = {
 */
VIRTIO_GPU_F_VIRGL,
 #endif
+   VIRTIO_GPU_F_WINSRV,
 };
 static struct virtio_driver virtio_gpu_driver = {
.feature_table = features,
diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h 
b/drivers/gpu/drm/virtio/virtgpu_drv.h
index da2fb585fea4..268b386e1232 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drv.h
+++ b/drivers/gpu/drm/virtio/virtgpu_drv.h
@@ -178,6 +178,8 @@ struct virtio_gpu_device {
 
struct virtio_gpu_queue ctrlq;
struct virtio_gpu_queue cursorq;
+   struct virtio_gpu_queue winsrv_rxq;
+   struct virtio_gpu_queue winsrv_txq;
struct kmem_cache *vbufs;
bool vqs_ready;
 
@@ -205,10 +207,32 @@ struct virtio_gpu_device {
 
 struct virtio_gpu_fpriv {
uint32_t ctx_id;
+
+   struct list_head winsrv_conns; /* list of virtio_gpu_winsrv_conn */
+   spinlock_t winsrv_lock;
+};
+
+struct virtio_gpu_winsrv_rx_qentry {
+   struct virtio_gpu_winsrv_rx *cmd;
+   struct list_head next;
+};
+
+struct virtio_gpu_winsrv_conn {
+   struct virtio_gpu_device *vgdev;
+
+   spinlock_t lock;
+
+   int fd;
+   struct drm_file *drm_file;
+
+   struct list_head cmdq; /* queue of virtio_gpu_winsrv_rx_qentry */
+   wait_queue_head_t cmdwq;
+
+   struct list_head next;
 };
 
 /* virtio_ioctl.c */
-#define DRM_VIRTIO_NUM_IOCTLS 10
+#define DRM_VIRTIO_NUM_IOCTLS 11
 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
 
 /* virtio_kms.c */
@@ -318,9 +342,22 @@ virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device 
*vgdev,
 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
 void virtio_gpu_cursor_ack(struct virtqueue *vq);
 void virtio_gpu_fence_ack(struct virtqueue *vq);
+void virtio_gpu_winsrv_tx_ack(struct virtqueue *vq);
+void virtio_gpu_winsrv_rx_read(struct virtqueue *vq);
 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
+void virtio_gpu_dequeue_winsrv_rx_func(struct work_struct *work);
+void virtio_gpu_dequeue_winsrv_tx_func(struct work_struct *work);
 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
+void virtio_gpu_fill_winsrv_rx(struct virtio_gpu_device *vgdev);
+void virtio_gpu_queue_winsrv_rx_in(struct virtio_gpu_device *vgdev,
+  struct virtio_gpu_winsrv_rx *cmd);
+int virtio_gpu_cmd_winsrv_connect

Re: [PATCH 1/3] drm/bridge/sii8620: perform I2C bus recovery after reset

[Andrzej Hajda]

On 15.01.2018 18:33, Andrzej Hajda wrote:
> Chip has known bug which causes I2C client state machine to frequently
> enter non-idle mode after chip reset. Let's ask I2C adapter to perform
> bus recovery to mitigate this bug.
>
> Signed-off-by: Andrzej Hajda 
> ---
>  drivers/gpu/drm/bridge/sil-sii8620.c | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c 
> b/drivers/gpu/drm/bridge/sil-sii8620.c
> index 86789f8918a4..db93e5e0497c 100644
> --- a/drivers/gpu/drm/bridge/sil-sii8620.c
> +++ b/drivers/gpu/drm/bridge/sil-sii8620.c
> @@ -978,6 +978,8 @@ static int sii8620_hw_off(struct sii8620 *ctx)
>  
>  static void sii8620_hw_reset(struct sii8620 *ctx)
>  {
> + struct i2c_client *i2c = to_i2c_client(ctx->dev);
> +
>   usleep_range(1, 2);
>   gpiod_set_value(ctx->gpio_reset, 0);
>   usleep_range(5000, 2);
> @@ -985,6 +987,9 @@ static void sii8620_hw_reset(struct sii8620 *ctx)
>   usleep_range(1, 2);
>   gpiod_set_value(ctx->gpio_reset, 0);
>   msleep(300);
> +
> + /* I2C bus recovery prevents I2C errors due to known bug in the chip */
> + i2c_recover_bus(i2c->adapter);
>  }
>  
>  static void sii8620_cbus_reset(struct sii8620 *ctx)

I have just posted patch which deals with the problem directly in i2c
adapter, so this patch can be dropped[1].

[1]: https://marc.info/?l=linux-i2c&m=151696860906805


Regards

Andrzej


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Re: [Nouveau] [PATCH] drm/nouveau/therm/gp100: Do not report temperature when subdev is shadowed

[Karol Herbst]

well I just tried to say, that you are not fixing the issue you think
were fixing. In your case the GPU is powered off and you get garbage
values from any mmio read, so parsing those values is just wrong and
we need to prevent doing anything on the hw whenever it is powered off
directly in hwmon.

On Fri, Jan 26, 2018 at 2:40 PM, Tobias Klausmann
 wrote:
> Not sure if i understand completely what you intend to say here, with this
> we prevent hwmon from reporting utterly wrong temperature values returning
> an error (we could return -EBUSY or somehting instead, granted), yet if the
> device is shadowed, getting a sane temp value out of is seems unlikely to
> me!
>
> Greetings,
>
> Tobias
>
>
> On 1/26/18 12:40 PM, Karol Herbst wrote:
>>
>> no, we can't do that. We actually have to prevent this from hwom. The
>> issue here is, that the reg read returns 0x and parsing that
>> is the first step in the first place.
>>
>> On Thu, Jan 25, 2018 at 7:16 PM, Tobias Klausmann
>>  wrote:
>>>
>>> This fixes wrong temperature outputs e.g. 511°C if the card is asleep.
>>>
>>> Signed-off-by: Tobias Klausmann 
>>> ---
>>>   drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c | 4 +++-
>>>   1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
>>> b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
>>> index 9f0dea3f61dc..45d0ec632b5a 100644
>>> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
>>> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
>>> @@ -32,8 +32,10 @@ gp100_temp_get(struct nvkm_therm *therm)
>>>  u32 inttemp = (tsensor & 0x0001fff8);
>>>
>>>  /* device SHADOWed */
>>> -   if (tsensor & 0x4000)
>>> +   if (tsensor & 0x4000) {
>>>  nvkm_trace(subdev, "reading temperature from SHADOWed
>>> sensor\n");
>>> +   return -ENODEV;
>>> +   }
>>>
>>>  /* device valid */
>>>  if (tsensor & 0x2000)
>>> --
>>> 2.16.1
>>>
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>>> nouv...@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/nouveau
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Re: [PATCH 1/2] [WIP]drm/ttm: add waiter list to prevent allocation not in order

[Christian König]

I know, but this has the same effect. You prevent concurrent allocation 
from happening.


What we could do is to pipeline reusing of deleted memory as well, this 
makes it less likely to cause the problem you are seeing because the 
evicting processes doesn't need to block for deleted BOs any more.


But that other processes can grab memory during eviction is intentional. 
Otherwise greedy processes would completely dominate command submission.


Regards,
Christian.

Am 26.01.2018 um 14:50 schrieb Zhou, David(ChunMing):
I don't want to prevent all, my new approach is to prevent the later 
allocation is trying and ahead of front to get the memory space that 
the front made from eviction.



发自坚果 Pro

Christian K鰊ig  于 2018年1月26日 
下午9:24写道：


Yes, exactly that's the problem.

See when you want to prevent a process B from allocating the memory 
process A has evicted, you need to prevent all concurrent allocation.


And we don't do that because it causes a major performance drop.

Regards,
Christian.

Am 26.01.2018 um 14:21 schrieb Zhou, David(ChunMing):
You patch will prevent concurrent allocation, and will result in 
allocation performance drop much.


发自坚果 Pro

Christian K鰊ig  于 2018年1月26日 
下午9:04写道：


Attached is what you actually want to do cleanly implemented. But as 
I said this is a NO-GO.


Regards,
Christian.

Am 26.01.2018 um 13:43 schrieb Christian König:
After my investigation, this issue should be detect of TTM design 
self, which breaks scheduling balance.

Yeah, but again. This is indented design we can't change easily.

Regards,
Christian.

Am 26.01.2018 um 13:36 schrieb Zhou, David(ChunMing):

I am off work, so reply mail by phone, the format could not be text.

back to topic itself:
the problem indeed happen on amdgpu driver, someone reports me that 
application runs with two instances, the performance are different.
I also reproduced the issue with unit test(bo_eviction_test). They 
always think our scheduler isn't working as expected.


After my investigation, this issue should be detect of TTM design 
self, which breaks scheduling balance.


Further, if we run containers for our gpu, container A could run 
high score, container B runs low score with same benchmark.


So this is bug that we need fix.

Regards,
David Zhou

发自坚果 Pro

Christian K鰊ig  于 2018年1月26日 
下午6:31写道：


Am 26.01.2018 um 11:22 schrieb Chunming Zhou:
> there is a scheduling balance issue about get node like:
> a. process A allocates full memory and use it for submission.
> b. process B tries to allocates memory, will wait for process A 
BO idle in eviction.
> c. process A completes the job, process B eviction will put 
process A BO node,
> but in the meantime, process C is comming to allocate BO, whill 
directly get node successfully, and do submission,

> process B will again wait for process C BO idle.
> d. repeat the above setps, process B could be delayed much more.
>
> later allocation must not be ahead of front in same place.

Again NAK to the whole approach.

At least with amdgpu the problem you described above never occurs
because evictions are pipelined operations. We could only block for
deleted regions to become free.

But independent of that incoming memory requests while we make room 
for

eviction are intended to be served first.

Changing that is certainly a no-go cause that would favor memory 
hungry

applications over small clients.

Regards,
Christian.

>
> Change-Id: I3daa892e50f82226c552cc008a29e55894a98f18
> Signed-off-by: Chunming Zhou 
> ---
>   drivers/gpu/drm/ttm/ttm_bo.c    | 69 
+++--

>   include/drm/ttm/ttm_bo_api.h    |  7 +
>   include/drm/ttm/ttm_bo_driver.h |  7 +
>   3 files changed, 80 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c 
b/drivers/gpu/drm/ttm/ttm_bo.c

> index d33a6bb742a1..558ec2cf465d 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo.c
> @@ -841,6 +841,58 @@ static int ttm_bo_add_move_fence(struct 
ttm_buffer_object *bo,

>    return 0;
>   }
>
> +static void ttm_man_init_waiter(struct ttm_bo_waiter *waiter,
> + struct ttm_buffer_object *bo,
> + const struct ttm_place *place)
> +{
> + waiter->tbo = bo;
> + memcpy((void *)&waiter->place, (void *)place, sizeof(*place));
> + INIT_LIST_HEAD(&waiter->list);
> +}
> +
> +static void ttm_man_add_waiter(struct ttm_mem_type_manager *man,
> +    struct ttm_bo_waiter *waiter)
> +{
> + if (!waiter)
> + return;
> + spin_lock(&man->wait_lock);
> + list_add_tail(&waiter->list, &man->waiter_list);
> + spin_unlock(&man->wait_lock);
> +}
> +
> +static void ttm_man_del_waiter(struct ttm_mem_type_manager *man,
> +    struct ttm_bo_waiter *waiter)
> +{
> + if (!waiter)
> + return;
> + spin_lock(&man->wait_lock);
> + if (!list_empty(&waiter->list))
> + list_del(&wa

Re: [PATCH 1/2] [WIP]drm/ttm: add waiter list to prevent allocation not in order

[Zhou, David(ChunMing)]

I don't want to prevent all, my new approach is to prevent the later allocation 
is trying and ahead of front to get the memory space that the front made from 
eviction.



发自坚果 Pro

Christian K鰊ig  于 2018年1月26日 下午9:24写道：

Yes, exactly that's the problem.

See when you want to prevent a process B from allocating the memory process A 
has evicted, you need to prevent all concurrent allocation.

And we don't do that because it causes a major performance drop.

Regards,
Christian.

Am 26.01.2018 um 14:21 schrieb Zhou, David(ChunMing):
You patch will prevent concurrent allocation, and will result in allocation 
performance drop much.


发自坚果 Pro

Christian K鰊ig 
 于 
2018年1月26日 下午9:04写道：

Attached is what you actually want to do cleanly implemented. But as I said 
this is a NO-GO.

Regards,
Christian.

Am 26.01.2018 um 13:43 schrieb Christian König:
After my investigation, this issue should be detect of TTM design self, which 
breaks scheduling balance.
Yeah, but again. This is indented design we can't change easily.

Regards,
Christian.

Am 26.01.2018 um 13:36 schrieb Zhou, David(ChunMing):
I am off work, so reply mail by phone, the format could not be text.

back to topic itself:
the problem indeed happen on amdgpu driver, someone reports me that application 
runs with two instances, the performance are different.
I also reproduced the issue with unit test(bo_eviction_test). They always think 
our scheduler isn't working as expected.

After my investigation, this issue should be detect of TTM design self, which 
breaks scheduling balance.

Further, if we run containers for our gpu, container A could run high score, 
container B runs low score with same benchmark.

So this is bug that we need fix.

Regards,
David Zhou


发自坚果 Pro

Christian K鰊ig 
 于 
2018年1月26日 下午6:31写道：

Am 26.01.2018 um 11:22 schrieb Chunming Zhou:
> there is a scheduling balance issue about get node like:
> a. process A allocates full memory and use it for submission.
> b. process B tries to allocates memory, will wait for process A BO idle in 
> eviction.
> c. process A completes the job, process B eviction will put process A BO node,
> but in the meantime, process C is comming to allocate BO, whill directly get 
> node successfully, and do submission,
> process B will again wait for process C BO idle.
> d. repeat the above setps, process B could be delayed much more.
>
> later allocation must not be ahead of front in same place.

Again NAK to the whole approach.

At least with amdgpu the problem you described above never occurs
because evictions are pipelined operations. We could only block for
deleted regions to become free.

But independent of that incoming memory requests while we make room for
eviction are intended to be served first.

Changing that is certainly a no-go cause that would favor memory hungry
applications over small clients.

Regards,
Christian.

>
> Change-Id: I3daa892e50f82226c552cc008a29e55894a98f18
> Signed-off-by: Chunming Zhou 
> ---
>   drivers/gpu/drm/ttm/ttm_bo.c| 69 
> +++--
>   include/drm/ttm/ttm_bo_api.h|  7 +
>   include/drm/ttm/ttm_bo_driver.h |  7 +
>   3 files changed, 80 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
> index d33a6bb742a1..558ec2cf465d 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo.c
> @@ -841,6 +841,58 @@ static int ttm_bo_add_move_fence(struct 
> ttm_buffer_object *bo,
>return 0;
>   }
>
> +static void ttm_man_init_waiter(struct ttm_bo_waiter *waiter,
> + struct ttm_buffer_object *bo,
> + const struct ttm_place *place)
> +{
> + waiter->tbo = bo;
> + memcpy((void *)&waiter->place, (void *)place, sizeof(*place));
> + INIT_LIST_HEAD(&waiter->list);
> +}
> +
> +static void ttm_man_add_waiter(struct ttm_mem_type_manager *man,
> +struct ttm_bo_waiter *waiter)
> +{
> + if (!waiter)
> + return;
> + spin_lock(&man->wait_lock);
> + list_add_tail(&waiter->list, &man->waiter_list);
> + spin_unlock(&man->wait_lock);
> +}
> +
> +static void ttm_man_del_waiter(struct ttm_mem_type_manager *man,
> +struct ttm_bo_waiter *waiter)
> +{
> + if (!waiter)
> + return;
> + spin_lock(&man->wait_lock);
> + if (!list_empty(&waiter->list))
> + list_del(&waiter->list);
> + spin_unlock(&man->wait_lock);
> + kfree(waiter);
> +}
> +
> +int ttm_man_check_bo(struct ttm_mem_type_manager *man,
> +  struct ttm_buffer_object *bo,
> +  const struct ttm_place *place)
> +{
> + struct ttm_bo_waiter *waiter, *tmp;
> +
> + spin_lock(&man->wait_lock);
> + list_for_each_entry_safe(waiter, tmp, &man->waiter_list, list) {
> + if ((

[PATCH 1/2] drm/panel: Device tree bindings for ARM Versatile panels

[Linus Walleij]

This adds a pretty simple set of device tree bindings for
ARM Versatile panels appearing as child nodes of a system
controller.

Cc: devicet...@vger.kernel.org
Signed-off-by: Linus Walleij 
---
 .../display/panel/arm,versatile-tft-panel.txt  | 31 ++
 1 file changed, 31 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.txt

diff --git 
a/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.txt 
b/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.txt
new file mode 100644
index ..248141c3c7e3
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.txt
@@ -0,0 +1,31 @@
+ARM Versatile TFT Panels
+
+These panels are connected to the daughterboards found on the
+ARM Versatile reference designs.
+
+This device node must appear as a child to a "syscon"-compatible
+node.
+
+Required properties:
+- compatible: should be "arm,versatile-tft-panel"
+
+Required subnodes:
+- port: see display/panel/panel-common.txt, graph.txt
+
+
+Example:
+
+sysreg@0 {
+   compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
+   reg = <0x0 0x1000>;
+
+   panel: display@0 {
+   compatible = "arm,versatile-tft-panel";
+
+   port {
+   panel_in: endpoint {
+   remote-endpoint = <&foo>;
+   };
+   };
+   };
+};
-- 
2.14.3

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[PATCH 2/2] drm/panel: Add support for ARM Versatile panels

[Linus Walleij]

The ARM reference designs "Versatile AB" and "Versatile PB"
contain panel connectors with autodetection of the connected
panel type. This adds a small driver utilizing the MFD syscon
look-up to read the autodetection register and set up the
corresponding panel appropriately.

In the source file there is a bit of elaboration of the
panel types and interfaces on these boards.

This was tested with the PL111 DRM driver on the ARM Versatile
AB with the IB2 daughterboard.

Signed-off-by: Linus Walleij 
---
 MAINTAINERS |   7 +
 drivers/gpu/drm/panel/Kconfig   |  10 +
 drivers/gpu/drm/panel/Makefile  |   1 +
 drivers/gpu/drm/panel/panel-arm-versatile.c | 353 
 4 files changed, 371 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-arm-versatile.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 18994806e441..e4fc490fa320 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4442,6 +4442,13 @@ T:   git git://anongit.freedesktop.org/drm/drm-misc
 S: Supported
 F: drivers/gpu/drm/pl111/
 
+DRM DRIVER FOR ARM VERSATILE TFT PANELS
+M: Linus Walleij 
+T: git git://anongit.freedesktop.org/drm/drm-misc
+S: Maintained
+F: drivers/gpu/drm/panel/panel-arm-versatile.c
+F: 
Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.txt
+
 DRM DRIVER FOR AST SERVER GRAPHICS CHIPS
 M: Dave Airlie 
 S: Odd Fixes
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 726f3fb3312d..04732adbb48f 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -7,6 +7,16 @@ config DRM_PANEL
 menu "Display Panels"
depends on DRM && DRM_PANEL
 
+config DRM_PANEL_ARM_VERSATILE
+   tristate "ARM Versatile panel driver"
+   depends on OF
+   depends on MFD_SYSCON
+   select VIDEOMODE_HELPERS
+   help
+ This driver supports the ARM Versatile panels connected to ARM
+ reference designs. The panel is detected using special registers
+ in the Versatile family syscon registers.
+
 config DRM_PANEL_LVDS
tristate "Generic LVDS panel driver"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 2c4e1a93e05f..091fa6647769 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o
 obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
 obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c 
b/drivers/gpu/drm/panel/panel-arm-versatile.c
new file mode 100644
index ..ce778ca20f3f
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-arm-versatile.c
@@ -0,0 +1,353 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Panel driver for the ARM Versatile family reference designs from
+ * ARM Limited.
+ *
+ * Author:
+ * Linus Walleij 
+ *
+ * On the Versatile AB, these panels come mounted on daughterboards
+ * named "IB1" or "IB2" (Interface Board 1 & 2 respectively.) They
+ * are documented in ARM DUI 0225D Appendix C and D. These daughter
+ * boards support TFT display panels.
+ *
+ * - The IB1 is a passive board where the display connector defines a
+ *   few wires for encoding the display type for autodetection,
+ *   suitable display settings can then be looked up from this setting.
+ *   The magic bits can be read out from the system controller.
+ *
+ * - The IB2 is a more complex board intended for GSM phone development
+ *   with some logic and a control register, which needs to be accessed
+ *   and the board display needs to be turned on explicitly.
+ *
+ * On the Versatile PB, a special CLCD adaptor board is available
+ * supporting the same displays as the Versatile AB, plus one more
+ * Epson QCIF display.
+ *
+ */
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+/*
+ * This configuration register in the Versatile and RealView
+ * family is uniformly present but appears more and more
+ * unutilized starting with the RealView series.
+ */
+#define SYS_CLCD   0x50
+
+/* The Versatile can detect the connected panel type */
+#define SYS_CLCD_CLCDID_MASK   (BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12))
+#define SYS_CLCD_ID_SANYO_3_8  (0x00 << 8)
+#define SYS_CLCD_ID_SHARP_8_4  (0x01 << 8)
+#define SYS_CLCD_ID_EPSON_2_2  (0x02 << 8)
+#define SYS_CLCD_ID_SANYO_2_5  (0x07 << 8)
+#define SYS_CLCD_ID_VGA(0x1f << 8)
+
+/* IB2 control register for the Versatile daughterboard */
+#define IB2_CTRL   0x00
+#define IB2_CTRL_LCD_SDBIT(1) /* 1 = shut down LCD */
+#define IB2_CTRL_LCD_BL_ON BIT(0)
+#define IB2_CTRL_LCD_MA