Re: [PATCH v12 21/38] mei: me: add ice lake point device id.

2019-02-08 Thread Greg KH
On Sat, Feb 09, 2019 at 12:42:50PM +0530, Ramalingam C wrote:
> From: Tomas Winkler 
> 
> Add icelake mei device id.
> 
> Cc: 
> Signed-off-by: Tomas Winkler 
> Signed-off-by: Greg Kroah-Hartman 
> Cherry-picked from 
> git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git  
> char-misc-linus
> ---
>  drivers/misc/mei/hw-me-regs.h | 2 ++
>  drivers/misc/mei/pci-me.c | 2 ++
>  2 files changed, 4 insertions(+)

Why are you sending us patches that are already applied?
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[PATCH v12 36/38] FOR_TEST_ONLY: i915/Kconfig: Select mei_hdcp by I915

2019-02-08 Thread Ramalingam C
FOR TESTING PURPOSE ONLY.

By default INTEL_MEI_HDCP is set to y. This patch is created to
test the interface between I915 and MEI_HDCP.

Signed-off-by: Ramalingam C 
---
 drivers/misc/mei/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index 64a7b3483895..e5defb2e1557 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -48,5 +48,6 @@ config INTEL_MEI_HDCP
tristate "Intel HDCP2.2 services of ME Interface"
select INTEL_MEI_ME
depends on DRM_I915
+   default y
help
  MEI Support for HDCP2.2 Services on Intel platforms.
-- 
2.7.4

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[PATCH v12 35/38] misc/mei/hdcp: Component framework for I915 Interface

2019-02-08 Thread Ramalingam C
Mei hdcp driver is designed as component slave for the I915 component
master.

v2: Rebased.
v3:
  Notifier chain is adopted for cldev state update [Tomas]
v4:
  Made static dummy functions as inline in mei_hdcp.h
  API for polling client device status
  IS_ENABLED used in header, for config status for mei_hdcp.
v5:
  Replacing the notifier with component framework. [Daniel]
v6:
  Rebased on the I915 comp master redesign.
v7:
  mei_hdcp_component_registered is made static [Uma]
  Need for global static variable mei_cldev is removed.
v8:
  master comp is added to be matched with i915 subcomponent [daniel]
v9:
  only comp_master is set and retrieved as driver_data [Daniel]
  Reviewed-by Daniel.
v10:
  small corrections at probe [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 82 +++-
 1 file changed, 80 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 6f4ac71dcd92..6f606c0cf07a 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -706,8 +707,7 @@ mei_hdcp_close_session(struct device *dev, struct 
hdcp_port_data *data)
return 0;
 }
 
-static __attribute__((unused))
-struct i915_hdcp_component_ops mei_hdcp_ops = {
+static struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
.initiate_hdcp2_session = mei_hdcp_initiate_session,
.verify_receiver_cert_prepare_km =
@@ -724,20 +724,98 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
.close_hdcp_session = mei_hdcp_close_session,
 };
 
+static int mei_component_master_bind(struct device *dev)
+{
+   struct mei_cl_device *cldev = to_mei_cl_device(dev);
+   struct i915_hdcp_comp_master *comp_master =
+   mei_cldev_get_drvdata(cldev);
+   int ret;
+
+   dev_info(dev, "%s\n", __func__);
+   comp_master->ops = &mei_hdcp_ops;
+   comp_master->mei_dev = dev;
+   ret = component_bind_all(dev, comp_master);
+   if (ret < 0)
+   return ret;
+
+   return 0;
+}
+
+static void mei_component_master_unbind(struct device *dev)
+{
+   struct mei_cl_device *cldev = to_mei_cl_device(dev);
+   struct i915_hdcp_comp_master *comp_master =
+   mei_cldev_get_drvdata(cldev);
+
+   dev_info(dev, "%s\n", __func__);
+   component_unbind_all(dev, comp_master);
+}
+
+static const struct component_master_ops mei_component_master_ops = {
+   .bind = mei_component_master_bind,
+   .unbind = mei_component_master_unbind,
+};
+
+static int mei_hdcp_component_match(struct device *dev, int subcomponent,
+   void *data)
+{
+   return !strcmp(dev->driver->name, "i915") &&
+  subcomponent == I915_COMPONENT_HDCP;
+}
+
 static int mei_hdcp_probe(struct mei_cl_device *cldev,
  const struct mei_cl_device_id *id)
 {
+   struct i915_hdcp_comp_master *comp_master;
+   struct component_match *master_match;
int ret;
 
ret = mei_cldev_enable(cldev);
if (ret < 0)
dev_err(&cldev->dev, "mei_cldev_enable Failed. %d\n", ret);
 
+   comp_master = kzalloc(sizeof(*comp_master), GFP_KERNEL);
+   if (!comp_master) {
+   ret = -ENOMEM;
+   goto err_exit;
+   }
+
+   master_match = NULL;
+   component_match_add_typed(&cldev->dev, &master_match,
+ mei_hdcp_component_match, comp_master);
+   if (IS_ERR_OR_NULL(master_match)) {
+   ret = -ENOMEM;
+   goto err_exit;
+   }
+
+   mei_cldev_set_drvdata(cldev, comp_master);
+   ret = component_master_add_with_match(&cldev->dev,
+ &mei_component_master_ops,
+ master_match);
+   if (ret < 0) {
+   dev_err(&cldev->dev, "Master comp add failed %d\n", ret);
+   goto err_exit;
+   }
+
+   return 0;
+
+err_exit:
+   mei_cldev_set_drvdata(cldev, NULL);
+   kfree(comp_master);
+   mei_cldev_disable(cldev);
+
return ret;
 }
 
 static int mei_hdcp_remove(struct mei_cl_device *cldev)
 {
+   struct i915_hdcp_comp_master *comp_master =
+   mei_cldev_get_drvdata(cldev);
+
+   component_master_del(&cldev->dev, &mei_component_master_ops);
+   kfree(comp_master);
+   mei_cldev_set_drvdata(cldev, NULL);
+
return mei_cldev_disable(cldev);
 }
 
-- 
2.7.4

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[PATCH v12 33/38] misc/mei/hdcp: Enabling the HDCP authentication

2019-02-08 Thread Ramalingam C
Request to ME to configure a port as authenticated.

On Success, ME FW will mark the port as authenticated and provides
HDCP cipher with the encryption keys.

Enabling the Authentication can be requested once all stages of
HDCP2.2 authentication is completed by interacting with ME FW.

Only after this stage, driver can enable the HDCP encryption for
the port, through HW registers.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Style and typos fixed [Uma]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebased.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition. [Tomas]
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 55 +++-
 1 file changed, 54 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 7d0562c2a773..8ecb3d4cf802 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -600,6 +600,59 @@ static int mei_hdcp_verify_mprime(struct device *dev,
return 0;
 }
 
+/**
+ * mei_hdcp_enable_authentication() - Mark a port as authenticated
+ * through ME FW
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int mei_hdcp_enable_authentication(struct device *dev,
+ struct hdcp_port_data *data)
+{
+   struct wired_cmd_enable_auth_in enable_auth_in = { { 0 } };
+   struct wired_cmd_enable_auth_out enable_auth_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   enable_auth_in.header.api_version = HDCP_API_VERSION;
+   enable_auth_in.header.command_id = WIRED_ENABLE_AUTH;
+   enable_auth_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
+
+   enable_auth_in.port.integrated_port_type = data->port_type;
+   enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
+   enable_auth_in.stream_type = data->streams[0].stream_type;
+
+   byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
+ sizeof(enable_auth_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&enable_auth_out,
+ sizeof(enable_auth_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (enable_auth_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
+   WIRED_ENABLE_AUTH, enable_auth_out.header.status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -614,7 +667,7 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
.repeater_check_flow_prepare_ack =
mei_hdcp_repeater_check_flow_prepare_ack,
.verify_mprime = mei_hdcp_verify_mprime,
-   .enable_hdcp_authentication = NULL,
+   .enable_hdcp_authentication = mei_hdcp_enable_authentication,
.close_hdcp_session = NULL,
 };
 
-- 
2.7.4

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[PATCH v12 38/38] FOR_TESTING_ONLY: ICL: Limit clk to <= 340MHz

2019-02-08 Thread Ramalingam C
Pruning 4k60 modes.

Signed-off-by: Ramalingam C 
---
 drivers/gpu/drm/i915/intel_hdmi.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index c2c91e6645a5..d60713cd658c 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1800,6 +1800,9 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
return MODE_NO_DBLESCAN;
 
+   if (mode->clock > 34)
+   return MODE_CLOCK_HIGH;
+
clock = mode->clock;
 
if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == 
DRM_MODE_FLAG_3D_FRAME_PACKING)
-- 
2.7.4

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[PATCH v12 37/38] FOR_TESTING_ONLY: debugfs: Excluding the LSPCon for HDCP1.4

2019-02-08 Thread Ramalingam C
Just excluding the LSPCon HDMI ports from the HDCP1.4 testing.

Signed-off-by: Ramalingam C 
---
 drivers/gpu/drm/i915/i915_debugfs.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 20a49cc4a9a1..7095e1239280 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4782,6 +4782,9 @@ static int i915_hdcp_sink_capability_show(struct seq_file 
*m, void *data)
 {
struct drm_connector *connector = m->private;
struct intel_connector *intel_connector = to_intel_connector(connector);
+   struct intel_digital_port *intel_dig_port =
+   conn_to_dig_port(intel_connector);
+   bool is_hdcp14;
 
if (connector->status != connector_status_connected)
return -ENODEV;
@@ -4792,8 +4795,11 @@ static int i915_hdcp_sink_capability_show(struct 
seq_file *m, void *data)
 
seq_printf(m, "%s:%d HDCP version: ", connector->name,
   connector->base.id);
-   seq_printf(m, "%s ", !intel_hdcp_capable(intel_connector) ?
-  "None" : "HDCP1.4");
+
+   /* Excluding the Lspcon for Testing Purpose */
+   is_hdcp14 = intel_hdcp_capable(intel_connector) &&
+   !intel_dig_port->lspcon.active;
+   seq_printf(m, "%s ", !is_hdcp14 ? "None" : "HDCP1.4");
seq_puts(m, "\n");
 
return 0;
-- 
2.7.4

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[PATCH v12 32/38] misc/mei/hdcp: Verify M_prime

2019-02-08 Thread Ramalingam C
Request to ME to verify the M_Prime received from the HDCP sink.

ME FW will calculate the M and compare with M_prime received
as part of RepeaterAuth_Stream_Ready, which is HDCP2.2 protocol msg.

On successful completion of this stage, downstream propagation of
the stream management info is completed.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  endianness conversion func is moved to drm_hdcp.h [Uma]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition. [Tomas]
  drm_hdcp2_u32_to_seq_num() is used for u32 to seq_num.
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 67 +++-
 1 file changed, 66 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 6cd76b3bcaea..7d0562c2a773 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -535,6 +535,71 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device 
*dev,
return 0;
 }
 
+/**
+ * mei_hdcp_verify_mprime() - Verify mprime.
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @stream_ready: RepeaterAuth_Stream_Ready msg for ME FW verification.
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int mei_hdcp_verify_mprime(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_rep_stream_ready *stream_ready)
+{
+   struct wired_cmd_repeater_auth_stream_req_in
+   verify_mprime_in = { { 0 } };
+   struct wired_cmd_repeater_auth_stream_req_out
+   verify_mprime_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !stream_ready || !data)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   verify_mprime_in.header.api_version = HDCP_API_VERSION;
+   verify_mprime_in.header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
+   verify_mprime_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   verify_mprime_in.header.buffer_len =
+   WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
+
+   verify_mprime_in.port.integrated_port_type = data->port_type;
+   verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
+  HDCP_2_2_MPRIME_LEN);
+   drm_hdcp2_u32_to_seq_num(verify_mprime_in.seq_num_m, data->seq_num_m);
+   memcpy(verify_mprime_in.streams, data->streams,
+  (data->k * sizeof(struct hdcp2_streamid_type)));
+
+   verify_mprime_in.k = __swab16(data->k);
+
+   byte = mei_cldev_send(cldev, (u8 *)&verify_mprime_in,
+ sizeof(verify_mprime_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&verify_mprime_out,
+ sizeof(verify_mprime_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (verify_mprime_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
+   WIRED_REPEATER_AUTH_STREAM_REQ,
+   verify_mprime_out.header.status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -548,7 +613,7 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
.get_session_key = mei_hdcp_get_session_key,
.repeater_check_flow_prepare_ack =
mei_hdcp_repeater_check_flow_prepare_ack,
-   .verify_mprime = NULL,
+   .verify_mprime = mei_hdcp_verify_mprime,
.enable_hdcp_authentication = NULL,
.close_hdcp_session = NULL,
 };
-- 
2.7.4

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[PATCH v12 34/38] misc/mei/hdcp: Closing wired HDCP2.2 Tx Session

2019-02-08 Thread Ramalingam C
Request the ME to terminate the HDCP2.2 session for a port.

On Success, ME FW will mark the intel port as Deauthenticated and
terminate the wired HDCP2.2 Tx session started due to the cmd
WIRED_INITIATE_HDCP2_SESSION.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Style and typos fixed [Uma]
v5:
  Extra line is removed.
v6:
  Collected the Rb-ed by.
  Rebased.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition.[Tomas]
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 55 +++-
 1 file changed, 54 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 8ecb3d4cf802..6f4ac71dcd92 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -653,6 +653,59 @@ static int mei_hdcp_enable_authentication(struct device 
*dev,
return 0;
 }
 
+/**
+ * mei_hdcp_close_session() - Close the Wired HDCP Tx session of ME FW per 
port.
+ * This also disables the authenticated state of the port.
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
+{
+   struct wired_cmd_close_session_in session_close_in = { { 0 } };
+   struct wired_cmd_close_session_out session_close_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   session_close_in.header.api_version = HDCP_API_VERSION;
+   session_close_in.header.command_id = WIRED_CLOSE_SESSION;
+   session_close_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   session_close_in.header.buffer_len =
+   WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
+
+   session_close_in.port.integrated_port_type = data->port_type;
+   session_close_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
+ sizeof(session_close_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&session_close_out,
+ sizeof(session_close_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (session_close_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "Session Close Failed. status: 0x%X\n",
+   session_close_out.header.status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -668,7 +721,7 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
mei_hdcp_repeater_check_flow_prepare_ack,
.verify_mprime = mei_hdcp_verify_mprime,
.enable_hdcp_authentication = mei_hdcp_enable_authentication,
-   .close_hdcp_session = NULL,
+   .close_hdcp_session = mei_hdcp_close_session,
 };
 
 static int mei_hdcp_probe(struct mei_cl_device *cldev,
-- 
2.7.4

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[PATCH v12 15/38] drm/i915: Implement the HDCP2.2 support for DP

2019-02-08 Thread Ramalingam C
Implements the DP adaptation specific HDCP2.2 functions.

These functions perform the DPCD read and write for communicating the
HDCP2.2 auth message back and forth.

v2:
  wait for cp_irq is merged with this patch. Rebased.
v3:
  wait_queue is used for wait for cp_irq [Chris Wilson]
v4:
  Style fixed.
  %s/PARING/PAIRING
  Few style fixes [Uma]
v5:
  Lookup table for DP HDCP2.2 msg details [Daniel].
  Extra lines are removed.
v6: Rebased.
v7:
  Fixed some regression introduced at v5. [Ankit]
  Macro HDCP_2_2_RX_CAPS_VERSION_VAL is reused [Uma]
  Converted a function to inline [Uma]
  %s/uintxx_t/uxx
v8:
  Error due to the sinks are reported as DEBUG logs.
  Adjust to the new mei interface.
v9:
  ARRAY_SIZE for no of array members [Jon & Daniel]
  return of the wait_for_cp_irq is made as void [Daniel]
  Wait for HDCP2.2 msg is done based on polling the reg bit than
CP_IRQ based. [Daniel]
  hdcp adaptation is added as a const in the hdcp_shim [Daniel]
v10:
  config_stream_type is redefined [Daniel]
  DP Errata specific defines are moved into intel_dp.c.

Signed-off-by: Ramalingam C 
Signed-off-by: Ankit K Nautiyal 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_dp.c | 333 
 1 file changed, 333 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9f73a4239574..e9fe25f21200 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5847,6 +5847,333 @@ int intel_dp_hdcp_capable(struct intel_digital_port 
*intel_dig_port,
return 0;
 }
 
+struct hdcp2_dp_errata_stream_type {
+   u8  msg_id;
+   u8  stream_type;
+} __packed;
+
+static struct hdcp2_dp_msg_data {
+   u8 msg_id;
+   u32 offset;
+   bool msg_detectable;
+   u32 timeout;
+   u32 timeout2; /* Added for non_paired situation */
+   } hdcp2_msg_data[] = {
+   {HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0},
+   {HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
+   false, HDCP_2_2_CERT_TIMEOUT_MS, 0},
+   {HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
+   false, 0, 0},
+   {HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
+   false, 0, 0},
+   {HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
+   true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
+   HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
+   {HDCP_2_2_AKE_SEND_PAIRING_INFO,
+   DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
+   HDCP_2_2_PAIRING_TIMEOUT_MS, 0},
+   {HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0},
+   {HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
+   false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0},
+   {HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
+   0, 0},
+   {HDCP_2_2_REP_SEND_RECVID_LIST,
+   DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
+   HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
+   {HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
+   0, 0},
+   {HDCP_2_2_REP_STREAM_MANAGE,
+   DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
+   0, 0},
+   {HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
+   false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0},
+/* local define to shovel this through the write_2_2 interface */
+#define HDCP_2_2_ERRATA_DP_STREAM_TYPE 50
+   {HDCP_2_2_ERRATA_DP_STREAM_TYPE,
+   DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
+   0, 0},
+   };
+
+static inline
+int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
+ u8 *rx_status)
+{
+   ssize_t ret;
+
+   ret = drm_dp_dpcd_read(&intel_dig_port->dp.aux,
+  DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
+  HDCP_2_2_DP_RXSTATUS_LEN);
+   if (ret != HDCP_2_2_DP_RXSTATUS_LEN) {
+   DRM_DEBUG_KMS("Read bstatus from DP/AUX failed (%zd)\n", ret);
+   return ret >= 0 ? -EIO : ret;
+   }
+
+   return 0;
+}
+
+static
+int hdcp2_detect_msg_availability(struct intel_digital_port *intel_dig_port,
+ u8 msg_id, bool *msg_ready)
+{
+   u8 rx_status;
+   int ret;
+
+   *msg_ready = false;
+   ret = intel_dp_hdcp2_read_rx_status(intel_dig_port, &rx_status);
+   if (ret < 0)
+   return ret;
+
+   switch 

[PATCH v12 24/38] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session

2019-02-08 Thread Ramalingam C
Request ME FW to start the HDCP2.2 session for an intel port.
Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sends
to ME FW.

On Success, ME FW will start a HDCP2.2 session for the port and
provides the content for HDCP2.2 AKE_Init message.

v2: Rebased.
v3:
  cldev is add as a separate parameter [Tomas]
  Redundant comment and typecast are removed [Tomas]
v4:
  %zd is used for size [Alexander]
  %s/return -1/return -EIO [Alexander]
  Spellings in commit msg is fixed [Uma]
v5: Rebased.
v6:
  Collected the rb-ed by.
  Realigning the patches in the series.
v7:
  Adjust to the new mei interface.
  Fix for kdoc.
v8:
  K-Doc Addition.
  memcpy for const length.
v9:
  s/mei_hdcp_ddi/mei_fw_ddi
  s/i915_port/mei_i915_port [Tomas]
  renamed func as mei_hdcp_* [Tomas]
  Instead of macro, inline func for ddi index is used. [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 89 
 drivers/misc/mei/hdcp/mei_hdcp.h | 23 +++
 2 files changed, 112 insertions(+)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 8df069c1b0cc..56d3ac1e6831 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -23,6 +23,95 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+
+#include "mei_hdcp.h"
+
+static inline u8 mei_get_ddi_index(short int port)
+{
+   enum mei_i915_port i915_port = (enum mei_i915_port)port;
+
+   return (u8)(i915_port == PORT_A ? MEI_DDI_A : i915_port);
+}
+
+/**
+ * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @ake_data: AKE_Init msg output.
+ *
+ * Return:  0 on Success, <0 on Failure.
+ */
+static int
+mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
+ struct hdcp2_ake_init *ake_data)
+{
+   struct wired_cmd_initiate_hdcp2_session_in session_init_in = { { 0 } };
+   struct wired_cmd_initiate_hdcp2_session_out
+   session_init_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data || !ake_data)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   session_init_in.header.api_version = HDCP_API_VERSION;
+   session_init_in.header.command_id = WIRED_INITIATE_HDCP2_SESSION;
+   session_init_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   session_init_in.header.buffer_len =
+   WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
+
+   session_init_in.port.integrated_port_type = data->port_type;
+   session_init_in.port.physical_port = mei_get_ddi_index(data->port);
+   session_init_in.protocol = data->protocol;
+
+   byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
+ sizeof(session_init_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&session_init_out,
+ sizeof(session_init_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (session_init_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n",
+   WIRED_INITIATE_HDCP2_SESSION,
+   session_init_out.header.status);
+   return -EIO;
+   }
+
+   ake_data->msg_id = HDCP_2_2_AKE_INIT;
+   ake_data->tx_caps = session_init_out.tx_caps;
+   memcpy(ake_data->r_tx, session_init_out.r_tx, HDCP_2_2_RTX_LEN);
+
+   return 0;
+}
+
+static __attribute__((unused))
+struct i915_hdcp_component_ops mei_hdcp_ops = {
+   .owner = THIS_MODULE,
+   .initiate_hdcp2_session = mei_hdcp_initiate_session,
+   .verify_receiver_cert_prepare_km = NULL,
+   .verify_hprime = NULL,
+   .store_pairing_info = NULL,
+   .initiate_locality_check = NULL,
+   .verify_lprime = NULL,
+   .get_session_key = NULL,
+   .repeater_check_flow_prepare_ack = NULL,
+   .verify_mprime = NULL,
+   .enable_hdcp_authentication = NULL,
+   .close_hdcp_session = NULL,
+};
 
 static int mei_hdcp_probe(struct mei_cl_device *cldev,
  const struct mei_cl_device_id *id)
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
index 582a7e27ae29..28686f2ae88c 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.h
+++ b/drivers/misc/mei/hdcp/mei_hdcp.h
@@ -363,4 +363,27 @@ struct wired_cmd_repeater_auth_stream_req_out {
struct hdcp_port_id port;
 } __packed;
 
+enum mei_fw_ddi {
+   MEI_DDI_INVALID_PORT = 0x0,
+
+   MEI_DDI_B = 1

[PATCH v12 31/38] misc/mei/hdcp: Repeater topology verification and ack

2019-02-08 Thread Ramalingam C
Request ME to verify the downstream topology information received.

ME FW will validate the Repeaters receiver id list and
downstream topology.

On Success ME FW will provide the Least Significant
128bits of VPrime, which forms the repeater ack.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Style and typos fixed [Uma]
v5: Rebased.
v6: Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition. [Tomas]
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 77 +++-
 1 file changed, 76 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index c5164c52a3b9..6cd76b3bcaea 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -461,6 +461,80 @@ static int mei_hdcp_get_session_key(struct device *dev,
return 0;
 }
 
+/**
+ * mei_hdcp_repeater_check_flow_prepare_ack() - Validate the Downstream 
topology
+ * and prepare rep_ack.
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @rep_topology: Receiver ID List to be validated
+ * @rep_send_ack : repeater ack from ME FW.
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
+struct hdcp_port_data *data,
+struct hdcp2_rep_send_receiverid_list
+   *rep_topology,
+struct hdcp2_rep_send_ack
+   *rep_send_ack)
+{
+   struct wired_cmd_verify_repeater_in verify_repeater_in = { { 0 } };
+   struct wired_cmd_verify_repeater_out verify_repeater_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !rep_topology || !rep_send_ack || !data)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   verify_repeater_in.header.api_version = HDCP_API_VERSION;
+   verify_repeater_in.header.command_id = WIRED_VERIFY_REPEATER;
+   verify_repeater_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   verify_repeater_in.header.buffer_len =
+   WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
+
+   verify_repeater_in.port.integrated_port_type = data->port_type;
+   verify_repeater_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
+  HDCP_2_2_RXINFO_LEN);
+   memcpy(verify_repeater_in.seq_num_v, rep_topology->seq_num_v,
+  HDCP_2_2_SEQ_NUM_LEN);
+   memcpy(verify_repeater_in.v_prime, rep_topology->v_prime,
+  HDCP_2_2_V_PRIME_HALF_LEN);
+   memcpy(verify_repeater_in.receiver_ids, rep_topology->receiver_ids,
+  HDCP_2_2_RECEIVER_IDS_MAX_LEN);
+
+   byte = mei_cldev_send(cldev, (u8 *)&verify_repeater_in,
+ sizeof(verify_repeater_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&verify_repeater_out,
+ sizeof(verify_repeater_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (verify_repeater_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
+   WIRED_VERIFY_REPEATER,
+   verify_repeater_out.header.status);
+   return -EIO;
+   }
+
+   memcpy(rep_send_ack->v, verify_repeater_out.v,
+  HDCP_2_2_V_PRIME_HALF_LEN);
+   rep_send_ack->msg_id = HDCP_2_2_REP_SEND_ACK;
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -472,7 +546,8 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
.initiate_locality_check = mei_hdcp_initiate_locality_check,
.verify_lprime = mei_hdcp_verify_lprime,
.get_session_key = mei_hdcp_get_session_key,
-   .repeater_check_flow_prepare_ack = NULL,
+   .repeater_check_flow_prepare_ack =
+   mei_hdcp_repeater_check_flow_prepare_ack,
.verify_mprime = NULL,
.enable_hdcp_authentication = NULL,
.close_hdcp_session = NULL,
-- 
2.7.4

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[PATCH v12 26/38] misc/mei/hdcp: Verify H_prime

2019-02-08 Thread Ramalingam C
Requests for the verification of AKE_Send_H_prime.

ME will calculate the H and comparing it with received H_Prime.
The result will be returned as status.

Here AKE_Send_H_prime is a HDCP2.2 Authentication msg.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Styles and typos fixed [Uma]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc Addition [Tomas]
  memcpy for const length.
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 58 +++-
 1 file changed, 57 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index a67a599b31f1..069a53c60bfc 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -177,13 +177,69 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device 
*dev,
return 0;
 }
 
+/**
+ * mei_hdcp_verify_hprime() - Verify AKE_Send_H_prime at ME FW.
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @rx_hprime: AKE_Send_H_prime msg for ME FW verification
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
+  struct hdcp2_ake_send_hprime *rx_hprime)
+{
+   struct wired_cmd_ake_send_hprime_in send_hprime_in = { { 0 } };
+   struct wired_cmd_ake_send_hprime_out send_hprime_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data || !rx_hprime)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   send_hprime_in.header.api_version = HDCP_API_VERSION;
+   send_hprime_in.header.command_id = WIRED_AKE_SEND_HPRIME;
+   send_hprime_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
+
+   send_hprime_in.port.integrated_port_type = data->port_type;
+   send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
+  HDCP_2_2_H_PRIME_LEN);
+
+   byte = mei_cldev_send(cldev, (u8 *)&send_hprime_in,
+ sizeof(send_hprime_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&send_hprime_out,
+ sizeof(send_hprime_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (send_hprime_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n",
+   WIRED_AKE_SEND_HPRIME, send_hprime_out.header.status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
.initiate_hdcp2_session = mei_hdcp_initiate_session,
.verify_receiver_cert_prepare_km =
mei_hdcp_verify_receiver_cert_prepare_km,
-   .verify_hprime = NULL,
+   .verify_hprime = mei_hdcp_verify_hprime,
.store_pairing_info = NULL,
.initiate_locality_check = NULL,
.verify_lprime = NULL,
-- 
2.7.4

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[PATCH v12 18/38] drm/i915: Fix KBL HDCP2.2 encrypt status signalling

2019-02-08 Thread Ramalingam C
HDCP transmitter is supposed to indicate the HDCP encryption status of
the link through enc_en signals in a window of time called "window of
opportunity" defined by HDCP HDMI spec.

But on KBL this timing of signalling has an issue. To fix the issue this
WA of resetting the signalling is required.

v2:
  WA is moved into the toggle_signalling [Daniel]
v3:
  Commit msg is rewritten with more information
v4:
  Reviewed-by Daniel.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
---
 drivers/gpu/drm/i915/intel_hdmi.c | 42 +++
 1 file changed, 42 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index 6a3e400f54d7..c2c91e6645a5 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1083,10 +1083,44 @@ int intel_hdmi_hdcp_read_v_prime_part(struct 
intel_digital_port *intel_dig_port,
return ret;
 }
 
+static int kbl_repositioning_enc_en_signal(struct intel_connector *connector)
+{
+   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+   struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+   struct drm_crtc *crtc = connector->base.state->crtc;
+   struct intel_crtc *intel_crtc = container_of(crtc,
+struct intel_crtc, base);
+   u32 scanline;
+   int ret;
+
+   for (;;) {
+   scanline = I915_READ(PIPEDSL(intel_crtc->pipe));
+   if (scanline > 100 && scanline < 200)
+   break;
+   usleep_range(25, 50);
+   }
+
+   ret = intel_ddi_toggle_hdcp_signalling(&intel_dig_port->base, false);
+   if (ret) {
+   DRM_ERROR("Disable HDCP signalling failed (%d)\n", ret);
+   return ret;
+   }
+   ret = intel_ddi_toggle_hdcp_signalling(&intel_dig_port->base, true);
+   if (ret) {
+   DRM_ERROR("Enable HDCP signalling failed (%d)\n", ret);
+   return ret;
+   }
+
+   return 0;
+}
+
 static
 int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port 
*intel_dig_port,
  bool enable)
 {
+   struct intel_hdmi *hdmi = &intel_dig_port->hdmi;
+   struct intel_connector *connector = hdmi->attached_connector;
+   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
int ret;
 
if (!enable)
@@ -1098,6 +1132,14 @@ int intel_hdmi_hdcp_toggle_signalling(struct 
intel_digital_port *intel_dig_port,
  enable ? "Enable" : "Disable", ret);
return ret;
}
+
+   /*
+* WA: To fix incorrect positioning of the window of
+* opportunity and enc_en signalling in KABYLAKE.
+*/
+   if (IS_KABYLAKE(dev_priv) && enable)
+   return kbl_repositioning_enc_en_signal(connector);
+
return 0;
 }
 
-- 
2.7.4

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[PATCH v12 16/38] drm/i915: Implement the HDCP2.2 support for HDMI

2019-02-08 Thread Ramalingam C
Implements the HDMI adaptation specific HDCP2.2 operations.

Basically these are DDC read and write for authenticating through
HDCP2.2 messages.

v2: Rebased.
v3:
  No more special handling of Gmbus burst read for AKE_SEND_CERT.
  Style fixed with few naming. [Uma]
  %s/PARING/PAIRING
v4:
  msg_sz is initialized at definition.
  Lookup table is defined for HDMI HDCP2.2 msgs [Daniel].
v5: Rebased.
v6:
  Make a function as inline [Uma]
  %s/uintxx_t/uxx
v7:
  Errors due to sinks are reported as DEBUG logs.
  Adjust to the new mei interface.
v8:
  ARRAY_SIZE for the # of array members [Jon & Daniel].
  hdcp adaptation is added as a const in the hdcp_shim [Daniel]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_hdmi.c | 189 ++
 1 file changed, 189 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index faeedf76db99..6a3e400f54d7 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1129,6 +1129,190 @@ bool intel_hdmi_hdcp_check_link(struct 
intel_digital_port *intel_dig_port)
return true;
 }
 
+static struct hdcp2_hdmi_msg_data {
+   u8 msg_id;
+   u32 timeout;
+   u32 timeout2;
+   } hdcp2_msg_data[] = {
+   {HDCP_2_2_AKE_INIT, 0, 0},
+   {HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT_MS, 0},
+   {HDCP_2_2_AKE_NO_STORED_KM, 0, 0},
+   {HDCP_2_2_AKE_STORED_KM, 0, 0},
+   {HDCP_2_2_AKE_SEND_HPRIME, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
+   HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
+   {HDCP_2_2_AKE_SEND_PAIRING_INFO, HDCP_2_2_PAIRING_TIMEOUT_MS,
+   0},
+   {HDCP_2_2_LC_INIT, 0, 0},
+   {HDCP_2_2_LC_SEND_LPRIME, HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS, 0},
+   {HDCP_2_2_SKE_SEND_EKS, 0, 0},
+   {HDCP_2_2_REP_SEND_RECVID_LIST,
+   HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
+   {HDCP_2_2_REP_SEND_ACK, 0, 0},
+   {HDCP_2_2_REP_STREAM_MANAGE, 0, 0},
+   {HDCP_2_2_REP_STREAM_READY, HDCP_2_2_STREAM_READY_TIMEOUT_MS,
+   0},
+   };
+
+static
+int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
+   uint8_t *rx_status)
+{
+   return intel_hdmi_hdcp_read(intel_dig_port,
+   HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET,
+   rx_status,
+   HDCP_2_2_HDMI_RXSTATUS_LEN);
+}
+
+static int get_hdcp2_msg_timeout(u8 msg_id, bool is_paired)
+{
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(hdcp2_msg_data); i++)
+   if (hdcp2_msg_data[i].msg_id == msg_id &&
+   (msg_id != HDCP_2_2_AKE_SEND_HPRIME || is_paired))
+   return hdcp2_msg_data[i].timeout;
+   else if (hdcp2_msg_data[i].msg_id == msg_id)
+   return hdcp2_msg_data[i].timeout2;
+
+   return -EINVAL;
+}
+
+static inline
+int hdcp2_detect_msg_availability(struct intel_digital_port 
*intel_digital_port,
+ u8 msg_id, bool *msg_ready,
+ ssize_t *msg_sz)
+{
+   u8 rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN];
+   int ret;
+
+   ret = intel_hdmi_hdcp2_read_rx_status(intel_digital_port, rx_status);
+   if (ret < 0) {
+   DRM_DEBUG_KMS("rx_status read failed. Err %d\n", ret);
+   return ret;
+   }
+
+   *msg_sz = ((HDCP_2_2_HDMI_RXSTATUS_MSG_SZ_HI(rx_status[1]) << 8) |
+ rx_status[0]);
+
+   if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST)
+   *msg_ready = (HDCP_2_2_HDMI_RXSTATUS_READY(rx_status[1]) &&
+*msg_sz);
+   else
+   *msg_ready = *msg_sz;
+
+   return 0;
+}
+
+static ssize_t
+intel_hdmi_hdcp2_wait_for_msg(struct intel_digital_port *intel_dig_port,
+ u8 msg_id, bool paired)
+{
+   bool msg_ready = false;
+   int timeout, ret;
+   ssize_t msg_sz = 0;
+
+   timeout = get_hdcp2_msg_timeout(msg_id, paired);
+   if (timeout < 0)
+   return timeout;
+
+   ret = __wait_for(ret = hdcp2_detect_msg_availability(intel_dig_port,
+msg_id, &msg_ready,
+&msg_sz),
+!ret && msg_ready && msg_sz, timeout * 1000,
+1000, 5 * 1000);
+   if (ret)
+   DRM_DEBUG_KMS("msg_id: %d, ret: %d, timeout: %d\n",
+ msg_id, ret, timeout);
+
+   return ret ? ret : msg_sz;
+}
+
+static
+int intel_hdmi_hdcp2_write_msg(struct intel_digital_port *intel_dig_port,
+  void *buf

[PATCH v12 17/38] drm/i915: CP_IRQ handling for DP HDCP2.2 msgs

2019-02-08 Thread Ramalingam C
Implements the
Waitqueue is created to wait for CP_IRQ
Signaling the CP_IRQ arrival through atomic variable.
For applicable DP HDCP2.2 msgs read wait for CP_IRQ.

As per HDCP2.2 spec "HDCP Transmitters must process CP_IRQ interrupts
when they are received from HDCP Receivers"

Without CP_IRQ processing, DP HDCP2.2 H_Prime msg was getting corrupted
while reading it based on corresponding status bit. This creates the
random failures in reading the DP HDCP2.2 msgs.

v2:
  CP_IRQ arrival is tracked based on the atomic val inc [daniel]
  Recording the reviewed-by Daniel from IRC.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
---
 drivers/gpu/drm/i915/intel_dp.c   | 31 +++
 drivers/gpu/drm/i915/intel_drv.h  |  8 
 drivers/gpu/drm/i915/intel_hdcp.c | 11 ---
 3 files changed, 35 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e9fe25f21200..e1a051c0fbfe 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5623,6 +5623,18 @@ void intel_dp_encoder_suspend(struct intel_encoder 
*intel_encoder)
edp_panel_vdd_off_sync(intel_dp);
 }
 
+static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)
+{
+   long ret;
+
+#define C (hdcp->cp_irq_count_cached != atomic_read(&hdcp->cp_irq_count))
+   ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,
+  msecs_to_jiffies(timeout));
+
+   if (!ret)
+   DRM_DEBUG_KMS("Timedout at waiting for CP_IRQ\n");
+}
+
 static
 int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
u8 *an)
@@ -5967,14 +5979,13 @@ intel_dp_hdcp2_wait_for_msg(struct intel_digital_port 
*intel_dig_port,
mdelay(timeout);
ret = 0;
} else {
-   /* TODO: In case if you need to wait on CP_IRQ, do it here */
-   ret = __wait_for(ret =
-hdcp2_detect_msg_availability(intel_dig_port,
-  msg_id,
-  &msg_ready),
-!ret && msg_ready, timeout * 1000,
-1000, 5 * 1000);
-
+   /*
+* As we want to check the msg availability at timeout, Ignoring
+* the timeout at wait for CP_IRQ.
+*/
+   intel_dp_hdcp_wait_for_cp_irq(hdcp, timeout);
+   ret = hdcp2_detect_msg_availability(intel_dig_port,
+   msg_id, &msg_ready);
if (!msg_ready)
ret = -ETIMEDOUT;
}
@@ -6001,6 +6012,8 @@ static
 int intel_dp_hdcp2_write_msg(struct intel_digital_port *intel_dig_port,
 void *buf, size_t size)
 {
+   struct intel_dp *dp = &intel_dig_port->dp;
+   struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
unsigned int offset;
u8 *byte = buf;
ssize_t ret, bytes_to_write, len;
@@ -6016,6 +6029,8 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port 
*intel_dig_port,
bytes_to_write = size - 1;
byte++;
 
+   hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
+
while (bytes_to_write) {
len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 94ee36c28e9a..241e422d46e3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -474,6 +474,14 @@ struct intel_hdcp {
 * over re-Auth has to be triggered.
 */
u32 seq_num_m;
+
+   /*
+* Work queue to signal the CP_IRQ. Used for the waiters to read the
+* available information from HDCP DP sink.
+*/
+   wait_queue_head_t cp_irq_queue;
+   atomic_t cp_irq_count;
+   int cp_irq_count_cached;
 };
 
 struct intel_connector {
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index fe0445c0eaac..6178fe93f398 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -1806,6 +1806,7 @@ int intel_hdcp_init(struct intel_connector *connector,
 
if (is_hdcp2_supported(dev_priv))
intel_hdcp2_init(connector);
+   init_waitqueue_head(&hdcp->cp_irq_queue);
 
return 0;
 }
@@ -1935,12 +1936,8 @@ void intel_hdcp_handle_cp_irq(struct intel_connector 
*connector)
if (!hdcp->shim)
return;
 
-   /*
-* CP_IRQ could be triggered due to 1. HDCP2.2 auth msgs availability,
-* 2. link failure and 3. repeater reauth request. At present we dont
-   

[PATCH v12 30/38] misc/mei/hdcp: Prepare Session Key

2019-02-08 Thread Ramalingam C
Request to ME to prepare the encrypted session key.

On Success, ME provides Encrypted session key. Function populates
the HDCP2.2 authentication msg SKE_Send_Eks.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Style fixed [Uma]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition. [Tomas]
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 59 +++-
 1 file changed, 58 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 64272730d216..c5164c52a3b9 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -404,6 +404,63 @@ mei_hdcp_verify_lprime(struct device *dev, struct 
hdcp_port_data *data,
return 0;
 }
 
+/**
+ * mei_hdcp_get_session_key() - Prepare SKE_Send_Eks.
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @ske_data: SKE_Send_Eks msg output from ME FW.
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int mei_hdcp_get_session_key(struct device *dev,
+   struct hdcp_port_data *data,
+   struct hdcp2_ske_send_eks *ske_data)
+{
+   struct wired_cmd_get_session_key_in get_skey_in = { { 0 } };
+   struct wired_cmd_get_session_key_out get_skey_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data || !ske_data)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   get_skey_in.header.api_version = HDCP_API_VERSION;
+   get_skey_in.header.command_id = WIRED_GET_SESSION_KEY;
+   get_skey_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
+
+   get_skey_in.port.integrated_port_type = data->port_type;
+   get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&get_skey_out, sizeof(get_skey_out));
+
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (get_skey_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
+   WIRED_GET_SESSION_KEY, get_skey_out.header.status);
+   return -EIO;
+   }
+
+   ske_data->msg_id = HDCP_2_2_SKE_SEND_EKS;
+   memcpy(ske_data->e_dkey_ks, get_skey_out.e_dkey_ks,
+  HDCP_2_2_E_DKEY_KS_LEN);
+   memcpy(ske_data->riv, get_skey_out.r_iv, HDCP_2_2_RIV_LEN);
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -414,7 +471,7 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
.store_pairing_info = mei_hdcp_store_pairing_info,
.initiate_locality_check = mei_hdcp_initiate_locality_check,
.verify_lprime = mei_hdcp_verify_lprime,
-   .get_session_key = NULL,
+   .get_session_key = mei_hdcp_get_session_key,
.repeater_check_flow_prepare_ack = NULL,
.verify_mprime = NULL,
.enable_hdcp_authentication = NULL,
-- 
2.7.4

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[PATCH v12 28/38] misc/mei/hdcp: Initiate Locality check

2019-02-08 Thread Ramalingam C
Requests ME to start the second stage of HDCP2.2 authentication,
called Locality Check.

On Success, ME FW will provide LC_Init message to send to hdcp sink.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd used for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Style fixed [Uma]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition. [Tomas]
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 57 +++-
 1 file changed, 56 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 20baf6216496..0b6e13467c39 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -291,6 +291,61 @@ mei_hdcp_store_pairing_info(struct device *dev, struct 
hdcp_port_data *data,
return 0;
 }
 
+/**
+ * mei_hdcp_initiate_locality_check() - Prepare LC_Init
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @lc_init_data: LC_Init msg output
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_hdcp_initiate_locality_check(struct device *dev,
+struct hdcp_port_data *data,
+struct hdcp2_lc_init *lc_init_data)
+{
+   struct wired_cmd_init_locality_check_in lc_init_in = { { 0 } };
+   struct wired_cmd_init_locality_check_out lc_init_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data || !lc_init_data)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   lc_init_in.header.api_version = HDCP_API_VERSION;
+   lc_init_in.header.command_id = WIRED_INIT_LOCALITY_CHECK;
+   lc_init_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
+
+   lc_init_in.port.integrated_port_type = data->port_type;
+   lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&lc_init_out, sizeof(lc_init_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (lc_init_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X Failed. status: 0x%X\n",
+   WIRED_INIT_LOCALITY_CHECK, lc_init_out.header.status);
+   return -EIO;
+   }
+
+   lc_init_data->msg_id = HDCP_2_2_LC_INIT;
+   memcpy(lc_init_data->r_n, lc_init_out.r_n, HDCP_2_2_RN_LEN);
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -299,7 +354,7 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
mei_hdcp_verify_receiver_cert_prepare_km,
.verify_hprime = mei_hdcp_verify_hprime,
.store_pairing_info = mei_hdcp_store_pairing_info,
-   .initiate_locality_check = NULL,
+   .initiate_locality_check = mei_hdcp_initiate_locality_check,
.verify_lprime = NULL,
.get_session_key = NULL,
.repeater_check_flow_prepare_ack = NULL,
-- 
2.7.4

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[PATCH v12 23/38] misc/mei/hdcp: Define ME FW interface for HDCP2.2

2019-02-08 Thread Ramalingam C
Defines the HDCP specific ME FW interfaces such as Request CMDs,
payload structure for CMDs and their response status codes.

This patch defines payload size(Excluding the Header)for each WIRED
HDCP2.2 CMDs.

v2: Rebased.
v3:
  Extra comments are removed.
v4:
  %s/\/\*\*/\/\*
v5:
  Extra lines are removed.
v6:
  Remove redundant text from the License header
  %s/LPRIME_HALF/V_PRIME_HALF
  %s/uintxx_t/uxx
v7:
  Extra taps removed.

Signed-off-by: Ramalingam C 
Acked-by Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.h | 366 +++
 1 file changed, 366 insertions(+)
 create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.h

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
new file mode 100644
index ..582a7e27ae29
--- /dev/null
+++ b/drivers/misc/mei/hdcp/mei_hdcp.h
@@ -0,0 +1,366 @@
+/* SPDX-License-Identifier: (GPL-2.0+) */
+/*
+ * Copyright © 2017-2018 Intel Corporation
+ *
+ * Authors:
+ * Ramalingam C 
+ */
+
+#ifndef __MEI_HDCP_H__
+#define __MEI_HDCP_H__
+
+#include 
+
+/* me_hdcp_status: Enumeration of all HDCP Status Codes */
+enum me_hdcp_status {
+   ME_HDCP_STATUS_SUCCESS  = 0x,
+
+   /* WiDi Generic Status Codes */
+   ME_HDCP_STATUS_INTERNAL_ERROR   = 0x1000,
+   ME_HDCP_STATUS_UNKNOWN_ERROR= 0x1001,
+   ME_HDCP_STATUS_INCORRECT_API_VERSION= 0x1002,
+   ME_HDCP_STATUS_INVALID_FUNCTION = 0x1003,
+   ME_HDCP_STATUS_INVALID_BUFFER_LENGTH= 0x1004,
+   ME_HDCP_STATUS_INVALID_PARAMS   = 0x1005,
+   ME_HDCP_STATUS_AUTHENTICATION_FAILED= 0x1006,
+
+   /* WiDi Status Codes */
+   ME_HDCP_INVALID_SESSION_STATE   = 0x6000,
+   ME_HDCP_SRM_FRAGMENT_UNEXPECTED = 0x6001,
+   ME_HDCP_SRM_INVALID_LENGTH  = 0x6002,
+   ME_HDCP_SRM_FRAGMENT_OFFSET_INVALID = 0x6003,
+   ME_HDCP_SRM_VERIFICATION_FAILED = 0x6004,
+   ME_HDCP_SRM_VERSION_TOO_OLD = 0x6005,
+   ME_HDCP_RX_CERT_VERIFICATION_FAILED = 0x6006,
+   ME_HDCP_RX_REVOKED  = 0x6007,
+   ME_HDCP_H_VERIFICATION_FAILED   = 0x6008,
+   ME_HDCP_REPEATER_CHECK_UNEXPECTED   = 0x6009,
+   ME_HDCP_TOPOLOGY_MAX_EXCEEDED   = 0x600A,
+   ME_HDCP_V_VERIFICATION_FAILED   = 0x600B,
+   ME_HDCP_L_VERIFICATION_FAILED   = 0x600C,
+   ME_HDCP_STREAM_KEY_ALLOC_FAILED = 0x600D,
+   ME_HDCP_BASE_KEY_RESET_FAILED   = 0x600E,
+   ME_HDCP_NONCE_GENERATION_FAILED = 0x600F,
+   ME_HDCP_STATUS_INVALID_E_KEY_STATE  = 0x6010,
+   ME_HDCP_STATUS_INVALID_CS_ICV   = 0x6011,
+   ME_HDCP_STATUS_INVALID_KB_KEY_STATE = 0x6012,
+   ME_HDCP_STATUS_INVALID_PAVP_MODE_ICV= 0x6013,
+   ME_HDCP_STATUS_INVALID_PAVP_MODE= 0x6014,
+   ME_HDCP_STATUS_LC_MAX_ATTEMPTS  = 0x6015,
+
+   /* New status for HDCP 2.1 */
+   ME_HDCP_STATUS_MISMATCH_IN_M= 0x6016,
+
+   /* New status code for HDCP 2.2 Rx */
+   ME_HDCP_STATUS_RX_PROV_NOT_ALLOWED  = 0x6017,
+   ME_HDCP_STATUS_RX_PROV_WRONG_SUBJECT= 0x6018,
+   ME_HDCP_RX_NEEDS_PROVISIONING   = 0x6019,
+   ME_HDCP_BKSV_ICV_AUTH_FAILED= 0x6020,
+   ME_HDCP_STATUS_INVALID_STREAM_ID= 0x6021,
+   ME_HDCP_STATUS_CHAIN_NOT_INITIALIZED= 0x6022,
+   ME_HDCP_FAIL_NOT_EXPECTED   = 0x6023,
+   ME_HDCP_FAIL_HDCP_OFF   = 0x6024,
+   ME_HDCP_FAIL_INVALID_PAVP_MEMORY_MODE   = 0x6025,
+   ME_HDCP_FAIL_AES_ECB_FAILURE= 0x6026,
+   ME_HDCP_FEATURE_NOT_SUPPORTED   = 0x6027,
+   ME_HDCP_DMA_READ_ERROR  = 0x6028,
+   ME_HDCP_DMA_WRITE_ERROR = 0x6029,
+   ME_HDCP_FAIL_INVALID_PACKET_SIZE= 0x6030,
+   ME_HDCP_H264_PARSING_ERROR  = 0x6031,
+   ME_HDCP_HDCP2_ERRATA_VIDEO_VIOLATION= 0x6032,
+   ME_HDCP_HDCP2_ERRATA_AUDIO_VIOLATION= 0x6033,
+   ME_HDCP_TX_ACTIVE_ERROR = 0x6034,
+   ME_HDCP_MODE_CHANGE_ERROR   = 0x6035,
+   ME_HDCP_STREAM_TYPE_ERROR   = 0x6036,
+   ME_HDCP_STREAM_MANAGE_NOT_POSSIBLE  = 0x6037,
+
+   ME_HDCP_STATUS_PORT_INVALID_COMMAND = 0x6038,
+   ME_HDCP_STATUS_UNSUPPORTED_PROTOCOL = 0x6039,
+   ME_HDCP_STATUS_INVALID_PORT_INDEX   = 0x603a,
+   ME_HDCP_STATUS_TX_AUTH_NEEDED   = 0x603b,
+   ME_HDCP_STATUS_NOT_INTEGRATED_PORT  = 0x603c,
+   ME_HDCP_STATUS_SESSION_MAX_REACHED  = 0x603d,
+
+   /* hdcp capable bit is not set in rx_caps(error is unique to DP) */
+   ME_HDCP_STATUS_NOT_HDCP_CAPABLE = 0x6041,
+
+   ME_HDCP_STATUS_INVALID_STREAM_COUNT = 0x6042,
+};
+
+#define HDCP_API_VERSION   0x0001
+
+#define HDCP_M_LEN 

[PATCH v12 21/38] mei: me: add ice lake point device id.

2019-02-08 Thread Ramalingam C
From: Tomas Winkler 

Add icelake mei device id.

Cc: 
Signed-off-by: Tomas Winkler 
Signed-off-by: Greg Kroah-Hartman 
Cherry-picked from 
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git  
char-misc-linus
---
 drivers/misc/mei/hw-me-regs.h | 2 ++
 drivers/misc/mei/pci-me.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
index 23739a60517f..bb1ee9834a02 100644
--- a/drivers/misc/mei/hw-me-regs.h
+++ b/drivers/misc/mei/hw-me-regs.h
@@ -139,6 +139,8 @@
 #define MEI_DEV_ID_CNP_H  0xA360  /* Cannon Point H */
 #define MEI_DEV_ID_CNP_H_40xA364  /* Cannon Point H 4 (iTouch) */
 
+#define MEI_DEV_ID_ICP_LP 0x34E0  /* Ice Lake Point LP */
+
 /*
  * MEI HW Section
  */
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index e89497f858ae..3ab946ad3257 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -105,6 +105,8 @@ static const struct pci_device_id mei_me_pci_tbl[] = {
{MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_CFG)},
{MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_4, MEI_ME_PCH8_CFG)},
 
+   {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)},
+
/* required last entry */
{0, }
 };
-- 
2.7.4

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[PATCH v12 29/38] misc/mei/hdcp: Verify L_prime

2019-02-08 Thread Ramalingam C
Request to ME to verify the LPrime received from HDCP sink.

On Success, ME FW will verify the received Lprime by calculating and
comparing with L.

This represents the completion of Locality Check.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Style fixed [Uma]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition. [Tomas]
  memcpy for const length.
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 60 +++-
 1 file changed, 59 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 0b6e13467c39..64272730d216 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -346,6 +346,64 @@ mei_hdcp_initiate_locality_check(struct device *dev,
return 0;
 }
 
+/**
+ * mei_hdcp_verify_lprime() - Verify lprime.
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @rx_lprime: LC_Send_L_prime msg for ME FW verification
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
+  struct hdcp2_lc_send_lprime *rx_lprime)
+{
+   struct wired_cmd_validate_locality_in verify_lprime_in = { { 0 } };
+   struct wired_cmd_validate_locality_out verify_lprime_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data || !rx_lprime)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   verify_lprime_in.header.api_version = HDCP_API_VERSION;
+   verify_lprime_in.header.command_id = WIRED_VALIDATE_LOCALITY;
+   verify_lprime_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   verify_lprime_in.header.buffer_len =
+   WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
+
+   verify_lprime_in.port.integrated_port_type = data->port_type;
+   verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
+  HDCP_2_2_L_PRIME_LEN);
+
+   byte = mei_cldev_send(cldev, (u8 *)&verify_lprime_in,
+ sizeof(verify_lprime_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&verify_lprime_out,
+ sizeof(verify_lprime_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (verify_lprime_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
+   WIRED_VALIDATE_LOCALITY,
+   verify_lprime_out.header.status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -355,7 +413,7 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
.verify_hprime = mei_hdcp_verify_hprime,
.store_pairing_info = mei_hdcp_store_pairing_info,
.initiate_locality_check = mei_hdcp_initiate_locality_check,
-   .verify_lprime = NULL,
+   .verify_lprime = mei_hdcp_verify_lprime,
.get_session_key = NULL,
.repeater_check_flow_prepare_ack = NULL,
.verify_mprime = NULL,
-- 
2.7.4

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[PATCH v12 19/38] mei: bus: whitelist hdcp client

2019-02-08 Thread Ramalingam C
From: Tomas Winkler 

Whitelist HDCP client for in kernel drm use

v2:
  Rebased.

Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/bus-fixup.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 80215c312f0e..5fcac02233af 100644
--- a/drivers/misc/mei/bus-fixup.c
+++ b/drivers/misc/mei/bus-fixup.c
@@ -40,6 +40,9 @@ static const uuid_le mei_nfc_info_guid = MEI_UUID_NFC_INFO;
 #define MEI_UUID_MKHIF_FIX UUID_LE(0x55213584, 0x9a29, 0x4916, \
0xba, 0xdf, 0xf, 0xb7, 0xed, 0x68, 0x2a, 0xeb)
 
+#define MEI_UUID_HDCP UUID_LE(0xB638AB7E, 0x94E2, 0x4EA2, \
+ 0xA5, 0x52, 0xD1, 0xC5, 0x4B, 0x62, 0x7F, 0x04)
+
 #define MEI_UUID_ANY NULL_UUID_LE
 
 /**
@@ -71,6 +74,18 @@ static void blacklist(struct mei_cl_device *cldev)
cldev->do_match = 0;
 }
 
+/**
+ * whitelist - forcefully whitelist client
+ *
+ * @cldev: me clients device
+ */
+static void whitelist(struct mei_cl_device *cldev)
+{
+   dev_dbg(&cldev->dev, "running hook %s\n", __func__);
+
+   cldev->do_match = 1;
+}
+
 #define OSTYPE_LINUX2
 struct mei_os_ver {
__le16 build;
@@ -472,6 +487,7 @@ static struct mei_fixup {
MEI_FIXUP(MEI_UUID_NFC_HCI, mei_nfc),
MEI_FIXUP(MEI_UUID_WD, mei_wd),
MEI_FIXUP(MEI_UUID_MKHIF_FIX, mei_mkhi_fix),
+   MEI_FIXUP(MEI_UUID_HDCP, whitelist),
 };
 
 /**
-- 
2.7.4

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[PATCH v12 27/38] misc/mei/hdcp: Store the HDCP Pairing info

2019-02-08 Thread Ramalingam C
Provides Pairing info to ME to store.

Pairing is a process to fast track the subsequent authentication
with the same HDCP sink.

On Success, received HDCP pairing info is stored in non-volatile
memory of ME.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
  Style fixed [Uma]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc addition. [Tomas]
  memcpy for const length.
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 60 +++-
 1 file changed, 59 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 069a53c60bfc..20baf6216496 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -233,6 +233,64 @@ mei_hdcp_verify_hprime(struct device *dev, struct 
hdcp_port_data *data,
return 0;
 }
 
+/**
+ * mei_hdcp_store_pairing_info() - Store pairing info received at ME FW
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @pairing_info: AKE_Send_Pairing_Info msg input to ME FW
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
+   struct hdcp2_ake_send_pairing_info *pairing_info)
+{
+   struct wired_cmd_ake_send_pairing_info_in pairing_info_in = { { 0 } };
+   struct wired_cmd_ake_send_pairing_info_out pairing_info_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data || !pairing_info)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   pairing_info_in.header.api_version = HDCP_API_VERSION;
+   pairing_info_in.header.command_id = WIRED_AKE_SEND_PAIRING_INFO;
+   pairing_info_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   pairing_info_in.header.buffer_len =
+   WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
+
+   pairing_info_in.port.integrated_port_type = data->port_type;
+   pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
+  HDCP_2_2_E_KH_KM_LEN);
+
+   byte = mei_cldev_send(cldev, (u8 *)&pairing_info_in,
+ sizeof(pairing_info_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&pairing_info_out,
+ sizeof(pairing_info_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte);
+   return byte;
+   }
+
+   if (pairing_info_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X failed. Status: 0x%X\n",
+   WIRED_AKE_SEND_PAIRING_INFO,
+   pairing_info_out.header.status);
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
@@ -240,7 +298,7 @@ struct i915_hdcp_component_ops mei_hdcp_ops = {
.verify_receiver_cert_prepare_km =
mei_hdcp_verify_receiver_cert_prepare_km,
.verify_hprime = mei_hdcp_verify_hprime,
-   .store_pairing_info = NULL,
+   .store_pairing_info = mei_hdcp_store_pairing_info,
.initiate_locality_check = NULL,
.verify_lprime = NULL,
.get_session_key = NULL,
-- 
2.7.4

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[PATCH v12 22/38] misc/mei/hdcp: Client driver for HDCP application

2019-02-08 Thread Ramalingam C
ME FW contributes a vital role in HDCP2.2 authentication.
HDCP2.2 driver needs to communicate to ME FW for each step of the
HDCP2.2 authentication.

ME FW prepare and HDCP2.2 authentication  parameters and encrypt them
as per spec. With such parameter Driver prepares HDCP2.2 auth messages
and communicate with HDCP2.2 sink.

Similarly HDCP2.2 sink's response is shared with ME FW for decrypt and
verification.

Once All the steps of HDCP2.2 authentications are complete on driver's
request ME FW will configure the port as authenticated and supply the
HDCP keys to the Gen HW for encryption.

Only after this stage HDCP2.2 driver can start the HDCP2.2 encryption
for a port.

ME FW is interfaced to kernel through MEI Bus Driver. To obtain the
HDCP2.2 services from the ME FW through MEI Bus driver MEI Client
Driver is developed.

v2:
  hdcp files are moved to drivers/misc/mei/hdcp/ [Tomas]
v3:
  Squashed the Kbuild support [Tomas]
  UUID renamed and Module License is modified [Tomas]
  drv_data is set to null at remove [Tomas]
v4:
  Module name is changed to "MEI HDCP"
  I915 Selects the MEI_HDCP
v5:
  Remove redundant text from the License header
  Fix malformed licence
  Removed the drv_data resetting.
v6:
  K-Doc addition. [Tomas]
v7:
  %s/UUID_LE/GUID_INIT [Tomas]
  GPL Ver is 2.0 than 2.0+ [Tomas]

Signed-off-by: Ramalingam C 
Signed-off-by: Tomas Winkler 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/Kconfig |  7 +
 drivers/misc/mei/Makefile|  2 ++
 drivers/misc/mei/hdcp/Makefile   |  7 +
 drivers/misc/mei/hdcp/mei_hdcp.c | 64 
 4 files changed, 80 insertions(+)
 create mode 100644 drivers/misc/mei/hdcp/Makefile
 create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.c

diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index c49e1d2269af..64a7b3483895 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -43,3 +43,10 @@ config INTEL_MEI_TXE
 
  Supported SoCs:
  Intel Bay Trail
+
+config INTEL_MEI_HDCP
+   tristate "Intel HDCP2.2 services of ME Interface"
+   select INTEL_MEI_ME
+   depends on DRM_I915
+   help
+ MEI Support for HDCP2.2 Services on Intel platforms.
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index d9215fc4e499..8c2d9565a4cb 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -24,3 +24,5 @@ mei-txe-objs += hw-txe.o
 
 mei-$(CONFIG_EVENT_TRACING) += mei-trace.o
 CFLAGS_mei-trace.o = -I$(src)
+
+obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
diff --git a/drivers/misc/mei/hdcp/Makefile b/drivers/misc/mei/hdcp/Makefile
new file mode 100644
index ..e27d10754dbf
--- /dev/null
+++ b/drivers/misc/mei/hdcp/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (c) 2017-2018, Intel Corporation.
+#
+# Makefile - HDCP client driver for Intel MEI Bus Driver.
+
+obj-$(CONFIG_INTEL_MEI_HDCP) += mei_hdcp.o
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
new file mode 100644
index ..8df069c1b0cc
--- /dev/null
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * Copyright © 2017-2018 Intel Corporation
+ *
+ * Mei_hdcp.c: HDCP client driver for mei bus
+ *
+ * Author:
+ * Ramalingam C 
+ */
+
+/**
+ * DOC: MEI_HDCP Client Driver
+ *
+ * This is a client driver to the mei_bus to make the HDCP2.2 services of
+ * ME FW available for the interested consumers like I915.
+ *
+ * This module will act as a translation layer between HDCP protocol
+ * implementor(I915) and ME FW by translating HDCP2.2 authentication
+ * messages to ME FW command payloads and vice versa.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static int mei_hdcp_probe(struct mei_cl_device *cldev,
+ const struct mei_cl_device_id *id)
+{
+   int ret;
+
+   ret = mei_cldev_enable(cldev);
+   if (ret < 0)
+   dev_err(&cldev->dev, "mei_cldev_enable Failed. %d\n", ret);
+
+   return ret;
+}
+
+static int mei_hdcp_remove(struct mei_cl_device *cldev)
+{
+   return mei_cldev_disable(cldev);
+}
+
+#define MEI_UUID_HDCP GUID_INIT(0xB638AB7E, 0x94E2, 0x4EA2, 0xA5, \
+   0x52, 0xD1, 0xC5, 0x4B, 0x62, 0x7F, 0x04)
+
+static struct mei_cl_device_id mei_hdcp_tbl[] = {
+   { .uuid = MEI_UUID_HDCP, .version = MEI_CL_VERSION_ANY },
+   { }
+};
+MODULE_DEVICE_TABLE(mei, mei_hdcp_tbl);
+
+static struct mei_cl_driver mei_hdcp_driver = {
+   .id_table = mei_hdcp_tbl,
+   .name = KBUILD_MODNAME,
+   .probe = mei_hdcp_probe,
+   .remove = mei_hdcp_remove,
+};
+
+module_mei_cl_driver(mei_hdcp_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MEI HDCP");
-- 
2.7.4

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[PATCH v12 25/38] misc/mei/hdcp: Verify Receiver Cert and prepare km

2019-02-08 Thread Ramalingam C
Requests for verification for receiver certification and also the
preparation for next AKE auth message with km.

On Success ME FW validate the HDCP2.2 receivers certificate and do the
revocation check on the receiver ID. AKE_Stored_Km will be prepared if
the receiver is already paired, else AKE_No_Stored_Km will be prepared.

Here AKE_Stored_Km and AKE_No_Stored_Km are HDCP2.2 protocol msgs.

v2: Rebased.
v3:
  cldev is passed as first parameter [Tomas]
  Redundant comments and cast are removed [Tomas]
v4:
  %zd is used for ssize_t [Alexander]
  %s/return -1/return -EIO [Alexander]
v5: Rebased.
v6:
  Collected the Rb-ed by.
  Rebasing.
v7:
  Adjust to the new mei interface.
  Fix for Kdoc.
v8:
  K-Doc Addition. [Tomas]
  memcpy for const length.
v9:
  renamed func as mei_hdcp_* [Tomas]
  Inline function is defined for DDI index [Tomas]
v10:
  Fixed the conversion of u8 to bool [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
Acked-by: Tomas Winkler 
---
 drivers/misc/mei/hdcp/mei_hdcp.c | 83 +++-
 1 file changed, 82 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 56d3ac1e6831..a67a599b31f1 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -97,11 +97,92 @@ mei_hdcp_initiate_session(struct device *dev, struct 
hdcp_port_data *data,
return 0;
 }
 
+/**
+ * mei_hdcp_verify_receiver_cert_prepare_km() - Verify the Receiver Certificate
+ * AKE_Send_Cert and prepare AKE_Stored_Km/AKE_No_Stored_Km
+ * @dev: device corresponding to the mei_cl_device
+ * @hdcp_data: Intel HW specific hdcp data
+ * @rx_cert: AKE_Send_Cert for verification
+ * @km_stored: Pairing status flag output
+ * @ek_pub_km: AKE_Stored_Km/AKE_No_Stored_Km output msg
+ * @msg_sz : size of AKE_X_Km output msg
+ *
+ * Return: 0 on Success, <0 on Failure
+ */
+static int
+mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
+struct hdcp_port_data *data,
+struct hdcp2_ake_send_cert *rx_cert,
+bool *km_stored,
+struct hdcp2_ake_no_stored_km
+   *ek_pub_km,
+size_t *msg_sz)
+{
+   struct wired_cmd_verify_receiver_cert_in verify_rxcert_in = { { 0 } };
+   struct wired_cmd_verify_receiver_cert_out verify_rxcert_out = { { 0 } };
+   struct mei_cl_device *cldev;
+   ssize_t byte;
+
+   if (!dev || !data || !rx_cert || !km_stored || !ek_pub_km || !msg_sz)
+   return -EINVAL;
+
+   cldev = to_mei_cl_device(dev);
+
+   verify_rxcert_in.header.api_version = HDCP_API_VERSION;
+   verify_rxcert_in.header.command_id = WIRED_VERIFY_RECEIVER_CERT;
+   verify_rxcert_in.header.status = ME_HDCP_STATUS_SUCCESS;
+   verify_rxcert_in.header.buffer_len =
+   WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
+
+   verify_rxcert_in.port.integrated_port_type = data->port_type;
+   verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
+
+   verify_rxcert_in.cert_rx = rx_cert->cert_rx;
+   memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
+   memcpy(verify_rxcert_in.rx_caps, rx_cert->rx_caps, HDCP_2_2_RXCAPS_LEN);
+
+   byte = mei_cldev_send(cldev, (u8 *)&verify_rxcert_in,
+ sizeof(verify_rxcert_in));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_send failed: %zd\n", byte);
+   return byte;
+   }
+
+   byte = mei_cldev_recv(cldev, (u8 *)&verify_rxcert_out,
+ sizeof(verify_rxcert_out));
+   if (byte < 0) {
+   dev_dbg(dev, "mei_cldev_recv failed: %zd\n", byte);
+   return byte;
+   }
+
+   if (verify_rxcert_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+   dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n",
+   WIRED_VERIFY_RECEIVER_CERT,
+   verify_rxcert_out.header.status);
+   return -EIO;
+   }
+
+   *km_stored = !!verify_rxcert_out.km_stored;
+   if (verify_rxcert_out.km_stored) {
+   ek_pub_km->msg_id = HDCP_2_2_AKE_STORED_KM;
+   *msg_sz = sizeof(struct hdcp2_ake_stored_km);
+   } else {
+   ek_pub_km->msg_id = HDCP_2_2_AKE_NO_STORED_KM;
+   *msg_sz = sizeof(struct hdcp2_ake_no_stored_km);
+   }
+
+   memcpy(ek_pub_km->e_kpub_km, &verify_rxcert_out.ekm_buff,
+  sizeof(verify_rxcert_out.ekm_buff));
+
+   return 0;
+}
+
 static __attribute__((unused))
 struct i915_hdcp_component_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
.initiate_hdcp2_session = mei_hdcp_initiate_session,
-   .verify_receiver_cert_prepare_km = NULL,
+  

[PATCH v12 20/38] mei: bus: export to_mei_cl_device for mei client device drivers

2019-02-08 Thread Ramalingam C
From: Tomas Winkler 

Export to_mei_cl_device macro, it is needed also in mei client drivers.

Signed-off-by: Tomas Winkler 
---
 drivers/misc/mei/bus.c | 1 -
 include/linux/mei_cl_bus.h | 2 ++
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/bus.c b/drivers/misc/mei/bus.c
index fc3872fe7b25..e5456faf00e6 100644
--- a/drivers/misc/mei/bus.c
+++ b/drivers/misc/mei/bus.c
@@ -28,7 +28,6 @@
 #include "client.h"
 
 #define to_mei_cl_driver(d) container_of(d, struct mei_cl_driver, driver)
-#define to_mei_cl_device(d) container_of(d, struct mei_cl_device, dev)
 
 /**
  * __mei_cl_send - internal client send (write)
diff --git a/include/linux/mei_cl_bus.h b/include/linux/mei_cl_bus.h
index 7fde40e17c8b..03b6ba2a63f8 100644
--- a/include/linux/mei_cl_bus.h
+++ b/include/linux/mei_cl_bus.h
@@ -55,6 +55,8 @@ struct mei_cl_device {
void *priv_data;
 };
 
+#define to_mei_cl_device(d) container_of(d, struct mei_cl_device, dev)
+
 struct mei_cl_driver {
struct device_driver driver;
const char *name;
-- 
2.7.4

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[PATCH v12 07/38] drm/i915: Enable and Disable of HDCP2.2

2019-02-08 Thread Ramalingam C
Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.

When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
enabled.

This change implements a sequence of enabling and disabling of
HDCP2.2 authentication and HDCP2.2 port encryption.

v2:
  Included few optimization suggestions [Chris Wilson]
  Commit message is updated as per the rebased version.
  intel_wait_for_register is used instead of wait_for. [Chris Wilson]
v3:
  Extra comment added and Style issue fixed [Uma]
v4:
  Rebased as part of patch reordering.
  HDCP2 encryption status is tracked.
  HW state check is moved into WARN_ON [Daniel]
v5:
  Redefined the mei service functions as per comp redesign.
  Merged patches related to hdcp2.2 enabling and disabling [Sean Paul].
  Required shim functionality is defined [Sean Paul]
v6:
  Return values are handles [Uma]
  Realigned the code.
  Check for comp_master is removed.
v7:
  HDCP2.2 is attempted only if mei interface is up.
  Adjust to the new interface
  Avoid bool usage in struct [Tomas]
v8:
  mei_binded status check is removed.
  %s/hdcp2_in_use/hdcp2_encrypted
v9:
  bool is used in struct intel_hdcp. [Daniel]
v10:
  panel is replaced with sink [Uma]
  Mei interface decided the hdcp2_capability.
  WARN_ON if hdcp_enable is called when hdcp state is ENABLED.
  Reviewed-by Uma.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_drv.h  |   7 ++
 drivers/gpu/drm/i915/intel_hdcp.c | 212 +++---
 2 files changed, 205 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 11f1e55bb5fb..c0694fc63ea6 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -399,6 +399,10 @@ struct intel_hdcp_shim {
 
/* HDCP adaptation(DP/HDMI) required on the port */
enum hdcp_wired_protocol protocol;
+
+   /* Detects whether sink is HDCP2.2 capable */
+   int (*hdcp_2_2_capable)(struct intel_digital_port *intel_dig_port,
+   bool *capable);
 };
 
 struct intel_hdcp {
@@ -416,6 +420,9 @@ struct intel_hdcp {
/* Flag indicates whether this connector supports HDCP2.2 or not. */
bool hdcp2_supported;
 
+   /* HDCP2.2 Encryption status */
+   bool hdcp2_encrypted;
+
/*
 * Content Stream Type defined by content owner. TYPE0(0x0) content can
 * flow in the link protected by HDCP2.2 or HDCP1.4, where as TYPE1(0x1)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index 66e3850a57a0..0b6ccb3d24fe 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -74,6 +74,32 @@ bool intel_hdcp_capable(struct intel_connector *connector)
return capable;
 }
 
+/* Is HDCP2.2 capable on Platform and Sink */
+static bool intel_hdcp2_capable(struct intel_connector *connector)
+{
+   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+   struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+   struct intel_hdcp *hdcp = &connector->hdcp;
+   bool capable = false;
+
+   /* I915 support for HDCP2.2 */
+   if (!hdcp->hdcp2_supported)
+   return false;
+
+   /* MEI interface is solid */
+   mutex_lock(&dev_priv->hdcp_comp_mutex);
+   if (!dev_priv->hdcp_comp_added ||  !dev_priv->hdcp_master) {
+   mutex_unlock(&dev_priv->hdcp_comp_mutex);
+   return false;
+   }
+   mutex_unlock(&dev_priv->hdcp_comp_mutex);
+
+   /* Sink's capability for HDCP2.2 */
+   hdcp->shim->hdcp_2_2_capable(intel_dig_port, &capable);
+
+   return capable;
+}
+
 static inline bool intel_hdcp_in_use(struct intel_connector *connector)
 {
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
@@ -1094,8 +1120,7 @@ int hdcp2_authenticate_port(struct intel_connector 
*connector)
return ret;
 }
 
-static __attribute__((unused))
-int hdcp2_close_mei_session(struct intel_connector *connector)
+static int hdcp2_close_mei_session(struct intel_connector *connector)
 {
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct i915_hdcp_comp_master *comp;
@@ -1116,12 +1141,157 @@ int hdcp2_close_mei_session(struct intel_connector 
*connector)
return ret;
 }
 
-static __attribute__((unused))
-int hdcp2_deauthenticate_port(struct intel_connector *connector)
+static int hdcp2_deauthenticate_port(struct intel_connector *connector)
 {
return hdcp2_close_mei_session(connector);
 }
 
+static int hdcp2_authenticate_sink(struct intel_connector *connector)
+{
+   DRM_ERROR("Sink authentication is done in subsequent patches\n");
+
+   return -EINVAL;
+}
+
+static int hdcp2_enable_encryption(struct intel_connector *connector)
+{
+  

[PATCH v12 08/38] drm/i915: Implement HDCP2.2 receiver authentication

2019-02-08 Thread Ramalingam C
Implements HDCP2.2 authentication for hdcp2.2 receivers, with
following steps:
Authentication and Key exchange (AKE).
Locality Check (LC).
Session Key Exchange(SKE).
DP Errata for stream type configuration for receivers.

At AKE, the HDCP Receiver’s public key certificate is verified by the
HDCP Transmitter. A Master Key k m is exchanged.

At LC, the HDCP Transmitter enforces locality on the content by
requiring that the Round Trip Time (RTT) between a pair of messages
is not more than 20 ms.

At SKE, The HDCP Transmitter exchanges Session Key ks with
the HDCP Receiver.

In DP HDCP2.2 encryption and decryption logics use the stream type as
one of the parameter. So Before enabling the Encryption DP HDCP2.2
receiver needs to be communicated with stream type. This is added to
spec as ERRATA.

This generic implementation is complete only with the hdcp2 specific
functions defined at hdcp_shim.

v2: Rebased.
v3:
  %s/PARING/PAIRING
  Coding style fixing [Uma]
v4:
  Rebased as part of patch reordering.
  Defined the functions for mei services. [Daniel]
v5:
  Redefined the mei service functions as per comp redesign.
  Required intel_hdcp members are defined [Sean Paul]
v6:
  Typo of cipher is Fixed [Uma]
  %s/uintxx_t/uxx
  Check for comp_master is removed.
v7:
  Adjust to the new interface.
  Avoid using bool structure members. [Tomas]
v8: Rebased.
v9:
  bool is used in struct intel_hdcp [Daniel]
  config_stream_type is redesigned [Daniel]
  Reviewed-by Uma.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_drv.h  |  34 +++
 drivers/gpu/drm/i915/intel_hdcp.c | 197 +++---
 2 files changed, 216 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index c0694fc63ea6..15d148b4db41 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -403,6 +403,22 @@ struct intel_hdcp_shim {
/* Detects whether sink is HDCP2.2 capable */
int (*hdcp_2_2_capable)(struct intel_digital_port *intel_dig_port,
bool *capable);
+
+   /* Write HDCP2.2 messages */
+   int (*write_2_2_msg)(struct intel_digital_port *intel_dig_port,
+void *buf, size_t size);
+
+   /* Read HDCP2.2 messages */
+   int (*read_2_2_msg)(struct intel_digital_port *intel_dig_port,
+   u8 msg_id, void *buf, size_t size);
+
+   /*
+* Implementation of DP HDCP2.2 Errata for the communication of stream
+* type to Receivers. In DP HDCP2.2 Stream type is one of the input to
+* the HDCP2.2 Cipher for En/De-Cryption. Not applicable for HDMI.
+*/
+   int (*config_stream_type)(struct intel_digital_port *intel_dig_port,
+ bool is_repeater, u8 type);
 };
 
 struct intel_hdcp {
@@ -430,6 +446,24 @@ struct intel_hdcp {
 */
u8 content_type;
struct hdcp_port_data port_data;
+
+   bool is_paired;
+   bool is_repeater;
+
+   /*
+* Count of ReceiverID_List received. Initialized to 0 at AKE_INIT.
+* Incremented after processing the RepeaterAuth_Send_ReceiverID_List.
+* When it rolls over re-auth has to be triggered.
+*/
+   u32 seq_num_v;
+
+   /*
+* Count of RepeaterAuth_Stream_Manage msg propagated.
+* Initialized to 0 on AKE_INIT. Incremented after every successful
+* transmission of RepeaterAuth_Stream_Manage message. When it rolls
+* over re-Auth has to be triggered.
+*/
+   u32 seq_num_m;
 };
 
 struct intel_connector {
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index 0b6ccb3d24fe..d63f620581ad 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -17,6 +17,7 @@
 
 #define KEY_LOAD_TRIES 5
 #define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS   50
+#define HDCP2_LC_RETRY_CNT 3
 
 static
 bool intel_hdcp_is_ksv_valid(u8 *ksv)
@@ -862,7 +863,7 @@ bool is_hdcp_supported(struct drm_i915_private *dev_priv, 
enum port port)
return INTEL_GEN(dev_priv) >= 9 && port < PORT_E;
 }
 
-static __attribute__((unused)) int
+static int
 hdcp2_prepare_ake_init(struct intel_connector *connector,
   struct hdcp2_ake_init *ake_data)
 {
@@ -887,7 +888,7 @@ hdcp2_prepare_ake_init(struct intel_connector *connector,
return ret;
 }
 
-static __attribute__((unused)) int
+static int
 hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
struct hdcp2_ake_send_cert *rx_cert,
bool *paired,
@@ -917,9 +918,8 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector 
*connector,
return ret;
 }
 
-static __attribute__((unused)) int
-hdcp2_verify_hprime(struct intel_connector *connector,

[PATCH v12 12/38] drm/i915: Implement HDCP2.2 link integrity check

2019-02-08 Thread Ramalingam C
Implements the link integrity check once in 500mSec.

Once encryption is enabled, an ongoing Link Integrity Check is
performed by the HDCP Receiver to check that cipher synchronization
is maintained between the HDCP Transmitter and the HDCP Receiver.

On the detection of synchronization lost, the HDCP Receiver must assert
the corresponding bits of the RxStatus register. The Transmitter polls
the RxStatus register and it may initiate re-authentication.

v2:
  Rebased.
v3:
  enum check_link_response is used check the link status [Uma]
v4:
  Rebased as part of patch reordering.
v5:
  Required members of intel_hdcp is defined [Sean Paul]
v6:
  hdcp2_check_link is cancelled at required places.
v7:
  Rebased for the component i/f changes.
  Errors due to the sinks are reported as DEBUG logs.
v8:
  hdcp_check_work is used for both hdcp1 and hdcp2 check_link [Daniel]
  hdcp2.2 encryption status check is put under WARN_ON [Daniel]
  drm_hdcp.h changes are moved into separate patch [Daniel]
v9:
  enum check_link_status is defined at intel_drv.h [Daniel]

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_drv.h  | 10 +
 drivers/gpu/drm/i915/intel_hdcp.c | 88 ---
 2 files changed, 93 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 15d148b4db41..94ee36c28e9a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -324,6 +324,13 @@ struct intel_panel {
 
 struct intel_digital_port;
 
+enum check_link_response {
+   HDCP_LINK_PROTECTED = 0,
+   HDCP_TOPOLOGY_CHANGE,
+   HDCP_LINK_INTEGRITY_FAILURE,
+   HDCP_REAUTH_REQUEST
+};
+
 /*
  * This structure serves as a translation layer between the generic HDCP code
  * and the bus-specific code. What that means is that HDCP over HDMI differs
@@ -419,6 +426,9 @@ struct intel_hdcp_shim {
 */
int (*config_stream_type)(struct intel_digital_port *intel_dig_port,
  bool is_repeater, u8 type);
+
+   /* HDCP2.2 Link Integrity Check */
+   int (*check_2_2_link)(struct intel_digital_port *intel_dig_port);
 };
 
 struct intel_hdcp {
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index 24051120d3bb..00fae3963caf 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -111,6 +111,16 @@ static inline bool intel_hdcp_in_use(struct 
intel_connector *connector)
return reg & HDCP_STATUS_ENC;
 }
 
+static inline bool intel_hdcp2_in_use(struct intel_connector *connector)
+{
+   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+   enum port port = connector->encoder->port;
+   u32 reg;
+
+   reg = I915_READ(HDCP2_STATUS_DDI(port));
+   return reg & LINK_ENCRYPTION_STATUS;
+}
+
 static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
const struct intel_hdcp_shim *shim)
 {
@@ -1580,6 +1590,69 @@ static int _intel_hdcp2_disable(struct intel_connector 
*connector)
return ret;
 }
 
+/* Implements the Link Integrity Check for HDCP2.2 */
+static int intel_hdcp2_check_link(struct intel_connector *connector)
+{
+   struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+   struct intel_hdcp *hdcp = &connector->hdcp;
+   enum port port = connector->encoder->port;
+   int ret = 0;
+
+   mutex_lock(&hdcp->mutex);
+
+   /* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
+   if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
+   !hdcp->hdcp2_encrypted) {
+   ret = -EINVAL;
+   goto out;
+   }
+
+   if (WARN_ON(!intel_hdcp2_in_use(connector))) {
+   DRM_ERROR("HDCP2.2 link stopped the encryption, %x\n",
+ I915_READ(HDCP2_STATUS_DDI(port)));
+   ret = -ENXIO;
+   hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+   schedule_work(&hdcp->prop_work);
+   goto out;
+   }
+
+   ret = hdcp->shim->check_2_2_link(intel_dig_port);
+   if (ret == HDCP_LINK_PROTECTED) {
+   if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
+   hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
+   schedule_work(&hdcp->prop_work);
+   }
+   goto out;
+   }
+
+   DRM_DEBUG_KMS("[%s:%d] HDCP2.2 link failed, retrying auth\n",
+ connector->base.name, connector->base.base.id);
+
+   ret = _intel_hdcp2_disable(connector);
+   if (ret) {
+   DRM_ERROR("[%s:%d] Failed to disable hdcp2.2 (%d)\n",
+ connector->base.name, connector->base.base.id, ret);
+   hdcp->value = DRM_MODE_CONTE

[PATCH v12 06/38] drm/i915: hdcp1.4 CP_IRQ handling and SW encryption tracking

2019-02-08 Thread Ramalingam C
"hdcp_encrypted" flag is defined to denote the HDCP1.4 encryption status.
This SW tracking is used to determine the need for real hdcp1.4 disable
and hdcp_check_link upon CP_IRQ.

On CP_IRQ we filter the CP_IRQ related to the states like Link failure
and reauthentication req etc and handle them in hdcp_check_link.
CP_IRQ corresponding to the authentication msg availability are ignored.

WARN_ON is added for the abrupt stop of HDCP encryption of a port.

v2:
  bool is used in struct for the cleaner coding. [Daniel]
  check_link work_fn is scheduled for cp_irq handling [Daniel]
v3:
  rebased.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_dp.c   |  2 +-
 drivers/gpu/drm/i915/intel_drv.h  |  5 ++-
 drivers/gpu/drm/i915/intel_hdcp.c | 73 ---
 3 files changed, 58 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index cf709835fb9a..9f73a4239574 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4780,7 +4780,7 @@ static void intel_dp_check_service_irq(struct intel_dp 
*intel_dp)
intel_dp_handle_test_request(intel_dp);
 
if (val & DP_CP_IRQ)
-   intel_hdcp_check_link(intel_dp->attached_connector);
+   intel_hdcp_handle_cp_irq(intel_dp->attached_connector);
 
if (val & DP_SINK_SPECIFIC_IRQ)
DRM_DEBUG_DRIVER("Sink specific irq unhandled\n");
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 083e2f78ac1f..11f1e55bb5fb 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -409,6 +409,9 @@ struct intel_hdcp {
struct delayed_work check_work;
struct work_struct prop_work;
 
+   /* HDCP1.4 Encryption status */
+   bool hdcp_encrypted;
+
/* HDCP2.2 related definitions */
/* Flag indicates whether this connector supports HDCP2.2 or not. */
bool hdcp2_supported;
@@ -2090,12 +2093,12 @@ int intel_hdcp_init(struct intel_connector *connector,
const struct intel_hdcp_shim *hdcp_shim);
 int intel_hdcp_enable(struct intel_connector *connector);
 int intel_hdcp_disable(struct intel_connector *connector);
-int intel_hdcp_check_link(struct intel_connector *connector);
 bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
 bool intel_hdcp_capable(struct intel_connector *connector);
 void intel_hdcp_component_init(struct drm_i915_private *dev_priv);
 void intel_hdcp_component_fini(struct drm_i915_private *dev_priv);
 void intel_hdcp_cleanup(struct intel_connector *connector);
+void intel_hdcp_handle_cp_irq(struct intel_connector *connector);
 
 /* intel_psr.c */
 #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index d06bef9d1ab2..66e3850a57a0 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -74,6 +74,16 @@ bool intel_hdcp_capable(struct intel_connector *connector)
return capable;
 }
 
+static inline bool intel_hdcp_in_use(struct intel_connector *connector)
+{
+   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+   enum port port = connector->encoder->port;
+   u32 reg;
+
+   reg = I915_READ(PORT_HDCP_STATUS(port));
+   return reg & HDCP_STATUS_ENC;
+}
+
 static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
const struct intel_hdcp_shim *shim)
 {
@@ -668,6 +678,7 @@ static int _intel_hdcp_disable(struct intel_connector 
*connector)
DRM_DEBUG_KMS("[%s:%d] HDCP is being disabled...\n",
  connector->base.name, connector->base.base.id);
 
+   hdcp->hdcp_encrypted = false;
I915_WRITE(PORT_HDCP_CONF(port), 0);
if (intel_wait_for_register(dev_priv, PORT_HDCP_STATUS(port), ~0, 0,
ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
@@ -713,8 +724,10 @@ static int _intel_hdcp_enable(struct intel_connector 
*connector)
/* Incase of authentication failures, HDCP spec expects reauth. */
for (i = 0; i < tries; i++) {
ret = intel_hdcp_auth(conn_to_dig_port(connector), hdcp->shim);
-   if (!ret)
+   if (!ret) {
+   hdcp->hdcp_encrypted = true;
return 0;
+   }
 
DRM_DEBUG_KMS("HDCP Auth failure (%d)\n", ret);
 
@@ -741,16 +754,17 @@ int intel_hdcp_check_link(struct intel_connector 
*connector)
enum port port = intel_dig_port->base.port;
int ret = 0;
 
-   if (!hdcp->shim)
-   return -ENOENT;
-
mutex_lock(&hdcp->mutex);
 
-   if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+   /* Check_link valid only when HDCP1.4 is enab

[PATCH v12 13/38] drm/i915: Handle HDCP2.2 downstream topology change

2019-02-08 Thread Ramalingam C
When repeater notifies a downstream topology change, this patch
reauthenticate the repeater alone without disabling the hdcp
encryption. If that fails then complete reauthentication is executed.

v2:
  Rebased.
v3:
  Typo in commit msg is fixed [Uma]
v4:
  Rebased as part of patch reordering.
  Minor style fixes.
v5:
  Rebased.
v6:
  Rebased.
v7:
  Errors due to sinks are reported as DEBUG logs.

Signed-off-by: Ramalingam C 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_hdcp.c | 20 ++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index 00fae3963caf..fe0445c0eaac 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -1626,8 +1626,24 @@ static int intel_hdcp2_check_link(struct intel_connector 
*connector)
goto out;
}
 
-   DRM_DEBUG_KMS("[%s:%d] HDCP2.2 link failed, retrying auth\n",
- connector->base.name, connector->base.base.id);
+   if (ret == HDCP_TOPOLOGY_CHANGE) {
+   if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+   goto out;
+
+   DRM_DEBUG_KMS("HDCP2.2 Downstream topology change\n");
+   ret = hdcp2_authenticate_repeater_topology(connector);
+   if (!ret) {
+   hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
+   schedule_work(&hdcp->prop_work);
+   goto out;
+   }
+   DRM_DEBUG_KMS("[%s:%d] Repeater topology auth failed.(%d)\n",
+ connector->base.name, connector->base.base.id,
+ ret);
+   } else {
+   DRM_DEBUG_KMS("[%s:%d] HDCP2.2 link failed, retrying auth\n",
+ connector->base.name, connector->base.base.id);
+   }
 
ret = _intel_hdcp2_disable(connector);
if (ret) {
-- 
2.7.4

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[PATCH v12 14/38] drm: removing the DP Errata msg and its msg id

2019-02-08 Thread Ramalingam C
Since DP ERRATA message is not defined at spec, those structure
definition is removed from drm_hdcp.h

Signed-off-by: Ramalingam C 
Suggested-by: Daniel Vetter 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 include/drm/drm_hdcp.h | 6 --
 1 file changed, 6 deletions(-)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index d4e98b11b4aa..f243408ecf26 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -69,7 +69,6 @@
 #define HDCP_2_2_REP_SEND_ACK  15
 #define HDCP_2_2_REP_STREAM_MANAGE 16
 #define HDCP_2_2_REP_STREAM_READY  17
-#define HDCP_2_2_ERRATA_DP_STREAM_TYPE 50
 
 #define HDCP_2_2_RTX_LEN   8
 #define HDCP_2_2_RRX_LEN   8
@@ -220,11 +219,6 @@ struct hdcp2_rep_stream_ready {
u8  m_prime[HDCP_2_2_MPRIME_LEN];
 } __packed;
 
-struct hdcp2_dp_errata_stream_type {
-   u8  msg_id;
-   u8  stream_type;
-} __packed;
-
 /* HDCP2.2 TIMEOUTs in mSec */
 #define HDCP_2_2_CERT_TIMEOUT_MS   100
 #define HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS   1000
-- 
2.7.4

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[PATCH v12 05/38] drm/i915: MEI interface definition

2019-02-08 Thread Ramalingam C
Defining the mei-i915 interface functions and initialization of
the interface.

v2:
  Adjust to the new interface changes. [Tomas]
  Added further debug logs for the failures at MEI i/f.
  port in hdcp_port data is equipped to handle -ve values.
v3:
  mei comp is matched for global i915 comp master. [Daniel]
  In hdcp_shim hdcp_protocol() is replaced with const variable. [Daniel]
  mei wrappers are adjusted as per the i/f change [Daniel]
v4:
  port initialization is done only at hdcp2_init only [Danvet]
v5:
  I915 registers a subcomponent to be matched with mei_hdcp [Daniel]
v6:
  HDCP_disable for all connectors incase of comp_unbind.
  Tear down HDCP comp interface at i915_unload [Daniel]
v7:
  Component init and fini are moved out of connector ops [Daniel]
  hdcp_disable is not called from unbind. [Daniel]

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter  [v11]
---
 drivers/gpu/drm/i915/i915_drv.c|   1 +
 drivers/gpu/drm/i915/i915_drv.h|   7 +
 drivers/gpu/drm/i915/intel_connector.c |   2 +
 drivers/gpu/drm/i915/intel_display.c   |   4 +
 drivers/gpu/drm/i915/intel_drv.h   |   8 +
 drivers/gpu/drm/i915/intel_hdcp.c  | 398 -
 include/drm/i915_component.h   |   3 +
 7 files changed, 422 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6630212f2faf..c6354f6cdbdb 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -906,6 +906,7 @@ static int i915_driver_init_early(struct drm_i915_private 
*dev_priv)
mutex_init(&dev_priv->av_mutex);
mutex_init(&dev_priv->wm.wm_mutex);
mutex_init(&dev_priv->pps_mutex);
+   mutex_init(&dev_priv->hdcp_comp_mutex);
 
i915_memcpy_init_early(dev_priv);
intel_runtime_pm_init_early(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4a423753a71c..e1d6b7208118 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -55,6 +55,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "i915_fixed.h"
 #include "i915_params.h"
@@ -2055,6 +2056,12 @@ struct drm_i915_private {
 
struct i915_pmu pmu;
 
+   struct i915_hdcp_comp_master *hdcp_master;
+   bool hdcp_comp_added;
+
+   /* Mutex to protect the above hdcp component related values. */
+   struct mutex hdcp_comp_mutex;
+
/*
 * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
 * will be rejected. Instead look for a better place.
diff --git a/drivers/gpu/drm/i915/intel_connector.c 
b/drivers/gpu/drm/i915/intel_connector.c
index ee16758747c5..66ed3ee5998a 100644
--- a/drivers/gpu/drm/i915/intel_connector.c
+++ b/drivers/gpu/drm/i915/intel_connector.c
@@ -88,6 +88,8 @@ void intel_connector_destroy(struct drm_connector *connector)
 
kfree(intel_connector->detect_edid);
 
+   intel_hdcp_cleanup(intel_connector);
+
if (!IS_ERR_OR_NULL(intel_connector->edid))
kfree(intel_connector->edid);
 
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 5b8dabdb0e39..61d2deccf50a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15459,6 +15459,8 @@ int intel_modeset_init(struct drm_device *dev)
intel_update_czclk(dev_priv);
intel_modeset_init_hw(dev);
 
+   intel_hdcp_component_init(dev_priv);
+
if (dev_priv->max_cdclk_freq == 0)
intel_update_max_cdclk(dev_priv);
 
@@ -16320,6 +16322,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
/* flush any delayed tasks or pending work */
flush_scheduled_work();
 
+   intel_hdcp_component_fini(dev_priv);
+
drm_mode_config_cleanup(dev);
 
intel_overlay_cleanup(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8bc789e3ff99..083e2f78ac1f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -41,6 +41,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct drm_printer;
@@ -395,6 +396,9 @@ struct intel_hdcp_shim {
/* Detects panel's hdcp capability. This is optional for HDMI. */
int (*hdcp_capable)(struct intel_digital_port *intel_dig_port,
bool *hdcp_capable);
+
+   /* HDCP adaptation(DP/HDMI) required on the port */
+   enum hdcp_wired_protocol protocol;
 };
 
 struct intel_hdcp {
@@ -415,6 +419,7 @@ struct intel_hdcp {
 * content can flow only through a link protected by HDCP2.2.
 */
u8 content_type;
+   struct hdcp_port_data port_data;
 };
 
 struct intel_connector {
@@ -2088,6 +2093,9 @@ int intel_hdcp_disable(struct intel_connector *connector);
 int intel_hdcp_check_link(struct intel_connector *connector);
 bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)

[PATCH v12 02/38] drm/i915: Gathering the HDCP1.4 routines together

2019-02-08 Thread Ramalingam C
All HDCP1.4 routines are gathered together, followed by the generic
functions those can be extended for HDCP2.2 too.

Signed-off-by: Ramalingam C 
Acked-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
Reviewed-by: Tomas Winkler 
---
 drivers/gpu/drm/i915/intel_hdcp.c | 118 +++---
 1 file changed, 59 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index ce7ba3a9c000..8cb85b07cfde 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -730,6 +730,65 @@ struct intel_connector *intel_hdcp_to_connector(struct 
intel_hdcp *hdcp)
return container_of(hdcp, struct intel_connector, hdcp);
 }
 
+/* Implements Part 3 of the HDCP authorization procedure */
+int intel_hdcp_check_link(struct intel_connector *connector)
+{
+   struct intel_hdcp *hdcp = &connector->hdcp;
+   struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
+   struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+   enum port port = intel_dig_port->base.port;
+   int ret = 0;
+
+   if (!hdcp->shim)
+   return -ENOENT;
+
+   mutex_lock(&hdcp->mutex);
+
+   if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+   goto out;
+
+   if (!(I915_READ(PORT_HDCP_STATUS(port)) & HDCP_STATUS_ENC)) {
+   DRM_ERROR("%s:%d HDCP check failed: link is not encrypted,%x\n",
+ connector->base.name, connector->base.base.id,
+ I915_READ(PORT_HDCP_STATUS(port)));
+   ret = -ENXIO;
+   hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+   schedule_work(&hdcp->prop_work);
+   goto out;
+   }
+
+   if (hdcp->shim->check_link(intel_dig_port)) {
+   if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
+   hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
+   schedule_work(&hdcp->prop_work);
+   }
+   goto out;
+   }
+
+   DRM_DEBUG_KMS("[%s:%d] HDCP link failed, retrying authentication\n",
+ connector->base.name, connector->base.base.id);
+
+   ret = _intel_hdcp_disable(connector);
+   if (ret) {
+   DRM_ERROR("Failed to disable hdcp (%d)\n", ret);
+   hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+   schedule_work(&hdcp->prop_work);
+   goto out;
+   }
+
+   ret = _intel_hdcp_enable(connector);
+   if (ret) {
+   DRM_ERROR("Failed to enable hdcp (%d)\n", ret);
+   hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
+   schedule_work(&hdcp->prop_work);
+   goto out;
+   }
+
+out:
+   mutex_unlock(&hdcp->mutex);
+   return ret;
+}
+
 static void intel_hdcp_check_work(struct work_struct *work)
 {
struct intel_hdcp *hdcp = container_of(to_delayed_work(work),
@@ -866,62 +925,3 @@ void intel_hdcp_atomic_check(struct drm_connector 
*connector,
   new_state->crtc);
crtc_state->mode_changed = true;
 }
-
-/* Implements Part 3 of the HDCP authorization procedure */
-int intel_hdcp_check_link(struct intel_connector *connector)
-{
-   struct intel_hdcp *hdcp = &connector->hdcp;
-   struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
-   struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
-   enum port port = intel_dig_port->base.port;
-   int ret = 0;
-
-   if (!hdcp->shim)
-   return -ENOENT;
-
-   mutex_lock(&hdcp->mutex);
-
-   if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
-   goto out;
-
-   if (!(I915_READ(PORT_HDCP_STATUS(port)) & HDCP_STATUS_ENC)) {
-   DRM_ERROR("%s:%d HDCP check failed: link is not encrypted,%x\n",
- connector->base.name, connector->base.base.id,
- I915_READ(PORT_HDCP_STATUS(port)));
-   ret = -ENXIO;
-   hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
-   schedule_work(&hdcp->prop_work);
-   goto out;
-   }
-
-   if (hdcp->shim->check_link(intel_dig_port)) {
-   if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
-   hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
-   schedule_work(&hdcp->prop_work);
-   }
-   goto out;
-   }
-
-   DRM_DEBUG_KMS("[%s:%d] HDCP link failed, retrying authentication\n",
- connector->base.name, connector->base.base.id);
-
-   ret = _intel_hdcp_disable(connector);
-   if (ret) {
-   DRM_ERROR("Failed to disable hdcp (%d)\n", ret);
-   hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
-   schedule_work

[PATCH v12 11/38] drm: HDCP2.2 link check period

2019-02-08 Thread Ramalingam C
Time period for HDCP2.2 link check.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 include/drm/drm_hdcp.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index 7260b31af276..d4e98b11b4aa 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -13,6 +13,7 @@
 
 /* Period of hdcp checks (to ensure we're still authenticated) */
 #define DRM_HDCP_CHECK_PERIOD_MS   (128 * 16)
+#define DRM_HDCP2_CHECK_PERIOD_MS  500
 
 /* Shared lengths/masks between HDMI/DVI/DisplayPort */
 #define DRM_HDCP_AN_LEN8
-- 
2.7.4

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[PATCH v12 09/38] drm: helper functions for hdcp2 seq_num to from u32

2019-02-08 Thread Ramalingam C
Library functions for endianness are aligned for 16/32/64 bits.
But hdcp sequence numbers are 24bits(big endian).
So for their conversion to and from u32 helper functions are developed.

v2:
  Comment is updated. [Daniel]
  Reviewed-by Uma.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 include/drm/drm_hdcp.h | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index d6dfef8cff6a..7260b31af276 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -252,4 +252,22 @@ struct hdcp2_dp_errata_stream_type {
 #define HDCP_2_2_HDMI_RXSTATUS_READY(x)((x) & BIT(2))
 #define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x)   ((x) & BIT(3))
 
+/*
+ * Helper functions to convert 24bit big endian hdcp sequence number to
+ * host format and back
+ */
+static inline
+u32 drm_hdcp2_seq_num_to_u32(u8 seq_num[HDCP_2_2_SEQ_NUM_LEN])
+{
+   return (u32)(seq_num[2] | seq_num[1] << 8 | seq_num[0] << 16);
+}
+
+static inline
+void drm_hdcp2_u32_to_seq_num(u8 seq_num[HDCP_2_2_SEQ_NUM_LEN], u32 val)
+{
+   seq_num[0] = val >> 16;
+   seq_num[1] = val >> 8;
+   seq_num[2] = val;
+}
+
 #endif
-- 
2.7.4

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[PATCH v12 10/38] drm/i915: Implement HDCP2.2 repeater authentication

2019-02-08 Thread Ramalingam C
Implements the HDCP2.2 repeaters authentication steps such as verifying
the downstream topology and sending stream management information.

v2: Rebased.
v3:
  -EINVAL is returned for topology error and rollover scenario.
  Endianness conversion func from drm_hdcp.h is used [Uma]
v4:
  Rebased as part of patches reordering.
  Defined the mei service functions [Daniel]
v5:
  Redefined the mei service functions as per comp redesign.
v6:
  %s/uintxx_t/uxx
  Check for comp_master is removed.
v7:
  Adjust to the new mei interface.
  style issue fixed.
v8:
  drm_hdcp.h change is moved into separate patch [Daniel]
v9:
  %s/__swab16/cpu_to_be16. [Tomas]
  Reviewed-by Uma.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_hdcp.c | 125 +-
 1 file changed, 123 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index d63f620581ad..24051120d3bb 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -1041,7 +1041,7 @@ static int hdcp2_prepare_skey(struct intel_connector 
*connector,
return ret;
 }
 
-static __attribute__((unused)) int
+static int
 hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector,
  struct hdcp2_rep_send_receiverid_list
*rep_topology,
@@ -1070,7 +1070,7 @@ hdcp2_verify_rep_topology_prepare_ack(struct 
intel_connector *connector,
return ret;
 }
 
-static __attribute__((unused)) int
+static int
 hdcp2_verify_mprime(struct intel_connector *connector,
struct hdcp2_rep_stream_ready *stream_ready)
 {
@@ -1279,6 +1279,119 @@ static int hdcp2_session_key_exchange(struct 
intel_connector *connector)
return 0;
 }
 
+static
+int hdcp2_propagate_stream_management_info(struct intel_connector *connector)
+{
+   struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+   struct intel_hdcp *hdcp = &connector->hdcp;
+   union {
+   struct hdcp2_rep_stream_manage stream_manage;
+   struct hdcp2_rep_stream_ready stream_ready;
+   } msgs;
+   const struct intel_hdcp_shim *shim = hdcp->shim;
+   int ret;
+
+   /* Prepare RepeaterAuth_Stream_Manage msg */
+   msgs.stream_manage.msg_id = HDCP_2_2_REP_STREAM_MANAGE;
+   drm_hdcp2_u32_to_seq_num(msgs.stream_manage.seq_num_m, hdcp->seq_num_m);
+
+   /* K no of streams is fixed as 1. Stored as big-endian. */
+   msgs.stream_manage.k = cpu_to_be16(1);
+
+   /* For HDMI this is forced to be 0x0. For DP SST also this is 0x0. */
+   msgs.stream_manage.streams[0].stream_id = 0;
+   msgs.stream_manage.streams[0].stream_type = hdcp->content_type;
+
+   /* Send it to Repeater */
+   ret = shim->write_2_2_msg(intel_dig_port, &msgs.stream_manage,
+ sizeof(msgs.stream_manage));
+   if (ret < 0)
+   return ret;
+
+   ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_REP_STREAM_READY,
+&msgs.stream_ready, sizeof(msgs.stream_ready));
+   if (ret < 0)
+   return ret;
+
+   hdcp->port_data.seq_num_m = hdcp->seq_num_m;
+   hdcp->port_data.streams[0].stream_type = hdcp->content_type;
+
+   ret = hdcp2_verify_mprime(connector, &msgs.stream_ready);
+   if (ret < 0)
+   return ret;
+
+   hdcp->seq_num_m++;
+
+   if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) {
+   DRM_DEBUG_KMS("seq_num_m roll over.\n");
+   return -1;
+   }
+
+   return 0;
+}
+
+static
+int hdcp2_authenticate_repeater_topology(struct intel_connector *connector)
+{
+   struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+   struct intel_hdcp *hdcp = &connector->hdcp;
+   union {
+   struct hdcp2_rep_send_receiverid_list recvid_list;
+   struct hdcp2_rep_send_ack rep_ack;
+   } msgs;
+   const struct intel_hdcp_shim *shim = hdcp->shim;
+   u8 *rx_info;
+   u32 seq_num_v;
+   int ret;
+
+   ret = shim->read_2_2_msg(intel_dig_port, HDCP_2_2_REP_SEND_RECVID_LIST,
+&msgs.recvid_list, sizeof(msgs.recvid_list));
+   if (ret < 0)
+   return ret;
+
+   rx_info = msgs.recvid_list.rx_info;
+
+   if (HDCP_2_2_MAX_CASCADE_EXCEEDED(rx_info[1]) ||
+   HDCP_2_2_MAX_DEVS_EXCEEDED(rx_info[1])) {
+   DRM_DEBUG_KMS("Topology Max Size Exceeded\n");
+   return -EINVAL;
+   }
+
+   /* Converting and Storing the seq_num_v to local variable as DWORD */
+   seq_num_v = drm_hdcp2_seq_num_to_u32(msgs.recvid_list.seq_num_v);
+
+   if (seq_num_v < hdcp->seq_num_v) {
+   /* Roll over of the seq_num_v from repeater. Reauthenticate. */
+

[PATCH v12 00/38] drm/i915: Implement HDCP2.2

2019-02-08 Thread Ramalingam C
This series enables the HDCP2.2 Type 0 for I915. The sequence for
HDCP2.2 authentication and encryption is implemented as a generic flow
between HDMI and DP. Encoder specific implementations are moved
into hdcp_shim.

Intel HWs supports HDCP2.2 through ME FW. Hence this series
introduces a client driver for mei bus, so that for HDCP2.2
authentication, HDCP2.2 stack in I915 can avail the services from
ME FW. To enable this client driver set the config variable
CONFIG_INTEL_MEI_HDCP.

Userspace interface remains unchanged as version agnostic. When
userspace request for HDCP enable, Kernel will detect the HDCP source
and sink's HDCP version(1.4/2.2)capability and enable the best capable
version for that combination.

This series enables the HDCP2.2 for Type0 content streams.

Test-with: <1549566452-30175-1-git-send-email-ramalinga...@intel.com>

Major changes in v12
  - hdcp disable from unbind is removed.
  - hdcp component init and del are moved away from conenctor ops.
  - Review comemnts from Tomas are addressed. [Tomas]
  - Collected the r-bs and Acks given for v11.
  - ICL mei dev id patch is cherry-picked from
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git  
char-misc-linus
  - Changes for component framework are merged into drm-tip already.

To ease the review process, series is hosted at
https://github.com/ramalingampc2008/drm-tip.git hdcp2_2_v12

Daniel Vetter (1):
  drm/doc: document recommended component helper usage

Ramalingam C (34):
  drm/i915: Gathering the HDCP1.4 routines together
  drm: header for i915 - MEI_HDCP interface
  drm/i915: Initialize HDCP2.2
  drm/i915: MEI interface definition
  drm/i915: hdcp1.4 CP_IRQ handling and SW encryption tracking
  drm/i915: Enable and Disable of HDCP2.2
  drm/i915: Implement HDCP2.2 receiver authentication
  drm: helper functions for hdcp2 seq_num to from u32
  drm/i915: Implement HDCP2.2 repeater authentication
  drm: HDCP2.2 link check period
  drm/i915: Implement HDCP2.2 link integrity check
  drm/i915: Handle HDCP2.2 downstream topology change
  drm: removing the DP Errata msg and its msg id
  drm/i915: Implement the HDCP2.2 support for DP
  drm/i915: Implement the HDCP2.2 support for HDMI
  drm/i915: CP_IRQ handling for DP HDCP2.2 msgs
  drm/i915: Fix KBL HDCP2.2 encrypt status signalling
  misc/mei/hdcp: Client driver for HDCP application
  misc/mei/hdcp: Define ME FW interface for HDCP2.2
  misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session
  misc/mei/hdcp: Verify Receiver Cert and prepare km
  misc/mei/hdcp: Verify H_prime
  misc/mei/hdcp: Store the HDCP Pairing info
  misc/mei/hdcp: Initiate Locality check
  misc/mei/hdcp: Verify L_prime
  misc/mei/hdcp: Prepare Session Key
  misc/mei/hdcp: Repeater topology verification and ack
  misc/mei/hdcp: Verify M_prime
  misc/mei/hdcp: Enabling the HDCP authentication
  misc/mei/hdcp: Closing wired HDCP2.2 Tx Session
  misc/mei/hdcp: Component framework for I915 Interface
  FOR_TEST_ONLY: i915/Kconfig: Select mei_hdcp by I915
  FOR_TESTING_ONLY: debugfs: Excluding the LSPCon for HDCP1.4
  FOR_TESTING_ONLY: ICL: Limit clk to <= 340MHz

Tomas Winkler (3):
  mei: bus: whitelist hdcp client
  mei: bus: export to_mei_cl_device for mei client device drivers
  mei: me: add ice lake point device id.

 Documentation/driver-api/component.rst |2 +
 Documentation/gpu/drm-internals.rst|5 +
 drivers/gpu/drm/drm_drv.c  |   14 +
 drivers/gpu/drm/i915/i915_debugfs.c|   10 +-
 drivers/gpu/drm/i915/i915_drv.c|1 +
 drivers/gpu/drm/i915/i915_drv.h|7 +
 drivers/gpu/drm/i915/intel_connector.c |2 +
 drivers/gpu/drm/i915/intel_display.c   |4 +
 drivers/gpu/drm/i915/intel_dp.c|  350 -
 drivers/gpu/drm/i915/intel_drv.h   |   83 ++-
 drivers/gpu/drm/i915/intel_hdcp.c  | 1242 +---
 drivers/gpu/drm/i915/intel_hdmi.c  |  240 +-
 drivers/misc/mei/Kconfig   |8 +
 drivers/misc/mei/Makefile  |2 +
 drivers/misc/mei/bus-fixup.c   |   16 +
 drivers/misc/mei/bus.c |1 -
 drivers/misc/mei/hdcp/Makefile |7 +
 drivers/misc/mei/hdcp/mei_hdcp.c   |  842 ++
 drivers/misc/mei/hdcp/mei_hdcp.h   |  389 ++
 drivers/misc/mei/hw-me-regs.h  |2 +
 drivers/misc/mei/pci-me.c  |2 +
 include/drm/drm_hdcp.h |   25 +-
 include/drm/i915_component.h   |3 +
 include/drm/i915_mei_hdcp_interface.h  |  148 
 include/linux/mei_cl_bus.h |2 +
 25 files changed, 3280 insertions(+), 127 deletions(-)
 create mode 100644 drivers/misc/mei/hdcp/Makefile
 create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.c
 create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.h
 create mode 100644 include/drm/i915_mei_hdcp_interface.h

-- 
2.7.4

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[PATCH v12 04/38] drm/i915: Initialize HDCP2.2

2019-02-08 Thread Ramalingam C
Add the HDCP2.2 initialization to the existing HDCP1.4 stack.

v2:
  mei interface handle is protected with mutex. [Chris Wilson]
v3:
  Notifiers are used for the mei interface state.
v4:
  Poll for mei client device state
  Error msg for out of mem [Uma]
  Inline req for init function removed [Uma]
v5:
  Rebase as Part of reordering.
  Component is used for the I915 and MEI_HDCP interface [Daniel]
v6:
  HDCP2.2 uses the I915 component master to communicate with mei_hdcp
- [Daniel]
  Required HDCP2.2 variables defined [Sean Paul]
v7:
  intel_hdcp2.2_init returns void [Uma]
  Realigning the codes.
v8:
  Avoid using bool structure members.
  MEI interface related changes are moved into separate patch.
  Commit msg is updated accordingly.
  intel_hdcp_exit is defined and used from i915_unload
v9:
  Movement of the hdcp_check_link is moved to new patch [Daniel]
  intel_hdcp2_exit is removed as mei_comp will be unbind in i915_unload.
v10:
  bool is used in struct to make coding simpler. [Daniel]
  hdmi hdcp init is placed correctly after encoder attachment.
v11:
  hdcp2_capability check is moved into hdcp.c [Tomas]

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/intel_drv.h  | 11 +++
 drivers/gpu/drm/i915/intel_hdcp.c | 28 ++--
 drivers/gpu/drm/i915/intel_hdmi.c |  6 +++---
 3 files changed, 40 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5eb0b666d0b0..8bc789e3ff99 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -404,6 +404,17 @@ struct intel_hdcp {
u64 value;
struct delayed_work check_work;
struct work_struct prop_work;
+
+   /* HDCP2.2 related definitions */
+   /* Flag indicates whether this connector supports HDCP2.2 or not. */
+   bool hdcp2_supported;
+
+   /*
+* Content Stream Type defined by content owner. TYPE0(0x0) content can
+* flow in the link protected by HDCP2.2 or HDCP1.4, where as TYPE1(0x1)
+* content can flow only through a link protected by HDCP2.2.
+*/
+   u8 content_type;
 };
 
 struct intel_connector {
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
b/drivers/gpu/drm/i915/intel_hdcp.c
index 8cb85b07cfde..7b1097d79fb8 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -832,14 +832,34 @@ bool is_hdcp_supported(struct drm_i915_private *dev_priv, 
enum port port)
return INTEL_GEN(dev_priv) >= 9 && port < PORT_E;
 }
 
+static bool is_hdcp2_supported(struct drm_i915_private *dev_priv)
+{
+   if (!IS_ENABLED(CONFIG_INTEL_MEI_HDCP))
+   return false;
+
+   return (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv) ||
+   IS_KABYLAKE(dev_priv));
+}
+
+static void intel_hdcp2_init(struct intel_connector *connector)
+{
+   struct intel_hdcp *hdcp = &connector->hdcp;
+
+   /* TODO: MEI interface needs to be initialized here */
+   hdcp->hdcp2_supported = true;
+}
+
 int intel_hdcp_init(struct intel_connector *connector,
const struct intel_hdcp_shim *shim)
 {
+   struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
 
-   ret = drm_connector_attach_content_protection_property(
-   &connector->base);
+   if (!shim)
+   return -EINVAL;
+
+   ret = 
drm_connector_attach_content_protection_property(&connector->base);
if (ret)
return ret;
 
@@ -847,6 +867,10 @@ int intel_hdcp_init(struct intel_connector *connector,
mutex_init(&hdcp->mutex);
INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);
INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);
+
+   if (is_hdcp2_supported(dev_priv))
+   intel_hdcp2_init(connector);
+
return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index f125a62eba8c..faeedf76db99 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2427,6 +2427,9 @@ void intel_hdmi_init_connector(struct intel_digital_port 
*intel_dig_port,
 
intel_hdmi_add_properties(intel_hdmi, connector);
 
+   intel_connector_attach_encoder(intel_connector, intel_encoder);
+   intel_hdmi->attached_connector = intel_connector;
+
if (is_hdcp_supported(dev_priv, port)) {
int ret = intel_hdcp_init(intel_connector,
  &intel_hdmi_hdcp_shim);
@@ -2434,9 +2437,6 @@ void intel_hdmi_init_connector(struct intel_digital_port 
*intel_dig_port,
DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
}
 
-   intel_connector_attach_encoder(intel_connector, intel_encoder);
-   intel_hdmi->attached_connector = intel_connector;
-
/* 

[PATCH v12 01/38] drm/doc: document recommended component helper usage

2019-02-08 Thread Ramalingam C
From: Daniel Vetter 

Now that component has docs it's worth spending a few words and
hyperlinks on recommended best practices in drm.

Cc: Russell King - ARM Linux admin 
Signed-off-by: Daniel Vetter 
---
 Documentation/driver-api/component.rst |  2 ++
 Documentation/gpu/drm-internals.rst|  5 +
 drivers/gpu/drm/drm_drv.c  | 14 ++
 3 files changed, 21 insertions(+)

diff --git a/Documentation/driver-api/component.rst 
b/Documentation/driver-api/component.rst
index 2da4a8f20607..57e37590733f 100644
--- a/Documentation/driver-api/component.rst
+++ b/Documentation/driver-api/component.rst
@@ -1,3 +1,5 @@
+.. _component:
+
 ==
 Component Helper for Aggregate Drivers
 ==
diff --git a/Documentation/gpu/drm-internals.rst 
b/Documentation/gpu/drm-internals.rst
index 3ae23a5454ac..966bd2d9f0cc 100644
--- a/Documentation/gpu/drm-internals.rst
+++ b/Documentation/gpu/drm-internals.rst
@@ -93,6 +93,11 @@ Device Instance and Driver Handling
 Driver Load
 ---
 
+Component Helper Usage
+~~
+
+.. kernel-doc:: drivers/gpu/drm/drm_drv.c
+   :doc: component helper usage recommendations
 
 IRQ Helper Library
 ~~
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 381581b01d48..aae413003705 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -457,6 +457,20 @@ static void drm_fs_inode_free(struct inode *inode)
 }
 
 /**
+ * DOC: component helper usage recommendations
+ *
+ * DRM drivers that drive hardware where a logical device consists of a pile of
+ * independent hardware blocks are recommended to use the :ref:`component 
helper
+ * library`. The entire device initialization procedure should be 
run
+ * from the &component_master_ops.master_bind callback, starting with
+ * drm_dev_init(), then binding all components with component_bind_all() and
+ * finishing with drm_dev_register(). For consistency and easier sharing of
+ * components across drivers the opaque pointer passed to all components 
through
+ * component_bind_all() should point at &struct drm_device of the device
+ * instance, not some driver specific private structure.
+ */
+
+/**
  * drm_dev_init - Initialise new DRM device
  * @dev: DRM device
  * @driver: DRM driver
-- 
2.7.4

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[PATCH v12 03/38] drm: header for i915 - MEI_HDCP interface

2019-02-08 Thread Ramalingam C
Header defines the interface for the I915 and MEI_HDCP drivers.
This interface is specific to the usage of mei_hdcp from gen9+
platforms for ME FW based HDCP2.2 services.

And Generic HDCP2.2 protocol specific definitions
are added at drm/drm_hdcp.h.

v2:
  Commit msg is enhanced [Daniel]
v3:
  i915_hdcp_comp_master is defined.

Signed-off-by: Ramalingam C 
Reviewed-by: Daniel Vetter 
Reviewed-by: Uma Shankar 
---
 include/drm/i915_mei_hdcp_interface.h | 148 ++
 1 file changed, 148 insertions(+)
 create mode 100644 include/drm/i915_mei_hdcp_interface.h

diff --git a/include/drm/i915_mei_hdcp_interface.h 
b/include/drm/i915_mei_hdcp_interface.h
new file mode 100644
index ..bc5b0c71ed3c
--- /dev/null
+++ b/include/drm/i915_mei_hdcp_interface.h
@@ -0,0 +1,148 @@
+/* SPDX-License-Identifier: (GPL-2.0+) */
+/*
+ * Copyright © 2017-2018 Intel Corporation
+ *
+ * Authors:
+ * Ramalingam C 
+ */
+
+#ifndef _I915_MEI_HDCP_INTERFACE_H_
+#define _I915_MEI_HDCP_INTERFACE_H_
+
+#include 
+#include 
+#include 
+
+/**
+ * enum hdcp_port_type - HDCP port implementation type defined by ME FW
+ * @HDCP_PORT_TYPE_INVALID: Invalid hdcp port type
+ * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port
+ * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON
+ *(HDMI 2.0) solution
+ * @HDCP_PORT_TYPE_CPDP: HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3)
+ *  solution
+ */
+enum hdcp_port_type {
+   HDCP_PORT_TYPE_INVALID,
+   HDCP_PORT_TYPE_INTEGRATED,
+   HDCP_PORT_TYPE_LSPCON,
+   HDCP_PORT_TYPE_CPDP
+};
+
+/**
+ * enum hdcp_wired_protocol - HDCP adaptation used on the port
+ * @HDCP_PROTOCOL_INVALID: Invalid HDCP adaptation protocol
+ * @HDCP_PROTOCOL_HDMI: HDMI adaptation of HDCP used on the port
+ * @HDCP_PROTOCOL_DP: DP adaptation of HDCP used on the port
+ */
+enum hdcp_wired_protocol {
+   HDCP_PROTOCOL_INVALID,
+   HDCP_PROTOCOL_HDMI,
+   HDCP_PROTOCOL_DP
+};
+
+/**
+ * struct hdcp_port_data - intel specific HDCP port data
+ * @port: port index as per I915
+ * @port_type: HDCP port type as per ME FW classification
+ * @protocol: HDCP adaptation as per ME FW
+ * @k: No of streams transmitted on a port. Only on DP MST this is != 1
+ * @seq_num_m: Count of RepeaterAuth_Stream_Manage msg propagated.
+ *Initialized to 0 on AKE_INIT. Incremented after every successful
+ *transmission of RepeaterAuth_Stream_Manage message. When it rolls
+ *over re-Auth has to be triggered.
+ * @streams: struct hdcp2_streamid_type[k]. Defines the type and id for the
+ *  streams
+ */
+struct hdcp_port_data {
+   short int port;
+   u8 port_type;
+   u8 protocol;
+   u16 k;
+   u32 seq_num_m;
+   struct hdcp2_streamid_type *streams;
+};
+
+/**
+ * struct i915_hdcp_component_ops- ops for HDCP2.2 services.
+ * @owner: Module providing the ops
+ * @initiate_hdcp2_session: Initiate a Wired HDCP2.2 Tx Session.
+ * And Prepare AKE_Init.
+ * @verify_receiver_cert_prepare_km: Verify the Receiver Certificate
+ *  AKE_Send_Cert and prepare
+AKE_Stored_Km/AKE_No_Stored_Km
+ * @verify_hprime: Verify AKE_Send_H_prime
+ * @store_pairing_info: Store pairing info received
+ * @initiate_locality_check: Prepare LC_Init
+ * @verify_lprime: Verify lprime
+ * @get_session_key: Prepare SKE_Send_Eks
+ * @repeater_check_flow_prepare_ack: Validate the Downstream topology
+ *  and prepare rep_ack
+ * @verify_mprime: Verify mprime
+ * @enable_hdcp_authentication:  Mark a port as authenticated.
+ * @close_hdcp_session: Close the Wired HDCP Tx session per port.
+ * This also disables the authenticated state of the port.
+ */
+struct i915_hdcp_component_ops {
+   /**
+* @owner: mei_hdcp module
+*/
+   struct module *owner;
+
+   int (*initiate_hdcp2_session)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ake_init *ake_data);
+   int (*verify_receiver_cert_prepare_km)(struct device *dev,
+  struct hdcp_port_data *data,
+  struct hdcp2_ake_send_cert
+   *rx_cert,
+  bool *km_stored,
+  struct hdcp2_ake_no_stored_km
+   *ek_pub_km,
+  size_t *msg_sz);
+   int (*verify_hprime)(struct device *dev,
+struct hdcp_port_data *data,
+struct hdcp2_ake_send_hprime *rx_hprime);
+   int (*store_pairing_info)(struct device *dev,
+   

[PATCH v12 01/38] drm/doc: document recommended component helper usage

2019-02-08 Thread Ramalingam C
From: Daniel Vetter 

Now that component has docs it's worth spending a few words and
hyperlinks on recommended best practices in drm.

Cc: Russell King - ARM Linux admin 
Signed-off-by: Daniel Vetter 
---
 Documentation/driver-api/component.rst |  2 ++
 Documentation/gpu/drm-internals.rst|  5 +
 drivers/gpu/drm/drm_drv.c  | 14 ++
 3 files changed, 21 insertions(+)

diff --git a/Documentation/driver-api/component.rst 
b/Documentation/driver-api/component.rst
index 2da4a8f20607..57e37590733f 100644
--- a/Documentation/driver-api/component.rst
+++ b/Documentation/driver-api/component.rst
@@ -1,3 +1,5 @@
+.. _component:
+
 ==
 Component Helper for Aggregate Drivers
 ==
diff --git a/Documentation/gpu/drm-internals.rst 
b/Documentation/gpu/drm-internals.rst
index 3ae23a5454ac..966bd2d9f0cc 100644
--- a/Documentation/gpu/drm-internals.rst
+++ b/Documentation/gpu/drm-internals.rst
@@ -93,6 +93,11 @@ Device Instance and Driver Handling
 Driver Load
 ---
 
+Component Helper Usage
+~~
+
+.. kernel-doc:: drivers/gpu/drm/drm_drv.c
+   :doc: component helper usage recommendations
 
 IRQ Helper Library
 ~~
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 381581b01d48..aae413003705 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -457,6 +457,20 @@ static void drm_fs_inode_free(struct inode *inode)
 }
 
 /**
+ * DOC: component helper usage recommendations
+ *
+ * DRM drivers that drive hardware where a logical device consists of a pile of
+ * independent hardware blocks are recommended to use the :ref:`component 
helper
+ * library`. The entire device initialization procedure should be 
run
+ * from the &component_master_ops.master_bind callback, starting with
+ * drm_dev_init(), then binding all components with component_bind_all() and
+ * finishing with drm_dev_register(). For consistency and easier sharing of
+ * components across drivers the opaque pointer passed to all components 
through
+ * component_bind_all() should point at &struct drm_device of the device
+ * instance, not some driver specific private structure.
+ */
+
+/**
  * drm_dev_init - Initialise new DRM device
  * @dev: DRM device
  * @driver: DRM driver
-- 
2.7.4

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[PATCH v12 00/38] drm/i915: Implement HDCP2.2

2019-02-08 Thread Ramalingam C
This series enables the HDCP2.2 Type 0 for I915. The sequence for
HDCP2.2 authentication and encryption is implemented as a generic flow
between HDMI and DP. Encoder specific implementations are moved
into hdcp_shim.

Intel HWs supports HDCP2.2 through ME FW. Hence this series
introduces a client driver for mei bus, so that for HDCP2.2
authentication, HDCP2.2 stack in I915 can avail the services from
ME FW. To enable this client driver set the config variable
CONFIG_INTEL_MEI_HDCP.

Userspace interface remains unchanged as version agnostic. When
userspace request for HDCP enable, Kernel will detect the HDCP source
and sink's HDCP version(1.4/2.2)capability and enable the best capable
version for that combination.

This series enables the HDCP2.2 for Type0 content streams.

Test-with: <1549566452-30175-1-git-send-email-ramalinga...@intel.com>

Major changes in v12
  - hdcp disable from unbind is removed.
  - hdcp component init and del are moved away from conenctor ops.
  - Review comemnts from Tomas are addressed. [Tomas]
  - Collected the r-bs and Acks given for v11.
  - ICL mei dev id patch is cherry-picked from
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git  
char-misc-linus
  - Changes for component framework are merged into drm-tip already.

To ease the review process, series is hosted at
https://github.com/ramalingampc2008/drm-tip.git hdcp2_2_v12

Daniel Vetter (1):
  drm/doc: document recommended component helper usage

Ramalingam C (34):
  drm/i915: Gathering the HDCP1.4 routines together
  drm: header for i915 - MEI_HDCP interface
  drm/i915: Initialize HDCP2.2
  drm/i915: MEI interface definition
  drm/i915: hdcp1.4 CP_IRQ handling and SW encryption tracking
  drm/i915: Enable and Disable of HDCP2.2
  drm/i915: Implement HDCP2.2 receiver authentication
  drm: helper functions for hdcp2 seq_num to from u32
  drm/i915: Implement HDCP2.2 repeater authentication
  drm: HDCP2.2 link check period
  drm/i915: Implement HDCP2.2 link integrity check
  drm/i915: Handle HDCP2.2 downstream topology change
  drm: removing the DP Errata msg and its msg id
  drm/i915: Implement the HDCP2.2 support for DP
  drm/i915: Implement the HDCP2.2 support for HDMI
  drm/i915: CP_IRQ handling for DP HDCP2.2 msgs
  drm/i915: Fix KBL HDCP2.2 encrypt status signalling
  misc/mei/hdcp: Client driver for HDCP application
  misc/mei/hdcp: Define ME FW interface for HDCP2.2
  misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session
  misc/mei/hdcp: Verify Receiver Cert and prepare km
  misc/mei/hdcp: Verify H_prime
  misc/mei/hdcp: Store the HDCP Pairing info
  misc/mei/hdcp: Initiate Locality check
  misc/mei/hdcp: Verify L_prime
  misc/mei/hdcp: Prepare Session Key
  misc/mei/hdcp: Repeater topology verification and ack
  misc/mei/hdcp: Verify M_prime
  misc/mei/hdcp: Enabling the HDCP authentication
  misc/mei/hdcp: Closing wired HDCP2.2 Tx Session
  misc/mei/hdcp: Component framework for I915 Interface
  FOR_TEST_ONLY: i915/Kconfig: Select mei_hdcp by I915
  FOR_TESTING_ONLY: debugfs: Excluding the LSPCon for HDCP1.4
  FOR_TESTING_ONLY: ICL: Limit clk to <= 340MHz

Tomas Winkler (3):
  mei: bus: whitelist hdcp client
  mei: bus: export to_mei_cl_device for mei client device drivers
  mei: me: add ice lake point device id.

 Documentation/driver-api/component.rst |2 +
 Documentation/gpu/drm-internals.rst|5 +
 drivers/gpu/drm/drm_drv.c  |   14 +
 drivers/gpu/drm/i915/i915_debugfs.c|   10 +-
 drivers/gpu/drm/i915/i915_drv.c|1 +
 drivers/gpu/drm/i915/i915_drv.h|7 +
 drivers/gpu/drm/i915/intel_connector.c |2 +
 drivers/gpu/drm/i915/intel_display.c   |4 +
 drivers/gpu/drm/i915/intel_dp.c|  350 -
 drivers/gpu/drm/i915/intel_drv.h   |   83 ++-
 drivers/gpu/drm/i915/intel_hdcp.c  | 1242 +---
 drivers/gpu/drm/i915/intel_hdmi.c  |  240 +-
 drivers/misc/mei/Kconfig   |8 +
 drivers/misc/mei/Makefile  |2 +
 drivers/misc/mei/bus-fixup.c   |   16 +
 drivers/misc/mei/bus.c |1 -
 drivers/misc/mei/hdcp/Makefile |7 +
 drivers/misc/mei/hdcp/mei_hdcp.c   |  842 ++
 drivers/misc/mei/hdcp/mei_hdcp.h   |  389 ++
 drivers/misc/mei/hw-me-regs.h  |2 +
 drivers/misc/mei/pci-me.c  |2 +
 include/drm/drm_hdcp.h |   25 +-
 include/drm/i915_component.h   |3 +
 include/drm/i915_mei_hdcp_interface.h  |  148 
 include/linux/mei_cl_bus.h |2 +
 25 files changed, 3280 insertions(+), 127 deletions(-)
 create mode 100644 drivers/misc/mei/hdcp/Makefile
 create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.c
 create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.h
 create mode 100644 include/drm/i915_mei_hdcp_interface.h

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[PATCH] drm/amd/display: Use vrr friendly pageflip throttling in DC.

2019-02-08 Thread Mario Kleiner
In VRR mode, keep track of the vblank count of the last
completed pageflip in amdgpu_crtc->last_flip_vblank, as
recorded in the pageflip completion handler after each
completed flip.

Use that count to prevent mmio programming a new pageflip
within the same vblank in which the last pageflip completed,
iow. to throttle pageflips to at most one flip per video
frame, while at the same time allowing to request a flip
not only before start of vblank, but also anywhere within
vblank.

The old logic did the same, and made sense for regular fixed
refresh rate flipping, but in vrr mode it prevents requesting
a flip anywhere inside the possibly huge vblank, thereby
reducing framerate in vrr mode instead of improving it, by
delaying a slightly delayed flip requests up to a maximum
vblank duration + 1 scanout duration. This would limit VRR
usefulness to only help applications with a very high GPU
demand, which can submit the flip request before start of
vblank, but then have to wait long for fences to complete.

With this method a flip can be both requested and - after
fences have completed - executed, ie. it doesn't matter if
the request (amdgpu_dm_do_flip()) gets delayed until deep
into the extended vblank due to cpu execution delays. This
also allows clients which want to regulate framerate within
the vrr range a much more fine-grained control of flip timing,
a feature that might be useful for video playback, and is
very useful for neuroscience/vision research applications.

In regular non-VRR mode, retain the old flip submission
behavior. This to keep flip scheduling for fullscreen X11/GLX
OpenGL clients intact, if they use the GLX_OML_sync_control
extensions glXSwapBufferMscOML(, ..., target_msc,...) function
with a specific target_msc target vblank count.

glXSwapBuffersMscOML() or DRI3/Present PresentPixmap() will
not flip at the proper target_msc for a non-zero target_msc
if VRR mode is active with this patch. They'd often flip one
frame too early. However, this limitation should not matter
much in VRR mode, as scheduling based on vblank counts is
pretty futile/unusable under variable refresh duration
anyway, so no real extra harm is done.

According to some testing already done with this patch by
Nicholas on top of my tests, IGT tests didn't report any
problems. If fixes stuttering and flickering when flipping
at rates below the minimum vrr refresh rate.

Fixes: bb47de736661 ("drm/amdgpu: Set FreeSync state using drm VRR
properties")
Signed-off-by: Mario Kleiner 
Cc: 
Cc: Nicholas Kazlauskas 
Cc: Harry Wentland 
Cc: Alex Deucher 
Cc: Michel Dänzer 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h  |  1 +
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 33 ---
 2 files changed, 30 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index bfa394ffd6d2..87ca5746f861 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -411,6 +411,7 @@ struct amdgpu_crtc {
struct amdgpu_flip_work *pflip_works;
enum amdgpu_flip_status pflip_status;
int deferred_flip_completion;
+   u64 last_flip_vblank;
/* pll sharing */
struct amdgpu_atom_ss ss;
bool ss_enabled;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d59bafc84475..d4da331aa349 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -303,12 +303,11 @@ static void dm_pflip_high_irq(void *interrupt_params)
return;
}
 
+   /* Update to correct count(s) if racing with vblank irq */
+   amdgpu_crtc->last_flip_vblank = 
drm_crtc_accurate_vblank_count(&amdgpu_crtc->base);
 
/* wake up userspace */
if (amdgpu_crtc->event) {
-   /* Update to correct count(s) if racing with vblank irq */
-   drm_crtc_accurate_vblank_count(&amdgpu_crtc->base);
-
drm_crtc_send_vblank_event(&amdgpu_crtc->base, 
amdgpu_crtc->event);
 
/* page flip completed. clean up */
@@ -4736,6 +4735,8 @@ static void amdgpu_dm_commit_planes(struct 
drm_atomic_state *state,
struct amdgpu_bo *abo;
uint64_t tiling_flags, dcc_address;
uint32_t target, target_vblank;
+   uint64_t last_flip_vblank;
+   bool vrr_active = acrtc_state->freesync_config.state == 
VRR_STATE_ACTIVE_VARIABLE;
 
struct {
struct dc_surface_update surface_updates[MAX_SURFACES];
@@ -4889,7 +4890,31 @@ static void amdgpu_dm_commit_planes(struct 
drm_atomic_state *state,
 * hopefully eliminating dc_*_update structs in their entirety.
 */
if (flip_count) {
-   target = (uint32_t)drm_crtc_vblank_count(pcrtc) + 
*wait_for_vblank;
+   if (!vrr_active) {
+   /* Use old throttling in non-vrr fixed refres

[Bug 202533] DVI Monitors blank in 4.20-6 kernel

2019-02-08 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=202533

Ilia Mirkin (imir...@alum.mit.edu) changed:

   What|Removed |Added

 CC||imir...@alum.mit.edu

--- Comment #1 from Ilia Mirkin (imir...@alum.mit.edu) ---
There weren't a ton of changes to nouveau between 4.19 and 4.20. Can you do a
bisect?

There were some changes to add support for HDMI 2.0, but only on GM20x GPUs
(you have a GK10x GPU, which is earlier). And a handful of fixes to MST-related
object lifetime management. It's likely that you have a MST dock, but those
changes don't seem like they would cause anything that drastic.

Please include dmesg and xorg logs.

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[Bug 202533] New: DVI Monitors blank in 4.20-6 kernel

2019-02-08 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=202533

Bug ID: 202533
   Summary: DVI Monitors blank in 4.20-6 kernel
   Product: Drivers
   Version: 2.5
Kernel Version: 4.20
  Hardware: Intel
OS: Linux
  Tree: Mainline
Status: NEW
  Severity: normal
  Priority: P1
 Component: Video(DRI - non Intel)
  Assignee: drivers_video-...@kernel-bugs.osdl.org
  Reporter: acollie...@gmail.com
Regression: No

Running Fedora 29 with a Dell Precision M4700 and a Dell Pro2x dock. Has the
K1000 Nvidia card. Under the 4.19 kernel I was able to have all 3 of my
external monitors hooked up and working properly. Anytime I've tried booting
into any 4.20 kernel, only my VGA monitor will display, and the other two are
blank. Currently running the Nouveau drivers. I keep testing each 4.20 kernel
that comes out but none of them have fixed the issue.

Running on Gnome 3.30 under x11 if that matters.

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[radeon-alex:amd-staging-drm-next 332/333] htmldocs: drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c:376: warning: Function parameter or member 'ih' not described in 'amdgpu_irq_dispatch'

2019-02-08 Thread kbuild test robot
tree:   git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head:   0bf64b0a9f7850809c4da2fafce36d1504cc28d9
commit: 65631c9dcd427612004c1f10e4c12fcb67587db3 [332/333] drm/amdgpu: cleanup 
amdgpu_ih_process a bit more
reproduce: make htmldocs

All warnings (new ones prefixed by >>):

   include/net/mac80211.h:1004: warning: Function parameter or member 
'status.status_driver_data' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:1004: warning: Function parameter or member 
'driver_rates' not described in 'ieee80211_tx_info'
   include/net/mac80211.h:1004: warning: Function parameter or member 'pad' not 
described in 'ieee80211_tx_info'
   include/net/mac80211.h:1004: warning: Function parameter or member 
'rate_driver_data' not described in 'ieee80211_tx_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'rx_stats_avg' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'rx_stats_avg.signal' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'rx_stats_avg.chain_signal' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.filtered' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.retry_failed' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.retry_count' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.lost_packets' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.last_tdls_pkt_time' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.msdu_retries' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.msdu_failed' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.last_ack' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.last_ack_signal' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.ack_signal_filled' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'status_stats.avg_ack_signal' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'tx_stats.packets' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'tx_stats.bytes' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'tx_stats.last_rate' not described in 'sta_info'
   net/mac80211/sta_info.h:590: warning: Function parameter or member 
'tx_stats.msdu' not described in 'sta_info'
   kernel/rcu/tree.c:711: warning: Excess function parameter 'irq' description 
in 'rcu_nmi_exit'
   include/linux/dma-buf.h:304: warning: Function parameter or member 
'cb_excl.cb' not described in 'dma_buf'
   include/linux/dma-buf.h:304: warning: Function parameter or member 
'cb_excl.poll' not described in 'dma_buf'
   include/linux/dma-buf.h:304: warning: Function parameter or member 
'cb_excl.active' not described in 'dma_buf'
   include/linux/dma-buf.h:304: warning: Function parameter or member 
'cb_shared.cb' not described in 'dma_buf'
   include/linux/dma-buf.h:304: warning: Function parameter or member 
'cb_shared.poll' not described in 'dma_buf'
   include/linux/dma-buf.h:304: warning: Function parameter or member 
'cb_shared.active' not described in 'dma_buf'
   include/linux/dma-fence-array.h:54: warning: Function parameter or member 
'work' not described in 'dma_fence_array'
   include/linux/firmware/intel/stratix10-svc-client.h:1: warning: no 
structured comments found
   include/linux/gpio/driver.h:371: warning: Function parameter or member 
'init_valid_mask' not described in 'gpio_chip'
   include/linux/iio/hw-consumer.h:1: warning: no structured comments found
   include/linux/input/sparse-keymap.h:46: warning: Function parameter or 
member 'sw' not described in 'key_entry'
   drivers/mtd/nand/raw/nand_base.c:420: warning: Function parameter or member 
'chip' not described in 'nand_fill_oob'
   drivers/mtd/nand/raw/nand_bbt.c:173: warning: Function parameter or member 
'this' not described in 'read_bbt'
   drivers/mtd/nand/raw/nand_bbt.c:173: warning: Excess function parameter 
'chip' description in 'read_bbt'
   include/linux/regulator/machine.h:199: warning: Function parameter or member 
'max_uV_step' not described in 'regulation_constraints'
   include/linux/regulator/driver.h:228: warning: Function parameter or member 
'resume' not described in 'regulator_ops'
   arch/s390/include/asm/cio.h:245: warning: Funct

[Bug 108464] System fails to reboot after Ctrl-Alt-Del

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108464

--- Comment #22 from Duncan Roe  ---
Created attachment 143346
  --> https://bugs.freedesktop.org/attachment.cgi?id=143346&action=edit
dmesg o/p showing output from Attachment 143344

This is a typical BUG occurrence. Stack trace looks similar to attachment
143055.
Would it help to add diagnostics as in 143055? Which variables would you want
to see?

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[drm-tip:drm-tip 2/8] drivers/gpu/drm//arm/display/komeda/komeda_kms.c:33:2: error: unknown field 'driver_features' specified in initializer

2019-02-08 Thread kbuild test robot
tree:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
head:   d4794b009ccd1ef8816e15c833f07ab696911a8d
commit: bd6ee5d2d2032416ba36ec6c24bf513f4ff0d338 [2/8] Merge remote-tracking 
branch 'drm-misc/drm-misc-next' into drm-tip
config: i386-randconfig-h0-02082357 (attached as .config)
compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4
reproduce:
git checkout bd6ee5d2d2032416ba36ec6c24bf513f4ff0d338
# save the attached .config to linux build tree
make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/gpu/drm//arm/display/komeda/komeda_dev.c: In function 
'komeda_parse_pipe_dt':
   drivers/gpu/drm//arm/display/komeda/komeda_dev.c:27:3: error: implicit 
declaration of function 'DRM_ERROR' [-Werror=implicit-function-declaration]
  DRM_ERROR("get aclk for pipeline %d failed!\n", pipe_id);
  ^
   drivers/gpu/drm//arm/display/komeda/komeda_dev.c: In function 
'komeda_dev_create':
   drivers/gpu/drm//arm/display/komeda/komeda_dev.c:127:2: error: implicit 
declaration of function 'DRM_INFO' [-Werror=implicit-function-declaration]
 DRM_INFO("Found ARM Mali-D%x version r%dp%d\n",
 ^
   drivers/gpu/drm//arm/display/komeda/komeda_dev.c: In function 
'komeda_dev_destroy':
>> drivers/gpu/drm//arm/display/komeda/komeda_dev.c:170:3: error: implicit 
>> declaration of function 'devm_iounmap' 
>> [-Werror=implicit-function-declaration]
  devm_iounmap(dev, mdev->reg_base);
  ^
   cc1: some warnings being treated as errors
--
   drivers/gpu/drm//arm/display/komeda/komeda_framebuffer.c: In function 
'komeda_fb_create':
>> drivers/gpu/drm//arm/display/komeda/komeda_framebuffer.c:99:31: error: 
>> dereferencing pointer to incomplete type
 struct komeda_dev *mdev = dev->dev_private;
  ^
--
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:32:15: error: variable 
'komeda_kms_driver' has initializer but incomplete type
static struct drm_driver komeda_kms_driver = {
  ^
>> drivers/gpu/drm//arm/display/komeda/komeda_kms.c:33:2: error: unknown field 
>> 'driver_features' specified in initializer
 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
 ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:33:21: error: 'DRIVER_GEM' 
undeclared here (not in a function)
 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
^
>> drivers/gpu/drm//arm/display/komeda/komeda_kms.c:33:34: error: 
>> 'DRIVER_MODESET' undeclared here (not in a function)
 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
 ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:33:51: error: 
'DRIVER_ATOMIC' undeclared here (not in a function)
 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
  ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:34:7: error: 'DRIVER_PRIME' 
undeclared here (not in a function)
  DRIVER_PRIME,
  ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:34:7: warning: excess 
elements in struct initializer
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:34:7: warning: (near 
initialization for 'komeda_kms_driver')
>> drivers/gpu/drm//arm/display/komeda/komeda_kms.c:35:2: error: unknown field 
>> 'lastclose' specified in initializer
 .lastclose   = drm_fb_helper_lastclose,
 ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:35:2: warning: excess 
elements in struct initializer
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:35:2: warning: (near 
initialization for 'komeda_kms_driver')
>> drivers/gpu/drm//arm/display/komeda/komeda_kms.c:36:2: error: unknown field 
>> 'gem_free_object_unlocked' specified in initializer
 .gem_free_object_unlocked = drm_gem_cma_free_object,
 ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:36:2: warning: excess 
elements in struct initializer
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:36:2: warning: (near 
initialization for 'komeda_kms_driver')
>> drivers/gpu/drm//arm/display/komeda/komeda_kms.c:37:2: error: unknown field 
>> 'gem_vm_ops' specified in initializer
 .gem_vm_ops   = &drm_gem_cma_vm_ops,
 ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:37:2: warning: excess 
elements in struct initializer
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:37:2: warning: (near 
initialization for 'komeda_kms_driver')
>> drivers/gpu/drm//arm/display/komeda/komeda_kms.c:38:2: error: unknown field 
>> 'dumb_create' specified in initializer
 .dumb_create   = komeda_gem_cma_dumb_create,
 ^
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:38:2: warning: excess 
elements in struct initializer
   drivers/gpu/drm//arm/display/komeda/komeda_kms.c:38:2: warning: (near 
initialization for 'komeda_kms_driver')
>> drivers/gpu/drm//arm/display/komeda/komeda_kms.c:39:2: error: unknown field 
>> 'prime_handle_to_fd' specified in initializer
 .prime_handle_

[Bug 108464] System fails to reboot after Ctrl-Alt-Del

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108464

--- Comment #21 from Duncan Roe  ---
Restarting investigations at Linux 5.0.0-rc5. Modified attachment 143055 to
check whether the patch would trigger. It never would. New patch is attachment
143344.

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[Bug 108464] System fails to reboot after Ctrl-Alt-Del

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108464

--- Comment #20 from Duncan Roe  ---
Created attachment 143344
  --> https://bugs.freedesktop.org/attachment.cgi?id=143344&action=edit
Display connectors_num & res_cap->num_ddc before compare

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Re: [PATCH v3 3/4] gpu: ipu-v3: ipu-ic: Add support for BT.709 encoding

2019-02-08 Thread Tim Harvey
On Fri, Feb 8, 2019 at 11:28 AM Steve Longerbeam  wrote:
>
> Pass v4l2 encoding enum to the ipu_ic task init functions, and add
> support for the BT.709 encoding and inverse encoding matrices.
>
> Reported-by: Tim Harvey 
> Signed-off-by: Steve Longerbeam 
> ---
> Changes in v2:
> - only return "Unsupported YCbCr encoding" error if inf != outf,
>   since if inf == outf, the identity matrix can be used. Reported
>   by Tim Harvey.
> ---
>  drivers/gpu/ipu-v3/ipu-ic.c | 71 +++--
>  drivers/gpu/ipu-v3/ipu-image-convert.c  |  1 +
>  drivers/staging/media/imx/imx-ic-prpencvf.c |  4 +-
>  include/video/imx-ipu-v3.h  |  5 +-
>  4 files changed, 71 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
> index e459615a49a1..0d57ca7ba18e 100644
> --- a/drivers/gpu/ipu-v3/ipu-ic.c
> +++ b/drivers/gpu/ipu-v3/ipu-ic.c
> @@ -212,6 +212,23 @@ static const struct ic_csc_params ic_csc_identity = {
> .scale = 2,
>  };
>
> +/*
> + * BT.709 encoding from RGB full range to YUV limited range:
> + *
> + * Y = R *  .2126 + G *  .7152 + B *  .0722;
> + * U = R * -.1146 + G * -.3854 + B *  .5000 + 128.;
> + * V = R *  .5000 + G * -.4542 + B * -.0458 + 128.;
> + */
> +static const struct ic_csc_params ic_csc_rgb2ycbcr_bt709 = {
> +   .coeff = {
> +   { 54, 183, 18 },
> +   { 483, 413, 128 },
> +   { 128, 396, 500 },
> +   },
> +   .offset = { 0, 512, 512 },
> +   .scale = 1,
> +};
> +
>  /*
>   * Inverse BT.601 encoding from YUV limited range to RGB full range:
>   *
> @@ -229,12 +246,31 @@ static const struct ic_csc_params 
> ic_csc_ycbcr2rgb_bt601 = {
> .scale = 2,
>  };
>
> +/*
> + * Inverse BT.709 encoding from YUV limited range to RGB full range:
> + *
> + * R = (1. * (Y - 16)) + (1.5748 * (Cr - 128));
> + * G = (1. * (Y - 16)) - (0.1873 * (Cb - 128)) - (0.4681 * (Cr - 128));
> + * B = (1. * (Y - 16)) + (1.8556 * (Cb - 128);
> + */
> +static const struct ic_csc_params ic_csc_ycbcr2rgb_bt709 = {
> +   .coeff = {
> +   { 128, 0, 202 },
> +   { 128, 488, 452 },
> +   { 128, 238, 0 },
> +   },
> +   .offset = { -435, 136, -507 },
> +   .scale = 2,
> +};
> +
>  static int init_csc(struct ipu_ic *ic,
> enum ipu_color_space inf,
> enum ipu_color_space outf,
> +   enum v4l2_ycbcr_encoding encoding,
> int csc_index)
>  {
> struct ipu_ic_priv *priv = ic->priv;
> +   const struct ic_csc_params *params_rgb2yuv, *params_yuv2rgb;
> const struct ic_csc_params *params;
> u32 __iomem *base;
> const u16 (*c)[3];
> @@ -244,12 +280,30 @@ static int init_csc(struct ipu_ic *ic,
> base = (u32 __iomem *)
> (priv->tpmem_base + ic->reg->tpmem_csc[csc_index]);
>
> +   switch (encoding) {
> +   case V4L2_YCBCR_ENC_601:
> +   params_rgb2yuv =  &ic_csc_rgb2ycbcr_bt601;
> +   params_yuv2rgb = &ic_csc_ycbcr2rgb_bt601;
> +   break;
> +   case V4L2_YCBCR_ENC_709:
> +   params_rgb2yuv =  &ic_csc_rgb2ycbcr_bt709;
> +   params_yuv2rgb = &ic_csc_ycbcr2rgb_bt709;
> +   break;
> +   default:
> +   if (inf != outf) {
> +   dev_err(priv->ipu->dev,
> +   "Unsupported YCbCr encoding\n");
> +   return -EINVAL;
> +   }
> +   break;
> +   }
> +
> if (inf == outf)
> params = &ic_csc_identity;
> else if (inf == IPUV3_COLORSPACE_YUV)
> -   params = &ic_csc_ycbcr2rgb_bt601;
> +   params = &ic_csc_ycbcr2rgb;


Steve,

compile issue...

params = params_yuv2rgb;

> else
> -   params = &ic_csc_rgb2ycbcr_bt601;
> +   params = &ic_csc_rgb2ycbcr;

params = params_rgb2yuv;

But, I'm still failing when using the mem2mem element (gst-launch-1.0
v4l2src device=/dev/video4 ! v4l2video8convert
output-io-mode=dmabuf-import ! fbdevsink) with 'Unsupported YCbCr
encoding' because of inf=IPU_COLORSPACE_YCBCR outf=IPU_COLORSPACE_RGB
and a seemingly unset encoding being passed in.

It looks like maybe something in the mem2mem driver isn't defaulting
encoding. The call path is (v4l2_m2m_streamon -> device_run ->
ipu_image_convert_queue -> convert_start -> ipu_ic_task_init_rsc ->
init_csc).

Tim
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[Bug 108464] System fails to reboot after Ctrl-Alt-Del

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108464

--- Comment #19 from Duncan Roe  ---
Comment on attachment 143011
  --> https://bugs.freedesktop.org/attachment.cgi?id=143011
[PATCH] drm/amd/display: Limit number of links to num_ddc

Review of attachment 143011:
-

Diagnostics show that this patch has no effect because the compared quantities
are always equal

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Re: linux-next: build failure after merge of the drm-misc tree

2019-02-08 Thread Sam Ravnborg
Hi Daniel/Stephen

Thanks for the report and the hints how to move forward to fix it.

> Sam, can you pls take a look at what komeda needs? you need to
> manually merge together drm-misc-next and drm-next first I think.

Merged the two tree and fixed build.
Undid the merge and checked that the build was still OK.

Patch sent to dri-devel:
https://lists.freedesktop.org/archives/dri-devel/2019-February/206662.html

> Dave, Maxime, Liviu: Heads up, drm-misc-next + drm-next will colide.
There was a trivial conflict when I merged, but in i915 so I just fixed
it up and kept focus on komeda.
So in other words, yes there is a conflict.

Sam
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[PATCH v1 1/1] drm/komeda: fix build with drm_modeset_helper.h update

2019-02-08 Thread Sam Ravnborg
With drmP.h removed from drm_modeset_helper.h the build of
komeda filed as reported by linux-next

Add missing include files to fix build.
For the files touched group include files and sort them.

The fix was tested on a tree with drm-misc-next merged.
And the patch was also tested to work without drm-misc-next merged.

Build tested on arm + x86.

Signed-off-by: Sam Ravnborg 
Reported-by: Stephen Rothwell  [linux-next]
Cc: Stephen Rothwell 
Cc: James Wang 
Cc: Liviu Dudau 
Cc: Brian Starkey 
Cc: David Airlie 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c|  8 ++--
 drivers/gpu/drm/arm/display/komeda/komeda_dev.c |  6 +-
 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c |  6 --
 drivers/gpu/drm/arm/display/komeda/komeda_kms.c | 12 
 drivers/gpu/drm/arm/display/komeda/komeda_kms.h |  1 +
 drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c|  2 ++
 6 files changed, 26 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c 
b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
index 5bb5a55f6b31..3ca5718aa0c2 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
@@ -5,12 +5,16 @@
  *
  */
 #include 
+#include 
 #include 
+
 #include 
 #include 
-#include 
 #include 
-#include 
+#include 
+#include 
+#include 
+
 #include "komeda_dev.h"
 #include "komeda_kms.h"
 
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c 
b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
index 0fe6954fbbf4..70e9bb7fa30c 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
@@ -4,9 +4,13 @@
  * Author: James.Qian.Wang 
  *
  */
-#include 
+#include 
 #include 
 #include 
+#include 
+
+#include 
+
 #include "komeda_dev.h"
 
 static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node 
*np)
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c 
b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
index 23ee74d42239..9cc9935024f7 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
@@ -4,10 +4,12 @@
  * Author: James.Qian.Wang 
  *
  */
-#include 
-#include 
+#include 
 #include 
+#include 
 #include 
+#include 
+
 #include "komeda_framebuffer.h"
 #include "komeda_dev.h"
 
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c 
b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c
index 3fc096d3883e..47a58ab20434 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c
@@ -5,15 +5,19 @@
  *
  */
 #include 
+#include 
+
 #include 
 #include 
-#include 
-#include 
+#include 
 #include 
-#include 
+#include 
+#include 
+#include 
+
 #include "komeda_dev.h"
-#include "komeda_kms.h"
 #include "komeda_framebuffer.h"
+#include "komeda_kms.h"
 
 DEFINE_DRM_GEM_CMA_FOPS(komeda_cma_fops);
 
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h 
b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
index f13666004a42..874e9c9f0749 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /** struct komeda_plane - komeda instance of drm_plane */
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c 
b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
index edb1cd7795f9..f1908e9ef128 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.c
@@ -4,6 +4,8 @@
  * Author: James.Qian.Wang 
  *
  */
+#include 
+
 #include "komeda_dev.h"
 #include "komeda_pipeline.h"
 
-- 
2.12.0

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[PATCH v5 0/3] Support 64 bpp half float formats

2019-02-08 Thread Kevin Strasser
This series defines new formats and adds implementation to the i915 driver.
Since posting v1 I have removed the pixel normalize property, as it's not needed
for basic functionality. Also, I have been working on adding support to
userspace, but we can't land any patches until drm_fourcc.h has been updated
here.

I have submitted a series to Mesa to make use of the RGBA ordered formats:
  https://patchwork.freedesktop.org/series/54759/

My igt branch is reworked to drop usage of pixel normalize and includes use
of f16c intrinsics to speed up conversion:
  https://gitlab.freedesktop.org/strassek/igt-gpu-tools/commits/fp16

I also have a libdrm branch with fp16 coverage added to modetest:
  https://gitlab.freedesktop.org/strassek/drm/commits/fp16

To serve as a smoke test of the whole stack I have a modified version of
kmscube:
  https://gitlab.freedesktop.org/strassek/kmscube/commits/fp16

Kevin Strasser (3):
  drm/fourcc: Add 64 bpp half float formats
  drm/i915: Refactor icl_is_hdr_plane
  drm/i915/icl: Implement half float formats

 drivers/gpu/drm/drm_fourcc.c |  4 ++
 drivers/gpu/drm/i915/intel_atomic.c  |  3 +-
 drivers/gpu/drm/i915/intel_display.c | 29 +-
 drivers/gpu/drm/i915/intel_drv.h |  7 ++--
 drivers/gpu/drm/i915/intel_sprite.c  | 73 +++-
 include/uapi/drm/drm_fourcc.h| 11 ++
 6 files changed, 112 insertions(+), 15 deletions(-)

-- 
2.7.4

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[PATCH v5 1/3] drm/fourcc: Add 64 bpp half float formats

2019-02-08 Thread Kevin Strasser
Add 64 bpp 16:16:16:16 half float pixel formats. Each 16 bit component is
formatted in IEEE-754 half-precision float (binary16) 1:5:10
MSb-sign:exponent:fraction form.

This patch attempts to address the feedback provided when 2 of these
formats were previosly proposed:
  https://patchwork.kernel.org/patch/10072545/

v2:
- Fixed cpp (Ville)
- Added detail pixel formatting (Ville)
- Ordered formats in header (Ville)

v5:
- .depth should be 0 for new formats (Maarten)

Cc: Tina Zhang 
Cc: Uma Shankar 
Cc: Shashank Sharma 
Cc: Ville Syrjälä 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Kevin Strasser 
Reviewed-by: Ville Syrjälä 
Reviewed-by: Maarten Lankhorst 
---
 drivers/gpu/drm/drm_fourcc.c  |  4 
 include/uapi/drm/drm_fourcc.h | 11 +++
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index d90ee03..46da785 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -198,6 +198,10 @@ const struct drm_format_info *__drm_format_info(u32 format)
{ .format = DRM_FORMAT_ABGR,.depth = 32, 
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
{ .format = DRM_FORMAT_RGBA,.depth = 32, 
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
{ .format = DRM_FORMAT_BGRA,.depth = 32, 
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_XRGB16161616F,   .depth = 0,  
.num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1 },
+   { .format = DRM_FORMAT_XBGR16161616F,   .depth = 0,  
.num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1 },
+   { .format = DRM_FORMAT_ARGB16161616F,   .depth = 0,  
.num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_ABGR16161616F,   .depth = 0,  
.num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
{ .format = DRM_FORMAT_RGB888_A8,   .depth = 32, 
.num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
{ .format = DRM_FORMAT_BGR888_A8,   .depth = 32, 
.num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
{ .format = DRM_FORMAT_XRGB_A8, .depth = 32, 
.num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 93a341d..d323c73 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -144,6 +144,17 @@ extern "C" {
 #define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] 
R:G:B:A 10:10:10:2 little endian */
 #define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] 
B:G:R:A 10:10:10:2 little endian */
 
+/*
+ * Floating point 64bpp RGB
+ * IEEE 754-2008 binary16 half-precision float
+ * [15:0] sign:exponent:mantissa 1:5:10
+ */
+#define DRM_FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0] 
x:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0] 
x:B:G:R 16:16:16:16 little endian */
+
+#define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] 
A:R:G:B 16:16:16:16 little endian */
+#define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] 
A:B:G:R 16:16:16:16 little endian */
+
 /* packed YCbCr */
 #define DRM_FORMAT_YUYVfourcc_code('Y', 'U', 'Y', 'V') /* 
[31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
 #define DRM_FORMAT_YVYUfourcc_code('Y', 'V', 'Y', 'U') /* 
[31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
-- 
2.7.4

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[PATCH v5 2/3] drm/i915: Refactor icl_is_hdr_plane

2019-02-08 Thread Kevin Strasser
Change the api in order to enable callers that can't supply a valid
intel_plane pointer, as would be the case prior to calling
drm_universal_plane_init.

v4:
- Rename variables and move a declaration (Ville)

Cc: Uma Shankar 
Cc: Shashank Sharma 
Cc: Ville Syrjälä 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Kevin Strasser 
Reviewed-by: Ville Syrjälä 
Reviewed-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/intel_atomic.c  | 3 ++-
 drivers/gpu/drm/i915/intel_display.c | 7 +--
 drivers/gpu/drm/i915/intel_drv.h | 7 ---
 drivers/gpu/drm/i915/intel_sprite.c  | 6 +++---
 4 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
b/drivers/gpu/drm/i915/intel_atomic.c
index 7cf9290..3a0d72b 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -234,10 +234,11 @@ static void intel_atomic_setup_scaler(struct 
intel_crtc_scaler_state *scaler_sta
if (plane_state && plane_state->base.fb &&
plane_state->base.fb->format->is_yuv &&
plane_state->base.fb->format->num_planes > 1) {
+   struct intel_plane *plane = 
to_intel_plane(plane_state->base.plane);
if (IS_GEN(dev_priv, 9) &&
!IS_GEMINILAKE(dev_priv)) {
mode = SKL_PS_SCALER_MODE_NV12;
-   } else if 
(icl_is_hdr_plane(to_intel_plane(plane_state->base.plane))) {
+   } else if (icl_is_hdr_plane(dev_priv, plane->id)) {
/*
 * On gen11+'s HDR planes we only use the scaler for
 * scaling. They have a dedicated chroma upsampler, so
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 5b8dabd..68f7dae 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3779,6 +3779,8 @@ u32 glk_plane_color_ctl_crtc(const struct 
intel_crtc_state *crtc_state)
 u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
 {
+   struct drm_i915_private *dev_priv =
+   to_i915(plane_state->base.plane->dev);
const struct drm_framebuffer *fb = plane_state->base.fb;
struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
u32 plane_color_ctl = 0;
@@ -3786,7 +3788,7 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state 
*crtc_state,
plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
 
-   if (fb->format->is_yuv && !icl_is_hdr_plane(plane)) {
+   if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) {
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
plane_color_ctl |= 
PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
else
@@ -5102,13 +5104,14 @@ static int skl_update_scaler_plane(struct 
intel_crtc_state *crtc_state,
 {
struct intel_plane *intel_plane =
to_intel_plane(plane_state->base.plane);
+   struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
struct drm_framebuffer *fb = plane_state->base.fb;
int ret;
bool force_detach = !fb || !plane_state->base.visible;
bool need_scaler = false;
 
/* Pre-gen11 and SDR planes always need a scaler for planar formats. */
-   if (!icl_is_hdr_plane(intel_plane) &&
+   if (!icl_is_hdr_plane(dev_priv, intel_plane->id) &&
fb && fb->format->format == DRM_FORMAT_NV12)
need_scaler = true;
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5eb0b66..1aa1d7b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2331,12 +2331,13 @@ static inline bool icl_is_nv12_y_plane(enum plane_id id)
return false;
 }
 
-static inline bool icl_is_hdr_plane(struct intel_plane *plane)
+static inline bool icl_is_hdr_plane(struct drm_i915_private *dev_priv,
+   enum plane_id plane_id)
 {
-   if (INTEL_GEN(to_i915(plane->base.dev)) < 11)
+   if (INTEL_GEN(dev_priv) < 11)
return false;
 
-   return plane->id < PLANE_SPRITE2;
+   return plane_id < PLANE_SPRITE2;
 }
 
 /* intel_tv.c */
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index 6103986..9da8d27 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -336,7 +336,7 @@ skl_program_scaler(struct intel_plane *plane,
 
/* TODO: handle sub-pixel coordinates */
if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
-   !icl_is_hdr_plane(plane)) {
+   !icl_is_hdr_plane(dev_priv, plane->id)) {
y_hphase = skl_scaler_calc_phase(1, hscale, false);

[PATCH v5 3/3] drm/i915/icl: Implement half float formats

2019-02-08 Thread Kevin Strasser
64 bpp half float formats are supported on hdr planes only and are subject
to the following restrictions:
  * 90/270 rotation not supported
  * Yf Tiling not supported
  * Frame Buffer Compression not supported
  * Color Keying not supported

v2:
- Drop handling pixel normalize register
- Don't use icl_is_hdr_plane too early

v3:
- Use refactored icl_is_hdr_plane (Ville)
- Use u32 instead of uint32_t (Ville)

Cc: Uma Shankar 
Cc: Shashank Sharma 
Cc: Ville Syrjälä 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Kevin Strasser 
Reviewed-by: Ville Syrjälä 
Reviewed-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/intel_display.c | 22 
 drivers/gpu/drm/i915/intel_sprite.c  | 67 
 2 files changed, 83 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 68f7dae..2044d78 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2677,6 +2677,18 @@ int skl_format_to_fourcc(int format, bool rgb_order, 
bool alpha)
return DRM_FORMAT_RGB565;
case PLANE_CTL_FORMAT_NV12:
return DRM_FORMAT_NV12;
+   case PLANE_CTL_FORMAT_XRGB_16161616F:
+   if (rgb_order) {
+   if (alpha)
+   return DRM_FORMAT_ABGR16161616F;
+   else
+   return DRM_FORMAT_XBGR16161616F;
+   } else {
+   if (alpha)
+   return DRM_FORMAT_ARGB16161616F;
+   else
+   return DRM_FORMAT_XRGB16161616F;
+   }
default:
case PLANE_CTL_FORMAT_XRGB_:
if (rgb_order) {
@@ -3601,6 +3613,12 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
case DRM_FORMAT_NV12:
return PLANE_CTL_FORMAT_NV12;
+   case DRM_FORMAT_XBGR16161616F:
+   case DRM_FORMAT_ABGR16161616F:
+   return PLANE_CTL_FORMAT_XRGB_16161616F | PLANE_CTL_ORDER_RGBX;
+   case DRM_FORMAT_XRGB16161616F:
+   case DRM_FORMAT_ARGB16161616F:
+   return PLANE_CTL_FORMAT_XRGB_16161616F;
default:
MISSING_CASE(pixel_format);
}
@@ -5149,6 +5167,10 @@ static int skl_update_scaler_plane(struct 
intel_crtc_state *crtc_state,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+   case DRM_FORMAT_XBGR16161616F:
+   case DRM_FORMAT_ABGR16161616F:
+   case DRM_FORMAT_XRGB16161616F:
+   case DRM_FORMAT_ARGB16161616F:
break;
default:
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 
0x%x\n",
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index 9da8d27..178dbaa 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1495,8 +1495,6 @@ static int skl_plane_check_fb(const struct 
intel_crtc_state *crtc_state,
/*
 * 90/270 is not allowed with RGB64 16:16:16:16 and
 * Indexed 8-bit. RGB 16-bit 5:6:5 is allowed gen11 onwards.
-* TBD: Add RGB64 case once its added in supported format
-* list.
 */
switch (fb->format->format) {
case DRM_FORMAT_RGB565:
@@ -1504,6 +1502,10 @@ static int skl_plane_check_fb(const struct 
intel_crtc_state *crtc_state,
break;
/* fall through */
case DRM_FORMAT_C8:
+   case DRM_FORMAT_XRGB16161616F:
+   case DRM_FORMAT_XBGR16161616F:
+   case DRM_FORMAT_ARGB16161616F:
+   case DRM_FORMAT_ABGR16161616F:
DRM_DEBUG_KMS("Unsupported pixel format %s for 
90/270!\n",
  drm_get_format_name(fb->format->format,
  &format_name));
@@ -1819,6 +1821,45 @@ static const u32 skl_planar_formats[] = {
DRM_FORMAT_NV12,
 };
 
+static const u32 icl_hdr_plane_formats[] = {
+   DRM_FORMAT_C8,
+   DRM_FORMAT_RGB565,
+   DRM_FORMAT_XRGB,
+   DRM_FORMAT_XBGR,
+   DRM_FORMAT_ARGB,
+   DRM_FORMAT_ABGR,
+   DRM_FORMAT_XRGB2101010,
+   DRM_FORMAT_XBGR2101010,
+   DRM_FORMAT_XRGB16161616F,
+   DRM_FORMAT_XBGR16161616F,
+   DRM_FORMAT_ARGB16161616F,
+   DRM_FORMAT_ABGR16161616F,
+   DRM_FORMAT_YUYV,
+   DRM_FORMAT_YVYU,
+   DRM_FORMAT_UYVY,
+   DRM_FORMAT_VYUY,
+};
+
+static const u32 icl_hdr_planar_formats[] = {
+   DRM_FORMAT_C8,
+   DRM_FORMAT_RGB565,
+   DRM_FORMAT_XRGB,
+   DRM_FORMAT_XBGR,
+   DRM_FORMAT_ARGB,
+ 

Re: [PATCH v3] drm/dsc: Add kernel documentation for DRM DP DSC helpers

2019-02-08 Thread Manasi Navare
Pushed to drm-misc thanks for the reviews.

Regards
Manasi

On Wed, Feb 06, 2019 at 01:31:48PM -0800, Manasi Navare wrote:
> This patch adds appropriate kernel documentation for DRM DP helpers
> used for enabling Display Stream compression functionality in
> drm_dp_helper.h and drm_dp_helper.c as well as for the DSC spec
> related structure definitions and helpers in drm_dsc.c and drm_dsc.h
> Also add links between the functions and structures in the documentation.
> 
> v3:
> * Fix the checkpatch warnings (Sean Paul)
> v2:
> * Add inline comments for longer structs (Daniel Vetter)
> * Split the summary and description (Daniel Vetter)
> 
> Suggested-by: Daniel Vetter 
> Suggested-by: Sean Paul 
> Cc: Daniel Vetter 
> Cc: Sean Paul 
> Signed-off-by: Manasi Navare 
> Acked-by: Sean Paul 
> Reviewed-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/drm_dp_helper.c |  47 ++-
>  drivers/gpu/drm/drm_dsc.c   |  30 +++-
>  include/drm/drm_dp_helper.h |  15 +-
>  include/drm/drm_dsc.h   | 233 
>  4 files changed, 259 insertions(+), 66 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 54120b6319e7..54a6414c5d96 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -1360,7 +1360,20 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct 
> drm_dp_desc *desc,
>  EXPORT_SYMBOL(drm_dp_read_desc);
>  
>  /**
> - * DRM DP Helpers for DSC
> + * drm_dp_dsc_sink_max_slice_count() - Get the max slice count
> + * supported by the DSC sink.
> + * @dsc_dpcd: DSC capabilities from DPCD
> + * @is_edp: true if its eDP, false for DP
> + *
> + * Read the slice capabilities DPCD register from DSC sink to get
> + * the maximum slice count supported. This is used to populate
> + * the DSC parameters in the &struct drm_dsc_config by the driver.
> + * Driver creates an infoframe using these parameters to populate
> + * &struct drm_dsc_pps_infoframe. These are sent to the sink using DSC
> + * infoframe using the helper function drm_dsc_pps_infoframe_pack()
> + *
> + * Returns:
> + * Maximum slice count supported by DSC sink or 0 its invalid
>   */
>  u8 drm_dp_dsc_sink_max_slice_count(const u8 
> dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
>  bool is_edp)
> @@ -1405,6 +1418,21 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8 
> dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
>  }
>  EXPORT_SYMBOL(drm_dp_dsc_sink_max_slice_count);
>  
> +/**
> + * drm_dp_dsc_sink_line_buf_depth() - Get the line buffer depth in bits
> + * @dsc_dpcd: DSC capabilities from DPCD
> + *
> + * Read the DSC DPCD register to parse the line buffer depth in bits which is
> + * number of bits of precision within the decoder line buffer supported by
> + * the DSC sink. This is used to populate the DSC parameters in the
> + * &struct drm_dsc_config by the driver.
> + * Driver creates an infoframe using these parameters to populate
> + * &struct drm_dsc_pps_infoframe. These are sent to the sink using DSC
> + * infoframe using the helper function drm_dsc_pps_infoframe_pack()
> + *
> + * Returns:
> + * Line buffer depth supported by DSC panel or 0 its invalid
> + */
>  u8 drm_dp_dsc_sink_line_buf_depth(const u8 
> dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
>  {
>   u8 line_buf_depth = dsc_dpcd[DP_DSC_LINE_BUF_BIT_DEPTH - 
> DP_DSC_SUPPORT];
> @@ -1434,6 +1462,23 @@ u8 drm_dp_dsc_sink_line_buf_depth(const u8 
> dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
>  }
>  EXPORT_SYMBOL(drm_dp_dsc_sink_line_buf_depth);
>  
> +/**
> + * drm_dp_dsc_sink_supported_input_bpcs() - Get all the input bits per 
> component
> + * values supported by the DSC sink.
> + * @dsc_dpcd: DSC capabilities from DPCD
> + * @dsc_bpc: An array to be filled by this helper with supported
> + *   input bpcs.
> + *
> + * Read the DSC DPCD from the sink device to parse the supported bits per
> + * component values. This is used to populate the DSC parameters
> + * in the &struct drm_dsc_config by the driver.
> + * Driver creates an infoframe using these parameters to populate
> + * &struct drm_dsc_pps_infoframe. These are sent to the sink using DSC
> + * infoframe using the helper function drm_dsc_pps_infoframe_pack()
> + *
> + * Returns:
> + * Number of input BPC values parsed from the DPCD
> + */
>  int drm_dp_dsc_sink_supported_input_bpcs(const u8 
> dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
>u8 dsc_bpc[3])
>  {
> diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c
> index bc2b23adb072..bce99f95c1a3 100644
> --- a/drivers/gpu/drm/drm_dsc.c
> +++ b/drivers/gpu/drm/drm_dsc.c
> @@ -17,6 +17,12 @@
>  /**
>   * DOC: dsc helpers
>   *
> + * VESA specification for DP 1.4 adds a new feature called Display Stream
> + * Compression (DSC) used to compress the pixel bits before sending it on
> + * DP/eDP/MIPI DSI interface. DSC is required to be enabled so that the 
> existing
> + * display interfaces can support high resolutions a

[Bug 109534] Crash in Minecraft due to a swp[chan] assertion fail in src/gallium/drivers/r600/sb/sb_ir.cpp alu_packed_node::update_packed_items

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=109534

--- Comment #1 from Romain Diss  ---
Should I join some more informations. Please let me know.

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Re: [PATCH v10 1/2] drm/fourcc: Add new P010, P016 video format

2019-02-08 Thread Neil Armstrong


Le 08/02/2019 16:51, Daniel Vetter a écrit :
> On Thu, Feb 07, 2019 at 10:44:10AM +0100, Neil Armstrong wrote:
>> Hi,
>>
>> On 14/01/2019 17:36, Ayan Halder wrote:
>>> On Thu, Jan 10, 2019 at 03:57:09AM +0800, Randy Li wrote:
 P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
 channel video format.

 P012 is a planar 4:2:0 YUV 12 bits per channel

 P016 is a planar 4:2:0 YUV with interleaved UV plane, 16 bits per
 channel video format.

 V3: Added P012 and fixed cpp for P010.
 V4: format definition refined per review.
 V5: Format comment block for each new pixel format.
 V6: reversed Cb/Cr order in comments.
 v7: reversed Cb/Cr order in comments of header files, remove
 the wrong part of commit message.
 V8: reversed V7 changes except commit message and rebased.
 v9: used the new properties to describe those format and
 rebased.

 Cc: Daniel Stone 
 Cc: Ville Syrj??l?? 

 Signed-off-by: Randy Li 
 Signed-off-by: Clint Taylor 
 ---
  drivers/gpu/drm/drm_fourcc.c  |  9 +
  include/uapi/drm/drm_fourcc.h | 21 +
  2 files changed, 30 insertions(+)

 diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
 index d90ee03a84c6..ba7e19d4336c 100644
 --- a/drivers/gpu/drm/drm_fourcc.c
 +++ b/drivers/gpu/drm/drm_fourcc.c
 @@ -238,6 +238,15 @@ const struct drm_format_info *__drm_format_info(u32 
 format)
{ .format = DRM_FORMAT_X0L2,.depth = 0,  
 .num_planes = 1,
  .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, 
 .block_h = { 2, 0, 0 },
  .hsub = 2, .vsub = 2, .is_yuv = true },
 +  { .format = DRM_FORMAT_P010,.depth = 0,  
 .num_planes = 2,
 +.char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, 
 .block_h = { 1, 0, 0 },
 +.hsub = 2, .vsub = 2, .is_yuv = true},
 +  { .format = DRM_FORMAT_P012,.depth = 0,  
 .num_planes = 2,
 +.char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, 
 .block_h = { 1, 0, 0 },
 + .hsub = 2, .vsub = 2, .is_yuv = true},
 +  { .format = DRM_FORMAT_P016,.depth = 0,  
 .num_planes = 2,
 +.char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, 
 .block_h = { 1, 0, 0 },
 +.hsub = 2, .vsub = 2, .is_yuv = true},
};
  
unsigned int i;
 diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
 index 0b44260a5ee9..8dd1328bc8d6 100644
 --- a/include/uapi/drm/drm_fourcc.h
 +++ b/include/uapi/drm/drm_fourcc.h
 @@ -195,6 +195,27 @@ extern "C" {
  #define DRM_FORMAT_NV24   fourcc_code('N', 'V', '2', '4') /* 
 non-subsampled Cr:Cb plane */
  #define DRM_FORMAT_NV42   fourcc_code('N', 'V', '4', '2') /* 
 non-subsampled Cb:Cr plane */
  
 +/*
 + * 2 plane YCbCr MSB aligned
 + * index 0 = Y plane, [15:0] Y:x [10:6] little endian
 + * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
 + */
 +#define DRM_FORMAT_P010   fourcc_code('P', '0', '1', '0') /* 2x2 
 subsampled Cr:Cb plane 10 bits per channel */
 +
 +/*
 + * 2 plane YCbCr MSB aligned
 + * index 0 = Y plane, [15:0] Y:x [12:4] little endian
 + * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [12:4:12:4] little endian
 + */
 +#define DRM_FORMAT_P012   fourcc_code('P', '0', '1', '2') /* 2x2 
 subsampled Cr:Cb plane 12 bits per channel */
 +
 +/*
 + * 2 plane YCbCr MSB aligned
 + * index 0 = Y plane, [15:0] Y little endian
 + * index 1 = Cr:Cb plane, [31:0] Cr:Cb [16:16] little endian
 + */
 +#define DRM_FORMAT_P016   fourcc_code('P', '0', '1', '6') /* 2x2 
 subsampled Cr:Cb plane 16 bits per channel */
 +
>>>
>>> looks good to me.
>>> Reviewed by:- Ayan Kumar Halder 
>>>
>>> We are using P010 format for our mali display driver. Our AFBC patch
>>> series(https://patchwork.freedesktop.org/series/53395/) is dependent
>>> on this patch. So, that's why I wanted to know when you are planning to
>>> merge this. As far as I remember, Juha wanted to implement some igt
>>> tests
>>> (https://lists.freedesktop.org/archives/intel-gfx/2018-September/174877.html)
>>> , so is that done now?
>>>
>>> My apologies if I am pushing hard on this.
>>
>> Looks good to me aswell,
>>
>> Reviewed by: Neil Armstrong 
>>
>> Seems we will also need P010 to support the Amlogic Compressed modifier to 
>> display
>> compressed frames from the HW decoder.
>>
>> I can apply this to drm-misc-next if everyone is ok
> 
> Matches what's still flaoting around by intel devs:
> 
> https://patchwork.freedesktop.org/patch/284801/
> 
> Except this one uses the new block descriptors and has much neater
> comments.
> 
> Review

[pull] amdgpu drm-next-5.1

2019-02-08 Thread Alex Deucher
Hi Dave, Daniel,

Updates for 5.1:
- GDS fixes
- Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES interface
- GPUVM fixes
- PCIE DPM switching fixes for vega20
- Vega10 uclk DPM regression fix
- DC Freesync fixes
- DC ABM fixes
- Various DC cleanups

The following changes since commit 47dd8048a1bf5b2fb96e5abe99b4f1dcd208ea4d:

  drm/amdgpu: Show XGMI node and hive message per device only once (2019-01-29 
15:16:18 -0500)

are available in the Git repository at:

  git://people.freedesktop.org/~agd5f/linux drm-next-5.1

for you to fetch changes up to 0461221316ec21e0a535a35fba3feb6ba75706e6:

  drm/amd/display: Check hpd_gpio for NULL before accessing it (2019-02-07 
17:22:12 -0500)


Andrey Grodzovsky (1):
  drm/amdgpu: Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES

Anthony Koo (8):
  drm/amd/display: fix issue with DC brightness low with VB
  drm/amd/display: link_rate_set should index into table
  drm/amd/display: interface to check if timing can be seamless
  drm/amd/display: refactor out programming of vupdate interrupt
  drm/amd/display: add way to determine if link is active
  drm/amd/display: add seamless boot flag to stream
  drm/amd/display: refactor programming of DRR
  drm/amd/display: refactor init_hw to isolate pipe related init

Chiawen Huang (1):
  drm/amd/display: add gpio lock/unlock

Christian König (4):
  drm/amdgpu: cleanup amdgpu_pte_update_params
  drm/amdgpu: fix waiting for BO moves with CPU based PD/PT updates
  drm/amdgpu: cleanup VM dw estimation a bit
  drm/amdgpu: fix NULL ptr dref in the VM code

Colin Ian King (1):
  drm/amd/amdgpu: fix spelling mistake "matech" -> "match"

Dmytro Laktyushkin (2):
  drm/amd/display: add a debug flag to force odm combine
  drm/amd/display: add n_vid_mul and half pix_rate for odm

Eryk Brol (1):
  drm/amd/display: DC VM Fixes

Harish Kasiviswanathan (2):
  drm/amdgpu: Fix pci platform speed and width
  drm/amd/powerplay: add override pcie parameters for Vega20 (v2)

Harry Wentland (1):
  drm/amd/display: Check hpd_gpio for NULL before accessing it

Ilya Bakoulin (1):
  drm/amd/display: Check that vrefresh is in freesync range

Jerry (Fangzhi) Zuo (2):
  drm/amd/display: Apply fake sink back to MST sequence
  drm/amd/display: Clear dc_sink after it gets released

John Barberiz (1):
  drm/amd/display: Use udelay when waiting between aux retries

Josip Pavic (1):
  drm/amd/display: Modify ABM 2.2 Max Reduction

Kenneth Feng (1):
  drm/amd/powerplay: update soc boot and max level on vega10

Krunoslav Kovac (1):
  drm/amd/display: DGAM enabled for HDR

Marek Olšák (2):
  drm/amdgpu: clean up memory/GDS/GWS/OA alignment code
  drm/amdgpu: add a workaround for GDS ordered append hangs with compute 
queues

Murton Liu (1):
  drm/amd/display: PIP overlay corruption

Nathan Chancellor (3):
  drm/amd/display: Use memset to initialize variable in 
wait_for_training_aux_rd_interval
  drm/amd/display: Use memset to initialize variables in 
amdgpu_dm_atomic_commit_tail
  drm/amd/display: Use memset to initialize variables in 
fill_plane_dcc_attributes

Nicholas Kazlauskas (8):
  drm/amd/display: Don't re-enable CRC when CONFIG_DEBUG_FS isn't defined
  drm/amd/display: Apply all surface updates onto surfaces
  drm/amd/display: Use the right surface for flip and FreeSync
  drm/amd/display: Reformat dm_determine_update_type_for_commit
  drm/amd/display: Initialize stream_update to zero
  drm/amd/display: Remove FreeSync timing changed debug output
  drm/amd/display: Disconnect mpcc when changing tg
  drm/amd/display: Don't re-program planes for DPMS changes

Paul Hsieh (1):
  drm/amd/display: dmcu is blocking due to wrong disable ABM command

Pratik Vishwakarma (1):
  drm/amdgpu/display: fix compiler errors [-Werror,-Wparentheses-equality]

Shirish S (1):
  drm/amd/display: Use context parameters to enable FBC

Steven Chiu (1):
  drm/amd/display: 3.2.16

Su Sung Chung (1):
  drm/amd/display: store timing sync info in dc_stream_status

Wenjing Liu (1):
  drm/amd/display: determine if a pipe is synced by plane state

Wesley Chalmers (1):
  drm/amd/display: Disable Stutter for Stereo 3D

Xiaodong Yan (1):
  drm/amd/display: Add monitor patch for backlight off

Yongqiang Sun (2):
  drm/amd/display: pass vline_config parameter by reference.
  drm/amd/display: Calc vline position in dc.

mark mcgarrity (1):
  drm/amd/display: 3.2.17

 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c |  13 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  58 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|   4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h|   2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c|   7 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  16 +-
 drivers/gp

[Bug 108514] heavy screen flickering with Mobility Radeon X1600 and kernel version 3.15rc2 onward

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=108514

Paul Dufresne  changed:

   What|Removed |Added

   See Also||https://bugs.freedesktop.or
   ||g/show_bug.cgi?id=97986

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[Bug 97986] sony vaio with ati graphics flashing flikering

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=97986

Paul Dufresne  changed:

   What|Removed |Added

   See Also||https://bugs.freedesktop.or
   ||g/show_bug.cgi?id=108514

--- Comment #5 from Paul Dufresne  ---
I suspect it could be the same problem as in bug #108514.

Best workaround known would be to boot with nomodeset kernel parameter.

Adding drm.debug=4 (kernel mode setting messages) to kernel parameters
would give more usefull dmesg output.

Suspected problem for #108514 would be related to compute_avivo_pll_[something]
in gpu/drm/radeon/radeon_display.c.
Possibly the max pll clock frequency.

I hope to be able to investigate beginning of next week.

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[PATCH] drm/doc: Remove solved KMS cleanup task

2019-02-08 Thread Shayenne Moura
Remove KMS cleanup task from documentation solved by patchset
https://patchwork.freedesktop.org/series/54310/

Signed-off-by: Shayenne Moura 
---
 Documentation/gpu/todo.rst | 4 
 1 file changed, 4 deletions(-)

diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index cda4a37a02f0..159a4aba49e6 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -398,10 +398,6 @@ KMS cleanups
 
 Some of these date from the very introduction of KMS in 2008 ...
 
-- drm_display_mode doesn't need to be derived from drm_mode_object. That's
-  leftovers from older (never merged into upstream) KMS designs where modes
-  where set using their ID, including support to add/remove modes.
-
 - Make ->funcs and ->helper_private vtables optional. There's a bunch of empty
   function tables in drivers, but before we can remove them we need to make 
sure
   that all the users in helpers and drivers do correctly check for a NULL
-- 
2.17.1

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Re: [git pull] drm fixes for 5.0-rc6

2019-02-08 Thread pr-tracker-bot
The pull request you sent on Fri, 8 Feb 2019 11:05:22 +1000:

> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2019-02-08

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/adcbc921d3dff0bf1657d4d31beee68f92f51538

Thank you!

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Re: [PATCH 3/4] drm/mcde: Add new driver for ST-Ericsson MCDE

2019-02-08 Thread Sam Ravnborg
Hi Linus.

Good looking driver. A few nits in the following.
I did not try to follow the code, so no proper review done, sorry.

Sam

> +++ b/drivers/gpu/drm/mcde/mcde_display.c
> @@ -0,0 +1,1284 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2018 Linus Walleij 
> + * Parts of this file were based on the MCDE driver by Marcus Lorentzon
> + * (C) ST-Ericsson SA 2013
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 

Please do not use drmP.h in new drivers.
drmP.h is deprecated and we are working on gettting rid of it.

> +
> +static void mcde_display_enable(struct drm_simple_display_pipe *pipe,
> + struct drm_crtc_state *cstate,
> + struct drm_plane_state *plane_state)
> +{
> + struct drm_crtc *crtc = &pipe->crtc;
> + struct drm_plane *plane = &pipe->plane;
> + struct drm_device *drm = crtc->dev;
> + struct mcde *mcde = drm->dev_private;
> + const struct drm_display_mode *mode = &cstate->mode;
> + struct drm_framebuffer *fb = plane->state->fb;
> + u32 format = fb->format->format;
> + u32 formatter_ppl = mode->hdisplay; /* pixels per line */
> + u32 formatter_lpf = mode->vdisplay; /* lines per frame */
> + int pkt_size, fifo_wtrmrk;
> + int cpp = drm_format_plane_cpp(format, 0);
> + int formatter_cpp;
> + struct drm_format_name_buf tmp;
> + u32 formatter_frame;
> + u32 pkt_div;
> + u32 val;

...
This is a very long function. Please consider splitting it up in a
a smaller more readable set of functions.


> + default:
> + dev_err(drm->dev, "Unknown pixel format 0x%08x\n",
> + fb->format->format);
> + break;
> + }
Despite and unknow pixel format the following code is executed.
Looks wrong, if it is OK then maybe add a comment in the default: case
to say so.

> diff --git a/drivers/gpu/drm/mcde/mcde_drm.h b/drivers/gpu/drm/mcde/mcde_drm.h
> new file mode 100644
> index ..eea6dc23436a
> --- /dev/null
> +++ b/drivers/gpu/drm/mcde/mcde_drm.h
> @@ -0,0 +1,52 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2018 Linus Walleij 
> + * Parts of this file were based on the MCDE driver by Marcus Lorentzon
> + * (C) ST-Ericsson SA 2013
> + */
> +#include 
> +
> +#ifndef _MCDE_DRM_H_
> +#define _MCDE_DRM_H_
> +
It is considered good practice (at least by me) that a header
file includes all necessary files, so users do not need to care.
It looks like a few is missing here.

Also expand the include guards to cover the incldue files
so they are not included twice.
This file is likely only included once, so this is only to make it look
like any other heder file.


> diff --git a/drivers/gpu/drm/mcde/mcde_drv.c b/drivers/gpu/drm/mcde/mcde_drv.c
> new file mode 100644
> index ..cb65609ac812
> --- /dev/null
> +++ b/drivers/gpu/drm/mcde/mcde_drv.c
> @@ -0,0 +1,540 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2018 Linus Walleij 
> + * Parts of this file were based on the MCDE driver by Marcus Lorentzon
> + * (C) ST-Ericsson SA 2013
> + */
> +
> +/**
> + * DOC: ST-Ericsson MCDE Driver
> + *
> + * The MCDE (short for Multi-channel display engine) is a graphics
> + * controller found in the Ux500 chipsets, such as NovaThor U8500.
> + * It was initially conceptualized by ST Microelectronics for the
> + * successor of the Nomadik line, STn8500 but productified in the
> + * ST-Ericsson U8500 where is was used for mass-market deployments
> + * in Android phones from Samsung and Sony Ericsson.
> + *
> + * It can do 1080p30 on SDTV CCIR656, DPI-2, DBI-2 or DSI for
> + * panels with or without frame buffering and can convert most
> + * input formats including most variants of RGB and YUV.
> + *
> + * The hardware has four display pipes, and the layout is a little
> + * bit like this:
> + *
> + * Memory -> 6 channels -> 5 formatters -> DSI/DPI -> LCD/HDMI
> + * 10 sources(overlays)3 x DSI
> + *
> + * The memory has 5 input channels (memory ports):
> + * 2 channel A (LCD/TV)
> + * 2 channel B (LCD/TV)
> + * 1 channel CO/C1 (Panel with embedded buffer)
> + *
> + * 3 of the formatters are for DSI
> + * 2 of the formatters are for DPI
> + *
> + * Behind the formatters are the DSI or DPI ports, that route to
> + * the external pins of the chip. As there are 3 DSI ports and one
> + * DPI port, it is possible to configure up to 4 display pipelines.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Please sort include files alphabatically.

> +
> +#include 

And like before, get rid of drmP.h

> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
Also alphabetically sort needed again.

> +
> +#define MCDE_CR 0x
> +#define MCDE_CR_IFIFOEMPTYLINECOUNT_V422_SHIF

RE: [Intel-gfx] [PATCH v4 0/3] Support 64 bpp half float formats

2019-02-08 Thread Strasser, Kevin
Maarten Lankhorst wrote:
> It's nice that the igt parts are almost done. I think this might need rebasing
> on top of
>
> I'm glad there are tests, but the internal accuracy of the CAIRO_FORMAT_RGB24
> is only 8 bits, so it wouldn't test this properly.
>
> Fortunately we will start using CAIRO_FORMAT_RGB96F and RGBA128F soon. :)
>
> See https://patchwork.freedesktop.org/patch/284507/
>
> We should be able to convert native float to half float with an intrinsic.

Thanks for the pointer, native fp32 formats should make for fewer conversions
too.

I just updated my gitlab branch with a more recent rebase. I already have 
non-simd f16c instrinsics working, you can take a look at [1]. I experimented
with the simd intrinsics too, but they were a bit slower, I would expect better
results with pixel data that is already stored in fp32.

Thanks,
Kevin

[1] 
https://gitlab.freedesktop.org/strassek/igt-gpu-tools/commit/910551867376b8ead3ab738056247486d422fff9
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Re: [PATCH libdrm] xf86drm: fix return type for drmIsMaster()

2019-02-08 Thread Eric Engestrom
On Friday, 2019-02-08 16:50:44 +, Emil Velikov wrote:
> On Fri, 8 Feb 2019 at 16:51, Daniel Stone  wrote:
> >
> > Hi Eric,
> >
> > On Fri, 8 Feb 2019 at 15:03, Eric Engestrom  
> > wrote:
> > > Xserver has struct members named `bool`, which means the last commit
> > > breaks its build with errors like this:
> > >
> > >   error: two or more data types in declaration specifiers
> > >   Bool bool;
> > >^
> > >
> > > Fix this by making it return a 0/1 integer, with the same semantic as
> > > the boolean it was before.
> >
> > Don't you need to drop the stdbool.h include for this to fix compilation?

Ahem... /me looks for his brown paper bag :]

> >
> Thanks Eric. With Dan's comment
> Reviewed-by: Emil Velikov 
> 
> I really wonder if we cannot fix these trivial X nuisances? As-is
> every project used has to either work around X mistakes :-(
> Wrt libdrm that is fine, yet other projects might be less happy.

Agreed :/

The issue is that you still won't be able to have bools in libdrm,
because a new libdrm might be used with an old xserver...

> 
> Thanks
> -Emil
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Re: [PATCH v2] i2c: of: Try to find an I2C adapter matching the parent

2019-02-08 Thread Wolfram Sang

> So I guess you could say we're in some in-between state, but I don't
> think it's inconsistent. It just allows us to do this step by step,
> which I think is good.

Well, I am still not super happy, but it fixes a regression, so I will
keep it in for-next.



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RE: [Intel-gfx] [PATCH v4 1/3] drm/fourcc: Add 64 bpp half float formats

2019-02-08 Thread Strasser, Kevin
Maarten Lankhorst wrote:
> Hmmm, from include/drm/drm_fourcc.h
>  * @depth:
>  *
>  * Color depth (number of bits per pixel excluding padding bits),
>  * valid for a subset of RGB formats only. This is a legacy field, do
>  * not use in new code and set to 0 for new formats.
>  */
> u8 depth;
>
> Otherwise looks good. :)

Ah, I missed that detail. I will respin with this fixed.

Thanks,
Kevin
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Re: [PATCH v2 9/9] drm/panel: Add Ronbo RB070D30 panel

2019-02-08 Thread Sam Ravnborg
Hi Maxime,

On Fri, Feb 08, 2019 at 10:53:22AM +0100, Maxime Ripard wrote:
> From: Konstantin Sudakov 
> 
> The Ronbo RB070D30 panel is a MIPI-DSI panel based on a Fitipower EK79007
> controller and a 1024x600 panel.
> 
> Signed-off-by: Konstantin Sudakov 
> Signed-off-by: Maxime Ripard 

Driver looks good, no further comments.

With the issue pointed out by Konstantin you can add my:
Reviewed-by: Sam Ravnborg 
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Re: [PATCH -next] video: fbdev: Fix potential NULL pointer dereference

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/30/2019 11:16 AM, YueHaibing wrote:
> There is a potential NULL pointer dereference in case
> fb_create_modedb() fails and returns NULL.
> 
> Signed-off-by: YueHaibing 

Patch queued for v5.1, thanks.

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[v15 4/4] drm/i915: Attach colorspace property and enable modeset

2019-02-08 Thread Uma Shankar
This patch attaches the colorspace connector property to the
hdmi connector. Based on colorspace change, modeset will be
triggered to switch to new colorspace.

Based on colorspace property value create an infoframe
with appropriate colorspace. This can be used to send an
infoframe packet with proper colorspace value set which
will help to enable wider color gamut like BT2020 on sink.

This patch attaches and enables HDMI colorspace, DP will be
taken care separately.

v2: Merged the changes of creating infoframe as well to this
patch as per Maarten's suggestion.

v3: Addressed review comments from Shashank. Separated HDMI
and DP colorspaces as suggested by Ville and Maarten.

v4: Addressed Chris and Ville's review comments, and created a
common colorspace property for DP and HDMI, filtered the list
based on the colorspaces supported by the respective protocol
standard. Handle the default case properly.

v5: Merged the DP handling along with platform colorspace
handling as per Shashank's comments.

v6: Reverted to old design of exposing all colorspaces to
userspace as per Ville's review comment

v7: Fixed a checkpatch complaint, Addressed  Maarten' review
comment, updated the RB from Maarten and Jani's ack.

v8: Moved colorspace AVI Infoframe programming to drm core and
removed from driver as per Ville's suggestion.

v9: Added a check to allow only RGB colorspaces to be set in
infoframe through the colorspace property. Since there is no output
csc property to control planar formats and it will be added later.
Changes for RGB->YUV conversion inside driver without userspace
knowledge is still supported. This is as per Ville's suggestion.

v10: Fixed an error in if check for rgb colorspace.

Signed-off-by: Uma Shankar 
Acked-by: Jani Nikula 
Reviewed-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/intel_atomic.c| 24 
 drivers/gpu/drm/i915/intel_connector.c |  8 
 drivers/gpu/drm/i915/intel_drv.h   |  1 +
 drivers/gpu/drm/i915/intel_hdmi.c  | 13 +
 4 files changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_atomic.c 
b/drivers/gpu/drm/i915/intel_atomic.c
index 7cf9290..ba60d51 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -102,6 +102,20 @@ int intel_digital_connector_atomic_set_property(struct 
drm_connector *connector,
return -EINVAL;
 }
 
+static inline bool check_colorspace_is_rgb(u32 colorspace)
+{
+   if (colorspace | (DRM_MODE_COLORIMETRY_OPRGB |
+  DRM_MODE_COLORIMETRY_BT2020_RGB |
+  DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65 |
+  DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER |
+  DRM_MODE_DP_COLORIMETRY_SRGB |
+  DRM_MODE_DP_COLORIMETRY_RGB_WIDE_GAMUT |
+  DRM_MODE_DP_COLORIMETRY_SCRGB))
+   return true;
+
+   return false;
+}
+
 int intel_digital_connector_atomic_check(struct drm_connector *conn,
 struct drm_connector_state *new_state)
 {
@@ -118,6 +132,15 @@ int intel_digital_connector_atomic_check(struct 
drm_connector *conn,
if (!new_state->crtc)
return 0;
 
+   /*
+* Reject any planar formats, as currently not enabled.
+* ToDo: Add a output CSC property interface to control planar
+* formats.
+*/
+   if ((new_conn_state->base.colorspace != DRM_MODE_COLORIMETRY_DEFAULT) ||
+   !check_colorspace_is_rgb(new_conn_state->base.colorspace))
+   return 0;
+
crtc_state = drm_atomic_get_new_crtc_state(new_state->state, 
new_state->crtc);
 
/*
@@ -126,6 +149,7 @@ int intel_digital_connector_atomic_check(struct 
drm_connector *conn,
 */
if (new_conn_state->force_audio != old_conn_state->force_audio ||
new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
+   new_conn_state->base.colorspace != old_conn_state->base.colorspace 
||
new_conn_state->base.picture_aspect_ratio != 
old_conn_state->base.picture_aspect_ratio ||
new_conn_state->base.content_type != 
old_conn_state->base.content_type ||
new_conn_state->base.scaling_mode != 
old_conn_state->base.scaling_mode)
diff --git a/drivers/gpu/drm/i915/intel_connector.c 
b/drivers/gpu/drm/i915/intel_connector.c
index ee16758..8352d0b 100644
--- a/drivers/gpu/drm/i915/intel_connector.c
+++ b/drivers/gpu/drm/i915/intel_connector.c
@@ -265,3 +265,11 @@ int intel_ddc_get_modes(struct drm_connector *connector,
connector->dev->mode_config.aspect_ratio_property,
DRM_MODE_PICTURE_ASPECT_NONE);
 }
+
+void
+intel_attach_colorspace_property(struct drm_connector *connector)
+{
+   if (!drm_mode_create_colorspace_property(connector))
+   drm_object_attach_property(&connector->base,
+

Re: [PATCH v5 0/2] Do not output logo on quiet boots

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/29/2019 02:43 PM, Prarit Bhargava wrote:
> On text-based systems the 'quiet' boot option will show printk levels
> higher than CONSOLE_LOGLEVEL_QUIET.  The displaying of the Tux logo
> during boot can cause some consoles to lose display data and as a result
> confuse the end user.
> 
> Do not display the Tux logo on systems that are in 'quiet' boot.
> 
> v2: It helps to commit all my changes before sending them.  Remove extra
> bracket.
> v3: buildbot error fix: fbcon can be built as part of a module so export 
> console_printk
> v4: move console_printk change to separate patch, and drop logo cleanup
> v5: Only set FBCON_LOGO_DONTSHOW for console loglevel
> 
> 
> Signed-off-by: Prarit Bhargava 

Patches #1-2 queued for v5.1, thanks.

Best regards,
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[v15 1/4] drm: Add HDMI colorspace property

2019-02-08 Thread Uma Shankar
Create a new connector property to program colorspace to sink
devices. Modern sink devices support more than 1 type of
colorspace like 601, 709, BT2020 etc. This helps to switch
based on content type which is to be displayed. The decision
lies with compositors as to in which scenarios, a particular
colorspace will be picked.

This will be helpful mostly to switch to higher gamut colorspaces
like BT2020 when the media content is encoded as BT2020. Thereby
giving a good visual experience to users.

The expectation from userspace is that it should parse the EDID
and get supported colorspaces. Use this property and switch to the
one supported. Sink supported colorspaces should be retrieved by
userspace from EDID and driver will not explicitly expose them.

Basically the expectation from userspace is:
 - Set up CRTC DEGAMMA/CTM/GAMMA to convert to some sink
   colorspace
 - Set this new property to let the sink know what it
   converted the CRTC output to.

v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
colorspaces. Also, added a default option for colorspace.

v3: Removed Adobe references from enum definitions as per
Ville, Hans Verkuil and Jonas Karlman suggestions. Changed
Default to an unset state where driver will assign the colorspace
is not chosen by user, suggested by Ville and Maarten. Addressed
other misc review comments from Maarten. Split the changes to
have separate colorspace property for DP and HDMI.

v4: Addressed Chris and Ville's review comments, and created a
common colorspace property for DP and HDMI, filtered the list
based on the colorspaces supported by the respective protocol
standard.

v5: Made the property creation helper accept enum list based on
platform capabilties as suggested by Shashank. Consolidated HDMI
and DP property creation in the common helper.

v6: Addressed Shashank's review comments.

v7: Added defines instead of enum in uapi as per Brian Starkey's
suggestion in order to go with string matching at userspace. Updated
the commit message to add more details as well kernel docs.

v8: Addressed Maarten's review comments.

v9: Removed macro defines from uapi as per Brian Starkey and Daniel
Stone's comments and moved to drm include file. Moved back to older
design with exposing all HDMI colorspaces to userspace since infoframe
capability is there even on legacy platforms, as per Ville's review
comments.

v10: Fixed sparse warnings, updated the RB from Maarten and Jani's ack.

v11: Addressed Ville's review comments. Updated the Macro naming and
added DCI-P3 colorspace as well, defined in CTA 861.G spec.

v12: Appended BT709 and SMPTE 170M with YCC information as per Ville's
review comment to be clear and not to be confused with RGB.

Signed-off-by: Uma Shankar 
Acked-by: Jani Nikula 
Reviewed-by: Shashank Sharma 
Reviewed-by: Maarten Lankhorst 
---
 drivers/gpu/drm/drm_atomic_uapi.c |  4 ++
 drivers/gpu/drm/drm_connector.c   | 78 +++
 include/drm/drm_connector.h   | 49 
 3 files changed, 131 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index 0aabd40..4eb81f1 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -746,6 +746,8 @@ static int drm_atomic_connector_set_property(struct 
drm_connector *connector,
return -EINVAL;
}
state->content_protection = val;
+   } else if (property == connector->colorspace_property) {
+   state->colorspace = val;
} else if (property == config->writeback_fb_id_property) {
struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL, 
val);
int ret = drm_atomic_set_writeback_fb_for_connector(state, fb);
@@ -814,6 +816,8 @@ static int drm_atomic_connector_set_property(struct 
drm_connector *connector,
*val = state->picture_aspect_ratio;
} else if (property == config->content_type_property) {
*val = state->content_type;
+   } else if (property == connector->colorspace_property) {
+   *val = state->colorspace;
} else if (property == connector->scaling_mode_property) {
*val = state->scaling_mode;
} else if (property == connector->content_protection_property) {
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index dd40eff..bff96a3 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -826,6 +826,33 @@ int drm_display_info_set_bus_formats(struct 
drm_display_info *info,
 };
 DRM_ENUM_NAME_FN(drm_get_content_protection_name, drm_cp_enum_list)
 
+static const struct drm_prop_enum_list hdmi_colorspaces[] = {
+   /* For Default case, driver will set the colorspace */
+   { DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
+   /* Standard Definition Colorimetry based on C

[v15 0/4] Add Colorspace connector property interface

2019-02-08 Thread Uma Shankar
This patch series creates a new connector property to program
colorspace to sink devices. Modern sink devices support more
than 1 type of colorspace like 601, 709, BT2020 etc. This helps
to switch based on content type which is to be displayed. The
decision lies with compositors as to in which scenarios, a
particular colorspace will be picked.

This will be helpful mostly to switch to higher gamut colorspaces
like BT2020 when the media content is encoded as BT2020. Thereby
giving a good visual experience to users.

The expectation from userspace is that it should parse the EDID
and get supported colorspaces. Use this property and switch to the
one supported. Sink supported colorspaces should be retrieved by
userspace from EDID and driver will not explicitly expose them.

Basically the expectation from userspace is:
 - Set up CRTC DEGAMMA/CTM/GAMMA to convert to some sink
   colorspace
 - Set this new property to let the sink know what it
   converted the CRTC output to.
 - This property is just to inform sink what colorspace
   source is trying to drive.

Have tested this using xrandr by using below command:
xrandr --output HDMI2 --set "Colorspace" "BT2020_rgb"

v2: Addressed Ville and Maarten's review comments. Merged the 2nd
and 3rd patch into one common logical patch.

v3: Removed Adobe references from enum definitions as per
Ville, Hans Verkuil and Jonas Karlman suggestions. Changed
default to an unset state where driver will assign the colorspace
when not chosen by user, suggested by Ville and Maarten. Addressed
other misc review comments from Maarten. Split the changes to
have separate colorspace property for DP and HDMI.

v4: Addressed Chris and Ville's review comments, and created a
common colorspace property for DP and HDMI, filtered the list

v5: Modified the colorspace property creation helper to take
platform specific enum list based on the capabilities of the
platform as suggested by Shashank. With this there is no need
for segregation between DP and HDMI.

v6: Addressed Shashank's review comments.

v7: Added defines instead of enum in uapi as per Brian Starkey's
suggestion in order to go with string matching at userspace. Updated
the kernel doc as well with more details.

v8: Addressed Maarten's review comments.

v9: Removed macro defines from uapi as per Brian Starkey and Daniel
Stone's comments and moved to drm include file. Moved back to older
design with exposing all HDMI colorspaces to userspace since infoframe
capability is there even on legacy platforms, as per Ville's review
comments.

v10: Addressed Maarten' review comment, updated the RB from Maarten
and Jani Nikula's ack. Also fixed sparse warnings and checkpatch
complaints.

v11: Addressed Ville's review comments. Modified MACRO names, added
infoframe helper for colorspace to drm layer. Added DCI-P3 colorspace
macro definitions defined in CTA 861.G. Currently linux/hdmi lacks
support for ACE formats, will be added as a separate series.

v12: Exported the helper API.

v13: As per Ville's suggestion, added separate CTA 861.G spec defined
HDMI specific macros. This is separate from user exposed enum values.
Fixed some macro naming inconsistencies.

v14: Appended BT709 and SMPTE 170M with YCC information as per Ville's
review comment to be clear and not to be confused with RGB. Added a check
to allow only RGB colorspaces to be set in infoframe through the colorspace
property, since there is no output csc property to control planar formats
and it will be added later.

v15: Fixed an error in one of the if check.

Uma Shankar (4):
  drm: Add HDMI colorspace property
  drm: Add DP colorspace property
  drm: Add colorspace info to AVI Infoframe
  drm/i915: Attach colorspace property and enable modeset

 drivers/gpu/drm/drm_atomic_uapi.c  |   4 ++
 drivers/gpu/drm/drm_connector.c| 104 +
 drivers/gpu/drm/drm_edid.c |  57 ++
 drivers/gpu/drm/i915/intel_atomic.c|  24 
 drivers/gpu/drm/i915/intel_connector.c |   8 +++
 drivers/gpu/drm/i915/intel_drv.h   |   1 +
 drivers/gpu/drm/i915/intel_hdmi.c  |  13 +
 include/drm/drm_connector.h|  69 ++
 include/drm/drm_edid.h |   6 ++
 9 files changed, 286 insertions(+)

-- 
1.9.1

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[v15 3/4] drm: Add colorspace info to AVI Infoframe

2019-02-08 Thread Uma Shankar
This adds colorspace information to HDMI AVI infoframe.
A helper function is added to program the same.

v2: Moved this to drm core instead of i915 driver.

v3: Exported the helper function.

v4: Added separate HDMI specific macro as per CTA spec.
This is separate from user exposed enum values. This is
as per Ville's suggestion.

v5: Appended BT709 and SMPTE 170M with YCC information as per Ville's
review comment to be clear and not to be confused with RGB.

Signed-off-by: Uma Shankar 
---
 drivers/gpu/drm/drm_edid.c  | 57 +
 include/drm/drm_connector.h | 20 
 include/drm/drm_edid.h  |  6 +
 3 files changed, 83 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 990b190..5202fea 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4925,6 +4925,63 @@ static bool is_hdmi2_sink(struct drm_connector 
*connector)
 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
 
 /**
+ * drm_hdmi_avi_infoframe_colorspace() - fill the HDMI AVI infoframe
+ *   colorspace information
+ * @frame: HDMI AVI infoframe
+ * @conn_state: connector state
+ */
+void
+drm_hdmi_avi_infoframe_colorspace(struct hdmi_avi_infoframe *frame,
+ const struct drm_connector_state *conn_state)
+{
+   u32 colorimetry_val = conn_state->colorspace &
+   FULL_COLORIMETRY_MASK;
+
+   switch (colorimetry_val) {
+   case DRM_MODE_COLORIMETRY_NO_DATA:
+   colorimetry_val = HDMI_COLORIMETRY_NO_DATA;
+   break;
+   case HDMI_COLORIMETRY_SMPTE_170M_YCC:
+   colorimetry_val = HDMI_COLORIMETRY_SMPTE_170M_YCC;
+   break;
+   case DRM_MODE_COLORIMETRY_BT709_YCC:
+   colorimetry_val = HDMI_COLORIMETRY_BT709_YCC;
+   break;
+   case DRM_MODE_COLORIMETRY_XVYCC_601:
+   colorimetry_val = HDMI_COLORIMETRY_XVYCC_601;
+   break;
+   case DRM_MODE_COLORIMETRY_XVYCC_709:
+   colorimetry_val = HDMI_COLORIMETRY_XVYCC_709;
+   break;
+   case DRM_MODE_COLORIMETRY_SYCC_601:
+   colorimetry_val = HDMI_COLORIMETRY_SYCC_601;
+   break;
+   case DRM_MODE_COLORIMETRY_OPYCC_601:
+   colorimetry_val = HDMI_COLORIMETRY_OPYCC_601;
+   break;
+   case DRM_MODE_COLORIMETRY_OPRGB:
+   colorimetry_val = HDMI_COLORIMETRY_OPRGB;
+   break;
+   case DRM_MODE_COLORIMETRY_BT2020_RGB:
+   case DRM_MODE_COLORIMETRY_BT2020_YCC:
+   colorimetry_val = HDMI_COLORIMETRY_BT2020_RGB;
+   break;
+   case DRM_MODE_COLORIMETRY_BT2020_CYCC:
+   colorimetry_val = HDMI_COLORIMETRY_BT2020_CYCC;
+   break;
+   default:
+   /* ToDo: DCI-P3 will be handled as part of ACE enabling */
+   colorimetry_val = HDMI_COLORIMETRY_NO_DATA;
+   break;
+   }
+
+   frame->colorimetry = colorimetry_val & NORMAL_COLORIMETRY_MASK;
+   frame->extended_colorimetry = (colorimetry_val >> 2) &
+   EXTENDED_COLORIMETRY_MASK;
+}
+EXPORT_SYMBOL(drm_hdmi_avi_infoframe_colorspace);
+
+/**
  * drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
  *quantization range information
  * @frame: HDMI AVI infoframe
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 4d9aa2f..efacf29 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -288,6 +288,26 @@ enum drm_panel_orientation {
 #define DRM_MODE_DP_COLORIMETRY_RGB_WIDE_GAMUT 16
 #define DRM_MODE_DP_COLORIMETRY_SCRGB  17
 
+/* HDMI Colorspace Spec Definitions */
+#define FULL_COLORIMETRY_MASK  0x1FF
+#define NORMAL_COLORIMETRY_MASK0x3
+#define EXTENDED_COLORIMETRY_MASK  0x7
+#define EXTENDED_ACE_COLORIMETRY_MASK  0xF
+
+#define HDMI_COLORIMETRY_NO_DATA   0x0
+#define HDMI_COLORIMETRY_SMPTE_170M_YCC0x1
+#define HDMI_COLORIMETRY_BT709_YCC 0x2
+#define HDMI_COLORIMETRY_XVYCC_601 0x3
+#define HDMI_COLORIMETRY_XVYCC_709 0x7
+#define HDMI_COLORIMETRY_SYCC_601  0xB
+#define HDMI_COLORIMETRY_OPYCC_601 0xF
+#define HDMI_COLORIMETRY_OPRGB 0x13
+#define HDMI_COLORIMETRY_BT2020_CYCC   0x17
+#define HDMI_COLORIMETRY_BT2020_RGB0x1C
+#define HDMI_COLORIMETRY_BT2020_YCC0x1C
+#define HDMI_COLORIMETRY_DCI_P3_RGB_D650x1F
+#define HDMI_COLORIMETRY_DCI_P3_RGB_THEATER0x3F
+
 /**
  * struct drm_display_info - runtime data about the connected si

[v15 2/4] drm: Add DP colorspace property

2019-02-08 Thread Uma Shankar
This patch adds a DP colorspace property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.

v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
colorspaces. Also, added a default option for colorspace.

v3: Split the changes to have separate colorspace property for
DP and HDMI.

v4: Addressed Chris and Ville's review comments, and created a
common colorspace property for DP and HDMI, filtered the list
based on the colorspaces supported by the respective protocol
standard.

v5: Merged the DP handling along with platform colorspace
handling as per Shashank's comments.

v6: Reverted to old design of exposing all colorspaces to
userspace as per Ville's review comment

v7: Fixed sparse warnings, updated the RB from Maarten and Jani's ack.

v8: Addressed Ville's review comments and updated the colorspace
macro definitions.

Signed-off-by: Uma Shankar 
Acked-by: Jani Nikula 
Reviewed-by: Maarten Lankhorst 
---
 drivers/gpu/drm/drm_connector.c | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index bff96a3..b37a85e 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -853,6 +853,24 @@ int drm_display_info_set_bus_formats(struct 
drm_display_info *info,
{ DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER, "DCI-P3_RGB_Theater" },
 };
 
+static const struct drm_prop_enum_list dp_colorspaces[] = {
+   /* For Default case, driver will set the colorspace */
+   { DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
+   /* Standard Definition Colorimetry based on IEC 61966-2-4 */
+   { DRM_MODE_COLORIMETRY_XVYCC_601, "XVYCC_601" },
+   /* High Definition Colorimetry based on IEC 61966-2-4 */
+   { DRM_MODE_COLORIMETRY_XVYCC_709, "XVYCC_709" },
+   /* Colorimetry based on IEC 61966-2-5 */
+   { DRM_MODE_COLORIMETRY_OPRGB, "opRGB" },
+   { DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65, "DCI-P3_RGB_D65" },
+   /* DP MSA Colorimetry */
+   { DRM_MODE_DP_COLORIMETRY_BT601_YCC, "BT601_YCC" },
+   { DRM_MODE_DP_COLORIMETRY_BT709_YCC, "BT709_YCC" },
+   { DRM_MODE_DP_COLORIMETRY_SRGB, "sRGB" },
+   { DRM_MODE_DP_COLORIMETRY_RGB_WIDE_GAMUT, "RGB Wide Gamut" },
+   { DRM_MODE_DP_COLORIMETRY_SCRGB, "scRGB" },
+};
+
 /**
  * DOC: standard connector properties
  *
@@ -1614,6 +1632,14 @@ int drm_mode_create_colorspace_property(struct 
drm_connector *connector)
ARRAY_SIZE(hdmi_colorspaces));
if (!prop)
return -ENOMEM;
+   } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
+  connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) 
{
+   prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
+   "Colorspace", dp_colorspaces,
+   ARRAY_SIZE(dp_colorspaces));
+
+   if (!prop)
+   return -ENOMEM;
} else {
DRM_DEBUG_KMS("Colorspace property not supported\n");
return 0;
-- 
1.9.1

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Re: [PATCH] fbdev: fbmem: fix memory access if logo is bigger than the screen

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/28/2019 11:04 AM, Martin Kepplinger wrote:
> From: Manfred Schlaegl 
> 
> There is no clipping on the x or y axis for logos larger that the framebuffer
> size. Therefore: a logo bigger than screen size leads to invalid memory 
> access:
> 
> [1.254664] Backtrace:
> [1.254728] [] (cfb_imageblit) from [] 
> (fb_show_logo+0x620/0x684)
> [1.254763]  r10:0003 r9:00027fd8 r8:c6a4 r7:c6a36e50 r6: 
> r5:c06b81e4
> [1.254774]  r4:c6a3e800
> [1.254810] [] (fb_show_logo) from [] 
> (fbcon_switch+0x3fc/0x46c)
> [1.254842]  r10:c6a3e824 r9:c6a3e800 r8: r7:c6a0c000 r6:c070b014 
> r5:c6a3e800
> [1.254852]  r4:c6808c00
> [1.254889] [] (fbcon_switch) from [] 
> (redraw_screen+0xf0/0x1e8)
> [1.254918]  r10: r9: r8: r7: r6:c070d5a0 
> r5:0080
> [1.254928]  r4:c6808c00
> [1.254961] [] (redraw_screen) from [] 
> (do_bind_con_driver+0x194/0x2e4)
> [1.254991]  r9: r8: r7:0014 r6:c070d5a0 r5:c070d5a0 
> r4:c070d5a0
> 
> So prevent displaying a logo bigger than screen size and avoid invalid
> memory access.
> 
> Signed-off-by: Manfred Schlaegl 
> Signed-off-by: Martin Kepplinger 

Patch queued for v5.1, thanks.

Best regards,
--
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Samsung R&D Institute Poland
Samsung Electronics
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Re: [PATCH] video/fbdev: refactor video= cmdline parsing

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/23/2019 12:12 PM, Jani Nikula wrote:
> On Wed, 23 Jan 2019, Daniel Vetter  wrote:
>> On Wed, Jan 23, 2019 at 11:38:17AM +0200, Jani Nikula wrote:
>>> Make the video_setup() function slightly easier to read by removing the
>>> repeated checks for !global. Remove the misleading return value comment
>>> while at it.
>>>
>>> I'm slightly hesitant to change any of this, but here goes anyway, with
>>> hopes that the next person to have to look at this has it a wee bit
>>> easier.
>>>
>>> Signed-off-by: Jani Nikula 
>>
>> Reviewed-by: Daniel Vetter 
> 
> Thanks.
> 
> Just to be clear, I expect Bartlomiej to queue this via the fb tree
> (provided he agrees with the change, of course).

Patch queued for v5.1, thanks.

Best regards,
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Re: [PATCH] fbdev: mbx: fix up debugfs file creation

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/22/2019 04:21 PM, Greg Kroah-Hartman wrote:
> There is no need to keep the dentries around for the individual debugfs
> files, just delete the whole directory all at once at shutdown instead.
> 
> This also fixes a tiny memory leak where the memory for the pointers to
> the file dentries was never freed when the device shut down, as well as
> making the logic of the code a lot simpler.
> 
> Cc: Bartlomiej Zolnierkiewicz 
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-fb...@vger.kernel.org
> Signed-off-by: Greg Kroah-Hartman 

Patch queued for v5.1, thanks.

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--
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Re: [PATCH] fbdev: omap2: no need to check return value of debugfs_create functions

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/22/2019 04:21 PM, Greg Kroah-Hartman wrote:
> When calling debugfs functions, there is no need to ever check the
> return value.  The function can work or not, but the code logic should
> never do something different based on this.
> 
> Cc: Bartlomiej Zolnierkiewicz 
> Cc: Mauro Carvalho Chehab 
> Cc: linux-o...@vger.kernel.org
> Cc: linux-fb...@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Greg Kroah-Hartman 

Patch queued for v5.1, thanks.

Best regards,
--
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Samsung R&D Institute Poland
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Re: [PATCH 1/7] drm: Add P010, P012, P016 format definitions and fourcc

2019-02-08 Thread Daniel Vetter
On Fri, Feb 8, 2019 at 2:51 PM  wrote:
>
> From: Juha-Pekka Heikkila 
>
> Add P010 definition, semi-planar yuv format where each component
> is 16 bits 10 msb containing color value. First come Y plane [10:6]
> followed by 2x2 subsampled Cr:Cb plane [10:6:10:6]
>
> Add P012 definition, semi-planar yuv format where each component
> is 16 bits 12 msb containing color value. First come Y plane [12:4]
> followed by 2x2 subsampled Cr:Cb plane [12:4:12:4]
>
> Add P016 definition, semi-planar yuv format where each component
> is 16 bits. First come Y plane followed by 2x2 subsampled Cr:Cb
> plane [16:16]
>
> Signed-off-by: Juha-Pekka Heikkila 

If you send out someone else's patches, you need to add your own
signed-off-by too.

Also, I pointed out that other people are also working on P010
formats, but the coordination here didn't seem to have happened. Other
patch will land in drm-misc rsn, so pls drop your patch here and for
merging this means a backmerge.

Thanks, Daniel

> ---
>  drivers/gpu/drm/drm_fourcc.c  |  3 +++
>  include/uapi/drm/drm_fourcc.h | 10 ++
>  2 files changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index d90ee03..d45a3a4 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -226,6 +226,9 @@ const struct drm_format_info *__drm_format_info(u32 
> format)
> { .format = DRM_FORMAT_VYUY,.depth = 0,  
> .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_XYUV,.depth = 0,  
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_AYUV,.depth = 0,  
> .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, 
> .is_yuv = true },
> +   { .format = DRM_FORMAT_P010,.depth = 0,  
> .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true  },
> +   { .format = DRM_FORMAT_P012,.depth = 0,  
> .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true  },
> +   { .format = DRM_FORMAT_P016,.depth = 0,  
> .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2, .is_yuv = true  },
> { .format = DRM_FORMAT_Y0L0,.depth = 0,  
> .num_planes = 1,
>   .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, 
> .block_h = { 2, 0, 0 },
>   .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 93a341d..073bbea 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -196,6 +196,16 @@
>  #define DRM_FORMAT_NV42fourcc_code('N', 'V', '4', '2') /* 
> non-subsampled Cb:Cr plane */
>
>  /*
> + * 2 plane YCbCr
> + * index 0 = Y plane, [15:0] Y little endian where Pxxx indicate
> + * component xxx msb Y [xxx:16-xxx]
> + * index 1 = Cr:Cb plane, [31:0] Cr:Cb little endian [xxx:16-xxx:xxx:16-xxx]
> + */
> +#define DRM_FORMAT_P010fourcc_code('P', '0', '1', '0') /* 
> 2x2 subsampled Cr:Cb plane, 10 bit per channel */
> +#define DRM_FORMAT_P012fourcc_code('P', '0', '1', '2') /* 
> 2x2 subsampled Cr:Cb plane, 12 bit per channel */
> +#define DRM_FORMAT_P016fourcc_code('P', '0', '1', '6') /* 
> 2x2 subsampled Cr:Cb plane, 16 bit per channel */
> +
> +/*
>   * 3 plane YCbCr
>   * index 0: Y plane, [7:0] Y
>   * index 1: Cb plane, [7:0] Cb
> --
> 1.9.1
>


-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH v2 2/2] video: lcd: Remove useless BACKLIGHT_CLASS_DEVICE dependencies

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/17/2019 02:33 PM, Alexander Shiyan wrote:
> This patch removes dependencies on BACKLIGHT_CLASS_DEVICE for items
> that are already placed under #if BACKLIGHT_CLASS_DEVICE.
> 
> Signed-off-by: Alexander Shiyan 

Acked-by: Bartlomiej Zolnierkiewicz 

Best regards,
--
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Samsung R&D Institute Poland
Samsung Electronics
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Re: [PATCH v2 1/2] video: lcd: Remove useless BACKLIGHT_LCD_SUPPORT kernel symbol

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/17/2019 05:19 PM, Daniel Thompson wrote:
> On Thu, Jan 17, 2019 at 04:33:35PM +0300, Alexander Shiyan wrote:
>> We have two *_CLASS_DEVICE kernel config options (LCD_CLASS_DEVICE
>> and BACKLIGHT_LCD_DEVICE) that do the same job.
>> The patch removes useless BACKLIGHT_LCD_SUPPORT option
>> and converts LCD_CLASS_DEVICE into a menu.
>>
>> Signed-off-by: Alexander Shiyan 
> 
> A cover letter with the v1 -> v2 changelog would be nice... but
> nevertheless:
> Acked-by: Daniel Thompson 

Also:

Acked-by: Bartlomiej Zolnierkiewicz 

Lee, will you pick this up or do you want me to do it?

Best regards,
--
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Re: [PATCH] video: offb: annotate implicit fall throughs

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/14/2019 10:50 PM, Gustavo A. R. Silva wrote:
> 
> 
> On 1/14/19 2:40 PM, Mathieu Malaterre wrote:
>> There is a plan to build the kernel with -Wimplicit-fallthrough and
>> these places in the code produced warnings (W=1). Fix them up.
>>
>> This commit remove the following warnings:
>>
>>drivers/video/fbdev/offb.c:211:5: warning: this statement may fall 
>> through [-Wimplicit-fallthrough=]
>>drivers/video/fbdev/offb.c:142:3: warning: this statement may fall 
>> through [-Wimplicit-fallthrough=]
>>
>> Signed-off-by: Mathieu Malaterre 
> 
> Acked-by: Gustavo A. R. Silva 

Patch queued for v5.1, thanks.

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
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Re: [PATCH] omapfb: fix typo

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 01/04/2019 10:43 PM, Matteo Croce wrote:
> Fix spelling mistake: "lenght" -> "length"
> 
> Signed-off-by: Matteo Croce 

Patch queued for v5.1, thanks.

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
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Re: [PATCH] fbdev: Use of_node_name_eq for node name comparisons

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 12/05/2018 08:50 PM, Rob Herring wrote:
> Convert string compares of DT node names to use of_node_name_eq helper
> instead. This removes direct access to the node name pointer.
> 
> For instances using of_node_cmp, this has the side effect of now using
> case sensitive comparisons. This should not matter for any FDT based
> system which omap is.
> 
> Cc: Benjamin Herrenschmidt 
> Cc: Bartlomiej Zolnierkiewicz 
> Cc: linux-fb...@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-o...@vger.kernel.org
> Signed-off-by: Rob Herring 

Patch queued for v5.1, thanks.

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
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Re: [PATCH] fbcon: use kvmalloc() for scrollback buffer

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 12/21/2018 11:58 AM, Konstantin Khorenko wrote:
> Hi Bartlomiej,
> 
> On 12/20/2018 07:21 PM, Bartlomiej Zolnierkiewicz wrote:
>> On 11/26/2018 11:02 AM, Konstantin Khorenko wrote:
>>> Scrollback frame buffer is rather big - 32K,
>>> so it requires 3rd order page, so let's use kvmalloc() instead of
>>> ordinary kmalloc() for it.
>>
>> Is it actually safe to use non-contiguous memory for softback_buf?
> 
> Well, that's why we need a review. :)

:)

> i've asked myself same question while fixing this,
> i've dig sources a bit and did not find places when softback_buf is provided 
> for DMA,
> all other places seems to work with virtual addresses, so there should be no 
> problem.
> 
> Even more i saw a function which mentions that softback might be 
> non-contigious:
> 
> /* As we might be inside of softback, we may work with non-contiguous buffer,
> that's why we have to use a separate routine. */
> static void fbcon_invert_region(struct vc_data *vc, u16 * p, int cnt)
> 
> So i think it's safe to use kvmalloc() here.

Patch queued for v5.1, thanks.

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
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Re: [PATCH -next] drivers/video/fbdev: remove set but not used variable 'size'

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 10/17/2018 01:52 AM, Michael Ellerman wrote:
> YueHaibing  writes:
> 
>> Fixes gcc '-Wunused-but-set-variable' warning:
>>
>> drivers/video/fbdev/chipsfb.c: In function 'chipsfb_pci_init':
>> drivers/video/fbdev/chipsfb.c:352:22: warning:
>>  variable 'size' set but not used [-Wunused-but-set-variable]
>>
>> It not used any more after commit
>> 8c8709334cec ("[PATCH] ppc32: Remove CONFIG_PMAC_PBOOK")
>>
>> Signed-off-by: YueHaibing 
>> ---
>>  drivers/video/fbdev/chipsfb.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> Looks good, thanks.
> 
> Should I merge this? Or otherwise:
> 
> Acked-by: Michael Ellerman 

I've queued the patch to fbdev tree for v5.1 w/ slightly modified patch
summary ("fbdev: chipsfb: ...") add patch description (use Fixes: tag),
thanks.

Best regards,
--
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Re: [PATCH] fbdev/via: fix spelling mistake "Expandsion" -> "Expansion"

2019-02-08 Thread Bartlomiej Zolnierkiewicz

On 10/13/2018 12:47 AM, Colin King wrote:
> From: Colin Ian King 
> 
> Trivial fix to spelling mistake in MODULE_PARM_DESC text
> 
> Signed-off-by: Colin Ian King 

Patch queued for v5.1, thanks.

Best regards,
--
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Re: [PATCH libdrm] xf86drm: fix return type for drmIsMaster()

2019-02-08 Thread Emil Velikov
On Fri, 8 Feb 2019 at 16:51, Daniel Stone  wrote:
>
> Hi Eric,
>
> On Fri, 8 Feb 2019 at 15:03, Eric Engestrom  wrote:
> > Xserver has struct members named `bool`, which means the last commit
> > breaks its build with errors like this:
> >
> >   error: two or more data types in declaration specifiers
> >   Bool bool;
> >^
> >
> > Fix this by making it return a 0/1 integer, with the same semantic as
> > the boolean it was before.
>
> Don't you need to drop the stdbool.h include for this to fix compilation?
>
Thanks Eric. With Dan's comment
Reviewed-by: Emil Velikov 

I really wonder if we cannot fix these trivial X nuisances? As-is
every project used has to either work around X mistakes :-(
Wrt libdrm that is fine, yet other projects might be less happy.

Thanks
-Emil
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Re: [PATCH libdrm] xf86drm: fix return type for drmIsMaster()

2019-02-08 Thread Daniel Stone
Hi Eric,

On Fri, 8 Feb 2019 at 15:03, Eric Engestrom  wrote:
> Xserver has struct members named `bool`, which means the last commit
> breaks its build with errors like this:
>
>   error: two or more data types in declaration specifiers
>   Bool bool;
>^
>
> Fix this by making it return a 0/1 integer, with the same semantic as
> the boolean it was before.

Don't you need to drop the stdbool.h include for this to fix compilation?

Cheers,
Daniel
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[PULL] drm-intel-next

2019-02-08 Thread Rodrigo Vivi
Hi Dave and Daniel,

This is the last batch from us targeting 5.1

Here goes drm-intel-next-2019-02-07:
UAPI Changes:

- Expose RPCS (SSEU) configuration to userspace for Ice Lake
in order to allow userspace to reconfigure the subslice config
per context basis. (Tvrtko, Lionel)

Driver Changes:

- Execbuf and preemption improvements including selftests (Chris)
- Rename HAS_GMCH_DISPLAY/HAS_GMCH (Rodrigo)
- Debugfs error handling fix for robustness (Greg)
- Improve reg_rw traces (Ville)
- Push clear_intel_crtc_state onto the heap (Chris)
- Watermark fixes for Ice Lake (Ville)
- Fix enable count array size and bounds checking (Tvrtko)
- MST Fixes (Lyude)
- Prevent race and handle error on I915_GEM_MMAP (Joonas)
- Initial rework for an full atomic gamma mode (Ville)

Thanks,
Rodrigo.

The following changes since commit 46c0cd8c562bc3e4a99cbaa4ba0904b6871b7b4b:

  drm/i915: Update DRIVER_DATE to 20190202 (2019-02-02 00:14:28 -0800)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2019-02-07

for you to fetch changes up to c09d39166d8a3f3788680b32dbb0a40a70de32e2:

  drm/i915: Update DRIVER_DATE to 20190207 (2019-02-07 12:45:32 -0800)


UAPI Changes:

- Expose RPCS (SSEU) configuration to userspace for Ice Lake
in order to allow userspace to reconfigure the subslice config
per context basis. (Tvrtko, Lionel)

Driver Changes:

- Execbuf and preemption improvements including selftests (Chris)
- Rename HAS_GMCH_DISPLAY/HAS_GMCH (Rodrigo)
- Debugfs error handling fix for robustness (Greg)
- Improve reg_rw traces (Ville)
- Push clear_intel_crtc_state onto the heap (Chris)
- Watermark fixes for Ice Lake (Ville)
- Fix enable count array size and bounds checking (Tvrtko)
- MST Fixes (Lyude)
- Prevent race and handle error on I915_GEM_MMAP (Joonas)
- Initial rework for an full atomic gamma mode (Ville)


Chris Wilson (9):
  drm/i915: Allow normal clients to always preempt idle priority clients
  drm/i915: Trim NEWCLIENT boosting
  drm/i915/selftests: Exercise some AB...BA preemption chains
  drm/i915: Generalise GPU activity tracking
  drm/i915: Release the active tracker tree upon idling
  drm/i915: Allocate active tracking nodes from a slabcache
  drm/i915: Pull i915_gem_active into the i915_active family
  drm/i915: Push clear_intel_crtc_state() onto the heap
  drm/i915: Hack and slash, throttle execbuffer hogs

Greg Kroah-Hartman (1):
  drm/i915: do not return invalid pointers as a *dentry

Joonas Lahtinen (2):
  drm/i915: Prevent a race during I915_GEM_MMAP ioctl with WC set
  drm/i915: Handle vm_mmap error during I915_GEM_MMAP ioctl with WC set

Lionel Landwerlin (2):
  drm/i915: Record the sseu configuration per-context & engine
  drm/i915/perf: lock powergating configuration to default when active

Lyude Paul (3):
  drm/i915: Block fbdev HPD processing during suspend
  drm/i915: Don't send MST hotplugs during resume
  drm/i915: Don't send hotplug in intel_dp_check_mst_status()

Rodrigo Vivi (2):
  drm/i915: Rename HAS_GMCH
  drm/i915: Update DRIVER_DATE to 20190207

Tvrtko Ursulin (4):
  drm/i915: Add timeline barrier support
  drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)
  drm/i915/selftests: Context SSEU reconfiguration tests
  drm/i915/pmu: Fix enable count array size and bounds checking

Ville Syrjälä (14):
  drm/i915: Include register polling in reg_rw traces
  drm/i915: Fix wm latency==0 disable on skl+
  drm/i915: Extract icl_set_pipe_chicken()
  drm/i915: Setup PIPE_CHICKEN for fastsets too
  drm/i915: W/A for underruns with WM1+ disabled on icl
  drm/i915: Bump skl+ wm blocks to 11 bits
  drm/i915: Just use icl+ definition for PLANE_WM blocks field
  drm/i915: Don't set update_wm_post on g4x+
  drm/i915: Split the gamma/csc enable bits from the plane_ctl() function
  drm/i915: Precompute gamma_mode
  drm/i915: Constify the state arguments to the color management stuff
  drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()
  drm/i915: Split color mgmt based on single vs. double buffered registers
  drm/i915: Move LUT programming to happen after vblank waits

 drivers/gpu/drm/i915/Makefile  |   4 +-
 drivers/gpu/drm/i915/i915_active.c | 286 +
 drivers/gpu/drm/i915/i915_active.h | 425 +++
 drivers/gpu/drm/i915/i915_active_types.h   |  36 ++
 drivers/gpu/drm/i915/i915_debugfs.c|   6 +-
 drivers/gpu/drm/i915/i915_drv.c|  12 +-
 drivers/gpu/drm/i915/i915_drv.h|  38 +-
 drivers/gpu/drm/i915/i915_gem.c|  34 +-
 drivers/gpu/drm/i915/i915_gem_context.c| 359 +++-
 drive

RE: [Intel-gfx] [v11 1/4] drm: Add HDMI colorspace property

2019-02-08 Thread Shankar, Uma


>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Friday, February 8, 2019 9:06 PM
>To: Shankar, Uma 
>Cc: Sharma, Shashank ; intel-
>g...@lists.freedesktop.org; Syrjala, Ville ; dri-
>de...@lists.freedesktop.org; Lankhorst, Maarten 
>Subject: Re: [Intel-gfx] [v11 1/4] drm: Add HDMI colorspace property
>
>On Fri, Feb 08, 2019 at 03:03:34PM +, Shankar, Uma wrote:
>>
>>
>> >-Original Message-
>> >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>> >Sent: Friday, February 8, 2019 8:08 PM
>> >To: Sharma, Shashank 
>> >Cc: Shankar, Uma ;
>> >intel-...@lists.freedesktop.org; Syrjala, Ville
>> >; dri-devel@lists.freedesktop.org;
>> >Lankhorst, Maarten 
>> >Subject: Re: [Intel-gfx] [v11 1/4] drm: Add HDMI colorspace property
>> >
>> >On Fri, Feb 08, 2019 at 07:36:24PM +0530, Sharma, Shashank wrote:
>> >> Regards
>> >>
>> >> Shashank
>> >>
>> >> On 2/8/2019 7:00 PM, Ville Syrjälä wrote:
>> >> > On Fri, Feb 08, 2019 at 06:36:39PM +0530, Sharma, Shashank wrote:
>> >> >> Regards
>> >> >>
>> >> >> Shashank
>> >> >>
>> >> >> On 2/8/2019 6:22 PM, Ville Syrjälä wrote:
>> >> >>> On Fri, Feb 08, 2019 at 12:36:25PM +, Sharma, Shashank wrote:
>> >>  Regards
>> >>  Shashank
>> >> 
>> >> > -Original Message-
>> >> > From: Intel-gfx
>> >> > [mailto:intel-gfx-boun...@lists.freedesktop.org]
>> >> > On Behalf Of Shankar, Uma
>> >> > Sent: Friday, February 8, 2019 5:45 PM
>> >> > To: Ville Syrjälä 
>> >> > Cc: intel-...@lists.freedesktop.org; Syrjala, Ville
>> >> > ; dri- de...@lists.freedesktop.org;
>> >> > Lankhorst, Maarten 
>> >> > Subject: Re: [Intel-gfx] [v11 1/4] drm: Add HDMI colorspace
>> >> > property
>> >> >
>> >> >> -Original Message-
>> >> >> From: Ville Syrjälä
>> >> >> [mailto:ville.syrj...@linux.intel.com]
>> >> >> Sent: Tuesday, February 5, 2019 10:02 PM
>> >> >> To: Shankar, Uma 
>> >> >> Cc: intel-...@lists.freedesktop.org;
>> >> >> dri-devel@lists.freedesktop.org; Syrjala, Ville
>> >> >> ; Lankhorst, Maarten
>> >> >> 
>> >> >> Subject: Re: [Intel-gfx] [v11 1/4] drm: Add HDMI
>> >> >> colorspace property
>> >> >>
>> >> >> On Tue, Feb 05, 2019 at 09:33:34PM +0530, Uma Shankar wrote:
>> >> >>> Create a new connector property to program colorspace
>> >> >>> to sink
>> >devices.
>> >> >>> Modern sink devices support more than 1 type of
>> >> >>> colorspace like 601, 709, BT2020 etc. This helps to
>> >> >>> switch based on content type which is to be displayed.
>> >> >>> The decision lies with compositors as to in which
>> >> >>> scenarios, a particular colorspace will
>> >be picked.
>> >> >>>
>> >> >>> This will be helpful mostly to switch to higher gamut
>> >> >>> colorspaces like
>> >> >>> BT2020 when the media content is encoded as BT2020.
>> >> >>> Thereby giving a good visual experience to users.
>> >> >>>
>> >> >>> The expectation from userspace is that it should parse
>> >> >>> the EDID and get supported colorspaces. Use this
>> >> >>> property and switch to the one supported. Sink
>> >> >>> supported colorspaces should be retrieved by userspace
>> >> >>> from EDID and driver will not explicitly expose
>> >> >> them.
>> >> >>> Basically the expectation from userspace is:
>> >> >>>- Set up CRTC DEGAMMA/CTM/GAMMA to convert to some sink
>> >> >>>  colorspace
>> >> >>>- Set this new property to let the sink know what it
>> >> >>>  converted the CRTC output to.
>> >> >>>
>> >> >>> v2: Addressed Maarten and Ville's review comments.
>> >> >>> Enhanced the colorspace enum to incorporate both HDMI
>> >> >>> and DP supported
>> >> >> colorspaces.
>> >> >>> Also, added a default option for colorspace.
>> >> >>>
>> >> >>> v3: Removed Adobe references from enum definitions as
>> >> >>> per Ville, Hans Verkuil and Jonas Karlman suggestions.
>> >> >>> Changed Default to an unset state where driver will
>> >> >>> assign the colorspace is not chosen by user, suggested
>> >> >>> by Ville and Maarten. Addressed other misc review comments 
>> >> >>> from
>Maarten.
>> >> >>> Split the changes to have separate colorspace property
>> >> >>> for DP and
>> >HDMI.
>> >> >>>
>> >> >>> v4: Addressed Chris and Ville's review comments, and
>> >> >>> created a common colorspace property for DP and HDMI,
>> >> >>> filtered the list based on the colorspaces supported by
>> >> >>> the respective
>> >protocol standard.
>> >> >>>
>> >> >>> v5: Made the property creation helper accept enum list
>> >> >>> based on platform

Re: [PATCH 2/3] gpu: ipu-v3: ipu-ic: Add support for BT.709 encoding

2019-02-08 Thread Tim Harvey
On Sun, Feb 3, 2019 at 11:48 AM Steve Longerbeam  wrote:
>
> Pass v4l2 encoding enum to the ipu_ic task init functions, and add
> support for the BT.709 encoding and inverse encoding matrices.
>
> Reported-by: Tim Harvey 
> Signed-off-by: Steve Longerbeam 
> ---
>  drivers/gpu/ipu-v3/ipu-ic.c | 67 ++---
>  drivers/gpu/ipu-v3/ipu-image-convert.c  |  1 +
>  drivers/staging/media/imx/imx-ic-prpencvf.c |  4 +-
>  include/video/imx-ipu-v3.h  |  5 +-
>  4 files changed, 67 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic.c
> index 35ae86ff0585..63362b4fff81 100644
> --- a/drivers/gpu/ipu-v3/ipu-ic.c
> +++ b/drivers/gpu/ipu-v3/ipu-ic.c
> @@ -199,6 +199,23 @@ static const struct ic_csc_params ic_csc_rgb2ycbcr_bt601 
> = {
> .scale = 1,
>  };
>
> +/*
> + * BT.709 encoding from RGB full range to YUV limited range:
> + *
> + * Y = R *  .2126 + G *  .7152 + B *  .0722;
> + * U = R * -.1146 + G * -.3854 + B *  .5000 + 128.;
> + * V = R *  .5000 + G * -.4542 + B * -.0458 + 128.;
> + */
> +static const struct ic_csc_params ic_csc_rgb2ycbcr_bt709 = {
> +   .coeff = {
> +   { 54, 183, 18 },
> +   { 483, 413, 128 },
> +   { 128, 396, 500 },
> +   },
> +   .offset = { 0, 512, 512 },
> +   .scale = 1,
> +};
> +
>  /* transparent RGB->RGB matrix for graphics combining */
>  static const struct ic_csc_params ic_csc_rgb2rgb = {
> .coeff = {
> @@ -226,12 +243,31 @@ static const struct ic_csc_params 
> ic_csc_ycbcr2rgb_bt601 = {
> .scale = 2,
>  };
>
> +/*
> + * Inverse BT.709 encoding from YUV limited range to RGB full range:
> + *
> + * R = (1. * (Y - 16)) + (1.5748 * (Cr - 128));
> + * G = (1. * (Y - 16)) - (0.1873 * (Cb - 128)) - (0.4681 * (Cr - 128));
> + * B = (1. * (Y - 16)) + (1.8556 * (Cb - 128);
> + */
> +static const struct ic_csc_params ic_csc_ycbcr2rgb_bt709 = {
> +   .coeff = {
> +   { 128, 0, 202 },
> +   { 128, 488, 452 },
> +   { 128, 238, 0 },
> +   },
> +   .offset = { -435, 136, -507 },
> +   .scale = 2,
> +};
> +
>  static int init_csc(struct ipu_ic *ic,
> enum ipu_color_space inf,
> enum ipu_color_space outf,
> +   enum v4l2_ycbcr_encoding encoding,
> int csc_index)
>  {
> struct ipu_ic_priv *priv = ic->priv;
> +   const struct ic_csc_params *params_rgb2yuv, *params_yuv2rgb;
> const struct ic_csc_params *params;
> u32 __iomem *base;
> const u16 (*c)[3];
> @@ -241,10 +277,24 @@ static int init_csc(struct ipu_ic *ic,
> base = (u32 __iomem *)
> (priv->tpmem_base + ic->reg->tpmem_csc[csc_index]);
>
> +   switch (encoding) {
> +   case V4L2_YCBCR_ENC_601:
> +   params_rgb2yuv =  &ic_csc_rgb2ycbcr_bt601;
> +   params_yuv2rgb = &ic_csc_ycbcr2rgb_bt601;
> +   break;
> +   case V4L2_YCBCR_ENC_709:
> +   params_rgb2yuv =  &ic_csc_rgb2ycbcr_bt709;
> +   params_yuv2rgb = &ic_csc_ycbcr2rgb_bt709;
> +   break;
> +   default:
> +   dev_err(priv->ipu->dev, "Unsupported YCbCr encoding\n");
> +   return -EINVAL;
> +   }
> +

Steve,

This will fail for RGB to RGB with 'Unsupported YCbCr encoding. We
need to account for the RGB->RGB case.

How about something like:

 static int init_csc(struct ipu_ic *ic,
enum ipu_color_space inf,
enum ipu_color_space outf,
+   enum v4l2_ycbcr_encoding encoding,
int csc_index)
 {
struct ipu_ic_priv *priv = ic->priv;
-   const struct ic_csc_params *params;
+   const struct ic_csc_params *params = NULL;
u32 __iomem *base;
const u16 (*c)[3];
const u16 *a;
@@ -241,13 +276,18 @@ static int init_csc(struct ipu_ic *ic,
base = (u32 __iomem *)
(priv->tpmem_base + ic->reg->tpmem_csc[csc_index]);

-   if (inf == IPUV3_COLORSPACE_YUV && outf == IPUV3_COLORSPACE_RGB)
-   params = &ic_csc_ycbcr2rgb_bt601;
-   else if (inf == IPUV3_COLORSPACE_RGB && outf == IPUV3_COLORSPACE_YUV)
-   params = &ic_csc_rgb2ycbcr_bt601;
+   if (inf == IPUV3_COLORSPACE_YUV && outf == IPUV3_COLORSPACE_RGB) {
+   params = (encoding == V4L2_YCBCR_ENC_601) ?
+   &ic_csc_ycbcr2rgb_bt601 : &ic_csc_ycbcr2rgb_bt709;
+   }
+   else if (inf == IPUV3_COLORSPACE_RGB && outf == IPUV3_COLORSPACE_YUV) {
+   params = (encoding == V4L2_YCBCR_ENC_601) ?
+   &ic_csc_rgb2ycbcr_bt601 : &ic_csc_rgb2ycbcr_bt709;
+   }
else if (inf == IPUV3_COLORSPACE_RGB && outf == IPUV3_COLORSPACE_RGB)
params = &ic_csc_rgb2rgb;
-   else {
+
+   if (!params) {
dev_err(priv->ipu->dev, "Unsupported co

[Bug 107825] *ERROR* Couldn't read Speaker Allocation Data Block: -2

2019-02-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107825

--- Comment #1 from Paul Menzel  ---
This still happens with Linux 4.19.19.

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[PATCH] gma500: fix some indentation issues

2019-02-08 Thread Colin King
From: Colin Ian King 

There are several statements that are indented incorrectly. Fix these.

Signed-off-by: Colin Ian King 
---
 drivers/gpu/drm/gma500/cdv_intel_dp.c | 5 ++---
 drivers/gpu/drm/gma500/mid_bios.c | 2 +-
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c 
b/drivers/gpu/drm/gma500/cdv_intel_dp.c
index 90ed20083009..52b18410fdef 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
@@ -1528,8 +1528,7 @@ cdv_intel_dp_start_link_train(struct gma_encoder *encoder)
clock_recovery = false;
 
DRM_DEBUG_KMS("Start train\n");
-   reg = DP | DP_LINK_TRAIN_PAT_1;
-
+   reg = DP | DP_LINK_TRAIN_PAT_1;
 
for (;;) {
/* Use intel_dp->train_set[0] to set the voltage and pre 
emphasis values */
@@ -1604,7 +1603,7 @@ cdv_intel_dp_complete_link_train(struct gma_encoder 
*encoder)
channel_eq = false;
 
DRM_DEBUG_KMS("\n");
-   reg = DP | DP_LINK_TRAIN_PAT_2;
+   reg = DP | DP_LINK_TRAIN_PAT_2;
 
for (;;) {
 
diff --git a/drivers/gpu/drm/gma500/mid_bios.c 
b/drivers/gpu/drm/gma500/mid_bios.c
index 237041a37532..0b47c1b202db 100644
--- a/drivers/gpu/drm/gma500/mid_bios.c
+++ b/drivers/gpu/drm/gma500/mid_bios.c
@@ -63,7 +63,7 @@ static void mid_get_fuse_settings(struct drm_device *dev)
 dev_priv->iLVDS_enable ? "LVDS display" : "MIPI display");
 
 /* Prevent runtime suspend at start*/
-if (dev_priv->iLVDS_enable) {
+   if (dev_priv->iLVDS_enable) {
dev_priv->is_lvds_on = true;
dev_priv->is_mipi_on = false;
} else {
-- 
2.20.1

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Re: [PATCH v10 1/2] drm/fourcc: Add new P010, P016 video format

2019-02-08 Thread Daniel Vetter
On Thu, Feb 07, 2019 at 10:44:10AM +0100, Neil Armstrong wrote:
> Hi,
> 
> On 14/01/2019 17:36, Ayan Halder wrote:
> > On Thu, Jan 10, 2019 at 03:57:09AM +0800, Randy Li wrote:
> >> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
> >> channel video format.
> >>
> >> P012 is a planar 4:2:0 YUV 12 bits per channel
> >>
> >> P016 is a planar 4:2:0 YUV with interleaved UV plane, 16 bits per
> >> channel video format.
> >>
> >> V3: Added P012 and fixed cpp for P010.
> >> V4: format definition refined per review.
> >> V5: Format comment block for each new pixel format.
> >> V6: reversed Cb/Cr order in comments.
> >> v7: reversed Cb/Cr order in comments of header files, remove
> >> the wrong part of commit message.
> >> V8: reversed V7 changes except commit message and rebased.
> >> v9: used the new properties to describe those format and
> >> rebased.
> >>
> >> Cc: Daniel Stone 
> >> Cc: Ville Syrj??l?? 
> >>
> >> Signed-off-by: Randy Li 
> >> Signed-off-by: Clint Taylor 
> >> ---
> >>  drivers/gpu/drm/drm_fourcc.c  |  9 +
> >>  include/uapi/drm/drm_fourcc.h | 21 +
> >>  2 files changed, 30 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> >> index d90ee03a84c6..ba7e19d4336c 100644
> >> --- a/drivers/gpu/drm/drm_fourcc.c
> >> +++ b/drivers/gpu/drm/drm_fourcc.c
> >> @@ -238,6 +238,15 @@ const struct drm_format_info *__drm_format_info(u32 
> >> format)
> >>{ .format = DRM_FORMAT_X0L2,.depth = 0,  
> >> .num_planes = 1,
> >>  .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, 
> >> .block_h = { 2, 0, 0 },
> >>  .hsub = 2, .vsub = 2, .is_yuv = true },
> >> +  { .format = DRM_FORMAT_P010,.depth = 0,  
> >> .num_planes = 2,
> >> +.char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, 
> >> .block_h = { 1, 0, 0 },
> >> +.hsub = 2, .vsub = 2, .is_yuv = true},
> >> +  { .format = DRM_FORMAT_P012,.depth = 0,  
> >> .num_planes = 2,
> >> +.char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, 
> >> .block_h = { 1, 0, 0 },
> >> + .hsub = 2, .vsub = 2, .is_yuv = true},
> >> +  { .format = DRM_FORMAT_P016,.depth = 0,  
> >> .num_planes = 2,
> >> +.char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 }, 
> >> .block_h = { 1, 0, 0 },
> >> +.hsub = 2, .vsub = 2, .is_yuv = true},
> >>};
> >>  
> >>unsigned int i;
> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> >> index 0b44260a5ee9..8dd1328bc8d6 100644
> >> --- a/include/uapi/drm/drm_fourcc.h
> >> +++ b/include/uapi/drm/drm_fourcc.h
> >> @@ -195,6 +195,27 @@ extern "C" {
> >>  #define DRM_FORMAT_NV24   fourcc_code('N', 'V', '2', '4') /* 
> >> non-subsampled Cr:Cb plane */
> >>  #define DRM_FORMAT_NV42   fourcc_code('N', 'V', '4', '2') /* 
> >> non-subsampled Cb:Cr plane */
> >>  
> >> +/*
> >> + * 2 plane YCbCr MSB aligned
> >> + * index 0 = Y plane, [15:0] Y:x [10:6] little endian
> >> + * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
> >> + */
> >> +#define DRM_FORMAT_P010   fourcc_code('P', '0', '1', '0') /* 2x2 
> >> subsampled Cr:Cb plane 10 bits per channel */
> >> +
> >> +/*
> >> + * 2 plane YCbCr MSB aligned
> >> + * index 0 = Y plane, [15:0] Y:x [12:4] little endian
> >> + * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [12:4:12:4] little endian
> >> + */
> >> +#define DRM_FORMAT_P012   fourcc_code('P', '0', '1', '2') /* 2x2 
> >> subsampled Cr:Cb plane 12 bits per channel */
> >> +
> >> +/*
> >> + * 2 plane YCbCr MSB aligned
> >> + * index 0 = Y plane, [15:0] Y little endian
> >> + * index 1 = Cr:Cb plane, [31:0] Cr:Cb [16:16] little endian
> >> + */
> >> +#define DRM_FORMAT_P016   fourcc_code('P', '0', '1', '6') /* 2x2 
> >> subsampled Cr:Cb plane 16 bits per channel */
> >> +
> > 
> > looks good to me.
> > Reviewed by:- Ayan Kumar Halder 
> > 
> > We are using P010 format for our mali display driver. Our AFBC patch
> > series(https://patchwork.freedesktop.org/series/53395/) is dependent
> > on this patch. So, that's why I wanted to know when you are planning to
> > merge this. As far as I remember, Juha wanted to implement some igt
> > tests
> > (https://lists.freedesktop.org/archives/intel-gfx/2018-September/174877.html)
> > , so is that done now?
> > 
> > My apologies if I am pushing hard on this.
> 
> Looks good to me aswell,
> 
> Reviewed by: Neil Armstrong 
> 
> Seems we will also need P010 to support the Amlogic Compressed modifier to 
> display
> compressed frames from the HW decoder.
> 
> I can apply this to drm-misc-next if everyone is ok

Matches what's still flaoting around by intel devs:

https://patchwork.freedesktop.org/patch/284801/

Except this one uses the new block descriptors and has much neater
comments.

Reviewed-by: Daniel Vetter 

Please push to drm-misc-next asap so intel folks 

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