date:20201215

The DP-HDMI2.1 PCON spec provides way for a source to set PPS
parameters: slice height, slice width and bits_per_pixel, based on
the HDMI2.1 sink capabilities. The DSC encoder of the PCON will
respect these parameters, while preparing the 128 byte PPS.

This patch adds helper functions to calculate these PPS paremeters as
per the HDMI2.1 specification.

v2: Addressed review comments given by Uma Shankar:
-added documentation for functions
-fixed typos and errors

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 233 ++
 drivers/gpu/drm/i915/display/intel_hdmi.h |   7 +
 2 files changed, 240 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index e10fdb369daa..41eb1c175a0e 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3428,3 +3428,236 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
dig_port->aux_ch = intel_bios_port_aux_ch(dev_priv, port);
intel_hdmi_init_connector(dig_port, intel_connector);
 }
+
+/*
+ * intel_hdmi_dsc_get_slice_height - get the dsc slice_height
+ * @vactive: Vactive of a display mode
+ *
+ * @return: appropriate dsc slice height for a given mode.
+ */
+int intel_hdmi_dsc_get_slice_height(int vactive)
+{
+   int slice_height;
+
+   /*
+* Slice Height determination : HDMI2.1 Section 7.7.5.2
+* Select smallest slice height >=96, that results in a valid PPS and
+* requires minimum padding lines required for final slice.
+*
+* Assumption : Vactive is even.
+*/
+   for (slice_height = 96; slice_height <= vactive; slice_height += 2)
+   if (vactive % slice_height == 0)
+   return slice_height;
+
+   return 0;
+}
+
+/*
+ * intel_hdmi_dsc_get_num_slices - get no. of dsc slices based on dsc encoder
+ * and dsc decoder capabilites
+ *
+ * @crtc_state: intel crtc_state
+ * @src_max_slices: maximum slices supported by the DSC encoder
+ * @src_max_slice_width: maximum slice width supported by DSC encoder
+ * @hdmi_max_slices: maximum slices supported by sink DSC decoder
+ * @hdmi_throughput: maximum clock per slice (MHz) supported by HDMI sink
+ *
+ * @return: num of dsc slices that can be supported by the dsc encoder
+ * and decoder.
+ */
+int
+intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
+ int src_max_slices, int src_max_slice_width,
+ int hdmi_max_slices, int hdmi_throughput)
+{
+/* Pixel rates in KPixels/sec */
+#define HDMI_DSC_PEAK_PIXEL_RATE   272
+/*
+ * Rates at which the source and sink are required to process pixels in each
+ * slice, can be two levels: either atleast 34KHz or atleast 4KHz.
+ */
+#define HDMI_DSC_MAX_ENC_THROUGHPUT_0  34
+#define HDMI_DSC_MAX_ENC_THROUGHPUT_1  40
+
+/* Spec limits the slice width to 2720 pixels */
+#define MAX_HDMI_SLICE_WIDTH   2720
+   int kslice_adjust;
+   int adjusted_clk_khz;
+   int min_slices;
+   int target_slices;
+   int max_throughput; /* max clock freq. in khz per slice */
+   int max_slice_width;
+   int slice_width;
+   int pixel_clock = crtc_state->hw.adjusted_mode.crtc_clock;
+
+   if (!hdmi_throughput)
+   return 0;
+
+   /*
+* Slice Width determination : HDMI2.1 Section 7.7.5.1
+* kslice_adjust factor for 4:2:0, and 4:2:2 formats is 0.5, where as
+* for 4:4:4 is 1.0. Multiplying these factors by 10 and later
+* dividing adjusted clock value by 10.
+*/
+   if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
+   crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
+   kslice_adjust = 10;
+   else
+   kslice_adjust = 5;
+
+   /*
+* As per spec, the rate at which the source and the sink process
+* the pixels per slice are at two levels: atleast 340Mhz or 400Mhz.
+* This depends upon the pixel clock rate and output formats
+* (kslice adjust).
+* If pixel clock * kslice adjust >= 2720MHz slices can be processed
+* at max 340MHz, otherwise they can be processed at max 400MHz.
+*/
+
+   adjusted_clk_khz = DIV_ROUND_UP(kslice_adjust * pixel_clock, 10);
+
+   if (adjusted_clk_khz <= HDMI_DSC_PEAK_PIXEL_RATE)
+   max_throughput = HDMI_DSC_MAX_ENC_THROUGHPUT_0;
+   else
+   max_throughput = HDMI_DSC_MAX_ENC_THROUGHPUT_1;
+
+   /*
+* Taking into account the sink's capability for maximum
+* clock per slice (in MHz) as read from HF-VSDB.
+*/
+   max_throughput = min(max_throughput, hdmi_throughput * 1000);
+
+   min_slices = DIV_ROUND_UP(adjusted_clk_khz, max_throughput);
+   max_slice_width = min(MAX_HDMI_SLICE_W

[PATCH v5 14/15] drm/i915/display: Configure PCON for DSC1.1 to DSC1.2 encoding

When a source supporting DSC1.1 is connected to DSC1.2 HDMI2.1 sink
via DP HDMI2.1 PCON, the PCON can be configured to decode the
DSC1.1 compressed stream and encode to DSC1.2. It then sends the
DSC1.2 compressed stream to the HDMI2.1 sink.

This patch configures the PCON for DSC1.1 to DSC1.2 encoding, based
on the PCON's DSC encoder capablities and HDMI2.1 sink's DSC decoder
capabilities.

v2: Addressed review comments from Uma Shankar:
-fixed the error in packing pps parameter values
-added check for pcon in the pcon related function
-appended display in commit message

v3: Only consider non-zero DSC FRL b/w for determining max FRL b/w
supported by sink.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c  | 118 ++-
 drivers/gpu/drm/i915/display/intel_dp.h  |   2 +
 3 files changed, 119 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 974cf42351bc..fbc07a93504b 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3653,6 +3653,7 @@ static void tgl_ddi_pre_enable_dp(struct 
intel_atomic_state *state,
intel_dp_sink_set_fec_ready(intel_dp, crtc_state);
 
intel_dp_check_frl_training(intel_dp);
+   intel_dp_pcon_dsc_configure(intel_dp, crtc_state);
 
/*
 * 7.i Follow DisplayPort specification training sequence (see notes for
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 87592bebff01..abc9b772d1c8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4035,9 +4035,22 @@ static int intel_dp_hdmi_sink_max_frl(struct intel_dp 
*intel_dp)
 {
struct intel_connector *intel_connector = intel_dp->attached_connector;
struct drm_connector *connector = &intel_connector->base;
+   int max_frl_rate;
+   int max_lanes, rate_per_lane;
+   int max_dsc_lanes, dsc_rate_per_lane;
 
-   return (connector->display_info.hdmi.max_frl_rate_per_lane *
-   connector->display_info.hdmi.max_lanes);
+   max_lanes = connector->display_info.hdmi.max_lanes;
+   rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane;
+   max_frl_rate = max_lanes * rate_per_lane;
+
+   if (connector->display_info.hdmi.dsc_cap.v_1p2) {
+   max_dsc_lanes = connector->display_info.hdmi.dsc_cap.max_lanes;
+   dsc_rate_per_lane = 
connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane;
+   if (max_dsc_lanes && dsc_rate_per_lane)
+   max_frl_rate = min(max_frl_rate, max_dsc_lanes * 
dsc_rate_per_lane);
+   }
+
+   return max_frl_rate;
 }
 
 static int intel_dp_pcon_start_frl_training(struct intel_dp *intel_dp)
@@ -4144,6 +4157,105 @@ void intel_dp_check_frl_training(struct intel_dp 
*intel_dp)
}
 }
 
+static int
+intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state)
+{
+
+   int vactive = crtc_state->hw.adjusted_mode.vdisplay;
+
+   return intel_hdmi_dsc_get_slice_height(vactive);
+}
+
+static int
+intel_dp_pcon_dsc_enc_slices(struct intel_dp *intel_dp,
+const struct intel_crtc_state *crtc_state)
+{
+   struct intel_connector *intel_connector = intel_dp->attached_connector;
+   struct drm_connector *connector = &intel_connector->base;
+   int hdmi_throughput = 
connector->display_info.hdmi.dsc_cap.clk_per_slice;
+   int hdmi_max_slices = connector->display_info.hdmi.dsc_cap.max_slices;
+   int pcon_max_slices = 
drm_dp_pcon_dsc_max_slices(intel_dp->pcon_dsc_dpcd);
+   int pcon_max_slice_width = 
drm_dp_pcon_dsc_max_slice_width(intel_dp->pcon_dsc_dpcd);
+
+
+   return intel_hdmi_dsc_get_num_slices(crtc_state, pcon_max_slices,
+pcon_max_slice_width,
+hdmi_max_slices, hdmi_throughput);
+}
+
+static int
+intel_dp_pcon_dsc_enc_bpp(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ int num_slices, int slice_width)
+{
+   struct intel_connector *intel_connector = intel_dp->attached_connector;
+   struct drm_connector *connector = &intel_connector->base;
+   int output_format = crtc_state->output_format;
+   bool hdmi_all_bpp = connector->display_info.hdmi.dsc_cap.all_bpp;
+   int pcon_fractional_bpp = 
drm_dp_pcon_dsc_bpp_incr(intel_dp->pcon_dsc_dpcd);
+   int hdmi_max_chunk_bytes =
+   connector->display_info.hdmi.dsc_cap.total_chunk_kbytes * 1024;
+
+   return intel_hdmi_dsc_get_bpp(pcon_fractional_bpp, slice_width,
+ num_slices, output_format, hdmi_all_bpp,
+ hdmi_max_chunk_bytes);

[PATCH v5 15/15] drm/i915/display: Let PCON convert from RGB to YUV if it can

If PCON has capability to convert RGB->YUV colorspace and also
to 444->420 downsampling then for any YUV420 only mode, we can
let the PCON do all the conversion.

v2: As suggested by Uma Shankar, considered case for colorspace
BT709 and BT2020, and default to BT609. Also appended dir
'display' in commit message.

Signed-off-by: Ankit Nautiyal 
---
 drivers/gpu/drm/i915/display/intel_ddi.c  |  3 +-
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 68 +++
 drivers/gpu/drm/i915/display/intel_dp.h   |  3 +-
 4 files changed, 58 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index fbc07a93504b..17eaa56c5a99 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3644,6 +3644,7 @@ static void tgl_ddi_pre_enable_dp(struct 
intel_atomic_state *state,
if (!is_mst)
intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
 
+   intel_dp_configure_protocol_converter(intel_dp, crtc_state);
intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
/*
 * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
@@ -3731,7 +3732,7 @@ static void hsw_ddi_pre_enable_dp(struct 
intel_atomic_state *state,
intel_ddi_init_dp_buf_reg(encoder, crtc_state);
if (!is_mst)
intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
-   intel_dp_configure_protocol_converter(intel_dp);
+   intel_dp_configure_protocol_converter(intel_dp, crtc_state);
intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
  true);
intel_dp_sink_set_fec_ready(intel_dp, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 4c01c7c23dfd..2009ae9e9678 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1460,6 +1460,7 @@ struct intel_dp {
int pcon_max_frl_bw;
u8 max_bpc;
bool ycbcr_444_to_420;
+   bool rgb_to_ycbcr;
} dfp;
 
/* Display stream compression testing */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index abc9b772d1c8..7781245c2afe 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -651,6 +651,10 @@ intel_dp_output_format(struct drm_connector *connector,
!drm_mode_is_420_only(info, mode))
return INTEL_OUTPUT_FORMAT_RGB;
 
+   if (intel_dp->dfp.rgb_to_ycbcr &&
+   intel_dp->dfp.ycbcr_444_to_420)
+   return INTEL_OUTPUT_FORMAT_RGB;
+
if (intel_dp->dfp.ycbcr_444_to_420)
return INTEL_OUTPUT_FORMAT_YCBCR444;
else
@@ -4311,7 +4315,8 @@ static void intel_dp_enable_port(struct intel_dp 
*intel_dp,
intel_de_posting_read(dev_priv, intel_dp->output_reg);
 }
 
-void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp)
+void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
+  const struct intel_crtc_state 
*crtc_state)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
u8 tmp;
@@ -4338,14 +4343,34 @@ void intel_dp_configure_protocol_converter(struct 
intel_dp *intel_dp)
drm_dbg_kms(&i915->drm,
"Failed to set protocol converter YCbCr 4:2:0 
conversion mode to %s\n",
enableddisabled(intel_dp->dfp.ycbcr_444_to_420));
-
-   tmp = 0;
-
-   if (drm_dp_dpcd_writeb(&intel_dp->aux,
-  DP_PROTOCOL_CONVERTER_CONTROL_2, tmp) <= 0)
+   if (intel_dp->dfp.rgb_to_ycbcr) {
+   bool bt2020, bt709;
+
+   bt2020 = 
drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
+   
intel_dp->downstream_ports,
+   
DP_DS_HDMI_BT2020_RGB_YCBCR_CONV);
+   bt709 = 
drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
+   
intel_dp->downstream_ports,
+   
DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
+   switch (crtc_state->infoframes.vsc.colorimetry) {
+   case DP_COLORIMETRY_BT2020_RGB:
+   case DP_COLORIMETRY_BT2020_YCC:
+   tmp = bt2020 ? DP_CONVERSION_BT2020_RGB_YCBCR_ENABLE : 
0;
+   break;
+   case DP_COLORIMETRY_BT709_YCC:
+   case DP_COLORIMETRY_XVYCC_709:
+   tmp = bt709 ? DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
+   break;
+   d

[PATCH v5 12/15] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder

This patch adds support to read and store the DSC capabilities of the
HDMI2.1 PCon encoder. It also adds a new field to store these caps,
The caps are read during dfp update and can later be used to get the
PPS parameters for PCON-HDMI2.1 sink pair. Which inturn will be used
to take a call to override the existing PPS-metadata, by either
writing the entire new PPS metadata, or by writing only the
PPS override parameters.

v2: Restructured the code to read all capability DPCDs at once and store
in an array in intel_dp structure.

v3: rebase

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 20 +++
 2 files changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index daecff9783ea..4c01c7c23dfd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1362,6 +1362,7 @@ struct intel_dp {
u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];
u8 lttpr_phy_caps[DP_MAX_LTTPR_COUNT][DP_LTTPR_PHY_CAP_SIZE];
u8 fec_capable;
+   u8 pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE];
/* source rates */
int num_source_rates;
const int *source_rates;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index daf2faaa40fb..87592bebff01 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3980,6 +3980,24 @@ cpt_set_link_train(struct intel_dp *intel_dp,
intel_de_posting_read(dev_priv, intel_dp->output_reg);
 }
 
+static void intel_dp_get_pcon_dsc_cap(struct intel_dp *intel_dp)
+{
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+   /* Clear the cached register set to avoid using stale values */
+
+   memset(intel_dp->pcon_dsc_dpcd, 0, sizeof(intel_dp->pcon_dsc_dpcd));
+
+   if (drm_dp_dpcd_read(&intel_dp->aux, DP_PCON_DSC_ENCODER,
+intel_dp->pcon_dsc_dpcd,
+sizeof(intel_dp->pcon_dsc_dpcd)) < 0)
+   drm_err(&i915->drm, "Failed to read DPCD register 0x%x\n",
+   DP_PCON_DSC_ENCODER);
+
+   drm_dbg_kms(&i915->drm, "PCON ENCODER DSC DPCD: %*ph\n",
+  (int)sizeof(intel_dp->pcon_dsc_dpcd), 
intel_dp->pcon_dsc_dpcd);
+}
+
 static int intel_dp_pcon_get_frl_mask(u8 frl_bw_mask)
 {
int bw_gbps[] = {9, 18, 24, 32, 40, 48};
@@ -6712,6 +6730,8 @@ intel_dp_update_dfp(struct intel_dp *intel_dp,
intel_dp->dfp.min_tmds_clock,
intel_dp->dfp.max_tmds_clock,
intel_dp->dfp.pcon_max_frl_bw);
+
+   intel_dp_get_pcon_dsc_cap(intel_dp);
 }
 
 static void
-- 
2.17.1

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[PATCH v5 11/15] drm/i915: Add support for enabling link status and recovery

From: Swati Sharma 

In this patch enables support for detecting link failures between
PCON and HDMI sink in i915 driver. HDMI link loss indication to
upstream DP source is indicated via IRQ_HPD. This is followed by
reading of HDMI link configuration status (HDMI_TX_LINK_ACTIVE_STATUS).
If the PCON → HDMI 2.1 link status is off; reinitiate frl link
training to recover. Also, report HDMI FRL link error count range for
each individual FRL active lane is indicated by
DOWNSTREAM_HDMI_ERROR_STATUS_LN registers.

v2: Checked for dpcd read and write failures and added debug message.
(Uma Shankar)

v3: Rearranged code to re-start FRL link training or fall back to
TMDS mode.

v4: Resused function to check frl which inturn restarts FRL and
fallback to TMDS mode.

Signed-off-by: Swati Sharma 
Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar  (v2)
---
 drivers/gpu/drm/i915/display/intel_dp.c | 53 +++--
 1 file changed, 50 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9d0adce14613..daf2faaa40fb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6005,6 +6005,28 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
return link_ok;
 }
 
+static void
+intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp)
+{
+   bool is_active;
+   u8 buf = 0;
+
+   is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux);
+   if (intel_dp->frl.is_trained && !is_active) {
+   if (drm_dp_dpcd_readb(&intel_dp->aux, 
DP_PCON_HDMI_LINK_CONFIG_1, &buf) < 0)
+   return;
+
+   buf &=  ~DP_PCON_ENABLE_HDMI_LINK;
+   if (drm_dp_dpcd_writeb(&intel_dp->aux, 
DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0)
+   return;
+
+   drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux, 
&intel_dp->attached_connector->base);
+
+   /* Restart FRL training or fall back to TMDS mode */
+   intel_dp_check_frl_training(intel_dp);
+   }
+}
+
 static bool
 intel_dp_needs_link_retrain(struct intel_dp *intel_dp)
 {
@@ -6370,7 +6392,7 @@ intel_dp_hotplug(struct intel_encoder *encoder,
return state;
 }
 
-static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
+static void intel_dp_check_device_service_irq(struct intel_dp *intel_dp)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
u8 val;
@@ -6394,6 +6416,30 @@ static void intel_dp_check_service_irq(struct intel_dp 
*intel_dp)
drm_dbg_kms(&i915->drm, "Sink specific irq unhandled\n");
 }
 
+static void intel_dp_check_link_service_irq(struct intel_dp *intel_dp)
+{
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+   u8 val;
+
+   if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
+   return;
+
+   if (drm_dp_dpcd_readb(&intel_dp->aux,
+ DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &val) != 1 || 
!val) {
+   drm_dbg_kms(&i915->drm, "Error in reading link service irq 
vector\n");
+   return;
+   }
+
+   if (drm_dp_dpcd_writeb(&intel_dp->aux,
+  DP_LINK_SERVICE_IRQ_VECTOR_ESI0, val) != 1) {
+   drm_dbg_kms(&i915->drm, "Error in writing link service irq 
vector\n");
+   return;
+   }
+
+   if (val & HDMI_LINK_STATUS_CHANGED)
+   intel_dp_handle_hdmi_link_status_change(intel_dp);
+}
+
 /*
  * According to DP spec
  * 5.1.2:
@@ -6433,7 +6479,8 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
return false;
}
 
-   intel_dp_check_service_irq(intel_dp);
+   intel_dp_check_device_service_irq(intel_dp);
+   intel_dp_check_link_service_irq(intel_dp);
 
/* Handle CEC interrupts, if any */
drm_dp_cec_irq(&intel_dp->aux);
@@ -6863,7 +6910,7 @@ intel_dp_detect(struct drm_connector *connector,
to_intel_connector(connector)->detect_edid)
status = connector_status_connected;
 
-   intel_dp_check_service_irq(intel_dp);
+   intel_dp_check_device_service_irq(intel_dp);
 
 out:
if (status != connector_status_connected && !intel_dp->is_mst)
-- 
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[PATCH v5 10/15] drm/i915: Check for FRL training before DP Link training

This patch calls functions to check FRL training requirements
for an HDMI2.1 sink, when connected through PCON.
The call is made before the DP link training. In case FRL is not
required or failure during FRL training, the TMDS mode is selected
for the pcon.

v2: moved check_frl_training() just after FEC READY, before
starting DP link training.

v3: rebase

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
 drivers/gpu/drm/i915/display/intel_dp.c  | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 6863236df1d0..974cf42351bc 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3652,6 +3652,8 @@ static void tgl_ddi_pre_enable_dp(struct 
intel_atomic_state *state,
 */
intel_dp_sink_set_fec_ready(intel_dp, crtc_state);
 
+   intel_dp_check_frl_training(intel_dp);
+
/*
 * 7.i Follow DisplayPort specification training sequence (see notes for
 * failure handling)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 1fdcb7672ad0..9d0adce14613 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4256,6 +4256,7 @@ static void intel_enable_dp(struct intel_atomic_state 
*state,
 
intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
intel_dp_configure_protocol_converter(intel_dp);
+   intel_dp_check_frl_training(intel_dp);
intel_dp_start_link_train(intel_dp, pipe_config);
intel_dp_stop_link_train(intel_dp, pipe_config);
 
@@ -6177,6 +6178,7 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
!intel_dp_mst_is_master_trans(crtc_state))
continue;
 
+   intel_dp_check_frl_training(intel_dp);
intel_dp_start_link_train(intel_dp, crtc_state);
intel_dp_stop_link_train(intel_dp, crtc_state);
break;
-- 
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[PATCH v5 08/15] drm/i915: Capture max frl rate for PCON in dfp cap structure

HDMI2.1 PCON advertises Max FRL bandwidth supported by the PCON.

This patch captures this in dfp cap structure in intel_dp and uses
this to prune connector modes that cannot be supported by the PCON
and FRL bandwidth.

v2: Addressed review comments from Uma Shankar:
-tweaked the comparison of target bw and pcon frl bw to avoid roundup errors.
-minor modification of field names and comments.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 .../drm/i915/display/intel_display_types.h|  1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 30 +--
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5bc5bfbc4551..c88d2b918d9f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1451,6 +1451,7 @@ struct intel_dp {
struct {
int min_tmds_clock, max_tmds_clock;
int max_dotclock;
+   int pcon_max_frl_bw;
u8 max_bpc;
bool ycbcr_444_to_420;
} dfp;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index cb5e42c3ecd5..660b4bd2280a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -716,6 +716,25 @@ intel_dp_mode_valid_downstream(struct intel_connector 
*connector,
const struct drm_display_info *info = &connector->base.display_info;
int tmds_clock;
 
+   /* If PCON supports FRL MODE, check FRL bandwidth constraints */
+   if (intel_dp->dfp.pcon_max_frl_bw) {
+   int target_bw;
+   int max_frl_bw;
+   int bpp = intel_dp_mode_min_output_bpp(&connector->base, mode);
+
+   target_bw = bpp * target_clock;
+
+   max_frl_bw = intel_dp->dfp.pcon_max_frl_bw;
+
+   /* converting bw from Gbps to Kbps*/
+   max_frl_bw = max_frl_bw * 100;
+
+   if (target_bw > max_frl_bw)
+   return MODE_CLOCK_HIGH;
+
+   return MODE_OK;
+   }
+
if (intel_dp->dfp.max_dotclock &&
target_clock > intel_dp->dfp.max_dotclock)
return MODE_CLOCK_HIGH;
@@ -6484,13 +6503,18 @@ intel_dp_update_dfp(struct intel_dp *intel_dp,
 intel_dp->downstream_ports,
 edid);
 
+   intel_dp->dfp.pcon_max_frl_bw =
+   drm_dp_get_pcon_max_frl_bw(intel_dp->dpcd,
+  intel_dp->downstream_ports);
+
drm_dbg_kms(&i915->drm,
-   "[CONNECTOR:%d:%s] DFP max bpc %d, max dotclock %d, TMDS 
clock %d-%d\n",
+   "[CONNECTOR:%d:%s] DFP max bpc %d, max dotclock %d, TMDS 
clock %d-%d, PCON Max FRL BW %dGbps\n",
connector->base.base.id, connector->base.name,
intel_dp->dfp.max_bpc,
intel_dp->dfp.max_dotclock,
intel_dp->dfp.min_tmds_clock,
-   intel_dp->dfp.max_tmds_clock);
+   intel_dp->dfp.max_tmds_clock,
+   intel_dp->dfp.pcon_max_frl_bw);
 }
 
 static void
@@ -6582,6 +6606,8 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
intel_dp->dfp.min_tmds_clock = 0;
intel_dp->dfp.max_tmds_clock = 0;
 
+   intel_dp->dfp.pcon_max_frl_bw = 0;
+
intel_dp->dfp.ycbcr_444_to_420 = false;
connector->base.ycbcr_420_allowed = false;
 }
-- 
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[PATCH v5 09/15] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON

This patch adds functions to start FRL training for an HDMI2.1 sink,
connected via a PCON as a DP branch device.
This patch also adds a new structure for storing frl training related
data, when FRL training is completed.

v2: As suggested by Uma Shankar:
-renamed couple of variables for better clarity
-tweaked the macros used for correct semantics for true/false
-fixed other styling issues.

v3: Completed the TODO for condition for going to FRL mode.
Modified the condition to determine the required FRL b/w
based only on the Pcon and Sink's max FRL values.
Moved the frl structure initialization to intel_dp_init_connector().

v4: Fixed typo in initialization of frl structure.

v5: Always use FRL if its possible, instead of enabling only for
higher modes as done in v3.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar  (v2)
---
 .../drm/i915/display/intel_display_types.h|   7 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 151 ++
 drivers/gpu/drm/i915/display/intel_dp.h   |   2 +
 3 files changed, 160 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index c88d2b918d9f..daecff9783ea 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1339,6 +1339,11 @@ struct intel_dp_compliance {
u8 test_lane_count;
 };
 
+struct intel_dp_pcon_frl {
+   bool is_trained;
+   int trained_rate_gbps;
+};
+
 struct intel_dp {
i915_reg_t output_reg;
u32 DP;
@@ -1461,6 +1466,8 @@ struct intel_dp {
 
bool hobl_failed;
bool hobl_active;
+
+   struct intel_dp_pcon_frl frl;
 };
 
 enum lspcon_vendor {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 660b4bd2280a..1fdcb7672ad0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3883,6 +3883,8 @@ static void intel_disable_dp(struct intel_atomic_state 
*state,
intel_edp_backlight_off(old_conn_state);
intel_dp_set_power(intel_dp, DP_SET_POWER_D3);
intel_edp_panel_off(intel_dp);
+   intel_dp->frl.is_trained = false;
+   intel_dp->frl.trained_rate_gbps = 0;
 }
 
 static void g4x_disable_dp(struct intel_atomic_state *state,
@@ -3978,6 +3980,152 @@ cpt_set_link_train(struct intel_dp *intel_dp,
intel_de_posting_read(dev_priv, intel_dp->output_reg);
 }
 
+static int intel_dp_pcon_get_frl_mask(u8 frl_bw_mask)
+{
+   int bw_gbps[] = {9, 18, 24, 32, 40, 48};
+   int i;
+
+   for (i = ARRAY_SIZE(bw_gbps) - 1; i >= 0; i--) {
+   if (frl_bw_mask & (1 << i))
+   return bw_gbps[i];
+   }
+   return 0;
+}
+
+static int intel_dp_pcon_set_frl_mask(int max_frl)
+{
+
+   switch (max_frl) {
+   case 48:
+   return DP_PCON_FRL_BW_MASK_48GBPS;
+   case 40:
+   return DP_PCON_FRL_BW_MASK_40GBPS;
+   case 32:
+   return DP_PCON_FRL_BW_MASK_32GBPS;
+   case 24:
+   return DP_PCON_FRL_BW_MASK_24GBPS;
+   case 18:
+   return DP_PCON_FRL_BW_MASK_18GBPS;
+   case 9:
+   return DP_PCON_FRL_BW_MASK_9GBPS;
+   }
+
+   return 0;
+}
+
+static int intel_dp_hdmi_sink_max_frl(struct intel_dp *intel_dp)
+{
+   struct intel_connector *intel_connector = intel_dp->attached_connector;
+   struct drm_connector *connector = &intel_connector->base;
+
+   return (connector->display_info.hdmi.max_frl_rate_per_lane *
+   connector->display_info.hdmi.max_lanes);
+}
+
+static int intel_dp_pcon_start_frl_training(struct intel_dp *intel_dp)
+{
+#define PCON_EXTENDED_TRAIN_MODE (1 > 0)
+#define PCON_CONCURRENT_MODE (1 > 0)
+#define PCON_SEQUENTIAL_MODE !PCON_CONCURRENT_MODE
+#define PCON_NORMAL_TRAIN_MODE !PCON_EXTENDED_TRAIN_MODE
+#define TIMEOUT_FRL_READY_MS 500
+#define TIMEOUT_HDMI_LINK_ACTIVE_MS 1000
+
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+   int max_frl_bw, max_pcon_frl_bw, max_edid_frl_bw, ret;
+   u8 max_frl_bw_mask = 0, frl_trained_mask;
+   bool is_active;
+
+   ret = drm_dp_pcon_reset_frl_config(&intel_dp->aux);
+   if (ret < 0)
+   return ret;
+
+   max_pcon_frl_bw = intel_dp->dfp.pcon_max_frl_bw;
+   drm_dbg(&i915->drm, "PCON max rate = %d Gbps\n", max_pcon_frl_bw);
+
+   max_edid_frl_bw = intel_dp_hdmi_sink_max_frl(intel_dp);
+   drm_dbg(&i915->drm, "Sink max rate from EDID = %d Gbps\n", 
max_edid_frl_bw);
+
+   max_frl_bw = min(max_edid_frl_bw, max_pcon_frl_bw);
+
+   if (max_frl_bw <= 0)
+   return -EINVAL;
+
+   ret = drm_dp_pcon_frl_prepare(&intel_dp->aux, false);
+   if (ret < 0)
+   return ret;
+   /* Wait for PCON to be FRL Ready */
+   wait_for(is_active = drm_dp_pcon_is_frl_ready(&intel_dp->aux) == true, 
TIMEOUT_FRL_READY_MS);
+
+   if

[PATCH v5 06/15] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon

This patch adds registers for getting DSC encoder capability for
a HDMI2.1 PCon. It also addes helper functions to configure
DSC between the PCON and HDMI2.1 sink.

v2: Corrected offset for DSC encoder bpc and minor changes.
Also added helper functions for getting pcon dsc encoder capabilities
as suggested by Uma Shankar.

v3: Only setting the DSC bits for the Protocol Convertor control
registers, avoiding overwritining color conversion bits.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar  (v2)
---
 drivers/gpu/drm/drm_dp_helper.c | 203 
 include/drm/drm_dp_helper.h | 114 ++
 2 files changed, 317 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index a1d518b3a173..689fd0d5f6c5 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -2898,3 +2898,206 @@ void drm_dp_pcon_hdmi_frl_link_error_count(struct 
drm_dp_aux *aux,
}
 }
 EXPORT_SYMBOL(drm_dp_pcon_hdmi_frl_link_error_count);
+
+/*
+ * drm_dp_pcon_enc_is_dsc_1_2 - Does PCON Encoder supports DSC 1.2
+ * @pcon_dsc_dpcd: DSC capabilities of the PCON DSC Encoder
+ *
+ * Returns true is PCON encoder is DSC 1.2 else returns false.
+ */
+bool drm_dp_pcon_enc_is_dsc_1_2(const u8 
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
+{
+   u8 buf;
+   u8 major_v, minor_v;
+
+   buf = pcon_dsc_dpcd[DP_PCON_DSC_VERSION - DP_PCON_DSC_ENCODER];
+   major_v = (buf & DP_PCON_DSC_MAJOR_MASK) >> DP_PCON_DSC_MAJOR_SHIFT;
+   minor_v = (buf & DP_PCON_DSC_MINOR_MASK) >> DP_PCON_DSC_MINOR_SHIFT;
+
+   if (major_v == 1 && minor_v == 2)
+   return true;
+
+   return false;
+}
+EXPORT_SYMBOL(drm_dp_pcon_enc_is_dsc_1_2);
+
+/*
+ * drm_dp_pcon_dsc_max_slices - Get max slices supported by PCON DSC Encoder
+ * @pcon_dsc_dpcd: DSC capabilities of the PCON DSC Encoder
+ *
+ * Returns maximum no. of slices supported by the PCON DSC Encoder.
+ */
+int drm_dp_pcon_dsc_max_slices(const u8 
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
+{
+   u8 slice_cap1, slice_cap2;
+
+   slice_cap1 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_1 - 
DP_PCON_DSC_ENCODER];
+   slice_cap2 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_2 - 
DP_PCON_DSC_ENCODER];
+
+   if (slice_cap2 & DP_PCON_DSC_24_PER_DSC_ENC)
+   return 24;
+   if (slice_cap2 & DP_PCON_DSC_20_PER_DSC_ENC)
+   return 20;
+   if (slice_cap2 & DP_PCON_DSC_16_PER_DSC_ENC)
+   return 16;
+   if (slice_cap1 & DP_PCON_DSC_12_PER_DSC_ENC)
+   return 12;
+   if (slice_cap1 & DP_PCON_DSC_10_PER_DSC_ENC)
+   return 10;
+   if (slice_cap1 & DP_PCON_DSC_8_PER_DSC_ENC)
+   return 8;
+   if (slice_cap1 & DP_PCON_DSC_6_PER_DSC_ENC)
+   return 6;
+   if (slice_cap1 & DP_PCON_DSC_4_PER_DSC_ENC)
+   return 4;
+   if (slice_cap1 & DP_PCON_DSC_2_PER_DSC_ENC)
+   return 2;
+   if (slice_cap1 & DP_PCON_DSC_1_PER_DSC_ENC)
+   return 1;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_dp_pcon_dsc_max_slices);
+
+/*
+ * drm_dp_pcon_dsc_max_slice_width() - Get max slice width for Pcon DSC encoder
+ * @pcon_dsc_dpcd: DSC capabilities of the PCON DSC Encoder
+ *
+ * Returns maximum width of the slices in pixel width i.e. no. of pixels x 320.
+ */
+int drm_dp_pcon_dsc_max_slice_width(const u8 
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
+{
+   u8 buf;
+
+   buf = pcon_dsc_dpcd[DP_PCON_DSC_MAX_SLICE_WIDTH - DP_PCON_DSC_ENCODER];
+
+   return buf * DP_DSC_SLICE_WIDTH_MULTIPLIER;
+}
+EXPORT_SYMBOL(drm_dp_pcon_dsc_max_slice_width);
+
+/*
+ * drm_dp_pcon_dsc_bpp_incr() - Get bits per pixel increment for PCON DSC 
encoder
+ * @pcon_dsc_dpcd: DSC capabilities of the PCON DSC Encoder
+ *
+ * Returns the bpp precision supported by the PCON encoder.
+ */
+int drm_dp_pcon_dsc_bpp_incr(const u8 
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
+{
+   u8 buf;
+
+   buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER];
+
+   switch (buf & DP_PCON_DSC_BPP_INCR_MASK) {
+   case DP_PCON_DSC_ONE_16TH_BPP:
+   return 16;
+   case DP_PCON_DSC_ONE_8TH_BPP:
+   return 8;
+   case DP_PCON_DSC_ONE_4TH_BPP:
+   return 4;
+   case DP_PCON_DSC_ONE_HALF_BPP:
+   return 2;
+   case DP_PCON_DSC_ONE_BPP:
+   return 1;
+   }
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_dp_pcon_dsc_bpp_incr);
+
+static
+int drm_dp_pcon_configure_dsc_enc(struct drm_dp_aux *aux, u8 pps_buf_config)
+{
+   u8 buf;
+   int ret;
+
+   ret = drm_dp_dpcd_readb(aux, DP_PROTOCOL_CONVERTER_CONTROL_2, &buf);
+   if (ret < 0)
+   return ret;
+
+   buf |= DP_PCON_ENABLE_DSC_ENCODER;
+
+   if (pps_buf_config <= DP_PCON_ENC_PPS_OVERRIDE_EN_BUFFER) {
+   buf &= ~DP_PCON_ENCODER_PPS_OVERRIDE_MASK;
+   buf |= pps_buf_config << 2;
+   }
+
+

[PATCH v5 07/15] drm/dp_helper: Add helpers to configure PCONs RGB-YCbCr Conversion

DP Specification for DP2.0 to HDMI2.1 Pcon specifies support for conversion
of colorspace from RGB to YCbCr.
https://groups.vesa.org/wg/DP/document/previewpdf/15651

This patch adds the relavant registers and helper functions to
get the capability and set the color conversion bits for rgb->ycbcr
conversion through PCON.

v2: As suggested in review comments:
-Fixed bug in the check condition in a drm_helper as reported by
 Dan Carpenter and Kernel test robot. (Dan Carepenter)
-Modified the color-conversion cap helper function, to accomodate
 BT709 and BT2020 colorspace. (Uma Shankar)
-Added spec details for the new cap for color conversion. (Uma Shankar)

Signed-off-by: Ankit Nautiyal 
---
 drivers/gpu/drm/drm_dp_helper.c | 61 +
 include/drm/drm_dp_helper.h | 19 +-
 2 files changed, 79 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 689fd0d5f6c5..9abd65c694ab 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -949,6 +949,38 @@ bool drm_dp_downstream_444_to_420_conversion(const u8 
dpcd[DP_RECEIVER_CAP_SIZE]
 }
 EXPORT_SYMBOL(drm_dp_downstream_444_to_420_conversion);
 
+/**
+ * drm_dp_downstream_rgb_to_ycbcr_conversion() - determine downstream facing 
port
+ *   RGB->YCbCr conversion 
capability
+ * @dpcd: DisplayPort configuration data
+ * @port_cap: downstream facing port capabilities
+ * @colorspc: Colorspace for which conversion cap is sought
+ *
+ * Returns: whether the downstream facing port can convert RGB->YCbCr for a 
given
+ * colorspace.
+ */
+bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 
dpcd[DP_RECEIVER_CAP_SIZE],
+  const u8 port_cap[4],
+  u8 color_spc)
+{
+   if (!drm_dp_is_branch(dpcd))
+   return false;
+
+   if (dpcd[DP_DPCD_REV] < 0x13)
+   return false;
+
+   switch (port_cap[0] & DP_DS_PORT_TYPE_MASK) {
+   case DP_DS_PORT_TYPE_HDMI:
+   if ((dpcd[DP_DOWNSTREAMPORT_PRESENT] & 
DP_DETAILED_CAP_INFO_AVAILABLE) == 0)
+   return false;
+
+   return port_cap[3] & color_spc;
+   default:
+   return false;
+   }
+}
+EXPORT_SYMBOL(drm_dp_downstream_rgb_to_ycbcr_conversion);
+
 /**
  * drm_dp_downstream_mode() - return a mode for downstream facing port
  * @dev: DRM device
@@ -3101,3 +3133,32 @@ int drm_dp_pcon_pps_override_param(struct drm_dp_aux 
*aux, u8 pps_param[6])
return 0;
 }
 EXPORT_SYMBOL(drm_dp_pcon_pps_override_param);
+
+/*
+ * drm_dp_pcon_convert_rgb_to_ycbcr() - Configure the PCon to convert RGB to 
Ycbcr
+ * @aux: displayPort AUX channel
+ * @color_spc: Color-space/s for which conversion is to be enabled, 0 for 
disable.
+ *
+ * Returns 0 on success, else returns negative error code.
+ */
+int drm_dp_pcon_convert_rgb_to_ycbcr(struct drm_dp_aux *aux, u8 color_spc)
+{
+   int ret;
+   u8 buf;
+
+   ret = drm_dp_dpcd_readb(aux, DP_PROTOCOL_CONVERTER_CONTROL_2, &buf);
+   if (ret < 0)
+   return ret;
+
+   if (color_spc & DP_CONVERSION_RGB_YCBCR_MASK)
+   buf |= (color_spc & DP_CONVERSION_RGB_YCBCR_MASK);
+   else
+   buf &= ~DP_CONVERSION_RGB_YCBCR_MASK;
+
+   ret = drm_dp_dpcd_writeb(aux, DP_PROTOCOL_CONVERTER_CONTROL_2, buf);
+   if (ret < 0)
+   return ret;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_dp_pcon_convert_rgb_to_ycbcr);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index baad87fe6b0a..e096ee98842b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -432,6 +432,17 @@ struct drm_device;
 # define DP_DS_HDMI_YCBCR444_TO_422_CONV(1 << 3)
 # define DP_DS_HDMI_YCBCR444_TO_420_CONV(1 << 4)
 
+/*
+ * VESA DP-to-HDMI PCON Specification adds caps for colorspace
+ * conversion in DFP cap DPCD 83h. Sec6.1 Table-3.
+ * Based on the available support the source can enable
+ * color conversion by writing into PROTOCOL_COVERTER_CONTROL_2
+ * DPCD 3052h.
+ */
+# define DP_DS_HDMI_BT601_RGB_YCBCR_CONV(1 << 5)
+# define DP_DS_HDMI_BT709_RGB_YCBCR_CONV(1 << 6)
+# define DP_DS_HDMI_BT2020_RGB_YCBCR_CONV   (1 << 7)
+
 #define DP_MAX_DOWNSTREAM_PORTS0x10
 
 /* DP Forward error Correction Registers */
@@ -1207,7 +1218,10 @@ struct drm_device;
 # define DP_PCON_ENC_PPS_OVERRIDE_DISABLED  0
 # define DP_PCON_ENC_PPS_OVERRIDE_EN_PARAMS 1
 # define DP_PCON_ENC_PPS_OVERRIDE_EN_BUFFER 2
-
+# define DP_CONVERSION_RGB_YCBCR_MASK (7 << 4)
+# define DP_CONVERSION_BT601_RGB_YCBCR_ENABLE  (1 << 4)
+# define DP_CONVERSION_BT709_RGB_YCBCR_ENABLE  (1 << 5)
+# define DP_CONVERSION_BT2020_RGB_YCBCR_ENABLE (1 << 6)
 
 /* PCON Downstream HDMI ERROR Status per Lane */
 #define DP_PCON_HDMI_ERROR_STATUS_LN0  0x3037
@@ -2167,5 +218

[PATCH v5 05/15] drm/dp_helper: Add support for link failure detection

From: Swati Sharma 

There are specific DPCDs defined for detecting link failures between
the PCON and HDMI sink and check the link status. In case of link
failure, PCON will communicate the same using an IRQ_HPD to source.
HDMI sink would have indicated the same to PCON using SCDC interrupt
mechanism. While source can always read final HDMI sink's status using
I2C over AUX, it is easier and faster to read the PCONs already read
HDMI sink status registers.

This patch adds the DPCDs required for link failure detection and
provide a helper function for printing error count/lane which might
help in debugging the link failure issues.

v2: Addressed comments from Uma Shankar:
-rephrased the commit message, as per the code.
-fixed styling issues
-added documentation for the helper function.

Signed-off-by: Swati Sharma 
Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/drm_dp_helper.c | 39 +
 include/drm/drm_dp_helper.h | 17 ++
 2 files changed, 56 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index f501e3890921..a1d518b3a173 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -2859,3 +2859,42 @@ int drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, 
u8 *frl_trained_mask)
return mode;
 }
 EXPORT_SYMBOL(drm_dp_pcon_hdmi_link_mode);
+
+/**
+ * drm_dp_pcon_hdmi_frl_link_error_count() - print the error count per lane
+ * during link failure between PCON and HDMI sink
+ * @aux: DisplayPort AUX channel
+ * @connector: DRM connector
+ * code.
+ **/
+
+void drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux,
+  struct drm_connector *connector)
+{
+   u8 buf, error_count;
+   int i, num_error;
+   struct drm_hdmi_info *hdmi = &connector->display_info.hdmi;
+
+   for (i = 0; i < hdmi->max_lanes; i++) {
+   if (drm_dp_dpcd_readb(aux, DP_PCON_HDMI_ERROR_STATUS_LN0 + i, 
&buf) < 0)
+   return;
+
+   error_count = buf & DP_PCON_HDMI_ERROR_COUNT_MASK;
+   switch (error_count) {
+   case DP_PCON_HDMI_ERROR_COUNT_HUNDRED_PLUS:
+   num_error = 100;
+   break;
+   case DP_PCON_HDMI_ERROR_COUNT_TEN_PLUS:
+   num_error = 10;
+   break;
+   case DP_PCON_HDMI_ERROR_COUNT_THREE_PLUS:
+   num_error = 3;
+   break;
+   default:
+   num_error = 0;
+   }
+
+   DRM_ERROR("More than %d errors since the last read for lane 
%d", num_error, i);
+   }
+}
+EXPORT_SYMBOL(drm_dp_pcon_hdmi_frl_link_error_count);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c66f570eadc2..871e8c051642 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -946,6 +946,11 @@ struct drm_device;
 # define DP_CEC_IRQ  (1 << 2)
 
 #define DP_LINK_SERVICE_IRQ_VECTOR_ESI0 0x2005   /* 1.2 */
+# define RX_CAP_CHANGED  (1 << 0)
+# define LINK_STATUS_CHANGED (1 << 1)
+# define STREAM_STATUS_CHANGED   (1 << 2)
+# define HDMI_LINK_STATUS_CHANGED(1 << 3)
+# define CONNECTED_OFF_ENTRY_REQUESTED   (1 << 4)
 
 #define DP_PSR_ERROR_STATUS 0x2006  /* XXX 1.2? */
 # define DP_PSR_LINK_CRC_ERROR  (1 << 0)
@@ -1120,6 +1125,16 @@ struct drm_device;
 #define DP_PROTOCOL_CONVERTER_CONTROL_20x3052 /* DP 1.3 */
 # define DP_CONVERSION_TO_YCBCR422_ENABLE  (1 << 0) /* DP 1.3 */
 
+/* PCON Downstream HDMI ERROR Status per Lane */
+#define DP_PCON_HDMI_ERROR_STATUS_LN0  0x3037
+#define DP_PCON_HDMI_ERROR_STATUS_LN1  0x3038
+#define DP_PCON_HDMI_ERROR_STATUS_LN2  0x3039
+#define DP_PCON_HDMI_ERROR_STATUS_LN3  0x303A
+# define DP_PCON_HDMI_ERROR_COUNT_MASK (0x7 << 0)
+# define DP_PCON_HDMI_ERROR_COUNT_THREE_PLUS   (1 << 0)
+# define DP_PCON_HDMI_ERROR_COUNT_TEN_PLUS (1 << 1)
+# define DP_PCON_HDMI_ERROR_COUNT_HUNDRED_PLUS (1 << 2)
+
 /* HDCP 1.3 and HDCP 2.2 */
 #define DP_AUX_HDCP_BKSV   0x68000
 #define DP_AUX_HDCP_RI_PRIME   0x68005
@@ -2036,5 +2051,7 @@ int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux);
 
 bool drm_dp_pcon_hdmi_link_active(struct drm_dp_aux *aux);
 int drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, u8 *frl_trained_mask);
+void drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux,
+ struct drm_connector *connector);
 
 #endif /* _DRM_DP_HELPER_H_ */
-- 
2.17.1

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[PATCH v5 04/15] drm/dp_helper: Add Helpers for FRL Link Training support for DP-HDMI2.1 PCON

This patch adds support for configuring a PCON device,
connected as a DP branched device to enable FRL Link training
with a HDMI2.1 + sink.

v2: Fixed typos and addressed other review comments from Uma Shankar.
-changed the commit message for better clarity (Uma Shankar)
-removed unnecessary argument supplied to a drm helper function.
-fixed return value for max frl read from pcon.

v3: Removed DPCD 0x3035 for MAX Sink FRL b/w as per new version of spec.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar  (v2)
---
 drivers/gpu/drm/drm_dp_helper.c | 263 
 include/drm/drm_dp_helper.h |  70 +
 2 files changed, 333 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 5bd0934004e3..f501e3890921 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -2596,3 +2596,266 @@ void drm_dp_vsc_sdp_log(const char *level, struct 
device *dev,
 #undef DP_SDP_LOG
 }
 EXPORT_SYMBOL(drm_dp_vsc_sdp_log);
+
+/**
+ * drm_dp_get_pcon_max_frl_bw() - maximum frl supported by PCON
+ * @dpcd: DisplayPort configuration data
+ * @port_cap: port capabilities
+ *
+ * Returns maximum frl bandwidth supported by PCON in GBPS,
+ * returns 0 if not supported.
+ */
+int drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
+  const u8 port_cap[4])
+{
+   int bw;
+   u8 buf;
+
+   buf = port_cap[2];
+   bw = buf & DP_PCON_MAX_FRL_BW;
+
+   switch (bw) {
+   case DP_PCON_MAX_9GBPS:
+   return 9;
+   case DP_PCON_MAX_18GBPS:
+   return 18;
+   case DP_PCON_MAX_24GBPS:
+   return 24;
+   case DP_PCON_MAX_32GBPS:
+   return 32;
+   case DP_PCON_MAX_40GBPS:
+   return 40;
+   case DP_PCON_MAX_48GBPS:
+   return 48;
+   case DP_PCON_MAX_0GBPS:
+   default:
+   return 0;
+   }
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_dp_get_pcon_max_frl_bw);
+
+/**
+ * drm_dp_pcon_frl_prepare() - Prepare PCON for FRL.
+ * @aux: DisplayPort AUX channel
+ *
+ * Returns 0 if success, else returns negative error code.
+ */
+int drm_dp_pcon_frl_prepare(struct drm_dp_aux *aux, bool enable_frl_ready_hpd)
+{
+   int ret;
+   u8 buf = DP_PCON_ENABLE_SOURCE_CTL_MODE |
+DP_PCON_ENABLE_LINK_FRL_MODE;
+
+   if (enable_frl_ready_hpd)
+   buf |= DP_PCON_ENABLE_HPD_READY;
+
+   ret = drm_dp_dpcd_writeb(aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
+
+   return ret;
+}
+EXPORT_SYMBOL(drm_dp_pcon_frl_prepare);
+
+/**
+ * drm_dp_pcon_is_frl_ready() - Is PCON ready for FRL
+ * @aux: DisplayPort AUX channel
+ *
+ * Returns true if success, else returns false.
+ */
+bool drm_dp_pcon_is_frl_ready(struct drm_dp_aux *aux)
+{
+   int ret;
+   u8 buf;
+
+   ret = drm_dp_dpcd_readb(aux, DP_PCON_HDMI_TX_LINK_STATUS, &buf);
+   if (ret < 0)
+   return false;
+
+   if (buf & DP_PCON_FRL_READY)
+   return true;
+
+   return false;
+}
+EXPORT_SYMBOL(drm_dp_pcon_is_frl_ready);
+
+/**
+ * drm_dp_pcon_frl_configure_1() - Set HDMI LINK Configuration-Step1
+ * @aux: DisplayPort AUX channel
+ * @max_frl_gbps: maximum frl bw to be configured between PCON and HDMI sink
+ * @concurrent_mode: true if concurrent mode or operation is required,
+ * false otherwise.
+ *
+ * Returns 0 if success, else returns negative error code.
+ */
+
+int drm_dp_pcon_frl_configure_1(struct drm_dp_aux *aux, int max_frl_gbps,
+   bool concurrent_mode)
+{
+   int ret;
+   u8 buf;
+
+   ret = drm_dp_dpcd_readb(aux, DP_PCON_HDMI_LINK_CONFIG_1, &buf);
+   if (ret < 0)
+   return ret;
+
+   if (concurrent_mode)
+   buf |= DP_PCON_ENABLE_CONCURRENT_LINK;
+   else
+   buf &= ~DP_PCON_ENABLE_CONCURRENT_LINK;
+
+   switch (max_frl_gbps) {
+   case 9:
+   buf |=  DP_PCON_ENABLE_MAX_BW_9GBPS;
+   break;
+   case 18:
+   buf |=  DP_PCON_ENABLE_MAX_BW_18GBPS;
+   break;
+   case 24:
+   buf |=  DP_PCON_ENABLE_MAX_BW_24GBPS;
+   break;
+   case 32:
+   buf |=  DP_PCON_ENABLE_MAX_BW_32GBPS;
+   break;
+   case 40:
+   buf |=  DP_PCON_ENABLE_MAX_BW_40GBPS;
+   break;
+   case 48:
+   buf |=  DP_PCON_ENABLE_MAX_BW_48GBPS;
+   break;
+   case 0:
+   buf |=  DP_PCON_ENABLE_MAX_BW_0GBPS;
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   ret = drm_dp_dpcd_writeb(aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
+   if (ret < 0)
+   return ret;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_dp_pcon_frl_configure_1);
+
+/**
+ * drm_dp_pcon_frl_configure_2() - Set HDMI Link configuration Step-2
+ * @aux: DisplayPort AUX channel
+ * @max_frl_mask : Max FR

[PATCH v5 03/15] drm/edid: Parse DSC1.2 cap fields from HFVSDB block

This patch parses HFVSDB fields for DSC1.2 capabilities of an
HDMI2.1 sink. These fields are required by a source to understand the
DSC capability of the sink, to set appropriate PPS parameters,
before transmitting compressed data stream.

v2: Addressed following issues as suggested by Uma Shankar:
-Added a new struct for hdmi dsc cap
-Fixed bugs in macros usage.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/drm_edid.c  | 59 +
 include/drm/drm_connector.h | 43 +++
 2 files changed, 102 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index e657c321d9e4..ca368df2e5ac 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4941,11 +4941,70 @@ static void drm_parse_hdmi_forum_vsdb(struct 
drm_connector *connector,
 
if (hf_vsdb[7]) {
u8 max_frl_rate;
+   u8 dsc_max_frl_rate;
+   u8 dsc_max_slices;
+   struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
 
DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
&hdmi->max_frl_rate_per_lane);
+   hdmi_dsc->v_1p2 = hf_vsdb[11] & DRM_EDID_DSC_1P2;
+
+   if (hdmi_dsc->v_1p2) {
+   hdmi_dsc->native_420 = hf_vsdb[11] & 
DRM_EDID_DSC_NATIVE_420;
+   hdmi_dsc->all_bpp = hf_vsdb[11] & DRM_EDID_DSC_ALL_BPP;
+
+   if (hf_vsdb[11] & DRM_EDID_DSC_16BPC)
+   hdmi_dsc->bpc_supported = 16;
+   else if (hf_vsdb[11] & DRM_EDID_DSC_12BPC)
+   hdmi_dsc->bpc_supported = 12;
+   else if (hf_vsdb[11] & DRM_EDID_DSC_10BPC)
+   hdmi_dsc->bpc_supported = 10;
+   else
+   hdmi_dsc->bpc_supported = 0;
+
+   dsc_max_frl_rate = (hf_vsdb[12] & 
DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
+   drm_get_max_frl_rate(dsc_max_frl_rate, 
&hdmi_dsc->max_lanes,
+   &hdmi_dsc->max_frl_rate_per_lane);
+   hdmi_dsc->total_chunk_kbytes = hf_vsdb[13] & 
DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
+
+   dsc_max_slices = hf_vsdb[12] & DRM_EDID_DSC_MAX_SLICES;
+   switch (dsc_max_slices) {
+   case 1:
+   hdmi_dsc->max_slices = 1;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 2:
+   hdmi_dsc->max_slices = 2;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 3:
+   hdmi_dsc->max_slices = 4;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 4:
+   hdmi_dsc->max_slices = 8;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 5:
+   hdmi_dsc->max_slices = 8;
+   hdmi_dsc->clk_per_slice = 400;
+   break;
+   case 6:
+   hdmi_dsc->max_slices = 12;
+   hdmi_dsc->clk_per_slice = 400;
+   break;
+   case 7:
+   hdmi_dsc->max_slices = 16;
+   hdmi_dsc->clk_per_slice = 400;
+   break;
+   case 0:
+   default:
+   hdmi_dsc->max_slices = 0;
+   hdmi_dsc->clk_per_slice = 0;
+   }
+   }
}
 
drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 1a3b4776b458..1922b278ffad 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -175,6 +175,46 @@ struct drm_scdc {
struct drm_scrambling scrambling;
 };
 
+/**
+ * struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink
+ *
+ * Describes the DSC support provided by HDMI 2.1 sink.
+ * The information is fetched fom additional HFVSDB blocks defined
+ * for HDMI 2.1.
+ */
+struct drm_hdmi_dsc_cap {
+   /** @v_1p2: flag for dsc1.2 version support by sink */
+   bool v_1p2;
+
+   /** @native_420: Does sink support DSC with 4:2:0 compression */
+   bool native_420;
+
+   /**
+* @all_bpp: Does sink support all

[PATCH v5 02/15] drm/edid: Parse MAX_FRL field from HFVSDB block

From: Swati Sharma 

This patch parses MAX_FRL field to get the MAX rate in Gbps that
the HDMI 2.1 panel can support in FRL mode. Source need this
field to determine the optimal rate between the source and sink
during FRL training.

v2: Fixed minor bugs, and removed extra wrapper function (Uma Shankar)

Signed-off-by: Sharma, Swati2 
Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/drm_edid.c  | 44 +
 include/drm/drm_connector.h |  6 +
 2 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 74f5a3197214..e657c321d9e4 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4851,6 +4851,41 @@ static void drm_parse_vcdb(struct drm_connector 
*connector, const u8 *db)
info->rgb_quant_range_selectable = true;
 }
 
+static
+void drm_get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 
*max_rate_per_lane)
+{
+   switch (max_frl_rate) {
+   case 1:
+   *max_lanes = 3;
+   *max_rate_per_lane = 3;
+   break;
+   case 2:
+   *max_lanes = 3;
+   *max_rate_per_lane = 6;
+   break;
+   case 3:
+   *max_lanes = 4;
+   *max_rate_per_lane = 6;
+   break;
+   case 4:
+   *max_lanes = 4;
+   *max_rate_per_lane = 8;
+   break;
+   case 5:
+   *max_lanes = 4;
+   *max_rate_per_lane = 10;
+   break;
+   case 6:
+   *max_lanes = 4;
+   *max_rate_per_lane = 12;
+   break;
+   case 0:
+   default:
+   *max_lanes = 0;
+   *max_rate_per_lane = 0;
+   }
+}
+
 static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
   const u8 *db)
 {
@@ -4904,6 +4939,15 @@ static void drm_parse_hdmi_forum_vsdb(struct 
drm_connector *connector,
}
}
 
+   if (hf_vsdb[7]) {
+   u8 max_frl_rate;
+
+   DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
+   max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
+   drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
+   &hdmi->max_frl_rate_per_lane);
+   }
+
drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);
 }
 
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index fcdc58d8b88b..1a3b4776b458 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -207,6 +207,12 @@ struct drm_hdmi_info {
 
/** @y420_dc_modes: bitmap of deep color support index */
u8 y420_dc_modes;
+
+   /** @max_frl_rate_per_lane: support fixed rate link */
+   u8 max_frl_rate_per_lane;
+
+   /** @max_lanes: supported by sink */
+   u8 max_lanes;
 };
 
 /**
-- 
2.17.1

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[PATCH v5 01/15] drm/edid: Add additional HFVSDB fields for HDMI2.1

From: Swati Sharma 

The HDMI2.1 extends HFVSDB (HDMI Forum Vendor Specific
Data block) to have fields related to newly defined methods of FRL
(Fixed Rate Link) levels, number of lanes supported, DSC Color bit
depth, VRR min/max, FVA (Fast Vactive), ALLM etc.

This patch adds the new HFVSDB fields that are required for
HDMI2.1.

v2: Minor fixes + consistent naming for DPCD register masks
(Uma Shankar)

Signed-off-by: Sharma, Swati2 
Signed-off-by: Ankit Nautiyal 
Reviewed-by: Uma Shankar 
---
 include/drm/drm_edid.h | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index e97daf6ffbb1..a158f585f658 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -229,6 +229,36 @@ struct detailed_timing {
DRM_EDID_YCBCR420_DC_36 | \
DRM_EDID_YCBCR420_DC_30)
 
+/* HDMI 2.1 additional fields */
+#define DRM_EDID_MAX_FRL_RATE_MASK 0xf0
+#define DRM_EDID_FAPA_START_LOCATION   (1 << 0)
+#define DRM_EDID_ALLM  (1 << 1)
+#define DRM_EDID_FVA   (1 << 2)
+
+/* Deep Color specific */
+#define DRM_EDID_DC_30BIT_420  (1 << 0)
+#define DRM_EDID_DC_36BIT_420  (1 << 1)
+#define DRM_EDID_DC_48BIT_420  (1 << 2)
+
+/* VRR specific */
+#define DRM_EDID_CNMVRR(1 << 3)
+#define DRM_EDID_CINEMA_VRR(1 << 4)
+#define DRM_EDID_MDELTA(1 << 5)
+#define DRM_EDID_VRR_MAX_UPPER_MASK0xc0
+#define DRM_EDID_VRR_MAX_LOWER_MASK0xff
+#define DRM_EDID_VRR_MIN_MASK  0x3f
+
+/* DSC specific */
+#define DRM_EDID_DSC_10BPC (1 << 0)
+#define DRM_EDID_DSC_12BPC (1 << 1)
+#define DRM_EDID_DSC_16BPC (1 << 2)
+#define DRM_EDID_DSC_ALL_BPP   (1 << 3)
+#define DRM_EDID_DSC_NATIVE_420(1 << 6)
+#define DRM_EDID_DSC_1P2   (1 << 7)
+#define DRM_EDID_DSC_MAX_FRL_RATE_MASK 0xf0
+#define DRM_EDID_DSC_MAX_SLICES0xf
+#define DRM_EDID_DSC_TOTAL_CHUNK_KBYTES0x3f
+
 /* ELD Header Block */
 #define DRM_ELD_HEADER_BLOCK_SIZE  4
 
-- 
2.17.1

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[PATCH v5 00/15] Add support for DP-HDMI2.1 PCON

This patch series attempts to add support for a DP-HDMI2.1 Protocol
Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata
E5 to DisplayPort_v2.0:
https://vesa.org/join-vesamemberships/member-downloads/?action=stamp&fileid=42299
The details are mentioned in:
VESA DP-to-HDMI PCON Specification Standalone Document
https://groups.vesa.org/wg/DP/document/15651

This series starts with adding support for FRL (Fixed Rate Link)
Training between the PCON and HDMI2.1 sink.
As per HDMI2.1 specification, a new data-channel or lane is added in
FRL mode, by repurposing the TMDS clock Channel. Through FRL, higher
bit-rate can be supported, ie. up to 12 Gbps/lane (48 Gbps over 4
lanes).

With these patches, the HDMI2.1 PCON can be configured to achieve FRL
training based on the maximum FRL rate supported by the panel, source
and the PCON.
The approach is to add the support for FRL training between PCON and
HDMI2.1 sink and gradually add other blocks for supporting higher
resolutions and other HDMI2.1 features, that can be supported by pcon
for the sources that do not natively support HDMI2.1.

This is done before the DP Link training between the source and PCON
is started. In case of FRL training is not achieved, the PCON will
work in the regular TMDS mode, without HDMI2.1 feature support.
Any interruption in FRL training between the PCON and HDMI2.1 sink is
notified through IRQ_HPD. On receiving the IRQ_HPD the concerned DPCD
registers are read and FRL training is re-attempted.

Currently, we have tested the FRL training and are able to enable 4K
display with TGL Platform + Realtek PCON RTD2173 with HDMI2.1 supporting
panel.

v2: Addressed review comments and re-organized patches as suggested in
comments on RFC patches.

v3: Addressed review comments on previous version.

v4: Added support for RGB->YCBCR conversion through PCON

v5: Addressed review comments on previous version.

Ankit Nautiyal (11):
  drm/edid: Parse DSC1.2 cap fields from HFVSDB block
  drm/dp_helper: Add Helpers for FRL Link Training support for
DP-HDMI2.1 PCON
  drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon
  drm/dp_helper: Add helpers to configure PCONs RGB-YCbCr Conversion
  drm/i915: Capture max frl rate for PCON in dfp cap structure
  drm/i915: Add support for starting FRL training for HDMI2.1 via PCON
  drm/i915: Check for FRL training before DP Link training
  drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder
  drm/i915: Add helper functions for calculating DSC parameters for
HDMI2.1
  drm/i915/display: Configure PCON for DSC1.1 to DSC1.2 encoding
  drm/i915/display: Let PCON convert from RGB to YUV if it can

Swati Sharma (4):
  drm/edid: Add additional HFVSDB fields for HDMI2.1
  drm/edid: Parse MAX_FRL field from HFVSDB block
  drm/dp_helper: Add support for link failure detection
  drm/i915: Add support for enabling link status and recovery

 drivers/gpu/drm/drm_dp_helper.c   | 566 ++
 drivers/gpu/drm/drm_edid.c| 103 
 drivers/gpu/drm/i915/display/intel_ddi.c  |   6 +-
 .../drm/i915/display/intel_display_types.h|  10 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 438 +-
 drivers/gpu/drm/i915/display/intel_dp.h   |   7 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c | 233 +++
 drivers/gpu/drm/i915/display/intel_hdmi.h |   7 +
 include/drm/drm_connector.h   |  49 ++
 include/drm/drm_dp_helper.h   | 218 +++
 include/drm/drm_edid.h|  30 +
 11 files changed, 1645 insertions(+), 22 deletions(-)

-- 
2.17.1

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Re: [PATCH v5 15/19] drm/msm: Remove prototypes for non-existing functions

On Wed, Mar 13, 2019 at 02:00:28AM +0200, Laurent Pinchart wrote:
> On Thu, Feb 21, 2019 at 12:39:24PM +0200, Laurent Pinchart wrote:
> > Forgot to CC Rob, sorry about that.
> 
> Rob, could you take this in your tree ?

Gentle ping.

> > On Thu, Feb 21, 2019 at 12:32:08PM +0200, Laurent Pinchart wrote:
> > > The msm_atomic_state_clear() and msm_atomic_state_free() functions are
> > > declared but never defined. Remove their prototypes.
> > > 
> > > Signed-off-by: Laurent Pinchart 
> > > 
> > > ---
> > >  drivers/gpu/drm/msm/msm_drv.h | 2 --
> > >  1 file changed, 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> > > index 4e0c6c2f9a86..8f0287e75efb 100644
> > > --- a/drivers/gpu/drm/msm/msm_drv.h
> > > +++ b/drivers/gpu/drm/msm/msm_drv.h
> > > @@ -240,8 +240,6 @@ int msm_atomic_prepare_fb(struct drm_plane *plane,
> > > struct drm_plane_state *new_state);
> > >  void msm_atomic_commit_tail(struct drm_atomic_state *state);
> > >  struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
> > > -void msm_atomic_state_clear(struct drm_atomic_state *state);
> > > -void msm_atomic_state_free(struct drm_atomic_state *state);
> > >  
> > >  int msm_gem_init_vma(struct msm_gem_address_space *aspace,
> > >   struct msm_gem_vma *vma, int npages);

-- 
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[PATCH v2 09/10] drm: uapi: legacy: Use SPDX in DRM drivers uAPI headers

The legacy DRM drivers uAPI headers are licensed under the MIT license,
and carry copies of the license with slight variations. Replace them
with SPDX headers.

Signed-off-by: Laurent Pinchart 
---
 include/uapi/drm/mga_drm.h| 20 +---
 include/uapi/drm/savage_drm.h | 20 +---
 include/uapi/drm/sis_drm.h| 21 +
 include/uapi/drm/via_drm.h| 20 +---
 4 files changed, 4 insertions(+), 77 deletions(-)

diff --git a/include/uapi/drm/mga_drm.h b/include/uapi/drm/mga_drm.h
index 8c4337548ab5..4415efefe0cf 100644
--- a/include/uapi/drm/mga_drm.h
+++ b/include/uapi/drm/mga_drm.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: MIT */
 /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
  * Created: Tue Jan 25 01:50:01 1999 by jhartm...@precisioninsight.com
  *
@@ -5,25 +6,6 @@
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  * All rights reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
  * Authors:
  *Jeff Hartmann 
  *Keith Whitwell 
diff --git a/include/uapi/drm/savage_drm.h b/include/uapi/drm/savage_drm.h
index 0f6eddef74aa..bd5e74348db4 100644
--- a/include/uapi/drm/savage_drm.h
+++ b/include/uapi/drm/savage_drm.h
@@ -1,26 +1,8 @@
+/* SPDX-License-Identifier: MIT */
 /* savage_drm.h -- Public header for the savage driver
  *
  * Copyright 2004  Felix Kuehling
  * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
- * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #ifndef __SAVAGE_DRM_H__
diff --git a/include/uapi/drm/sis_drm.h b/include/uapi/drm/sis_drm.h
index 3e3f7e989e0b..9f7eb13b1975 100644
--- a/include/uapi/drm/sis_drm.h
+++ b/include/uapi/drm/sis_drm.h
@@ -1,27 +1,8 @@
+/* SPDX-License-Identifier: MIT */
 /* sis_drv.h -- Private header for sis driver -*- linux-c -*- */
 /*
  * Copyright 2005 Eric Anholt
  * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER I

[PATCH v2 05/10] drm: uapi: nouveau: Use SPDX in DRM drivers uAPI headers

The Nouveau DRM driver uAPI header is licensed under the MIT license,
and carries a copy of the license with slight variations. Replace it
with an SPDX header.

Signed-off-by: Laurent Pinchart 
---
 include/uapi/drm/nouveau_drm.h | 20 +---
 1 file changed, 1 insertion(+), 19 deletions(-)

diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h
index 853a327433d3..555283b49080 100644
--- a/include/uapi/drm/nouveau_drm.h
+++ b/include/uapi/drm/nouveau_drm.h
@@ -1,25 +1,7 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright 2005 Stephane Marchesin.
  * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #ifndef __NOUVEAU_DRM_H__
-- 
Regards,

Laurent Pinchart

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[PATCH v2 10/10] drm: uapi: Remove copies of GPL license text from headers

Several DRM drivers uAPI headers that are licensed under the GPL carry
both an SPDX header and a copy of the license text. Drop the latter.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Daniel Vetter 
---
 include/uapi/drm/armada_drm.h  |  4 
 include/uapi/drm/etnaviv_drm.h | 12 
 include/uapi/drm/exynos_drm.h  |  5 -
 include/uapi/drm/omap_drm.h| 12 
 4 files changed, 33 deletions(-)

diff --git a/include/uapi/drm/armada_drm.h b/include/uapi/drm/armada_drm.h
index af1c14c837c5..f711e63a9758 100644
--- a/include/uapi/drm/armada_drm.h
+++ b/include/uapi/drm/armada_drm.h
@@ -2,10 +2,6 @@
 /*
  * Copyright (C) 2012 Russell King
  *  With inspiration from the i915 driver
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
  */
 #ifndef DRM_ARMADA_IOCTL_H
 #define DRM_ARMADA_IOCTL_H
diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h
index 09d0df8b71c5..e23e0f885655 100644
--- a/include/uapi/drm/etnaviv_drm.h
+++ b/include/uapi/drm/etnaviv_drm.h
@@ -1,18 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
 /*
  * Copyright (C) 2015 Etnaviv Project
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see .
  */
 
 #ifndef __ETNAVIV_DRM_H__
diff --git a/include/uapi/drm/exynos_drm.h b/include/uapi/drm/exynos_drm.h
index a51aa1c618c1..a96fa566433c 100644
--- a/include/uapi/drm/exynos_drm.h
+++ b/include/uapi/drm/exynos_drm.h
@@ -6,11 +6,6 @@
  * Inki Dae 
  * Joonyoung Shim 
  * Seung-Woo Kim 
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
  */
 
 #ifndef _UAPI_EXYNOS_DRM_H_
diff --git a/include/uapi/drm/omap_drm.h b/include/uapi/drm/omap_drm.h
index 5a142fad473c..b51dad32122d 100644
--- a/include/uapi/drm/omap_drm.h
+++ b/include/uapi/drm/omap_drm.h
@@ -4,18 +4,6 @@
  *
  * Copyright (C) 2011 Texas Instruments
  * Author: Rob Clark 
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see .
  */
 
 #ifndef __OMAP_DRM_H__
-- 
Regards,

Laurent Pinchart

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[PATCH v2 06/10] drm: uapi: redhat: Use SPDX in DRM drivers uAPI headers

The DRM drivers uAPI headers are licensed under the MIT license, and
carry copies of the license with slight variations. Replace them with
SPDX headers for headers copyrighted by Red Hat.

Signed-off-by: Laurent Pinchart 
---
 include/uapi/drm/msm_drm.h | 20 +---
 include/uapi/drm/qxl_drm.h | 20 +---
 include/uapi/drm/virtgpu_drm.h | 20 +---
 3 files changed, 3 insertions(+), 57 deletions(-)

diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
index a6c1f3eb2623..fa8c39491de5 100644
--- a/include/uapi/drm/msm_drm.h
+++ b/include/uapi/drm/msm_drm.h
@@ -1,25 +1,7 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright (C) 2013 Red Hat
  * Author: Rob Clark 
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 
THE
- * SOFTWARE.
  */
 
 #ifndef __MSM_DRM_H__
diff --git a/include/uapi/drm/qxl_drm.h b/include/uapi/drm/qxl_drm.h
index 880999d2d863..9fbf97ad7272 100644
--- a/include/uapi/drm/qxl_drm.h
+++ b/include/uapi/drm/qxl_drm.h
@@ -1,25 +1,7 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright 2013 Red Hat
  * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
  */
 #ifndef QXL_DRM_H
 #define QXL_DRM_H
diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h
index b9ec26e9c646..c973fde6625a 100644
--- a/include/uapi/drm/virtgpu_drm.h
+++ b/include/uapi/drm/virtgpu_drm.h
@@ -1,25 +1,7 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright 2013 Red Hat
  * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
  */
 #ifndef VIRTGPU_DRM_H
 #define VIRTGPU_DRM_H
-- 
Regards,

Laurent Pinchart

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[PATCH v2 08/10] drm: uapi: vmware: Use SPDX in DRM drivers uAPI headers

The VMware DRM driver uAPI header is licensed under the MIT license, and
carries a copy of the license with slight variations. Replace it with an
SPDX header.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Roland Scheidegger 
---
 include/uapi/drm/vmwgfx_drm.h | 21 +
 1 file changed, 1 insertion(+), 20 deletions(-)

diff --git a/include/uapi/drm/vmwgfx_drm.h b/include/uapi/drm/vmwgfx_drm.h
index 02e917507479..728e432f09a1 100644
--- a/include/uapi/drm/vmwgfx_drm.h
+++ b/include/uapi/drm/vmwgfx_drm.h
@@ -1,28 +1,9 @@
+/* SPDX-License-Identifier: MIT */
 /**
  *
  * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
  * All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
  **/
 
 #ifndef __VMWGFX_DRM_H__
-- 
Regards,

Laurent Pinchart

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[PATCH v2 03/10] drm: uapi: broadcom: Use SPDX in DRM drivers uAPI headers

The Broadcom DRM drivers uAPI headers are licensed under the MIT
license, and carry copies of the license with slight variations. Replace
them with SPDX headers.

Signed-off-by: Laurent Pinchart 
---
 include/uapi/drm/v3d_drm.h | 20 +---
 include/uapi/drm/vc4_drm.h | 20 +---
 2 files changed, 2 insertions(+), 38 deletions(-)

diff --git a/include/uapi/drm/v3d_drm.h b/include/uapi/drm/v3d_drm.h
index 1ce746e228d9..7895fb9bc018 100644
--- a/include/uapi/drm/v3d_drm.h
+++ b/include/uapi/drm/v3d_drm.h
@@ -1,24 +1,6 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright © 2014-2018 Broadcom
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
  */
 
 #ifndef _V3D_DRM_H_
diff --git a/include/uapi/drm/vc4_drm.h b/include/uapi/drm/vc4_drm.h
index 2cac6277a1d7..14b9a2186eae 100644
--- a/include/uapi/drm/vc4_drm.h
+++ b/include/uapi/drm/vc4_drm.h
@@ -1,24 +1,6 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright © 2014-2015 Broadcom
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
  */
 
 #ifndef _UAPI_VC4_DRM_H_
-- 
Regards,

Laurent Pinchart

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[PATCH v2 07/10] drm: uapi: tegra: Use SPDX in DRM drivers uAPI headers

The Nvidia Tegra DRM driver uAPI header is licensed under the MIT
license, and carries a copy of the license with slight variations.
Replace it with an SPDX header.

Signed-off-by: Laurent Pinchart 
---
 include/uapi/drm/tegra_drm.h | 19 +--
 1 file changed, 1 insertion(+), 18 deletions(-)

diff --git a/include/uapi/drm/tegra_drm.h b/include/uapi/drm/tegra_drm.h
index c4df3c3668b3..98c2f17aa7de 100644
--- a/include/uapi/drm/tegra_drm.h
+++ b/include/uapi/drm/tegra_drm.h
@@ -1,23 +1,6 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #ifndef _UAPI_TEGRA_DRM_H_
-- 
Regards,

Laurent Pinchart

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[PATCH v2 04/10] drm: uapi: intel: Use SPDX in DRM drivers uAPI headers

The Intel DRM drivers uAPI headers are licensed under the MIT license,
and carry copies of the license with slight variations. Replace them
with SPDX headers.

Signed-off-by: Laurent Pinchart 
---
 include/uapi/drm/i915_drm.h | 22 +-
 include/uapi/drm/vgem_drm.h | 22 +-
 2 files changed, 2 insertions(+), 42 deletions(-)

diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index fa1f3d62f9a6..995d441a2147 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1,27 +1,7 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
  */
 
 #ifndef _UAPI_I915_DRM_H_
diff --git a/include/uapi/drm/vgem_drm.h b/include/uapi/drm/vgem_drm.h
index bf66f5db6da8..965e1ad00dcb 100644
--- a/include/uapi/drm/vgem_drm.h
+++ b/include/uapi/drm/vgem_drm.h
@@ -1,27 +1,7 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright 2016 Intel Corporation
  * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
  */
 
 #ifndef _UAPI_VGEM_DRM_H_
-- 
Regards,

Laurent Pinchart

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[PATCH v2 02/10] drm: uapi: amd: Use SPDX in DRM drivers uAPI headers

The AMD DRM drivers uAPI headers are licensed under the MIT license,
and carry copies of the license with slight variations. Replace them
with SPDX headers.

Signed-off-by: Laurent Pinchart 
---
 include/uapi/drm/amdgpu_drm.h | 19 +--
 include/uapi/drm/r128_drm.h   | 20 +---
 include/uapi/drm/radeon_drm.h | 20 +---
 3 files changed, 3 insertions(+), 56 deletions(-)

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 7fb9c09ee93f..8ca36b088d71 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: MIT */
 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
  *
  * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
@@ -5,24 +6,6 @@
  * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
  * Copyright 2014 Advanced Micro Devices, Inc.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
  * Authors:
  *Kevin E. Martin 
  *Gareth Hughes 
diff --git a/include/uapi/drm/r128_drm.h b/include/uapi/drm/r128_drm.h
index 690e9c62f510..c426e6a1c843 100644
--- a/include/uapi/drm/r128_drm.h
+++ b/include/uapi/drm/r128_drm.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: MIT */
 /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
  * Created: Wed Apr  5 19:24:19 2000 by ke...@precisioninsight.com
  */
@@ -6,25 +7,6 @@
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  * All rights reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
  * Authors:
  *Gareth Hughes 
  *Kevin E. Martin 
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index 490a59cc4532..b5c4ef813a9e 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: MIT */
 /* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
  *
  * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
@@ -5,25 +6,6 @@
  * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All rights reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMIT

[PATCH v2 01/10] drm: uapi: Use SPDX in DRM core uAPI headers

The DRM core uAPI headers are licensed under the MIT license, and carry
copies of the license with slight variations. Replace them with SPDX
headers.

Following a discussion with Daniel Vetter on this topic, add a
clarification in the drm-uapi.rst file that independent closed-source
userspace implementations of software using the DRM uAPI are accepted,
as allowed by the MIT license.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Greg Kroah-Hartman 
Reviewed-by: Thomas Gleixner 
Reviewed-by: Daniel Vetter 
---
 Documentation/gpu/drm-uapi.rst |  4 
 include/uapi/drm/drm.h | 20 +---
 include/uapi/drm/drm_fourcc.h  | 20 +---
 include/uapi/drm/drm_mode.h| 19 +--
 include/uapi/drm/drm_sarea.h   | 20 +---
 5 files changed, 8 insertions(+), 75 deletions(-)

diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst
index 7dce175f6d75..96ea55200f04 100644
--- a/Documentation/gpu/drm-uapi.rst
+++ b/Documentation/gpu/drm-uapi.rst
@@ -109,6 +109,10 @@ is already rather painful for the DRM subsystem, with 
multiple different uAPIs
 for the same thing co-existing. If we add a few more complete mistakes into the
 mix every year it would be entirely unmanageable.
 
+The DRM subsystem has however no concern with independent closed-source
+userspace implementations. To officialize that position, the DRM uAPI headers
+are covered by the MIT license.
+
 .. _drm_render_node:
 
 Render nodes
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 808b48a93330..14d57361e580 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: MIT */
 /**
  * \file drm.h
  * Header for the Direct Rendering Manager
@@ -12,25 +13,6 @@
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #ifndef _DRM_H_
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 723c8e23ca87..51e2c8a825a3 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -1,24 +1,6 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright 2011 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #ifndef DRM_FOURCC_H
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index b49fbf2bdc40..21dfec63b338 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -1,27 +1,10 @@
+/* SPDX-License-Identifier: MIT */
 /*
  * Copyright (c) 2007 Dave Airlie 
  * Copyright (c) 2007 Jakob Bornecrantz 
  * Copyright (c) 2008 Red Hat Inc.
  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
  * Copyright (c) 2007-2008 Inte

Re: [PATCH 2/3] drm: uapi: Use SPDX in DRM drivers uAPI headers

Hi Christian,

On Fri, Jul 17, 2020 at 04:05:42PM +0200, Christian König wrote:
> Am 17.07.20 um 04:27 schrieb Laurent Pinchart:
> > On Mon, Jun 22, 2020 at 11:29:33AM +0200, Daniel Vetter wrote:
> >> On Mon, Jun 22, 2020 at 09:58:44AM +0200, Christian König wrote:
> >>> Am 21.06.20 um 04:07 schrieb Laurent Pinchart:
>  Most of the DRM drivers uAPI headers are licensed under the MIT license,
>  and carry copies of the license with slight variations. Replace them
>  with SPDX headers.
> >>> My personal opinion is that this is a really good idea, but my 
> >>> professional
> >>> is that we need the acknowledgment from our legal department for this.
> >> I think official ack from amd on first patch, especially the .rst snippet,
> >> would be really good indeed.
> > Any update on this one ?
> 
> Sorry totally forgot to forward this because I was waiting for split up 
> patches.
> 
> Going to do so right now.

Has there been any update ? :-)

> >>> Please separate that change into one for each driver/company/maintainer.
> >>> Amdgpu, radeon, r128 can be one for example.
> >
> > I'll do so.
> >
> >> You can leave all the other legacy drivers in one patch (mga, savage, sis,
> >> via), since there's likely no one around anymore and will just boil down
> >> to drm maintainer ack from Dave&me.
> >>
>  Signed-off-by: Laurent Pinchart 
>  
>  ---
> include/uapi/drm/amdgpu_drm.h  | 19 +--
> include/uapi/drm/i915_drm.h| 22 +-
> include/uapi/drm/mga_drm.h | 20 +---
> include/uapi/drm/msm_drm.h | 20 +---
> include/uapi/drm/nouveau_drm.h | 20 +---
> include/uapi/drm/qxl_drm.h | 20 +---
> include/uapi/drm/r128_drm.h| 20 +---
> include/uapi/drm/radeon_drm.h  | 20 +---
> include/uapi/drm/savage_drm.h  | 20 +---
> include/uapi/drm/sis_drm.h | 21 +
> include/uapi/drm/tegra_drm.h   | 19 +--
> include/uapi/drm/v3d_drm.h | 20 +---
> include/uapi/drm/vc4_drm.h | 20 +---
> include/uapi/drm/vgem_drm.h| 22 +-
> include/uapi/drm/via_drm.h | 20 +---
> include/uapi/drm/virtgpu_drm.h | 20 +---
> include/uapi/drm/vmwgfx_drm.h  | 21 +
> 17 files changed, 17 insertions(+), 327 deletions(-)
> 
>  diff --git a/include/uapi/drm/amdgpu_drm.h 
>  b/include/uapi/drm/amdgpu_drm.h
>  index 4e873dcbe68f..c6adda72bec7 100644
>  --- a/include/uapi/drm/amdgpu_drm.h
>  +++ b/include/uapi/drm/amdgpu_drm.h
>  @@ -1,3 +1,4 @@
>  +/* SPDX-License-Identifier: MIT */
> /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
>  *
>  * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
>  @@ -5,24 +6,6 @@
>  * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
>  * Copyright 2014 Advanced Micro Devices, Inc.
>  *
>  - * Permission is hereby granted, free of charge, to any person 
>  obtaining a
>  - * copy of this software and associated documentation files (the 
>  "Software"),
>  - * to deal in the Software without restriction, including without 
>  limitation
>  - * the rights to use, copy, modify, merge, publish, distribute, 
>  sublicense,
>  - * and/or sell copies of the Software, and to permit persons to whom the
>  - * Software is furnished to do so, subject to the following conditions:
>  - *
>  - * The above copyright notice and this permission notice shall be 
>  included in
>  - * all copies or substantial portions of the Software.
>  - *
>  - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
>  EXPRESS OR
>  - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
>  MERCHANTABILITY,
>  - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT 
>  SHALL
>  - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, 
>  DAMAGES OR
>  - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>  - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>  - * OTHER DEALINGS IN THE SOFTWARE.
>  - *
>  * Authors:
>  *Kevin E. Martin 
>  *Gareth Hughes 
>  diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
>  index 14b67cd6b54b..c29e3acb3026 100644
>  --- a/include/uapi/drm/i915_drm.h
>  +++ b/include/uapi/drm/i915_drm.h
>  @@ -1,27 +1,7 @@
>  +/* SPDX-License-Identifier: MIT */
> /*
>  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
>  * All Rights Reserved.
>  -

Re: [PATCH 14/65] drm/rcar-du: Annotate dma-fence critical section in commit path

Hi Daniel,

Thank you for the patch.

On Fri, Oct 23, 2020 at 02:21:25PM +0200, Daniel Vetter wrote:
> Ends right after drm_atomic_helper_commit_hw_done(), absolutely
> nothing fancy going on here.
> 
> Signed-off-by: Daniel Vetter 
> Cc: Laurent Pinchart 
> Cc: Kieran Bingham 
> Cc: linux-renesas-...@vger.kernel.org

I'm lacking context here, there's only one instance of a call to
dma_fence_begin_signalling() in the subsystem, and no cover letter in
the series to explain what's going on. Some information would help
reviewing the patch :-)

Also, could you mention in the cover letter for the next version if you
will merge the whole series, or expect individual maintainers to pick up
the relevant patches ?

> ---
>  drivers/gpu/drm/rcar-du/rcar_du_kms.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
> b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> index 72dda446355f..8d91140151cc 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> @@ -441,6 +441,7 @@ static void rcar_du_atomic_commit_tail(struct 
> drm_atomic_state *old_state)
>   struct drm_crtc_state *crtc_state;
>   struct drm_crtc *crtc;
>   unsigned int i;
> + bool fence_cookie = dma_fence_begin_signalling();
>  
>   /*
>* Store RGB routing to DPAD0 and DPAD1, the hardware will be configured
> @@ -467,6 +468,7 @@ static void rcar_du_atomic_commit_tail(struct 
> drm_atomic_state *old_state)
>   drm_atomic_helper_commit_modeset_enables(dev, old_state);
>  
>   drm_atomic_helper_commit_hw_done(old_state);
> + dma_fence_end_signalling(fence_cookie);
>   drm_atomic_helper_wait_for_flip_done(dev, old_state);
>  
>   drm_atomic_helper_cleanup_planes(dev, old_state);

-- 
Regards,

Laurent Pinchart
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[PATCH] drm: rcar-du: Fix leak of CMM platform device reference

The device references acquired by of_find_device_by_node() are not
released by the driver. Fix this by registering a cleanup action.

Fixes: 8de707aeb452 ("drm: rcar-du: kms: Initialize CMM instances")
Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/rcar-du/rcar_du_kms.c | 20 ++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 92dfa3d4c011..7070f3c9b529 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -721,6 +722,8 @@ static int rcar_du_cmm_init(struct rcar_du_device *rcdu)
 
of_node_put(cmm);
 
+   rcdu->cmms[i] = pdev;
+
/*
 * -ENODEV is used to report that the CMM config option is
 * disabled: return 0 and let the DU continue probing.
@@ -739,13 +742,22 @@ static int rcar_du_cmm_init(struct rcar_du_device *rcdu)
"Failed to create device link to CMM%u\n", i);
return -EINVAL;
}
-
-   rcdu->cmms[i] = pdev;
}
 
return 0;
 }
 
+static void rcar_du_modeset_cleanup(struct drm_device *dev, void *res)
+{
+   struct rcar_du_device *rcdu = to_rcar_du_device(dev);
+   unsigned int i;
+
+   for (i = 0; i < ARRAY_SIZE(rcdu->cmms); ++i) {
+   if (rcdu->cmms[i])
+   put_device(&rcdu->cmms[i]->dev);
+   }
+}
+
 int rcar_du_modeset_init(struct rcar_du_device *rcdu)
 {
static const unsigned int mmio_offsets[] = {
@@ -766,6 +778,10 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
if (ret)
return ret;
 
+   ret = drmm_add_action(&rcdu->ddev, rcar_du_modeset_cleanup, NULL);
+   if (ret)
+   return ret;
+
dev->mode_config.min_width = 0;
dev->mode_config.min_height = 0;
dev->mode_config.normalize_zpos = true;
-- 
Regards,

Laurent Pinchart

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Re: [kbuild-all] Re: [PATCH v2 2/2] drm: automatic legacy gamma support

2020-12-15 Thread Philip Li

On Mon, Dec 14, 2020 at 09:49:17PM +0300, Dan Carpenter wrote:
> On Sat, Dec 12, 2020 at 04:54:45PM +0800, Philip Li wrote:
> > On Fri, Dec 11, 2020 at 04:42:00PM +0200, Ville Syrjälä wrote:
> > > On Fri, Dec 11, 2020 at 01:24:49PM +0200, Tomi Valkeinen wrote:
> > > > On 10/12/2020 20:06, kernel test robot wrote:
> > > > > Hi Tomi,
> > > > > 
> > > > > I love your patch! Perhaps something to improve:
> > > > > 
> > > > > [auto build test WARNING on drm-intel/for-linux-next]
> > > > > [also build test WARNING on linus/master v5.10-rc7]
> > > > > [cannot apply to drm-tip/drm-tip anholt/for-next next-20201210]
> > > > > [If your patch is applied to the wrong git tree, kindly drop us a 
> > > > > note.
> > > > > And when submitting patch, we suggest to use '--base' as documented in
> > > > > https://git-scm.com/docs/git-format-patch ]
> > > > > 
> > > > > url:
> > > > > https://github.com/0day-ci/linux/commits/Tomi-Valkeinen/drm-fix-and-cleanup-legacy-gamma-support/20201208-215917
> > > > >  
> > > > > base:   git://anongit.freedesktop.org/drm-intel for-linux-next
> > > > > config: i386-randconfig-m021-20201209 (attached as .config)
> > > > > compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
> > > > > 
> > > > > If you fix the issue, kindly add following tag as appropriate
> > > > > Reported-by: kernel test robot 
> > > > > 
> > > > > New smatch warnings:
> > > > > drivers/gpu/drm/drm_color_mgmt.c:307 drm_crtc_legacy_gamma_set() 
> > > > > error: potential null dereference 'blob'.  (drm_property_create_blob 
> > > > > returns null)
> > > > 
> > > > I don't see how this could happen. There's no code path I see where 
> > > > drm_property_create_blob could
> > > > return null...
> > > 
> > > IIRC we've received multiple similar nonsense reports from lkp, but
> > > no explanation why it thinks it could ever be null. Hmm, maybe there
> > > is a codepath somewhere that has a null check on the return value?
> > hi Dan, can you help on this to share some idea?
> > 
> > The original report is at
> > https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org/thread/F3MVBRGF2R4URBNLNY3GMTSDZUCBX6RF/
> >  
> 
> Thanks, Philip.  I've pushed a fix for this.
Thanks Dan for this, we will pack the new code to run in the robot.

> 
> It didn't show up if you had the cross function DB built, so it's not
> something I would see in my testing.
Got it, do you recommend this "cross function DB" is necessary for us to
setup or not a must?

Thanks

> 
> regards,
> dan carpenter
> 
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Re: [PATCH] drm: rcar-du: Fix the return check of of_parse_phandle and of_find_device_by_node

On Wed, Dec 16, 2020 at 03:00:43AM +0200, Laurent Pinchart wrote:
> Hi Wang,
> 
> Thank you for the patch.
> 
> On Wed, Nov 11, 2020 at 11:14:52AM +0800, Wang Xiaojun wrote:
> > of_parse_phandle and of_find_device_by_node may return NULL
> > which cannot be checked by IS_ERR.
> > 
> > Signed-off-by: Wang Xiaojun 
> > Reported-by: Hulk Robot 
> 
> Reviewed-by: Laurent Pinchart 
> 
> and queued in my tree for v5.12.
> 
> > ---
> >  drivers/gpu/drm/rcar-du/rcar_du_kms.c | 8 
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
> > b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> > index 72dda446355f..fcfddf7ad3f3 100644
> > --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> > +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> > @@ -700,10 +700,10 @@ static int rcar_du_cmm_init(struct rcar_du_device 
> > *rcdu)
> > int ret;
> >  
> > cmm = of_parse_phandle(np, "renesas,cmms", i);
> > -   if (IS_ERR(cmm)) {
> > +   if (!cmm) {
> > dev_err(rcdu->dev,
> > "Failed to parse 'renesas,cmms' property\n");
> > -   return PTR_ERR(cmm);
> > +   return -ENODEV;

Actually, this should return -EINVAL, as this error really shouldn't
happen. Same below. I'll update this, no need to resend a new version.

> > }
> >  
> > if (!of_device_is_available(cmm)) {
> > @@ -713,10 +713,10 @@ static int rcar_du_cmm_init(struct rcar_du_device 
> > *rcdu)
> > }
> >  
> > pdev = of_find_device_by_node(cmm);
> > -   if (IS_ERR(pdev)) {
> > +   if (!pdev) {
> > dev_err(rcdu->dev, "No device found for CMM%u\n", i);
> > of_node_put(cmm);
> > -   return PTR_ERR(pdev);
> > +   return -ENODEV;
> > }
> >  
> > of_node_put(cmm);

-- 
Regards,

Laurent Pinchart
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Re: [PATCH] drm: rcar-du: Fix the return check of of_parse_phandle and of_find_device_by_node

Hi Wang,

Thank you for the patch.

On Wed, Nov 11, 2020 at 11:14:52AM +0800, Wang Xiaojun wrote:
> of_parse_phandle and of_find_device_by_node may return NULL
> which cannot be checked by IS_ERR.
> 
> Signed-off-by: Wang Xiaojun 
> Reported-by: Hulk Robot 

Reviewed-by: Laurent Pinchart 

and queued in my tree for v5.12.

> ---
>  drivers/gpu/drm/rcar-du/rcar_du_kms.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
> b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> index 72dda446355f..fcfddf7ad3f3 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
> @@ -700,10 +700,10 @@ static int rcar_du_cmm_init(struct rcar_du_device *rcdu)
>   int ret;
>  
>   cmm = of_parse_phandle(np, "renesas,cmms", i);
> - if (IS_ERR(cmm)) {
> + if (!cmm) {
>   dev_err(rcdu->dev,
>   "Failed to parse 'renesas,cmms' property\n");
> - return PTR_ERR(cmm);
> + return -ENODEV;
>   }
>  
>   if (!of_device_is_available(cmm)) {
> @@ -713,10 +713,10 @@ static int rcar_du_cmm_init(struct rcar_du_device *rcdu)
>   }
>  
>   pdev = of_find_device_by_node(cmm);
> - if (IS_ERR(pdev)) {
> + if (!pdev) {
>   dev_err(rcdu->dev, "No device found for CMM%u\n", i);
>   of_node_put(cmm);
> - return PTR_ERR(pdev);
> + return -ENODEV;
>   }
>  
>   of_node_put(cmm);

-- 
Regards,

Laurent Pinchart
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[PATCH v2 4/4] drm: rcar-du: Use drm_bridge_connector_init() helper

Use the drm_bridge_connector_init() helper to create a drm_connector for
each output, instead of relying on the bridge drivers doing so. Attach
the bridges with the DRM_BRIDGE_ATTACH_NO_CONNECTOR flag to instruct
them not to create a connector.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 25 ++-
 1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c 
b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
index ba8c6038cd63..10a66091391a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
@@ -11,6 +11,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -61,6 +62,7 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
 struct device_node *enc_node)
 {
struct rcar_du_encoder *renc;
+   struct drm_connector *connector;
struct drm_bridge *bridge;
int ret;
 
@@ -122,9 +124,22 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
if (ret)
return ret;
 
-   /*
-* Attach the bridge to the encoder. The bridge will create the
-* connector.
-*/
-   return drm_bridge_attach(&renc->base, bridge, NULL, 0);
+   /* Attach the bridge to the encoder. */
+   ret = drm_bridge_attach(&renc->base, bridge, NULL,
+   DRM_BRIDGE_ATTACH_NO_CONNECTOR);
+   if (ret) {
+   dev_err(rcdu->dev, "failed to attach bridge for output %u\n",
+   output);
+   return ret;
+   }
+
+   /* Create the connector for the chain of bridges. */
+   connector = drm_bridge_connector_init(&rcdu->ddev, &renc->base);
+   if (IS_ERR(connector)) {
+   dev_err(rcdu->dev,
+   "failed to created connector for output %u\n", output);
+   return PTR_ERR(connector);
+   }
+
+   return drm_connector_attach_encoder(connector, &renc->base);
 }
-- 
Regards,

Laurent Pinchart

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[PATCH v2 3/4] drm: rcar-du: dw-hdmi: Set output port number

Report the DT output port number in dw_hdmi_plat_data to connect to the
next bridge in the dw-hdmi driver.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c 
b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
index 7b8ec8310699..18ed14911b98 100644
--- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
+++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
@@ -75,6 +75,7 @@ static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, void 
*data,
 }
 
 static const struct dw_hdmi_plat_data rcar_dw_hdmi_plat_data = {
+   .output_port = 1,
.mode_valid = rcar_hdmi_mode_valid,
.configure_phy  = rcar_hdmi_phy_configure,
 };
-- 
Regards,

Laurent Pinchart

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[PATCH v2 1/4] drm: rcar-du: lvds: Convert to DRM panel bridge helper

Replace the manual panel handling with usage of the DRM panel bridge
helper. This simplifies the driver, and brings support for
DRM_BRIDGE_ATTACH_NO_CONNECTOR as an added bonus.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/rcar-du/rcar_lvds.c | 120 +++-
 1 file changed, 12 insertions(+), 108 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c 
b/drivers/gpu/drm/rcar-du/rcar_lvds.c
index 70dbbe44bb23..1b360e06658c 100644
--- a/drivers/gpu/drm/rcar-du/rcar_lvds.c
+++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c
@@ -63,7 +63,6 @@ struct rcar_lvds {
struct drm_bridge bridge;
 
struct drm_bridge *next_bridge;
-   struct drm_connector connector;
struct drm_panel *panel;
 
void __iomem *mmio;
@@ -80,73 +79,11 @@ struct rcar_lvds {
 #define bridge_to_rcar_lvds(b) \
container_of(b, struct rcar_lvds, bridge)
 
-#define connector_to_rcar_lvds(c) \
-   container_of(c, struct rcar_lvds, connector)
-
 static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data)
 {
iowrite32(data, lvds->mmio + reg);
 }
 
-/* 
-
- * Connector & Panel
- */
-
-static int rcar_lvds_connector_get_modes(struct drm_connector *connector)
-{
-   struct rcar_lvds *lvds = connector_to_rcar_lvds(connector);
-
-   return drm_panel_get_modes(lvds->panel, connector);
-}
-
-static int rcar_lvds_connector_atomic_check(struct drm_connector *connector,
-   struct drm_atomic_state *state)
-{
-   struct rcar_lvds *lvds = connector_to_rcar_lvds(connector);
-   const struct drm_display_mode *panel_mode;
-   struct drm_connector_state *conn_state;
-   struct drm_crtc_state *crtc_state;
-
-   conn_state = drm_atomic_get_new_connector_state(state, connector);
-   if (!conn_state->crtc)
-   return 0;
-
-   if (list_empty(&connector->modes)) {
-   dev_dbg(lvds->dev, "connector: empty modes list\n");
-   return -EINVAL;
-   }
-
-   panel_mode = list_first_entry(&connector->modes,
- struct drm_display_mode, head);
-
-   /* We're not allowed to modify the resolution. */
-   crtc_state = drm_atomic_get_crtc_state(state, conn_state->crtc);
-   if (IS_ERR(crtc_state))
-   return PTR_ERR(crtc_state);
-
-   if (crtc_state->mode.hdisplay != panel_mode->hdisplay ||
-   crtc_state->mode.vdisplay != panel_mode->vdisplay)
-   return -EINVAL;
-
-   /* The flat panel mode is fixed, just copy it to the adjusted mode. */
-   drm_mode_copy(&crtc_state->adjusted_mode, panel_mode);
-
-   return 0;
-}
-
-static const struct drm_connector_helper_funcs rcar_lvds_conn_helper_funcs = {
-   .get_modes = rcar_lvds_connector_get_modes,
-   .atomic_check = rcar_lvds_connector_atomic_check,
-};
-
-static const struct drm_connector_funcs rcar_lvds_conn_funcs = {
-   .reset = drm_atomic_helper_connector_reset,
-   .fill_modes = drm_helper_probe_single_connector_modes,
-   .destroy = drm_connector_cleanup,
-   .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
-   .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
-};
-
 /* 
-
  * PLL Setup
  */
@@ -583,11 +520,6 @@ static void __rcar_lvds_atomic_enable(struct drm_bridge 
*bridge,
/* Turn the output on. */
lvdcr0 |= LVDCR0_LVRES;
rcar_lvds_write(lvds, LVDCR0, lvdcr0);
-
-   if (lvds->panel) {
-   drm_panel_prepare(lvds->panel);
-   drm_panel_enable(lvds->panel);
-   }
 }
 
 static void rcar_lvds_atomic_enable(struct drm_bridge *bridge,
@@ -609,11 +541,6 @@ static void rcar_lvds_atomic_disable(struct drm_bridge 
*bridge,
 {
struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge);
 
-   if (lvds->panel) {
-   drm_panel_disable(lvds->panel);
-   drm_panel_unprepare(lvds->panel);
-   }
-
rcar_lvds_write(lvds, LVDCR0, 0);
rcar_lvds_write(lvds, LVDCR1, 0);
rcar_lvds_write(lvds, LVDPLLCR, 0);
@@ -648,45 +575,13 @@ static int rcar_lvds_attach(struct drm_bridge *bridge,
enum drm_bridge_attach_flags flags)
 {
struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge);
-   struct drm_connector *connector = &lvds->connector;
-   struct drm_encoder *encoder = bridge->encoder;
-   int ret;
 
-   /* If we have a next bridge just attach it. */
-   if (lvds->next_bridge)
-   return drm_bridge_attach(bridge->encoder, lvds->next_bridge,
-bridge, flags);
-
-   if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) {
-   DRM_ERROR("Fix bridge driver to make connector optional!");
-   return -EINVAL;
-   }
-

[PATCH v2 2/4] drm: bridge: dw-hdmi: Attach to next bridge if available

On all platforms except i.MX and Rockchip, the dw-hdmi DT bindings
require a video output port connected to an HDMI sink (most likely an
HDMI connector, in rare cases another bridges converting HDMI to another
protocol). For those platforms, retrieve the next bridge and attach it
from the dw-hdmi bridge attach handler.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Neil Armstrong 
---
Changes since v1:

- Make missing endpoint a fatal error
---
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 54 ++-
 include/drm/bridge/dw_hdmi.h  |  2 +
 2 files changed, 55 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c 
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 0c79a9ba48bb..a8393ecd3d19 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -143,6 +143,7 @@ struct dw_hdmi_phy_data {
 struct dw_hdmi {
struct drm_connector connector;
struct drm_bridge bridge;
+   struct drm_bridge *next_bridge;
 
unsigned int version;
 
@@ -2791,7 +2792,8 @@ static int dw_hdmi_bridge_attach(struct drm_bridge 
*bridge,
struct dw_hdmi *hdmi = bridge->driver_private;
 
if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
-   return 0;
+   return drm_bridge_attach(bridge->encoder, hdmi->next_bridge,
+bridge, flags);
 
return dw_hdmi_connector_create(hdmi);
 }
@@ -3176,6 +3178,52 @@ static void dw_hdmi_init_hw(struct dw_hdmi *hdmi)
 /* 
-
  * Probe/remove API, used from platforms based on the DRM bridge API.
  */
+
+static int dw_hdmi_parse_dt(struct dw_hdmi *hdmi)
+{
+   struct device_node *endpoint;
+   struct device_node *remote;
+
+   if (!hdmi->plat_data->output_port)
+   return 0;
+
+   endpoint = of_graph_get_endpoint_by_regs(hdmi->dev->of_node,
+hdmi->plat_data->output_port,
+-1);
+   if (!endpoint) {
+   /*
+* On platforms whose bindings don't make the output port
+* mandatory (such as Rockchip) the plat_data->output_port
+* field isn't set, so it's safe to make this a fatal error.
+*/
+   dev_err(hdmi->dev, "Missing endpoint in port@%u\n",
+   hdmi->plat_data->output_port);
+   return -ENODEV;
+   }
+
+   remote = of_graph_get_remote_port_parent(endpoint);
+   of_node_put(endpoint);
+   if (!remote) {
+   dev_err(hdmi->dev, "Endpoint in port@%u unconnected\n",
+   hdmi->plat_data->output_port);
+   return -ENODEV;
+   }
+
+   if (!of_device_is_available(remote)) {
+   dev_err(hdmi->dev, "port@%u remote device is disabled\n",
+   hdmi->plat_data->output_port);
+   of_node_put(remote);
+   return -ENODEV;
+   }
+
+   hdmi->next_bridge = of_drm_find_bridge(remote);
+   of_node_put(remote);
+   if (!hdmi->next_bridge)
+   return -EPROBE_DEFER;
+
+   return 0;
+}
+
 struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
  const struct dw_hdmi_plat_data *plat_data)
 {
@@ -3212,6 +3260,10 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device 
*pdev,
mutex_init(&hdmi->cec_notifier_mutex);
spin_lock_init(&hdmi->audio_lock);
 
+   ret = dw_hdmi_parse_dt(hdmi);
+   if (ret < 0)
+   return ERR_PTR(ret);
+
ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
if (ddc_node) {
hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index ea34ca146b82..8ebeb65d6371 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -126,6 +126,8 @@ struct dw_hdmi_phy_ops {
 struct dw_hdmi_plat_data {
struct regmap *regm;
 
+   unsigned int output_port;
+
unsigned long input_bus_encoding;
bool use_drm_infoframe;
bool ycbcr_420_allowed;
-- 
Regards,

Laurent Pinchart

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[PATCH v2 0/4] Converter R-Car DU to the DRM bridge connector helper

Hello,

This patch series converts the R-Car DU driver to use the DRM bridge
connector helper drm_bridge_connector_init().

The bulk of the v1 series was converting the adv7511, simple-bridge and
dw-hdmi drivers to make connector creation optional (through the
DRM_BRIDGE_ATTACH_NO_CONNECTOR flag), and have already been merged. v2
includes the remaining patches.

Patch 1/4 addresses the rcar-lvds driver. Instead of implementing direct
support for DRM_BRIDGE_ATTACH_NO_CONNECTOR, it simply removes code that
shouldn't have been in the driver in the first place by switching to the
panel bridge helper.

Patches 2/4 then adds support to the dw-hdmi driver to attach to a
downstream bridge if one is specified in DT. As the DT port number
corresponding to the video output differs between platforms that
integrate the dw-hdmi (some of them even don't have a video output port,
which should probably be fixed, but that's out of scope for this
series), the port number has to be specified by the platform glue layer.
Patch 3/4 does so for the R-Car dw-hdmi driver.

Patch 4/4 finally makes use of the drm_bridge_connector_init() helper.

The series depends on "[PATCH 27/27] drm: Add default modes for
connectors in unknown state" ([1]) to avoid a breakage on the VGA output
on R-Car Gen3 platforms. That patch has already been approved, and I'll
get it merged as a prerequisite.

The series has been tested on the Renesas R-Car Salvator-XS and Draak
boards with the VGA, HDMI and LVDS outputs.

[1]
https://lore.kernel.org/dri-devel/20200526011505.31884-28-laurent.pinchart+rene...@ideasonboard.com/

Laurent Pinchart (4):
drm: rcar-du: lvds: Convert to DRM panel bridge helper
drm: bridge: dw-hdmi: Attach to next bridge if available
drm: rcar-du: dw-hdmi: Set output port number
drm: rcar-du: Use drm_bridge_connector_init() helper

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 54 +-
drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 25 -
drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c| 1 +
drivers/gpu/drm/rcar-du/rcar_lvds.c | 120 +++---
include/drm/bridge/dw_hdmi.h | 2 +
5 files changed, 88 insertions(+), 114 deletions(-)

--
Regards,

Laurent Pinchart

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[PATCH] dma-buf: cma_heap: Include linux/vmalloc.h to fix build failures on MIPS

We need to include  in order for MIPS to find
vmap(), as it doesn't otherwise get included there.

Without this patch, one can hit the following build error:
  drivers/dma-buf/heaps/cma_heap.c: In function 'cma_heap_do_vmap':
  drivers/dma-buf/heaps/cma_heap.c:195:10: error: implicit declaration of 
function 'vmap'

Cc: Sumit Semwal 
Cc: Liam Mark 
Cc: Laura Abbott 
Cc: Brian Starkey 
Cc: Hridya Valsaraju 
Cc: Suren Baghdasaryan 
Cc: Sandeep Patil 
Cc: Daniel Mentz 
Cc: Chris Goldsworthy 
Cc: Ørjan Eide 
Cc: Robin Murphy 
Cc: Ezequiel Garcia 
Cc: Simon Ser 
Cc: James Jones 
Cc: linux-me...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Fixes: a5d2d29e24be ("dma-buf: heaps: Move heap-helper logic into the cma_heap 
implementation")
Reported-by: Guenter Roeck 
Signed-off-by: John Stultz 
---
 drivers/dma-buf/heaps/cma_heap.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dma-buf/heaps/cma_heap.c b/drivers/dma-buf/heaps/cma_heap.c
index 5e7c3436310c..3c4e34301172 100644
--- a/drivers/dma-buf/heaps/cma_heap.c
+++ b/drivers/dma-buf/heaps/cma_heap.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 
 struct cma_heap {
-- 
2.17.1

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Re: [PATCH v7 2/5] dma-buf: heaps: Move heap-helper logic into the cma_heap implementation

On Tue, Dec 15, 2020 at 3:53 PM Guenter Roeck  wrote:
>
> On Sat, Nov 21, 2020 at 11:49:59PM +, John Stultz wrote:
> > Since the heap-helpers logic ended up not being as generic as
> > hoped, move the heap-helpers dma_buf_ops implementations into
> > the cma_heap directly.
> >
> > This will allow us to remove the heap_helpers code in a following
> > patch.
> >
>
> mips:allmodconfig:
>
> drivers/dma-buf/heaps/cma_heap.c: In function 'cma_heap_do_vmap':
> drivers/dma-buf/heaps/cma_heap.c:195:10: error: implicit declaration of 
> function 'vmap'
>

Ah. Looks like we need to explicitly include linux/vmalloc.h.

Thanks for the report! I'll spin up a patch, validate it and send it
out here shortly.

thanks
-john
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[PATCH] dt-bindings: display: renesas,du: Convert binding to YAML

Convert the Renesas R-Car DU text binding to YAML.

Signed-off-by: Laurent Pinchart 
---
Changes since v1:

- Use pattern instead of enum for dclkin
- Update MAINTAINERS
---
 .../bindings/display/renesas,du.txt   | 145 ---
 .../bindings/display/renesas,du.yaml  | 854 ++
 MAINTAINERS   |   2 +-
 3 files changed, 855 insertions(+), 146 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/display/renesas,du.txt
 create mode 100644 Documentation/devicetree/bindings/display/renesas,du.yaml

diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt 
b/Documentation/devicetree/bindings/display/renesas,du.txt
deleted file mode 100644
index 7d65c24fcda8..
--- a/Documentation/devicetree/bindings/display/renesas,du.txt
+++ /dev/null
@@ -1,145 +0,0 @@
-* Renesas R-Car Display Unit (DU)
-
-Required Properties:
-
-  - compatible: must be one of the following.
-- "renesas,du-r8a7742" for R8A7742 (RZ/G1H) compatible DU
-- "renesas,du-r8a7743" for R8A7743 (RZ/G1M) compatible DU
-- "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU
-- "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU
-- "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU
-- "renesas,du-r8a774a1" for R8A774A1 (RZ/G2M) compatible DU
-- "renesas,du-r8a774b1" for R8A774B1 (RZ/G2N) compatible DU
-- "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU
-- "renesas,du-r8a774e1" for R8A774E1 (RZ/G2H) compatible DU
-- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
-- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
-- "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
-- "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU
-- "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
-- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
-- "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
-- "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
-- "renesas,du-r8a77961" for R8A77961 (R-Car M3-W+) compatible DU
-- "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU
-- "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU
-- "renesas,du-r8a77980" for R8A77980 (R-Car V3H) compatible DU
-- "renesas,du-r8a77990" for R8A77990 (R-Car E3) compatible DU
-- "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
-
-  - reg: the memory-mapped I/O registers base address and length
-
-  - interrupts: Interrupt specifiers for the DU interrupts.
-
-  - clocks: A list of phandles + clock-specifier pairs, one for each entry in
-the clock-names property.
-  - clock-names: Name of the clocks. This property is model-dependent.
-- R8A7779 uses a single functional clock. The clock doesn't need to be
-  named.
-- All other DU instances use one functional clock per channel The
-  functional clocks must be named "du.x" with "x" being the channel
-  numerical index.
-- In addition to the functional clocks, all DU versions also support
-  externally supplied pixel clocks. Those clocks are optional. When
-  supplied they must be named "dclkin.x" with "x" being the input clock
-  numerical index.
-
-  - renesas,cmms: A list of phandles to the CMM instances present in the SoC,
-one for each available DU channel. The property shall not be specified for
-SoCs that do not provide any CMM (such as V3M and V3H).
-
-  - renesas,vsps: A list of phandle and channel index tuples to the VSPs that
-handle the memory interfaces for the DU channels. The phandle identifies 
the
-VSP instance that serves the DU channel, and the channel index identifies
-the LIF instance in that VSP.
-
-Optional properties:
-  - resets: A list of phandle + reset-specifier pairs, one for each entry in
-the reset-names property.
-  - reset-names: Names of the resets. This property is model-dependent.
-- All but R8A7779 use one reset for a group of one or more successive
-  channels. The resets must be named "du.x" with "x" being the numerical
-  index of the lowest channel in the group.
-
-Required nodes:
-
-The connections to the DU output video ports are modeled using the OF graph
-bindings specified in Documentation/devicetree/bindings/graph.txt.
-
-The following table lists for each supported model the port number
-corresponding to each DU output.
-
-Port0  Port1  Port2  Port3
--
- R8A7742 (RZ/G1H)   DPAD 0 LVDS 0 LVDS 1 -
- R8A7743 (RZ/G1M)   DPAD 0 LVDS 0 -  -
- R8A7744 (RZ/G1N)   DPAD 0 LVDS 0 -  -
- R8A7745 (RZ/G1E)   DPAD 0 DPAD 1 -  -
- R8A77470 (RZ/G1C)  DPAD 0 DPAD 1 LVDS 0 -
- R8A774A1

[PATCH] dt-bindings: display: bridge: renesas, lvds: RZ/G2E needs renesas, companion too

From: Fabrizio Castro 

Document RZ/G2E support for property renesas,companion.

Signed-off-by: Fabrizio Castro 
Reviewed-by: Laurent Pinchart 
Signed-off-by: Laurent Pinchart 
---
Changes since v1:

- Slight reword of SoC list in description
---
 .../devicetree/bindings/display/bridge/renesas,lvds.yaml| 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml 
b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
index e5b163951b91..7eddcdb666dc 100644
--- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
@@ -83,9 +83,9 @@ properties:
 $ref: /schemas/types.yaml#/definitions/phandle
 description:
   phandle to the companion LVDS encoder. This property is mandatory
-  for the first LVDS encoder on D3 and E3 SoCs, and shall point to
-  the second encoder to be used as a companion in dual-link mode. It
-  shall not be set for any other LVDS encoder.
+  for the first LVDS encoder on R-Car D3 and E3, and RZ/G2E SoCs, and shall
+  point to the second encoder to be used as a companion in dual-link mode.
+  It shall not be set for any other LVDS encoder.
 
 required:
   - compatible
-- 
Regards,

Laurent Pinchart

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[RFC][PATCH 3/3] dma-buf: heaps: Rework heep allocation hooks to return struct dma_buf instead of fd

Every heap needs to create a dmabuf and then export it to a fd
via dma_buf_fd(), so to consolidate things a bit, have the heaps
just return a struct dmabuf * and let the top level
dma_heap_buffer_alloc() call handle creating the fd via
dma_buf_fd().

Cc: Sumit Semwal 
Cc: Liam Mark 
Cc: Laura Abbott 
Cc: Brian Starkey 
Cc: Hridya Valsaraju 
Cc: Suren Baghdasaryan 
Cc: Sandeep Patil 
Cc: Daniel Mentz 
Cc: Chris Goldsworthy 
Cc: Ørjan Eide 
Cc: Robin Murphy 
Cc: Ezequiel Garcia 
Cc: Simon Ser 
Cc: James Jones 
Cc: linux-me...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz 
---
 drivers/dma-buf/dma-heap.c  | 14 +-
 drivers/dma-buf/heaps/cma_heap.c| 22 +++---
 drivers/dma-buf/heaps/system_heap.c | 21 +++--
 include/linux/dma-heap.h| 12 ++--
 4 files changed, 33 insertions(+), 36 deletions(-)

diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c
index afd22c9dbdcf..6b5db954569f 100644
--- a/drivers/dma-buf/dma-heap.c
+++ b/drivers/dma-buf/dma-heap.c
@@ -52,6 +52,9 @@ static int dma_heap_buffer_alloc(struct dma_heap *heap, 
size_t len,
 unsigned int fd_flags,
 unsigned int heap_flags)
 {
+   struct dma_buf *dmabuf;
+   int fd;
+
/*
 * Allocations from all heaps have to begin
 * and end on page boundaries.
@@ -60,7 +63,16 @@ static int dma_heap_buffer_alloc(struct dma_heap *heap, 
size_t len,
if (!len)
return -EINVAL;
 
-   return heap->ops->allocate(heap, len, fd_flags, heap_flags);
+   dmabuf = heap->ops->allocate(heap, len, fd_flags, heap_flags);
+   if (IS_ERR(dmabuf))
+   return PTR_ERR(dmabuf);
+
+   fd = dma_buf_fd(dmabuf, fd_flags);
+   if (fd < 0) {
+   dma_buf_put(dmabuf);
+   /* just return, as put will call release and that will free */
+   }
+   return fd;
 }
 
 static int dma_heap_open(struct inode *inode, struct file *file)
diff --git a/drivers/dma-buf/heaps/cma_heap.c b/drivers/dma-buf/heaps/cma_heap.c
index 877353e8014f..0c7d6430605f 100644
--- a/drivers/dma-buf/heaps/cma_heap.c
+++ b/drivers/dma-buf/heaps/cma_heap.c
@@ -268,10 +268,10 @@ static const struct dma_buf_ops cma_heap_buf_ops = {
.release = cma_heap_dma_buf_release,
 };
 
-static int cma_heap_allocate(struct dma_heap *heap,
- unsigned long len,
- unsigned long fd_flags,
- unsigned long heap_flags)
+static struct dma_buf *cma_heap_allocate(struct dma_heap *heap,
+unsigned long len,
+unsigned long fd_flags,
+unsigned long heap_flags)
 {
struct cma_heap *cma_heap = dma_heap_get_drvdata(heap);
struct cma_heap_buffer *buffer;
@@ -286,7 +286,7 @@ static int cma_heap_allocate(struct dma_heap *heap,
 
buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
if (!buffer)
-   return -ENOMEM;
+   return ERR_PTR(-ENOMEM);
 
INIT_LIST_HEAD(&buffer->attachments);
mutex_init(&buffer->lock);
@@ -345,15 +345,7 @@ static int cma_heap_allocate(struct dma_heap *heap,
ret = PTR_ERR(dmabuf);
goto free_pages;
}
-
-   ret = dma_buf_fd(dmabuf, fd_flags);
-   if (ret < 0) {
-   dma_buf_put(dmabuf);
-   /* just return, as put will call release and that will free */
-   return ret;
-   }
-
-   return ret;
+   return dmabuf;
 
 free_pages:
kfree(buffer->pages);
@@ -362,7 +354,7 @@ static int cma_heap_allocate(struct dma_heap *heap,
 free_buffer:
kfree(buffer);
 
-   return ret;
+   return ERR_PTR(ret);
 }
 
 static const struct dma_heap_ops cma_heap_ops = {
diff --git a/drivers/dma-buf/heaps/system_heap.c 
b/drivers/dma-buf/heaps/system_heap.c
index 2321c91891f6..7b154424aeb3 100644
--- a/drivers/dma-buf/heaps/system_heap.c
+++ b/drivers/dma-buf/heaps/system_heap.c
@@ -332,10 +332,10 @@ static struct page *alloc_largest_available(unsigned long 
size,
return NULL;
 }
 
-static int system_heap_allocate(struct dma_heap *heap,
-   unsigned long len,
-   unsigned long fd_flags,
-   unsigned long heap_flags)
+static struct dma_buf *system_heap_allocate(struct dma_heap *heap,
+   unsigned long len,
+   unsigned long fd_flags,
+   unsigned long heap_flags)
 {
struct system_heap_buffer *buffer;
DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
@@ -350,7 +350,7 @@ static int system_heap_allocate(struct dma_heap *heap,
 
buffer = kzalloc(sizeof(*buffer),

[RFC][PATCH 2/3] dma-buf: heaps: Add a WARN_ON should the vmap_cnt go negative

We shouldn't vunmap more then we vmap, but if we do, make
sure we complain loudly.

Cc: Sumit Semwal 
Cc: Liam Mark 
Cc: Laura Abbott 
Cc: Brian Starkey 
Cc: Hridya Valsaraju 
Cc: Suren Baghdasaryan 
Cc: Sandeep Patil 
Cc: Daniel Mentz 
Cc: Chris Goldsworthy 
Cc: Ørjan Eide 
Cc: Robin Murphy 
Cc: Ezequiel Garcia 
Cc: Simon Ser 
Cc: James Jones 
Cc: linux-me...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Suggested-by: Suren Baghdasaryan 
Signed-off-by: John Stultz 
---
 drivers/dma-buf/heaps/cma_heap.c| 1 +
 drivers/dma-buf/heaps/system_heap.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/dma-buf/heaps/cma_heap.c b/drivers/dma-buf/heaps/cma_heap.c
index 5e7c3436310c..877353e8014f 100644
--- a/drivers/dma-buf/heaps/cma_heap.c
+++ b/drivers/dma-buf/heaps/cma_heap.c
@@ -231,6 +231,7 @@ static void cma_heap_vunmap(struct dma_buf *dmabuf, struct 
dma_buf_map *map)
struct cma_heap_buffer *buffer = dmabuf->priv;
 
mutex_lock(&buffer->lock);
+   WARN_ON(buffer->vmap_cnt == 0);
if (!--buffer->vmap_cnt) {
vunmap(buffer->vaddr);
buffer->vaddr = NULL;
diff --git a/drivers/dma-buf/heaps/system_heap.c 
b/drivers/dma-buf/heaps/system_heap.c
index 405351aad2a8..2321c91891f6 100644
--- a/drivers/dma-buf/heaps/system_heap.c
+++ b/drivers/dma-buf/heaps/system_heap.c
@@ -273,6 +273,7 @@ static void system_heap_vunmap(struct dma_buf *dmabuf, 
struct dma_buf_map *map)
struct system_heap_buffer *buffer = dmabuf->priv;
 
mutex_lock(&buffer->lock);
+   WARN_ON(buffer->vmap_cnt == 0);
if (!--buffer->vmap_cnt) {
vunmap(buffer->vaddr);
buffer->vaddr = NULL;
-- 
2.17.1

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[RFC][PATCH 1/3] dma-buf: system_heap: Make sure to return an error if we abort

If we abort from the allocation due to a fatal_signal_pending(),
be sure we report an error so any return code paths don't trip
over the fact that the allocation didn't succeed.

Cc: Sumit Semwal 
Cc: Liam Mark 
Cc: Laura Abbott 
Cc: Brian Starkey 
Cc: Hridya Valsaraju 
Cc: Suren Baghdasaryan 
Cc: Sandeep Patil 
Cc: Daniel Mentz 
Cc: Chris Goldsworthy 
Cc: Ørjan Eide 
Cc: Robin Murphy 
Cc: Ezequiel Garcia 
Cc: Simon Ser 
Cc: James Jones 
Cc: linux-me...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Suggested-by: Suren Baghdasaryan 
Signed-off-by: John Stultz 
---
 drivers/dma-buf/heaps/system_heap.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/dma-buf/heaps/system_heap.c 
b/drivers/dma-buf/heaps/system_heap.c
index 17e0e9a68baf..405351aad2a8 100644
--- a/drivers/dma-buf/heaps/system_heap.c
+++ b/drivers/dma-buf/heaps/system_heap.c
@@ -363,8 +363,10 @@ static int system_heap_allocate(struct dma_heap *heap,
 * Avoid trying to allocate memory if the process
 * has been killed by SIGKILL
 */
-   if (fatal_signal_pending(current))
+   if (fatal_signal_pending(current)) {
+   ret = -EINTR;
goto free_buffer;
+   }
 
page = alloc_largest_available(size_remaining, max_order);
if (!page)
-- 
2.17.1

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[PATCH v16 0/4] RDMA: Add dma-buf support

This is the sixteenth version of the patch set. Changelog:

v16:
* Add "select DMA_SHARED_BUFFER" to Kconfig when IB UMEM is enabled.
  This fixes the auto build test error with a random config.

v15: https://www.spinics.net/lists/linux-rdma/msg98369.html
* Rebase to the latest linux-rdma 'for-next' branch (commit 0583531bb9ef)
  to pick up RDMA core and mlx5 updates
* Let ib_umem_dmabuf_get() return 'struct ib_umem_dmabuf *' instead of
  'struct ib_umem *'
* Move the check of on demand paging support to mlx5_ib_reg_user_mr_dmabuf()
* Check iova alignment at the entry point of the uverb command so that
  mlx5_umem_dmabuf_default_pgsz() can always succeed

v14: https://www.spinics.net/lists/linux-rdma/msg98265.html
* Check return value of dma_fence_wait()
* Fix a dma-buf leak in ib_umem_dmabuf_get()
* Fix return value type cast for ib_umem_dmabuf_get()
* Return -EOPNOTSUPP instead of -EINVAL for unimplemented functions
* Remove an unnecessary use of unlikely()
* Remove left-over commit message resulted from rebase

v13: https://www.spinics.net/lists/linux-rdma/msg98227.html
* Rebase to the latest linux-rdma 'for-next' branch (5.10.0-rc6+)
* Check for device on-demand paging capability at the entry point of
  the new verbs command to avoid calling device's reg_user_mr_dmabuf()
  method when CONFIG_INFINIBAND_ON_DEMAND_PAGING is diabled.

v12: https://www.spinics.net/lists/linux-rdma/msg97943.html
* Move the prototype of function ib_umem_dmabuf_release() to ib_umem.h
  and remove umem_dmabuf.h
* Break a line that is too long

v11: https://www.spinics.net/lists/linux-rdma/msg97860.html
* Rework the parameter checking code inside ib_umem_dmabuf_get() 
* Fix incorrect error handling in the new verbs command handler
* Put a duplicated code sequence for checking iova and setting page size
  into a function
* In the invalidation callback, check for if the buffer has been mapped
  and thus the presence of a valid driver mr is ensured
* The patch that checks for dma_virt_ops is dropped because it is no
  longer needed
* The patch that documents that dma-buf size is fixed has landed at:
  https://cgit.freedesktop.org/drm/drm-misc/commit/?id=476b485be03c
  and thus is no longer included here
* The matching user space patch set is sent separately

v10: https://www.spinics.net/lists/linux-rdma/msg97483.html
* Don't map the pages in ib_umem_dmabuf_get(); use the size information
  of the dma-buf object to validate the umem size instead
* Use PAGE_SIZE directly instead of use ib_umem_find_best_pgsz() when
  the MR is created since the pages have not been mapped yet and dma-buf
  requires PAGE_SIZE anyway
* Always call mlx5_umem_find_best_pgsz() after mapping the pages to
  verify that the page size requirement is satisfied
* Add a patch to document that dma-buf size is fixed

v9: https://www.spinics.net/lists/linux-rdma/msg97432.html
* Clean up the code for sg list in-place modification
* Prevent dma-buf pages from being mapped multiple times
* Map the pages in ib_umem_dmabuf_get() so that inproper values of
  address/length/iova can be caught early
* Check for unsupported flags in the new uverbs command
* Add missing uverbs_finalize_uobj_create()
* Sort uverbs objects by name
* Fix formating issue -- unnecessary alignment of '='
* Unmap pages in mlx5_ib_fence_dmabuf_mr()
* Remove address range checking from pagefault_dmabuf_mr()

v8: https://www.spinics.net/lists/linux-rdma/msg97370.html
* Modify the dma-buf sg list in place to get a proper umem sg list and
  restore it before calling dma_buf_unmap_attachment()
* Validate the umem sg list with ib_umem_find_best_pgsz()
* Remove the logic for slicing the sg list at runtime

v7: https://www.spinics.net/lists/linux-rdma/msg97297.html
* Rebase on top of latest mlx5 MR patch series
* Slice dma-buf sg list at runtime instead of creating a new list
* Preload the buffer page mapping when the MR is created
* Move the 'dma_virt_ops' check into dma_buf_dynamic_attach()

v6: https://www.spinics.net/lists/linux-rdma/msg96923.html
* Move the dma-buf invalidation callback from the core to the device
  driver
* Move mapping update from work queue to pagefault handler
* Add dma-buf based MRs to the xarray of mmkeys so that the pagefault
  handler can be reached
* Update the new driver method and uverbs command signature by changing
  the paramter 'addr' to 'offset'
* Modify the sg list returned from dma_buf_map_attachment() based on
  the parameters 'offset' and 'length'
* Don't import dma-buf if 'dma_virt_ops' is used by the dma device
* The patch that clarifies dma-buf sg lists alignment has landed at
  https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ac80cd17a615
  and thus is no longer included with this set

v5: https://www.spinics.net/lists/linux-rdma/msg96786.html
* Fix a few warnings reported by kernel test robot:
- no previous prototype for function 'ib_umem_dmabuf_release' 
- no previous prototype for function 'ib_umem_dmabuf_map_pages'
- comparison of distinct po

[PATCH v16 3/4] RDMA/uverbs: Add uverbs command for dma-buf based MR registration

Implement a new uverbs ioctl method for memory registration with file
descriptor as an extra parameter.

Signed-off-by: Jianxin Xiong 
Reviewed-by: Sean Hefty 
Acked-by: Michael J. Ruhl 
Acked-by: Christian Koenig 
Acked-by: Daniel Vetter 
Reviewed-by: Leon Romanovsky 
---
 drivers/infiniband/core/uverbs_std_types_mr.c | 117 +-
 include/uapi/rdma/ib_user_ioctl_cmds.h|  14 +++
 2 files changed, 129 insertions(+), 2 deletions(-)

diff --git a/drivers/infiniband/core/uverbs_std_types_mr.c 
b/drivers/infiniband/core/uverbs_std_types_mr.c
index dd4e76b..f782d5e 100644
--- a/drivers/infiniband/core/uverbs_std_types_mr.c
+++ b/drivers/infiniband/core/uverbs_std_types_mr.c
@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018, Mellanox Technologies inc.  All rights reserved.
+ * Copyright (c) 2020, Intel Corporation.  All rights reserved.
  *
  * This software is available to you under a choice of one of two
  * licenses.  You may choose to be licensed under the terms of the GNU
@@ -182,6 +183,86 @@ static int UVERBS_HANDLER(UVERBS_METHOD_QUERY_MR)(
return IS_UVERBS_COPY_ERR(ret) ? ret : 0;
 }
 
+static int UVERBS_HANDLER(UVERBS_METHOD_REG_DMABUF_MR)(
+   struct uverbs_attr_bundle *attrs)
+{
+   struct ib_uobject *uobj =
+   uverbs_attr_get_uobject(attrs, 
UVERBS_ATTR_REG_DMABUF_MR_HANDLE);
+   struct ib_pd *pd =
+   uverbs_attr_get_obj(attrs, UVERBS_ATTR_REG_DMABUF_MR_PD_HANDLE);
+   struct ib_device *ib_dev = pd->device;
+
+   u64 offset, length, iova;
+   u32 fd, access_flags;
+   struct ib_mr *mr;
+   int ret;
+
+   if (!ib_dev->ops.reg_user_mr_dmabuf)
+   return -EOPNOTSUPP;
+
+   ret = uverbs_copy_from(&offset, attrs,
+  UVERBS_ATTR_REG_DMABUF_MR_OFFSET);
+   if (ret)
+   return ret;
+
+   ret = uverbs_copy_from(&length, attrs,
+  UVERBS_ATTR_REG_DMABUF_MR_LENGTH);
+   if (ret)
+   return ret;
+
+   ret = uverbs_copy_from(&iova, attrs,
+  UVERBS_ATTR_REG_DMABUF_MR_IOVA);
+   if (ret)
+   return ret;
+
+   if ((offset & ~PAGE_MASK) != (iova & ~PAGE_MASK))
+   return -EINVAL;
+
+   ret = uverbs_copy_from(&fd, attrs,
+  UVERBS_ATTR_REG_DMABUF_MR_FD);
+   if (ret)
+   return ret;
+
+   ret = uverbs_get_flags32(&access_flags, attrs,
+UVERBS_ATTR_REG_DMABUF_MR_ACCESS_FLAGS,
+IB_ACCESS_LOCAL_WRITE |
+IB_ACCESS_REMOTE_READ |
+IB_ACCESS_REMOTE_WRITE |
+IB_ACCESS_REMOTE_ATOMIC |
+IB_ACCESS_RELAXED_ORDERING);
+   if (ret)
+   return ret;
+
+   ret = ib_check_mr_access(ib_dev, access_flags);
+   if (ret)
+   return ret;
+
+   mr = pd->device->ops.reg_user_mr_dmabuf(pd, offset, length, iova, fd,
+   access_flags,
+   &attrs->driver_udata);
+   if (IS_ERR(mr))
+   return PTR_ERR(mr);
+
+   mr->device = pd->device;
+   mr->pd = pd;
+   mr->type = IB_MR_TYPE_USER;
+   mr->uobject = uobj;
+   atomic_inc(&pd->usecnt);
+
+   uobj->object = mr;
+
+   uverbs_finalize_uobj_create(attrs, UVERBS_ATTR_REG_DMABUF_MR_HANDLE);
+
+   ret = uverbs_copy_to(attrs, UVERBS_ATTR_REG_DMABUF_MR_RESP_LKEY,
+&mr->lkey, sizeof(mr->lkey));
+   if (ret)
+   return ret;
+
+   ret = uverbs_copy_to(attrs, UVERBS_ATTR_REG_DMABUF_MR_RESP_RKEY,
+&mr->rkey, sizeof(mr->rkey));
+   return ret;
+}
+
 DECLARE_UVERBS_NAMED_METHOD(
UVERBS_METHOD_ADVISE_MR,
UVERBS_ATTR_IDR(UVERBS_ATTR_ADVISE_MR_PD_HANDLE,
@@ -247,6 +328,37 @@ static int UVERBS_HANDLER(UVERBS_METHOD_QUERY_MR)(
UVERBS_ATTR_TYPE(u32),
UA_MANDATORY));
 
+DECLARE_UVERBS_NAMED_METHOD(
+   UVERBS_METHOD_REG_DMABUF_MR,
+   UVERBS_ATTR_IDR(UVERBS_ATTR_REG_DMABUF_MR_HANDLE,
+   UVERBS_OBJECT_MR,
+   UVERBS_ACCESS_NEW,
+   UA_MANDATORY),
+   UVERBS_ATTR_IDR(UVERBS_ATTR_REG_DMABUF_MR_PD_HANDLE,
+   UVERBS_OBJECT_PD,
+   UVERBS_ACCESS_READ,
+   UA_MANDATORY),
+   UVERBS_ATTR_PTR_IN(UVERBS_ATTR_REG_DMABUF_MR_OFFSET,
+  UVERBS_ATTR_TYPE(u64),
+  UA_MANDATORY),
+   UVERBS_ATTR_PTR_IN(UVERBS_ATTR_REG_DMABUF_MR_LENGTH,
+  UVERBS_ATTR_TYPE(u64),
+  UA_MANDATORY),
+   UVERBS_ATTR_PTR_IN(UVERBS_ATTR_REG_DMABUF_MR_IOVA,
+  UVERBS_ATTR_TYPE(u6

[PATCH v16 4/4] RDMA/mlx5: Support dma-buf based userspace memory region

Implement the new driver method 'reg_user_mr_dmabuf'.  Utilize the core
functions to import dma-buf based memory region and update the mappings.

Add code to handle dma-buf related page fault.

Signed-off-by: Jianxin Xiong 
Reviewed-by: Sean Hefty 
Acked-by: Michael J. Ruhl 
Acked-by: Christian Koenig 
Acked-by: Daniel Vetter 
---
 drivers/infiniband/hw/mlx5/main.c|   2 +
 drivers/infiniband/hw/mlx5/mlx5_ib.h |  18 ++
 drivers/infiniband/hw/mlx5/mr.c  | 112 ++-
 drivers/infiniband/hw/mlx5/odp.c |  89 ++--
 4 files changed, 214 insertions(+), 7 deletions(-)

diff --git a/drivers/infiniband/hw/mlx5/main.c 
b/drivers/infiniband/hw/mlx5/main.c
index 4a054eb..c025746 100644
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
 /*
  * Copyright (c) 2013-2020, Mellanox Technologies inc. All rights reserved.
+ * Copyright (c) 2020, Intel Corporation. All rights reserved.
  */
 
 #include 
@@ -4069,6 +4070,7 @@ static int mlx5_ib_enable_driver(struct ib_device *dev)
.query_srq = mlx5_ib_query_srq,
.query_ucontext = mlx5_ib_query_ucontext,
.reg_user_mr = mlx5_ib_reg_user_mr,
+   .reg_user_mr_dmabuf = mlx5_ib_reg_user_mr_dmabuf,
.req_notify_cq = mlx5_ib_arm_cq,
.rereg_user_mr = mlx5_ib_rereg_user_mr,
.resize_cq = mlx5_ib_resize_cq,
diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h 
b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index c33d6fd..bddf252 100644
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
 /*
  * Copyright (c) 2013-2020, Mellanox Technologies inc. All rights reserved.
+ * Copyright (c) 2020, Intel Corporation. All rights reserved.
  */
 
 #ifndef MLX5_IB_H
@@ -703,6 +704,12 @@ static inline bool is_odp_mr(struct mlx5_ib_mr *mr)
   mr->umem->is_odp;
 }
 
+static inline bool is_dmabuf_mr(struct mlx5_ib_mr *mr)
+{
+   return IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING) && mr->umem &&
+  mr->umem->is_dmabuf;
+}
+
 struct mlx5_ib_mw {
struct ib_mwibmw;
struct mlx5_core_mkey   mmkey;
@@ -1243,6 +1250,10 @@ int mlx5_ib_create_cq(struct ib_cq *ibcq, const struct 
ib_cq_init_attr *attr,
 struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  u64 virt_addr, int access_flags,
  struct ib_udata *udata);
+struct ib_mr *mlx5_ib_reg_user_mr_dmabuf(struct ib_pd *pd, u64 start,
+u64 length, u64 virt_addr,
+int fd, int access_flags,
+struct ib_udata *udata);
 int mlx5_ib_advise_mr(struct ib_pd *pd,
  enum ib_uverbs_advise_mr_advice advice,
  u32 flags,
@@ -1253,11 +1264,13 @@ int mlx5_ib_advise_mr(struct ib_pd *pd,
 int mlx5_ib_dealloc_mw(struct ib_mw *mw);
 int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
   int page_shift, int flags);
+int mlx5_ib_update_mr_pas(struct mlx5_ib_mr *mr, unsigned int flags);
 struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd,
 struct ib_udata *udata,
 int access_flags);
 void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *mr);
 void mlx5_ib_fence_odp_mr(struct mlx5_ib_mr *mr);
+void mlx5_ib_fence_dmabuf_mr(struct mlx5_ib_mr *mr);
 struct ib_mr *mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start,
u64 length, u64 virt_addr, int access_flags,
struct ib_pd *pd, struct ib_udata *udata);
@@ -1345,6 +1358,7 @@ int mlx5_ib_advise_mr_prefetch(struct ib_pd *pd,
   enum ib_uverbs_advise_mr_advice advice,
   u32 flags, struct ib_sge *sg_list, u32 num_sge);
 int mlx5_ib_init_odp_mr(struct mlx5_ib_mr *mr);
+int mlx5_ib_init_dmabuf_mr(struct mlx5_ib_mr *mr);
 #else /* CONFIG_INFINIBAND_ON_DEMAND_PAGING */
 static inline void mlx5_ib_internal_fill_odp_caps(struct mlx5_ib_dev *dev)
 {
@@ -1370,6 +1384,10 @@ static inline int mlx5_ib_init_odp_mr(struct mlx5_ib_mr 
*mr)
 {
return -EOPNOTSUPP;
 }
+static inline int mlx5_ib_init_dmabuf_mr(struct mlx5_ib_mr *mr)
+{
+   return -EOPNOTSUPP;
+}
 #endif /* CONFIG_INFINIBAND_ON_DEMAND_PAGING */
 
 extern const struct mmu_interval_notifier_ops mlx5_mn_ops;
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index 6fa869c..6b9c4dc 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2020, Intel Corpo

[PATCH v16 2/4] RDMA/core: Add device method for registering dma-buf based memory region

Dma-buf based memory region requires one extra parameter and is processed
quite differently. Adding a separate method allows clean separation from
regular memory regions.

Signed-off-by: Jianxin Xiong 
Reviewed-by: Sean Hefty 
Acked-by: Michael J. Ruhl 
Acked-by: Christian Koenig 
Acked-by: Daniel Vetter 
Reviewed-by: Leon Romanovsky 
---
 drivers/infiniband/core/device.c | 1 +
 include/rdma/ib_verbs.h  | 6 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c
index 3ab1ede..23f7440 100644
--- a/drivers/infiniband/core/device.c
+++ b/drivers/infiniband/core/device.c
@@ -2677,6 +2677,7 @@ void ib_set_device_ops(struct ib_device *dev, const 
struct ib_device_ops *ops)
SET_DEVICE_OP(dev_ops, read_counters);
SET_DEVICE_OP(dev_ops, reg_dm_mr);
SET_DEVICE_OP(dev_ops, reg_user_mr);
+   SET_DEVICE_OP(dev_ops, reg_user_mr_dmabuf);
SET_DEVICE_OP(dev_ops, req_ncomp_notif);
SET_DEVICE_OP(dev_ops, req_notify_cq);
SET_DEVICE_OP(dev_ops, rereg_user_mr);
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index 06a5652..b2f02a7 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -2,7 +2,7 @@
 /*
  * Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
  * Copyright (c) 2004 Infinicon Corporation.  All rights reserved.
- * Copyright (c) 2004 Intel Corporation.  All rights reserved.
+ * Copyright (c) 2004, 2020 Intel Corporation.  All rights reserved.
  * Copyright (c) 2004 Topspin Corporation.  All rights reserved.
  * Copyright (c) 2004 Voltaire Corporation.  All rights reserved.
  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
@@ -2433,6 +2433,10 @@ struct ib_device_ops {
struct ib_mr *(*reg_user_mr)(struct ib_pd *pd, u64 start, u64 length,
 u64 virt_addr, int mr_access_flags,
 struct ib_udata *udata);
+   struct ib_mr *(*reg_user_mr_dmabuf)(struct ib_pd *pd, u64 offset,
+   u64 length, u64 virt_addr, int fd,
+   int mr_access_flags,
+   struct ib_udata *udata);
struct ib_mr *(*rereg_user_mr)(struct ib_mr *mr, int flags, u64 start,
   u64 length, u64 virt_addr,
   int mr_access_flags, struct ib_pd *pd,
-- 
1.8.3.1

___
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH v16 1/4] RDMA/umem: Support importing dma-buf as user memory region

Dma-buf is a standard cross-driver buffer sharing mechanism that can be
used to support peer-to-peer access from RDMA devices.

Device memory exported via dma-buf is associated with a file descriptor.
This is passed to the user space as a property associated with the
buffer allocation. When the buffer is registered as a memory region,
the file descriptor is passed to the RDMA driver along with other
parameters.

Implement the common code for importing dma-buf object and mapping
dma-buf pages.

Signed-off-by: Jianxin Xiong 
Reviewed-by: Sean Hefty 
Acked-by: Michael J. Ruhl 
Acked-by: Christian Koenig 
Acked-by: Daniel Vetter 
---
 drivers/infiniband/Kconfig|   1 +
 drivers/infiniband/core/Makefile  |   2 +-
 drivers/infiniband/core/umem.c|   3 +
 drivers/infiniband/core/umem_dmabuf.c | 174 ++
 include/rdma/ib_umem.h|  48 +-
 5 files changed, 224 insertions(+), 4 deletions(-)
 create mode 100644 drivers/infiniband/core/umem_dmabuf.c

diff --git a/drivers/infiniband/Kconfig b/drivers/infiniband/Kconfig
index 9325e18..04a78d9 100644
--- a/drivers/infiniband/Kconfig
+++ b/drivers/infiniband/Kconfig
@@ -41,6 +41,7 @@ config INFINIBAND_USER_MEM
bool
depends on INFINIBAND_USER_ACCESS != n
depends on MMU
+   select DMA_SHARED_BUFFER
default y
 
 config INFINIBAND_ON_DEMAND_PAGING
diff --git a/drivers/infiniband/core/Makefile b/drivers/infiniband/core/Makefile
index ccf2670..8ab4eea 100644
--- a/drivers/infiniband/core/Makefile
+++ b/drivers/infiniband/core/Makefile
@@ -40,5 +40,5 @@ ib_uverbs-y :=uverbs_main.o 
uverbs_cmd.o uverbs_marshall.o \
uverbs_std_types_srq.o \
uverbs_std_types_wq.o \
uverbs_std_types_qp.o
-ib_uverbs-$(CONFIG_INFINIBAND_USER_MEM) += umem.o
+ib_uverbs-$(CONFIG_INFINIBAND_USER_MEM) += umem.o umem_dmabuf.o
 ib_uverbs-$(CONFIG_INFINIBAND_ON_DEMAND_PAGING) += umem_odp.o
diff --git a/drivers/infiniband/core/umem.c b/drivers/infiniband/core/umem.c
index 7ca4112..cc131f8 100644
--- a/drivers/infiniband/core/umem.c
+++ b/drivers/infiniband/core/umem.c
@@ -2,6 +2,7 @@
  * Copyright (c) 2005 Topspin Communications.  All rights reserved.
  * Copyright (c) 2005 Cisco Systems.  All rights reserved.
  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2020 Intel Corporation. All rights reserved.
  *
  * This software is available to you under a choice of one of two
  * licenses.  You may choose to be licensed under the terms of the GNU
@@ -278,6 +279,8 @@ void ib_umem_release(struct ib_umem *umem)
 {
if (!umem)
return;
+   if (umem->is_dmabuf)
+   return ib_umem_dmabuf_release(to_ib_umem_dmabuf(umem));
if (umem->is_odp)
return ib_umem_odp_release(to_ib_umem_odp(umem));
 
diff --git a/drivers/infiniband/core/umem_dmabuf.c 
b/drivers/infiniband/core/umem_dmabuf.c
new file mode 100644
index 000..f9b5162
--- /dev/null
+++ b/drivers/infiniband/core/umem_dmabuf.c
@@ -0,0 +1,174 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (c) 2020 Intel Corporation. All rights reserved.
+ */
+
+#include 
+#include 
+#include 
+
+#include "uverbs.h"
+
+int ib_umem_dmabuf_map_pages(struct ib_umem_dmabuf *umem_dmabuf)
+{
+   struct sg_table *sgt;
+   struct scatterlist *sg;
+   struct dma_fence *fence;
+   unsigned long start, end, cur = 0;
+   unsigned int nmap = 0;
+   int i;
+
+   dma_resv_assert_held(umem_dmabuf->attach->dmabuf->resv);
+
+   if (umem_dmabuf->sgt)
+   goto wait_fence;
+
+   sgt = dma_buf_map_attachment(umem_dmabuf->attach, DMA_BIDIRECTIONAL);
+   if (IS_ERR(sgt))
+   return PTR_ERR(sgt);
+
+   /* modify the sg list in-place to match umem address and length */
+
+   start = ALIGN_DOWN(umem_dmabuf->umem.address, PAGE_SIZE);
+   end = ALIGN(umem_dmabuf->umem.address + umem_dmabuf->umem.length,
+   PAGE_SIZE);
+   for_each_sgtable_dma_sg(sgt, sg, i) {
+   if (start < cur + sg_dma_len(sg) && cur < end)
+   nmap++;
+   if (cur <= start && start < cur + sg_dma_len(sg)) {
+   unsigned long offset = start - cur;
+
+   umem_dmabuf->first_sg = sg;
+   umem_dmabuf->first_sg_offset = offset;
+   sg_dma_address(sg) += offset;
+   sg_dma_len(sg) -= offset;
+   cur += offset;
+   }
+   if (cur < end && end <= cur + sg_dma_len(sg)) {
+   unsigned long trim = cur + sg_dma_len(sg) - end;
+
+   umem_dmabuf->last_sg = sg;
+   umem_dmabuf->last_sg_trim = trim;
+   sg_dma_len(sg) -= trim;
+   brea

Re: [PATCH] drm/bridge: thc63lvd1024: Fix regulator_get_optional() misuse

Hi Mark,

Thank you for the patch.

On Fri, Nov 08, 2019 at 05:32:08PM +, Mark Brown wrote:
> The thc63lvd1024 driver requests a supply using regulator_get_optional()
> but both the name of the supply and the usage pattern suggest that it is
> being used for the main power for the device and is not at all optional
> for the device for function, there is no handling at all for absent
> supplies.  Such regulators should use the vanilla regulator_get()
> interface, it will ensure that even if a supply is not described in the
> system integration one will be provided in software.
> 
> Signed-off-by: Mark Brown 

Reviewed-by: Laurent Pinchart 

and queued in my tree for v5.12.

> ---
>  drivers/gpu/drm/bridge/thc63lvd1024.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/bridge/thc63lvd1024.c 
> b/drivers/gpu/drm/bridge/thc63lvd1024.c
> index 3d74129b2995..ffca28ccc2c4 100644
> --- a/drivers/gpu/drm/bridge/thc63lvd1024.c
> +++ b/drivers/gpu/drm/bridge/thc63lvd1024.c
> @@ -200,7 +200,7 @@ static int thc63_probe(struct platform_device *pdev)
>   thc63->dev = &pdev->dev;
>   platform_set_drvdata(pdev, thc63);
>  
> - thc63->vcc = devm_regulator_get_optional(thc63->dev, "vcc");
> + thc63->vcc = devm_regulator_get(thc63->dev, "vcc");
>   if (IS_ERR(thc63->vcc)) {
>   if (PTR_ERR(thc63->vcc) == -EPROBE_DEFER)
>   return -EPROBE_DEFER;

-- 
Regards,

Laurent Pinchart
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[PATCH v2 2/3] drm: Use a const drm_driver for legacy PCI devices

Now that the legacy PCI support code doesn't need to write to the
drm_driver structure, it can be treated as const through the whole DRM
core, unconditionally. This allows declaring the structure as const in
all drivers, removing one possible attack vector.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/drm_drv.c |  4 
 drivers/gpu/drm/drm_pci.c |  8 +---
 include/drm/drm_device.h  |  4 
 include/drm/drm_legacy.h  | 10 ++
 4 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 734303802bc3..3f57e880685e 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -589,11 +589,7 @@ static int drm_dev_init(struct drm_device *dev,
 
kref_init(&dev->ref);
dev->dev = get_device(parent);
-#ifdef CONFIG_DRM_LEGACY
-   dev->driver = (struct drm_driver *)driver;
-#else
dev->driver = driver;
-#endif
 
INIT_LIST_HEAD(&dev->managed.resources);
spin_lock_init(&dev->managed.lock);
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index dfb138aaccba..5370e6b492fd 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -201,7 +201,7 @@ static void drm_pci_agp_init(struct drm_device *dev)
 
 static int drm_get_pci_dev(struct pci_dev *pdev,
   const struct pci_device_id *ent,
-  struct drm_driver *driver)
+  const struct drm_driver *driver)
 {
struct drm_device *dev;
int ret;
@@ -255,7 +255,8 @@ static int drm_get_pci_dev(struct pci_dev *pdev,
  *
  * Return: 0 on success or a negative error code on failure.
  */
-int drm_legacy_pci_init(struct drm_driver *driver, struct pci_driver *pdriver)
+int drm_legacy_pci_init(const struct drm_driver *driver,
+   struct pci_driver *pdriver)
 {
struct pci_dev *pdev = NULL;
const struct pci_device_id *pid;
@@ -300,7 +301,8 @@ EXPORT_SYMBOL(drm_legacy_pci_init);
  * Unregister a DRM driver shadow-attached through drm_legacy_pci_init(). This
  * is deprecated and only used by dri1 drivers.
  */
-void drm_legacy_pci_exit(struct drm_driver *driver, struct pci_driver *pdriver)
+void drm_legacy_pci_exit(const struct drm_driver *driver,
+struct pci_driver *pdriver)
 {
struct drm_device *dev, *tmp;
 
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index bd5abe7cd48f..939904ae88fc 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -76,11 +76,7 @@ struct drm_device {
} managed;
 
/** @driver: DRM driver managing the device */
-#ifdef CONFIG_DRM_LEGACY
-   struct drm_driver *driver;
-#else
const struct drm_driver *driver;
-#endif
 
/**
 * @dev_private:
diff --git a/include/drm/drm_legacy.h b/include/drm/drm_legacy.h
index 852d7451eeb1..8ed04e9be997 100644
--- a/include/drm/drm_legacy.h
+++ b/include/drm/drm_legacy.h
@@ -198,8 +198,10 @@ struct drm_dma_handle *drm_pci_alloc(struct drm_device 
*dev, size_t size,
 size_t align);
 void drm_pci_free(struct drm_device *dev, struct drm_dma_handle *dmah);
 
-int drm_legacy_pci_init(struct drm_driver *driver, struct pci_driver *pdriver);
-void drm_legacy_pci_exit(struct drm_driver *driver, struct pci_driver 
*pdriver);
+int drm_legacy_pci_init(const struct drm_driver *driver,
+   struct pci_driver *pdriver);
+void drm_legacy_pci_exit(const struct drm_driver *driver,
+struct pci_driver *pdriver);
 
 #else
 
@@ -214,13 +216,13 @@ static inline void drm_pci_free(struct drm_device *dev,
 {
 }
 
-static inline int drm_legacy_pci_init(struct drm_driver *driver,
+static inline int drm_legacy_pci_init(const struct drm_driver *driver,
  struct pci_driver *pdriver)
 {
return -EINVAL;
 }
 
-static inline void drm_legacy_pci_exit(struct drm_driver *driver,
+static inline void drm_legacy_pci_exit(const struct drm_driver *driver,
   struct pci_driver *pdriver)
 {
 }
-- 
Regards,

Laurent Pinchart

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[PATCH v2 3/3] drm: Constify drm_driver in drivers that don't modify it

A non-const structure containing function pointers is a possible attack
vector. The drm_driver structure is already const in most drivers, but
there are a few exceptions. Constify the structure in the drivers that
don't need to modify at, as a low-hanging fruit. The rest of the drivers
will need a more complex fix.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/arc/arcpgu_drv.c | 2 +-
 drivers/gpu/drm/kmb/kmb_drv.c| 2 +-
 drivers/gpu/drm/tdfx/tdfx_drv.c  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/arc/arcpgu_drv.c b/drivers/gpu/drm/arc/arcpgu_drv.c
index f164818ec477..077d006b1fbf 100644
--- a/drivers/gpu/drm/arc/arcpgu_drv.c
+++ b/drivers/gpu/drm/arc/arcpgu_drv.c
@@ -145,7 +145,7 @@ static void arcpgu_debugfs_init(struct drm_minor *minor)
 }
 #endif
 
-static struct drm_driver arcpgu_drm_driver = {
+static const struct drm_driver arcpgu_drm_driver = {
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
.name = "arcpgu",
.desc = "ARC PGU Controller",
diff --git a/drivers/gpu/drm/kmb/kmb_drv.c b/drivers/gpu/drm/kmb/kmb_drv.c
index a31a840ce634..3c49668ec946 100644
--- a/drivers/gpu/drm/kmb/kmb_drv.c
+++ b/drivers/gpu/drm/kmb/kmb_drv.c
@@ -400,7 +400,7 @@ static void kmb_irq_reset(struct drm_device *drm)
 
 DEFINE_DRM_GEM_CMA_FOPS(fops);
 
-static struct drm_driver kmb_driver = {
+static const struct drm_driver kmb_driver = {
.driver_features = DRIVER_GEM |
DRIVER_MODESET | DRIVER_ATOMIC,
.irq_handler = kmb_isr,
diff --git a/drivers/gpu/drm/tdfx/tdfx_drv.c b/drivers/gpu/drm/tdfx/tdfx_drv.c
index ab699bf0ac5c..58c185c299f4 100644
--- a/drivers/gpu/drm/tdfx/tdfx_drv.c
+++ b/drivers/gpu/drm/tdfx/tdfx_drv.c
@@ -56,7 +56,7 @@ static const struct file_operations tdfx_driver_fops = {
.llseek = noop_llseek,
 };
 
-static struct drm_driver driver = {
+static const struct drm_driver driver = {
.driver_features = DRIVER_LEGACY,
.fops = &tdfx_driver_fops,
.name = DRIVER_NAME,
-- 
Regards,

Laurent Pinchart

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[PATCH v2 0/3] Finish constification of drm_driver in DRM core

Hello,

This patch series finishes the constification of struct drm_driver in
the DRM core by avoiding modifications to the structure for legacy PCI
drivers. This improves security by avoiding function pointers in
writable memory.

The change turned out to be fairly easy, with preparation in patch 1/3
that moves the only non-const field out of drm_driver, and patch 2/3
that finishes the constification in the DRM core. Patch 3/3 is a
low-hanging fruit that constifies the structure in a few drivers.

The remaining non-const drivers modify the structure internally to set
the num_ioctls fields, and in a few cases, change the driver features.
This will require a bit more work to fix these cases.

Laurent Pinchart (3):
  drm: Move legacy device list out of drm_driver
  drm: Use a const drm_driver for legacy PCI devices
  drm: Constify drm_driver in drivers that don't modify it

 drivers/gpu/drm/arc/arcpgu_drv.c |  2 +-
 drivers/gpu/drm/drm_drv.c|  4 
 drivers/gpu/drm/drm_pci.c| 33 +---
 drivers/gpu/drm/kmb/kmb_drv.c|  2 +-
 drivers/gpu/drm/tdfx/tdfx_drv.c  |  2 +-
 include/drm/drm_device.h | 14 +++---
 include/drm/drm_drv.h|  2 --
 include/drm/drm_legacy.h | 10 ++
 8 files changed, 34 insertions(+), 35 deletions(-)

-- 
Regards,

Laurent Pinchart

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[PATCH v2 1/3] drm: Move legacy device list out of drm_driver

The drm_driver structure contains a single field (legacy_dev_list) that
is modified by the DRM core, used to store a linked list of legacy DRM
devices associated with the driver. In order to make the structure
const, move the field out to a global variable. This requires locking
access to the global where the local field didn't require serialization,
but this only affects legacy drivers, and isn't in any hot path.

While at it, compile-out the legacy_dev_list field when DRM_LEGACY isn't
defined.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Daniel Vetter 
Reviewed-by: Emil Velikov 
---
Changes since v1:

- Move the legacy_dev_list to the end of struct drm_device, in the
  existing DRM_LEGACY section
- Drop the kerneldoc comment for legacy_dev_list
---
 drivers/gpu/drm/drm_pci.c | 25 +
 include/drm/drm_device.h  | 10 +++---
 include/drm/drm_drv.h |  2 --
 3 files changed, 20 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index 6dba4b8ce4fe..dfb138aaccba 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -24,6 +24,8 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -36,6 +38,9 @@
 #include "drm_legacy.h"
 
 #ifdef CONFIG_DRM_LEGACY
+/* List of devices hanging off drivers with stealth attach. */
+static LIST_HEAD(legacy_dev_list);
+static DEFINE_MUTEX(legacy_dev_list_lock);
 
 /**
  * drm_pci_alloc - Allocate a PCI consistent memory block, for DMA.
@@ -225,10 +230,11 @@ static int drm_get_pci_dev(struct pci_dev *pdev,
if (ret)
goto err_agp;
 
-   /* No locking needed since shadow-attach is single-threaded since it may
-* only be called from the per-driver module init hook. */
-   if (drm_core_check_feature(dev, DRIVER_LEGACY))
-   list_add_tail(&dev->legacy_dev_list, &driver->legacy_dev_list);
+   if (drm_core_check_feature(dev, DRIVER_LEGACY)) {
+   mutex_lock(&legacy_dev_list_lock);
+   list_add_tail(&dev->legacy_dev_list, &legacy_dev_list);
+   mutex_unlock(&legacy_dev_list_lock);
+   }
 
return 0;
 
@@ -261,7 +267,6 @@ int drm_legacy_pci_init(struct drm_driver *driver, struct 
pci_driver *pdriver)
return -EINVAL;
 
/* If not using KMS, fall back to stealth mode manual scanning. */
-   INIT_LIST_HEAD(&driver->legacy_dev_list);
for (i = 0; pdriver->id_table[i].vendor != 0; i++) {
pid = &pdriver->id_table[i];
 
@@ -304,11 +309,15 @@ void drm_legacy_pci_exit(struct drm_driver *driver, 
struct pci_driver *pdriver)
if (!(driver->driver_features & DRIVER_LEGACY)) {
WARN_ON(1);
} else {
-   list_for_each_entry_safe(dev, tmp, &driver->legacy_dev_list,
+   mutex_lock(&legacy_dev_list_lock);
+   list_for_each_entry_safe(dev, tmp, &legacy_dev_list,
 legacy_dev_list) {
-   list_del(&dev->legacy_dev_list);
-   drm_put_dev(dev);
+   if (dev->driver == driver) {
+   list_del(&dev->legacy_dev_list);
+   drm_put_dev(dev);
+   }
}
+   mutex_unlock(&legacy_dev_list_lock);
}
DRM_INFO("Module unloaded\n");
 }
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index 283a93ce4617..bd5abe7cd48f 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -51,13 +51,6 @@ enum switch_power_state {
  * may contain multiple heads.
  */
 struct drm_device {
-   /**
-* @legacy_dev_list:
-*
-* List of devices per driver for stealth attach cleanup
-*/
-   struct list_head legacy_dev_list;
-
/** @if_version: Highest interface version set */
int if_version;
 
@@ -336,6 +329,9 @@ struct drm_device {
/* Everything below here is for legacy driver, never use! */
/* private: */
 #if IS_ENABLED(CONFIG_DRM_LEGACY)
+   /* List of devices per driver for stealth attach cleanup */
+   struct list_head legacy_dev_list;
+
/* Context handle management - linked list of context handles */
struct list_head ctxlist;
 
diff --git a/include/drm/drm_drv.h b/include/drm/drm_drv.h
index 02787319246a..827838e0a97e 100644
--- a/include/drm/drm_drv.h
+++ b/include/drm/drm_drv.h
@@ -499,8 +499,6 @@ struct drm_driver {
/* Everything below here is for legacy driver, never use! */
/* private: */
 
-   /* List of devices hanging off this driver with stealth attach. */
-   struct list_head legacy_dev_list;
int (*firstopen) (struct drm_device *);
void (*preclose) (struct drm_device *, struct drm_file *file_priv);
int (*dma_ioctl) (struct drm_device *dev, void *data, struct drm_file 
*file_priv);
-- 
Regards,

Laurent Pinchart

Re: [PATCH v3 05/12] drm/ttm: Expose ttm_tt_unpopulate for driver use

2020-12-15 Thread Andrey Grodzovsky



On 11/24/20 11:44 AM, Christian König wrote:

Am 24.11.20 um 17:22 schrieb Andrey Grodzovsky:


On 11/24/20 2:41 AM, Christian König wrote:

Am 23.11.20 um 22:08 schrieb Andrey Grodzovsky:


On 11/23/20 3:41 PM, Christian König wrote:

Am 23.11.20 um 21:38 schrieb Andrey Grodzovsky:


On 11/23/20 3:20 PM, Christian König wrote:

Am 23.11.20 um 21:05 schrieb Andrey Grodzovsky:


On 11/25/20 5:42 AM, Christian König wrote:

Am 21.11.20 um 06:21 schrieb Andrey Grodzovsky:

It's needed to drop iommu backed pages on device unplug
before device's IOMMU group is released.


It would be cleaner if we could do the whole handling in TTM. I also 
need to double check what you are doing with this function.


Christian.



Check patch "drm/amdgpu: Register IOMMU topology notifier per device." 
to see
how i use it. I don't see why this should go into TTM mid-layer - the 
stuff I do inside
is vendor specific and also I don't think TTM is explicitly aware of 
IOMMU ?

Do you mean you prefer the IOMMU notifier to be registered from within TTM
and then use a hook to call into vendor specific handler ?


No, that is really vendor specific.

What I meant is to have a function like ttm_resource_manager_evict_all() 
which you only need to call and all tt objects are unpopulated.



So instead of this BO list i create and later iterate in amdgpu from the 
IOMMU patch you just want to do it within

TTM with a single function ? Makes much more sense.


Yes, exactly.

The list_empty() checks we have in TTM for the LRU are actually not the 
best idea, we should now check the pin_count instead. This way we could 
also have a list of the pinned BOs in TTM.



So from my IOMMU topology handler I will iterate the TTM LRU for the 
unpinned BOs and this new function for the pinned ones  ?
It's probably a good idea to combine both iterations into this new function 
to cover all the BOs allocated on the device.


Yes, that's what I had in my mind as well.






BTW: Have you thought about what happens when we unpopulate a BO while we 
still try to use a kernel mapping for it? That could have unforeseen 
consequences.



Are you asking what happens to kmap or vmap style mapped CPU accesses once 
we drop all the DMA backing pages for a particular BO ? Because for user 
mappings
(mmap) we took care of this with dummy page reroute but indeed nothing was 
done for in kernel CPU mappings.


Yes exactly that.

In other words what happens if we free the ring buffer while the kernel 
still writes to it?


Christian.



While we can't control user application accesses to the mapped buffers 
explicitly and hence we use page fault rerouting
I am thinking that in this  case we may be able to sprinkle 
drm_dev_enter/exit in any such sensitive place were we might

CPU access a DMA buffer from the kernel ?


Yes, I fear we are going to need that.

Things like CPU page table updates, ring buffer accesses and FW memcpy ? Is 
there other places ?


Puh, good question. I have no idea.

Another point is that at this point the driver shouldn't access any such 
buffers as we are at the process finishing the device.
AFAIK there is no page fault mechanism for kernel mappings so I don't think 
there is anything else to do ?


Well there is a page fault handler for kernel mappings, but that one just 
prints the stack trace into the system log and calls BUG(); :)


Long story short we need to avoid any access to released pages after unplug. 
No matter if it's from the kernel or userspace.



I was just about to start guarding with drm_dev_enter/exit CPU accesses from 
kernel to GTT ot VRAM buffers but then i looked more in the code
and seems like ttm_tt_unpopulate just deletes DMA mappings (for the sake of 
device to main memory access). Kernel page table is not touched
until last bo refcount is dropped and the bo is released 
(ttm_bo_release->destroy->amdgpu_bo_destroy->amdgpu_bo_kunmap). This is both
for GTT BOs maped to kernel by kmap (or vmap) and for VRAM BOs mapped by 
ioremap. So as i see it, nothing will bad will happen after we
unpopulate a BO while we still try to use a kernel mapping for it, system memory 
pages backing GTT BOs are still mapped and not freed and for
VRAM BOs same is for the IO physical ranges mapped into the kernel page table 
since iounmap wasn't called yet. I loaded the driver with vm_update_mode=3
meaning all VM updates done using CPU and hasn't seen any OOPs after removing 
the device. I guess i can test it more by allocating GTT and VRAM BOs

and trying to read/write to them after device is removed.

Andrey




Regards,
Christian.



Andrey




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[PATCH] drm: Don't export the drm_gem_dumb_destroy() function

The drm_gem_dumb_destroy() isn't used in drivers, don't export it.

Signed-off-by: Laurent Pinchart 
---
Changes since v1:

- Move function prototype from drm_gem.h to drm_internal.h
- Drop function documentation
- Replace uint32_t with u32
---
 drivers/gpu/drm/drm_dumb_buffers.c |  8 +---
 drivers/gpu/drm/drm_gem.c  | 12 +---
 drivers/gpu/drm/drm_internal.h |  3 +++
 include/drm/drm_gem.h  |  3 ---
 4 files changed, 9 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/drm_dumb_buffers.c 
b/drivers/gpu/drm/drm_dumb_buffers.c
index d18a740fe0f1..ad17fa21cebb 100644
--- a/drivers/gpu/drm/drm_dumb_buffers.c
+++ b/drivers/gpu/drm/drm_dumb_buffers.c
@@ -29,6 +29,7 @@
 #include 
 
 #include "drm_crtc_internal.h"
+#include "drm_internal.h"
 
 /**
  * DOC: overview
@@ -46,9 +47,10 @@
  * KMS frame buffers.
  *
  * To support dumb objects drivers must implement the &drm_driver.dumb_create
- * operation. &drm_driver.dumb_destroy defaults to drm_gem_dumb_destroy() if
- * not set and &drm_driver.dumb_map_offset defaults to
- * drm_gem_dumb_map_offset(). See the callbacks for further details.
+ * and &drm_driver.dumb_map_offset operations (the latter defaults to
+ * drm_gem_dumb_map_offset() if not set). Drivers that don't use GEM handles
+ * additionally need to implement the &drm_driver.dumb_destroy operation. See
+ * the callbacks for further details.
  *
  * Note that dumb objects may not be used for gpu acceleration, as has been
  * attempted on some ARM embedded platforms. Such drivers really must have
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 92f89cee213e..34b2f111c01c 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -335,22 +335,12 @@ int drm_gem_dumb_map_offset(struct drm_file *file, struct 
drm_device *dev,
 }
 EXPORT_SYMBOL_GPL(drm_gem_dumb_map_offset);
 
-/**
- * drm_gem_dumb_destroy - dumb fb callback helper for gem based drivers
- * @file: drm file-private structure to remove the dumb handle from
- * @dev: corresponding drm_device
- * @handle: the dumb handle to remove
- *
- * This implements the &drm_driver.dumb_destroy kms driver callback for drivers
- * which use gem to manage their backing storage.
- */
 int drm_gem_dumb_destroy(struct drm_file *file,
 struct drm_device *dev,
-uint32_t handle)
+u32 handle)
 {
return drm_gem_handle_delete(file, handle);
 }
-EXPORT_SYMBOL(drm_gem_dumb_destroy);
 
 /**
  * drm_gem_handle_create_tail - internal functions to create a handle
diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
index 81d386b5b92a..fad2249ee67b 100644
--- a/drivers/gpu/drm/drm_internal.h
+++ b/drivers/gpu/drm/drm_internal.h
@@ -191,6 +191,9 @@ void drm_gem_unpin(struct drm_gem_object *obj);
 int drm_gem_vmap(struct drm_gem_object *obj, struct dma_buf_map *map);
 void drm_gem_vunmap(struct drm_gem_object *obj, struct dma_buf_map *map);
 
+int drm_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
+u32 handle);
+
 /* drm_debugfs.c drm_debugfs_crc.c */
 #if defined(CONFIG_DEBUG_FS)
 int drm_debugfs_init(struct drm_minor *minor, int minor_id,
diff --git a/include/drm/drm_gem.h b/include/drm/drm_gem.h
index 5e6daa1c982f..240049566592 100644
--- a/include/drm/drm_gem.h
+++ b/include/drm/drm_gem.h
@@ -416,8 +416,5 @@ int drm_gem_fence_array_add_implicit(struct xarray 
*fence_array,
 bool write);
 int drm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
u32 handle, u64 *offset);
-int drm_gem_dumb_destroy(struct drm_file *file,
-struct drm_device *dev,
-uint32_t handle);
 
 #endif /* __DRM_GEM_H__ */
-- 
Regards,

Laurent Pinchart

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[PATCH 2/4] drm: sti: Remove unnecessary drm_plane_cleanup() wrapper

Use the drm_plane_cleanup() function directly as the drm_plane_funcs
.destroy() handler without creating an unnecessary wrapper around it.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/sti/sti_cursor.c | 9 +
 drivers/gpu/drm/sti/sti_gdp.c| 9 +
 drivers/gpu/drm/sti/sti_hqvdp.c  | 9 +
 3 files changed, 3 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/sti/sti_cursor.c b/drivers/gpu/drm/sti/sti_cursor.c
index a98057431023..7476301d7142 100644
--- a/drivers/gpu/drm/sti/sti_cursor.c
+++ b/drivers/gpu/drm/sti/sti_cursor.c
@@ -330,13 +330,6 @@ static const struct drm_plane_helper_funcs 
sti_cursor_helpers_funcs = {
.atomic_disable = sti_cursor_atomic_disable,
 };
 
-static void sti_cursor_destroy(struct drm_plane *drm_plane)
-{
-   DRM_DEBUG_DRIVER("\n");
-
-   drm_plane_cleanup(drm_plane);
-}
-
 static int sti_cursor_late_register(struct drm_plane *drm_plane)
 {
struct sti_plane *plane = to_sti_plane(drm_plane);
@@ -350,7 +343,7 @@ static int sti_cursor_late_register(struct drm_plane 
*drm_plane)
 static const struct drm_plane_funcs sti_cursor_plane_helpers_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
-   .destroy = sti_cursor_destroy,
+   .destroy = drm_plane_cleanup,
.reset = sti_plane_reset,
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 2d5a2b5b78b8..2f4a34f14d33 100644
--- a/drivers/gpu/drm/sti/sti_gdp.c
+++ b/drivers/gpu/drm/sti/sti_gdp.c
@@ -884,13 +884,6 @@ static const struct drm_plane_helper_funcs 
sti_gdp_helpers_funcs = {
.atomic_disable = sti_gdp_atomic_disable,
 };
 
-static void sti_gdp_destroy(struct drm_plane *drm_plane)
-{
-   DRM_DEBUG_DRIVER("\n");
-
-   drm_plane_cleanup(drm_plane);
-}
-
 static int sti_gdp_late_register(struct drm_plane *drm_plane)
 {
struct sti_plane *plane = to_sti_plane(drm_plane);
@@ -902,7 +895,7 @@ static int sti_gdp_late_register(struct drm_plane 
*drm_plane)
 static const struct drm_plane_funcs sti_gdp_plane_helpers_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
-   .destroy = sti_gdp_destroy,
+   .destroy = drm_plane_cleanup,
.reset = sti_plane_reset,
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
diff --git a/drivers/gpu/drm/sti/sti_hqvdp.c b/drivers/gpu/drm/sti/sti_hqvdp.c
index 5a4e12194a77..62f824cd5f21 100644
--- a/drivers/gpu/drm/sti/sti_hqvdp.c
+++ b/drivers/gpu/drm/sti/sti_hqvdp.c
@@ -1262,13 +1262,6 @@ static const struct drm_plane_helper_funcs 
sti_hqvdp_helpers_funcs = {
.atomic_disable = sti_hqvdp_atomic_disable,
 };
 
-static void sti_hqvdp_destroy(struct drm_plane *drm_plane)
-{
-   DRM_DEBUG_DRIVER("\n");
-
-   drm_plane_cleanup(drm_plane);
-}
-
 static int sti_hqvdp_late_register(struct drm_plane *drm_plane)
 {
struct sti_plane *plane = to_sti_plane(drm_plane);
@@ -1282,7 +1275,7 @@ static int sti_hqvdp_late_register(struct drm_plane 
*drm_plane)
 static const struct drm_plane_funcs sti_hqvdp_plane_helpers_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
-   .destroy = sti_hqvdp_destroy,
+   .destroy = drm_plane_cleanup,
.reset = sti_plane_reset,
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
-- 
Regards,

Laurent Pinchart

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[PATCH 3/4] drm: vc4: Remove unnecessary drm_plane_cleanup() wrapper

Use the drm_plane_cleanup() function directly as the drm_plane_funcs
.destroy() handler without creating an unnecessary wrapper around it.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/vc4/vc4_plane.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 6b39cc2ca18d..6bd8260aa9f2 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -1268,11 +1268,6 @@ static const struct drm_plane_helper_funcs 
vc4_plane_helper_funcs = {
.atomic_async_update = vc4_plane_atomic_async_update,
 };
 
-static void vc4_plane_destroy(struct drm_plane *plane)
-{
-   drm_plane_cleanup(plane);
-}
-
 static bool vc4_format_mod_supported(struct drm_plane *plane,
 uint32_t format,
 uint64_t modifier)
@@ -1323,7 +1318,7 @@ static bool vc4_format_mod_supported(struct drm_plane 
*plane,
 static const struct drm_plane_funcs vc4_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
-   .destroy = vc4_plane_destroy,
+   .destroy = drm_plane_cleanup,
.set_property = NULL,
.reset = vc4_plane_reset,
.atomic_duplicate_state = vc4_plane_duplicate_state,
-- 
Regards,

Laurent Pinchart

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[PATCH 4/4] drm: zte: Remove unnecessary drm_plane_cleanup() wrapper

Use the drm_plane_cleanup() function directly as the drm_plane_funcs
.destroy() handler without creating an unnecessary wrapper around it.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/zte/zx_plane.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/zte/zx_plane.c b/drivers/gpu/drm/zte/zx_plane.c
index c8f7b21fa09e..78d787afe594 100644
--- a/drivers/gpu/drm/zte/zx_plane.c
+++ b/drivers/gpu/drm/zte/zx_plane.c
@@ -438,15 +438,10 @@ static const struct drm_plane_helper_funcs 
zx_gl_plane_helper_funcs = {
.atomic_disable = zx_plane_atomic_disable,
 };
 
-static void zx_plane_destroy(struct drm_plane *plane)
-{
-   drm_plane_cleanup(plane);
-}
-
 static const struct drm_plane_funcs zx_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
-   .destroy = zx_plane_destroy,
+   .destroy = drm_plane_cleanup,
.reset = drm_atomic_helper_plane_reset,
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
-- 
Regards,

Laurent Pinchart

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[PATCH 1/4] drm: arc: Remove unnecessary drm_plane_cleanup() wrapper

Use the drm_plane_cleanup() function directly as the drm_plane_funcs
.destroy() handler without creating an unnecessary wrapper around it.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/arc/arcpgu_crtc.c | 9 ++---
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c 
b/drivers/gpu/drm/arc/arcpgu_crtc.c
index 042d7b54a6de..895cdd991af6 100644
--- a/drivers/gpu/drm/arc/arcpgu_crtc.c
+++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
@@ -162,15 +162,10 @@ static const struct drm_plane_helper_funcs 
arc_pgu_plane_helper_funcs = {
.atomic_update = arc_pgu_plane_atomic_update,
 };
 
-static void arc_pgu_plane_destroy(struct drm_plane *plane)
-{
-   drm_plane_cleanup(plane);
-}
-
 static const struct drm_plane_funcs arc_pgu_plane_funcs = {
.update_plane   = drm_atomic_helper_update_plane,
.disable_plane  = drm_atomic_helper_disable_plane,
-   .destroy= arc_pgu_plane_destroy,
+   .destroy= drm_plane_cleanup,
.reset  = drm_atomic_helper_plane_reset,
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
.atomic_destroy_state   = drm_atomic_helper_plane_destroy_state,
@@ -213,7 +208,7 @@ int arc_pgu_setup_crtc(struct drm_device *drm)
ret = drm_crtc_init_with_planes(drm, &arcpgu->crtc, primary, NULL,
&arc_pgu_crtc_funcs, NULL);
if (ret) {
-   arc_pgu_plane_destroy(primary);
+   drm_plane_cleanup(primary);
return ret;
}
 
-- 
Regards,

Laurent Pinchart

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Re: [radeon-alex:amd-20.45 1953/2427] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:5: warning: no previous prototype for function 'dce60_get_dp_ref_freq_khz'

2020-12-15 Thread Deucher, Alexander

[AMD Public Use]

this branch should be ignored by test robots.  It's just a public mirror of our 
packaged driver source code.  It contains kernel compatibility and dkms support 
which is not going upstream.

Alex


From: Mauro Rossi 
Sent: Tuesday, December 15, 2020 2:13 PM
To: kernel test robot ; Deucher, Alexander 

Cc: kbuild-...@lists.01.org ; 
clang-built-li...@googlegroups.com ; ML 
dri-devel ; Xiong, Yang (Felix) 

Subject: Re: [radeon-alex:amd-20.45 1953/2427] 
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:5: 
warning: no previous prototype for function 'dce60_get_dp_ref_freq_khz'

Hello,
the mentioned branch requires the following commit, but it is already applied 
in 5.10 released kernel,
so I really do not know what next step here.

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8c4e4fd607b17973e54a7e9cc4c275b12ab7308e

Mauro

On Tue, Dec 15, 2020 at 11:24 AM kernel test robot 
mailto:l...@intel.com>> wrote:
tree:   
git://people.freedesktop.org/~agd5f/linux.git
 amd-20.45
head:   a3950d94b046fb206e58fd3ec717f071c0203ba3
commit: e809646e73921328d66a2fbfddf067b9cdb30998 [1953/2427] drm/amd/display: 
enable SI support in the Kconfig (v2)
config: x86_64-randconfig-a001-20201214 (attached as .config)
compiler: clang version 12.0.0 
(https://github.com/llvm/llvm-project
 a29ecca7819a6ed4250d3689b12b1f664bb790d7)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
git remote add radeon-alex 
git://people.freedesktop.org/~agd5f/linux.git
git fetch --no-tags radeon-alex amd-20.45
git checkout e809646e73921328d66a2fbfddf067b9cdb30998
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot mailto:l...@intel.com>>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:5: 
>> warning: no previous prototype for function 'dce60_get_dp_ref_freq_khz' 
>> [-Wmissing-prototypes]
   int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
   ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:1: 
note: declare 'static' if the function is not intended to be used outside of 
this translation unit
   int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
   ^
   static
   1 warning generated.

vim +/dce60_get_dp_ref_freq_khz +83 
drivers/gpu/drm/amd/am

Re: [PATCH -next] drm: omapdrm: Delete useless kfree code


On 14/12/2020 15:46, Zheng Yongjun wrote:

The parameter of kfree function is NULL, so kfree code is useless, delete it.

Signed-off-by: Zheng Yongjun 
---
  drivers/gpu/drm/omapdrm/tcm-sita.c | 1 -
  1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/tcm-sita.c 
b/drivers/gpu/drm/omapdrm/tcm-sita.c
index 817be3c41863..af59e9c03917 100644
--- a/drivers/gpu/drm/omapdrm/tcm-sita.c
+++ b/drivers/gpu/drm/omapdrm/tcm-sita.c
@@ -254,6 +254,5 @@ struct tcm *sita_init(u16 width, u16 height)
return tcm;
  
  error:

-   kfree(tcm);
return NULL;
  }


Thanks, I'll merge this.

 Tomi

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Re: [radeon-alex:amd-20.45 1953/2427] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:5: warning: no previous prototype for function 'dce60_get_dp_ref_freq_khz'

2020-12-15 Thread Mauro Rossi

Hello,
the mentioned branch requires the following commit, but it is already
applied in 5.10 released kernel,
so I really do not know what next step here.

https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8c4e4fd607b17973e54a7e9cc4c275b12ab7308e

Mauro

On Tue, Dec 15, 2020 at 11:24 AM kernel test robot  wrote:

> tree:   git://people.freedesktop.org/~agd5f/linux.git amd-20.45
> head:   a3950d94b046fb206e58fd3ec717f071c0203ba3
> commit: e809646e73921328d66a2fbfddf067b9cdb30998 [1953/2427]
> drm/amd/display: enable SI support in the Kconfig (v2)
> config: x86_64-randconfig-a001-20201214 (attached as .config)
> compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
> a29ecca7819a6ed4250d3689b12b1f664bb790d7)
> reproduce (this is a W=1 build):
> wget
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
> -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install x86_64 cross compiling tool for clang build
> # apt-get install binutils-x86-64-linux-gnu
> git remote add radeon-alex git://
> people.freedesktop.org/~agd5f/linux.git
> git fetch --no-tags radeon-alex amd-20.45
> git checkout e809646e73921328d66a2fbfddf067b9cdb30998
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross
> ARCH=x86_64
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot 
>
> All warnings (new ones prefixed by >>):
>
> >>
> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:5:
> warning: no previous prototype for function 'dce60_get_dp_ref_freq_khz'
> [-Wmissing-prototypes]
>int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
>^
>
>  drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:1:
> note: declare 'static' if the function is not intended to be used outside
> of this translation unit
>int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
>^
>static
>1 warning generated.
>
> vim +/dce60_get_dp_ref_freq_khz +83
> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c
>
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   82
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11  @83  int
> dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   84  {
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   85 struct clk_mgr_internal
> *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   86 int dprefclk_wdivider;
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   87 int dp_ref_clk_khz;
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   88 int target_div;
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   89
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   90 /* DCE6 has no
> DPREFCLK_CNTL to read DP Reference Clock source */
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   91
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   92 /* Read the
> mmDENTIST_DISPCLK_CNTL to get the currently
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   93  * programmed DID
> DENTIST_DPREFCLK_WDIVIDER*/
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   94
>  REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER,
> &dprefclk_wdivider);
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   95
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   96 /* Convert
> DENTIST_DPREFCLK_WDIVIDERto actual divider*/
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   97 target_div =
> dentist_get_divider_from_did(dprefclk_wdivider);
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   98
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11   99 /* Calculate the current
> DFS clock, in kHz.*/
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11  100 dp_ref_clk_khz =
> (DENTIST_DIVIDER_RANGE_SCALE_FACTOR
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11  101 *
> clk_mgr->base.dentist_vco_freq_khz) / target_div;
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11  102
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11  103 return
> dce_adjust_dp_ref_freq_for_ss(clk_mgr, dp_ref_clk_khz);
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11  104  }
> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11  105
>
> :: The code at line 83 was first introduced by commit
> :: 2428ad5c6ece1a6861278c01c5e71c8ea258f3d9 drm/amd/display:
> dc/clk_mgr: add support for SI parts (v2)
>
> :: TO: Mauro Rossi 
> :: CC: Yang Xiong 
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
>
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Re: [PATCH] drm/i915: remove h from printk format specifier

2020-12-15 Thread Tom Rix



On 12/15/20 10:13 AM, Chris Wilson wrote:
> Quoting t...@redhat.com (2020-12-15 14:41:01)
>> From: Tom Rix 
>>
>> See Documentation/core-api/printk-formats.rst.
>> h should no longer be used in the format specifier for printk.
> It's understood by format_decode().
> * 'h', 'l', or 'L' for integer fields
>
> At least reference commit cbacb5ab0aa0 ("docs: printk-formats: Stop
> encouraging use of unnecessary %h[xudi] and %hh[xudi]") as to why the
> printk-formats.rst was altered so we know the code is merely in bad
> taste and not using undefined behaviour of printk.

Ok, i will fix this after the first run of patches.

Tom

> -Chris
>

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Re: [PATCH] drm: rcar-du: fix reference leak in rcar_cmm_enable

Hi Qinglang,

Thank you for the patch.

On Fri, Nov 27, 2020 at 05:44:44PM +0800, Qinglang Miao wrote:
> pm_runtime_get_sync will increment pm usage counter even it
> failed. Forgetting to putting operation will result in a
> reference leak here.
> 
> A new function pm_runtime_resume_and_get is introduced in
> [0] to keep usage counter balanced. So We fix the reference
> leak by replacing it with new funtion.
> 
> [0] dd8088d5a896 ("PM: runtime: Add  pm_runtime_resume_and_get to deal with 
> usage counter")
> 
> Fixes: e08e934d6c28 ("drm: rcar-du: Add support for CMM")
> Reported-by: Hulk Robot 
> Signed-off-by: Qinglang Miao 

Reviewed-by: Laurent Pinchart 

And queued for v5.11.

> ---
>  drivers/gpu/drm/rcar-du/rcar_cmm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.c 
> b/drivers/gpu/drm/rcar-du/rcar_cmm.c
> index c578095b0..382d53f8a 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_cmm.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_cmm.c
> @@ -122,7 +122,7 @@ int rcar_cmm_enable(struct platform_device *pdev)
>  {
>   int ret;
>  
> - ret = pm_runtime_get_sync(&pdev->dev);
> + ret = pm_runtime_resume_and_get(&pdev->dev);
>   if (ret < 0)
>   return ret;
>  

-- 
Regards,

Laurent Pinchart
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Re: [PATCH] drm/i915: remove h from printk format specifier

2020-12-15 Thread Chris Wilson

Quoting t...@redhat.com (2020-12-15 14:41:01)
> From: Tom Rix 
> 
> See Documentation/core-api/printk-formats.rst.
> h should no longer be used in the format specifier for printk.

It's understood by format_decode().
* 'h', 'l', or 'L' for integer fields

At least reference commit cbacb5ab0aa0 ("docs: printk-formats: Stop
encouraging use of unnecessary %h[xudi] and %hh[xudi]") as to why the
printk-formats.rst was altered so we know the code is merely in bad
taste and not using undefined behaviour of printk.
-Chris
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Re: [PATCH v7 9/9] drm/vc4: hdmi: Enable 10/12 bpc output

2020-12-15 Thread Dave Stevenson

Hi Maxime

On Tue, 15 Dec 2020 at 15:43, Maxime Ripard  wrote:
>
> The BCM2711 supports higher bpc count than just 8, so let's support it in
> our driver.
>
> Signed-off-by: Maxime Ripard 

Reviewed-by: Dave Stevenson 


> ---
>  drivers/gpu/drm/vc4/vc4_hdmi.c  | 70 -
>  drivers/gpu/drm/vc4/vc4_hdmi.h  |  1 +
>  drivers/gpu/drm/vc4/vc4_hdmi_regs.h |  9 
>  3 files changed, 79 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> index 41897b8e9d51..2e5449b25ce4 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> @@ -76,6 +76,17 @@
>  #define VC5_HDMI_VERTB_VSPO_SHIFT  16
>  #define VC5_HDMI_VERTB_VSPO_MASK   VC4_MASK(29, 16)
>
> +#define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_SHIFT 8
> +#define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_MASK  VC4_MASK(10, 
> 8)
> +
> +#define VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH_SHIFT 0
> +#define VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH_MASK  VC4_MASK(3, 0)
> +
> +#define VC5_HDMI_GCP_CONFIG_GCP_ENABLE BIT(31)
> +
> +#define VC5_HDMI_GCP_WORD_1_GCP_SUBPACKET_BYTE_1_SHIFT 8
> +#define VC5_HDMI_GCP_WORD_1_GCP_SUBPACKET_BYTE_1_MASK  VC4_MASK(15, 8)
> +
>  # define VC4_HD_M_SW_RST   BIT(2)
>  # define VC4_HD_M_ENABLE   BIT(0)
>
> @@ -186,6 +197,8 @@ static void vc4_hdmi_connector_reset(struct drm_connector 
> *connector)
> if (!new_state)
> return;
>
> +   new_state->base.max_bpc = 8;
> +   new_state->base.max_requested_bpc = 8;
> drm_atomic_helper_connector_tv_reset(connector);
>  }
>
> @@ -232,12 +245,20 @@ static int vc4_hdmi_connector_init(struct drm_device 
> *dev,
> vc4_hdmi->ddc);
> drm_connector_helper_add(connector, &vc4_hdmi_connector_helper_funcs);
>
> +   /*
> +* Some of the properties below require access to state, like bpc.
> +* Allocate some default initial connector state with our reset 
> helper.
> +*/
> +   if (connector->funcs->reset)
> +   connector->funcs->reset(connector);
> +
> /* Create and attach TV margin props to this connector. */
> ret = drm_mode_create_tv_margin_properties(dev);
> if (ret)
> return ret;
>
> drm_connector_attach_tv_margin_properties(connector);
> +   drm_connector_attach_max_bpc_property(connector, 8, 12);
>
> connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
>  DRM_CONNECTOR_POLL_DISCONNECT);
> @@ -506,6 +527,7 @@ static void vc5_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, 
> bool enable)
>  }
>
>  static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
> +struct drm_connector_state *state,
>  struct drm_display_mode *mode)
>  {
> bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
> @@ -549,7 +571,9 @@ static void vc4_hdmi_set_timings(struct vc4_hdmi 
> *vc4_hdmi,
> HDMI_WRITE(HDMI_VERTB0, vertb_even);
> HDMI_WRITE(HDMI_VERTB1, vertb);
>  }
> +
>  static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
> +struct drm_connector_state *state,
>  struct drm_display_mode *mode)
>  {
> bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
> @@ -569,6 +593,9 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi 
> *vc4_hdmi,
> mode->crtc_vsync_end -
> interlaced,
> VC4_HDMI_VERTB_VBP));
> +   unsigned char gcp;
> +   bool gcp_en;
> +   u32 reg;
>
> HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021);
> HDMI_WRITE(HDMI_HORZA,
> @@ -594,6 +621,39 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi 
> *vc4_hdmi,
> HDMI_WRITE(HDMI_VERTB0, vertb_even);
> HDMI_WRITE(HDMI_VERTB1, vertb);
>
> +   switch (state->max_bpc) {
> +   case 12:
> +   gcp = 6;
> +   gcp_en = true;
> +   break;
> +   case 10:
> +   gcp = 5;
> +   gcp_en = true;
> +   break;
> +   case 8:
> +   default:
> +   gcp = 4;
> +   gcp_en = false;
> +   break;
> +   }
> +
> +   reg = HDMI_READ(HDMI_DEEP_COLOR_CONFIG_1);
> +   reg &= ~(VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_MASK |
> +VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH_MASK);
> +   reg |= VC4_SET_FIELD(2, VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE) 
> |
> +  VC4_SET_FIELD(gcp, VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH);
> +   HDMI_WRITE(HDMI_DEEP_COLOR_CONFIG_1, reg);
> +
> +   reg = HDMI_READ(HDMI_GCP_WORD_1);
> +   reg &= ~VC5_HDMI_GCP_WORD_1_GCP_SUBPACKET_BYTE_1_MASK;
>

Re: [PATCH v4 1/2] drm: automatic legacy gamma support


On 11/12/2020 13:42, Tomi Valkeinen wrote:


+/**
+ * drm_crtc_supports_legacy_gamma - does the crtc support legacy gamma 
correction table
+ * @crtc: CRTC object
+ *
+ * Returns true/false if the given crtc supports setting the legacy gamma
+ * correction table.
+ */
+static bool drm_crtc_supports_legacy_gamma(struct drm_crtc *crtc)
+{
+   uint32_t gamma_id = crtc->dev->mode_config.gamma_lut_property->base.id;


Userspace-mode strikes again... I'll change uint32_t's to u32 while applying. (But in my defense, 
there were uint32_t uses already in the code touched by these patches, and drm seems to have lots of 
uint32_t all around...)


 Tomi

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[PATCH] dt-bindings: display: bridge: tc358768: Remove maintainer information

2020-12-15 Thread Peter Ujfalusi

My employment with TI is coming to an end and I will not have access to
the board where this bridge is connected to.

It is better to remove a soon bouncing email address.

Signed-off-by: Peter Ujfalusi 
---
 .../devicetree/bindings/display/bridge/toshiba,tc358768.yaml   | 3 ---
 1 file changed, 3 deletions(-)

diff --git 
a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml 
b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml
index c036a75db8f7..454ab8032b97 100644
--- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml
@@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 
 title: Toschiba TC358768/TC358778 Parallel RGB to MIPI DSI bridge
 
-maintainers:
-  - Peter Ujfalusi 
-
 description: |
   The TC358768/TC358778 is bridge device which converts RGB to DSI.
 
-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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Re: [PULL] drm-misc-next-fixes

2020-12-15 Thread Daniel Vetter

On Tue, Dec 15, 2020 at 02:04:31PM +0100, Thomas Zimmermann wrote:
> Hi Dave and Daniel,
> 
> here's this week's PR for drm-misc-next-fixes. IIRC the radeon fix is
> already in drm-misc-next.

Pulled, and also your previous -next pull which got stuck somewhere.

Thanks, Daniel

> 
> Best regards
> Thomas
> 
> drm-misc-next-fixes-2020-12-15:
> Short summary of fixes pull (less than what git shortlog provides):
> 
>  * dma-buf: Fix docs
>  * mxsfb: Silence invalid error message
>  * radeon: Fix TTM multihop
> 
> The following changes since commit 05faf1559de52465f1e753e31883aa294e6179c1:
> 
>   drm/imx/dcss: allow using nearest neighbor interpolation scaling 
> (2020-11-26 11:29:44 +0100)
> 
> are available in the Git repository at:
> 
>   git://anongit.freedesktop.org/drm/drm-misc 
> tags/drm-misc-next-fixes-2020-12-15
> 
> for you to fetch changes up to ee46d16d2e40bebc2aa790fd7b6a056466ff895c:
> 
>   drm: mxsfb: Silence -EPROBE_DEFER while waiting for bridge (2020-12-15 
> 11:01:10 +0100)
> 
> 
> Short summary of fixes pull (less than what git shortlog provides):
> 
>  * dma-buf: Fix docs
>  * mxsfb: Silence invalid error message
>  * radeon: Fix TTM multihop
> 
> 
> Christian König (1):
>   drm/radeon: fix check order in radeon_bo_move
> 
> Daniel Vetter (1):
>   dma-buf: Fix kerneldoc formatting
> 
> Guido Günther (1):
>   drm: mxsfb: Silence -EPROBE_DEFER while waiting for bridge
> 
>  Documentation/driver-api/dma-buf.rst |  2 +-
>  drivers/gpu/drm/mxsfb/mxsfb_drv.c| 10 +++
>  drivers/gpu/drm/radeon/radeon_ttm.c  | 54 
> 
>  include/linux/dma-buf-map.h  |  2 +-
>  4 files changed, 30 insertions(+), 38 deletions(-)
> 
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Maxfeldstr. 5, 90409 Nürnberg, Germany
> (HRB 36809, AG Nürnberg)
> Geschäftsführer: Felix Imendörffer

-- 
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http://blog.ffwll.ch
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Re: [PATCH v7 5/9] drm/vc4: hdmi: Create a custom connector state

2020-12-15 Thread Dave Stevenson

Hi Maxime

On Tue, 15 Dec 2020 at 15:42, Maxime Ripard  wrote:
>
> When run with a higher bpc than 8, the clock of the HDMI controller needs
> to be adjusted. Let's create a connector state that will be used at
> atomic_check and atomic_enable to compute and store the clock rate
> associated to the state.
>
> Acked-by: Thomas Zimmermann 
> Signed-off-by: Maxime Ripard 

I'm happy again
Reviewed-by: Dave Stevenson 

> ---
>  drivers/gpu/drm/vc4/vc4_hdmi.c | 33 ++---
>  drivers/gpu/drm/vc4/vc4_hdmi.h | 10 ++
>  2 files changed, 40 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> index 920895deb2e7..d22a0dbd0ce2 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> @@ -170,10 +170,37 @@ static int vc4_hdmi_connector_get_modes(struct 
> drm_connector *connector)
>
>  static void vc4_hdmi_connector_reset(struct drm_connector *connector)
>  {
> -   drm_atomic_helper_connector_reset(connector);
> +   struct vc4_hdmi_connector_state *old_state =
> +   conn_state_to_vc4_hdmi_conn_state(connector->state);
> +   struct vc4_hdmi_connector_state *new_state =
> +   kzalloc(sizeof(*new_state), GFP_KERNEL);
>
> if (connector->state)
> -   drm_atomic_helper_connector_tv_reset(connector);
> +   __drm_atomic_helper_connector_destroy_state(connector->state);
> +
> +   kfree(old_state);
> +   __drm_atomic_helper_connector_reset(connector, &new_state->base);
> +
> +   if (!new_state)
> +   return;
> +
> +   drm_atomic_helper_connector_tv_reset(connector);
> +}
> +
> +static struct drm_connector_state *
> +vc4_hdmi_connector_duplicate_state(struct drm_connector *connector)
> +{
> +   struct drm_connector_state *conn_state = connector->state;
> +   struct vc4_hdmi_connector_state *vc4_state = 
> conn_state_to_vc4_hdmi_conn_state(conn_state);
> +   struct vc4_hdmi_connector_state *new_state;
> +
> +   new_state = kzalloc(sizeof(*new_state), GFP_KERNEL);
> +   if (!new_state)
> +   return NULL;
> +
> +   __drm_atomic_helper_connector_duplicate_state(connector, 
> &new_state->base);
> +
> +   return &new_state->base;
>  }
>
>  static const struct drm_connector_funcs vc4_hdmi_connector_funcs = {
> @@ -181,7 +208,7 @@ static const struct drm_connector_funcs 
> vc4_hdmi_connector_funcs = {
> .fill_modes = drm_helper_probe_single_connector_modes,
> .destroy = vc4_hdmi_connector_destroy,
> .reset = vc4_hdmi_connector_reset,
> -   .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> +   .atomic_duplicate_state = vc4_hdmi_connector_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
>  };
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
> index 0526a9cf608a..2cf5362052e2 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.h
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
> @@ -180,6 +180,16 @@ encoder_to_vc4_hdmi(struct drm_encoder *encoder)
> return container_of(_encoder, struct vc4_hdmi, encoder);
>  }
>
> +struct vc4_hdmi_connector_state {
> +   struct drm_connector_state  base;
> +};
> +
> +static inline struct vc4_hdmi_connector_state *
> +conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state)
> +{
> +   return container_of(conn_state, struct vc4_hdmi_connector_state, 
> base);
> +}
> +
>  void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
>struct drm_display_mode *mode);
>  void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
> --
> 2.29.2
>
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Re: [PATCH v2, 03/17] dt-bindings: mediatek: add description for mt8192 display

2020-12-15 Thread Rob Herring

On Sat, 12 Dec 2020 12:11:43 +0800, Yongqiang Niu wrote:
> add description for mt8192 display
> 
> Signed-off-by: Yongqiang Niu 
> ---
>  Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Acked-by: Rob Herring 
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Re: [PATCH v2, 01/17] dt-bindings: mediatek: add description for postmask

2020-12-15 Thread Rob Herring

On Sat, Dec 12, 2020 at 12:11:41PM +0800, Yongqiang Niu wrote:
> add description for postmask
> 
> Signed-off-by: Yongqiang Niu 
> ---
>  Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git 
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt 
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> index 5ca693a..1972fa7 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> @@ -37,6 +37,7 @@ Required properties (all function blocks):
>   "mediatek,-disp-aal"  - adaptive ambient light 
> controller
>   "mediatek,-disp-gamma"- gamma correction
>   "mediatek,-disp-merge"- merge streams from two RDMA 
> sources
> + "mediatek,-disp-postmask" - post mask

Needs a better explanation. What's the type? Constraints on the values?

>   "mediatek,-disp-split"- split stream to two encoders
>   "mediatek,-disp-ufoe" - data compression engine
>   "mediatek,-dsi"   - DSI controller, see 
> mediatek,dsi.txt
> -- 
> 1.8.1.1.dirty
> 
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Re: [PATCH v6 1/5] drm: Add function to convert rect in 16.16 fixed format to regular format

2020-12-15 Thread Ville Syrjälä

On Tue, Dec 15, 2020 at 03:43:00PM +, Souza, Jose wrote:
> On Tue, 2020-12-15 at 16:44 +0200, Ville Syrjälä wrote:
> > On Mon, Dec 14, 2020 at 09:49:08AM -0800, José Roberto de Souza wrote:
> > > Much more clear to read one function call than four lines doing this
> > > conversion.
> > > 
> > > Cc: dri-devel@lists.freedesktop.org
> > > Cc: Gwan-gyeong Mun 
> > > Signed-off-by: José Roberto de Souza 
> > > ---
> > >  drivers/gpu/drm/drm_rect.c | 15 +++
> > >  include/drm/drm_rect.h |  2 ++
> > >  2 files changed, 17 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/drm_rect.c b/drivers/gpu/drm/drm_rect.c
> > > index 0460e874896e..24345704b353 100644
> > > --- a/drivers/gpu/drm/drm_rect.c
> > > +++ b/drivers/gpu/drm/drm_rect.c
> > > @@ -373,3 +373,18 @@ void drm_rect_rotate_inv(struct drm_rect *r,
> > >   }
> > >  }
> > >  EXPORT_SYMBOL(drm_rect_rotate_inv);
> > > +
> > > +/**
> > > + * drm_rect_convert_16_16_to_regular - Convert a rect in 16.16 fixed 
> > > point form
> > > + * to regular form.
> > > + * @in: rect in 16.16 fixed point form
> > > + * @out: rect to be stored the converted value
> > > + */
> > > +void drm_rect_convert_16_16_to_regular(struct drm_rect *in, struct 
> > > drm_rect *out)
> > > +{
> > > + out->x1 = in->x1 >> 16;
> > > + out->y1 = in->y1 >> 16;
> > > + out->x2 = in->x2 >> 16;
> > > + out->y2 = in->y2 >> 16;
> > > +}
> > 
> > That's not the same as what we do in most places. We truncate
> > the width/height, not x2/y2. Doing it on x2/y2 may increase
> > the width/height.
> > 
> > So I suggest something more like:
> > 
> > static inline void drm_rect_fp_to_int(struct drm_rect *r)
> > {
> > drm_rect_init(r, r->x1 >> 16, r->y1 >> 16,
> >   drm_rect_width(r) >> 16,
> >   drm_rect_height(r) >> 16);
> > }
> > 
> > to match the current way of doing things.
> 
> Okay, but most use cases takes drm_plane_state.src and converts and sets it 
> in another rect, so will modify it to have two parameters.

Would seem a bit more generic by having the caller make the copy
if needed. But I guess not big deal either way.

At least make it follow the correct argument order as laid out
by memcpy() ;) (+const for the input argument ofc).

-- 
Ville Syrjälä
Intel
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Re: [PATCH v6 1/5] drm: Add function to convert rect in 16.16 fixed format to regular format

2020-12-15 Thread Souza, Jose

On Tue, 2020-12-15 at 16:44 +0200, Ville Syrjälä wrote:
> On Mon, Dec 14, 2020 at 09:49:08AM -0800, José Roberto de Souza wrote:
> > Much more clear to read one function call than four lines doing this
> > conversion.
> > 
> > Cc: dri-devel@lists.freedesktop.org
> > Cc: Gwan-gyeong Mun 
> > Signed-off-by: José Roberto de Souza 
> > ---
> >  drivers/gpu/drm/drm_rect.c | 15 +++
> >  include/drm/drm_rect.h |  2 ++
> >  2 files changed, 17 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_rect.c b/drivers/gpu/drm/drm_rect.c
> > index 0460e874896e..24345704b353 100644
> > --- a/drivers/gpu/drm/drm_rect.c
> > +++ b/drivers/gpu/drm/drm_rect.c
> > @@ -373,3 +373,18 @@ void drm_rect_rotate_inv(struct drm_rect *r,
> >     }
> >  }
> >  EXPORT_SYMBOL(drm_rect_rotate_inv);
> > +
> > +/**
> > + * drm_rect_convert_16_16_to_regular - Convert a rect in 16.16 fixed point 
> > form
> > + * to regular form.
> > + * @in: rect in 16.16 fixed point form
> > + * @out: rect to be stored the converted value
> > + */
> > +void drm_rect_convert_16_16_to_regular(struct drm_rect *in, struct 
> > drm_rect *out)
> > +{
> > +   out->x1 = in->x1 >> 16;
> > +   out->y1 = in->y1 >> 16;
> > +   out->x2 = in->x2 >> 16;
> > +   out->y2 = in->y2 >> 16;
> > +}
> 
> That's not the same as what we do in most places. We truncate
> the width/height, not x2/y2. Doing it on x2/y2 may increase
> the width/height.
> 
> So I suggest something more like:
> 
> static inline void drm_rect_fp_to_int(struct drm_rect *r)
> {
>   drm_rect_init(r, r->x1 >> 16, r->y1 >> 16,
> drm_rect_width(r) >> 16,
> drm_rect_height(r) >> 16);
> }
> 
> to match the current way of doing things.

Okay, but most use cases takes drm_plane_state.src and converts and sets it in 
another rect, so will modify it to have two parameters.


> 

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Re: [PATCH 4/9] drm: rcar-du: Use DRM-managed allocation for VSP planes

2020-12-15 Thread Geert Uytterhoeven

Hi Laurent,

On Mon, Dec 14, 2020 at 5:28 PM Laurent Pinchart
 wrote:
> On Mon, Dec 14, 2020 at 04:20:17PM +, Kieran Bingham wrote:
> > On 04/12/2020 22:01, Laurent Pinchart wrote:
> > > devm_kcalloc() is the wrong API to allocate planes, as the lifetime of
> > > the planes is tied to the DRM device, not the device to driver
> > > binding. drmm_kcalloc() isn't a good option either, as it would result
> > > in the planes being freed before being unregistered during the managed
> > > cleanup of the DRM objects. Use a plain kcalloc(), and cleanup the
> > > planes and free the memory in the existing rcar_du_vsp_cleanup()
> > > handler.
> >
> > Managed memory always seems to hurt - which is a shame, because it
> > should be better throughout.
> >
> > It's like we need a way to arbitrarily specify the lifetimes of objects
> > correctly against another object... without being tied to a dev ...
>
> I've been saying for years that devm_kzalloc() is a major regression.
> We've traded a memory leak for a use-after-free. The function has its
> use cases, there are objects that need to match the lifetime of the
> binding between a device and its driver, but that's a small minority.

https://en.wikipedia.org/wiki/The_law_of_conservation_of_misery

Gr{oetje,eeting}s,

Geert

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when I'm talking to journalists I just say "programmer" or something like that.
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Re: [PATCH] drm/amdgpu: remove h from printk format specifier

2020-12-15 Thread Alex Deucher

On Tue, Dec 15, 2020 at 10:11 AM Christian König
 wrote:
>
> Am 15.12.20 um 16:06 schrieb Tom Rix:
> > On 12/15/20 6:47 AM, Christian König wrote:
> >> Am 15.12.20 um 15:38 schrieb t...@redhat.com:
> >>> From: Tom Rix 
> >>>
> >>> See Documentation/core-api/printk-formats.rst.
> >>> h should no longer be used in the format specifier for printk.
> >> In general looks valid to me, but my question is how does that work?
> >>
> >> I mean we specify h here because it is a short int. Are ints always 32bit 
> >> on the stack?
> > The type of the argument is promoted to int.  This was discussed earlier 
> > here
> >
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Flkml%2Fa68114afb134b8633905f5a25ae7c4e6799ce8f1.camel%40perches.com%2F&data=04%7C01%7Cchristian.koenig%40amd.com%7C0dd6fe7c17304d4ea72a08d8a10af765%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436415772411133%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=ta8M5iN%2Bj2J6tio%2FMuUi2lG%2BiyEhkdsFfpXcEjGKNwE%3D&reserved=0
>
> Thanks, I expected this but just wanted to double check.
>
> In this case this patch as well as the radeon one are Reviewed-by:
> Christian König .
>

Applied this and the radeon one.  Thanks!

Alex

> Regards,
> Christian.
>
> >
> > Tom
> >
> >> Thanks,
> >> Christian.
> >>
> >>> Signed-off-by: Tom Rix 
> >>> ---
> >>>drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++--
> >>>drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 +-
> >>>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
> >>>3 files changed, 5 insertions(+), 5 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c 
> >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> >>> index 7c5b60e53482..8b989670ed66 100644
> >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> >>> @@ -240,7 +240,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
> >>>  version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 
> >>> 0xff;
> >>>version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
> >>> -DRM_INFO("Found UVD firmware Version: %hu.%hu Family ID: %hu\n",
> >>> +DRM_INFO("Found UVD firmware Version: %u.%u Family ID: %u\n",
> >>>version_major, version_minor, family_id);
> >>>  /*
> >>> @@ -267,7 +267,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
> >>>dec_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
> >>>enc_minor = (le32_to_cpu(hdr->ucode_version) >> 24) & 0x3f;
> >>>enc_major = (le32_to_cpu(hdr->ucode_version) >> 30) & 0x3;
> >>> -DRM_INFO("Found UVD firmware ENC: %hu.%hu DEC: .%hu Family ID: 
> >>> %hu\n",
> >>> +DRM_INFO("Found UVD firmware ENC: %u.%u DEC: .%u Family ID: 
> >>> %u\n",
> >>>enc_major, enc_minor, dec_minor, family_id);
> >>>  adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES;
> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c 
> >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> >>> index 4861f8ddc1b5..ea6a62f67e38 100644
> >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> >>> @@ -179,7 +179,7 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, 
> >>> unsigned long size)
> >>>version_major = (ucode_version >> 20) & 0xfff;
> >>>version_minor = (ucode_version >> 8) & 0xfff;
> >>>binary_id = ucode_version & 0xff;
> >>> -DRM_INFO("Found VCE firmware Version: %hhd.%hhd Binary ID: %hhd\n",
> >>> +DRM_INFO("Found VCE firmware Version: %d.%d Binary ID: %d\n",
> >>>version_major, version_minor, binary_id);
> >>>adev->vce.fw_version = ((version_major << 24) | (version_minor << 
> >>> 16) |
> >>>(binary_id << 8));
> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c 
> >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> >>> index 1e756186e3f8..99b82f3c2617 100644
> >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> >>> @@ -181,7 +181,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
> >>>enc_major = fw_check;
> >>>dec_ver = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xf;
> >>>vep = (le32_to_cpu(hdr->ucode_version) >> 28) & 0xf;
> >>> -DRM_INFO("Found VCN firmware Version ENC: %hu.%hu DEC: %hu VEP: 
> >>> %hu Revision: %hu\n",
> >>> +DRM_INFO("Found VCN firmware Version ENC: %u.%u DEC: %u VEP: %u 
> >>> Revision: %u\n",
> >>>enc_major, enc_minor, dec_ver, vep, fw_rev);
> >>>} else {
> >>>unsigned int version_major, version_minor, family_id;
> >>> @@ -189,7 +189,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
> >>>family_id = le32_to_cpu(hdr->ucode_version) & 0xff;
> >>>version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
>

Re: [PATCH v3 0/9] Xilinx AI engine kernel driver

2020-12-15 Thread Alex Deucher

On Mon, Dec 14, 2020 at 7:24 PM Jiaying Liang  wrote:
>
>
> On 12/11/20 11:39 AM, Daniel Vetter wrote:
> > Hi all
> >
> > On Fri, Dec 11, 2020 at 8:03 PM Alex Deucher  wrote:
> >> On Mon, Nov 30, 2020 at 3:25 AM Wendy Liang  wrote:
> >>> AI engine is the acceleration engine provided by Xilinx. These engines
> >>> provide high compute density for vector-based algorithms, and flexible
> >>> custom compute and data movement. It has core tiles for compute and
> >>> shim tiles to interface the FPGA fabric.
> >>>
> >>> You can check the AI engine architecture document for more hardware 
> >>> details:
> >>> https://www.xilinx.com/support/documentation/architecture-manuals/am009-versal-ai-engine.pdf
> >>>
> >>> This patch series adds a Linux kernel driver to manage the Xilinx AI
> >>> engine array device and AI engine partitions (groups of AI engine tiles
> >>> dedicated to an application).
> >> Hi Wendy,
> >>
> >> I think it would be good to provide an overview of how your stack
> >> works in general.  That would give reviewers a better handle on how
> >> all of this fits together.  I'd suggest including an overview in the
> >> cover letter and also in the commit message and/or as a comment in the
> >> code in one of the patches.  I'm not really an expert when it comes to
> >> FPGAs, but this basically looks like a pretty low level interface to
> >> set up the data fabric for a kernel that will run on the soft logic or
> >> maybe the microcontroller on the board.  It doesn't have to be super
> >> detailed, just a nice flow for how you might use this.  E.g.,
> >>
> >> Userspace uses ioctls X, Y, Z to configure the data fabric for the
> >> FPGA kernel.  The kernels can run on... .  DMA access to system memory
> >> for data sets can be allocated using ioctl A.  DMA access is limited
> >> by... . The user can then load the FPGA kernel on to one of the
> >> engines using ioctl B and finally they can kick off the whole thing
> >> using ioctl C.  FPGA kernels are compiled using YYY toolchain and use
> >> use the following runtime (link to runtime) to configure the data
> >> fabric using ioctls X, Y, Z.
> > At least for drm drivers we ideally have that as a .rst file in
> > Documentation/. With that you can even do full svg graphs, or just dot
> > graphs, of the overall stack if you really want to go overboard :-)
> >
> >> It would also be good to go over the security implications of the
> >> design.  E.g., can the FPGA kernel(s) access the DMA engine directly,
> >> or is it limited to just the DMA regions set up by the ioctls?  Also,
> >> does the hardware and software design allow for multiple users?  If
> >> so, how does that work?
> > I've also seen indications that there's some on-chip or on-card
> > memory. How that's planned to be used and whether we want to manage
> > this (maybe even with something like ttm) would be good to understand.
> >
> > All excellent questions from Alex, just figured I add some more.
> >
> > Cheers, Daniel
>
> Hi Alex, Daniel,
>
> Below is an overview of the driver.
>
> AI engine kernel driver manages Xilinx AI engine device. An AI engine device
> contains cores tiles and SHIM tiles. Core tiles are the computation tiles
> , the SHIM tiles are the tiles interfacing to external components.
>
>+++++
> | Core| Core| Core| Core | ...
> ||| ||
>+---+
> | Core| Core| Core| Core | ...
> ||| | |
>++++-
> ...
>+++-+
>| SHIM| SHIM   | SHIM   |SHIM|
>| PL| PL   | PL|PL | NOC  |
>+---++---++---+-+---+
>AXI Streams   |||  ||AXI MM
> ||| ||
> Events Singals |||  ||
> ||| ||
> ||| ||
>+---+++-+ +--+--+
>|   FPGA| |
> NOC|
>| | |  |
>+---+ +--+---+
> |
> |
> +---+--+
> |   DDR   |
> +--+
>
> Each Core tile contains computing module, local memory and DMA module. The
> local memory DMA module takes data from or to the AXI streams and writes
> it to or reads it from the local memory. The computing module

Re: [PATCH] drm/amdgpu: remove h from printk format specifier

2020-12-15 Thread Christian König


Am 15.12.20 um 16:06 schrieb Tom Rix:

On 12/15/20 6:47 AM, Christian König wrote:

Am 15.12.20 um 15:38 schrieb t...@redhat.com:

From: Tom Rix 

See Documentation/core-api/printk-formats.rst.
h should no longer be used in the format specifier for printk.

In general looks valid to me, but my question is how does that work?

I mean we specify h here because it is a short int. Are ints always 32bit on 
the stack?

The type of the argument is promoted to int.  This was discussed earlier here

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Flkml%2Fa68114afb134b8633905f5a25ae7c4e6799ce8f1.camel%40perches.com%2F&data=04%7C01%7Cchristian.koenig%40amd.com%7C0dd6fe7c17304d4ea72a08d8a10af765%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436415772411133%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=ta8M5iN%2Bj2J6tio%2FMuUi2lG%2BiyEhkdsFfpXcEjGKNwE%3D&reserved=0


Thanks, I expected this but just wanted to double check.

In this case this patch as well as the radeon one are Reviewed-by: 
Christian König .


Regards,
Christian.



Tom


Thanks,
Christian.


Signed-off-by: Tom Rix 
---
   drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++--
   drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 +-
   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
   3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 7c5b60e53482..8b989670ed66 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -240,7 +240,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
     version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
   version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
-    DRM_INFO("Found UVD firmware Version: %hu.%hu Family ID: %hu\n",
+    DRM_INFO("Found UVD firmware Version: %u.%u Family ID: %u\n",
   version_major, version_minor, family_id);
     /*
@@ -267,7 +267,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
   dec_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
   enc_minor = (le32_to_cpu(hdr->ucode_version) >> 24) & 0x3f;
   enc_major = (le32_to_cpu(hdr->ucode_version) >> 30) & 0x3;
-    DRM_INFO("Found UVD firmware ENC: %hu.%hu DEC: .%hu Family ID: %hu\n",
+    DRM_INFO("Found UVD firmware ENC: %u.%u DEC: .%u Family ID: %u\n",
   enc_major, enc_minor, dec_minor, family_id);
     adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 4861f8ddc1b5..ea6a62f67e38 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -179,7 +179,7 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned 
long size)
   version_major = (ucode_version >> 20) & 0xfff;
   version_minor = (ucode_version >> 8) & 0xfff;
   binary_id = ucode_version & 0xff;
-    DRM_INFO("Found VCE firmware Version: %hhd.%hhd Binary ID: %hhd\n",
+    DRM_INFO("Found VCE firmware Version: %d.%d Binary ID: %d\n",
   version_major, version_minor, binary_id);
   adev->vce.fw_version = ((version_major << 24) | (version_minor << 16) |
   (binary_id << 8));
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 1e756186e3f8..99b82f3c2617 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -181,7 +181,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
   enc_major = fw_check;
   dec_ver = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xf;
   vep = (le32_to_cpu(hdr->ucode_version) >> 28) & 0xf;
-    DRM_INFO("Found VCN firmware Version ENC: %hu.%hu DEC: %hu VEP: %hu 
Revision: %hu\n",
+    DRM_INFO("Found VCN firmware Version ENC: %u.%u DEC: %u VEP: %u Revision: 
%u\n",
   enc_major, enc_minor, dec_ver, vep, fw_rev);
   } else {
   unsigned int version_major, version_minor, family_id;
@@ -189,7 +189,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
   family_id = le32_to_cpu(hdr->ucode_version) & 0xff;
   version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
   version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
-    DRM_INFO("Found VCN firmware Version: %hu.%hu Family ID: %hu\n",
+    DRM_INFO("Found VCN firmware Version: %u.%u Family ID: %u\n",
   version_major, version_minor, family_id);
   }
   


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Re: [PATCH] drm/amdgpu: remove h from printk format specifier

2020-12-15 Thread Tom Rix


On 12/15/20 6:47 AM, Christian König wrote:
> Am 15.12.20 um 15:38 schrieb t...@redhat.com:
>> From: Tom Rix 
>>
>> See Documentation/core-api/printk-formats.rst.
>> h should no longer be used in the format specifier for printk.
>
> In general looks valid to me, but my question is how does that work?
>
> I mean we specify h here because it is a short int. Are ints always 32bit on 
> the stack?

The type of the argument is promoted to int.  This was discussed earlier here

https://lore.kernel.org/lkml/a68114afb134b8633905f5a25ae7c4e6799ce8f1.ca...@perches.com/

Tom

>
> Thanks,
> Christian.
>
>>
>> Signed-off-by: Tom Rix 
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++--
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 +-
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
>>   3 files changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
>> index 7c5b60e53482..8b989670ed66 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
>> @@ -240,7 +240,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
>>     version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
>>   version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
>> -    DRM_INFO("Found UVD firmware Version: %hu.%hu Family ID: %hu\n",
>> +    DRM_INFO("Found UVD firmware Version: %u.%u Family ID: %u\n",
>>   version_major, version_minor, family_id);
>>     /*
>> @@ -267,7 +267,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
>>   dec_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
>>   enc_minor = (le32_to_cpu(hdr->ucode_version) >> 24) & 0x3f;
>>   enc_major = (le32_to_cpu(hdr->ucode_version) >> 30) & 0x3;
>> -    DRM_INFO("Found UVD firmware ENC: %hu.%hu DEC: .%hu Family ID: 
>> %hu\n",
>> +    DRM_INFO("Found UVD firmware ENC: %u.%u DEC: .%u Family ID: %u\n",
>>   enc_major, enc_minor, dec_minor, family_id);
>>     adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> index 4861f8ddc1b5..ea6a62f67e38 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> @@ -179,7 +179,7 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, 
>> unsigned long size)
>>   version_major = (ucode_version >> 20) & 0xfff;
>>   version_minor = (ucode_version >> 8) & 0xfff;
>>   binary_id = ucode_version & 0xff;
>> -    DRM_INFO("Found VCE firmware Version: %hhd.%hhd Binary ID: %hhd\n",
>> +    DRM_INFO("Found VCE firmware Version: %d.%d Binary ID: %d\n",
>>   version_major, version_minor, binary_id);
>>   adev->vce.fw_version = ((version_major << 24) | (version_minor << 16) |
>>   (binary_id << 8));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> index 1e756186e3f8..99b82f3c2617 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
>> @@ -181,7 +181,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
>>   enc_major = fw_check;
>>   dec_ver = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xf;
>>   vep = (le32_to_cpu(hdr->ucode_version) >> 28) & 0xf;
>> -    DRM_INFO("Found VCN firmware Version ENC: %hu.%hu DEC: %hu VEP: %hu 
>> Revision: %hu\n",
>> +    DRM_INFO("Found VCN firmware Version ENC: %u.%u DEC: %u VEP: %u 
>> Revision: %u\n",
>>   enc_major, enc_minor, dec_ver, vep, fw_rev);
>>   } else {
>>   unsigned int version_major, version_minor, family_id;
>> @@ -189,7 +189,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
>>   family_id = le32_to_cpu(hdr->ucode_version) & 0xff;
>>   version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
>>   version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
>> -    DRM_INFO("Found VCN firmware Version: %hu.%hu Family ID: %hu\n",
>> +    DRM_INFO("Found VCN firmware Version: %u.%u Family ID: %u\n",
>>   version_major, version_minor, family_id);
>>   }
>>   
>

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Re: [PATCH] drm/amdgpu: Fix spelling mistake "Heterogenous" -> "Heterogeneous"

2020-12-15 Thread Alex Deucher

On Tue, Dec 15, 2020 at 5:56 AM Colin King  wrote:
>
> From: Colin Ian King 
>
> There is a spelling mistake in a comment in the Kconfig. Fix it.
>
> Signed-off-by: Colin Ian King 

Applied.  Thanks!

Alex


> ---
>  drivers/gpu/drm/amd/amdkfd/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/Kconfig 
> b/drivers/gpu/drm/amd/amdkfd/Kconfig
> index b3672d10ea54..e8fb10c41f16 100644
> --- a/drivers/gpu/drm/amd/amdkfd/Kconfig
> +++ b/drivers/gpu/drm/amd/amdkfd/Kconfig
> @@ -1,6 +1,6 @@
>  # SPDX-License-Identifier: MIT
>  #
> -# Heterogenous system architecture configuration
> +# Heterogeneous system architecture configuration
>  #
>
>  config HSA_AMD
> --
> 2.29.2
>
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[PATCH v6 71/84] drm/panel: panel-dsi-cm: remove extra 'if'

We have a useless 'if' in the dsicm_bl_update_status(), a left over from
the conversion to DRM model. Drop the if.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Sam Ravnborg 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/panel/panel-dsi-cm.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-dsi-cm.c 
b/drivers/gpu/drm/panel/panel-dsi-cm.c
index 067745fb682f..f5240fd82459 100644
--- a/drivers/gpu/drm/panel/panel-dsi-cm.c
+++ b/drivers/gpu/drm/panel/panel-dsi-cm.c
@@ -202,11 +202,9 @@ static int dsicm_bl_update_status(struct backlight_device 
*dev)
 
mutex_lock(&ddata->lock);
 
-   if (ddata->enabled) {
-   if (!r)
-   r = dsicm_dcs_write_1(
-   ddata, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, level);
-   }
+   if (ddata->enabled)
+   r = dsicm_dcs_write_1(ddata, MIPI_DCS_SET_DISPLAY_BRIGHTNESS,
+ level);
 
mutex_unlock(&ddata->lock);
 
-- 
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[PATCH v6 79/84] drm/omap: dsi: cleanup initial vc setup

As we now have a fixed setup for VCs (VC0 for video stream, VC1 for
commands), we can simplify the VC setup.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 85 +++
 1 file changed, 31 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index d9075aec2a0b..40bfd92321c1 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -2019,40 +2019,6 @@ static void dsi_vc_initial_config(struct dsi_data *dsi, 
int vc)
dsi->vc[vc].source = DSI_VC_SOURCE_L4;
 }
 
-static int dsi_vc_config_source(struct dsi_data *dsi, int vc,
-   enum dsi_vc_source source)
-{
-   if (dsi->vc[vc].source == source)
-   return 0;
-
-   DSSDBG("Source config of VC %d", vc);
-
-   dsi_sync_vc(dsi, vc);
-
-   dsi_vc_enable(dsi, vc, 0);
-
-   /* VC_BUSY */
-   if (!wait_for_bit_change(dsi, DSI_VC_CTRL(vc), 15, 0)) {
-   DSSERR("vc(%d) busy when trying to config for VP\n", vc);
-   return -EIO;
-   }
-
-   /* SOURCE, 0 = L4, 1 = video port */
-   REG_FLD_MOD(dsi, DSI_VC_CTRL(vc), source, 1, 1);
-
-   /* DCS_CMD_ENABLE */
-   if (dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) {
-   bool enable = source == DSI_VC_SOURCE_VP;
-   REG_FLD_MOD(dsi, DSI_VC_CTRL(vc), enable, 30, 30);
-   }
-
-   dsi_vc_enable(dsi, vc, 1);
-
-   dsi->vc[vc].source = source;
-
-   return 0;
-}
-
 static void dsi_vc_enable_hs(struct omap_dss_device *dssdev, int vc,
bool enable)
 {
@@ -2074,10 +2040,6 @@ static void dsi_vc_enable_hs(struct omap_dss_device 
*dssdev, int vc,
dsi_if_enable(dsi, 1);
 
dsi_force_tx_stop_mode_io(dsi);
-
-   /* start the DDR clock by sending a NULL packet */
-   if (dsi->vm_timings.ddr_clk_always_on && enable)
-   dsi_vc_send_null(dsi, vc, dsi->dsidev->channel);
 }
 
 static void dsi_vc_flush_long_data(struct dsi_data *dsi, int vc)
@@ -2272,8 +2234,6 @@ static int dsi_vc_send_long(struct dsi_data *dsi, int vc,
return -EINVAL;
}
 
-   dsi_vc_config_source(dsi, vc, DSI_VC_SOURCE_L4);
-
dsi_vc_write_long_header(dsi, vc, msg->channel, msg->type, msg->tx_len, 
0);
 
p = msg->tx_buf;
@@ -2333,8 +2293,6 @@ static int dsi_vc_send_short(struct dsi_data *dsi, int vc,
DSSDBG("dsi_vc_send_short(vc%d, dt %#x, b1 %#x, b2 %#x)\n",
   vc, msg->type, pkt.header[1], pkt.header[2]);
 
-   dsi_vc_config_source(dsi, vc, DSI_VC_SOURCE_L4);
-
if (FLD_GET(dsi_read_reg(dsi, DSI_VC_CTRL(vc)), 16, 16)) {
DSSERR("ERROR FIFO FULL, aborting transfer\n");
return -EINVAL;
@@ -3353,8 +3311,6 @@ static void dsi_update_screen_dispc(struct dsi_data *dsi)
 
DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h);
 
-   dsi_vc_config_source(dsi, vc, DSI_VC_SOURCE_VP);
-
bytespp = mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt) / 8;
bytespl = w * bytespp;
bytespf = bytespl * h;
@@ -3519,14 +3475,12 @@ static int dsi_update_channel(struct omap_dss_device 
*dssdev, int vc)
 
dsi_set_ulps_auto(dsi, false);
 
-   dsi_vc_enable_hs(dssdev, vc, true);
-
/*
 * Send NOP between the frames. If we don't send something here, the
 * updates stop working. This is probably related to DSI spec stating
 * that the DSI host should transition to LP at least once per frame.
 */
-   r = _dsi_send_nop(dsi, vc, dsi->dsidev->channel);
+   r = _dsi_send_nop(dsi, VC_CMD, dsi->dsidev->channel);
if (r < 0) {
DSSWARN("failed to send nop between frames: %d\n", r);
goto err;
@@ -3651,6 +3605,35 @@ static int dsi_configure_dsi_clocks(struct dsi_data *dsi)
return 0;
 }
 
+static void dsi_setup_dsi_vcs(struct dsi_data *dsi)
+{
+   /* Setup VC_CMD for LP and cpu transfers */
+   REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_CMD), 0, 9, 9); /* LP */
+
+   REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_CMD), 0, 1, 1); /* SOURCE_L4 */
+   dsi->vc[VC_CMD].source = DSI_VC_SOURCE_L4;
+
+   /* Setup VC_VIDEO for HS and dispc transfers */
+   REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 9, 9); /* HS */
+
+   REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 1, 1); /* SOURCE_VP */
+   dsi->vc[VC_VIDEO].source = DSI_VC_SOURCE_VP;
+
+   if (dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC)
+   REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 30, 30); /* 
DCS_CMD_ENABLE */
+
+   dsi_vc_enable(dsi, VC_CMD, 1);
+   dsi_vc_enable(dsi, VC_VIDEO, 1);
+
+   dsi_if_enable(dsi, 1);
+
+   dsi_force_tx_stop_mode_io(dsi);
+
+   /* start the DDR clock by sending a NULL packet */
+   if (dsi->vm_timings.ddr_clk_always_on)
+   dsi_vc_send_null(dsi, VC_CMD, dsi->dsidev->c

[PATCH v6 51/84] drm/omap: remove unused display.c

The functions in display.c are not used, so drop the file.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/Makefile  |  2 +-
 drivers/gpu/drm/omapdrm/dss/display.c | 58 ---
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  4 --
 3 files changed, 1 insertion(+), 63 deletions(-)
 delete mode 100644 drivers/gpu/drm/omapdrm/dss/display.c

diff --git a/drivers/gpu/drm/omapdrm/Makefile b/drivers/gpu/drm/omapdrm/Makefile
index 33fe7e937680..21e8277ff88f 100644
--- a/drivers/gpu/drm/omapdrm/Makefile
+++ b/drivers/gpu/drm/omapdrm/Makefile
@@ -18,7 +18,7 @@ omapdrm-y := omap_drv.o \
 
 omapdrm-$(CONFIG_DRM_FBDEV_EMULATION) += omap_fbdev.o
 
-omapdrm-y += dss/base.o dss/display.o dss/output.o dss/dss.o dss/dispc.o \
+omapdrm-y += dss/base.o dss/output.o dss/dss.o dss/dispc.o \
dss/dispc_coefs.o dss/pll.o dss/video-pll.o
 omapdrm-$(CONFIG_OMAP2_DSS_DPI) += dss/dpi.o
 omapdrm-$(CONFIG_OMAP2_DSS_VENC) += dss/venc.o
diff --git a/drivers/gpu/drm/omapdrm/dss/display.c 
b/drivers/gpu/drm/omapdrm/dss/display.c
deleted file mode 100644
index 7b7ee2019eae..
--- a/drivers/gpu/drm/omapdrm/dss/display.c
+++ /dev/null
@@ -1,58 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2009 Nokia Corporation
- * Author: Tomi Valkeinen 
- *
- * Some code and ideas taken from drivers/video/omap/ driver
- * by Imre Deak.
- */
-
-#define DSS_SUBSYS_NAME "DISPLAY"
-
-#include 
-#include 
-
-#include 
-#include 
-
-#include "omapdss.h"
-
-static int disp_num_counter;
-
-void omapdss_display_init(struct omap_dss_device *dssdev)
-{
-   int id;
-
-   /*
-* Note: this presumes that all displays either have an DT alias, or
-* none has.
-*/
-   id = of_alias_get_id(dssdev->dev->of_node, "display");
-   if (id < 0)
-   id = disp_num_counter++;
-
-   /* Use 'label' property for name, if it exists */
-   of_property_read_string(dssdev->dev->of_node, "label", &dssdev->name);
-
-   if (dssdev->name == NULL)
-   dssdev->name = devm_kasprintf(dssdev->dev, GFP_KERNEL,
- "display%u", id);
-}
-
-int omapdss_display_get_modes(struct drm_connector *connector,
- const struct videomode *vm)
-{
-   struct drm_display_mode *mode;
-
-   mode = drm_mode_create(connector->dev);
-   if (!mode)
-   return 0;
-
-   drm_display_mode_from_videomode(vm, mode);
-
-   mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
-   drm_mode_set_name(mode);
-   drm_mode_probed_add(connector, mode);
-
-   return 1;
-}
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index c418bad28afe..48e4a1fc70b6 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -300,10 +300,6 @@ struct dss_pdata {
struct dss_device *dss;
 };
 
-void omapdss_display_init(struct omap_dss_device *dssdev);
-int omapdss_display_get_modes(struct drm_connector *connector,
- const struct videomode *vm);
-
 void omapdss_device_register(struct omap_dss_device *dssdev);
 void omapdss_device_unregister(struct omap_dss_device *dssdev);
 struct omap_dss_device *omapdss_device_get(struct omap_dss_device *dssdev);
-- 
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[PATCH v6 83/84] drm/omap: dsi: fix DCS_CMD_ENABLE

We only need to set VC_CTRL:DCS_CMD_ENABLE for command mode panels when
the HW has DSI_QUIRK_DCS_CMD_CONFIG_VC quirk. The old code did this
right by accident, but now we set DCS_CMD_ENABLE for video mode panels
too.

Fix this by skipping the set for video mode.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 400d88b02cae..0dd5c0381080 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -3403,7 +3403,8 @@ static void dsi_setup_dsi_vcs(struct dsi_data *dsi)
REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 1, 1); /* SOURCE_VP */
dsi->vc[VC_VIDEO].source = DSI_VC_SOURCE_VP;
 
-   if (dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC)
+   if ((dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) &&
+   !(dsi->dsidev->mode_flags & MIPI_DSI_MODE_VIDEO))
REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 30, 30); /* 
DCS_CMD_ENABLE */
 
dsi_vc_enable(dsi, VC_CMD, 1);
-- 
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[PATCH v6 58/84] drm/omap: pll: fix iteration loop check

If the PLL calc function is given bad parameters, n_start/m_start may be
higher than n_stop/m_stop, which leads to the loops iterating through
the whole u32 number space.

Fix this by failing early on such cases.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/pll.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c 
b/drivers/gpu/drm/omapdrm/dss/pll.c
index 241a338ace29..4c8246a3ded9 100644
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -222,6 +222,9 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned 
long clkin,
n_stop = min((unsigned)(clkin / fint_hw_min), hw->n_max);
n_inc = 1;
 
+   if (n_start > n_stop)
+   return false;
+
if (hw->errata_i886) {
swap(n_start, n_stop);
n_inc = -1;
@@ -239,6 +242,9 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned 
long clkin,
hw->m_max);
m_inc = 1;
 
+   if (m_start > m_stop)
+   continue;
+
if (hw->errata_i886) {
swap(m_start, m_stop);
m_inc = -1;
-- 
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[PATCH v6 47/84] drm/omap: simplify DSI manual update code

From: Sebastian Reichel 

Move dsi_ops into the main structure, since all other ops
are gone. Instead of checking the device type we can simply
check if dsi_ops are set.

Signed-off-by: Sebastian Reichel 
Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 10 --
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  6 +-
 drivers/gpu/drm/omapdrm/omap_crtc.c   | 16 
 3 files changed, 9 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 9eae61ddbda9..efa261e4a18a 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -5011,11 +5011,9 @@ static int dsi_get_clocks(struct dsi_data *dsi)
return 0;
 }
 
-static const struct omap_dss_device_ops dsi_ops = {
-   .dsi = {
-   .update = dsi_update_all,
-   .is_video_mode = dsi_is_video_mode,
-   },
+static const struct omapdss_dsi_ops dsi_ops = {
+   .update = dsi_update_all,
+   .is_video_mode = dsi_is_video_mode,
 };
 
 static irqreturn_t omap_dsi_te_irq_handler(int irq, void *dev_id)
@@ -5446,7 +5444,7 @@ static int dsi_init_output(struct dsi_data *dsi)
out->type = OMAP_DISPLAY_TYPE_DSI;
out->name = dsi->module_id == 0 ? "dsi.0" : "dsi.1";
out->dispc_channel = dsi_get_channel(dsi);
-   out->ops = &dsi_ops;
+   out->dsi_ops = &dsi_ops;
out->owner = THIS_MODULE;
out->of_port = 0;
out->bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index cc4b7d2629bd..76586934df37 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -275,10 +275,6 @@ struct omapdss_dsi_ops {
bool (*is_video_mode)(struct omap_dss_device *dssdev);
 };
 
-struct omap_dss_device_ops {
-   const struct omapdss_dsi_ops dsi;
-};
-
 struct omap_dss_device {
struct device *dev;
 
@@ -300,7 +296,7 @@ struct omap_dss_device {
 
const char *name;
 
-   const struct omap_dss_device_ops *ops;
+   const struct omapdss_dsi_ops *dsi_ops;
u32 bus_flags;
 
/* OMAP DSS output specific fields */
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c 
b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 0d1543537b92..09a255c942c1 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -366,17 +366,10 @@ static void omap_crtc_manual_display_update(struct 
work_struct *data)
struct drm_device *dev = omap_crtc->base.dev;
int ret;
 
-   if (!dssdev) {
-   dev_err_once(dev->dev, "missing display dssdev!");
+   if (!dssdev || !dssdev->dsi_ops || !dssdev->dsi_ops->update)
return;
-   }
-
-   if (dssdev->type != OMAP_DISPLAY_TYPE_DSI || !dssdev->ops->dsi.update) {
-   dev_err_once(dev->dev, "no DSI update callback found!");
-   return;
-   }
 
-   ret = dssdev->ops->dsi.update(dssdev);
+   ret = dssdev->dsi_ops->update(dssdev);
if (ret < 0) {
spin_lock_irq(&dev->event_lock);
omap_crtc->pending = false;
@@ -550,11 +543,10 @@ static bool omap_crtc_is_manually_updated(struct drm_crtc 
*crtc)
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
struct omap_dss_device *dssdev = omap_crtc->pipe->output;
 
-   if (dssdev->type != OMAP_DISPLAY_TYPE_DSI ||
-   !dssdev->ops->dsi.is_video_mode)
+   if (!dssdev || !dssdev->dsi_ops || !dssdev->dsi_ops->is_video_mode)
return false;
 
-   if (dssdev->ops->dsi.is_video_mode(dssdev))
+   if (dssdev->dsi_ops->is_video_mode(dssdev))
return false;
 
DBG("detected manually updated display!");
-- 
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[PATCH v6 66/84] drm/omap: dsi: pass vc and channel to various functions

To start fixing the issues related to channels and vcs described in the
previous commit, pass vc and/or channel to various functions which will
need it do properly handle different DSI channels and VCs.

No functional changes.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 54 ---
 1 file changed, 28 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 08dd76b4549a..7c8fe5da3099 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -214,9 +214,9 @@ static void dsi_set_ulps_auto(struct dsi_data *dsi, bool 
enable);
 static int dsi_display_init_dispc(struct dsi_data *dsi);
 static void dsi_display_uninit_dispc(struct dsi_data *dsi);
 
-static int dsi_vc_send_null(struct dsi_data *dsi, int vc);
+static int dsi_vc_send_null(struct dsi_data *dsi, int vc, int channel);
 
-static ssize_t _omap_dsi_host_transfer(struct dsi_data *dsi,
+static ssize_t _omap_dsi_host_transfer(struct dsi_data *dsi, int vc,
   const struct mipi_dsi_msg *msg);
 
 static void dsi_display_disable(struct omap_dss_device *dssdev);
@@ -2457,7 +2457,7 @@ static void dsi_vc_enable_hs(struct omap_dss_device 
*dssdev, int vc,
 
/* start the DDR clock by sending a NULL packet */
if (dsi->vm_timings.ddr_clk_always_on && enable)
-   dsi_vc_send_null(dsi, vc);
+   dsi_vc_send_null(dsi, vc, dsi->dsidev->channel);
 
dsi->in_lp_mode = !enable;
 }
@@ -2607,7 +2607,8 @@ static int dsi_vc_send_bta_sync(struct omap_dss_device 
*dssdev, int vc)
 }
 
 static inline void dsi_vc_write_long_header(struct dsi_data *dsi, int vc,
-   u8 data_type, u16 len, u8 ecc)
+   int channel, u8 data_type, u16 len,
+   u8 ecc)
 {
u32 val;
u8 data_id;
@@ -2635,7 +2636,7 @@ static inline void dsi_vc_write_long_payload(struct 
dsi_data *dsi, int vc,
dsi_write_reg(dsi, DSI_VC_LONG_PACKET_PAYLOAD(vc), val);
 }
 
-static int dsi_vc_send_long(struct dsi_data *dsi,
+static int dsi_vc_send_long(struct dsi_data *dsi, int vc,
const struct mipi_dsi_msg *msg)
 {
/*u32 val; */
@@ -2655,7 +2656,7 @@ static int dsi_vc_send_long(struct dsi_data *dsi,
 
dsi_vc_config_source(dsi, msg->channel, DSI_VC_SOURCE_L4);
 
-   dsi_vc_write_long_header(dsi, msg->channel, msg->type, msg->tx_len, 0);
+   dsi_vc_write_long_header(dsi, vc, msg->channel, msg->type, msg->tx_len, 
0);
 
p = msg->tx_buf;
for (i = 0; i < msg->tx_len >> 2; i++) {
@@ -2698,7 +2699,7 @@ static int dsi_vc_send_long(struct dsi_data *dsi,
return r;
 }
 
-static int dsi_vc_send_short(struct dsi_data *dsi,
+static int dsi_vc_send_short(struct dsi_data *dsi, int vc,
 const struct mipi_dsi_msg *msg)
 {
struct mipi_dsi_packet pkt;
@@ -2729,26 +2730,26 @@ static int dsi_vc_send_short(struct dsi_data *dsi,
return 0;
 }
 
-static int dsi_vc_send_null(struct dsi_data *dsi, int vc)
+static int dsi_vc_send_null(struct dsi_data *dsi, int vc, int channel)
 {
const struct mipi_dsi_msg msg = {
.channel = vc,
.type = MIPI_DSI_NULL_PACKET,
};
 
-   return dsi_vc_send_long(dsi, &msg);
+   return dsi_vc_send_long(dsi, vc, &msg);
 }
 
-static int dsi_vc_write_common(struct omap_dss_device *dssdev,
+static int dsi_vc_write_common(struct omap_dss_device *dssdev, int vc,
   const struct mipi_dsi_msg *msg)
 {
struct dsi_data *dsi = to_dsi_data(dssdev);
int r;
 
if (mipi_dsi_packet_format_is_short(msg->type))
-   r = dsi_vc_send_short(dsi, msg);
+   r = dsi_vc_send_short(dsi, vc, msg);
else
-   r = dsi_vc_send_long(dsi, msg);
+   r = dsi_vc_send_long(dsi, vc, msg);
 
if (r < 0)
return r;
@@ -2884,7 +2885,7 @@ static int dsi_vc_read_rx_fifo(struct dsi_data *dsi, int 
vc, u8 *buf,
return r;
 }
 
-static int dsi_vc_dcs_read(struct omap_dss_device *dssdev,
+static int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int vc,
   const struct mipi_dsi_msg *msg)
 {
struct dsi_data *dsi = to_dsi_data(dssdev);
@@ -2895,7 +2896,7 @@ static int dsi_vc_dcs_read(struct omap_dss_device *dssdev,
if (dsi->debug_read)
DSSDBG("%s(ch %d, cmd %x)\n", __func__, channel, cmd);
 
-   r = dsi_vc_send_short(dsi, msg);
+   r = dsi_vc_send_short(dsi, vc, msg);
if (r)
goto err;
 
@@ -2919,13 +2920,13 @@ static int dsi_vc_dcs_read(struct omap_dss_device 
*dssdev,
return r;
 }
 
-static int dsi_vc_generic_read(struct omap_dss_device *dssdev,
+stat

[PATCH v6 82/84] drm/omap: dsi: remove ulps support

ULPS is a niche power-saving feature which only really affects command
mode panels showing a static picture. I know the ULPS code used to work
very long time ago, but I could not get it working with the current
driver. As the ULPS code is not trivial and includes delayed work (so
lots of chances for race issues), and just keeping DSI video and command
mode panels working has been challenging enough even without ULPS, lets
remove ULPS support.

When the DSI driver works reliably for command and video mode displays,
someone interested can work on ULPS and add it back if the power saving
is substantial enough.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 297 +-
 drivers/gpu/drm/omapdrm/dss/dsi.h |   4 -
 2 files changed, 8 insertions(+), 293 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 749f591a3d5e..400d88b02cae 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -53,8 +53,6 @@
 #define REG_FLD_MOD(dsi, idx, val, start, end) \
dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, 
end))
 
-static void dsi_set_ulps_auto(struct dsi_data *dsi, bool enable);
-
 static int dsi_init_dispc(struct dsi_data *dsi);
 static void dsi_uninit_dispc(struct dsi_data *dsi);
 
@@ -688,44 +686,6 @@ static int dsi_unregister_isr_vc(struct dsi_data *dsi, int 
vc,
return r;
 }
 
-static int dsi_register_isr_cio(struct dsi_data *dsi, omap_dsi_isr_t isr,
-   void *arg, u32 mask)
-{
-   unsigned long flags;
-   int r;
-
-   spin_lock_irqsave(&dsi->irq_lock, flags);
-
-   r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio,
-   ARRAY_SIZE(dsi->isr_tables.isr_table_cio));
-
-   if (r == 0)
-   _omap_dsi_set_irqs_cio(dsi);
-
-   spin_unlock_irqrestore(&dsi->irq_lock, flags);
-
-   return r;
-}
-
-static int dsi_unregister_isr_cio(struct dsi_data *dsi, omap_dsi_isr_t isr,
- void *arg, u32 mask)
-{
-   unsigned long flags;
-   int r;
-
-   spin_lock_irqsave(&dsi->irq_lock, flags);
-
-   r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio,
-   ARRAY_SIZE(dsi->isr_tables.isr_table_cio));
-
-   if (r == 0)
-   _omap_dsi_set_irqs_cio(dsi);
-
-   spin_unlock_irqrestore(&dsi->irq_lock, flags);
-
-   return r;
-}
-
 static u32 dsi_get_errors(struct dsi_data *dsi)
 {
unsigned long flags;
@@ -1452,56 +1412,6 @@ static void dsi_cio_timings(struct dsi_data *dsi)
dsi_write_reg(dsi, DSI_DSIPHY_CFG2, r);
 }
 
-/* lane masks have lane 0 at lsb. mask_p for positive lines, n for negative */
-static void dsi_cio_enable_lane_override(struct dsi_data *dsi,
-unsigned int mask_p,
-unsigned int mask_n)
-{
-   int i;
-   u32 l;
-   u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26;
-
-   l = 0;
-
-   for (i = 0; i < dsi->num_lanes_supported; ++i) {
-   unsigned int p = dsi->lanes[i].polarity;
-
-   if (mask_p & (1 << i))
-   l |= 1 << (i * 2 + (p ? 0 : 1));
-
-   if (mask_n & (1 << i))
-   l |= 1 << (i * 2 + (p ? 1 : 0));
-   }
-
-   /*
-* Bits in REGLPTXSCPDAT4TO0DXDY:
-* 17: DY0 18: DX0
-* 19: DY1 20: DX1
-* 21: DY2 22: DX2
-* 23: DY3 24: DX3
-* 25: DY4 26: DX4
-*/
-
-   /* Set the lane override configuration */
-
-   /* REGLPTXSCPDAT4TO0DXDY */
-   REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, l, lptxscp_start, 17);
-
-   /* Enable lane override */
-
-   /* ENLPTXSCPDAT */
-   REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, 1, 27, 27);
-}
-
-static void dsi_cio_disable_lane_override(struct dsi_data *dsi)
-{
-   /* Disable lane override */
-   REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, 0, 27, 27); /* ENLPTXSCPDAT */
-   /* Reset the lane override configuration */
-   /* REGLPTXSCPDAT4TO0DXDY */
-   REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, 0, 22, 17);
-}
-
 static int dsi_cio_wait_tx_clk_esc_reset(struct dsi_data *dsi)
 {
int t, i;
@@ -1676,32 +1586,6 @@ static int dsi_cio_init(struct dsi_data *dsi)
l = FLD_MOD(l, 0x1fff, 12, 0);  /* STOP_STATE_COUNTER_IO */
dsi_write_reg(dsi, DSI_TIMING1, l);
 
-   if (dsi->ulps_enabled) {
-   unsigned int mask_p;
-   int i;
-
-   DSSDBG("manual ulps exit\n");
-
-   /* ULPS is exited by Mark-1 state for 1ms, followed by
-* stop state. DSS HW cannot do this via the normal
-* ULPS exit sequence, as after reset the DSS HW thinks
-* that we are not in ULPS mode, and refuses to send the
-

[PATCH v6 49/84] ARM: omap2plus_defconfig: Update for moved DSI command mode panel

From: Sebastian Reichel 

The DSI command mode panel is no longer specific
to OMAP and thus the config option has been renamed
slightly.

Signed-off-by: Sebastian Reichel 
Signed-off-by: Tomi Valkeinen 
Cc: Tony Lindgren 
Reviewed-by: Laurent Pinchart 
Acked-by: Tony Lindgren 
---
 arch/arm/configs/omap2plus_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/configs/omap2plus_defconfig 
b/arch/arm/configs/omap2plus_defconfig
index 34793aabdb65..1857717a49bf 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -369,8 +369,8 @@ CONFIG_DRM_OMAP=m
 CONFIG_OMAP5_DSS_HDMI=y
 CONFIG_OMAP2_DSS_SDI=y
 CONFIG_OMAP2_DSS_DSI=y
-CONFIG_DRM_OMAP_PANEL_DSI_CM=m
 CONFIG_DRM_TILCDC=m
+CONFIG_DRM_PANEL_DSI_CM=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_LG_LB035Q02=m
 CONFIG_DRM_PANEL_NEC_NL8048HL11=m
-- 
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Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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[PATCH v6 40/84] drm/omap: dsi: Register a drm_bridge

From: Sebastian Reichel 

In order to integrate with a chain of drm_bridge, the internal DSI
output has to expose its operations through the drm_bridge API.
Register a bridge at initialisation time to do so and remove the
omap_dss_device operations that are now unused.

Signed-off-by: Sebastian Reichel 
Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 134 --
 1 file changed, 89 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 6f66ef0be166..9eae61ddbda9 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -35,6 +35,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -438,6 +439,7 @@ struct dsi_data {
struct omap_dss_dsi_videomode_timings vm_timings;
 
struct omap_dss_device output;
+   struct drm_bridge bridge;
 };
 
 struct dsi_packet_sent_handler_data {
@@ -450,6 +452,9 @@ static bool dsi_perf;
 module_param(dsi_perf, bool, 0644);
 #endif
 
+#define drm_bridge_to_dsi(bridge) \
+   container_of(bridge, struct dsi_data, bridge)
+
 static inline struct dsi_data *to_dsi_data(struct omap_dss_device *dssdev)
 {
return dev_get_drvdata(dssdev->dev);
@@ -5006,50 +5011,7 @@ static int dsi_get_clocks(struct dsi_data *dsi)
return 0;
 }
 
-static void dsi_set_timings(struct omap_dss_device *dssdev,
-   const struct drm_display_mode *mode)
-{
-   DSSDBG("dsi_set_timings\n");
-   dsi_set_config(dssdev, mode);
-}
-
-static int dsi_check_timings(struct omap_dss_device *dssdev,
-struct drm_display_mode *mode)
-{
-   struct dsi_data *dsi = to_dsi_data(dssdev);
-   struct dsi_clk_calc_ctx ctx;
-   int r;
-
-   DSSDBG("dsi_check_timings\n");
-
-   mutex_lock(&dsi->lock);
-   r = __dsi_calc_config(dsi, mode, &ctx);
-   mutex_unlock(&dsi->lock);
-
-   return r;
-}
-
-static int dsi_connect(struct omap_dss_device *src,
-  struct omap_dss_device *dst)
-{
-   return omapdss_device_connect(dst->dss, dst, dst->next);
-}
-
-static void dsi_disconnect(struct omap_dss_device *src,
-  struct omap_dss_device *dst)
-{
-   omapdss_device_disconnect(dst, dst->next);
-}
-
 static const struct omap_dss_device_ops dsi_ops = {
-   .connect = dsi_connect,
-   .disconnect = dsi_disconnect,
-   .enable = dsi_enable_video_outputs,
-   .disable = dsi_disable_video_outputs,
-
-   .check_timings = dsi_check_timings,
-   .set_timings = dsi_set_timings,
-
.dsi = {
.update = dsi_update_all,
.is_video_mode = dsi_is_video_mode,
@@ -5389,6 +5351,83 @@ static const struct component_ops dsi_component_ops = {
.unbind = dsi_unbind,
 };
 
+/* 
-
+ * DRM Bridge Operations
+ */
+
+static int dsi_bridge_attach(struct drm_bridge *bridge,
+enum drm_bridge_attach_flags flags)
+{
+   struct dsi_data *dsi = drm_bridge_to_dsi(bridge);
+
+   if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
+   return -EINVAL;
+
+   return drm_bridge_attach(bridge->encoder, dsi->output.next_bridge,
+bridge, flags);
+}
+
+static enum drm_mode_status
+dsi_bridge_mode_valid(struct drm_bridge *bridge,
+ const struct drm_display_info *info,
+ const struct drm_display_mode *mode)
+{
+   struct dsi_data *dsi = drm_bridge_to_dsi(bridge);
+   struct dsi_clk_calc_ctx ctx;
+   int r;
+
+   mutex_lock(&dsi->lock);
+   r = __dsi_calc_config(dsi, mode, &ctx);
+   mutex_unlock(&dsi->lock);
+
+   return r ? MODE_CLOCK_RANGE : MODE_OK;
+}
+
+static void dsi_bridge_mode_set(struct drm_bridge *bridge,
+   const struct drm_display_mode *mode,
+   const struct drm_display_mode *adjusted_mode)
+{
+   struct dsi_data *dsi = drm_bridge_to_dsi(bridge);
+
+   dsi_set_config(&dsi->output, adjusted_mode);
+}
+
+static void dsi_bridge_enable(struct drm_bridge *bridge)
+{
+   struct dsi_data *dsi = drm_bridge_to_dsi(bridge);
+
+   dsi_enable_video_outputs(&dsi->output);
+}
+
+static void dsi_bridge_disable(struct drm_bridge *bridge)
+{
+   struct dsi_data *dsi = drm_bridge_to_dsi(bridge);
+
+   dsi_disable_video_outputs(&dsi->output);
+}
+
+static const struct drm_bridge_funcs dsi_bridge_funcs = {
+   .attach = dsi_bridge_attach,
+   .mode_valid = dsi_bridge_mode_valid,
+   .mode_set = dsi_bridge_mode_set,
+   .enable = dsi_bridge_enable,
+   .disable = dsi_bridge_disable,
+};
+
+static void dsi_bridge_init(struct dsi_data *dsi)
+{
+   dsi->bridge.funcs = &dsi_bridge_funcs;
+   dsi->bridge.of_node = dsi->host.dev->of_node;
+

[PATCH v6 65/84] drm/omap: dsi: rename 'channel' to 'vc'

The "channel" usage in omap dsi driver is confusing. We have three
different "channels":

1) DSI virtual channel ID. This is a number from 0 to 3, included in the
packet payload.

2) VC. This is a register block in the DSI IP. There are four of those
blocks. A VC is a DSI "pipeline", with defined fifo settings, data
source (cpu or dispc), and some other settings. It has no relation to
the 1).

3) dispc channel. It's the "pipeline" number dispc uses to send pixel
data.

The previous patch handled the third case.

 To start fixing 1) and 2), we first rename all uses of 'channel' to
'vc', as in most of the cases that is the correct thing to use.

However, in some places 1) and 2) have gotten mixed up (i.e. the code
uses msg->channel when it should use vc), which will be fixed in the
following patch.

Note that mixing 1) and 2) currently is "fine", as at the moment we only
support DSI peripherals with DSI virtual channel 0, and we always use
VC0 to send data. So both 1) and 2) are always 0.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 220 +++---
 1 file changed, 110 insertions(+), 110 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 789c26baad86..08dd76b4549a 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -214,7 +214,7 @@ static void dsi_set_ulps_auto(struct dsi_data *dsi, bool 
enable);
 static int dsi_display_init_dispc(struct dsi_data *dsi);
 static void dsi_display_uninit_dispc(struct dsi_data *dsi);
 
-static int dsi_vc_send_null(struct dsi_data *dsi, int channel);
+static int dsi_vc_send_null(struct dsi_data *dsi, int vc);
 
 static ssize_t _omap_dsi_host_transfer(struct dsi_data *dsi,
   const struct mipi_dsi_msg *msg);
@@ -376,7 +376,7 @@ struct dsi_data {
/* space for a copy used by the interrupt handler */
struct dsi_isr_tables isr_tables_copy;
 
-   int update_channel;
+   int update_vc;
 #ifdef DSI_PERF_MEASURE
unsigned int update_bytes;
 #endif
@@ -639,7 +639,7 @@ static void print_irq_status(u32 status)
 #undef PIS
 }
 
-static void print_irq_status_vc(int channel, u32 status)
+static void print_irq_status_vc(int vc, u32 status)
 {
if (status == 0)
return;
@@ -650,7 +650,7 @@ static void print_irq_status_vc(int channel, u32 status)
 #define PIS(x) (status & DSI_VC_IRQ_##x) ? (#x " ") : ""
 
pr_debug("DSI VC(%d) IRQ 0x%x: %s%s%s%s%s%s%s%s%s\n",
-   channel,
+   vc,
status,
PIS(CS),
PIS(ECC_CORR),
@@ -1031,7 +1031,7 @@ static int dsi_unregister_isr(struct dsi_data *dsi, 
omap_dsi_isr_t isr,
return r;
 }
 
-static int dsi_register_isr_vc(struct dsi_data *dsi, int channel,
+static int dsi_register_isr_vc(struct dsi_data *dsi, int vc,
   omap_dsi_isr_t isr, void *arg, u32 mask)
 {
unsigned long flags;
@@ -1040,18 +1040,18 @@ static int dsi_register_isr_vc(struct dsi_data *dsi, 
int channel,
spin_lock_irqsave(&dsi->irq_lock, flags);
 
r = _dsi_register_isr(isr, arg, mask,
-   dsi->isr_tables.isr_table_vc[channel],
-   ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel]));
+   dsi->isr_tables.isr_table_vc[vc],
+   ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]));
 
if (r == 0)
-   _omap_dsi_set_irqs_vc(dsi, channel);
+   _omap_dsi_set_irqs_vc(dsi, vc);
 
spin_unlock_irqrestore(&dsi->irq_lock, flags);
 
return r;
 }
 
-static int dsi_unregister_isr_vc(struct dsi_data *dsi, int channel,
+static int dsi_unregister_isr_vc(struct dsi_data *dsi, int vc,
 omap_dsi_isr_t isr, void *arg, u32 mask)
 {
unsigned long flags;
@@ -1060,11 +1060,11 @@ static int dsi_unregister_isr_vc(struct dsi_data *dsi, 
int channel,
spin_lock_irqsave(&dsi->irq_lock, flags);
 
r = _dsi_unregister_isr(isr, arg, mask,
-   dsi->isr_tables.isr_table_vc[channel],
-   ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel]));
+   dsi->isr_tables.isr_table_vc[vc],
+   ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]));
 
if (r == 0)
-   _omap_dsi_set_irqs_vc(dsi, channel);
+   _omap_dsi_set_irqs_vc(dsi, vc);
 
spin_unlock_irqrestore(&dsi->irq_lock, flags);
 
@@ -2234,9 +2234,9 @@ static int dsi_force_tx_stop_mode_io(struct dsi_data *dsi)
return 0;
 }
 
-static bool dsi_vc_is_enabled(struct dsi_data *dsi, int channel)
+static bool dsi_vc_is_enabled(struct dsi_data *dsi, int vc)
 {
-   return REG_GET(dsi, DSI_VC_CTRL(channel), 0, 0);
+   return REG_GET(dsi, DSI_VC_CTRL(vc), 0, 0);
 }
 
 static void dsi_packet_

[PATCH v6 45/84] drm/omap: drop DSS ops_flags

From: Sebastian Reichel 

The omapdss device's ops_flags field is no longer
used and can be dropped.

Signed-off-by: Sebastian Reichel 
Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
---
 drivers/gpu/drm/omapdrm/dss/omapdss.h | 9 -
 drivers/gpu/drm/omapdrm/dss/venc.c| 1 -
 2 files changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 0547c69a2c1b..c073efaed1b4 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -279,14 +279,6 @@ struct omap_dss_device_ops {
const struct omapdss_dsi_ops dsi;
 };
 
-/**
- * enum omap_dss_device_ops_flag - Indicates which device ops are supported
- * @OMAP_DSS_DEVICE_OP_MODES: The device supports reading modes
- */
-enum omap_dss_device_ops_flag {
-   OMAP_DSS_DEVICE_OP_MODES = BIT(3),
-};
-
 struct omap_dss_device {
struct device *dev;
 
@@ -315,7 +307,6 @@ struct omap_dss_device {
const char *name;
 
const struct omap_dss_device_ops *ops;
-   unsigned long ops_flags;
u32 bus_flags;
 
/* OMAP DSS output specific fields */
diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c 
b/drivers/gpu/drm/omapdrm/dss/venc.c
index 94cf50d837b0..d92df480180e 100644
--- a/drivers/gpu/drm/omapdrm/dss/venc.c
+++ b/drivers/gpu/drm/omapdrm/dss/venc.c
@@ -735,7 +735,6 @@ static int venc_init_output(struct venc_device *venc)
out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
out->owner = THIS_MODULE;
out->of_port = 0;
-   out->ops_flags = OMAP_DSS_DEVICE_OP_MODES;
 
r = omapdss_device_init_output(out, &venc->bridge);
if (r < 0) {
-- 
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[PATCH v6 61/84] drm/omap: dsi: send nop instead of page & column

The OMAP DSI command mode panel driver used to send page & column
address before each frame update, and this code was moved into the DSI
host driver when converting it to the DRM bridge model.

However, it's not really required to send the page & column address
before each frame. It's also something that doesn't really belong to the
DSI host driver, so we should drop the code.

That said, frame updates break if we don't send _something_ between the
frames. A NOP command does the trick.

It is not clear if this behavior is as expected from a DSI command mode
frame transfer, or is it a feature/issue with OMAP DSI driver, or a
feature/issue in the command mode panel used.

Most likely this is related to the following from the DSI spec:

"To enable PHY synchronization the host processor should periodically
end HS transmission and drive the Data Lanes to the LP state. This
transition should take place at least once per frame."

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c | 46 ---
 1 file changed, 17 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index c5682b2e26eb..e24db2431fb8 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -3881,35 +3881,19 @@ static int _dsi_update(struct dsi_data *dsi)
return 0;
 }
 
-static int _dsi_update_window(struct dsi_data *dsi, int channel,
- int x, int y, int w, int h)
-{
-   int x1 = x, x2 = (x + w - 1);
-   int y1 = y, y2 = (y + h - 1);
-   u8 payloadX[5] = { MIPI_DCS_SET_COLUMN_ADDRESS,
-  x1 >> 8, x1 & 0xff, x2 >> 8, x2 & 0xff };
-   u8 payloadY[5] = { MIPI_DCS_SET_PAGE_ADDRESS,
-  y1 >> 8, y1 & 0xff, y2 >> 8, y2 & 0xff };
-   struct mipi_dsi_msg msgX = { 0 }, msgY = { 0 };
-   int ret;
+static int _dsi_send_nop(struct dsi_data *dsi, int channel)
+{
+   const u8 payload[] = { MIPI_DCS_NOP };
+   const struct mipi_dsi_msg msg = {
+   .channel = channel,
+   .type = MIPI_DSI_DCS_SHORT_WRITE,
+   .tx_len = 1,
+   .tx_buf = payload,
+   };
 
WARN_ON(!dsi_bus_is_locked(dsi));
 
-   msgX.type = MIPI_DSI_DCS_LONG_WRITE;
-   msgX.channel = channel;
-   msgX.tx_buf = payloadX;
-   msgX.tx_len = sizeof(payloadX);
-
-   msgY.type = MIPI_DSI_DCS_LONG_WRITE;
-   msgY.channel = channel;
-   msgY.tx_buf = payloadY;
-   msgY.tx_len = sizeof(payloadY);
-
-   ret = _omap_dsi_host_transfer(dsi, &msgX);
-   if (ret != 0)
-   return ret;
-
-   return _omap_dsi_host_transfer(dsi, &msgY);
+   return _omap_dsi_host_transfer(dsi, &msg);
 }
 
 static int dsi_update_channel(struct omap_dss_device *dssdev, int channel)
@@ -3941,10 +3925,14 @@ static int dsi_update_channel(struct omap_dss_device 
*dssdev, int channel)
 
dsi_set_ulps_auto(dsi, false);
 
-   r = _dsi_update_window(dsi, channel, 0, 0, dsi->vm.hactive,
-  dsi->vm.vactive);
+   /*
+* Send NOP between the frames. If we don't send something here, the
+* updates stop working. This is probably related to DSI spec stating
+* that the DSI host should transition to LP at least once per frame.
+*/
+   r = _dsi_send_nop(dsi, channel);
if (r < 0) {
-   DSSWARN("window update error: %d\n", r);
+   DSSWARN("failed to send nop between frames: %d\n", r);
goto err;
}
 
-- 
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Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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[PATCH v6 73/84] drm/panel: panel-dsi-cm: drop unneeded includes

Drop unneeded includes.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Sam Ravnborg 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/panel/panel-dsi-cm.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-dsi-cm.c 
b/drivers/gpu/drm/panel/panel-dsi-cm.c
index c549329dc4b9..af381d756ac1 100644
--- a/drivers/gpu/drm/panel/panel-dsi-cm.c
+++ b/drivers/gpu/drm/panel/panel-dsi-cm.c
@@ -11,8 +11,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
-- 
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[PATCH v6 72/84] drm/panel: panel-dsi-cm: add panel database to driver

Add a panel database to the driver instead of reading propertes from DT
data. This is similar to panel-simple, and I believe it's more future
safe way to handle the panels.

Signed-off-by: Tomi Valkeinen 
Reviewed-by: Sam Ravnborg 
Reviewed-by: Sebastian Reichel 
---
 drivers/gpu/drm/panel/panel-dsi-cm.c | 104 +--
 1 file changed, 66 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-dsi-cm.c 
b/drivers/gpu/drm/panel/panel-dsi-cm.c
index f5240fd82459..c549329dc4b9 100644
--- a/drivers/gpu/drm/panel/panel-dsi-cm.c
+++ b/drivers/gpu/drm/panel/panel-dsi-cm.c
@@ -21,10 +21,7 @@
 #include 
 #include 
 
-#include 
 #include 
-#include 
-#include 
 
 #define DCS_GET_ID10xda
 #define DCS_GET_ID20xdb
@@ -32,6 +29,18 @@
 
 #define DCS_REGULATOR_SUPPLY_NUM 2
 
+static const struct of_device_id dsicm_of_match[];
+
+struct dsic_panel_data {
+   u32 xres;
+   u32 yres;
+   u32 refresh;
+   u32 width_mm;
+   u32 height_mm;
+   u32 max_hs_rate;
+   u32 max_lp_rate;
+};
+
 struct panel_drv_data {
struct mipi_dsi_device *dsi;
struct drm_panel panel;
@@ -47,16 +56,14 @@ struct panel_drv_data {
 */
unsigned long   hw_guard_wait;  /* max guard time in jiffies */
 
-   /* panel HW configuration from DT or platform data */
+   const struct dsic_panel_data *panel_data;
+
struct gpio_desc *reset_gpio;
 
struct regulator_bulk_data supplies[DCS_REGULATOR_SUPPLY_NUM];
 
bool use_dsi_backlight;
 
-   int width_mm;
-   int height_mm;
-
/* runtime variables */
bool enabled;
 
@@ -450,11 +457,8 @@ static int dsicm_get_modes(struct drm_panel *panel,
return -ENOMEM;
}
 
-   drm_mode_set_name(mode);
-   mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
-
-   connector->display_info.width_mm = ddata->width_mm;
-   connector->display_info.height_mm = ddata->height_mm;
+   connector->display_info.width_mm = ddata->panel_data->width_mm;
+   connector->display_info.height_mm = ddata->panel_data->height_mm;
 
drm_mode_probed_add(connector, mode);
 
@@ -471,15 +475,10 @@ static const struct drm_panel_funcs dsicm_panel_funcs = {
 
 static int dsicm_probe_of(struct mipi_dsi_device *dsi)
 {
-   struct device_node *node = dsi->dev.of_node;
struct backlight_device *backlight;
struct panel_drv_data *ddata = mipi_dsi_get_drvdata(dsi);
-   struct display_timing timing;
-   struct videomode vm = {
-   .hactive = 864,
-   .vactive = 480,
-   };
int err;
+   struct drm_display_mode *mode = &ddata->mode;
 
ddata->reset_gpio = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(ddata->reset_gpio)) {
@@ -488,23 +487,16 @@ static int dsicm_probe_of(struct mipi_dsi_device *dsi)
return err;
}
 
-   err = of_get_display_timing(node, "panel-timing", &timing);
-   if (!err) {
-   videomode_from_timing(&timing, &vm);
-   } else {
-   dev_warn(&dsi->dev,
-"failed to get video timing, using defaults\n");
-   }
-
-   if (!vm.pixelclock)
-   vm.pixelclock = vm.hactive * vm.vactive * 60;
-   drm_display_mode_from_videomode(&vm, &ddata->mode);
-
-   ddata->width_mm = 0;
-   of_property_read_u32(node, "width-mm", &ddata->width_mm);
-
-   ddata->height_mm = 0;
-   of_property_read_u32(node, "height-mm", &ddata->height_mm);
+   mode->hdisplay = mode->hsync_start = mode->hsync_end = mode->htotal =
+   ddata->panel_data->xres;
+   mode->vdisplay = mode->vsync_start = mode->vsync_end = mode->vtotal =
+   ddata->panel_data->yres;
+   mode->clock = ddata->panel_data->xres * ddata->panel_data->yres *
+   ddata->panel_data->refresh / 1000;
+   mode->width_mm = ddata->panel_data->width_mm;
+   mode->height_mm = ddata->panel_data->height_mm;
+   mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+   drm_mode_set_name(mode);
 
ddata->supplies[0].supply = "vpnl";
ddata->supplies[1].supply = "vddi";
@@ -542,6 +534,10 @@ static int dsicm_probe(struct mipi_dsi_device *dsi)
mipi_dsi_set_drvdata(dsi, ddata);
ddata->dsi = dsi;
 
+   ddata->panel_data = of_device_get_match_data(dev);
+   if (!ddata->panel_data)
+   return -ENODEV;
+
r = dsicm_probe_of(dsi);
if (r)
return r;
@@ -578,8 +574,8 @@ static int dsicm_probe(struct mipi_dsi_device *dsi)
dsi->format = MIPI_DSI_FMT_RGB888;
dsi->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS |
  MIPI_DSI_MODE_EOT_PACKET;
-   dsi->hs_rate = 3;
-   dsi->lp_rate = 1000;
+   dsi->hs_rate = ddata->panel_data->max_hs_rate;
+   dsi->lp_rate = ddata->pa

[PATCH v6 84/84] drm/omap: dsi: allow DSI commands to be sent early