Re: [PATCH v3 4/7] drm/msm/dp: incorporate pm_runtime framework into DP driver

2023-09-15 Thread kernel test robot
Hi Kuogee,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-exynos/exynos-drm-next drm-intel/for-linux-next 
drm-intel/for-linux-next-fixes linus/master v6.6-rc1]
[cannot apply to drm-misc/drm-misc-next drm-tip/drm-tip next-20230915]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:
https://github.com/intel-lab-lkp/linux/commits/Kuogee-Hsieh/drm-msm-dp-tie-dp_display_irq_handler-with-dp-driver/20230916-054014
base:   git://anongit.freedesktop.org/drm/drm drm-next
patch link:
https://lore.kernel.org/r/1694813901-26952-5-git-send-email-quic_khsieh%40quicinc.com
patch subject: [PATCH v3 4/7] drm/msm/dp: incorporate pm_runtime framework into 
DP driver
config: sparc-allyesconfig 
(https://download.01.org/0day-ci/archive/20230916/202309161321.ueiyrcis-...@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/20230916/202309161321.ueiyrcis-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/202309161321.ueiyrcis-...@intel.com/

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/msm/dp/dp_power.c: In function 'dp_power_client_deinit':
>> drivers/gpu/drm/msm/dp/dp_power.c:160:34: warning: variable 'power' set but 
>> not used [-Wunused-but-set-variable]
 160 | struct dp_power_private *power;
 |  ^
   drivers/gpu/drm/msm/dp/dp_power.c: In function 'dp_power_init':
   drivers/gpu/drm/msm/dp/dp_power.c:168:34: warning: variable 'power' set but 
not used [-Wunused-but-set-variable]
 168 | struct dp_power_private *power = NULL;
 |  ^
   drivers/gpu/drm/msm/dp/dp_power.c: In function 'dp_power_deinit':
   drivers/gpu/drm/msm/dp/dp_power.c:179:34: warning: variable 'power' set but 
not used [-Wunused-but-set-variable]
 179 | struct dp_power_private *power;
 |  ^


vim +/power +160 drivers/gpu/drm/msm/dp/dp_power.c

c943b4948b5848 Chandan Uddaraju 2020-08-27  157  
c943b4948b5848 Chandan Uddaraju 2020-08-27  158  void 
dp_power_client_deinit(struct dp_power *dp_power)
c943b4948b5848 Chandan Uddaraju 2020-08-27  159  {
c943b4948b5848 Chandan Uddaraju 2020-08-27 @160 struct dp_power_private 
*power;
c943b4948b5848 Chandan Uddaraju 2020-08-27  161  
c943b4948b5848 Chandan Uddaraju 2020-08-27  162 power = 
container_of(dp_power, struct dp_power_private, dp_power);
c943b4948b5848 Chandan Uddaraju 2020-08-27  163  }
c943b4948b5848 Chandan Uddaraju 2020-08-27  164  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki


[Bug 217916] New: amdgpu: ring gfx_low timeout (Google Maps zooming)

2023-09-15 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=217916

Bug ID: 217916
   Summary: amdgpu: ring gfx_low timeout (Google Maps zooming)
   Product: Drivers
   Version: 2.5
  Hardware: All
OS: Linux
Status: NEW
  Severity: normal
  Priority: P3
 Component: Video(DRI - non Intel)
  Assignee: drivers_video-...@kernel-bugs.osdl.org
  Reporter: war...@togami.com
Regression: No

kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx_low timeout,
signaled seq=3002, emitted seq=3004 
kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR* Process information: process
chromium-browse pid 4034 thread chromium-b:cs0 pid 4074
kernel: amdgpu :05:00.0: amdgpu: GPU reset begin!
kernel: amdgpu :05:00.0: amdgpu: MODE2 reset
kernel: amdgpu :05:00.0: amdgpu: GPU reset succeeded, trying to resume

Thinkpad T14s Gen 2 AMD
AMD Ryzen 7 PRO 5850U with Radeon Graphics

Fedora 38
mesa-23.1.7-1.fc38.x86_64
chromium-116.0.5845.187-1.fc38.x86_64
Working versions: kernel-6.4.16
Broken versions:  kernel-6.5.2 and 6.5.3

Reproduce Procedure
1) Boot into kernel-6.5.2 or 6.5.3.
2) Run Chromium browser
3) maps.google.com
4) Search for an address. Plot a driving route.
5) Something about the map zooming causing the amdgpu crash. Sometimes it takes
2-3 attempts for the crash to occur.

It does not crash with kernel-6.4.x.

https://fedorapeople.org/~wtogami/a/2023/KERNEL-6.5.3-amdgpu-crash3.log
full dmesg log

-- 
You may reply to this email to add a comment.

You are receiving this mail because:
You are watching the assignee of the bug.

Re: [PATCH v6 1/3] drm/i915/pxp/mtl: Update pxp-firmware response timeout

2023-09-15 Thread kernel test robot
Hi Alan,

kernel test robot noticed the following build errors:

[auto build test ERROR on cf1e91e884bb1113c653e654e9de1754fc1d4488]

url:
https://github.com/intel-lab-lkp/linux/commits/Alan-Previn/drm-i915-pxp-mtl-Update-pxp-firmware-response-timeout/20230916-023150
base:   cf1e91e884bb1113c653e654e9de1754fc1d4488
patch link:
https://lore.kernel.org/r/20230915183051.1232026-2-alan.previn.teres.alexis%40intel.com
patch subject: [PATCH v6 1/3] drm/i915/pxp/mtl: Update pxp-firmware response 
timeout
config: x86_64-allyesconfig 
(https://download.01.org/0day-ci/archive/20230916/202309161030.tcqkw66y-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/20230916/202309161030.tcqkw66y-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/202309161030.tcqkw66y-...@intel.com/

All errors (new ones prefixed by >>):

   drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c: In function 'gsccs_send_message':
>> drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c:115:52: error: 
>> 'GSC_REPLY_LATENCY_MS' undeclared (first use in this function); did you mean 
>> 'GSC_HECI_REPLY_LATENCY_MS'?
 115 |
GSC_REPLY_LATENCY_MS);
 |
^~~~
 |
GSC_HECI_REPLY_LATENCY_MS
   drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c:115:52: note: each undeclared 
identifier is reported only once for each function it appears in


vim +115 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

99afb7cc8c4457 Alan Previn   2023-05-11   51  
dc9ac125d81faf Alan Previn   2023-05-11   52  static int
dc9ac125d81faf Alan Previn   2023-05-11   53  gsccs_send_message(struct 
intel_pxp *pxp,
dc9ac125d81faf Alan Previn   2023-05-11   54   void 
*msg_in, size_t msg_in_size,
dc9ac125d81faf Alan Previn   2023-05-11   55   void 
*msg_out, size_t msg_out_size_max,
dc9ac125d81faf Alan Previn   2023-05-11   56   size_t 
*msg_out_len,
dc9ac125d81faf Alan Previn   2023-05-11   57   u64 
*gsc_msg_handle_retry)
dc9ac125d81faf Alan Previn   2023-05-11   58  {
dc9ac125d81faf Alan Previn   2023-05-11   59struct intel_gt *gt = 
pxp->ctrl_gt;
dc9ac125d81faf Alan Previn   2023-05-11   60struct drm_i915_private 
*i915 = gt->i915;
dc9ac125d81faf Alan Previn   2023-05-11   61struct 
gsccs_session_resources *exec_res =  &pxp->gsccs_res;
dc9ac125d81faf Alan Previn   2023-05-11   62struct 
intel_gsc_mtl_header *header = exec_res->pkt_vaddr;
dc9ac125d81faf Alan Previn   2023-05-11   63struct 
intel_gsc_heci_non_priv_pkt pkt;
dc9ac125d81faf Alan Previn   2023-05-11   64size_t max_msg_size;
dc9ac125d81faf Alan Previn   2023-05-11   65u32 reply_size;
dc9ac125d81faf Alan Previn   2023-05-11   66int ret;
dc9ac125d81faf Alan Previn   2023-05-11   67  
dc9ac125d81faf Alan Previn   2023-05-11   68if (!exec_res->ce)
dc9ac125d81faf Alan Previn   2023-05-11   69return -ENODEV;
dc9ac125d81faf Alan Previn   2023-05-11   70  
dc9ac125d81faf Alan Previn   2023-05-11   71max_msg_size = 
PXP43_MAX_HECI_INOUT_SIZE - sizeof(*header);
dc9ac125d81faf Alan Previn   2023-05-11   72  
dc9ac125d81faf Alan Previn   2023-05-11   73if (msg_in_size > 
max_msg_size || msg_out_size_max > max_msg_size)
dc9ac125d81faf Alan Previn   2023-05-11   74return -ENOSPC;
dc9ac125d81faf Alan Previn   2023-05-11   75  
dc9ac125d81faf Alan Previn   2023-05-11   76if (!exec_res->pkt_vma 
|| !exec_res->bb_vma)
dc9ac125d81faf Alan Previn   2023-05-11   77return -ENOENT;
dc9ac125d81faf Alan Previn   2023-05-11   78  
dc9ac125d81faf Alan Previn   2023-05-11   79
GEM_BUG_ON(exec_res->pkt_vma->size < (2 * PXP43_MAX_HECI_INOUT_SIZE));
dc9ac125d81faf Alan Previn   2023-05-11   80  
dc9ac125d81faf Alan Previn   2023-05-11   81
mutex_lock(&pxp->tee_mutex);
dc9ac125d81faf Alan Previn   2023-05-11   82  
dc9ac125d81faf Alan Previn   2023-05-11   83memset(header, 0, 
sizeof(*header));
dc9ac125d81faf Alan Previn   2023-05-11   84
intel_gsc_uc_heci_cmd_emit_mtl_header(header, HECI_MEADDRESS_PXP,
dc9ac125d81faf Alan Previn   2023-05-11   85
  msg_in_size + sizeof(*header),
dc9ac125d81faf Alan Previn   2023-05-11   86
  exec_res->host_session_handle);
dc9ac125d81faf Alan Previn   2023-05-11   87  
dc9ac125d81faf Alan Previn   2023-05-11   88   

Re: [PATCH v3 2/7] drm/msm/dp: replace is_connected with link_ready

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 00:38, Kuogee Hsieh  wrote:
>
> The is_connected flag is set to true after DP mainlink successfully
> finish link training. Replace the is_connected flag with link_ready

finishes.
Also this is not a replace, this patch renames the flag.

> flag to avoid confusing.

confusing what with what?

>
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_display.c | 19 +--
>  drivers/gpu/drm/msm/dp/dp_display.h |  2 +-
>  drivers/gpu/drm/msm/dp/dp_drm.c | 14 +++---
>  3 files changed, 17 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index c217430..18d16c7 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -367,12 +367,11 @@ static void dp_display_send_hpd_event(struct msm_dp 
> *dp_display)
> drm_helper_hpd_irq_event(connector->dev);
>  }
>
> -
>  static int dp_display_send_hpd_notification(struct dp_display_private *dp,
> bool hpd)
>  {
> -   if ((hpd && dp->dp_display.is_connected) ||
> -   (!hpd && !dp->dp_display.is_connected)) {
> +   if ((hpd && dp->dp_display.link_ready) ||
> +   (!hpd && !dp->dp_display.link_ready)) {
> drm_dbg_dp(dp->drm_dev, "HPD already %s\n",
> (hpd ? "on" : "off"));
> return 0;
> @@ -382,7 +381,7 @@ static int dp_display_send_hpd_notification(struct 
> dp_display_private *dp,
> if (!hpd)
> dp->panel->video_test = false;
>
> -   dp->dp_display.is_connected = hpd;
> +   dp->dp_display.link_ready = hpd;
>
> drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n",
> dp->dp_display.connector_type, hpd);
> @@ -922,7 +921,7 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
>
> dp_display->plugged_cb = fn;
> dp_display->codec_dev = codec_dev;
> -   plugged = dp_display->is_connected;
> +   plugged = dp_display->link_ready;
> dp_display_handle_plugged_change(dp_display, plugged);
>
> return 0;
> @@ -1352,16 +1351,16 @@ static int dp_pm_resume(struct device *dev)
>  * also only signal audio when disconnected
>  */
> if (dp->link->sink_count) {
> -   dp->dp_display.is_connected = true;
> +   dp->dp_display.link_ready = true;
> } else {
> -   dp->dp_display.is_connected = false;
> +   dp->dp_display.link_ready = false;
> dp_display_handle_plugged_change(dp_display, false);
> }
>
> drm_dbg_dp(dp->drm_dev,
> "After, type=%d sink=%d conn=%d core_init=%d phy_init=%d 
> power=%d\n",
> dp->dp_display.connector_type, dp->link->sink_count,
> -   dp->dp_display.is_connected, dp->core_initialized,
> +   dp->dp_display.link_ready, dp->core_initialized,
> dp->phy_initialized, dp_display->power_on);
>
> mutex_unlock(&dp->event_mutex);
> @@ -1754,8 +1753,8 @@ void dp_bridge_hpd_notify(struct drm_bridge *bridge,
> return;
> }
>
> -   if (!dp_display->is_connected && status == connector_status_connected)
> +   if (!dp_display->link_ready && status == connector_status_connected)
> dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0);
> -   else if (dp_display->is_connected && status == 
> connector_status_disconnected)
> +   else if (dp_display->link_ready && status == 
> connector_status_disconnected)
> dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
>  }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.h 
> b/drivers/gpu/drm/msm/dp/dp_display.h
> index b3c08de..d65693e 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.h
> +++ b/drivers/gpu/drm/msm/dp/dp_display.h
> @@ -16,7 +16,7 @@ struct msm_dp {
> struct drm_bridge *bridge;
> struct drm_connector *connector;
> struct drm_bridge *next_bridge;
> -   bool is_connected;
> +   bool link_ready;
> bool audio_enabled;
> bool power_on;
> unsigned int connector_type;
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
> index 785d766..ee945ca 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.c
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.c
> @@ -24,10 +24,10 @@ static enum drm_connector_status dp_bridge_detect(struct 
> drm_bridge *bridge)
>
> dp = to_dp_bridge(bridge)->dp_display;
>
> -   drm_dbg_dp(dp->drm_dev, "is_connected = %s\n",
> -   (dp->is_connected) ? "true" : "false");
> +   drm_dbg_dp(dp->drm_dev, "link_ready = %s\n",
> +   (dp->link_ready) ? "true" : "false");
>
> -   return (dp->is_connected) ? connector_status_connected :
> +   return (dp->link_ready) ? connector_status_connected :
> connector_status_di

Re: [PATCH v3 7/7] drm/msm/dp: move of_dp_aux_populate_bus() to eDP probe()

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 00:39, Kuogee Hsieh  wrote:
>
> Currently eDP population is done at msm_dp_modeset_init() which happen
> at binding time. Move eDP population to be done at display probe time
> so that probe deferral cases can be handled effectively.
> wait_for_hpd_asserted callback is added during drm_dp_aux_init()
> to ensure eDP's HPD is up before proceeding eDP population.
>
> Changes in v3:
> -- add done_probing callback into devm_of_dp_aux_populate_bus()
>
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_aux.c | 25 
>  drivers/gpu/drm/msm/dp/dp_display.c | 79 
> ++---
>  2 files changed, 64 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
> index 8fa93c5..79f0c6e 100644
> --- a/drivers/gpu/drm/msm/dp/dp_aux.c
> +++ b/drivers/gpu/drm/msm/dp/dp_aux.c
> @@ -507,6 +507,21 @@ void dp_aux_unregister(struct drm_dp_aux *dp_aux)
> drm_dp_aux_unregister(dp_aux);
>  }
>
> +static int dp_wait_hpd_asserted(struct drm_dp_aux *dp_aux,
> +unsigned long wait_us)
> +{
> +   int ret;
> +   struct dp_aux_private *aux;
> +
> +   aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
> +
> +   pm_runtime_get_sync(aux->dev);
> +   ret = dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog);
> +   pm_runtime_put_sync(aux->dev);
> +
> +   return ret;
> +}
> +
>  struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog,
>   bool is_edp)
>  {
> @@ -530,6 +545,16 @@ struct drm_dp_aux *dp_aux_get(struct device *dev, struct 
> dp_catalog *catalog,
> aux->catalog = catalog;
> aux->retry_cnt = 0;
>
> +   /*
> +* Use the drm_dp_aux_init() to use the aux adapter
> +* before registering aux with the DRM device.
> +*/

Usual comment: this describes what, but should be documenting why.

> +   aux->dp_aux.name = "dpu_dp_aux";
> +   aux->dp_aux.dev = dev;
> +   aux->dp_aux.transfer = dp_aux_transfer;
> +   aux->dp_aux.wait_hpd_asserted = dp_wait_hpd_asserted;

Then the relevant code should be removed before a call to drm_dp_aux_register().

> +   drm_dp_aux_init(&aux->dp_aux);
> +
> return &aux->dp_aux;
>  }
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index b58cb02..886fae5 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -310,8 +310,6 @@ static void dp_display_unbind(struct device *dev, struct 
> device *master,
>
> kthread_stop(dp->ev_tsk);
>
> -   of_dp_aux_depopulate_bus(dp->aux);
> -
> dp_power_client_deinit(dp->power);
> dp_unregister_audio_driver(dev, dp->audio);
> dp_aux_unregister(dp->aux);
> @@ -1217,6 +1215,31 @@ static const struct msm_dp_desc 
> *dp_display_get_desc(struct platform_device *pde
> return NULL;
>  }
>
> +static int dp_auxbus_done_probe(struct drm_dp_aux *aux)
> +{
> +   int rc;
> +
> +   rc = component_add(aux->dev, &dp_display_comp_ops);
> +   if (rc)
> +   DRM_ERROR("eDP component add failed, rc=%d\n", rc);
> +
> +   return rc;
> +}
> +
> +static int dp_display_auxbus_population(struct dp_display_private *dp)
> +{
> +   struct device *dev = &dp->pdev->dev;
> +   struct device_node *aux_bus;
> +   int ret = 0;
> +
> +   aux_bus = of_get_child_by_name(dev->of_node, "aux-bus");

device_node refcount leak.

But I think that the aux-bus existence check is incorrect here.
of_dp_aux_populate_bus() will check and return -ENODEV if there is no
aux-bus subnode.

And once you have dropped the aux_bus check, you can safely inline
this function.

> +
> +   if (aux_bus)
> +   ret = devm_of_dp_aux_populate_bus(dp->aux, 
> dp_auxbus_done_probe);
> +
> +   return ret;
> +}
> +
>  static int dp_display_probe(struct platform_device *pdev)
>  {
> int rc = 0;
> @@ -1282,10 +1305,16 @@ static int dp_display_probe(struct platform_device 
> *pdev)
> if (rc)
> return rc;
>
> -   rc = component_add(&pdev->dev, &dp_display_comp_ops);
> -   if (rc) {
> -   DRM_ERROR("component add failed, rc=%d\n", rc);
> -   dp_display_deinit_sub_modules(dp);
> +   if (dp->dp_display.is_edp) {
> +   rc = dp_display_auxbus_population(dp);
> +   if (rc)
> +   DRM_ERROR("eDP auxbus population failed, rc=%d\n", 
> rc);
> +   } else {
> +   rc = component_add(&pdev->dev, &dp_display_comp_ops);
> +   if (rc) {
> +   DRM_ERROR("component add failed, rc=%d\n", rc);
> +   dp_display_deinit_sub_modules(dp);
> +   }
> }
>
> return rc;
> @@ -1296,14 +1325,13 @@ static int dp_display_remove(struct platform_device 
> *pdev)
>  

[syzbot] [dri?] WARNING in drm_gem_object_handle_put_unlocked

2023-09-15 Thread syzbot
Hello,

syzbot found the following issue on:

HEAD commit:0bb80ecc33a8 Linux 6.6-rc1
git tree:   upstream
console+strace: https://syzkaller.appspot.com/x/log.txt?x=1002530c68
kernel config:  https://syzkaller.appspot.com/x/.config?x=f4894cf58531f
dashboard link: https://syzkaller.appspot.com/bug?extid=ef3256a360c02207a4cb
compiler:   gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 
2.40
syz repro:  https://syzkaller.appspot.com/x/repro.syz?x=14a79ca068
C reproducer:   https://syzkaller.appspot.com/x/repro.c?x=1690040268

Downloadable assets:
disk image: 
https://storage.googleapis.com/syzbot-assets/eeb0cac260c7/disk-0bb80ecc.raw.xz
vmlinux: 
https://storage.googleapis.com/syzbot-assets/a3c360110254/vmlinux-0bb80ecc.xz
kernel image: 
https://storage.googleapis.com/syzbot-assets/22b81065ba5f/bzImage-0bb80ecc.xz

IMPORTANT: if you fix the issue, please add the following tag to the commit:
Reported-by: syzbot+ef3256a360c02207a...@syzkaller.appspotmail.com

R10:  R11: 0246 R12: 7fda971e917c
R13: 7fda97153210 R14: 0023647261632f69 R15: 6972642f7665642f
 
[ cut here ]
WARNING: CPU: 1 PID: 5043 at drivers/gpu/drm/drm_gem.c:225 
drm_gem_object_handle_put_unlocked+0x299/0x390 drivers/gpu/drm/drm_gem.c:225
Modules linked in:
CPU: 1 PID: 5043 Comm: syz-executor141 Not tainted 6.6.0-rc1-syzkaller #0
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 
08/04/2023
RIP: 0010:drm_gem_object_handle_put_unlocked+0x299/0x390 
drivers/gpu/drm/drm_gem.c:225
Code: ea 03 0f b6 04 02 84 c0 74 0c 3c 03 7f 08 4c 89 f7 e8 2b 06 2a fd c7 83 
20 01 00 00 00 00 00 00 e9 98 fe ff ff e8 57 44 d4 fc <0f> 0b 5b 5d 41 5c 41 5d 
41 5e e9 48 44 d4 fc e8 43 44 d4 fc 48 8d
RSP: 0018:c90003d5fbb8 EFLAGS: 00010293
RAX:  RBX: 888027b61000 RCX: 
RDX: 888014fcbb80 RSI: 84b38a29 RDI: 0005
RBP: 888027b61004 R08: 0005 R09: 
R10:  R11: 0001 R12: 88801d14
R13: 888027b61008 R14:  R15: 888027b61018
FS:  7fda971536c0() GS:8880b990() knlGS:
CS:  0010 DS:  ES:  CR0: 80050033
CR2: 7fda971fe794 CR3: 72975000 CR4: 003506e0
DR0:  DR1:  DR2: 
DR3:  DR6: fffe0ff0 DR7: 0400
Call Trace:
 
 drm_gem_handle_create_tail+0x32f/0x540 drivers/gpu/drm/drm_gem.c:407
 drm_gem_shmem_create_with_handle drivers/gpu/drm/drm_gem_shmem_helper.c:417 
[inline]
 drm_gem_shmem_dumb_create+0x21a/0x310 
drivers/gpu/drm/drm_gem_shmem_helper.c:505
 drm_mode_create_dumb drivers/gpu/drm/drm_dumb_buffers.c:96 [inline]
 drm_mode_create_dumb_ioctl+0x268/0x2f0 drivers/gpu/drm/drm_dumb_buffers.c:102
 drm_ioctl_kernel+0x280/0x4c0 drivers/gpu/drm/drm_ioctl.c:789
 drm_ioctl+0x5cb/0xbf0 drivers/gpu/drm/drm_ioctl.c:892
 vfs_ioctl fs/ioctl.c:51 [inline]
 __do_sys_ioctl fs/ioctl.c:871 [inline]
 __se_sys_ioctl fs/ioctl.c:857 [inline]
 __x64_sys_ioctl+0x18f/0x210 fs/ioctl.c:857
 do_syscall_x64 arch/x86/entry/common.c:50 [inline]
 do_syscall_64+0x38/0xb0 arch/x86/entry/common.c:80
 entry_SYSCALL_64_after_hwframe+0x63/0xcd
RIP: 0033:0x7fda971954e9
Code: 28 00 00 00 75 05 48 83 c4 28 c3 e8 51 18 00 00 90 48 89 f8 48 89 f7 48 
89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 
c3 48 c7 c1 b0 ff ff ff f7 d8 64 89 01 48
RSP: 002b:7fda971531f8 EFLAGS: 0246 ORIG_RAX: 0010
RAX: ffda RBX: 7fda9721c3e8 RCX: 7fda971954e9
RDX: 2080 RSI: c02064b2 RDI: 0003
RBP: 7fda9721c3e0 R08: 7fda97152f96 R09: 
R10:  R11: 0246 R12: 7fda971e917c
R13: 7fda97153210 R14: 0023647261632f69 R15: 6972642f7665642f
 


---
This report is generated by a bot. It may contain errors.
See https://goo.gl/tpsmEJ for more information about syzbot.
syzbot engineers can be reached at syzkal...@googlegroups.com.

syzbot will keep track of this issue. See:
https://goo.gl/tpsmEJ#status for how to communicate with syzbot.

If the bug is already fixed, let syzbot know by replying with:
#syz fix: exact-commit-title

If you want syzbot to run the reproducer, reply with:
#syz test: git://repo/address.git branch-or-commit-hash
If you attach or paste a git patch, syzbot will apply it before testing.

If you want to overwrite bug's subsystems, reply with:
#syz set subsystems: new-subsystem
(See the list of subsystem names on the web dashboard)

If the bug is a duplicate of another bug, reply with:
#syz dup: exact-subject-of-another-report

If you want to undo deduplication, reply with:
#syz undup


Re: [PATCH v3 6/7] drm/msm/dp: add pm_runtime_force_suspend()/resume()

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 00:38, Kuogee Hsieh  wrote:
>
> Add pm_runtime_force_suspend()/resume() to complete incorporating pm
> runtime framework into DP driver. Both dp_pm_prepare() and dp_pm_complete()
> are added to set hpd_state to correct state. After resume, DP driver will
> re training its main link after .hpd_enable() callback enabled HPD
> interrupts and bring up display accordingly.

How will it re-train the main link? What is the code path for that?

I think this is a misuse for prepare/complete callbacks, at least
judging from their documentation.

>
> Changes in v3:
> -- replace dp_pm_suspend() with pm_runtime_force_suspend()
> -- replace dp_pm_resume() with pm_runtime_force_resume()
>
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_display.c | 87 
> +
>  1 file changed, 10 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index b6992202..b58cb02 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -1333,101 +1333,35 @@ static int dp_pm_runtime_resume(struct device *dev)
> return 0;
>  }
>
> -static int dp_pm_resume(struct device *dev)
> +static void dp_pm_complete(struct device *dev)
>  {
> -   struct platform_device *pdev = to_platform_device(dev);
> -   struct msm_dp *dp_display = platform_get_drvdata(pdev);
> -   struct dp_display_private *dp;
> -   int sink_count = 0;
> -
> -   dp = container_of(dp_display, struct dp_display_private, dp_display);
> +   struct dp_display_private *dp = dev_get_dp_display_private(dev);
>
> mutex_lock(&dp->event_mutex);
>
> drm_dbg_dp(dp->drm_dev,
> -   "Before, type=%d core_inited=%d phy_inited=%d power_on=%d\n",
> +   "type=%d core_inited=%d phy_inited=%d power_on=%d\n",
> dp->dp_display.connector_type, dp->core_initialized,
> -   dp->phy_initialized, dp_display->power_on);
> +   dp->phy_initialized, dp->dp_display.power_on);
>
> /* start from disconnected state */
> dp->hpd_state = ST_DISCONNECTED;
>
> -   /* turn on dp ctrl/phy */
> -   dp_display_host_init(dp);
> -
> -   if (dp_display->is_edp)
> -   dp_catalog_ctrl_hpd_enable(dp->catalog);
> -
> -   if (dp_catalog_link_is_connected(dp->catalog)) {
> -   /*
> -* set sink to normal operation mode -- D0
> -* before dpcd read
> -*/
> -   dp_display_host_phy_init(dp);
> -   dp_link_psm_config(dp->link, &dp->panel->link_info, false);
> -   sink_count = drm_dp_read_sink_count(dp->aux);
> -   if (sink_count < 0)
> -   sink_count = 0;
> -
> -   dp_display_host_phy_exit(dp);
> -   }
> -
> -   dp->link->sink_count = sink_count;
> -   /*
> -* can not declared display is connected unless
> -* HDMI cable is plugged in and sink_count of
> -* dongle become 1
> -* also only signal audio when disconnected
> -*/
> -   if (dp->link->sink_count) {
> -   dp->dp_display.link_ready = true;
> -   } else {
> -   dp->dp_display.link_ready = false;
> -   dp_display_handle_plugged_change(dp_display, false);
> -   }
> -
> -   drm_dbg_dp(dp->drm_dev,
> -   "After, type=%d sink=%d conn=%d core_init=%d phy_init=%d 
> power=%d\n",
> -   dp->dp_display.connector_type, dp->link->sink_count,
> -   dp->dp_display.link_ready, dp->core_initialized,
> -   dp->phy_initialized, dp_display->power_on);
> -
> mutex_unlock(&dp->event_mutex);
> -
> -   return 0;
>  }
>
> -static int dp_pm_suspend(struct device *dev)
> +static int dp_pm_prepare(struct device *dev)
>  {
> -   struct platform_device *pdev = to_platform_device(dev);
> -   struct msm_dp *dp_display = platform_get_drvdata(pdev);
> -   struct dp_display_private *dp;
> -
> -   dp = container_of(dp_display, struct dp_display_private, dp_display);
> +   struct dp_display_private *dp = dev_get_dp_display_private(dev);
>
> mutex_lock(&dp->event_mutex);
>
> -   drm_dbg_dp(dp->drm_dev,
> -   "Before, type=%d core_inited=%d  phy_inited=%d power_on=%d\n",
> -   dp->dp_display.connector_type, dp->core_initialized,
> -   dp->phy_initialized, dp_display->power_on);
> -
> /* mainlink enabled */
> if (dp_power_clk_status(dp->power, DP_CTRL_PM))
> dp_ctrl_off_link_stream(dp->ctrl);
>
> -   dp_display_host_phy_exit(dp);
> -
> -   /* host_init will be called at pm_resume */
> -   dp_display_host_deinit(dp);
> -
> dp->hpd_state = ST_SUSPENDED;
>
> -   drm_dbg_dp(dp->drm_dev,
> -   "After, type=%d core_inited=%d phy_inited=%d power_on=%d\n",
> -  

[PATCH] drm/nouveau: fence: fix type cast warning in nouveau_fence_emit()

2023-09-15 Thread Danilo Krummrich
Fix the following warning.

  drivers/gpu/drm/nouveau/nouveau_fence.c:210:45: sparse: sparse:
  incorrect type in initializer (different address spaces)
  @@ expected struct nouveau_channel *chan
  @@ got struct nouveau_channel [noderef] __rcu *channel

We're just about to emit the fence, there is nothing to protect against
yet, hence it is safe to just cast __rcu away.

Reported-by: kernel test robot 
Closes: 
https://lore.kernel.org/oe-kbuild-all/202309140340.bwkxzadx-...@intel.com/
Fixes: 978474dc8278 ("drm/nouveau: fence: fix undefined fence state after emit")
Signed-off-by: Danilo Krummrich 
---
 drivers/gpu/drm/nouveau/nouveau_fence.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c 
b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 61d9e70da9fd..ca762ea55413 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -207,7 +207,7 @@ nouveau_fence_context_new(struct nouveau_channel *chan, 
struct nouveau_fence_cha
 int
 nouveau_fence_emit(struct nouveau_fence *fence)
 {
-   struct nouveau_channel *chan = fence->channel;
+   struct nouveau_channel *chan = unrcu_pointer(fence->channel);
struct nouveau_fence_chan *fctx = chan->fence;
struct nouveau_fence_priv *priv = (void*)chan->drm->fence;
int ret;
-- 
2.41.0



Re: [PATCH v3 5/7] drm/msm/dp: delete EV_HPD_INIT_SETUP

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 00:38, Kuogee Hsieh  wrote:
>
> EV_HPD_INIT_SETUP flag is used to trigger the initialization of external
> DP host controller. Since external DP host controller initialization had
> been incorporated into pm_runtime_resume(), this flag become obsolete.

became

> Lets get rid of it.

Reviewed-by: Dmitry Baryshkov 

>
> Changes in v3:
> -- drop EV_HPD_INIT_SETUP and msm_dp_irq_postinstall()

This is not a changelog of the patch. It is a short description of the
patch itself. Please describe changes.

>
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  4 
>  drivers/gpu/drm/msm/dp/dp_display.c | 16 
>  drivers/gpu/drm/msm/msm_drv.h   |  5 -
>  3 files changed, 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index aa8499d..71d0670 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -870,7 +870,6 @@ static int dpu_irq_postinstall(struct msm_kms *kms)
>  {
> struct msm_drm_private *priv;
> struct dpu_kms *dpu_kms = to_dpu_kms(kms);
> -   int i;
>
> if (!dpu_kms || !dpu_kms->dev)
> return -EINVAL;
> @@ -879,9 +878,6 @@ static int dpu_irq_postinstall(struct msm_kms *kms)
> if (!priv)
> return -EINVAL;
>
> -   for (i = 0; i < ARRAY_SIZE(priv->dp); i++)
> -   msm_dp_irq_postinstall(priv->dp[i]);
> -
> return 0;
>  }
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index e7af7f7..b6992202 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -55,7 +55,6 @@ enum {
>  enum {
> EV_NO_EVENT,
> /* hpd events */
> -   EV_HPD_INIT_SETUP,
> EV_HPD_PLUG_INT,
> EV_IRQ_HPD_INT,
> EV_HPD_UNPLUG_INT,
> @@ -1092,8 +1091,6 @@ static int hpd_event_thread(void *data)
> spin_unlock_irqrestore(&dp_priv->event_lock, flag);
>
> switch (todo->event_id) {
> -   case EV_HPD_INIT_SETUP:
> -   break;
> case EV_HPD_PLUG_INT:
> dp_hpd_plug_handle(dp_priv, todo->data);
> break;
> @@ -1469,19 +1466,6 @@ void __exit msm_dp_unregister(void)
> platform_driver_unregister(&dp_display_driver);
>  }
>
> -void msm_dp_irq_postinstall(struct msm_dp *dp_display)
> -{
> -   struct dp_display_private *dp;
> -
> -   if (!dp_display)
> -   return;
> -
> -   dp = container_of(dp_display, struct dp_display_private, dp_display);
> -
> -   if (!dp_display->is_edp)
> -   dp_add_event(dp, EV_HPD_INIT_SETUP, 0, 0);
> -}
> -
>  bool msm_dp_wide_bus_available(const struct msm_dp *dp_display)
>  {
> struct dp_display_private *dp;
> diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> index e13a8cb..ff8be59 100644
> --- a/drivers/gpu/drm/msm/msm_drv.h
> +++ b/drivers/gpu/drm/msm/msm_drv.h
> @@ -381,7 +381,6 @@ int __init msm_dp_register(void);
>  void __exit msm_dp_unregister(void);
>  int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
>  struct drm_encoder *encoder);
> -void msm_dp_irq_postinstall(struct msm_dp *dp_display);
>  void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp 
> *dp_display);
>
>  void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor);
> @@ -402,10 +401,6 @@ static inline int msm_dp_modeset_init(struct msm_dp 
> *dp_display,
> return -EINVAL;
>  }
>
> -static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display)
> -{
> -}
> -
>  static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct 
> msm_dp *dp_display)
>  {
>  }
> --
> 2.7.4
>


-- 
With best wishes
Dmitry


Re: [PATCH v3 4/7] drm/msm/dp: incorporate pm_runtime framework into DP driver

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 00:38, Kuogee Hsieh  wrote:
>
> Currently DP driver is executed independent of PM runtime framework.
> This lead DP driver incompatible with others. Incorporating pm runtime

Why is it incompatible? Which others are mentioned here?

> framework into DP driver so that both power and clocks to enable/disable
> host controller fits with PM runtime mechanism. Once pm runtime framework
> is incorporated into DP driver, wake up device from power up path is not
> necessary. Hence remove it. Both EV_POWER_PM_GET and EV_POWER_PM_PUT events
> are introduced to perform pm runtime control for the HPD GPIO routing to a
> display-connector case.
>
> Changes in v3:
> -- incorporate removing pm_runtime_xx() from dp_pwer.c to this patch
> -- use pm_runtime_resume_and_get() instead of pm_runtime_get()
> -- error checking pm_runtime_resume_and_get() return value
> -- add EV_POWER_PM_GET and PM_EV_POWER_PUT to handle HPD_GPIO case

Previous changelog?

>
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_aux.c |   5 ++
>  drivers/gpu/drm/msm/dp/dp_display.c | 114 
> +++-
>  drivers/gpu/drm/msm/dp/dp_power.c   |   9 ---
>  3 files changed, 90 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
> index 8e3b677..8fa93c5 100644
> --- a/drivers/gpu/drm/msm/dp/dp_aux.c
> +++ b/drivers/gpu/drm/msm/dp/dp_aux.c
> @@ -291,6 +291,9 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
> return -EINVAL;
> }
>
> +   if (pm_runtime_resume_and_get(dp_aux->dev))
> +   return  -EINVAL;

Please propagate error values instead of reinventing them.

> +
> mutex_lock(&aux->mutex);
> if (!aux->initted) {
> ret = -EIO;
> @@ -364,6 +367,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
>
>  exit:
> mutex_unlock(&aux->mutex);
> +   pm_runtime_mark_last_busy(dp_aux->dev);
> +   pm_runtime_put_autosuspend(dp_aux->dev);

What is the reason for using autosuspend? Such design decisions should
be described in the commit message.

>
> return ret;
>  }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index 59f9d85..e7af7f7 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -60,6 +60,8 @@ enum {
> EV_IRQ_HPD_INT,
> EV_HPD_UNPLUG_INT,
> EV_USER_NOTIFICATION,
> +   EV_POWER_PM_GET,
> +   EV_POWER_PM_PUT,
>  };
>
>  #define EVENT_TIMEOUT  (HZ/10) /* 100ms */
> @@ -276,13 +278,6 @@ static int dp_display_bind(struct device *dev, struct 
> device *master,
> dp->dp_display.drm_dev = drm;
> priv->dp[dp->id] = &dp->dp_display;
>
> -   rc = dp->parser->parse(dp->parser);
> -   if (rc) {
> -   DRM_ERROR("device tree parsing failed\n");
> -   goto end;
> -   }
> -
> -
> dp->drm_dev = drm;
> dp->aux->drm_dev = drm;
> rc = dp_aux_register(dp->aux);
> @@ -291,12 +286,6 @@ static int dp_display_bind(struct device *dev, struct 
> device *master,
> goto end;
> }
>
> -   rc = dp_power_client_init(dp->power);
> -   if (rc) {
> -   DRM_ERROR("Power client create failed\n");
> -   goto end;
> -   }
> -
> rc = dp_register_audio_driver(dev, dp->audio);
> if (rc) {
> DRM_ERROR("Audio registration Dp failed\n");
> @@ -320,10 +309,6 @@ static void dp_display_unbind(struct device *dev, struct 
> device *master,
> struct dp_display_private *dp = dev_get_dp_display_private(dev);
> struct msm_drm_private *priv = dev_get_drvdata(master);
>
> -   /* disable all HPD interrupts */
> -   if (dp->core_initialized)
> -   dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, 
> false);
> -
> kthread_stop(dp->ev_tsk);
>
> of_dp_aux_depopulate_bus(dp->aux);
> @@ -467,6 +452,18 @@ static void dp_display_host_deinit(struct 
> dp_display_private *dp)
> dp->core_initialized = false;
>  }
>
> +static void dp_display_pm_get(struct dp_display_private *dp)
> +{
> +   if (pm_runtime_resume_and_get(&dp->pdev->dev))
> +   DRM_ERROR("failed to start power\n");
> +}

Huge NAK here. This means that the error is completely ignored (other
than being dumped to the log). This is a short path to Sync error and
other kinds of reboot.

> +
> +static void dp_display_pm_put(struct dp_display_private *dp)
> +{
> +   pm_runtime_mark_last_busy(&dp->pdev->dev);
> +   pm_runtime_put_autosuspend(&dp->pdev->dev);
> +}
> +
>  static int dp_display_usbpd_configure_cb(struct device *dev)
>  {
> struct dp_display_private *dp = dev_get_dp_display_private(dev);
> @@ -1096,7 +1093,6 @@ static int hpd_event_thread(void *data)
>
> switch (todo->event_id) {
> case EV_HPD_INIT

Re: [PATCH v3 3/7] drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 00:38, Kuogee Hsieh  wrote:
>
> Currently DP driver use drm_helper_hpd_irq_event(), bypassing drm bridge
> framework, to report HPD status changes to user space frame work.
> Replace it with drm_bridge_hpd_notify() since DP driver is part of drm
> bridge.
>
> Signed-off-by: Kuogee Hsieh 

Reviewed-by: Dmitry Baryshkov 

Also see the comment below.

> ---
>  drivers/gpu/drm/msm/dp/dp_display.c | 20 ++--
>  1 file changed, 2 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index 18d16c7..59f9d85 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -356,26 +356,10 @@ static bool dp_display_is_sink_count_zero(struct 
> dp_display_private *dp)
> (dp->link->sink_count == 0);
>  }
>
> -static void dp_display_send_hpd_event(struct msm_dp *dp_display)
> -{
> -   struct dp_display_private *dp;
> -   struct drm_connector *connector;
> -
> -   dp = container_of(dp_display, struct dp_display_private, dp_display);
> -
> -   connector = dp->dp_display.connector;
> -   drm_helper_hpd_irq_event(connector->dev);
> -}
> -
>  static int dp_display_send_hpd_notification(struct dp_display_private *dp,
> bool hpd)
>  {
> -   if ((hpd && dp->dp_display.link_ready) ||
> -   (!hpd && !dp->dp_display.link_ready)) {
> -   drm_dbg_dp(dp->drm_dev, "HPD already %s\n",
> -   (hpd ? "on" : "off"));
> -   return 0;
> -   }
> +   struct drm_bridge *bridge = dp->dp_display.bridge;
>
> /* reset video pattern flag on disconnect */
> if (!hpd)

Note, this part (resetting the video_test and setting of is_connected)
should be moved to the dp_bridge_hpd_notify() too. Please ignore this
comment if this is handled later in the series.

> @@ -385,7 +369,7 @@ static int dp_display_send_hpd_notification(struct 
> dp_display_private *dp,
>
> drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n",
> dp->dp_display.connector_type, hpd);
> -   dp_display_send_hpd_event(&dp->dp_display);
> +   drm_bridge_hpd_notify(bridge, dp->dp_display.link_ready);
>
> return 0;
>  }
> --
> 2.7.4
>


-- 
With best wishes
Dmitry


Re: [PATCH v2] drm/msm/dsi: skip the wait for video mode done if not applicable

2023-09-15 Thread Dmitry Baryshkov
On Fri, 15 Sept 2023 at 23:45, Abhinav Kumar  wrote:
>
> dsi_wait4video_done() API waits for the DSI video mode engine to
> become idle so that we can transmit the DCS commands in the
> beginning of BLLP. However, with the current sequence, the MDP
> timing engine is turned on after the panel's pre_enable() callback
> which can send out the DCS commands needed to power up the panel.
>
> During those cases, this API will always timeout and print out the
> error spam leading to long bootup times and log flooding.
>
> Fix this by checking if the DSI video engine was actually busy before
> waiting for it to become idle otherwise this is a redundant wait.
>
> changes in v2:
> - move the reg read below the video mode check
> - minor fixes in commit text
>
> Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/34
> Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
> Signed-off-by: Abhinav Kumar 

Reviewed-by: Dmitry Baryshkov 

> ---
>  drivers/gpu/drm/msm/dsi/dsi_host.c | 12 
>  1 file changed, 12 insertions(+)
>


-- 
With best wishes
Dmitry


Re: [PATCH v3 1/7] drm/msm/dp: tie dp_display_irq_handler() with dp driver

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 00:38, Kuogee Hsieh  wrote:
>
> Currently the dp_display_irq_handler() is executed at msm_dp_modeset_init()
> which ties irq registration to the DPU device's life cycle, while depending on
> resources that are released as the DP device is torn down. Move register DP
> driver irq handler at dp_display_probe() to have dp_display_irq_handler()
> is tied with DP device.
>
> Changes in v3:
> -- move calling dp_display_irq_handler() to probe

Was there a changelog for the previous reivions? What is the
difference between v1 and v2?

>
> Signed-off-by: Kuogee Hsieh 
> ---
>  drivers/gpu/drm/msm/dp/dp_display.c | 35 +--
>  drivers/gpu/drm/msm/dp/dp_display.h |  1 -
>  2 files changed, 13 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index 76f1395..c217430 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -1193,30 +1193,23 @@ static irqreturn_t dp_display_irq_handler(int irq, 
> void *dev_id)
> return ret;
>  }
>
> -int dp_display_request_irq(struct msm_dp *dp_display)
> +static int dp_display_request_irq(struct dp_display_private *dp)
>  {
> int rc = 0;
> -   struct dp_display_private *dp;
> -
> -   if (!dp_display) {
> -   DRM_ERROR("invalid input\n");
> -   return -EINVAL;
> -   }
> -
> -   dp = container_of(dp_display, struct dp_display_private, dp_display);
> +   struct device *dev = &dp->pdev->dev;
>
> -   dp->irq = irq_of_parse_and_map(dp->pdev->dev.of_node, 0);
> if (!dp->irq) {

What is the point in this check?

> -   DRM_ERROR("failed to get irq\n");
> -   return -EINVAL;
> +   dp->irq = platform_get_irq(dp->pdev, 0);
> +   if (!dp->irq) {
> +   DRM_ERROR("failed to get irq\n");
> +   return -EINVAL;
> +   }
> }
>
> -   rc = devm_request_irq(dp_display->drm_dev->dev, dp->irq,
> -   dp_display_irq_handler,
> +   rc = devm_request_irq(dev, dp->irq, dp_display_irq_handler,
> IRQF_TRIGGER_HIGH, "dp_display_isr", dp);
> if (rc < 0) {
> -   DRM_ERROR("failed to request IRQ%u: %d\n",
> -   dp->irq, rc);
> +   DRM_ERROR("failed to request IRQ%u: %d\n", dp->irq, rc);
> return rc;
> }
>
> @@ -1287,6 +1280,10 @@ static int dp_display_probe(struct platform_device 
> *pdev)
>
> platform_set_drvdata(pdev, &dp->dp_display);
>
> +   rc = dp_display_request_irq(dp);
> +   if (rc)
> +   return rc;

This way the IRQ ends up being enabled in _probe. Are we ready to
handle it here? Is the DP device fully setup at this moment?

> +
> rc = component_add(&pdev->dev, &dp_display_comp_ops);
> if (rc) {
> DRM_ERROR("component add failed, rc=%d\n", rc);
> @@ -1549,12 +1546,6 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, 
> struct drm_device *dev,
>
> dp_priv = container_of(dp_display, struct dp_display_private, 
> dp_display);
>
> -   ret = dp_display_request_irq(dp_display);
> -   if (ret) {
> -   DRM_ERROR("request_irq failed, ret=%d\n", ret);
> -   return ret;
> -   }
> -
> ret = dp_display_get_next_bridge(dp_display);
> if (ret)
> return ret;
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.h 
> b/drivers/gpu/drm/msm/dp/dp_display.h
> index 1e9415a..b3c08de 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.h
> +++ b/drivers/gpu/drm/msm/dp/dp_display.h
> @@ -35,7 +35,6 @@ struct msm_dp {
>  int dp_display_set_plugged_cb(struct msm_dp *dp_display,
> hdmi_codec_plugged_cb fn, struct device *codec_dev);
>  int dp_display_get_modes(struct msm_dp *dp_display);
> -int dp_display_request_irq(struct msm_dp *dp_display);
>  bool dp_display_check_video_test(struct msm_dp *dp_display);
>  int dp_display_get_test_bpp(struct msm_dp *dp_display);
>  void dp_display_signal_audio_start(struct msm_dp *dp_display);
> --
> 2.7.4
>


-- 
With best wishes
Dmitry


Re: [PATCH v4 8/9] drm/msm/dpu: merge DPU_SSPP_SCALER_QSEED3, QSEED3LITE, QSEED4

2023-09-15 Thread Dmitry Baryshkov
On Sat, 16 Sept 2023 at 02:01, Abhinav Kumar  wrote:
>
>
>
> On 9/11/2023 2:45 PM, Dmitry Baryshkov wrote:
> > Three different features, DPU_SSPP_SCALER_QSEED3, QSEED3LITE and QSEED4
> > are all related to different versions of the same HW scaling block.
> > Corresponding driver parts use scaler_blk.version to identify the
> > correct way to program the hardware. In order to simplify the driver
> > codepath, merge these three feature bits.
> >
> > Signed-off-by: Dmitry Baryshkov 
>
> I am okay with some parts of this change but not all.
>
> Please see below.
>
> > ---
> >   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
> >   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 6 +-
> >   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c| 9 ++---
> >   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h| 4 +---
> >   drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c  | 3 +--
> >   5 files changed, 7 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > index b37b4076e53a..67d66319a825 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > @@ -31,10 +31,10 @@
> >   (VIG_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> >
> >   #define VIG_SC7180_MASK \
> > - (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4))
> > + (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3))
> >
> >   #define VIG_SM6125_MASK \
> > - (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE))
> > + (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3))
> >
>
> This is like a half-n-half solution. This is telling that SC7180 and
> SM6125 have a scaler blk version of 3.1 but are still qseed3. That gives
> a misleading picture.

I had the impression that unlike QSEED2 (which was an actual thing)
the the names qseed3 / qseed3lite / qseed4 are more related to the
userspace lib. From the hardware point of view there are different
scaler versions (of course), but they do not correspond to the
3/3lite/4 names. I might be wrong here.
Can you please recommend a better name for this block?

> >   #define VIG_SC7180_MASK_SDMA \
> >   (VIG_SC7180_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h 
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> > index fc5027b0123a..ba262b3f0bdc 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> > @@ -51,9 +51,7 @@ enum {
> >   /**
> >* SSPP sub-blocks/features
> >* @DPU_SSPP_SCALER_QSEED2,  QSEED2 algorithm support
> > - * @DPU_SSPP_SCALER_QSEED3,  QSEED3 alogorithm support
> > - * @DPU_SSPP_SCALER_QSEED3LITE,  QSEED3 Lite alogorithm support
> > - * @DPU_SSPP_SCALER_QSEED4,  QSEED4 algorithm support
> > + * @DPU_SSPP_SCALER_QSEED3,  QSEED3 alogorithm support (also QSEED3LITE 
> > and QSEED4)
> >* @DPU_SSPP_SCALER_RGB, RGB Scaler, supported by RGB pipes
> >* @DPU_SSPP_CSC,Support of Color space converion
> >* @DPU_SSPP_CSC_10BIT,  Support of 10-bit Color space conversion
> > @@ -72,8 +70,6 @@ enum {
> >   enum {
> >   DPU_SSPP_SCALER_QSEED2 = 0x1,
> >   DPU_SSPP_SCALER_QSEED3,
> > - DPU_SSPP_SCALER_QSEED3LITE,
> > - DPU_SSPP_SCALER_QSEED4,
> >   DPU_SSPP_SCALER_RGB,
> >   DPU_SSPP_CSC,
> >   DPU_SSPP_CSC_10BIT,
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> > index 7e9c87088e17..d1b70cf72eef 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> > @@ -594,9 +594,7 @@ static void _setup_layer_ops(struct dpu_hw_sspp *c,
> >   test_bit(DPU_SSPP_SMART_DMA_V2, &c->cap->features))
> >   c->ops.setup_multirect = dpu_hw_sspp_setup_multirect;
> >
> > - if (test_bit(DPU_SSPP_SCALER_QSEED3, &features) ||
> > - test_bit(DPU_SSPP_SCALER_QSEED3LITE, &features) ||
> > - test_bit(DPU_SSPP_SCALER_QSEED4, &features))
> > + if (test_bit(DPU_SSPP_SCALER_QSEED3, &features))
> >   c->ops.setup_scaler = _dpu_hw_sspp_setup_scaler3;
> >
> any reason we cannot replace this with sblk->scaler_blk.version >= 1.2?

Is there a scaler version for the QSEED2 and/or RGB scalers? I was not
sure, so I preferred to be explicit here.
Another option might be to use core revision here, limiting it to MDP >= 3.0

But we still need to distinguish QSEED3-and-later, QSEED2 and RGB scalers.

> >   if (test_bit(DPU_SSPP_CDP, &features))
> > @@ -629,10 +627,7 @@ int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp 
> > *hw_pipe, struct dpu_kms *kms,
> >   cfg->len,
> >   kms);
> >
> > - if (cfg->features & BIT(DPU_SSPP_SCALER_QSEED3) ||
> > - cfg->features &

Re: Fwd: Kernel 6.6-rc1 fails to reboot or shutdown Ryzen 5825U

2023-09-15 Thread Bagas Sanjaya
On Thu, Sep 14, 2023 at 02:03:00PM +0700, Bagas Sanjaya wrote:
> #regzbot introduced: v6.5..v6.6 
> https://bugzilla.kernel.org/show_bug.cgi?id=217905
> #regzbot title: shutdown/reboot hang on Ryzen 5825U (stuck on amdgpu 
> initialization)
> 

Fixing up commit range:

#regzbot introduced: v6.5..v6.6-rc1

-- 
An old man doll... just what I always wanted! - Clara


signature.asc
Description: PGP signature


Re: [Nouveau] [PATCH] nouveau/u_memcpya: fix NULL vs error pointer bug

2023-09-15 Thread Danilo Krummrich

Hi Dan,

On 9/15/23 14:59, Dan Carpenter wrote:

The u_memcpya() function is supposed to return error pointers on
error.  Returning NULL will lead to an Oops.

Fixes: 68132cc6d1bc ("nouveau/u_memcpya: use vmemdup_user")
Signed-off-by: Dan Carpenter 
---
  drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h 
b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 3666a7403e47..52a708a98915 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -193,7 +193,7 @@ u_memcpya(uint64_t user, unsigned int nmemb, unsigned int 
size)
size_t bytes;
  
  	if (unlikely(check_mul_overflow(nmemb, size, &bytes)))

-   return NULL;
+   return ERR_PTR(-ENOMEM);


I plan to replace this function with an upcoming vmemdup_array_user() helper,
which returns -EOVERFLOW instead, hence mind using that?

Unless you disagree, no need to resubmit the patch, I can change it before 
applying
the patch.

- Danilo


return vmemdup_user(userptr, bytes);
  }
  




Re: [PATCH v4 8/9] drm/msm/dpu: merge DPU_SSPP_SCALER_QSEED3, QSEED3LITE, QSEED4

2023-09-15 Thread Abhinav Kumar




On 9/11/2023 2:45 PM, Dmitry Baryshkov wrote:

Three different features, DPU_SSPP_SCALER_QSEED3, QSEED3LITE and QSEED4
are all related to different versions of the same HW scaling block.
Corresponding driver parts use scaler_blk.version to identify the
correct way to program the hardware. In order to simplify the driver
codepath, merge these three feature bits.

Signed-off-by: Dmitry Baryshkov 


I am okay with some parts of this change but not all.

Please see below.


---
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 6 +-
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c| 9 ++---
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h| 4 +---
  drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c  | 3 +--
  5 files changed, 7 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index b37b4076e53a..67d66319a825 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -31,10 +31,10 @@
(VIG_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
  
  #define VIG_SC7180_MASK \

-   (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED4))
+   (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3))
  
  #define VIG_SM6125_MASK \

-   (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE))
+   (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3))
 


This is like a half-n-half solution. This is telling that SC7180 and 
SM6125 have a scaler blk version of 3.1 but are still qseed3. That gives 
a misleading picture.





  #define VIG_SC7180_MASK_SDMA \
(VIG_SC7180_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index fc5027b0123a..ba262b3f0bdc 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -51,9 +51,7 @@ enum {
  /**
   * SSPP sub-blocks/features
   * @DPU_SSPP_SCALER_QSEED2,  QSEED2 algorithm support
- * @DPU_SSPP_SCALER_QSEED3,  QSEED3 alogorithm support
- * @DPU_SSPP_SCALER_QSEED3LITE,  QSEED3 Lite alogorithm support
- * @DPU_SSPP_SCALER_QSEED4,  QSEED4 algorithm support
+ * @DPU_SSPP_SCALER_QSEED3,  QSEED3 alogorithm support (also QSEED3LITE and 
QSEED4)
   * @DPU_SSPP_SCALER_RGB, RGB Scaler, supported by RGB pipes
   * @DPU_SSPP_CSC,Support of Color space converion
   * @DPU_SSPP_CSC_10BIT,  Support of 10-bit Color space conversion
@@ -72,8 +70,6 @@ enum {
  enum {
DPU_SSPP_SCALER_QSEED2 = 0x1,
DPU_SSPP_SCALER_QSEED3,
-   DPU_SSPP_SCALER_QSEED3LITE,
-   DPU_SSPP_SCALER_QSEED4,
DPU_SSPP_SCALER_RGB,
DPU_SSPP_CSC,
DPU_SSPP_CSC_10BIT,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 7e9c87088e17..d1b70cf72eef 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -594,9 +594,7 @@ static void _setup_layer_ops(struct dpu_hw_sspp *c,
test_bit(DPU_SSPP_SMART_DMA_V2, &c->cap->features))
c->ops.setup_multirect = dpu_hw_sspp_setup_multirect;
  
-	if (test_bit(DPU_SSPP_SCALER_QSEED3, &features) ||

-   test_bit(DPU_SSPP_SCALER_QSEED3LITE, &features) ||
-   test_bit(DPU_SSPP_SCALER_QSEED4, &features))
+   if (test_bit(DPU_SSPP_SCALER_QSEED3, &features))
c->ops.setup_scaler = _dpu_hw_sspp_setup_scaler3;
 

any reason we cannot replace this with sblk->scaler_blk.version >= 1.2?


if (test_bit(DPU_SSPP_CDP, &features))
@@ -629,10 +627,7 @@ int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, 
struct dpu_kms *kms,
cfg->len,
kms);
  
-	if (cfg->features & BIT(DPU_SSPP_SCALER_QSEED3) ||

-   cfg->features & BIT(DPU_SSPP_SCALER_QSEED3LITE) ||
-   cfg->features & BIT(DPU_SSPP_SCALER_QSEED2) ||
-   cfg->features & BIT(DPU_SSPP_SCALER_QSEED4))
+   if (sblk->scaler_blk.len)
dpu_debugfs_create_regset32("scaler_blk", 0400,
debugfs_root,
sblk->scaler_blk.base + cfg->base,


This part LGTM.


diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
index ca02f86c94ed..b157ed7da065 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
@@ -26,9 +26,7 @@ struct dpu_hw_sspp;
   */
  #define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \
 BIT(DPU_SSPP_SCALER_QSEED2) | \
-BIT(DPU_SSPP_SCALER_QSEED3) | \
-BIT(DPU_SSPP_SCALER_QSEED3LITE) | \
-BIT(DP

[PATCH][V2] drm/amd/display: Remove unwanted drm edid references

2023-09-15 Thread Alex Hung
[WHY]
edid_override and drm_edid_override_connector_update, according to drm
documentation, should not be referred outside drm_edid.

[HOW]
Remove and replace them accordingly. This can tested by IGT's
kms_hdmi_inject test.

Signed-off-by: Alex Hung 
---

V2 - add comments for drm_get_edid and check edid before use.

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 44 +++
 1 file changed, 25 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 5efebc06296b..b29ef87c27a9 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6444,15 +6444,24 @@ amdgpu_dm_connector_late_register(struct drm_connector 
*connector)
 static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector)
 {
struct amdgpu_dm_connector *aconnector = 
to_amdgpu_dm_connector(connector);
+   struct amdgpu_connector *amdgpu_connector = 
to_amdgpu_connector(connector);
struct dc_link *dc_link = aconnector->dc_link;
struct dc_sink *dc_em_sink = aconnector->dc_em_sink;
struct edid *edid;
 
-   if (!connector->edid_override)
+   /*
+* Note: drm_get_edid gets edid in the following order:
+* 1) override EDID if set via edid_override debugfs,
+* 2) firmware EDID if set via edid_firmware module parameter
+* 3) regular DDC read.
+*/
+   edid = drm_get_edid(connector, &amdgpu_connector->ddc_bus->aux.ddc);
+   if (!edid) {
+   DRM_ERROR("No EDID found on connector: %s, forcing to OFF!\n", 
connector->name);
+   connector->force = DRM_FORCE_OFF;
return;
+   }
 
-   drm_edid_override_connector_update(&aconnector->base);
-   edid = aconnector->base.edid_blob_ptr->data;
aconnector->edid = edid;
 
/* Update emulated (virtual) sink's EDID */
@@ -6487,30 +6496,27 @@ static int get_modes(struct drm_connector *connector)
 
 static void create_eml_sink(struct amdgpu_dm_connector *aconnector)
 {
+   struct drm_connector *connector = &aconnector->base;
+   struct amdgpu_connector *amdgpu_connector = 
to_amdgpu_connector(&aconnector->base);
struct dc_sink_init_data init_params = {
.link = aconnector->dc_link,
.sink_signal = SIGNAL_TYPE_VIRTUAL
};
struct edid *edid;
 
-   if (!aconnector->base.edid_blob_ptr) {
-   /* if connector->edid_override valid, pass
-* it to edid_override to edid_blob_ptr
-*/
-
-   drm_edid_override_connector_update(&aconnector->base);
-
-   if (!aconnector->base.edid_blob_ptr) {
-   DRM_ERROR("No EDID firmware found on connector: %s 
,forcing to OFF!\n",
-   aconnector->base.name);
-
-   aconnector->base.force = DRM_FORCE_OFF;
-   return;
-   }
+   /*
+* Note: drm_get_edid gets edid in the following order:
+* 1) override EDID if set via edid_override debugfs,
+* 2) firmware EDID if set via edid_firmware module parameter
+* 3) regular DDC read.
+*/
+   edid = drm_get_edid(connector, &amdgpu_connector->ddc_bus->aux.ddc);
+   if (!edid) {
+   DRM_ERROR("No EDID found on connector: %s, forcing to OFF!\n", 
connector->name);
+   connector->force = DRM_FORCE_OFF;
+   return;
}
 
-   edid = (struct edid *) aconnector->base.edid_blob_ptr->data;
-
aconnector->edid = edid;
 
aconnector->dc_em_sink = dc_link_add_remote_sink(
-- 
2.42.0



[PATCH 3/4] drm/i915/guc: Add support for w/a KLVs

2023-09-15 Thread John . C . Harrison
From: John Harrison 

To prevent running out of bits, new w/a enable flags are being added
via a KLV system instead of a 32 bit flags word.

Signed-off-by: John Harrison 
---
 .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h   |  1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  3 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 64 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c |  6 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  5 +-
 5 files changed, 77 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
index dabeaf4f245f3..00d6402333f8e 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
@@ -36,6 +36,7 @@ enum intel_guc_load_status {
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START,
INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID = 0x73,
INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID   = 0x74,
+   INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR= 0x75,
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END,
 
INTEL_GUC_LOAD_STATUS_READY= 0xF0,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 6c392bad29c19..3b1fc5f96306b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -186,6 +186,8 @@ struct intel_guc {
struct guc_mmio_reg *ads_regset;
/** @ads_golden_ctxt_size: size of the golden contexts in the ADS */
u32 ads_golden_ctxt_size;
+   /** @ads_waklv_size: size of workaround KLVs */
+   u32 ads_waklv_size;
/** @ads_capture_size: size of register lists in the ADS used for error 
capture */
u32 ads_capture_size;
/** @ads_engine_usage_size: size of engine usage in the ADS */
@@ -295,6 +297,7 @@ struct intel_guc {
 #define MAKE_GUC_VER(maj, min, pat)(((maj) << 16) | ((min) << 8) | (pat))
 #define MAKE_GUC_VER_STRUCT(ver)   MAKE_GUC_VER((ver).major, (ver).minor, 
(ver).patch)
 #define GUC_SUBMIT_VER(guc)
MAKE_GUC_VER_STRUCT((guc)->submission_version)
+#define GUC_FIRMWARE_VER(guc)  
MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
 
 static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
 {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 63724e17829a7..792910af3a481 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -46,6 +46,10 @@
  *  +---+
  *  | padding   |
  *  +---+ <== 4K aligned
+ *  | w/a KLVs  |
+ *  +---+
+ *  | padding   |
+ *  +---+ <== 4K aligned
  *  | capture lists |
  *  +---+
  *  | padding   |
@@ -88,6 +92,11 @@ static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc)
return PAGE_ALIGN(guc->ads_golden_ctxt_size);
 }
 
+static u32 guc_ads_waklv_size(struct intel_guc *guc)
+{
+   return PAGE_ALIGN(guc->ads_waklv_size);
+}
+
 static u32 guc_ads_capture_size(struct intel_guc *guc)
 {
return PAGE_ALIGN(guc->ads_capture_size);
@@ -113,7 +122,7 @@ static u32 guc_ads_golden_ctxt_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
 }
 
-static u32 guc_ads_capture_offset(struct intel_guc *guc)
+static u32 guc_ads_waklv_offset(struct intel_guc *guc)
 {
u32 offset;
 
@@ -123,6 +132,16 @@ static u32 guc_ads_capture_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
 }
 
+static u32 guc_ads_capture_offset(struct intel_guc *guc)
+{
+   u32 offset;
+
+   offset = guc_ads_waklv_offset(guc) +
+guc_ads_waklv_size(guc);
+
+   return PAGE_ALIGN(offset);
+}
+
 static u32 guc_ads_private_data_offset(struct intel_guc *guc)
 {
u32 offset;
@@ -791,6 +810,40 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
 }
 
+static void guc_waklv_init(struct intel_guc *guc)
+{
+   struct intel_gt *gt = guc_to_gt(guc);
+   u32 offset, addr_ggtt, remain, size;
+
+   if (!intel_uc_uses_guc_submission(>->uc))
+   return;
+
+   if (GUC_FIRMWARE_VER(guc) < MAKE_GUC_VER(70, 10, 0))
+   return;
+
+   GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
+   offset = guc_ads_waklv_offset(guc);
+   remain = guc_ads_waklv_size(guc);
+
+   /* Add workarounds here */
+
+   size = guc_ads_waklv_size(guc) - remain;
+   if (!size)
+   return;
+
+   addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
+
+   

[PATCH 4/4] drm/i915/guc: Enable Wa_14019159160

2023-09-15 Thread John . C . Harrison
From: John Harrison 

Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.

Signed-off-by: John Harrison 
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c  |  3 +++
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  1 +
 drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h |  7 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 26 ++-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  1 +
 6 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 8b494825c55f2..d31c405b095b7 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -734,6 +734,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request 
*rq, u32 *cs)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 #define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
 static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
 {
@@ -743,6 +744,7 @@ static u32 hold_switchout_semaphore_offset(struct 
i915_request *rq)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
 {
int i;
@@ -783,6 +785,7 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, 
u32 *cs)
 
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+   /* Wa_14019159160 */
if (intel_engine_uses_wa_hold_switchout(rq->engine))
cs = hold_switchout_emit_wa_busywait(rq, cs);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 68fe1cef9cd94..9b3051600856e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -684,6 +684,7 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs 
* const engine)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 static inline bool
 intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
 {
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
index 58012edd4eb0e..bebf28e3c4794 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
@@ -101,4 +101,11 @@ enum {
GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,
 };
 
+/*
+ * Workaround keys:
+ */
+enum {
+   GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE   = 
0x9001,
+};
+
 #endif /* _ABI_GUC_KLVS_ABI_H */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 4001679ba0793..e74590a71d113 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -295,6 +295,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
 
/* Wa_16019325821 */
+   /* Wa_14019159160 */
if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
flags |= GUC_WA_RCS_CCS_SWITCHOUT;
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 792910af3a481..a9fd2e96f27f5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -810,6 +810,25 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
 }
 
+/* Wa_14019159160 */
+static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain)
+{
+   u32 size;
+   u32 klv_entry[] = {
+   /* 16:16 key/length */
+   FIELD_PREP(GUC_KLV_0_KEY, 
GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) |
+   FIELD_PREP(GUC_KLV_0_LEN, 0),
+   /* 0 dwords data */
+   };
+
+   size = sizeof(klv_entry);
+   GEM_BUG_ON(remain < size);
+
+   iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size);
+
+   return size;
+}
+
 static void guc_waklv_init(struct intel_guc *guc)
 {
struct intel_gt *gt = guc_to_gt(guc);
@@ -825,7 +844,12 @@ static void guc_waklv_init(struct intel_guc *guc)
offset = guc_ads_waklv_offset(guc);
remain = guc_ads_waklv_size(guc);
 
-   /* Add workarounds here */
+   /* Wa_14019159160 */
+   if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {
+   size = guc_waklv_ra_mode(guc, offset, remain);
+   offset += size;
+   remain -= size;
+   }
 
size = guc_ads_waklv_size(guc) - remain;
if (!size)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index ff38a815701ce..c8428e4b03592 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/

[PATCH 2/4] drm/i915: Enable Wa_16019325821

2023-09-15 Thread John . C . Harrison
From: John Harrison 

Some platforms require holding RCS context switches until CCS is idle
(the reverse w/a of Wa_14014475959). Some platforms require both
versions.

Signed-off-by: John Harrison 
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c  | 19 +++
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  7 ---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  4 
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  3 ++-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  8 +++-
 5 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 0143445dba830..8b494825c55f2 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -733,21 +733,23 @@ static u32 *gen12_emit_preempt_busywait(struct 
i915_request *rq, u32 *cs)
 }
 
 /* Wa_14014475959:dg2 */
-#define CCS_SEMAPHORE_PPHWSP_OFFSET0x540
-static u32 ccs_semaphore_offset(struct i915_request *rq)
+/* Wa_16019325821 */
+#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
+static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
 {
return i915_ggtt_offset(rq->context->state) +
-   (LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET;
+   (LRC_PPHWSP_PN * PAGE_SIZE) + 
HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET;
 }
 
 /* Wa_14014475959:dg2 */
-static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
+/* Wa_16019325821 */
+static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
 {
int i;
 
*cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT | MI_ATOMIC_CS_STALL |
MI_ATOMIC_MOVE;
-   *cs++ = ccs_semaphore_offset(rq);
+   *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
*cs++ = 1;
 
@@ -763,7 +765,7 @@ static u32 *ccs_emit_wa_busywait(struct i915_request *rq, 
u32 *cs)
MI_SEMAPHORE_POLL |
MI_SEMAPHORE_SAD_EQ_SDD;
*cs++ = 0;
-   *cs++ = ccs_semaphore_offset(rq);
+   *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
 
return cs;
@@ -780,8 +782,9 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, 
u32 *cs)
cs = gen12_emit_preempt_busywait(rq, cs);
 
/* Wa_14014475959:dg2 */
-   if (intel_engine_uses_wa_hold_ccs_switchout(rq->engine))
-   cs = ccs_emit_wa_busywait(rq, cs);
+   /* Wa_16019325821 */
+   if (intel_engine_uses_wa_hold_switchout(rq->engine))
+   cs = hold_switchout_emit_wa_busywait(rq, cs);
 
rq->tail = intel_ring_offset(rq, cs);
assert_ring_tail_valid(rq->ring, rq->tail);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index a7e6775980043..68fe1cef9cd94 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -573,7 +573,7 @@ struct intel_engine_cs {
 #define I915_ENGINE_HAS_RCS_REG_STATE  BIT(9)
 #define I915_ENGINE_HAS_EU_PRIORITYBIT(10)
 #define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
-#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
+#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12)
unsigned int flags;
 
/*
@@ -683,10 +683,11 @@ intel_engine_has_relative_mmio(const struct 
intel_engine_cs * const engine)
 }
 
 /* Wa_14014475959:dg2 */
+/* Wa_16019325821 */
 static inline bool
-intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine)
+intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
 {
-   return engine->flags & I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
+   return engine->flags & I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
 }
 
 #endif /* __INTEL_ENGINE_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 27df41c53b890..4001679ba0793 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -294,6 +294,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
IS_DG2(gt->i915))
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
 
+   /* Wa_16019325821 */
+   if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
+   flags |= GUC_WA_RCS_CCS_SWITCHOUT;
+
/*
 * Wa_14012197797
 * Wa_22011391025
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index b4d56eccfb1f0..f97af0168a66b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -95,8 +95,9 @@
 #define   GUC_WA_GAM_CREDITS   BIT(10)
 #define   GUC_WA_DUAL_QUEUEBIT(11)
 #define   GUC_WA_RCS_RESET_BEFORE_RC6  BIT(13)
-#define   GUC_WA_CONTEXT_ISOLATION BIT(15)
 #define   GUC_WA_PRE_PARSERBIT(14)
+#define   GUC_WA_CONTEXT_ISOLATION BIT(15)
+#define   GUC_WA_RCS_CCS_SWITCHOUT 

[PATCH 1/4] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL

2023-09-15 Thread John . C . Harrison
From: John Harrison 

The latest GuC has new features and new workarounds that we wish to
enable. So let the universe know that it is useful to update their
firmware.

Signed-off-by: John Harrison 
---
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 
b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 32e27e9a2490f..a40f96c98308b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -88,9 +88,9 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
  * security fixes, etc. to be enabled.
  */
 #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \
-   fw_def(METEORLAKE,   0, guc_maj(mtl,  70, 6, 6)) \
-   fw_def(DG2,  0, guc_maj(dg2,  70, 5, 1)) \
-   fw_def(ALDERLAKE_P,  0, guc_maj(adlp, 70, 5, 1)) \
+   fw_def(METEORLAKE,   0, guc_maj(mtl,  70, 11, 0)) \
+   fw_def(DG2,  0, guc_maj(dg2,  70, 11, 0)) \
+   fw_def(ALDERLAKE_P,  0, guc_maj(adlp, 70, 11, 0)) \
fw_def(ALDERLAKE_P,  0, guc_mmp(adlp, 70, 1, 1)) \
fw_def(ALDERLAKE_P,  0, guc_mmp(adlp, 69, 0, 3)) \
fw_def(ALDERLAKE_S,  0, guc_maj(tgl,  70, 5, 1)) \
-- 
2.41.0



[PATCH 0/4] Enable Wa_14019159160 and Wa_16019325821 for MTL

2023-09-15 Thread John . C . Harrison
From: John Harrison 

Enable Wa_14019159160 and  Wa_16019325821 for MTL

RCS/CCS workarounds for MTL.

Signed-off-by: John Harrison 


John Harrison (4):
  drm/i915/guc: Update 'recommended' version to 70.11.0 for
DG2/ADL-P/MTL
  drm/i915: Enable Wa_16019325821
  drm/i915/guc: Add support for w/a KLVs
  drm/i915/guc: Enable Wa_14019159160

 drivers/gpu/drm/i915/gt/gen8_engine_cs.c  | 22 +++--
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  8 +-
 .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h   |  1 +
 drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h |  7 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  5 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  3 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 88 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c |  6 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  8 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  9 +-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c  |  6 +-
 11 files changed, 145 insertions(+), 18 deletions(-)

-- 
2.41.0



Re: [PATCH v4 7/9] drm/msm/dpu: drop DPU_HW_SUBBLK_INFO macro

2023-09-15 Thread Abhinav Kumar




On 9/11/2023 2:45 PM, Dmitry Baryshkov wrote:

As the subblock info is now mostly gone, inline and drop the macro
DPU_HW_SUBBLK_INFO.

Signed-off-by: Dmitry Baryshkov 
---
  .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 40 ++-
  1 file changed, 21 insertions(+), 19 deletions(-)




Reviewed-by: Abhinav Kumar 


Re: [RFC PATCH 2/8] drm/panel: nv3052c: Add SPI device IDs

2023-09-15 Thread Jessica Zhang




On 9/11/2023 2:02 AM, John Watts wrote:

SPI drivers needs their own list of compatible device IDs in order
for automatic module loading to work. Add those for this driver.


Hi John,

Reviewed-by: Jessica Zhang 

Thanks,

Jessica Zhang



Signed-off-by: John Watts 
---
  drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c 
b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
index 589431523ce7..90dea21f9856 100644
--- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
+++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
@@ -465,6 +465,12 @@ static const struct nv3052c_panel_info 
ltk035c5444t_panel_info = {
.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
  };
  
+static const struct spi_device_id nv3052c_ids[] = {

+   { "ltk035c5444t", },
+   { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(spi, nv3052c_ids);
+
  static const struct of_device_id nv3052c_of_match[] = {
{ .compatible = "leadtek,ltk035c5444t", .data = 


Re: [PATCH v4 6/9] drm/msm/dpu: deduplicate some (most) of SSPP sub-blocks

2023-09-15 Thread Abhinav Kumar




On 9/11/2023 2:45 PM, Dmitry Baryshkov wrote:

As we have dropped the variadic parts of SSPP sub-blocks declarations,
deduplicate them now, reducing memory cruft.

Signed-off-by: Dmitry Baryshkov 
---
  .../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h   | 16 +--
  .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h| 16 +--
  .../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h| 16 +--
  .../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h   | 16 +--
  .../msm/disp/dpu1/catalog/dpu_5_4_sm6125.h|  6 +-
  .../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h| 16 +--
  .../msm/disp/dpu1/catalog/dpu_6_2_sc7180.h|  8 +-
  .../msm/disp/dpu1/catalog/dpu_6_3_sm6115.h|  4 +-
  .../msm/disp/dpu1/catalog/dpu_6_4_sm6350.h|  8 +-
  .../msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h   |  4 +-
  .../msm/disp/dpu1/catalog/dpu_6_9_sm6375.h|  4 +-
  .../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h| 16 +--
  .../msm/disp/dpu1/catalog/dpu_7_2_sc7280.h|  8 +-
  .../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h  | 16 +--
  .../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h| 16 +--
  .../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h| 20 ++--
  .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 97 +--
  17 files changed, 120 insertions(+), 167 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
index ff83bf694fee..1276981c16d2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
@@ -69,7 +69,7 @@ static const struct dpu_sspp_cfg msm8998_sspp[] = {
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1ac,
.features = VIG_MSM8998_MASK,
-   .sblk = &msm8998_vig_sblk_0,
+   .sblk = &dpu_vig_sblk_1_2,


Thats a lot of de-duplication which is nice!

I think dpu_vig_sblk_scaler_x_y is a better name for all of these 
because it indicates that its the scaler version which is different.


[PATCH v3 5/7] drm/msm/dp: delete EV_HPD_INIT_SETUP

2023-09-15 Thread Kuogee Hsieh
EV_HPD_INIT_SETUP flag is used to trigger the initialization of external
DP host controller. Since external DP host controller initialization had
been incorporated into pm_runtime_resume(), this flag become obsolete.
Lets get rid of it.

Changes in v3:
-- drop EV_HPD_INIT_SETUP and msm_dp_irq_postinstall()

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  4 
 drivers/gpu/drm/msm/dp/dp_display.c | 16 
 drivers/gpu/drm/msm/msm_drv.h   |  5 -
 3 files changed, 25 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index aa8499d..71d0670 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -870,7 +870,6 @@ static int dpu_irq_postinstall(struct msm_kms *kms)
 {
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
-   int i;
 
if (!dpu_kms || !dpu_kms->dev)
return -EINVAL;
@@ -879,9 +878,6 @@ static int dpu_irq_postinstall(struct msm_kms *kms)
if (!priv)
return -EINVAL;
 
-   for (i = 0; i < ARRAY_SIZE(priv->dp); i++)
-   msm_dp_irq_postinstall(priv->dp[i]);
-
return 0;
 }
 
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index e7af7f7..b6992202 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -55,7 +55,6 @@ enum {
 enum {
EV_NO_EVENT,
/* hpd events */
-   EV_HPD_INIT_SETUP,
EV_HPD_PLUG_INT,
EV_IRQ_HPD_INT,
EV_HPD_UNPLUG_INT,
@@ -1092,8 +1091,6 @@ static int hpd_event_thread(void *data)
spin_unlock_irqrestore(&dp_priv->event_lock, flag);
 
switch (todo->event_id) {
-   case EV_HPD_INIT_SETUP:
-   break;
case EV_HPD_PLUG_INT:
dp_hpd_plug_handle(dp_priv, todo->data);
break;
@@ -1469,19 +1466,6 @@ void __exit msm_dp_unregister(void)
platform_driver_unregister(&dp_display_driver);
 }
 
-void msm_dp_irq_postinstall(struct msm_dp *dp_display)
-{
-   struct dp_display_private *dp;
-
-   if (!dp_display)
-   return;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
-
-   if (!dp_display->is_edp)
-   dp_add_event(dp, EV_HPD_INIT_SETUP, 0, 0);
-}
-
 bool msm_dp_wide_bus_available(const struct msm_dp *dp_display)
 {
struct dp_display_private *dp;
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index e13a8cb..ff8be59 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -381,7 +381,6 @@ int __init msm_dp_register(void);
 void __exit msm_dp_unregister(void);
 int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
 struct drm_encoder *encoder);
-void msm_dp_irq_postinstall(struct msm_dp *dp_display);
 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp 
*dp_display);
 
 void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor);
@@ -402,10 +401,6 @@ static inline int msm_dp_modeset_init(struct msm_dp 
*dp_display,
return -EINVAL;
 }
 
-static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display)
-{
-}
-
 static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct 
msm_dp *dp_display)
 {
 }
-- 
2.7.4



[PATCH v3 7/7] drm/msm/dp: move of_dp_aux_populate_bus() to eDP probe()

2023-09-15 Thread Kuogee Hsieh
Currently eDP population is done at msm_dp_modeset_init() which happen
at binding time. Move eDP population to be done at display probe time
so that probe deferral cases can be handled effectively.
wait_for_hpd_asserted callback is added during drm_dp_aux_init()
to ensure eDP's HPD is up before proceeding eDP population.

Changes in v3:
-- add done_probing callback into devm_of_dp_aux_populate_bus()

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_aux.c | 25 
 drivers/gpu/drm/msm/dp/dp_display.c | 79 ++---
 2 files changed, 64 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
index 8fa93c5..79f0c6e 100644
--- a/drivers/gpu/drm/msm/dp/dp_aux.c
+++ b/drivers/gpu/drm/msm/dp/dp_aux.c
@@ -507,6 +507,21 @@ void dp_aux_unregister(struct drm_dp_aux *dp_aux)
drm_dp_aux_unregister(dp_aux);
 }
 
+static int dp_wait_hpd_asserted(struct drm_dp_aux *dp_aux,
+unsigned long wait_us)
+{
+   int ret;
+   struct dp_aux_private *aux;
+
+   aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
+
+   pm_runtime_get_sync(aux->dev);
+   ret = dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog);
+   pm_runtime_put_sync(aux->dev);
+
+   return ret;
+}
+
 struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog,
  bool is_edp)
 {
@@ -530,6 +545,16 @@ struct drm_dp_aux *dp_aux_get(struct device *dev, struct 
dp_catalog *catalog,
aux->catalog = catalog;
aux->retry_cnt = 0;
 
+   /*
+* Use the drm_dp_aux_init() to use the aux adapter
+* before registering aux with the DRM device.
+*/
+   aux->dp_aux.name = "dpu_dp_aux";
+   aux->dp_aux.dev = dev;
+   aux->dp_aux.transfer = dp_aux_transfer;
+   aux->dp_aux.wait_hpd_asserted = dp_wait_hpd_asserted;
+   drm_dp_aux_init(&aux->dp_aux);
+
return &aux->dp_aux;
 }
 
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index b58cb02..886fae5 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -310,8 +310,6 @@ static void dp_display_unbind(struct device *dev, struct 
device *master,
 
kthread_stop(dp->ev_tsk);
 
-   of_dp_aux_depopulate_bus(dp->aux);
-
dp_power_client_deinit(dp->power);
dp_unregister_audio_driver(dev, dp->audio);
dp_aux_unregister(dp->aux);
@@ -1217,6 +1215,31 @@ static const struct msm_dp_desc 
*dp_display_get_desc(struct platform_device *pde
return NULL;
 }
 
+static int dp_auxbus_done_probe(struct drm_dp_aux *aux)
+{
+   int rc;
+
+   rc = component_add(aux->dev, &dp_display_comp_ops);
+   if (rc)
+   DRM_ERROR("eDP component add failed, rc=%d\n", rc);
+
+   return rc;
+}
+
+static int dp_display_auxbus_population(struct dp_display_private *dp)
+{
+   struct device *dev = &dp->pdev->dev;
+   struct device_node *aux_bus;
+   int ret = 0;
+
+   aux_bus = of_get_child_by_name(dev->of_node, "aux-bus");
+
+   if (aux_bus)
+   ret = devm_of_dp_aux_populate_bus(dp->aux, 
dp_auxbus_done_probe);
+
+   return ret;
+}
+
 static int dp_display_probe(struct platform_device *pdev)
 {
int rc = 0;
@@ -1282,10 +1305,16 @@ static int dp_display_probe(struct platform_device 
*pdev)
if (rc)
return rc;
 
-   rc = component_add(&pdev->dev, &dp_display_comp_ops);
-   if (rc) {
-   DRM_ERROR("component add failed, rc=%d\n", rc);
-   dp_display_deinit_sub_modules(dp);
+   if (dp->dp_display.is_edp) {
+   rc = dp_display_auxbus_population(dp);
+   if (rc)
+   DRM_ERROR("eDP auxbus population failed, rc=%d\n", rc);
+   } else {
+   rc = component_add(&pdev->dev, &dp_display_comp_ops);
+   if (rc) {
+   DRM_ERROR("component add failed, rc=%d\n", rc);
+   dp_display_deinit_sub_modules(dp);
+   }
}
 
return rc;
@@ -1296,14 +1325,13 @@ static int dp_display_remove(struct platform_device 
*pdev)
struct dp_display_private *dp = dev_get_dp_display_private(&pdev->dev);
 
component_del(&pdev->dev, &dp_display_comp_ops);
-   dp_display_deinit_sub_modules(dp);
-
platform_set_drvdata(pdev, NULL);
 
-   pm_runtime_put_sync_suspend(&pdev->dev);
pm_runtime_dont_use_autosuspend(&pdev->dev);
pm_runtime_disable(&pdev->dev);
 
+   dp_display_deinit_sub_modules(dp);
+
return 0;
 }
 
@@ -1432,31 +1460,10 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, 
struct drm_minor *minor)
 
 static int dp_display_get_next_bridge(struct msm_dp *dp)
 {
-   int rc;
+   int rc = 0;
struct dp_display_private *dp_priv;
-   struct device_node *aux_bus;
- 

[PATCH v3 0/7] incorporate pm runtime framework and eDP clean up

2023-09-15 Thread Kuogee Hsieh
Incorporate pm runtime framework into DP driver and clean up eDP
by moving of_dp_aux_populate_bus() to probe().

-- add v3 changes log

Kuogee Hsieh (7):
  drm/msm/dp: tie dp_display_irq_handler() with dp driver
  drm/msm/dp: replace is_connected with link_ready
  drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes
  drm/msm/dp: incorporate pm_runtime framework into DP driver
  drm/msm/dp: delete EV_HPD_INIT_SETUP
  drm/msm/dp: add pm_runtime_force_suspend()/resume()
  drm/msm/dp: move of_dp_aux_populate_bus() to eDP probe()

 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |   4 -
 drivers/gpu/drm/msm/dp/dp_aux.c |  30 +++
 drivers/gpu/drm/msm/dp/dp_display.c | 348 ++--
 drivers/gpu/drm/msm/dp/dp_display.h |   3 +-
 drivers/gpu/drm/msm/dp/dp_drm.c |  14 +-
 drivers/gpu/drm/msm/dp/dp_power.c   |   9 -
 drivers/gpu/drm/msm/msm_drv.h   |   5 -
 7 files changed, 185 insertions(+), 228 deletions(-)

-- 
2.7.4



[PATCH v3 3/7] drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes

2023-09-15 Thread Kuogee Hsieh
Currently DP driver use drm_helper_hpd_irq_event(), bypassing drm bridge
framework, to report HPD status changes to user space frame work.
Replace it with drm_bridge_hpd_notify() since DP driver is part of drm
bridge.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 20 ++--
 1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index 18d16c7..59f9d85 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -356,26 +356,10 @@ static bool dp_display_is_sink_count_zero(struct 
dp_display_private *dp)
(dp->link->sink_count == 0);
 }
 
-static void dp_display_send_hpd_event(struct msm_dp *dp_display)
-{
-   struct dp_display_private *dp;
-   struct drm_connector *connector;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
-
-   connector = dp->dp_display.connector;
-   drm_helper_hpd_irq_event(connector->dev);
-}
-
 static int dp_display_send_hpd_notification(struct dp_display_private *dp,
bool hpd)
 {
-   if ((hpd && dp->dp_display.link_ready) ||
-   (!hpd && !dp->dp_display.link_ready)) {
-   drm_dbg_dp(dp->drm_dev, "HPD already %s\n",
-   (hpd ? "on" : "off"));
-   return 0;
-   }
+   struct drm_bridge *bridge = dp->dp_display.bridge;
 
/* reset video pattern flag on disconnect */
if (!hpd)
@@ -385,7 +369,7 @@ static int dp_display_send_hpd_notification(struct 
dp_display_private *dp,
 
drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n",
dp->dp_display.connector_type, hpd);
-   dp_display_send_hpd_event(&dp->dp_display);
+   drm_bridge_hpd_notify(bridge, dp->dp_display.link_ready);
 
return 0;
 }
-- 
2.7.4



[PATCH v3 6/7] drm/msm/dp: add pm_runtime_force_suspend()/resume()

2023-09-15 Thread Kuogee Hsieh
Add pm_runtime_force_suspend()/resume() to complete incorporating pm
runtime framework into DP driver. Both dp_pm_prepare() and dp_pm_complete()
are added to set hpd_state to correct state. After resume, DP driver will
re training its main link after .hpd_enable() callback enabled HPD
interrupts and bring up display accordingly.

Changes in v3:
-- replace dp_pm_suspend() with pm_runtime_force_suspend()
-- replace dp_pm_resume() with pm_runtime_force_resume()

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 87 +
 1 file changed, 10 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index b6992202..b58cb02 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -1333,101 +1333,35 @@ static int dp_pm_runtime_resume(struct device *dev)
return 0;
 }
 
-static int dp_pm_resume(struct device *dev)
+static void dp_pm_complete(struct device *dev)
 {
-   struct platform_device *pdev = to_platform_device(dev);
-   struct msm_dp *dp_display = platform_get_drvdata(pdev);
-   struct dp_display_private *dp;
-   int sink_count = 0;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
+   struct dp_display_private *dp = dev_get_dp_display_private(dev);
 
mutex_lock(&dp->event_mutex);
 
drm_dbg_dp(dp->drm_dev,
-   "Before, type=%d core_inited=%d phy_inited=%d power_on=%d\n",
+   "type=%d core_inited=%d phy_inited=%d power_on=%d\n",
dp->dp_display.connector_type, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
+   dp->phy_initialized, dp->dp_display.power_on);
 
/* start from disconnected state */
dp->hpd_state = ST_DISCONNECTED;
 
-   /* turn on dp ctrl/phy */
-   dp_display_host_init(dp);
-
-   if (dp_display->is_edp)
-   dp_catalog_ctrl_hpd_enable(dp->catalog);
-
-   if (dp_catalog_link_is_connected(dp->catalog)) {
-   /*
-* set sink to normal operation mode -- D0
-* before dpcd read
-*/
-   dp_display_host_phy_init(dp);
-   dp_link_psm_config(dp->link, &dp->panel->link_info, false);
-   sink_count = drm_dp_read_sink_count(dp->aux);
-   if (sink_count < 0)
-   sink_count = 0;
-
-   dp_display_host_phy_exit(dp);
-   }
-
-   dp->link->sink_count = sink_count;
-   /*
-* can not declared display is connected unless
-* HDMI cable is plugged in and sink_count of
-* dongle become 1
-* also only signal audio when disconnected
-*/
-   if (dp->link->sink_count) {
-   dp->dp_display.link_ready = true;
-   } else {
-   dp->dp_display.link_ready = false;
-   dp_display_handle_plugged_change(dp_display, false);
-   }
-
-   drm_dbg_dp(dp->drm_dev,
-   "After, type=%d sink=%d conn=%d core_init=%d phy_init=%d 
power=%d\n",
-   dp->dp_display.connector_type, dp->link->sink_count,
-   dp->dp_display.link_ready, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
-
mutex_unlock(&dp->event_mutex);
-
-   return 0;
 }
 
-static int dp_pm_suspend(struct device *dev)
+static int dp_pm_prepare(struct device *dev)
 {
-   struct platform_device *pdev = to_platform_device(dev);
-   struct msm_dp *dp_display = platform_get_drvdata(pdev);
-   struct dp_display_private *dp;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
+   struct dp_display_private *dp = dev_get_dp_display_private(dev);
 
mutex_lock(&dp->event_mutex);
 
-   drm_dbg_dp(dp->drm_dev,
-   "Before, type=%d core_inited=%d  phy_inited=%d power_on=%d\n",
-   dp->dp_display.connector_type, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
-
/* mainlink enabled */
if (dp_power_clk_status(dp->power, DP_CTRL_PM))
dp_ctrl_off_link_stream(dp->ctrl);
 
-   dp_display_host_phy_exit(dp);
-
-   /* host_init will be called at pm_resume */
-   dp_display_host_deinit(dp);
-
dp->hpd_state = ST_SUSPENDED;
 
-   drm_dbg_dp(dp->drm_dev,
-   "After, type=%d core_inited=%d phy_inited=%d power_on=%d\n",
-   dp->dp_display.connector_type, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
-
mutex_unlock(&dp->event_mutex);
 
return 0;
@@ -1435,8 +1369,10 @@ static int dp_pm_suspend(struct device *dev)
 
 static const struct dev_pm_ops dp_pm_ops = {
SET_RUNTIME_PM_OPS(dp_pm_runtime_suspend, dp_pm_runtime_resume, NULL)
-   .suspend = dp_pm_suspend,
-   .resume =  dp_pm_resume,
+   

[PATCH v3 4/7] drm/msm/dp: incorporate pm_runtime framework into DP driver

2023-09-15 Thread Kuogee Hsieh
Currently DP driver is executed independent of PM runtime framework.
This lead DP driver incompatible with others. Incorporating pm runtime
framework into DP driver so that both power and clocks to enable/disable
host controller fits with PM runtime mechanism. Once pm runtime framework
is incorporated into DP driver, wake up device from power up path is not
necessary. Hence remove it. Both EV_POWER_PM_GET and EV_POWER_PM_PUT events
are introduced to perform pm runtime control for the HPD GPIO routing to a
display-connector case.

Changes in v3:
-- incorporate removing pm_runtime_xx() from dp_pwer.c to this patch
-- use pm_runtime_resume_and_get() instead of pm_runtime_get()
-- error checking pm_runtime_resume_and_get() return value
-- add EV_POWER_PM_GET and PM_EV_POWER_PUT to handle HPD_GPIO case

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_aux.c |   5 ++
 drivers/gpu/drm/msm/dp/dp_display.c | 114 +++-
 drivers/gpu/drm/msm/dp/dp_power.c   |   9 ---
 3 files changed, 90 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
index 8e3b677..8fa93c5 100644
--- a/drivers/gpu/drm/msm/dp/dp_aux.c
+++ b/drivers/gpu/drm/msm/dp/dp_aux.c
@@ -291,6 +291,9 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
return -EINVAL;
}
 
+   if (pm_runtime_resume_and_get(dp_aux->dev))
+   return  -EINVAL;
+
mutex_lock(&aux->mutex);
if (!aux->initted) {
ret = -EIO;
@@ -364,6 +367,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
 
 exit:
mutex_unlock(&aux->mutex);
+   pm_runtime_mark_last_busy(dp_aux->dev);
+   pm_runtime_put_autosuspend(dp_aux->dev);
 
return ret;
 }
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index 59f9d85..e7af7f7 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -60,6 +60,8 @@ enum {
EV_IRQ_HPD_INT,
EV_HPD_UNPLUG_INT,
EV_USER_NOTIFICATION,
+   EV_POWER_PM_GET,
+   EV_POWER_PM_PUT,
 };
 
 #define EVENT_TIMEOUT  (HZ/10) /* 100ms */
@@ -276,13 +278,6 @@ static int dp_display_bind(struct device *dev, struct 
device *master,
dp->dp_display.drm_dev = drm;
priv->dp[dp->id] = &dp->dp_display;
 
-   rc = dp->parser->parse(dp->parser);
-   if (rc) {
-   DRM_ERROR("device tree parsing failed\n");
-   goto end;
-   }
-
-
dp->drm_dev = drm;
dp->aux->drm_dev = drm;
rc = dp_aux_register(dp->aux);
@@ -291,12 +286,6 @@ static int dp_display_bind(struct device *dev, struct 
device *master,
goto end;
}
 
-   rc = dp_power_client_init(dp->power);
-   if (rc) {
-   DRM_ERROR("Power client create failed\n");
-   goto end;
-   }
-
rc = dp_register_audio_driver(dev, dp->audio);
if (rc) {
DRM_ERROR("Audio registration Dp failed\n");
@@ -320,10 +309,6 @@ static void dp_display_unbind(struct device *dev, struct 
device *master,
struct dp_display_private *dp = dev_get_dp_display_private(dev);
struct msm_drm_private *priv = dev_get_drvdata(master);
 
-   /* disable all HPD interrupts */
-   if (dp->core_initialized)
-   dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, 
false);
-
kthread_stop(dp->ev_tsk);
 
of_dp_aux_depopulate_bus(dp->aux);
@@ -467,6 +452,18 @@ static void dp_display_host_deinit(struct 
dp_display_private *dp)
dp->core_initialized = false;
 }
 
+static void dp_display_pm_get(struct dp_display_private *dp)
+{
+   if (pm_runtime_resume_and_get(&dp->pdev->dev))
+   DRM_ERROR("failed to start power\n");
+}
+
+static void dp_display_pm_put(struct dp_display_private *dp)
+{
+   pm_runtime_mark_last_busy(&dp->pdev->dev);
+   pm_runtime_put_autosuspend(&dp->pdev->dev);
+}
+
 static int dp_display_usbpd_configure_cb(struct device *dev)
 {
struct dp_display_private *dp = dev_get_dp_display_private(dev);
@@ -1096,7 +1093,6 @@ static int hpd_event_thread(void *data)
 
switch (todo->event_id) {
case EV_HPD_INIT_SETUP:
-   dp_display_host_init(dp_priv);
break;
case EV_HPD_PLUG_INT:
dp_hpd_plug_handle(dp_priv, todo->data);
@@ -,6 +1107,12 @@ static int hpd_event_thread(void *data)
dp_display_send_hpd_notification(dp_priv,
todo->data);
break;
+   case EV_POWER_PM_GET:
+   dp_display_pm_get(dp_priv);
+   break;
+   case EV_POWER_PM_PUT:
+   dp_display_pm_put(dp_priv);
+   break;
default:
   

[PATCH v3 2/7] drm/msm/dp: replace is_connected with link_ready

2023-09-15 Thread Kuogee Hsieh
The is_connected flag is set to true after DP mainlink successfully
finish link training. Replace the is_connected flag with link_ready
flag to avoid confusing.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 19 +--
 drivers/gpu/drm/msm/dp/dp_display.h |  2 +-
 drivers/gpu/drm/msm/dp/dp_drm.c | 14 +++---
 3 files changed, 17 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index c217430..18d16c7 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -367,12 +367,11 @@ static void dp_display_send_hpd_event(struct msm_dp 
*dp_display)
drm_helper_hpd_irq_event(connector->dev);
 }
 
-
 static int dp_display_send_hpd_notification(struct dp_display_private *dp,
bool hpd)
 {
-   if ((hpd && dp->dp_display.is_connected) ||
-   (!hpd && !dp->dp_display.is_connected)) {
+   if ((hpd && dp->dp_display.link_ready) ||
+   (!hpd && !dp->dp_display.link_ready)) {
drm_dbg_dp(dp->drm_dev, "HPD already %s\n",
(hpd ? "on" : "off"));
return 0;
@@ -382,7 +381,7 @@ static int dp_display_send_hpd_notification(struct 
dp_display_private *dp,
if (!hpd)
dp->panel->video_test = false;
 
-   dp->dp_display.is_connected = hpd;
+   dp->dp_display.link_ready = hpd;
 
drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n",
dp->dp_display.connector_type, hpd);
@@ -922,7 +921,7 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
 
dp_display->plugged_cb = fn;
dp_display->codec_dev = codec_dev;
-   plugged = dp_display->is_connected;
+   plugged = dp_display->link_ready;
dp_display_handle_plugged_change(dp_display, plugged);
 
return 0;
@@ -1352,16 +1351,16 @@ static int dp_pm_resume(struct device *dev)
 * also only signal audio when disconnected
 */
if (dp->link->sink_count) {
-   dp->dp_display.is_connected = true;
+   dp->dp_display.link_ready = true;
} else {
-   dp->dp_display.is_connected = false;
+   dp->dp_display.link_ready = false;
dp_display_handle_plugged_change(dp_display, false);
}
 
drm_dbg_dp(dp->drm_dev,
"After, type=%d sink=%d conn=%d core_init=%d phy_init=%d 
power=%d\n",
dp->dp_display.connector_type, dp->link->sink_count,
-   dp->dp_display.is_connected, dp->core_initialized,
+   dp->dp_display.link_ready, dp->core_initialized,
dp->phy_initialized, dp_display->power_on);
 
mutex_unlock(&dp->event_mutex);
@@ -1754,8 +1753,8 @@ void dp_bridge_hpd_notify(struct drm_bridge *bridge,
return;
}
 
-   if (!dp_display->is_connected && status == connector_status_connected)
+   if (!dp_display->link_ready && status == connector_status_connected)
dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0);
-   else if (dp_display->is_connected && status == 
connector_status_disconnected)
+   else if (dp_display->link_ready && status == 
connector_status_disconnected)
dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
 }
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h 
b/drivers/gpu/drm/msm/dp/dp_display.h
index b3c08de..d65693e 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -16,7 +16,7 @@ struct msm_dp {
struct drm_bridge *bridge;
struct drm_connector *connector;
struct drm_bridge *next_bridge;
-   bool is_connected;
+   bool link_ready;
bool audio_enabled;
bool power_on;
unsigned int connector_type;
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
index 785d766..ee945ca 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.c
+++ b/drivers/gpu/drm/msm/dp/dp_drm.c
@@ -24,10 +24,10 @@ static enum drm_connector_status dp_bridge_detect(struct 
drm_bridge *bridge)
 
dp = to_dp_bridge(bridge)->dp_display;
 
-   drm_dbg_dp(dp->drm_dev, "is_connected = %s\n",
-   (dp->is_connected) ? "true" : "false");
+   drm_dbg_dp(dp->drm_dev, "link_ready = %s\n",
+   (dp->link_ready) ? "true" : "false");
 
-   return (dp->is_connected) ? connector_status_connected :
+   return (dp->link_ready) ? connector_status_connected :
connector_status_disconnected;
 }
 
@@ -40,8 +40,8 @@ static int dp_bridge_atomic_check(struct drm_bridge *bridge,
 
dp = to_dp_bridge(bridge)->dp_display;
 
-   drm_dbg_dp(dp->drm_dev, "is_connected = %s\n",
-   (dp->is_connected) ? "true" : "false");
+   drm_dbg_dp(dp->drm_dev, "link_ready = %s\n",
+   (dp->link_ready) ? "true" : "fal

[PATCH v3 1/7] drm/msm/dp: tie dp_display_irq_handler() with dp driver

2023-09-15 Thread Kuogee Hsieh
Currently the dp_display_irq_handler() is executed at msm_dp_modeset_init()
which ties irq registration to the DPU device's life cycle, while depending on
resources that are released as the DP device is torn down. Move register DP
driver irq handler at dp_display_probe() to have dp_display_irq_handler()
is tied with DP device.

Changes in v3:
-- move calling dp_display_irq_handler() to probe

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 35 +--
 drivers/gpu/drm/msm/dp/dp_display.h |  1 -
 2 files changed, 13 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index 76f1395..c217430 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -1193,30 +1193,23 @@ static irqreturn_t dp_display_irq_handler(int irq, void 
*dev_id)
return ret;
 }
 
-int dp_display_request_irq(struct msm_dp *dp_display)
+static int dp_display_request_irq(struct dp_display_private *dp)
 {
int rc = 0;
-   struct dp_display_private *dp;
-
-   if (!dp_display) {
-   DRM_ERROR("invalid input\n");
-   return -EINVAL;
-   }
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
+   struct device *dev = &dp->pdev->dev;
 
-   dp->irq = irq_of_parse_and_map(dp->pdev->dev.of_node, 0);
if (!dp->irq) {
-   DRM_ERROR("failed to get irq\n");
-   return -EINVAL;
+   dp->irq = platform_get_irq(dp->pdev, 0);
+   if (!dp->irq) {
+   DRM_ERROR("failed to get irq\n");
+   return -EINVAL;
+   }
}
 
-   rc = devm_request_irq(dp_display->drm_dev->dev, dp->irq,
-   dp_display_irq_handler,
+   rc = devm_request_irq(dev, dp->irq, dp_display_irq_handler,
IRQF_TRIGGER_HIGH, "dp_display_isr", dp);
if (rc < 0) {
-   DRM_ERROR("failed to request IRQ%u: %d\n",
-   dp->irq, rc);
+   DRM_ERROR("failed to request IRQ%u: %d\n", dp->irq, rc);
return rc;
}
 
@@ -1287,6 +1280,10 @@ static int dp_display_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, &dp->dp_display);
 
+   rc = dp_display_request_irq(dp);
+   if (rc)
+   return rc;
+
rc = component_add(&pdev->dev, &dp_display_comp_ops);
if (rc) {
DRM_ERROR("component add failed, rc=%d\n", rc);
@@ -1549,12 +1546,6 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, 
struct drm_device *dev,
 
dp_priv = container_of(dp_display, struct dp_display_private, 
dp_display);
 
-   ret = dp_display_request_irq(dp_display);
-   if (ret) {
-   DRM_ERROR("request_irq failed, ret=%d\n", ret);
-   return ret;
-   }
-
ret = dp_display_get_next_bridge(dp_display);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h 
b/drivers/gpu/drm/msm/dp/dp_display.h
index 1e9415a..b3c08de 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -35,7 +35,6 @@ struct msm_dp {
 int dp_display_set_plugged_cb(struct msm_dp *dp_display,
hdmi_codec_plugged_cb fn, struct device *codec_dev);
 int dp_display_get_modes(struct msm_dp *dp_display);
-int dp_display_request_irq(struct msm_dp *dp_display);
 bool dp_display_check_video_test(struct msm_dp *dp_display);
 int dp_display_get_test_bpp(struct msm_dp *dp_display);
 void dp_display_signal_audio_start(struct msm_dp *dp_display);
-- 
2.7.4



Re: [RFC PATCH 5/8] drm/panel: nv3052c: Allow specifying registers per panel

2023-09-15 Thread Jessica Zhang




On 9/11/2023 2:02 AM, John Watts wrote:

Panel initialization registers are per-display and not tied to the
controller itself. Different panels will specify their own registers.
Attach the sequences to the panel info struct so future panels
can specify their own sequences.

Signed-off-by: John Watts 
---
  .../gpu/drm/panel/panel-newvision-nv3052c.c   | 25 ---
  1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c 
b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
index 307335d0f1fc..b2ad9b3a5eb7 100644
--- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
+++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c
@@ -20,11 +20,18 @@
  #include 
  #include 
  
+struct nv3052c_reg {

+   u8 cmd;
+   u8 val;
+};
+
  struct nv3052c_panel_info {
const struct drm_display_mode *display_modes;
unsigned int num_modes;
u16 width_mm, height_mm;
u32 bus_format, bus_flags;
+   const struct nv3052c_reg *panel_regs;
+   int panel_regs_len;
  };
  
  struct nv3052c {

@@ -36,12 +43,7 @@ struct nv3052c {
struct gpio_desc *reset_gpio;
  };
  
-struct nv3052c_reg {

-   u8 cmd;
-   u8 val;
-};
-
-static const struct nv3052c_reg nv3052c_panel_regs[] = {
+static const struct nv3052c_reg ltk035c5444t_panel_regs[] = {
// EXTC Command set enable, select page 1
{ 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x01 },
// Mostly unknown registers
@@ -244,6 +246,7 @@ static inline struct nv3052c *to_nv3052c(struct drm_panel 
*panel)
  static int nv3052c_prepare(struct drm_panel *panel)
  {
struct nv3052c *priv = to_nv3052c(panel);
+   const struct nv3052c_reg *panel_regs = priv->panel_info->panel_regs;
struct mipi_dbi *dbi = &priv->dbi;
unsigned int i;
int err;
@@ -260,9 +263,11 @@ static int nv3052c_prepare(struct drm_panel *panel)
gpiod_set_value_cansleep(priv->reset_gpio, 0);
msleep(150);
  
-	for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {

-   err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
-  nv3052c_panel_regs[i].val);
+   int panel_regs_len = priv->panel_info->panel_regs_len;


Hi John,

Sorry for not catching this earlier -- can you move the declaration of 
panel_regs_len to the top of the function? Otherwise this throws a 
compiler warning.


With that change,

Reviewed-by: Jessica Zhang 

Thanks,

Jessica Zhang


+
+   for (i = 0; i < panel_regs_len; i++) {
+   err = mipi_dbi_command(dbi, panel_regs[i].cmd,
+  panel_regs[i].val);
  
  		if (err) {

dev_err(priv->dev, "Unable to set register: %d\n", err);
@@ -466,6 +471,8 @@ static const struct nv3052c_panel_info 
ltk035c5444t_panel_info = {
.height_mm = 64,
.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
+   .panel_regs = ltk035c5444t_panel_regs,
+   .panel_regs_len = ARRAY_SIZE(ltk035c5444t_panel_regs),
  };
  
  static const struct spi_device_id nv3052c_ids[] = {

--
2.42.0



[PATCH v2 7/7] drm/msm/dp: move of_dp_aux_populate_bus() to eDP probe()

2023-09-15 Thread Kuogee Hsieh
Currently eDP population is done at msm_dp_modeset_init() which happen
at binding time. Move eDP population to be done at display probe time
so that probe deferral cases can be handled effectively.
wait_for_hpd_asserted callback is added during drm_dp_aux_init()
to ensure eDP's HPD is up before proceeding eDP population.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_aux.c | 25 
 drivers/gpu/drm/msm/dp/dp_display.c | 79 ++---
 2 files changed, 64 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
index 8fa93c5..79f0c6e 100644
--- a/drivers/gpu/drm/msm/dp/dp_aux.c
+++ b/drivers/gpu/drm/msm/dp/dp_aux.c
@@ -507,6 +507,21 @@ void dp_aux_unregister(struct drm_dp_aux *dp_aux)
drm_dp_aux_unregister(dp_aux);
 }
 
+static int dp_wait_hpd_asserted(struct drm_dp_aux *dp_aux,
+unsigned long wait_us)
+{
+   int ret;
+   struct dp_aux_private *aux;
+
+   aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
+
+   pm_runtime_get_sync(aux->dev);
+   ret = dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog);
+   pm_runtime_put_sync(aux->dev);
+
+   return ret;
+}
+
 struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog,
  bool is_edp)
 {
@@ -530,6 +545,16 @@ struct drm_dp_aux *dp_aux_get(struct device *dev, struct 
dp_catalog *catalog,
aux->catalog = catalog;
aux->retry_cnt = 0;
 
+   /*
+* Use the drm_dp_aux_init() to use the aux adapter
+* before registering aux with the DRM device.
+*/
+   aux->dp_aux.name = "dpu_dp_aux";
+   aux->dp_aux.dev = dev;
+   aux->dp_aux.transfer = dp_aux_transfer;
+   aux->dp_aux.wait_hpd_asserted = dp_wait_hpd_asserted;
+   drm_dp_aux_init(&aux->dp_aux);
+
return &aux->dp_aux;
 }
 
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index b58cb02..886fae5 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -310,8 +310,6 @@ static void dp_display_unbind(struct device *dev, struct 
device *master,
 
kthread_stop(dp->ev_tsk);
 
-   of_dp_aux_depopulate_bus(dp->aux);
-
dp_power_client_deinit(dp->power);
dp_unregister_audio_driver(dev, dp->audio);
dp_aux_unregister(dp->aux);
@@ -1217,6 +1215,31 @@ static const struct msm_dp_desc 
*dp_display_get_desc(struct platform_device *pde
return NULL;
 }
 
+static int dp_auxbus_done_probe(struct drm_dp_aux *aux)
+{
+   int rc;
+
+   rc = component_add(aux->dev, &dp_display_comp_ops);
+   if (rc)
+   DRM_ERROR("eDP component add failed, rc=%d\n", rc);
+
+   return rc;
+}
+
+static int dp_display_auxbus_population(struct dp_display_private *dp)
+{
+   struct device *dev = &dp->pdev->dev;
+   struct device_node *aux_bus;
+   int ret = 0;
+
+   aux_bus = of_get_child_by_name(dev->of_node, "aux-bus");
+
+   if (aux_bus)
+   ret = devm_of_dp_aux_populate_bus(dp->aux, 
dp_auxbus_done_probe);
+
+   return ret;
+}
+
 static int dp_display_probe(struct platform_device *pdev)
 {
int rc = 0;
@@ -1282,10 +1305,16 @@ static int dp_display_probe(struct platform_device 
*pdev)
if (rc)
return rc;
 
-   rc = component_add(&pdev->dev, &dp_display_comp_ops);
-   if (rc) {
-   DRM_ERROR("component add failed, rc=%d\n", rc);
-   dp_display_deinit_sub_modules(dp);
+   if (dp->dp_display.is_edp) {
+   rc = dp_display_auxbus_population(dp);
+   if (rc)
+   DRM_ERROR("eDP auxbus population failed, rc=%d\n", rc);
+   } else {
+   rc = component_add(&pdev->dev, &dp_display_comp_ops);
+   if (rc) {
+   DRM_ERROR("component add failed, rc=%d\n", rc);
+   dp_display_deinit_sub_modules(dp);
+   }
}
 
return rc;
@@ -1296,14 +1325,13 @@ static int dp_display_remove(struct platform_device 
*pdev)
struct dp_display_private *dp = dev_get_dp_display_private(&pdev->dev);
 
component_del(&pdev->dev, &dp_display_comp_ops);
-   dp_display_deinit_sub_modules(dp);
-
platform_set_drvdata(pdev, NULL);
 
-   pm_runtime_put_sync_suspend(&pdev->dev);
pm_runtime_dont_use_autosuspend(&pdev->dev);
pm_runtime_disable(&pdev->dev);
 
+   dp_display_deinit_sub_modules(dp);
+
return 0;
 }
 
@@ -1432,31 +1460,10 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, 
struct drm_minor *minor)
 
 static int dp_display_get_next_bridge(struct msm_dp *dp)
 {
-   int rc;
+   int rc = 0;
struct dp_display_private *dp_priv;
-   struct device_node *aux_bus;
-   struct device *dev;
 
dp_priv = container_of(dp, struct dp_display_pri

[PATCH v2 6/7] drm/msm/dp: add pm_runtime_force_suspend()/resume()

2023-09-15 Thread Kuogee Hsieh
Add pm_runtime_force_suspend()/resume() to complete incorporating pm
runtime framework into DP driver. Both dp_pm_prepare() and dp_pm_complete()
are added to set hpd_state to correct state. After resume, DP driver will
re training its main link after .hpd_enable() callback enabled HPD
interrupts and bring up display accordingly.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 87 +
 1 file changed, 10 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index b6992202..b58cb02 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -1333,101 +1333,35 @@ static int dp_pm_runtime_resume(struct device *dev)
return 0;
 }
 
-static int dp_pm_resume(struct device *dev)
+static void dp_pm_complete(struct device *dev)
 {
-   struct platform_device *pdev = to_platform_device(dev);
-   struct msm_dp *dp_display = platform_get_drvdata(pdev);
-   struct dp_display_private *dp;
-   int sink_count = 0;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
+   struct dp_display_private *dp = dev_get_dp_display_private(dev);
 
mutex_lock(&dp->event_mutex);
 
drm_dbg_dp(dp->drm_dev,
-   "Before, type=%d core_inited=%d phy_inited=%d power_on=%d\n",
+   "type=%d core_inited=%d phy_inited=%d power_on=%d\n",
dp->dp_display.connector_type, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
+   dp->phy_initialized, dp->dp_display.power_on);
 
/* start from disconnected state */
dp->hpd_state = ST_DISCONNECTED;
 
-   /* turn on dp ctrl/phy */
-   dp_display_host_init(dp);
-
-   if (dp_display->is_edp)
-   dp_catalog_ctrl_hpd_enable(dp->catalog);
-
-   if (dp_catalog_link_is_connected(dp->catalog)) {
-   /*
-* set sink to normal operation mode -- D0
-* before dpcd read
-*/
-   dp_display_host_phy_init(dp);
-   dp_link_psm_config(dp->link, &dp->panel->link_info, false);
-   sink_count = drm_dp_read_sink_count(dp->aux);
-   if (sink_count < 0)
-   sink_count = 0;
-
-   dp_display_host_phy_exit(dp);
-   }
-
-   dp->link->sink_count = sink_count;
-   /*
-* can not declared display is connected unless
-* HDMI cable is plugged in and sink_count of
-* dongle become 1
-* also only signal audio when disconnected
-*/
-   if (dp->link->sink_count) {
-   dp->dp_display.link_ready = true;
-   } else {
-   dp->dp_display.link_ready = false;
-   dp_display_handle_plugged_change(dp_display, false);
-   }
-
-   drm_dbg_dp(dp->drm_dev,
-   "After, type=%d sink=%d conn=%d core_init=%d phy_init=%d 
power=%d\n",
-   dp->dp_display.connector_type, dp->link->sink_count,
-   dp->dp_display.link_ready, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
-
mutex_unlock(&dp->event_mutex);
-
-   return 0;
 }
 
-static int dp_pm_suspend(struct device *dev)
+static int dp_pm_prepare(struct device *dev)
 {
-   struct platform_device *pdev = to_platform_device(dev);
-   struct msm_dp *dp_display = platform_get_drvdata(pdev);
-   struct dp_display_private *dp;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
+   struct dp_display_private *dp = dev_get_dp_display_private(dev);
 
mutex_lock(&dp->event_mutex);
 
-   drm_dbg_dp(dp->drm_dev,
-   "Before, type=%d core_inited=%d  phy_inited=%d power_on=%d\n",
-   dp->dp_display.connector_type, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
-
/* mainlink enabled */
if (dp_power_clk_status(dp->power, DP_CTRL_PM))
dp_ctrl_off_link_stream(dp->ctrl);
 
-   dp_display_host_phy_exit(dp);
-
-   /* host_init will be called at pm_resume */
-   dp_display_host_deinit(dp);
-
dp->hpd_state = ST_SUSPENDED;
 
-   drm_dbg_dp(dp->drm_dev,
-   "After, type=%d core_inited=%d phy_inited=%d power_on=%d\n",
-   dp->dp_display.connector_type, dp->core_initialized,
-   dp->phy_initialized, dp_display->power_on);
-
mutex_unlock(&dp->event_mutex);
 
return 0;
@@ -1435,8 +1369,10 @@ static int dp_pm_suspend(struct device *dev)
 
 static const struct dev_pm_ops dp_pm_ops = {
SET_RUNTIME_PM_OPS(dp_pm_runtime_suspend, dp_pm_runtime_resume, NULL)
-   .suspend = dp_pm_suspend,
-   .resume =  dp_pm_resume,
+   SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+pm_runtime_force_resume)
+   .prepare = dp_pm

[PATCH v2 3/7] drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes

2023-09-15 Thread Kuogee Hsieh
Currently DP driver use drm_helper_hpd_irq_event(), bypassing drm bridge
framework, to report HPD status changes to user space frame work.
Replace it with drm_bridge_hpd_notify() since DP driver is part of drm
bridge.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 20 ++--
 1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index 18d16c7..59f9d85 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -356,26 +356,10 @@ static bool dp_display_is_sink_count_zero(struct 
dp_display_private *dp)
(dp->link->sink_count == 0);
 }
 
-static void dp_display_send_hpd_event(struct msm_dp *dp_display)
-{
-   struct dp_display_private *dp;
-   struct drm_connector *connector;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
-
-   connector = dp->dp_display.connector;
-   drm_helper_hpd_irq_event(connector->dev);
-}
-
 static int dp_display_send_hpd_notification(struct dp_display_private *dp,
bool hpd)
 {
-   if ((hpd && dp->dp_display.link_ready) ||
-   (!hpd && !dp->dp_display.link_ready)) {
-   drm_dbg_dp(dp->drm_dev, "HPD already %s\n",
-   (hpd ? "on" : "off"));
-   return 0;
-   }
+   struct drm_bridge *bridge = dp->dp_display.bridge;
 
/* reset video pattern flag on disconnect */
if (!hpd)
@@ -385,7 +369,7 @@ static int dp_display_send_hpd_notification(struct 
dp_display_private *dp,
 
drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n",
dp->dp_display.connector_type, hpd);
-   dp_display_send_hpd_event(&dp->dp_display);
+   drm_bridge_hpd_notify(bridge, dp->dp_display.link_ready);
 
return 0;
 }
-- 
2.7.4



[PATCH v2 5/7] drm/msm/dp: delete EV_HPD_INIT_SETUP

2023-09-15 Thread Kuogee Hsieh
EV_HPD_INIT_SETUP flag is used to trigger the initialization of external
DP host controller. Since external DP host controller initialization had
been incorporated into pm_runtime_resume(), this flag become obsolete.
Lets get rid of it.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  4 
 drivers/gpu/drm/msm/dp/dp_display.c | 16 
 drivers/gpu/drm/msm/msm_drv.h   |  5 -
 3 files changed, 25 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index aa8499d..71d0670 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -870,7 +870,6 @@ static int dpu_irq_postinstall(struct msm_kms *kms)
 {
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
-   int i;
 
if (!dpu_kms || !dpu_kms->dev)
return -EINVAL;
@@ -879,9 +878,6 @@ static int dpu_irq_postinstall(struct msm_kms *kms)
if (!priv)
return -EINVAL;
 
-   for (i = 0; i < ARRAY_SIZE(priv->dp); i++)
-   msm_dp_irq_postinstall(priv->dp[i]);
-
return 0;
 }
 
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index e7af7f7..b6992202 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -55,7 +55,6 @@ enum {
 enum {
EV_NO_EVENT,
/* hpd events */
-   EV_HPD_INIT_SETUP,
EV_HPD_PLUG_INT,
EV_IRQ_HPD_INT,
EV_HPD_UNPLUG_INT,
@@ -1092,8 +1091,6 @@ static int hpd_event_thread(void *data)
spin_unlock_irqrestore(&dp_priv->event_lock, flag);
 
switch (todo->event_id) {
-   case EV_HPD_INIT_SETUP:
-   break;
case EV_HPD_PLUG_INT:
dp_hpd_plug_handle(dp_priv, todo->data);
break;
@@ -1469,19 +1466,6 @@ void __exit msm_dp_unregister(void)
platform_driver_unregister(&dp_display_driver);
 }
 
-void msm_dp_irq_postinstall(struct msm_dp *dp_display)
-{
-   struct dp_display_private *dp;
-
-   if (!dp_display)
-   return;
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
-
-   if (!dp_display->is_edp)
-   dp_add_event(dp, EV_HPD_INIT_SETUP, 0, 0);
-}
-
 bool msm_dp_wide_bus_available(const struct msm_dp *dp_display)
 {
struct dp_display_private *dp;
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index e13a8cb..ff8be59 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -381,7 +381,6 @@ int __init msm_dp_register(void);
 void __exit msm_dp_unregister(void);
 int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
 struct drm_encoder *encoder);
-void msm_dp_irq_postinstall(struct msm_dp *dp_display);
 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp 
*dp_display);
 
 void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor);
@@ -402,10 +401,6 @@ static inline int msm_dp_modeset_init(struct msm_dp 
*dp_display,
return -EINVAL;
 }
 
-static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display)
-{
-}
-
 static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct 
msm_dp *dp_display)
 {
 }
-- 
2.7.4



[PATCH v2 1/7] drm/msm/dp: tie dp_display_irq_handler() with dp driver

2023-09-15 Thread Kuogee Hsieh
Currently the dp_display_irq_handler() is executed at msm_dp_modeset_init()
which ties irq registration to the DPU device's life cycle, while depending on
resources that are released as the DP device is torn down. Move register DP
driver irq handler at dp_display_probe() to have dp_display_irq_handler()
is tied with DP device.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 35 +--
 drivers/gpu/drm/msm/dp/dp_display.h |  1 -
 2 files changed, 13 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index 76f1395..c217430 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -1193,30 +1193,23 @@ static irqreturn_t dp_display_irq_handler(int irq, void 
*dev_id)
return ret;
 }
 
-int dp_display_request_irq(struct msm_dp *dp_display)
+static int dp_display_request_irq(struct dp_display_private *dp)
 {
int rc = 0;
-   struct dp_display_private *dp;
-
-   if (!dp_display) {
-   DRM_ERROR("invalid input\n");
-   return -EINVAL;
-   }
-
-   dp = container_of(dp_display, struct dp_display_private, dp_display);
+   struct device *dev = &dp->pdev->dev;
 
-   dp->irq = irq_of_parse_and_map(dp->pdev->dev.of_node, 0);
if (!dp->irq) {
-   DRM_ERROR("failed to get irq\n");
-   return -EINVAL;
+   dp->irq = platform_get_irq(dp->pdev, 0);
+   if (!dp->irq) {
+   DRM_ERROR("failed to get irq\n");
+   return -EINVAL;
+   }
}
 
-   rc = devm_request_irq(dp_display->drm_dev->dev, dp->irq,
-   dp_display_irq_handler,
+   rc = devm_request_irq(dev, dp->irq, dp_display_irq_handler,
IRQF_TRIGGER_HIGH, "dp_display_isr", dp);
if (rc < 0) {
-   DRM_ERROR("failed to request IRQ%u: %d\n",
-   dp->irq, rc);
+   DRM_ERROR("failed to request IRQ%u: %d\n", dp->irq, rc);
return rc;
}
 
@@ -1287,6 +1280,10 @@ static int dp_display_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, &dp->dp_display);
 
+   rc = dp_display_request_irq(dp);
+   if (rc)
+   return rc;
+
rc = component_add(&pdev->dev, &dp_display_comp_ops);
if (rc) {
DRM_ERROR("component add failed, rc=%d\n", rc);
@@ -1549,12 +1546,6 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, 
struct drm_device *dev,
 
dp_priv = container_of(dp_display, struct dp_display_private, 
dp_display);
 
-   ret = dp_display_request_irq(dp_display);
-   if (ret) {
-   DRM_ERROR("request_irq failed, ret=%d\n", ret);
-   return ret;
-   }
-
ret = dp_display_get_next_bridge(dp_display);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h 
b/drivers/gpu/drm/msm/dp/dp_display.h
index 1e9415a..b3c08de 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -35,7 +35,6 @@ struct msm_dp {
 int dp_display_set_plugged_cb(struct msm_dp *dp_display,
hdmi_codec_plugged_cb fn, struct device *codec_dev);
 int dp_display_get_modes(struct msm_dp *dp_display);
-int dp_display_request_irq(struct msm_dp *dp_display);
 bool dp_display_check_video_test(struct msm_dp *dp_display);
 int dp_display_get_test_bpp(struct msm_dp *dp_display);
 void dp_display_signal_audio_start(struct msm_dp *dp_display);
-- 
2.7.4



[PATCH v2 4/7] drm/msm/dp: incorporate pm_runtime framework into DP driver

2023-09-15 Thread Kuogee Hsieh
Currently DP driver is executed independent of PM runtime framework.
This lead DP driver incompatible with others. Incorporating pm runtime
framework into DP driver so that both power and clocks to enable/disable
host controller fits with PM runtime mechanism. Once pm runtime framework
is incorporated into DP driver, wake up device from power up path is not
necessary. Hence remove it. Both EV_POWER_PM_GET and EV_POWER_PM_PUT events
are introduced to perform pm runtime control for the HPD GPIO routing to a
display-connector case.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_aux.c |   5 ++
 drivers/gpu/drm/msm/dp/dp_display.c | 114 +++-
 drivers/gpu/drm/msm/dp/dp_power.c   |   9 ---
 3 files changed, 90 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
index 8e3b677..8fa93c5 100644
--- a/drivers/gpu/drm/msm/dp/dp_aux.c
+++ b/drivers/gpu/drm/msm/dp/dp_aux.c
@@ -291,6 +291,9 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
return -EINVAL;
}
 
+   if (pm_runtime_resume_and_get(dp_aux->dev))
+   return  -EINVAL;
+
mutex_lock(&aux->mutex);
if (!aux->initted) {
ret = -EIO;
@@ -364,6 +367,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
 
 exit:
mutex_unlock(&aux->mutex);
+   pm_runtime_mark_last_busy(dp_aux->dev);
+   pm_runtime_put_autosuspend(dp_aux->dev);
 
return ret;
 }
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index 59f9d85..e7af7f7 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -60,6 +60,8 @@ enum {
EV_IRQ_HPD_INT,
EV_HPD_UNPLUG_INT,
EV_USER_NOTIFICATION,
+   EV_POWER_PM_GET,
+   EV_POWER_PM_PUT,
 };
 
 #define EVENT_TIMEOUT  (HZ/10) /* 100ms */
@@ -276,13 +278,6 @@ static int dp_display_bind(struct device *dev, struct 
device *master,
dp->dp_display.drm_dev = drm;
priv->dp[dp->id] = &dp->dp_display;
 
-   rc = dp->parser->parse(dp->parser);
-   if (rc) {
-   DRM_ERROR("device tree parsing failed\n");
-   goto end;
-   }
-
-
dp->drm_dev = drm;
dp->aux->drm_dev = drm;
rc = dp_aux_register(dp->aux);
@@ -291,12 +286,6 @@ static int dp_display_bind(struct device *dev, struct 
device *master,
goto end;
}
 
-   rc = dp_power_client_init(dp->power);
-   if (rc) {
-   DRM_ERROR("Power client create failed\n");
-   goto end;
-   }
-
rc = dp_register_audio_driver(dev, dp->audio);
if (rc) {
DRM_ERROR("Audio registration Dp failed\n");
@@ -320,10 +309,6 @@ static void dp_display_unbind(struct device *dev, struct 
device *master,
struct dp_display_private *dp = dev_get_dp_display_private(dev);
struct msm_drm_private *priv = dev_get_drvdata(master);
 
-   /* disable all HPD interrupts */
-   if (dp->core_initialized)
-   dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, 
false);
-
kthread_stop(dp->ev_tsk);
 
of_dp_aux_depopulate_bus(dp->aux);
@@ -467,6 +452,18 @@ static void dp_display_host_deinit(struct 
dp_display_private *dp)
dp->core_initialized = false;
 }
 
+static void dp_display_pm_get(struct dp_display_private *dp)
+{
+   if (pm_runtime_resume_and_get(&dp->pdev->dev))
+   DRM_ERROR("failed to start power\n");
+}
+
+static void dp_display_pm_put(struct dp_display_private *dp)
+{
+   pm_runtime_mark_last_busy(&dp->pdev->dev);
+   pm_runtime_put_autosuspend(&dp->pdev->dev);
+}
+
 static int dp_display_usbpd_configure_cb(struct device *dev)
 {
struct dp_display_private *dp = dev_get_dp_display_private(dev);
@@ -1096,7 +1093,6 @@ static int hpd_event_thread(void *data)
 
switch (todo->event_id) {
case EV_HPD_INIT_SETUP:
-   dp_display_host_init(dp_priv);
break;
case EV_HPD_PLUG_INT:
dp_hpd_plug_handle(dp_priv, todo->data);
@@ -,6 +1107,12 @@ static int hpd_event_thread(void *data)
dp_display_send_hpd_notification(dp_priv,
todo->data);
break;
+   case EV_POWER_PM_GET:
+   dp_display_pm_get(dp_priv);
+   break;
+   case EV_POWER_PM_PUT:
+   dp_display_pm_put(dp_priv);
+   break;
default:
break;
}
@@ -1251,6 +1253,18 @@ static int dp_display_probe(struct platform_device *pdev)
return -EPROBE_DEFER;
}
 
+   rc = dp->parser->parse(dp->parser);
+   if (rc) {
+   DRM_ERROR("device tree parsing 

[PATCH v2 2/7] drm/msm/dp: replace is_connected with link_ready

2023-09-15 Thread Kuogee Hsieh
The is_connected flag is set to true after DP mainlink successfully
finish link training. Replace the is_connected flag with link_ready
flag to avoid confusing.

Signed-off-by: Kuogee Hsieh 
---
 drivers/gpu/drm/msm/dp/dp_display.c | 19 +--
 drivers/gpu/drm/msm/dp/dp_display.h |  2 +-
 drivers/gpu/drm/msm/dp/dp_drm.c | 14 +++---
 3 files changed, 17 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index c217430..18d16c7 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -367,12 +367,11 @@ static void dp_display_send_hpd_event(struct msm_dp 
*dp_display)
drm_helper_hpd_irq_event(connector->dev);
 }
 
-
 static int dp_display_send_hpd_notification(struct dp_display_private *dp,
bool hpd)
 {
-   if ((hpd && dp->dp_display.is_connected) ||
-   (!hpd && !dp->dp_display.is_connected)) {
+   if ((hpd && dp->dp_display.link_ready) ||
+   (!hpd && !dp->dp_display.link_ready)) {
drm_dbg_dp(dp->drm_dev, "HPD already %s\n",
(hpd ? "on" : "off"));
return 0;
@@ -382,7 +381,7 @@ static int dp_display_send_hpd_notification(struct 
dp_display_private *dp,
if (!hpd)
dp->panel->video_test = false;
 
-   dp->dp_display.is_connected = hpd;
+   dp->dp_display.link_ready = hpd;
 
drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n",
dp->dp_display.connector_type, hpd);
@@ -922,7 +921,7 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
 
dp_display->plugged_cb = fn;
dp_display->codec_dev = codec_dev;
-   plugged = dp_display->is_connected;
+   plugged = dp_display->link_ready;
dp_display_handle_plugged_change(dp_display, plugged);
 
return 0;
@@ -1352,16 +1351,16 @@ static int dp_pm_resume(struct device *dev)
 * also only signal audio when disconnected
 */
if (dp->link->sink_count) {
-   dp->dp_display.is_connected = true;
+   dp->dp_display.link_ready = true;
} else {
-   dp->dp_display.is_connected = false;
+   dp->dp_display.link_ready = false;
dp_display_handle_plugged_change(dp_display, false);
}
 
drm_dbg_dp(dp->drm_dev,
"After, type=%d sink=%d conn=%d core_init=%d phy_init=%d 
power=%d\n",
dp->dp_display.connector_type, dp->link->sink_count,
-   dp->dp_display.is_connected, dp->core_initialized,
+   dp->dp_display.link_ready, dp->core_initialized,
dp->phy_initialized, dp_display->power_on);
 
mutex_unlock(&dp->event_mutex);
@@ -1754,8 +1753,8 @@ void dp_bridge_hpd_notify(struct drm_bridge *bridge,
return;
}
 
-   if (!dp_display->is_connected && status == connector_status_connected)
+   if (!dp_display->link_ready && status == connector_status_connected)
dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0);
-   else if (dp_display->is_connected && status == 
connector_status_disconnected)
+   else if (dp_display->link_ready && status == 
connector_status_disconnected)
dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
 }
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h 
b/drivers/gpu/drm/msm/dp/dp_display.h
index b3c08de..d65693e 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -16,7 +16,7 @@ struct msm_dp {
struct drm_bridge *bridge;
struct drm_connector *connector;
struct drm_bridge *next_bridge;
-   bool is_connected;
+   bool link_ready;
bool audio_enabled;
bool power_on;
unsigned int connector_type;
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
index 785d766..ee945ca 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.c
+++ b/drivers/gpu/drm/msm/dp/dp_drm.c
@@ -24,10 +24,10 @@ static enum drm_connector_status dp_bridge_detect(struct 
drm_bridge *bridge)
 
dp = to_dp_bridge(bridge)->dp_display;
 
-   drm_dbg_dp(dp->drm_dev, "is_connected = %s\n",
-   (dp->is_connected) ? "true" : "false");
+   drm_dbg_dp(dp->drm_dev, "link_ready = %s\n",
+   (dp->link_ready) ? "true" : "false");
 
-   return (dp->is_connected) ? connector_status_connected :
+   return (dp->link_ready) ? connector_status_connected :
connector_status_disconnected;
 }
 
@@ -40,8 +40,8 @@ static int dp_bridge_atomic_check(struct drm_bridge *bridge,
 
dp = to_dp_bridge(bridge)->dp_display;
 
-   drm_dbg_dp(dp->drm_dev, "is_connected = %s\n",
-   (dp->is_connected) ? "true" : "false");
+   drm_dbg_dp(dp->drm_dev, "link_ready = %s\n",
+   (dp->link_ready) ? "true" : "fal

[PATCH v2 0/7] incorporate pm runtime framework and eDP clean up

2023-09-15 Thread Kuogee Hsieh
Incorporate pm runtime framework into DP driver and clean up eDP
by moving of_dp_aux_populate_bus() to probe()

Kuogee Hsieh (7):
  drm/msm/dp: tie dp_display_irq_handler() with dp driver
  drm/msm/dp: replace is_connected with link_ready
  drm/msm/dp: use drm_bridge_hpd_notify() to report HPD status changes
  drm/msm/dp: incorporate pm_runtime framework into DP driver
  drm/msm/dp: delete EV_HPD_INIT_SETUP
  drm/msm/dp: add pm_runtime_force_suspend()/resume()
  drm/msm/dp: move of_dp_aux_populate_bus() to eDP probe()

 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |   4 -
 drivers/gpu/drm/msm/dp/dp_aux.c |  30 +++
 drivers/gpu/drm/msm/dp/dp_display.c | 348 ++--
 drivers/gpu/drm/msm/dp/dp_display.h |   3 +-
 drivers/gpu/drm/msm/dp/dp_drm.c |  14 +-
 drivers/gpu/drm/msm/dp/dp_power.c   |   9 -
 drivers/gpu/drm/msm/msm_drv.h   |   5 -
 7 files changed, 185 insertions(+), 228 deletions(-)

-- 
2.7.4



[PATCH v2] drm/msm/dsi: skip the wait for video mode done if not applicable

2023-09-15 Thread Abhinav Kumar
dsi_wait4video_done() API waits for the DSI video mode engine to
become idle so that we can transmit the DCS commands in the
beginning of BLLP. However, with the current sequence, the MDP
timing engine is turned on after the panel's pre_enable() callback
which can send out the DCS commands needed to power up the panel.

During those cases, this API will always timeout and print out the
error spam leading to long bootup times and log flooding.

Fix this by checking if the DSI video engine was actually busy before
waiting for it to become idle otherwise this is a redundant wait.

changes in v2:
- move the reg read below the video mode check
- minor fixes in commit text

Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/34
Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
Signed-off-by: Abhinav Kumar 
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 0c4ec0530efc..1a2afe31fa86 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1075,9 +1075,21 @@ static void dsi_wait4video_done(struct msm_dsi_host 
*msm_host)
 
 static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host)
 {
+   u32 data;
+
if (!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))
return;
 
+   data = dsi_read(msm_host, REG_DSI_STATUS0);
+
+   /* if video mode engine is not busy, its because
+* either timing engine was not turned on or the
+* DSI controller has finished transmitting the video
+* data already, so no need to wait in those cases
+*/
+   if (!(data & DSI_STATUS0_VIDEO_MODE_ENGINE_BUSY))
+   return;
+
if (msm_host->power_on && msm_host->enabled) {
dsi_wait4video_done(msm_host);
/* delay 4 ms to skip BLLP */
-- 
2.40.1



Re: [git pull] drm fixes for 6.6-rc2

2023-09-15 Thread pr-tracker-bot
The pull request you sent on Fri, 15 Sep 2023 12:57:50 +1000:

> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2023-09-15

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9608c7b729e29c177525006711966ae0fd399b11

Thank you!

-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html


Re: [PATCH v3] drm/i915/pxp: Add drm_dbgs for critical PXP events.

2023-09-15 Thread Teres Alexis, Alan Previn
On Fri, 2023-09-15 at 13:15 -0700, Teres Alexis, Alan Previn wrote:
> Debugging PXP issues can't even begin without understanding precedding
> sequence of important events. Add drm_dbg into the most important PXP events.
> 
>  v3 : - move gt_dbg to after mutex block in function
> i915_gsc_proxy_component_bind. (Vivaik)
>  v2 : - remove __func__ since drm_dbg covers that (Jani).
>   - add timeout dbg of the restart from front-end (Alan).
> 
alan:snip

> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
> @@ -322,6 +322,7 @@ static int i915_gsc_proxy_component_bind(struct device 
> *i915_kdev,
>   gsc->proxy.component = data;
>   gsc->proxy.component->mei_dev = mei_kdev;
>   mutex_unlock(&gsc->proxy.mutex);
> + gt_dbg(gt, "GSC proxy mei component bound\n");

forgot to include RB from Vivaik, per condition of fixing above hunk, from rev2 
dri-devel 
https://lists.freedesktop.org/archives/dri-devel/2023-September/422858.html :

Reviewed-by: Balasubrawmanian, Vivaik  


[PATCH v3] drm/i915/pxp: Add drm_dbgs for critical PXP events.

2023-09-15 Thread Alan Previn
Debugging PXP issues can't even begin without understanding precedding
sequence of important events. Add drm_dbg into the most important PXP events.

 v3 : - move gt_dbg to after mutex block in function
i915_gsc_proxy_component_bind. (Vivaik)
 v2 : - remove __func__ since drm_dbg covers that (Jani).
  - add timeout dbg of the restart from front-end (Alan).

Signed-off-by: Alan Previn 
---
 drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c |  2 ++
 drivers/gpu/drm/i915/pxp/intel_pxp.c | 15 ---
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c |  4 ++--
 drivers/gpu/drm/i915/pxp/intel_pxp_session.c |  6 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_types.h   |  1 +
 5 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c 
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
index 5f138de3c14f..40817ebcca71 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
@@ -322,6 +322,7 @@ static int i915_gsc_proxy_component_bind(struct device 
*i915_kdev,
gsc->proxy.component = data;
gsc->proxy.component->mei_dev = mei_kdev;
mutex_unlock(&gsc->proxy.mutex);
+   gt_dbg(gt, "GSC proxy mei component bound\n");
 
return 0;
 }
@@ -342,6 +343,7 @@ static void i915_gsc_proxy_component_unbind(struct device 
*i915_kdev,
with_intel_runtime_pm(&i915->runtime_pm, wakeref)
intel_uncore_rmw(gt->uncore, HECI_H_CSR(MTL_GSC_HECI2_BASE),
 HECI_H_CSR_IE | HECI_H_CSR_RST, 0);
+   gt_dbg(gt, "GSC proxy mei component unbound\n");
 }
 
 static const struct component_ops i915_gsc_proxy_component_ops = {
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c 
b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index dc327cf40b5a..e11f562b1876 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -303,6 +303,8 @@ static int __pxp_global_teardown_final(struct intel_pxp 
*pxp)
 
if (!pxp->arb_is_valid)
return 0;
+
+   drm_dbg(&pxp->ctrl_gt->i915->drm, "PXP: teardown for suspend/fini");
/*
 * To ensure synchronous and coherent session teardown completion
 * in response to suspend or shutdown triggers, don't use a worker.
@@ -324,6 +326,8 @@ static int __pxp_global_teardown_restart(struct intel_pxp 
*pxp)
 
if (pxp->arb_is_valid)
return 0;
+
+   drm_dbg(&pxp->ctrl_gt->i915->drm, "PXP: teardown for restart");
/*
 * The arb-session is currently inactive and we are doing a reset and 
restart
 * due to a runtime event. Use the worker that was designed for this.
@@ -332,8 +336,11 @@ static int __pxp_global_teardown_restart(struct intel_pxp 
*pxp)
 
timeout = intel_pxp_get_backend_timeout_ms(pxp);
 
-   if (!wait_for_completion_timeout(&pxp->termination, 
msecs_to_jiffies(timeout)))
+   if (!wait_for_completion_timeout(&pxp->termination, 
msecs_to_jiffies(timeout))) {
+   drm_dbg(&pxp->ctrl_gt->i915->drm, "PXP: restart backend timed 
out (%d ms)",
+   timeout);
return -ETIMEDOUT;
+   }
 
return 0;
 }
@@ -414,10 +421,12 @@ int intel_pxp_start(struct intel_pxp *pxp)
int ret = 0;
 
ret = intel_pxp_get_readiness_status(pxp, PXP_READINESS_TIMEOUT);
-   if (ret < 0)
+   if (ret < 0) {
+   drm_dbg(&pxp->ctrl_gt->i915->drm, "PXP: tried but not-avail 
(%d)", ret);
return ret;
-   else if (ret > 1)
+   } else if (ret > 1) {
return -EIO; /* per UAPI spec, user may retry later */
+   }
 
mutex_lock(&pxp->arb_mutex);
 
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c 
b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
index 91e9622c07d0..0637b1d36356 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
@@ -40,11 +40,11 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
   GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT)) {
/* immediately mark PXP as inactive on termination */
intel_pxp_mark_termination_in_progress(pxp);
-   pxp->session_events |= PXP_TERMINATION_REQUEST | 
PXP_INVAL_REQUIRED;
+   pxp->session_events |= PXP_TERMINATION_REQUEST | 
PXP_INVAL_REQUIRED | PXP_EVENT_TYPE_IRQ;
}
 
if (iir & GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT)
-   pxp->session_events |= PXP_TERMINATION_COMPLETE;
+   pxp->session_events |= PXP_TERMINATION_COMPLETE | 
PXP_EVENT_TYPE_IRQ;
 
if (pxp->session_events)
queue_work(system_unbound_wq, &pxp->session_work);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c 
b/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
index 0a3e66b0265e..091c86e03d1a 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c
+++ b/drivers/gpu/drm/i915/pxp/intel

Re: [PATCH 1/4] drm/dp_mst: Fix NULL dereference during payload addition

2023-09-15 Thread Lyude Paul
Thanks for catching all of this! for the whole series:

Reviewed-by: Lyude Paul 


On Thu, 2023-09-14 at 01:32 +0300, Imre Deak wrote:
> Fix the NULL dereference leading to the following stack trace:
> 
> [  129.687181] i915 :00:02.0: [drm:drm_dp_add_payload_part1 
> [drm_display_helper]] VCPI 1 for port 5be4423e not in topology, not 
> creating a payload to remote
> [  129.687257] BUG: kernel NULL pointer dereference, address: 0560
> [  129.694276] #PF: supervisor read access in kernel mode
> [  129.699459] #PF: error_code(0x) - not-present page
> [  129.704612] PGD 0 P4D 0
> [  129.707178] Oops:  [#1] PREEMPT SMP NOPTI
> [  129.711556] CPU: 2 PID: 1623 Comm: Xorg Tainted: G U 
> 6.6.0-rc1-imre+ #985
> [  129.719744] Hardware name: Intel Corporation Alder Lake Client 
> Platform/AlderLake-P DDR5 RVP, BIOS RPLPFWI1.R00.4035.A00.2301200723 
> 01/20/2023
> [  129.732509] RIP: 0010:drm_dp_mst_topology_put_port+0x19/0x170 
> [drm_display_helper]
> [  129.740111] Code: 00 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 0f 1f 
> 44 00 00 55 48 89 e5 41 57 41 56 41 55 41 54 53 48 89 fb 48 83 ec 08 <48> 8b 
> 87 60 05 00 00 44 8b 0f 48 8b 70 58 41 83 e9 01 48 85 f6 74
> [  129.758842] RSP: 0018:c90001daf900 EFLAGS: 00010286
> [  129.764104] RAX: 0001 RBX:  RCX: 
> 
> [  129.771246] RDX:  RSI: 9e73d613 RDI: 
> 
> [  129.778394] RBP: c90001daf930 R08:  R09: 
> 0020
> [  129.785533] R10: 0010 R11: 000f R12: 
> 888116c65e40
> [  129.792680] R13:  R14:  R15: 
> 
> [  129.799822] FS:  7f39f74b1a80() GS:88840f68() 
> knlGS:
> [  129.807913] CS:  0010 DS:  ES:  CR0: 80050033
> [  129.813670] CR2: 0560 CR3: 000138b88000 CR4: 
> 00750ee0
> [  129.820815] PKRU: 5554
> [  129.823551] Call Trace:
> [  129.826022]  
> [  129.828154]  ? show_regs+0x65/0x70
> [  129.831599]  ? __die+0x24/0x70
> [  129.834683]  ? page_fault_oops+0x160/0x480
> [  129.838824]  ? dev_printk_emit+0x83/0xb0
> [  129.842797]  ? do_user_addr_fault+0x2e2/0x680
> [  129.847175]  ? exc_page_fault+0x78/0x180
> [  129.851143]  ? asm_exc_page_fault+0x27/0x30
> [  129.855353]  ? drm_dp_mst_topology_put_port+0x19/0x170 [drm_display_helper]
> [  129.862354]  drm_dp_add_payload_part1+0x85/0x100 [drm_display_helper]
> [  129.868832]  intel_mst_pre_enable_dp+0x1ef/0x240 [i915]
> [  129.874170]  intel_encoders_pre_enable+0x83/0xa0 [i915]
> [  129.879524]  hsw_crtc_enable+0xbe/0x750 [i915]
> [  129.884095]  intel_enable_crtc+0x68/0xa0 [i915]
> [  129.888752]  skl_commit_modeset_enables+0x2c4/0x5d0 [i915]
> [  129.894365]  intel_atomic_commit_tail+0x765/0x1070 [i915]
> [  129.899885]  intel_atomic_commit+0x3ba/0x400 [i915]
> [  129.904892]  drm_atomic_commit+0x96/0xd0 [drm]
> [  129.909405]  ? __pfx___drm_printfn_info+0x10/0x10 [drm]
> [  129.914698]  drm_atomic_helper_set_config+0x7e/0xc0 [drm_kms_helper]
> [  129.921102]  drm_mode_setcrtc+0x5af/0x8d0 [drm]
> [  129.925695]  ? __pfx_drm_mode_setcrtc+0x10/0x10 [drm]
> [  129.930810]  drm_ioctl_kernel+0xc4/0x170 [drm]
> [  129.935317]  drm_ioctl+0x2a4/0x520 [drm]
> [  129.939305]  ? __pfx_drm_mode_setcrtc+0x10/0x10 [drm]
> [  129.944415]  ? __fget_light+0xa5/0x110
> [  129.948212]  __x64_sys_ioctl+0x98/0xd0
> [  129.951985]  do_syscall_64+0x37/0x90
> [  129.955581]  entry_SYSCALL_64_after_hwframe+0x6e/0xd8
> 
> Fixes: 5aa1dfcdf0a4 ("drm/mst: Refactor the flow for payload 
> allocation/removement")
> Cc: Wayne Lin 
> Cc: Lyude Paul 
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Imre Deak 
> ---
>  drivers/gpu/drm/display/drm_dp_mst_topology.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c 
> b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index e04f87ff755ac..5f90860d49c34 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -3341,7 +3341,8 @@ int drm_dp_add_payload_part1(struct 
> drm_dp_mst_topology_mgr *mgr,
>   (!allocate || ret < 0) ? DRM_DP_MST_PAYLOAD_ALLOCATION_LOCAL :
>   
> DRM_DP_MST_PAYLOAD_ALLOCATION_DFP;
>  
> - drm_dp_mst_topology_put_port(port);
> + if (port)
> + drm_dp_mst_topology_put_port(port);
>  
>   return ret;
>  }

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat



Re: [PATCH] drm/msm/dsi: skip the wait for video mode done if not applicable

2023-09-15 Thread Dmitry Baryshkov
On Fri, 15 Sept 2023 at 21:30, Abhinav Kumar  wrote:
>
> dsi_wait4video_done() API wait for the DSI video mode engine to
> become idle so that we can transmit the DCS commands in the
> beginning of BLLP. However, with the current sequence, the MDP
> timing engine is turned on after the panel's pre_enable() callback
> which can send out the DCS commands needed to power up the panel.
>
> During those cases, this API will always timeout and print out the
> error spam leading to long bootup times and log flooding.
>
> Fix this by checking if the DSI video engine was actually busy before
> waiting for it to become idle otherwise this is a redundant wait.
>
> Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
> Signed-off-by: Abhinav Kumar 
> ---
>  drivers/gpu/drm/msm/dsi/dsi_host.c | 12 
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
> b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 0c4ec0530efc..31495e423c56 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -1075,9 +1075,21 @@ static void dsi_wait4video_done(struct msm_dsi_host 
> *msm_host)
>
>  static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host)
>  {
> +   u32 data;
> +
> +   data = dsi_read(msm_host, REG_DSI_STATUS0);
> +
> if (!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))
> return;

We can probably skip reading REG_DSI_STATUS0 if the host is in CMD mode.
LGTM otherwise.

>
> +   /* if video mode engine is not busy, its because
> +* either timing engine was not turned on or the
> +* DSI controller has finished transmitting the video
> +* data already, so no need to wait in those cases
> +*/
> +   if (!(data & DSI_STATUS0_VIDEO_MODE_ENGINE_BUSY))
> +   return;
> +
> if (msm_host->power_on && msm_host->enabled) {
> dsi_wait4video_done(msm_host);
> /* delay 4 ms to skip BLLP */
> --
> 2.40.1
>


-- 
With best wishes
Dmitry


Re: [PATCH][next] drm/gud: Use size_add() in call to struct_size()

2023-09-15 Thread Gustavo A. R. Silva




On 9/15/23 12:52, Kees Cook wrote:

On Fri, Sep 15, 2023 at 12:43:20PM -0600, Gustavo A. R. Silva wrote:

If, for any reason, the open-coded arithmetic causes a wraparound, the
protection that `struct_size()` adds against potential integer overflows
is defeated. Fix this by hardening call to `struct_size()` with `size_add()`.

Fixes: 40e1a70b4aed ("drm: Add GUD USB Display driver")
Signed-off-by: Gustavo A. R. Silva 
---
  drivers/gpu/drm/gud/gud_pipe.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/gud/gud_pipe.c b/drivers/gpu/drm/gud/gud_pipe.c
index d2f199ea3c11..a02f75be81f0 100644
--- a/drivers/gpu/drm/gud/gud_pipe.c
+++ b/drivers/gpu/drm/gud/gud_pipe.c
@@ -503,7 +503,7 @@ int gud_pipe_check(struct drm_simple_display_pipe *pipe,
return -ENOENT;
  
  	len = struct_size(req, properties,

- GUD_PROPERTIES_MAX_NUM + 
GUD_CONNECTOR_PROPERTIES_MAX_NUM);
+ size_add(GUD_PROPERTIES_MAX_NUM, 
GUD_CONNECTOR_PROPERTIES_MAX_NUM));


There are both constant expressions, so there's not too much value in
wrapping them with size_add(), but for maintaining a common coding style
for dealing with allocation sizes, I can be convinced of the change. :)


Yep; I've found a mix of constant expressions and variables doing open-coded 
arithmetic
in `struct_size()`, so I'm sending them all.



Reviewed-by: Kees Cook 


Thanks!
--
Gustavo





req = kzalloc(len, GFP_KERNEL);
if (!req)
return -ENOMEM;
--
2.34.1





Re: [PATCH][next] drm/gud: Use size_add() in call to struct_size()

2023-09-15 Thread Kees Cook
On Fri, Sep 15, 2023 at 12:43:20PM -0600, Gustavo A. R. Silva wrote:
> If, for any reason, the open-coded arithmetic causes a wraparound, the
> protection that `struct_size()` adds against potential integer overflows
> is defeated. Fix this by hardening call to `struct_size()` with `size_add()`.
> 
> Fixes: 40e1a70b4aed ("drm: Add GUD USB Display driver")
> Signed-off-by: Gustavo A. R. Silva 
> ---
>  drivers/gpu/drm/gud/gud_pipe.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/gud/gud_pipe.c b/drivers/gpu/drm/gud/gud_pipe.c
> index d2f199ea3c11..a02f75be81f0 100644
> --- a/drivers/gpu/drm/gud/gud_pipe.c
> +++ b/drivers/gpu/drm/gud/gud_pipe.c
> @@ -503,7 +503,7 @@ int gud_pipe_check(struct drm_simple_display_pipe *pipe,
>   return -ENOENT;
>  
>   len = struct_size(req, properties,
> -   GUD_PROPERTIES_MAX_NUM + 
> GUD_CONNECTOR_PROPERTIES_MAX_NUM);
> +   size_add(GUD_PROPERTIES_MAX_NUM, 
> GUD_CONNECTOR_PROPERTIES_MAX_NUM));

There are both constant expressions, so there's not too much value in
wrapping them with size_add(), but for maintaining a common coding style
for dealing with allocation sizes, I can be convinced of the change. :)

Reviewed-by: Kees Cook 


>   req = kzalloc(len, GFP_KERNEL);
>   if (!req)
>   return -ENOMEM;
> -- 
> 2.34.1
> 

-- 
Kees Cook


[PATCH][next] drm/gud: Use size_add() in call to struct_size()

2023-09-15 Thread Gustavo A. R. Silva
If, for any reason, the open-coded arithmetic causes a wraparound, the
protection that `struct_size()` adds against potential integer overflows
is defeated. Fix this by hardening call to `struct_size()` with `size_add()`.

Fixes: 40e1a70b4aed ("drm: Add GUD USB Display driver")
Signed-off-by: Gustavo A. R. Silva 
---
 drivers/gpu/drm/gud/gud_pipe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/gud/gud_pipe.c b/drivers/gpu/drm/gud/gud_pipe.c
index d2f199ea3c11..a02f75be81f0 100644
--- a/drivers/gpu/drm/gud/gud_pipe.c
+++ b/drivers/gpu/drm/gud/gud_pipe.c
@@ -503,7 +503,7 @@ int gud_pipe_check(struct drm_simple_display_pipe *pipe,
return -ENOENT;
 
len = struct_size(req, properties,
- GUD_PROPERTIES_MAX_NUM + 
GUD_CONNECTOR_PROPERTIES_MAX_NUM);
+ size_add(GUD_PROPERTIES_MAX_NUM, 
GUD_CONNECTOR_PROPERTIES_MAX_NUM));
req = kzalloc(len, GFP_KERNEL);
if (!req)
return -ENOMEM;
-- 
2.34.1



Re: [PATCH v2 0/4] drm/xe: Support optional pinning of userptr pages

2023-09-15 Thread Thomas Hellström

Hi,

On 9/8/23 10:44, Joonas Lahtinen wrote:

Quoting Thomas Hellström (2023-08-22 19:21:32)

This series adds a flag at VM_BIND time to pin the memory backing a VMA.
Initially this is needed for long-running workloads on hardware that
neither support mid-thread preemption nor pagefaults, since without it
the userptr MMU notifier will wait for preemption until preemption times
out.

 From terminology perspective we have a lot of folks in the userspace and
kernel developers who have come to understand pinned memory as something
that is locked in place while a dependent context is active on the
hardware. And that has been related to lack of page-fault support.

As here the plan is to go a step forward and never move that memory, would
it be worthy to call such memory LOCKED (would also align with CPU side).
And per my understanding the aspiration is to keep supporting locking
memory in place (within sysadmin configured limits) even if page-faults
will become de-facto usage.

So, in short, should we do s/pinned/locked/, to avoid terminology
confusion between new and old drivers which userspace may have to deal
from same codebase?


This is mainly a problem for people used to i915 pinning where we at 
some point used the term "short term pinning" and "long term pinning".


There are some discussions about the terminology here:
https://lwn.net/Articles/600502/
although I'm not sure what the outcome of that patchset was, but in this 
patchset, we're at least using pin_user_pages() for these VMAS. TTM and 
dma-buf also uses the term pinning.


The Linux distinction appears to be that locked pages are never paged 
out but may be migrated, (allowed to cause minor but not major 
pagefaults). Pinned pages are neither swapped nor migrated, and we're 
using the latter.


So I think pinning is the correct terminology?

(As a side note, Maarten was spending considerable time trying to remove 
the short term pinning from upstream i915 before xe work started).


Anyway, this patch series is on hold until we've merged Xe and can 
follow up with a discussion on exactly how we can support pinning in drm.


/Thomas




Regards, Joonas


Moving forward this could be supported also for bo-backed VMAs given
a proper accounting takes place. A sysadmin could then optionally configure
a system to be optimized for dealing with a single GPU application
at a time.

The series will be followed up with an igt series to exercise the uAPI.

v2:
- Address review comments by Matthew Brost.

Thomas Hellström (4):
   drm/xe/vm: Use onion unwind for xe_vma_userptr_pin_pages()
   drm/xe/vm: Implement userptr page pinning
   drm/xe/vm: Perform accounting of userptr pinned pages
   drm/xe/uapi: Support pinning of userptr vmas

  drivers/gpu/drm/xe/xe_vm.c   | 194 ---
  drivers/gpu/drm/xe/xe_vm.h   |   9 ++
  drivers/gpu/drm/xe/xe_vm_types.h |  14 +++
  include/uapi/drm/xe_drm.h|  18 +++
  4 files changed, 190 insertions(+), 45 deletions(-)

--
2.41.0



[PATCH] drm/msm/dsi: skip the wait for video mode done if not applicable

2023-09-15 Thread Abhinav Kumar
dsi_wait4video_done() API wait for the DSI video mode engine to
become idle so that we can transmit the DCS commands in the
beginning of BLLP. However, with the current sequence, the MDP
timing engine is turned on after the panel's pre_enable() callback
which can send out the DCS commands needed to power up the panel.

During those cases, this API will always timeout and print out the
error spam leading to long bootup times and log flooding.

Fix this by checking if the DSI video engine was actually busy before
waiting for it to become idle otherwise this is a redundant wait.

Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
Signed-off-by: Abhinav Kumar 
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 0c4ec0530efc..31495e423c56 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1075,9 +1075,21 @@ static void dsi_wait4video_done(struct msm_dsi_host 
*msm_host)
 
 static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host)
 {
+   u32 data;
+
+   data = dsi_read(msm_host, REG_DSI_STATUS0);
+
if (!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))
return;
 
+   /* if video mode engine is not busy, its because
+* either timing engine was not turned on or the
+* DSI controller has finished transmitting the video
+* data already, so no need to wait in those cases
+*/
+   if (!(data & DSI_STATUS0_VIDEO_MODE_ENGINE_BUSY))
+   return;
+
if (msm_host->power_on && msm_host->enabled) {
dsi_wait4video_done(msm_host);
/* delay 4 ms to skip BLLP */
-- 
2.40.1



[PATCH v6 2/3] drm/i915/pxp/mtl: Update pxp-firmware packet size

2023-09-15 Thread Alan Previn
Update the GSC-fw input/output HECI packet size to match
updated internal fw specs.

Signed-off-by: Alan Previn 
Reviewed-by: Vivaik Balasubrawmanian 
---
 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h 
b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
index 0165d38fbead..329b4fcdc040 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
@@ -14,8 +14,8 @@
 #define PXP43_CMDID_NEW_HUC_AUTH 0x003F /* MTL+ */
 #define PXP43_CMDID_INIT_SESSION 0x0036
 
-/* PXP-Packet sizes for MTL's GSCCS-HECI instruction */
-#define PXP43_MAX_HECI_INOUT_SIZE (SZ_32K)
+/* PXP-Packet sizes for MTL's GSCCS-HECI instruction is spec'd at 65K before 
page alignment*/
+#define PXP43_MAX_HECI_INOUT_SIZE (PAGE_ALIGN(SZ_64K + SZ_1K))
 
 /* PXP-Packet size for MTL's NEW_HUC_AUTH instruction */
 #define PXP43_HUC_AUTH_INOUT_SIZE (SZ_4K)
-- 
2.39.0



[PATCH v6 0/3] drm/i915/pxp/mtl: Update gsc-heci cmd submission to align with fw/hw spec

2023-09-15 Thread Alan Previn
For MTL, update the GSC-HECI packet size and the max firmware
response timeout to match internal fw specs. Enforce setting
run-alone bit in LRC for protected contexts.

Changes from prio revs:
   v5: - PAGE_ALIGN typo fix (Alan).
   - Use macro for runalone bit (Vivaik)
   - Spec alignment with system overhead,
 increase fw timeout to 500ms (Alan)
   v4: - PAGE_ALIGN the max heci packet size (Alan).
   v3: - Patch #1. Only start counting the request completion
 timeout from after the request has started (Daniele).
   v2: - Patch #3: fix sparse warning reported by kernel test robot.
   v1: - N/A (Re-test)

Signed-off-by: Alan Previn 

Alan Previn (3):
  drm/i915/pxp/mtl: Update pxp-firmware response timeout
  drm/i915/pxp/mtl: Update pxp-firmware packet size
  drm/i915/lrc: User PXP contexts requires runalone bit in lrc

 drivers/gpu/drm/i915/gt/intel_engine_regs.h   |  1 +
 drivers/gpu/drm/i915/gt/intel_lrc.c   | 23 +++
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 20 ++--
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h |  6 +
 .../drm/i915/pxp/intel_pxp_cmd_interface_43.h |  4 ++--
 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h| 10 
 6 files changed, 54 insertions(+), 10 deletions(-)


base-commit: cf1e91e884bb1113c653e654e9de1754fc1d4488
-- 
2.39.0



[PATCH v6 3/3] drm/i915/lrc: User PXP contexts requires runalone bit in lrc

2023-09-15 Thread Alan Previn
On Meteorlake onwards, HW specs require that all user contexts that
run on render or compute engines and require PXP must enforce
run-alone bit in lrc. Add this enforcement for protected contexts.

Signed-off-by: Alan Previn 
Reviewed-by: Vivaik Balasubrawmanian 
---
 drivers/gpu/drm/i915/gt/intel_engine_regs.h |  1 +
 drivers/gpu/drm/i915/gt/intel_lrc.c | 23 +
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_regs.h 
b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
index 6b9d9f837669..fdd4ddd3a978 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
@@ -177,6 +177,7 @@
 #define   CTX_CTRL_RS_CTX_ENABLE   REG_BIT(1)
 #define  CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT  REG_BIT(2)
 #define  CTX_CTRL_INHIBIT_SYN_CTX_SWITCH   REG_BIT(3)
+#define  GEN12_CTX_CTRL_RUNALONE_MODE  REG_BIT(7)
 #define  GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE REG_BIT(8)
 #define RING_CTX_SR_CTL(base)  _MMIO((base) + 0x244)
 #define RING_SEMA_WAIT_POLL(base)  _MMIO((base) + 0x24c)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 147b6f44ad56..eaf66d903166 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -845,6 +845,27 @@ lrc_setup_indirect_ctx(u32 *regs,
lrc_ring_indirect_offset_default(engine) << 6;
 }
 
+static bool ctx_needs_runalone(const struct intel_context *ce)
+{
+   struct i915_gem_context *gem_ctx;
+   bool ctx_is_protected = false;
+
+   /*
+* On MTL and newer platforms, protected contexts require setting
+* the LRC run-alone bit or else the encryption will not happen.
+*/
+   if (GRAPHICS_VER_FULL(ce->engine->i915) >= IP_VER(12, 70) &&
+   (ce->engine->class == COMPUTE_CLASS || ce->engine->class == 
RENDER_CLASS)) {
+   rcu_read_lock();
+   gem_ctx = rcu_dereference(ce->gem_context);
+   if (gem_ctx)
+   ctx_is_protected = gem_ctx->uses_protected_content;
+   rcu_read_unlock();
+   }
+
+   return ctx_is_protected;
+}
+
 static void init_common_regs(u32 * const regs,
 const struct intel_context *ce,
 const struct intel_engine_cs *engine,
@@ -860,6 +881,8 @@ static void init_common_regs(u32 * const regs,
if (GRAPHICS_VER(engine->i915) < 11)
ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
   CTX_CTRL_RS_CTX_ENABLE);
+   if (ctx_needs_runalone(ce))
+   ctl |= _MASKED_BIT_ENABLE(GEN12_CTX_CTRL_RUNALONE_MODE);
regs[CTX_CONTEXT_CONTROL] = ctl;
 
regs[CTX_TIMESTAMP] = ce->stats.runtime.last;
-- 
2.39.0



[PATCH v6 1/3] drm/i915/pxp/mtl: Update pxp-firmware response timeout

2023-09-15 Thread Alan Previn
Update the max GSC-fw response time to match updated internal
fw specs. Because this response time is an SLA on the firmware,
not inclusive of i915->GuC->HW handoff latency, when submitting
requests to the GSC fw via intel_gsc_uc_heci_cmd_submit helpers,
start the count after the request hits the GSC command streamer.
Also, move GSC_REPLY_LATENCY_MS definition from pxp header to
intel_gsc_uc_heci_cmd_submit.h since its for any GSC HECI packet.

Signed-off-by: Alan Previn 
Reviewed-by: Vivaik Balasubrawmanian 
---
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 20 +--
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h |  6 ++
 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h| 10 --
 3 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c 
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
index 89ed5ee9cded..2fde5c360cff 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
@@ -81,8 +81,17 @@ int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc 
*gsc, u64 addr_in,
 
i915_request_add(rq);
 
-   if (!err && i915_request_wait(rq, 0, msecs_to_jiffies(500)) < 0)
-   err = -ETIME;
+   if (!err) {
+   /*
+* Start timeout for i915_request_wait only after considering 
one possible
+* pending GSC-HECI submission cycle on the other 
(non-privileged) path.
+*/
+   if (wait_for(i915_request_started(rq), 
GSC_HECI_REPLY_LATENCY_MS))
+   drm_dbg(&gsc_uc_to_gt(gsc)->i915->drm,
+   "Delay in gsc-heci-priv submission to 
gsccs-hw");
+   if (i915_request_wait(rq, 0, 
msecs_to_jiffies(GSC_HECI_REPLY_LATENCY_MS)) < 0)
+   err = -ETIME;
+   }
 
i915_request_put(rq);
 
@@ -186,6 +195,13 @@ intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc 
*gsc,
i915_request_add(rq);
 
if (!err) {
+   /*
+* Start timeout for i915_request_wait only after considering 
one possible
+* pending GSC-HECI submission cycle on the other (privileged) 
path.
+*/
+   if (wait_for(i915_request_started(rq), 
GSC_HECI_REPLY_LATENCY_MS))
+   drm_dbg(&gsc_uc_to_gt(gsc)->i915->drm,
+   "Delay in gsc-heci-non-priv submission to 
gsccs-hw");
if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE,
  msecs_to_jiffies(timeout_ms)) < 0)
err = -ETIME;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h 
b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
index 09d3fbdad05a..c4308291c003 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
@@ -12,6 +12,12 @@ struct i915_vma;
 struct intel_context;
 struct intel_gsc_uc;
 
+#define GSC_HECI_REPLY_LATENCY_MS 500
+/*
+ * Max FW response time is 500ms, but this should be counted from the time the
+ * command has hit the GSC-CS hardware, not the preceding handoff to GuC CTB.
+ */
+
 struct intel_gsc_mtl_header {
u32 validity_marker;
 #define GSC_HECI_VALIDITY_MARKER 0xA578875A
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h 
b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h
index 298ad38e6c7d..9aae779c4da3 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h
@@ -8,16 +8,14 @@
 
 #include 
 
+#include "gt/uc/intel_gsc_uc_heci_cmd_submit.h"
+
 struct intel_pxp;
 
-#define GSC_REPLY_LATENCY_MS 210
-/*
- * Max FW response time is 200ms, to which we add 10ms to account for overhead
- * such as request preparation, GuC submission to hw and pipeline completion 
times.
- */
 #define GSC_PENDING_RETRY_MAXCOUNT 40
 #define GSC_PENDING_RETRY_PAUSE_MS 50
-#define GSCFW_MAX_ROUND_TRIP_LATENCY_MS (GSC_PENDING_RETRY_MAXCOUNT * 
GSC_PENDING_RETRY_PAUSE_MS)
+#define GSCFW_MAX_ROUND_TRIP_LATENCY_MS (GSC_HECI_REPLY_LATENCY_MS + \
+(GSC_PENDING_RETRY_MAXCOUNT * 
GSC_PENDING_RETRY_PAUSE_MS))
 
 #ifdef CONFIG_DRM_I915_PXP
 void intel_pxp_gsccs_fini(struct intel_pxp *pxp);
-- 
2.39.0



[PATCH v6 0/3] drm/i915/pxp/mtl: Update gsc-heci cmd submission to align with fw/hw spec

2023-09-15 Thread Alan Previn
For MTL, update the GSC-HECI packet size and the max firmware
response timeout to match internal fw specs. Enforce setting
run-alone bit in LRC for protected contexts.

Changes from prio revs:
   v5: - PAGE_ALIGN typo fix (Alan).
   - Use macro for runalone bit (Vivaik)
   - Spec alignment with system overhead,
 increase fw timeout to 500ms (Alan)
   v4: - PAGE_ALIGN the max heci packet size (Alan).
   v3: - Patch #1. Only start counting the request completion
 timeout from after the request has started (Daniele).
   v2: - Patch #3: fix sparse warning reported by kernel test robot.
   v1: - N/A (Re-test)

Signed-off-by: Alan Previn 

Alan Previn (3):
  drm/i915/pxp/mtl: Update pxp-firmware response timeout
  drm/i915/pxp/mtl: Update pxp-firmware packet size
  drm/i915/lrc: User PXP contexts requires runalone bit in lrc

 drivers/gpu/drm/i915/gt/intel_engine_regs.h   |  1 +
 drivers/gpu/drm/i915/gt/intel_lrc.c   | 23 +++
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 20 ++--
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h |  6 +
 .../drm/i915/pxp/intel_pxp_cmd_interface_43.h |  4 ++--
 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h| 10 
 6 files changed, 54 insertions(+), 10 deletions(-)


base-commit: cf1e91e884bb1113c653e654e9de1754fc1d4488
-- 
2.39.0



Re: [syzbot] [mm?] kernel BUG in filemap_unaccount_folio

2023-09-15 Thread syzbot
syzbot has bisected this issue to:

commit 5c074eeabbd332b11559f7fc1e89d456f94801fb
Author: Gerd Hoffmann 
Date:   Wed Nov 14 12:20:29 2018 +

udmabuf: set read/write flag when exporting

bisection log:  https://syzkaller.appspot.com/x/bisect.txt?x=12b21bbfa8
start commit:   db906f0ca6bb Merge tag 'phy-for-6.6' of git://git.kernel.o..
git tree:   upstream
final oops: https://syzkaller.appspot.com/x/report.txt?x=11b21bbfa8
console output: https://syzkaller.appspot.com/x/log.txt?x=16b21bbfa8
kernel config:  https://syzkaller.appspot.com/x/.config?x=3bd57a1ac08277b0
dashboard link: https://syzkaller.appspot.com/bug?extid=17a207d226b8a5fb0fd9
syz repro:  https://syzkaller.appspot.com/x/repro.syz?x=11609f3868
C reproducer:   https://syzkaller.appspot.com/x/repro.c?x=14c1fc0068

Reported-by: syzbot+17a207d226b8a5fb0...@syzkaller.appspotmail.com
Fixes: 5c074eeabbd3 ("udmabuf: set read/write flag when exporting")

For information about bisection process see: https://goo.gl/tpsmEJ#bisection


Re: [PATCH] drm/panel: boe-tv101wum-nl6: Completely Pull GPW to VGL before TP term

2023-09-15 Thread Jessica Zhang




On 9/12/2023 3:59 AM, Ruihai Zhou wrote:

The sta_himax83102 panel sometimes shows abnormally flickering
horizontal lines. The front gate output will precharge the X point of
the next pole circuit before TP(TouchPanel Enable) term starts, and wait
until the end of the TP term to resume the CLK. For this reason, the X
point must be maintained during the TP term. In abnormal case, we
measured a slight leakage at point X. This because during the TP term,
the GPW does not fully pull the VGL low, causing the TFT to not be
closed tightly.

To fix this, we completely pull GPW to VGL before entering the TP term.
This will ensure that the TFT is closed tightly and prevent the abnormal
display.


Hi Ruihai,

Can you add a fixes-by tag?
I think this might be the one to use:

Fixes: 1bc2ef065f13 ("drm/panel: Support for Starry-himax83102-j02 TDDI 
MIPI-DSI panel")


Otherwise this LGTM.

Reviewed-by: Jessica Zhang 

Thanks,

Jessica Zhang



Signed-off-by: Ruihai Zhou 
---
This patch base on original fixes series [1]
[1] 
https://patchwork.kernel.org/project/dri-devel/cover/20230703-fix-boe-tv101wum-nl6-v3-0-bd6e9432c...@linaro.org/
---
  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 5 ++---
  1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index c2ee2c6b4150..e37b9b4f528d 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1305,9 +1305,8 @@ static int starry_himax83102_j02_init(struct 
mipi_dsi_device *dsi)
mipi_dsi_dcs_write_seq(dsi, 0xB1, 0x01, 0xBF, 0x11);
mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x86);
mipi_dsi_dcs_write_seq(dsi, 0xD2, 0x3C, 0xFA);
-   mipi_dsi_dcs_write_seq(dsi, 0xE9, 0xC5);
-   mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 
0x01);
-   mipi_dsi_dcs_write_seq(dsi, 0xE9, 0x3F);
+   mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x80,
+  0x0C, 0x01);
mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 
0x7E, 0x10, 0xA0,
   0x00, 0x00, 0x20, 0x40, 0x50, 0x40);
mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x02);
--
2.17.1



Re: [PATCH] drm/amd/display: fix the ability to use lower resolution modes on eDP

2023-09-15 Thread Harry Wentland



On 2023-09-14 17:12, Hamza Mahfooz wrote:
> 
> On 9/14/23 17:04, Hamza Mahfooz wrote:
>>
>> On 9/14/23 16:40, Harry Wentland wrote:
>>> On 2023-09-14 13:53, Hamza Mahfooz wrote:
 On eDP we can receive invalid modes from dm_update_crtc_state() for
 entirely new streams for which drm_mode_set_crtcinfo() shouldn't be
 called on. So, instead of calling drm_mode_set_crtcinfo() from within
 create_stream_for_sink() we can instead call it from
 amdgpu_dm_connector_mode_valid(). Since, we are guaranteed to only call
 drm_mode_set_crtcinfo() for valid modes from that function (invalid
 modes are rejected by that callback) and that is the only user
 of create_validate_stream_for_sink() that we need to call
 drm_mode_set_crtcinfo() for (as before commit cb841d27b876
 ("drm/amd/display: Always pass connector_state to stream validation"),
 that is the only place where create_validate_stream_for_sink()'s
 dm_state was NULL).

>>>
>>> I don't seem to see how a NULL dm_state in
>>> create_validate_stream_for_sink() (or create_stream_for_sink() for that
>>> matter) has an impact on the drm_mode_set_crtcinfo() call. That one depends
>>> on !old_stream and &mode.
>>
>> If we look back to commit 4a2df0d1f28e ("drm/amd/display: Fixed
>> non-native modes not lighting up") it seems like the intent was to only
>> have drm_mode_set_crtcinfo() called for
>> amdgpu_dm_connector_mode_valid(). Since, even if we go that far back
>> create_stream_for_sink()'s dm_state was only NULL when it was called
>> from amdgpu_dm_connector_mode_valid().
>>
>>>
>>> It does look like &mode is an empty mode if we can't find a preferred_mode,
>>> though. Not sure if that can cause an issue.
>>
>> I don't think it should be an issue, since before commit 4a2df0d1f28e
>> ("drm/amd/display: Fixed non-native modes not lighting up") we always
> 
> I meant to refer to commit bd49f19039c1 ("drm/amd/display: Always set
> crtcinfo from create_stream_for_sink") here.
> 
>> called drm_mode_set_crtcinfo() in the aforementioned case (and only for that 
>> case).
>>

That's quite the tale of patches upon patches making things slightly
worse until it no longer works right. Thanks for untangling this all
the way back to 2018. It makes sense now.

Reviewed-by: Harry Wentland 

Harry

>>>
>>> Harry
>>>
 Cc: sta...@vger.kernel.org
 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2693
 Fixes: cb841d27b876 ("drm/amd/display: Always pass connector_state to 
 stream validation")
 Signed-off-by: Hamza Mahfooz 
 ---
   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
   1 file changed, 2 insertions(+), 2 deletions(-)

 diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
 b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
 index 933c9b5d5252..beef4fef7338 100644
 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
 +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
 @@ -6128,8 +6128,6 @@ create_stream_for_sink(struct amdgpu_dm_connector 
 *aconnector,
   if (recalculate_timing)
   drm_mode_set_crtcinfo(&saved_mode, 0);
 -    else if (!old_stream)
 -    drm_mode_set_crtcinfo(&mode, 0);
   /*
    * If scaling is enabled and refresh rate didn't change
 @@ -6691,6 +6689,8 @@ enum drm_mode_status 
 amdgpu_dm_connector_mode_valid(struct drm_connector *connec
   goto fail;
   }
 +    drm_mode_set_crtcinfo(mode, 0);
 +
   stream = create_validate_stream_for_sink(aconnector, mode,
    to_dm_connector_state(connector->state),
    NULL);
>>>



Re: [PATCH v5 3/3] drm/i915/lrc: User PXP contexts requires runalone bit in lrc

2023-09-15 Thread Teres Alexis, Alan Previn
On Sat, 2023-09-09 at 15:38 -0700, Teres Alexis, Alan Previn wrote:
> On Meteorlake onwards, HW specs require that all user contexts that
> run on render or compute engines and require PXP must enforce
> run-alone bit in lrc. Add this enforcement for protected contexts.
alan:snip
> 
> Signed-off-by: Alan Previn 
> @@ -860,6 +881,8 @@ static void init_common_regs(u32 * const regs,
>   if (GRAPHICS_VER(engine->i915) < 11)
>   ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |
>  CTX_CTRL_RS_CTX_ENABLE);
> + if (ctx_needs_runalone(ce))
> + ctl |= _MASKED_BIT_ENABLE(BIT(7));
>   regs[CTX_CONTEXT_CONTROL] = ctl;
>  
>   regs[CTX_TIMESTAMP] = ce->stats.runtime.last;
alan: to align intel-gfx ml, Vivaik reviewed this on dri-devel at 
https://lists.freedesktop.org/archives/dri-devel/2023-September/422875.html - 
snippet:
thus, will rerev this (with the others fixes in this series).

>> Can we please get the bit defined in intel_engine_regs.h with a define 
>> instead of a number identification?
>> 
>> Review completed conditional to the above fix.
>> 
>> Reviewed-by: Balasubrawmanian, Vivaik 
>>  
>> 




Re: [PATCH v5 2/3] drm/i915/pxp/mtl: Update pxp-firmware packet size

2023-09-15 Thread Teres Alexis, Alan Previn
On Sat, 2023-09-09 at 15:38 -0700, Teres Alexis, Alan Previn wrote:
> Update the GSC-fw input/output HECI packet size to match
> updated internal fw specs.
> 
> Signed-off-by: Alan Previn 
> ---
>  drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h 
> b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> index 0165d38fbead..e017a7d952e9 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> @@ -14,8 +14,8 @@
>  #define PXP43_CMDID_NEW_HUC_AUTH 0x003F /* MTL+ */
>  #define PXP43_CMDID_INIT_SESSION 0x0036
>  
> -/* PXP-Packet sizes for MTL's GSCCS-HECI instruction */
> -#define PXP43_MAX_HECI_INOUT_SIZE (SZ_32K)
> +/* PXP-Packet sizes for MTL's GSCCS-HECI instruction is spec'd at 65K before 
> page alignment*/
> +#define PXP43_MAX_HECI_INOUT_SIZE (PAGE_ALIGNED(SZ_64K + SZ_1K))
>  
>  /* PXP-Packet size for MTL's NEW_HUC_AUTH instruction */
>  #define PXP43_HUC_AUTH_INOUT_SIZE (SZ_4K)
Vivaik replied with RB on dri-devel: 
https://lists.freedesktop.org/archives/dri-devel/2023-September/422862.htmll
we connected offline and agreed that his RB can remain standing on condition i 
fix the PAGE_ALIGNED -> PAGE_ALIGN fix.
Thanks Vivaik for reviewing.



Re: [PATCH v5 1/3] drm/i915/pxp/mtl: Update pxp-firmware response timeout

2023-09-15 Thread Teres Alexis, Alan Previn
On Sat, 2023-09-09 at 15:38 -0700, Teres Alexis, Alan Previn wrote:
> Update the max GSC-fw response time to match updated internal
> fw specs. Because this response time is an SLA on the firmware,
> not inclusive of i915->GuC->HW handoff latency, when submitting
> requests to the GSC fw via intel_gsc_uc_heci_cmd_submit helpers,
alan:snip
Vivaik replied with RB on dri-devel: 
https://lists.freedesktop.org/archives/dri-devel/2023-September/422861.html
we connected offline and agreed that his RB can remain standing on condition i 
fix the PAGE_ALIGNED -> PAGE_ALIGN fix.
Thanks Vivaik for reviewing.


Re: [PATCH] drm/nouveau/nvif: refactor deprecated strncpy

2023-09-15 Thread Lyude Paul
Reviewed-by: Lyude Paul 

Will push this and your other patches in just a moment

On Thu, 2023-09-14 at 21:30 +, Justin Stitt wrote:
> `strncpy` is deprecated and as such we should prefer more robust and
> less ambiguous string interfaces.
> 
> A suitable replacement is `strscpy_pad` due to the fact that it
> guarantees NUL-termination on the destination buffer whilst also
> maintaining the NUL-padding behavior that `strncpy` provides. I am not
> sure whether NUL-padding is strictly needed but I see in
> `nvif_object_ctor()` args is memcpy'd elsewhere so I figured we'd keep
> the same functionality.
> 
> Link: 
> https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings
>  [1]
> Link: https://github.com/KSPP/linux/issues/90
> Cc: linux-harden...@vger.kernel.org
> Signed-off-by: Justin Stitt 
> ---
> Note: build-tested only.
> ---
>  drivers/gpu/drm/nouveau/nvif/client.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/nouveau/nvif/client.c 
> b/drivers/gpu/drm/nouveau/nvif/client.c
> index a3264a0e933a..3a27245f467f 100644
> --- a/drivers/gpu/drm/nouveau/nvif/client.c
> +++ b/drivers/gpu/drm/nouveau/nvif/client.c
> @@ -69,7 +69,7 @@ nvif_client_ctor(struct nvif_client *parent, const char 
> *name, u64 device,
>   } nop = {};
>   int ret;
>  
> - strncpy(args.name, name, sizeof(args.name));
> + strscpy_pad(args.name, name, sizeof(args.name));
>   ret = nvif_object_ctor(parent != client ? &parent->object : NULL,
>  name ? name : "nvifClient", 0,
>  NVIF_CLASS_CLIENT, &args, sizeof(args),
> 
> ---
> base-commit: 3669558bdf354cd352be955ef2764cde6a9bf5ec
> change-id: 20230914-strncpy-drivers-gpu-drm-nouveau-nvif-client-c-82b023c36953
> 
> Best regards,
> --
> Justin Stitt 
> 

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat



Re: [PATCH] drm/nouveau/pm: refactor deprecated strncpy

2023-09-15 Thread Lyude Paul
...oops, responded to the wrong email :P

Reviewed-by: Lyude Paul 


On Thu, 2023-09-14 at 22:17 +, Justin Stitt wrote:
> `strncpy` is deprecated for use on NUL-terminated destination strings [1].
> 
> We should prefer more robust and less ambiguous string interfaces.
> 
> A suitable replacement is `strscpy` [2] due to the fact that it guarantees
> NUL-termination on the destination buffer without unnecessarily NUL-padding.
> 
> Link: 
> https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings
>  [1]
> Link: https://manpages.debian.org/testing/linux-manual-4.8/strscpy.9.en.html 
> [2]
> Link: https://github.com/KSPP/linux/issues/90
> Cc: linux-harden...@vger.kernel.org
> Signed-off-by: Justin Stitt 
> ---
>  drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c | 7 +++
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c 
> b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c
> index 8fe0444f761e..131db2645f84 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c
> @@ -462,7 +462,7 @@ nvkm_perfmon_mthd_query_domain(struct nvkm_perfmon 
> *perfmon,
>  
>   args->v0.id = di;
>   args->v0.signal_nr  = nvkm_perfdom_count_perfsig(dom);
> - strncpy(args->v0.name, dom->name, sizeof(args->v0.name) - 1);
> + strscpy(args->v0.name, dom->name, sizeof(args->v0.name));
>  
>   /* Currently only global counters (PCOUNTER) are implemented
>* but this will be different for local counters (MP). */
> @@ -513,8 +513,7 @@ nvkm_perfmon_mthd_query_signal(struct nvkm_perfmon 
> *perfmon,
>   snprintf(args->v0.name, sizeof(args->v0.name),
>"/%s/%02x", dom->name, si);
>   } else {
> - strncpy(args->v0.name, sig->name,
> - sizeof(args->v0.name) - 1);
> + strscpy(args->v0.name, sig->name, 
> sizeof(args->v0.name));
>   }
>  
>   args->v0.signal = si;
> @@ -572,7 +571,7 @@ nvkm_perfmon_mthd_query_source(struct nvkm_perfmon 
> *perfmon,
>  
>   args->v0.source = sig->source[si];
>   args->v0.mask   = src->mask;
> - strncpy(args->v0.name, src->name, sizeof(args->v0.name) - 1);
> + strscpy(args->v0.name, src->name, sizeof(args->v0.name));
>   }
>  
>   if (++si < source_nr) {
> 
> ---
> base-commit: 3669558bdf354cd352be955ef2764cde6a9bf5ec
> change-id: 
> 20230914-strncpy-drivers-gpu-drm-nouveau-nvkm-engine-pm-base-c-38bf9c78bc0f
> 
> Best regards,
> --
> Justin Stitt 
> 

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat



Re: [PATCH] drm/nouveau/core: refactor deprecated strncpy

2023-09-15 Thread Lyude Paul
Eek, I didn't realize how many instances of this we had. Thanks for doing this
:)

Reviewed-by: Lyude Paul 

On Thu, 2023-09-14 at 21:40 +, Justin Stitt wrote:
> `strncpy` is deprecated for use on NUL-terminated destination strings [1].
> 
> We should prefer more robust and less ambiguous string interfaces.
> 
> A suitable replacement is `strscpy` [2] due to the fact that it guarantees
> NUL-termination on the destination buffer without unnecessarily NUL-padding.
> 
> There is likely no bug in the current implementation due to the safeguard:
> > cname[sizeof(cname) - 1] = '\0';
> ... however we can provide simpler and easier to understand code using
> the newer (and recommended) `strscpy` api.
> 
> Link: 
> https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings
>  [1]
> Link: https://manpages.debian.org/testing/linux-manual-4.8/strscpy.9.en.html 
> [2]
> Link: https://github.com/KSPP/linux/issues/90
> Cc: linux-harden...@vger.kernel.org
> Signed-off-by: Justin Stitt 
> ---
>  drivers/gpu/drm/nouveau/nvkm/core/firmware.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/nouveau/nvkm/core/firmware.c 
> b/drivers/gpu/drm/nouveau/nvkm/core/firmware.c
> index 91fb494d4009..374212da9e95 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/core/firmware.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/core/firmware.c
> @@ -79,8 +79,7 @@ nvkm_firmware_get(const struct nvkm_subdev *subdev, const 
> char *fwname, int ver,
>   int i;
>  
>   /* Convert device name to lowercase */
> - strncpy(cname, device->chip->name, sizeof(cname));
> - cname[sizeof(cname) - 1] = '\0';
> + strscpy(cname, device->chip->name, sizeof(cname));
>   i = strlen(cname);
>   while (i) {
>   --i;
> 
> ---
> base-commit: 3669558bdf354cd352be955ef2764cde6a9bf5ec
> change-id: 
> 20230914-strncpy-drivers-gpu-drm-nouveau-nvkm-core-firmware-c-791223838b72
> 
> Best regards,
> --
> Justin Stitt 
> 

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat



Re: [PATCH] drm/nouveau/pm: refactor deprecated strncpy

2023-09-15 Thread Lyude Paul
Nice catch!

Reviewed-by: Lyude Paul 

Will push in just a moment

On Thu, 2023-09-14 at 21:59 -0700, Kees Cook wrote:
> On Thu, Sep 14, 2023 at 10:17:08PM +, Justin Stitt wrote:
> > `strncpy` is deprecated for use on NUL-terminated destination strings [1].
> > 
> > We should prefer more robust and less ambiguous string interfaces.
> > 
> > A suitable replacement is `strscpy` [2] due to the fact that it guarantees
> > NUL-termination on the destination buffer without unnecessarily NUL-padding.
> > 
> > Link: 
> > https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings
> >  [1]
> > Link: 
> > https://manpages.debian.org/testing/linux-manual-4.8/strscpy.9.en.html [2]
> > Link: https://github.com/KSPP/linux/issues/90
> > Cc: linux-harden...@vger.kernel.org
> > Signed-off-by: Justin Stitt 
> 
> The "- 1" use in the original code is strong evidence for this being a
> sane conversion. :)
> 
> Reviewed-by: Kees Cook 
> 

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat



Re: [PATCH v5 1/3] drm/i915/pxp/mtl: Update pxp-firmware response timeout

2023-09-15 Thread Teres Alexis, Alan Previn
On Sat, 2023-09-09 at 15:38 -0700, Teres Alexis, Alan Previn wrote:
> Update the max GSC-fw response time to match updated internal
> fw specs. Because this response time is an SLA on the firmware,
> not inclusive of i915->GuC->HW handoff latency, when submitting
> requests to the GSC fw via intel_gsc_uc_heci_cmd_submit helpers,
> start the count after the request hits the GSC command streamer.
> Also, move GSC_REPLY_LATENCY_MS definition from pxp header to
> intel_gsc_uc_heci_cmd_submit.h since its for any GSC HECI packet.
> 
> Signed-off-by: Alan Previn 
> ---
>  .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 20 +--
>  .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h |  6 ++
>  drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h| 11 ++
>  3 files changed, 31 insertions(+), 6 deletions(-)
alan: snip


> index 09d3fbdad05a..5ae5c5d9608b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
> @@ -12,6 +12,12 @@ struct i915_vma;
>  struct intel_context;
>  struct intel_gsc_uc;
>  
> +#define GSC_HECI_REPLY_LATENCY_MS 350
> +/*
> + * Max FW response time is 350ms, but this should be counted from the time 
> the
> + * command has hit the GSC-CS hardware, not the preceding handoff to GuC CTB.
> + */
alan: continue to face timeout issues - so increasing this to ~500 to absorb 
other hw/sw system latencies.
this also matches what the gsc-proxy code was doing - so i could use the same 
macro for that other code path.



Re: [PATCH v5 2/3] drm/i915/pxp/mtl: Update pxp-firmware packet size

2023-09-15 Thread Teres Alexis, Alan Previn
On Sat, 2023-09-09 at 15:38 -0700, Teres Alexis, Alan Previn wrote:
> Update the GSC-fw input/output HECI packet size to match
> updated internal fw specs.
> 
> Signed-off-by: Alan Previn 
> 
alan:snip

> -/* PXP-Packet sizes for MTL's GSCCS-HECI instruction */
> -#define PXP43_MAX_HECI_INOUT_SIZE (SZ_32K)
> +/* PXP-Packet sizes for MTL's GSCCS-HECI instruction is spec'd at 65K before 
> page alignment*/
> +#define PXP43_MAX_HECI_INOUT_SIZE (PAGE_ALIGNED(SZ_64K + SZ_1K))
alan: silly ctrl-c/v bug on my part - should be PAGE_ALIGN, not ALIGNED
>  
>  /* PXP-Packet size for MTL's NEW_HUC_AUTH instruction */
>  #define PXP43_HUC_AUTH_INOUT_SIZE (SZ_4K)



RE: [PATCH v6 1/5] drm/amdgpu: Allocate coredump memory in a nonblocking way

2023-09-15 Thread Sharma, Shashank
[AMD Official Use Only - General]

Pushed the rest of the patches in the series to amd-staging-drm-next.

Regards
Shashank
-Original Message-
From: Koenig, Christian 
Sent: Monday, September 11, 2023 1:15 PM
To: André Almeida ; dri-devel@lists.freedesktop.org; 
amd-...@lists.freedesktop.org; linux-ker...@vger.kernel.org; Sharma, Shashank 

Cc: kernel-...@igalia.com; Deucher, Alexander ; 
Pelloux-Prayer, Pierre-Eric 
Subject: Re: [PATCH v6 1/5] drm/amdgpu: Allocate coredump memory in a 
nonblocking way

Am 11.09.23 um 05:00 schrieb André Almeida:
> During a GPU reset, a normal memory reclaim could block to reclaim
> memory. Giving that coredump is a best effort mechanism, it shouldn't
> disturb the reset path. Change its memory allocation flag to a
> nonblocking one.

Since it is a bug fix I've already pushed this one into our internal branch 
quite a while ago.

Shashank can you take care of picking up the remaining patches and pushing them 
to amd-staging-drm-next?

Thanks,
Christian.

>
> Signed-off-by: André Almeida 
> Reviewed-by: Christian König 
> ---
> v5: no change
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index aa171db68639..bf4781551f88 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -4847,7 +4847,7 @@ static void amdgpu_reset_capture_coredumpm(struct 
> amdgpu_device *adev)
>   struct drm_device *dev = adev_to_drm(adev);
>
>   ktime_get_ts64(&adev->reset_time);
> - dev_coredumpm(dev->dev, THIS_MODULE, adev, 0, GFP_KERNEL,
> + dev_coredumpm(dev->dev, THIS_MODULE, adev, 0, GFP_NOWAIT,
> amdgpu_devcoredump_read, amdgpu_devcoredump_free);
>   }
>   #endif



Re: [PATCH v2 1/2] dt-bindings: backlight: Add MPS MP3309C

2023-09-15 Thread Rob Herring
On Fri, Sep 15, 2023 at 04:05:15PM +0200, Flavio Suligoi wrote:
> The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
> programmable switching frequency to optimize efficiency.
> The brightness can be controlled either by I2C commands (called "analog"
> mode) or by a PWM input signal (PWM mode).
> This driver supports both modes.
> 
> For device driver details, please refer to:
> - drivers/video/backlight/mp3309c_bl.c
> 
> The datasheet is available at:
> - https://www.monolithicpower.com/en/mp3309c.html
> 
> Signed-off-by: Flavio Suligoi 
> ---
> 
> v2:
>  - remove useless properties (dimming-mode, pinctrl-names, pinctrl-0,
>switch-on-delay-ms, switch-off-delay-ms, reset-gpios, reset-on-delay-ms,
>reset-on-length-ms)
>  - add common.yaml#
>  - remove already included properties (default-brightness, max-brightness)
>  - substitute three boolean properties, used for the overvoltage-protection
>values, with a single enum property
>  - remove some conditional definitions
>  - remove the 2nd example
> v1:
>  - first version
> 
>  .../bindings/leds/backlight/mps,mp3309c.yaml  | 73 +++
>  1 file changed, 73 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml 
> b/Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
> new file mode 100644
> index ..99ccdba2c08f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/leds/backlight/mps,mp3309c.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MPS MP3309C backlight
> +
> +maintainers:
> +  - Flavio Suligoi 
> +
> +description: |
> +  The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
> +  programmable switching frequency to optimize efficiency.
> +  It supports two different dimming modes:
> +
> +  - analog mode, via I2C commands (default)
> +  - PWM controlled mode.
> +
> +  The datasheet is available at:
> +  https://www.monolithicpower.com/en/mp3309c.html
> +
> +allOf:
> +  - $ref: common.yaml#
> +
> +properties:
> +  compatible:
> +const: mps,mp3309c
> +
> +  reg:
> +maxItems: 1
> +
> +  pwms:
> +description: if present, the backlight is controlled in PWM mode.
> +maxItems: 1
> +
> +  enable-gpios:
> +description: GPIO used to enable the backlight in "analog-i2c" dimming 
> mode.
> +maxItems: 1
> +
> +  mps,overvoltage-protection-microvolt:
> +description: Overvoltage protection (13.5V, 24V or 35.5V). If missing, 
> the
> +  hardware default of 35.5V is used.

default: 3550

instead of prose saying the same thing.

With that,

Reviewed-by: Rob Herring 

> +enum: [ 1350, 2400, 3550 ]
> +
> +  mps,no-sync-mode:
> +description: disable synchronous rectification mode
> +type: boolean
> +
> +required:
> +  - compatible
> +  - reg
> +  - max-brightness
> +  - default-brightness
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +i2c {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +/* Backlight with PWM control */
> +backlight_pwm: backlight@17 {
> +compatible = "mps,mp3309c-backlight";
> +reg = <0x17>;
> +pwms = <&pwm1 0 333 0>; /* 300 Hz --> (1/f) * 1*10^9 */
> +max-brightness = <100>;
> +default-brightness = <80>;
> +overvoltage-protection-microvolt = <2400>;
> +};
> +};
> -- 
> 2.34.1
> 


Re: [PATCH v2 1/2] dt-bindings: backlight: Add MPS MP3309C

2023-09-15 Thread Conor Dooley
Yo,

On Fri, Sep 15, 2023 at 04:05:15PM +0200, Flavio Suligoi wrote:
> The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
> programmable switching frequency to optimize efficiency.
> The brightness can be controlled either by I2C commands (called "analog"
> mode) or by a PWM input signal (PWM mode).
> This driver supports both modes.
> 
> For device driver details, please refer to:
> - drivers/video/backlight/mp3309c_bl.c
> 
> The datasheet is available at:
> - https://www.monolithicpower.com/en/mp3309c.html
> 
> Signed-off-by: Flavio Suligoi 
> ---
> 
> v2:
>  - remove useless properties (dimming-mode, pinctrl-names, pinctrl-0,
>switch-on-delay-ms, switch-off-delay-ms, reset-gpios, reset-on-delay-ms,
>reset-on-length-ms)
>  - add common.yaml#
>  - remove already included properties (default-brightness, max-brightness)
>  - substitute three boolean properties, used for the overvoltage-protection
>values, with a single enum property
>  - remove some conditional definitions
>  - remove the 2nd example
> v1:
>  - first version
> 
>  .../bindings/leds/backlight/mps,mp3309c.yaml  | 73 +++
>  1 file changed, 73 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml 
> b/Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
> new file mode 100644
> index ..99ccdba2c08f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/leds/backlight/mps,mp3309c.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MPS MP3309C backlight
> +
> +maintainers:
> +  - Flavio Suligoi 
> +
> +description: |
> +  The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
> +  programmable switching frequency to optimize efficiency.
> +  It supports two different dimming modes:
> +
> +  - analog mode, via I2C commands (default)
> +  - PWM controlled mode.
> +
> +  The datasheet is available at:
> +  https://www.monolithicpower.com/en/mp3309c.html
> +
> +allOf:
> +  - $ref: common.yaml#
> +
> +properties:
> +  compatible:
> +const: mps,mp3309c
> +
> +  reg:
> +maxItems: 1
> +
> +  pwms:
> +description: if present, the backlight is controlled in PWM mode.
> +maxItems: 1
> +
> +  enable-gpios:
> +description: GPIO used to enable the backlight in "analog-i2c" dimming 
> mode.
> +maxItems: 1
> +
> +  mps,overvoltage-protection-microvolt:
> +description: Overvoltage protection (13.5V, 24V or 35.5V). If missing, 
> the
> +  hardware default of 35.5V is used.
> +enum: [ 1350, 2400, 3550 ]
You can add "default: 3550" and drop the free form default as text
in the description.

Cheers,
Conor.

> +
> +  mps,no-sync-mode:
> +description: disable synchronous rectification mode
> +type: boolean
> +
> +required:
> +  - compatible
> +  - reg
> +  - max-brightness
> +  - default-brightness
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +i2c {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +/* Backlight with PWM control */
> +backlight_pwm: backlight@17 {
> +compatible = "mps,mp3309c-backlight";

As the bot pointed out, the compatible doesn't contain "backlight".

> +reg = <0x17>;
> +pwms = <&pwm1 0 333 0>; /* 300 Hz --> (1/f) * 1*10^9 */
> +max-brightness = <100>;
> +default-brightness = <80>;
> +overvoltage-protection-microvolt = <2400>;
> +};
> +};
> -- 
> 2.34.1
> 


signature.asc
Description: PGP signature


Re: [PATCH] MAINTAINERS: add drm_bridge_connector.[ch] files under bridge chips

2023-09-15 Thread Jani Nikula
On Fri, 15 Sep 2023, Robert Foss  wrote:
> On Fri, Sep 15, 2023 at 12:31 PM Neil Armstrong
>  wrote:
>>
>> On 14/09/2023 15:19, Jani Nikula wrote:
>> > Clearly this should be under bridge chips.
>> >
>> > Cc: Andrzej Hajda 
>> > Cc: Neil Armstrong 
>> > Cc: Robert Foss 
>> > Signed-off-by: Jani Nikula 
>> > ---
>> >   MAINTAINERS | 2 ++
>> >   1 file changed, 2 insertions(+)
>> >
>> > diff --git a/MAINTAINERS b/MAINTAINERS
>> > index 354ac7ef553d..c331f2ea89d7 100644
>> > --- a/MAINTAINERS
>> > +++ b/MAINTAINERS
>> > @@ -6909,7 +6909,9 @@ T:  git 
>> > git://anongit.freedesktop.org/drm/drm-misc
>> >   F:  Documentation/devicetree/bindings/display/bridge/
>> >   F:  drivers/gpu/drm/bridge/
>> >   F:  drivers/gpu/drm/drm_bridge.c
>> > +F:   drivers/gpu/drm/drm_bridge_connector.c
>> >   F:  include/drm/drm_bridge.h
>> > +F:   include/drm/drm_bridge_connector.h
>> >
>> >   DRM DRIVERS FOR EXYNOS
>> >   M:  Inki Dae 
>>
>> Acked-by: Neil Armstrong 
>>
>
> Acked-by: Robert Foss 

Thanks, pushed to drm-misc-next.

BR,
Jani.

-- 
Jani Nikula, Intel


Re: [PATCH] accel/qaic: Use devm_drm_dev_alloc() instead of drm_dev_alloc()

2023-09-15 Thread Jeffrey Hugo

On 9/1/2023 10:12 AM, Jeffrey Hugo wrote:

From: Pranjal Ramajor Asha Kanojiya 

Since drm_dev_alloc() is deprecated it is recommended to use
devm_drm_dev_alloc() instead. Update the driver to start using
devm_drm_dev_alloc().

Signed-off-by: Pranjal Ramajor Asha Kanojiya 
Reviewed-by: Carl Vanderlip 
Reviewed-by: Jeffrey Hugo 
Signed-off-by: Jeffrey Hugo 


Pushed to drm-misc-next

-Jeff


Re: [PATCH] accel/qaic: Use devm_drm_dev_alloc() instead of drm_dev_alloc()

2023-09-15 Thread Jeffrey Hugo

On 9/4/2023 3:28 AM, Stanislaw Gruszka wrote:

On Fri, Sep 01, 2023 at 10:12:36AM -0600, Jeffrey Hugo wrote:

From: Pranjal Ramajor Asha Kanojiya 

Since drm_dev_alloc() is deprecated it is recommended to use
devm_drm_dev_alloc() instead. Update the driver to start using
devm_drm_dev_alloc().

Signed-off-by: Pranjal Ramajor Asha Kanojiya 
Reviewed-by: Carl Vanderlip 
Reviewed-by: Jeffrey Hugo 
Signed-off-by: Jeffrey Hugo 
+   /*
+* drm_dev_unregister() sets the driver data to NULL and
+* drm_dev_register() does not update the driver data. During a SOC
+* reset drm dev is unregistered and registered again leaving the
+* driver data to NULL.
+*/
+   dev_set_drvdata(to_accel_kdev(qddev), drm->accel);


Yeah, explicitly nullified in drm_minor_unregister() with ' /* safety belt */
comment. I think in long term goal would be device reset not require
unregister/register.


Having a look at that.  It does tweak some of the semantics.  Would be 
nice on the driver side though.


-Jeff


Re: [PATCH v2 1/2] dt-bindings: backlight: Add MPS MP3309C

2023-09-15 Thread Rob Herring


On Fri, 15 Sep 2023 16:05:15 +0200, Flavio Suligoi wrote:
> The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
> programmable switching frequency to optimize efficiency.
> The brightness can be controlled either by I2C commands (called "analog"
> mode) or by a PWM input signal (PWM mode).
> This driver supports both modes.
> 
> For device driver details, please refer to:
> - drivers/video/backlight/mp3309c_bl.c
> 
> The datasheet is available at:
> - https://www.monolithicpower.com/en/mp3309c.html
> 
> Signed-off-by: Flavio Suligoi 
> ---
> 
> v2:
>  - remove useless properties (dimming-mode, pinctrl-names, pinctrl-0,
>switch-on-delay-ms, switch-off-delay-ms, reset-gpios, reset-on-delay-ms,
>reset-on-length-ms)
>  - add common.yaml#
>  - remove already included properties (default-brightness, max-brightness)
>  - substitute three boolean properties, used for the overvoltage-protection
>values, with a single enum property
>  - remove some conditional definitions
>  - remove the 2nd example
> v1:
>  - first version
> 
>  .../bindings/leds/backlight/mps,mp3309c.yaml  | 73 +++
>  1 file changed, 73 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.example.dtb: 
/example-0/i2c/backlight@17: failed to match any schema with compatible: 
['mps,mp3309c-backlight']

doc reference errors (make refcheckdocs):

See 
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230915140516.1294925-1-f.suli...@asem.it

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.



Re: [PATCH] accel/qaic: Register for PCI driver at the beginning of module init

2023-09-15 Thread Jeffrey Hugo

On 9/1/2023 10:10 AM, Jeffrey Hugo wrote:

From: Pranjal Ramajor Asha Kanojiya 

As qaic drivers base device is connected to host via PCI framework, it
makes sense to register in PCI framework at the beginning of module
init.

Signed-off-by: Pranjal Ramajor Asha Kanojiya 
Reviewed-by: Carl Vanderlip 
Reviewed-by: Jeffrey Hugo 
Signed-off-by: Jeffrey Hugo 


Pushed to drm-misc-next.

-Jeff


Re: [PATCH] drm/amd/display: Remove unwanted drm edid references

2023-09-15 Thread Jani Nikula
On Fri, 15 Sep 2023, Harry Wentland  wrote:
> On 2023-09-05 13:13, Alex Hung wrote:
>> [WHY]
>> edid_override and drm_edid_override_connector_update, according to drm
>> documentation, should not be referred outside drm_edid.
>> 
>> [HOW]
>> Remove and replace them accordingly.
>> 
>> Signed-off-by: Alex Hung 
>> ---
>>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 ++-
>>  1 file changed, 2 insertions(+), 21 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> index 1bb1a394f55f..f6a255773242 100644
>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> @@ -6372,15 +6372,12 @@ amdgpu_dm_connector_late_register(struct 
>> drm_connector *connector)
>>  static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector)
>>  {
>>  struct amdgpu_dm_connector *aconnector = 
>> to_amdgpu_dm_connector(connector);
>> +struct amdgpu_connector *amdgpu_connector = 
>> to_amdgpu_connector(connector);
>>  struct dc_link *dc_link = aconnector->dc_link;
>>  struct dc_sink *dc_em_sink = aconnector->dc_em_sink;
>>  struct edid *edid;
>>  
>> -if (!connector->edid_override)
>> -return;
>> -
>> -drm_edid_override_connector_update(&aconnector->base);
>> -edid = aconnector->base.edid_blob_ptr->data;
>> +edid = drm_get_edid(connector, &amdgpu_connector->ddc_bus->aux.ddc);
>
> Looks like we only call this in the case where a connector is forced, so
> drm_get_edid will never try to read the edid from the ddc but always gives
> us the override_edid. Please spell that out in the commit description so
> anyone else looking at the patch doesn't have to trace it themselves.

Connector forcing is only about forcing the connector status. The probe
helper will call ->force instead of ->detect.

But this has nothing to do with override_edid. That's completely
orthogonal.

Here, you can call drm_get_edid() if you like. Connector forcing just
bypasses the DDC probe for determining connector status. If connector is
forced off, you won't get the EDID, regardless of override/firmware
EDID, but if it's forced on, the EDID read proceeds.

And the EDID read has the priority order 1) override EDID if set via
edid_override debugfs, 2) firmware EDID if set via edid_firmware module
parameter, and 3) regular DDC read.

BR,
Jani.

>
>>  aconnector->edid = edid;
>>  
>>  /* Update emulated (virtual) sink's EDID */
>> @@ -6421,22 +6418,6 @@ static void create_eml_sink(struct 
>> amdgpu_dm_connector *aconnector)
>>  };
>>  struct edid *edid;
>>  
>> -if (!aconnector->base.edid_blob_ptr) {
>
> Can edid_blob_ptr never be NULL?
>
> Harry
>
>> -/* if connector->edid_override valid, pass
>> - * it to edid_override to edid_blob_ptr
>> - */
>> -
>> -drm_edid_override_connector_update(&aconnector->base);
>> -
>> -if (!aconnector->base.edid_blob_ptr) {
>> -DRM_ERROR("No EDID firmware found on connector: %s 
>> ,forcing to OFF!\n",
>> -aconnector->base.name);
>> -
>> -aconnector->base.force = DRM_FORCE_OFF;
>> -return;
>> -}
>> -}
>> -
>>  edid = (struct edid *) aconnector->base.edid_blob_ptr->data;
>>  
>>  aconnector->edid = edid;
>

-- 
Jani Nikula, Intel


Re: [PATCH v11] drm: Add initial ci/ subdirectory

2023-09-15 Thread Daniel Stone
Hey,

On Thu, 14 Sept 2023 at 10:54, Maxime Ripard  wrote:
> On Tue, Sep 12, 2023 at 02:16:41PM +0100, Daniel Stone wrote:
> > Hopefully less mangled formatting this time: turns out Thunderbird +
> > plain text is utterly unreadable, so that's one less MUA that is
> > actually usable to send email to kernel lists without getting shouted
> > at.
>
> Sorry if it felt that way, it definitely wasn't my intention to shout at
> you. Email is indeed kind of a pain to deal with, and I wanted to keep
> the discussion going.

My bad - I didn't mean you _at all_. I was thinking of other, much
less pleasant, kernel maintainers, and the ongoing struggle of
attempting to actually send well-formatted email to kernel lists in
2023.

> > I don't quite see the same picture from your side though. For example,
> > my reading of what you've said is that flaky tests are utterly
> > unacceptable, as are partial runs, and we shouldn't pretend otherwise.
> > With your concrete example (which is really helpful, so thanks), what
> > happens to the MT8173 hdmi-inject test? Do we skip all MT8173 testing
> > until it's perfect, or does MT8173 testing always fail because that
> > test does?
>
> It's not clear to me why that test is even running in the first place?
> There's been some confusion on my side here about what we're going to
> test with this. You've mentioned Mesa and GPUs before, but that's a KMS
> test so there must be more to it.
>
> Either way, it's a relevant test so I guess why not. It turns out that
> the test is indeed flaky, I guess we could add it to the flaky tests
> list.
>
> BUT
>
> I want to have every opportunity to fix whatever that failure is.

Agreed so far!

> So:
>
>   - Is the test broken? If so, we should report it to IGT dev and remove
> it from the test suite.
>   - If not, is that test failure have been reported to the driver author?
>   - If no answer/fix, we can add it to the flaky tests list, but do we
> have some way to reproduce the test failure?
>
> The last part is especially critical. Looking at the list itself, I have
> no idea what board, kernel version, configuration, or what the failure
> rate was. Assuming I spend some time looking at the infra to find the
> board and configuration, how many times do I have to run the tests to
> expect to reproduce the failure (and thus consider it fixed if it
> doesn't occur anymore).
>
> Like, with that board and test, if my first 100 runs of the test work
> fine, is it reasonable for me to consider it fixed, or is it only
> supposed to happen once every 1000 runs?
>
> So, ideally, having some (mandatory) metadata in the test lists with a
> link to the bug report, the board (DT name?) it happened with, the
> version and configuration it was first seen with, and an approximation
> of the failure rate for every flaky test list.
>
> I understand that it's probably difficult to get that after the fact on
> the tests that were already merged, but I'd really like to get that
> enforced for every new test going forward.
>
> That should hopefully get us in a much better position to fix some of
> those tests issues. And failing that, I can't see how that's
> sustainable.

OK yeah, and we're still agreed here. That is definitely the standard
we should be aiming for.  It is there for some - see
drivers/gpu/drm/ci/xfails/rockchip-rk3288-skips.txt, but should be
there for the rest, it's true. (The specific board/DT it was observed
on can be easily retconned because we only run on one specific board
type per driver, again to make things more predictable; we could go
back and retrospectively add those in a header comment?)

For flakes, it can be hard to pin them down, because, well, they're
flaky. Usually when we add things in Mesa (sorry to keep coming back
to Mesa - it's not to say that it's the objective best thing that
everything should follow, only that it's the thing we have the most
experience with that we know works well), we do a manual bisect and
try to pin the blame on a specific merge request which looks like the
most likely culprit. If nothing obvious jumps out, we just note when
it was first observed and provide some sample job logs. But yeah, it
should be more verbose.

FWIW, the reason it wasn't done here - not to say that it shouldn't
have been done better, but here we are - is that we just hammered a
load of test runs, vacuumed up the results with a script, and that's
what generated those files. Given the number of tests and devices, it
was hard to narrow each down individually, but yeah, it is something
which really wants further analysis and drilling into. It's a good
to-do, and I agree it should be the standard going forward.

> And Mesa does show what I'm talking about:
>
> $ find -name *-flakes.txt | xargs git diff --stat  
> e58a10af640ba58b6001f5c5ad750b782547da76
> [...]
>
> In the history of Mesa, there's never been a single test removed from a
> flaky test list.

As Rob says, that's definitely wrong. But there is a good point in
ther

Re: [PATCH] drm/tests: Fix incorrect argument in drm_test_mm_insert_range

2023-09-15 Thread Maira Canal

On 9/15/23 11:17, Janusz Krzysztofik wrote:

Hi Maíra,

Thanks for review.

On Friday, 15 September 2023 16:01:31 CEST Maira Canal wrote:

Hi,

On 9/11/23 10:03, Janusz Krzysztofik wrote:

While drm_mm test was converted form igt selftest to kunit, unexpected
value of "end" argument equal "start" was introduced to one of calls to a
function that executes the drm_test_mm_insert_range for specific start/end
pair of arguments.  As a consequence, DRM_MM_BUG_ON(end <= start) is
triggered.  Fix it by restoring the original value.

Fixes: fc8d29e298cf ("drm: selftest: convert drm_mm selftest to KUnit")
Signed-off-by: Janusz Krzysztofik 


Reviewed-by: Maíra Canal 

Do you need me to push it to drm-misc-fixes?


Yes, please do if you can.


Pushed to drm-misc/drm-misc-fixes. Thanks!

Best Regards,
- Maíra



Thanks,
Janusz



Best Regards,
- Maíra


Cc: "Maíra Canal" 
Cc: Arthur Grillo 
Cc: Javier Martinez Canillas 
Cc: Daniel Latypov 
Cc: sta...@vger.kernel.org # v6.1+
---
   drivers/gpu/drm/tests/drm_mm_test.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tests/drm_mm_test.c 
b/drivers/gpu/drm/tests/drm_mm_test.c
index 186b28dc70380..05d5e7af6d250 100644
--- a/drivers/gpu/drm/tests/drm_mm_test.c
+++ b/drivers/gpu/drm/tests/drm_mm_test.c
@@ -939,7 +939,7 @@ static void drm_test_mm_insert_range(struct kunit *test)
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size, 0, max - 1));
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size, 0, max / 2));
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size,
-   max / 2, 
max / 2));
+   max / 2, 
max));
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size,
max / 4 + 
1, 3 * max / 4 - 1));
   









Re: [PATCH] drm/tests: Fix incorrect argument in drm_test_mm_insert_range

2023-09-15 Thread Janusz Krzysztofik
Hi Maíra,

Thanks for review.

On Friday, 15 September 2023 16:01:31 CEST Maira Canal wrote:
> Hi,
> 
> On 9/11/23 10:03, Janusz Krzysztofik wrote:
> > While drm_mm test was converted form igt selftest to kunit, unexpected
> > value of "end" argument equal "start" was introduced to one of calls to a
> > function that executes the drm_test_mm_insert_range for specific start/end
> > pair of arguments.  As a consequence, DRM_MM_BUG_ON(end <= start) is
> > triggered.  Fix it by restoring the original value.
> > 
> > Fixes: fc8d29e298cf ("drm: selftest: convert drm_mm selftest to KUnit")
> > Signed-off-by: Janusz Krzysztofik 
> 
> Reviewed-by: Maíra Canal 
> 
> Do you need me to push it to drm-misc-fixes?

Yes, please do if you can.

Thanks,
Janusz

> 
> Best Regards,
> - Maíra
> 
> > Cc: "Maíra Canal" 
> > Cc: Arthur Grillo 
> > Cc: Javier Martinez Canillas 
> > Cc: Daniel Latypov 
> > Cc: sta...@vger.kernel.org # v6.1+
> > ---
> >   drivers/gpu/drm/tests/drm_mm_test.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/tests/drm_mm_test.c 
> > b/drivers/gpu/drm/tests/drm_mm_test.c
> > index 186b28dc70380..05d5e7af6d250 100644
> > --- a/drivers/gpu/drm/tests/drm_mm_test.c
> > +++ b/drivers/gpu/drm/tests/drm_mm_test.c
> > @@ -939,7 +939,7 @@ static void drm_test_mm_insert_range(struct kunit *test)
> > KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
> > count, size, 0, max - 1));
> > KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
> > count, size, 0, max / 2));
> > KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
> > count, size,
> > -   max / 2, 
> > max / 2));
> > +   max / 2, 
> > max));
> > KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
> > count, size,
> > max / 4 + 
> > 1, 3 * max / 4 - 1));
> >   
> 






Re: [RFT PATCH 2/6] drm: Call drm_atomic_helper_shutdown() at shutdown time for misc drivers

2023-09-15 Thread suijingfeng

Hi,


On 2023/9/15 21:44, Doug Anderson wrote:

Hi,

On Fri, Sep 15, 2023 at 2:11 AM suijingfeng  wrote:

Hi,


On 2023/9/2 07:39, Douglas Anderson wrote:

Based on grepping through the source code these drivers appear to be
missing a call to drm_atomic_helper_shutdown() at system shutdown
time. Among other things, this means that if a panel is in use that it
won't be cleanly powered off at system shutdown time.

The fact that we should call drm_atomic_helper_shutdown() in the case
of OS shutdown/restart comes straight out of the kernel doc "driver
instance overview" in drm_drv.c.

All of the drivers in this patch were fairly straightforward to fix
since they already had a call to drm_atomic_helper_shutdown() at
remove/unbind time but were just lacking one at system shutdown. The
only hitch is that some of these drivers use the component model to
register/unregister their DRM devices. The shutdown callback is part
of the original device. The typical solution here, based on how other
DRM drivers do this, is to keep track of whether the device is bound
based on drvdata. In most cases the drvdata is the drm_device, so we
can just make sure it is NULL when the device is not bound. In some
drivers, this required minor code changes. To make things simpler,
drm_atomic_helper_shutdown() has been modified to consider a NULL
drm_device as a noop in the patch ("drm/atomic-helper:
drm_atomic_helper_shutdown(NULL) should be a noop").

Suggested-by: Maxime Ripard 
Signed-off-by: Douglas Anderson 
---


I have just tested the whole series, thanks for the patch. For drm/loongson 
only:


Reviewed-by: Sui Jingfeng 
Tested-by: Sui Jingfeng 

Thanks!



By the way, I add 'pr_info("lsdc_pci_shutdown\n");' into the 
lsdc_pci_shutdown() function,
And seeing that lsdc_pci_shutdown() will be called when reboot and shutdown the 
machine.
I did not witness something weird happen at present. As you have said, this is 
useful for
drm panels drivers. But for the rest(drm/hibmc, drm/ast, drm/mgag200 and 
drm/loongson etc)
drivers, you didn't mention what's the benefit for those drivers.

I didn't mention it because I have no idea! I presume that for
non-drm_panel use cases it's not a huge deal, otherwise it wouldn't
have been missing from so many drivers. Thus, my "one sentence" reason
for the non-drm_panel case is just "we should do this because the
documentation of the API says we should", which is already in the
commit message. ;-)



OK, this sound fine.


If you have a specific other benefit you'd like me to list then I'm happy to.


You should think about the answer of this question yourself.
But I will not object if you can't find one. OK. :-)




Probably, you can
mention it with at least one sentence at the next version. I also prefer to 
alter the
lsdc_pci_shutdown() function as the following pattern:


static void lsdc_pci_shutdown(struct pci_dev *pdev)
{

  struct drm_device *ddev = pci_get_drvdata(pdev);

  drm_atomic_helper_shutdown(ddev);
}

I was hoping to land this patch without spinning it unless there's a
good reason. How strongly do you feel about needing to change the
above?



Not very strong, this version looks just fine.
I will not object if you keep it as is.
But I will also hear what the others reviewers say.
Thanks for the patch.



-Doug




Re: [PATCH] drm/tests: Fix incorrect argument in drm_test_mm_insert_range

2023-09-15 Thread Maira Canal

Hi,

On 9/11/23 10:03, Janusz Krzysztofik wrote:

While drm_mm test was converted form igt selftest to kunit, unexpected
value of "end" argument equal "start" was introduced to one of calls to a
function that executes the drm_test_mm_insert_range for specific start/end
pair of arguments.  As a consequence, DRM_MM_BUG_ON(end <= start) is
triggered.  Fix it by restoring the original value.

Fixes: fc8d29e298cf ("drm: selftest: convert drm_mm selftest to KUnit")
Signed-off-by: Janusz Krzysztofik 


Reviewed-by: Maíra Canal 

Do you need me to push it to drm-misc-fixes?

Best Regards,
- Maíra


Cc: "Maíra Canal" 
Cc: Arthur Grillo 
Cc: Javier Martinez Canillas 
Cc: Daniel Latypov 
Cc: sta...@vger.kernel.org # v6.1+
---
  drivers/gpu/drm/tests/drm_mm_test.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tests/drm_mm_test.c 
b/drivers/gpu/drm/tests/drm_mm_test.c
index 186b28dc70380..05d5e7af6d250 100644
--- a/drivers/gpu/drm/tests/drm_mm_test.c
+++ b/drivers/gpu/drm/tests/drm_mm_test.c
@@ -939,7 +939,7 @@ static void drm_test_mm_insert_range(struct kunit *test)
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size, 0, max - 1));
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size, 0, max / 2));
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size,
-   max / 2, 
max / 2));
+   max / 2, 
max));
KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, 
count, size,
max / 4 + 
1, 3 * max / 4 - 1));
  


Re: [PATCH] drm/amd/display: Remove unwanted drm edid references

2023-09-15 Thread Harry Wentland



On 2023-09-05 13:13, Alex Hung wrote:
> [WHY]
> edid_override and drm_edid_override_connector_update, according to drm
> documentation, should not be referred outside drm_edid.
> 
> [HOW]
> Remove and replace them accordingly.
> 
> Signed-off-by: Alex Hung 
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 ++-
>  1 file changed, 2 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 1bb1a394f55f..f6a255773242 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -6372,15 +6372,12 @@ amdgpu_dm_connector_late_register(struct 
> drm_connector *connector)
>  static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector)
>  {
>   struct amdgpu_dm_connector *aconnector = 
> to_amdgpu_dm_connector(connector);
> + struct amdgpu_connector *amdgpu_connector = 
> to_amdgpu_connector(connector);
>   struct dc_link *dc_link = aconnector->dc_link;
>   struct dc_sink *dc_em_sink = aconnector->dc_em_sink;
>   struct edid *edid;
>  
> - if (!connector->edid_override)
> - return;
> -
> - drm_edid_override_connector_update(&aconnector->base);
> - edid = aconnector->base.edid_blob_ptr->data;
> + edid = drm_get_edid(connector, &amdgpu_connector->ddc_bus->aux.ddc);

Looks like we only call this in the case where a connector is forced, so
drm_get_edid will never try to read the edid from the ddc but always gives
us the override_edid. Please spell that out in the commit description so
anyone else looking at the patch doesn't have to trace it themselves.

>   aconnector->edid = edid;
>  
>   /* Update emulated (virtual) sink's EDID */
> @@ -6421,22 +6418,6 @@ static void create_eml_sink(struct amdgpu_dm_connector 
> *aconnector)
>   };
>   struct edid *edid;
>  
> - if (!aconnector->base.edid_blob_ptr) {

Can edid_blob_ptr never be NULL?

Harry

> - /* if connector->edid_override valid, pass
> -  * it to edid_override to edid_blob_ptr
> -  */
> -
> - drm_edid_override_connector_update(&aconnector->base);
> -
> - if (!aconnector->base.edid_blob_ptr) {
> - DRM_ERROR("No EDID firmware found on connector: %s 
> ,forcing to OFF!\n",
> - aconnector->base.name);
> -
> - aconnector->base.force = DRM_FORCE_OFF;
> - return;
> - }
> - }
> -
>   edid = (struct edid *) aconnector->base.edid_blob_ptr->data;
>  
>   aconnector->edid = edid;



Re: [RFT PATCH 2/6] drm: Call drm_atomic_helper_shutdown() at shutdown time for misc drivers

2023-09-15 Thread Doug Anderson
Hi,

On Fri, Sep 15, 2023 at 2:11 AM suijingfeng  wrote:
>
> Hi,
>
>
> On 2023/9/2 07:39, Douglas Anderson wrote:
> > Based on grepping through the source code these drivers appear to be
> > missing a call to drm_atomic_helper_shutdown() at system shutdown
> > time. Among other things, this means that if a panel is in use that it
> > won't be cleanly powered off at system shutdown time.
> >
> > The fact that we should call drm_atomic_helper_shutdown() in the case
> > of OS shutdown/restart comes straight out of the kernel doc "driver
> > instance overview" in drm_drv.c.
> >
> > All of the drivers in this patch were fairly straightforward to fix
> > since they already had a call to drm_atomic_helper_shutdown() at
> > remove/unbind time but were just lacking one at system shutdown. The
> > only hitch is that some of these drivers use the component model to
> > register/unregister their DRM devices. The shutdown callback is part
> > of the original device. The typical solution here, based on how other
> > DRM drivers do this, is to keep track of whether the device is bound
> > based on drvdata. In most cases the drvdata is the drm_device, so we
> > can just make sure it is NULL when the device is not bound. In some
> > drivers, this required minor code changes. To make things simpler,
> > drm_atomic_helper_shutdown() has been modified to consider a NULL
> > drm_device as a noop in the patch ("drm/atomic-helper:
> > drm_atomic_helper_shutdown(NULL) should be a noop").
> >
> > Suggested-by: Maxime Ripard 
> > Signed-off-by: Douglas Anderson 
> > ---
>
>
> I have just tested the whole series, thanks for the patch. For drm/loongson 
> only:
>
>
> Reviewed-by: Sui Jingfeng 
> Tested-by: Sui Jingfeng 

Thanks!


> By the way, I add 'pr_info("lsdc_pci_shutdown\n");' into the 
> lsdc_pci_shutdown() function,
> And seeing that lsdc_pci_shutdown() will be called when reboot and shutdown 
> the machine.
> I did not witness something weird happen at present. As you have said, this 
> is useful for
> drm panels drivers. But for the rest(drm/hibmc, drm/ast, drm/mgag200 and 
> drm/loongson etc)
> drivers, you didn't mention what's the benefit for those drivers.

I didn't mention it because I have no idea! I presume that for
non-drm_panel use cases it's not a huge deal, otherwise it wouldn't
have been missing from so many drivers. Thus, my "one sentence" reason
for the non-drm_panel case is just "we should do this because the
documentation of the API says we should", which is already in the
commit message. ;-)

If you have a specific other benefit you'd like me to list then I'm happy to.


> Probably, you can
> mention it with at least one sentence at the next version. I also prefer to 
> alter the
> lsdc_pci_shutdown() function as the following pattern:
>
>
> static void lsdc_pci_shutdown(struct pci_dev *pdev)
> {
>
>  struct drm_device *ddev = pci_get_drvdata(pdev);
>
>  drm_atomic_helper_shutdown(ddev);
> }

I was hoping to land this patch without spinning it unless there's a
good reason. How strongly do you feel about needing to change the
above? I will note that I coded it the way I did specifically to try
to follow the style in the documentation in "drm_drv.c". In the
example "driver_shutdown()" function you can see that they combined it
into one line and so I followed that style. ;-) That being said, I
have no problem changing this if I spin the patch.

-Doug



Re: [PATCH] drm/msm/dsi: fix irq_of_parse_and_map() error checking

2023-09-15 Thread Konrad Dybcio
On 15.09.2023 14:59, Dan Carpenter wrote:
> The irq_of_parse_and_map() function returns zero on error.  It
> never returns negative error codes.  Fix the check.
> 
> Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
> Signed-off-by: Dan Carpenter 
> ---
Reviewed-by: Konrad Dybcio 

Nice catch!

Konrad


[PATCH] drm/msm/dsi: fix irq_of_parse_and_map() error checking

2023-09-15 Thread Dan Carpenter
The irq_of_parse_and_map() function returns zero on error.  It
never returns negative error codes.  Fix the check.

Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
Signed-off-by: Dan Carpenter 
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 5d9ec27c89d3..13da53737a6a 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1894,10 +1894,9 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
}
 
msm_host->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
-   if (msm_host->irq < 0) {
-   ret = msm_host->irq;
-   dev_err(&pdev->dev, "failed to get irq: %d\n", ret);
-   return ret;
+   if (!msm_host->irq) {
+   dev_err(&pdev->dev, "failed to get irq\n");
+   return -EINVAL;
}
 
/* do not autoenable, will be enabled later */
-- 
2.39.2



[PATCH] nouveau/u_memcpya: fix NULL vs error pointer bug

2023-09-15 Thread Dan Carpenter
The u_memcpya() function is supposed to return error pointers on
error.  Returning NULL will lead to an Oops.

Fixes: 68132cc6d1bc ("nouveau/u_memcpya: use vmemdup_user")
Signed-off-by: Dan Carpenter 
---
 drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h 
b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 3666a7403e47..52a708a98915 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -193,7 +193,7 @@ u_memcpya(uint64_t user, unsigned int nmemb, unsigned int 
size)
size_t bytes;
 
if (unlikely(check_mul_overflow(nmemb, size, &bytes)))
-   return NULL;
+   return ERR_PTR(-ENOMEM);
return vmemdup_user(userptr, bytes);
 }
 
-- 
2.39.2



Re: [RFC PATCH v1 12/12] usb: typec: qcom: define the bridge's path

2023-09-15 Thread Heikki Krogerus
Hi Dmitry,

On Mon, Sep 04, 2023 at 12:41:50AM +0300, Dmitry Baryshkov wrote:
> In order to notify the userspace about the DRM connector's USB-C port,
> export the corresponding port's name as the bridge's path field.
> 
> Signed-off-by: Dmitry Baryshkov 
> ---
>  drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c | 11 +++
>  drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_drm.c |  4 +++-
>  drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_drm.h |  6 --
>  3 files changed, 14 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c 
> b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c
> index b9d4856101c7..452dc6437861 100644
> --- a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c
> +++ b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c
> @@ -156,6 +156,7 @@ static int qcom_pmic_typec_probe(struct platform_device 
> *pdev)
>   struct device_node *np = dev->of_node;
>   const struct pmic_typec_resources *res;
>   struct regmap *regmap;
> + char *tcpm_name;
>   u32 base[2];
>   int ret;
>  
> @@ -211,10 +212,6 @@ static int qcom_pmic_typec_probe(struct platform_device 
> *pdev)
>   mutex_init(&tcpm->lock);
>   platform_set_drvdata(pdev, tcpm);
>  
> - tcpm->pmic_typec_drm = qcom_pmic_typec_init_drm(dev);
> - if (IS_ERR(tcpm->pmic_typec_drm))
> - return PTR_ERR(tcpm->pmic_typec_drm);
> -
>   tcpm->tcpc.fwnode = device_get_named_child_node(tcpm->dev, "connector");
>   if (!tcpm->tcpc.fwnode)
>   return -EINVAL;
> @@ -225,6 +222,12 @@ static int qcom_pmic_typec_probe(struct platform_device 
> *pdev)
>   goto fwnode_remove;
>   }
>  
> + tcpm_name = tcpm_port_get_name(tcpm->tcpm_port);
> + tcpm->pmic_typec_drm = qcom_pmic_typec_init_drm(dev, tcpm_name);

So I got some questions and concerns off-list. This was one of the
concerns. That tcpm_name is now the actual port device name, so I'm
afraid this is not acceptable.

You can't use device name as a reference, ever. There is no way to
guarantee that a device with a specific name is what you meant it to
be by the time it's accessed.

If you need to deal with a device, then you have to get an actual
reference to it (class_find_device_by_fwnode() should work in this
case).

Ideally you would get the reference in the place where you actually
use it (so drm_connector.c or more likely drm_sysfs.c) but that would
mean a dependency on typec in there, if the component framework or
something like that (device links?) is not an option. You could of
course try to confine the dependency somehow. drm_class does not have
implementation for dev_uevent, so you could take over that as a
temporary solution.

The only way to avoid the dependency completely would be to pass that
device reference from here through your drm bridge chain somehow.
But that's also really fragile. But it could be acceptable as a
temporary solution perhaps, if it's even possible.

Br,

-- 
heikki


[PATCH v2 03/10] drm/amdgpu: Use RMW accessors for changing LNKCTL2

2023-09-15 Thread Ilpo Järvinen
Don't assume that only the driver would be accessing LNKCTL2. In the
case of upstream (parent), the driver does not even own the device it's
changing the registers for.

Use RMW capability accessors which do proper locking to avoid losing
concurrent updates to the register value. This change is also useful as
a cleanup.

Suggested-by: Lukas Wunner 
Signed-off-by: Ilpo Järvinen 
---
 drivers/gpu/drm/amd/amdgpu/cik.c | 41 
 drivers/gpu/drm/amd/amdgpu/si.c  | 41 
 2 files changed, 30 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index e63abdf52b6c..7bcd41996927 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1638,28 +1638,18 @@ static void cik_pcie_gen3_enable(struct amdgpu_device 
*adev)
   
PCI_EXP_LNKCTL_HAWD);
 
/* linkctl2 */
-   pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
- &tmp16);
-   tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN);
-   tmp16 |= (bridge_cfg2 &
- (PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN));
-   pcie_capability_write_word(root,
-  PCI_EXP_LNKCTL2,
-  tmp16);
-
-   pcie_capability_read_word(adev->pdev,
- PCI_EXP_LNKCTL2,
- &tmp16);
-   tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN);
-   tmp16 |= (gpu_cfg2 &
- (PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN));
-   pcie_capability_write_word(adev->pdev,
-  PCI_EXP_LNKCTL2,
-  tmp16);
+   pcie_capability_clear_and_set_word(root, 
PCI_EXP_LNKCTL2,
+  
PCI_EXP_LNKCTL2_ENTER_COMP |
+  
PCI_EXP_LNKCTL2_TX_MARGIN,
+  bridge_cfg2 &
+  
(PCI_EXP_LNKCTL2_ENTER_COMP |
+   
PCI_EXP_LNKCTL2_TX_MARGIN));
+   pcie_capability_clear_and_set_word(adev->pdev, 
PCI_EXP_LNKCTL2,
+  
PCI_EXP_LNKCTL2_ENTER_COMP |
+  
PCI_EXP_LNKCTL2_TX_MARGIN,
+  gpu_cfg2 &
+  
(PCI_EXP_LNKCTL2_ENTER_COMP |
+   
PCI_EXP_LNKCTL2_TX_MARGIN));
 
tmp = RREG32_PCIE(ixPCIE_LC_CNTL4);
tmp &= ~PCIE_LC_CNTL4__LC_SET_QUIESCE_MASK;
@@ -1674,16 +1664,15 @@ static void cik_pcie_gen3_enable(struct amdgpu_device 
*adev)
speed_cntl &= ~PCIE_LC_SPEED_CNTL__LC_FORCE_DIS_SW_SPEED_CHANGE_MASK;
WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
 
-   pcie_capability_read_word(adev->pdev, PCI_EXP_LNKCTL2, &tmp16);
-   tmp16 &= ~PCI_EXP_LNKCTL2_TLS;
-
+   tmp16 = 0;
if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)
tmp16 |= PCI_EXP_LNKCTL2_TLS_8_0GT; /* gen3 */
else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2)
tmp16 |= PCI_EXP_LNKCTL2_TLS_5_0GT; /* gen2 */
else
tmp16 |= PCI_EXP_LNKCTL2_TLS_2_5GT; /* gen1 */
-   pcie_capability_write_word(adev->pdev, PCI_EXP_LNKCTL2, tmp16);
+   pcie_capability_clear_and_set_word(adev->pdev, PCI_EXP_LNKCTL2,
+  PCI_EXP_LNKCTL2_TLS, tmp16);
 
speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL);
speed_cntl |= PCIE_LC_SPEED_CNTL__LC_INITIATE_LINK_SPEED_CHANGE_MASK;
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 4b81f29e5fd5..8ea60fdd1b1d 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -23

[PATCH v2 02/10] drm/radeon: Use RMW accessors for changing LNKCTL2

2023-09-15 Thread Ilpo Järvinen
Don't assume that only the driver would be accessing LNKCTL2. In the
case of upstream (parent), the driver does not even own the device it's
changing the registers for.

Use RMW capability accessors which do proper locking to avoid losing
concurrent updates to the register value. This change is also useful as
a cleanup.

Suggested-by: Lukas Wunner 
Signed-off-by: Ilpo Järvinen 
---
 drivers/gpu/drm/radeon/cik.c | 40 ++--
 drivers/gpu/drm/radeon/si.c  | 40 ++--
 2 files changed, 30 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 10be30366c2b..b5e96a8fc2c1 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -9592,28 +9592,18 @@ static void cik_pcie_gen3_enable(struct radeon_device 
*rdev)
   
PCI_EXP_LNKCTL_HAWD);
 
/* linkctl2 */
-   pcie_capability_read_word(root, PCI_EXP_LNKCTL2,
- &tmp16);
-   tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN);
-   tmp16 |= (bridge_cfg2 &
- (PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN));
-   pcie_capability_write_word(root,
-  PCI_EXP_LNKCTL2,
-  tmp16);
-
-   pcie_capability_read_word(rdev->pdev,
- PCI_EXP_LNKCTL2,
- &tmp16);
-   tmp16 &= ~(PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN);
-   tmp16 |= (gpu_cfg2 &
- (PCI_EXP_LNKCTL2_ENTER_COMP |
-  PCI_EXP_LNKCTL2_TX_MARGIN));
-   pcie_capability_write_word(rdev->pdev,
-  PCI_EXP_LNKCTL2,
-  tmp16);
+   pcie_capability_clear_and_set_word(root, 
PCI_EXP_LNKCTL2,
+  
PCI_EXP_LNKCTL2_ENTER_COMP |
+  
PCI_EXP_LNKCTL2_TX_MARGIN,
+  bridge_cfg2 |
+  
(PCI_EXP_LNKCTL2_ENTER_COMP |
+   
PCI_EXP_LNKCTL2_TX_MARGIN));
+   pcie_capability_clear_and_set_word(rdev->pdev, 
PCI_EXP_LNKCTL2,
+  
PCI_EXP_LNKCTL2_ENTER_COMP |
+  
PCI_EXP_LNKCTL2_TX_MARGIN,
+  gpu_cfg2 |
+  
(PCI_EXP_LNKCTL2_ENTER_COMP |
+   
PCI_EXP_LNKCTL2_TX_MARGIN));
 
tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);
tmp &= ~LC_SET_QUIESCE;
@@ -9627,15 +9617,15 @@ static void cik_pcie_gen3_enable(struct radeon_device 
*rdev)
speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
 
-   pcie_capability_read_word(rdev->pdev, PCI_EXP_LNKCTL2, &tmp16);
-   tmp16 &= ~PCI_EXP_LNKCTL2_TLS;
+   tmp16 = 0;
if (speed_cap == PCIE_SPEED_8_0GT)
tmp16 |= PCI_EXP_LNKCTL2_TLS_8_0GT; /* gen3 */
else if (speed_cap == PCIE_SPEED_5_0GT)
tmp16 |= PCI_EXP_LNKCTL2_TLS_5_0GT; /* gen2 */
else
tmp16 |= PCI_EXP_LNKCTL2_TLS_2_5GT; /* gen1 */
-   pcie_capability_write_word(rdev->pdev, PCI_EXP_LNKCTL2, tmp16);
+   pcie_capability_clear_and_set_word(rdev->pdev, PCI_EXP_LNKCTL2,
+  PCI_EXP_LNKCTL2_TLS, tmp16);
 
speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index a91012447b56..32871ca09a0f 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -7189,28 +7189,18 @@ static void si_pcie_gen3_enable(struct radeon_device 
*rdev)
   
PCI_EX

Re: [PATCH] MAINTAINERS: add drm_bridge_connector.[ch] files under bridge chips

2023-09-15 Thread Robert Foss
On Fri, Sep 15, 2023 at 12:31 PM Neil Armstrong
 wrote:
>
> On 14/09/2023 15:19, Jani Nikula wrote:
> > Clearly this should be under bridge chips.
> >
> > Cc: Andrzej Hajda 
> > Cc: Neil Armstrong 
> > Cc: Robert Foss 
> > Signed-off-by: Jani Nikula 
> > ---
> >   MAINTAINERS | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 354ac7ef553d..c331f2ea89d7 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -6909,7 +6909,9 @@ T:  git git://anongit.freedesktop.org/drm/drm-misc
> >   F:  Documentation/devicetree/bindings/display/bridge/
> >   F:  drivers/gpu/drm/bridge/
> >   F:  drivers/gpu/drm/drm_bridge.c
> > +F:   drivers/gpu/drm/drm_bridge_connector.c
> >   F:  include/drm/drm_bridge.h
> > +F:   include/drm/drm_bridge_connector.h
> >
> >   DRM DRIVERS FOR EXYNOS
> >   M:  Inki Dae 
>
> Acked-by: Neil Armstrong 
>

Acked-by: Robert Foss 


Re: [PATCH] drm: bridge: it66121: ->get_edid callback must not return err pointers

2023-09-15 Thread Paul Cercueil
Hi Jani,

Le jeudi 14 septembre 2023 à 16:11 +0300, Jani Nikula a écrit :
> The drm stack does not expect error valued pointers for EDID
> anywhere.
> 
> Fixes: e66856508746 ("drm: bridge: it66121: Set DDC preamble only
> once before reading EDID")
> Cc: Paul Cercueil 
> Cc: Robert Foss 
> Cc: Phong LE 
> Cc: Neil Armstrong 
> Cc: Andrzej Hajda 
> Cc: Robert Foss 
> Cc: Laurent Pinchart 
> Cc: Jonas Karlman 
> Cc: Jernej Skrabec 
> Cc:  # v6.3+
> Signed-off-by: Jani Nikula 

Applied to drm-misc-next, thanks.

Cheers,
-Paul

> 
> ---
> 
> UNTESTED
> ---
>  drivers/gpu/drm/bridge/ite-it66121.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/ite-it66121.c
> b/drivers/gpu/drm/bridge/ite-it66121.c
> index 3c9b42c9d2ee..1cf3fb1f13dc 100644
> --- a/drivers/gpu/drm/bridge/ite-it66121.c
> +++ b/drivers/gpu/drm/bridge/ite-it66121.c
> @@ -884,14 +884,14 @@ static struct edid
> *it66121_bridge_get_edid(struct drm_bridge *bridge,
> mutex_lock(&ctx->lock);
> ret = it66121_preamble_ddc(ctx);
> if (ret) {
> -   edid = ERR_PTR(ret);
> +   edid = NULL;
> goto out_unlock;
> }
>  
> ret = regmap_write(ctx->regmap, IT66121_DDC_HEADER_REG,
>    IT66121_DDC_HEADER_EDID);
> if (ret) {
> -   edid = ERR_PTR(ret);
> +   edid = NULL;
> goto out_unlock;
> }
>  



[PATCH] drm/virtio: add definition for venus capset

2023-09-15 Thread Huang Rui
This definition is used fro qemu, and qemu imports this marco in the
headers to enable venus for virtio gpu. So it should add it even kernel
doesn't use this.

Signed-off-by: Huang Rui 
---

Hi all,

We would like to add a new definition for venus capset, it will be used for
qemu. Please see details on below discussion:

https://lore.kernel.org/qemu-devel/b82982aa-5b9e-481e-9491-b9313877b...@daynix.com/

Thanks,
Ray

 include/uapi/linux/virtio_gpu.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/uapi/linux/virtio_gpu.h b/include/uapi/linux/virtio_gpu.h
index f556fde07b76..0e21f3998108 100644
--- a/include/uapi/linux/virtio_gpu.h
+++ b/include/uapi/linux/virtio_gpu.h
@@ -309,6 +309,8 @@ struct virtio_gpu_cmd_submit {
 
 #define VIRTIO_GPU_CAPSET_VIRGL 1
 #define VIRTIO_GPU_CAPSET_VIRGL2 2
+/* 3 is reserved for gfxstream */
+#define VIRTIO_GPU_CAPSET_VENUS 4
 
 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
 struct virtio_gpu_get_capset_info {
-- 
2.25.1



[PATCH v5 7/8] drm: atmel-hlcdc: add vertical and horizontal scaling support for XLCDC

2023-09-15 Thread Manikandan Muralidharan
Update the LCDC_HEOCFG30 and LCDC_HEOCFG31 registers of XLCDC IP which
supports vertical and horizontal scaling with Bilinear and Bicubic
co-efficients taps for Chroma and Luma componenets of the Pixel.

Signed-off-by: Manikandan Muralidharan 
---
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c  |  2 ++
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h  |  4 
 .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c   | 20 +++
 3 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
index 7702c2f16178..2e1b79a38ac7 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
@@ -561,6 +561,8 @@ static const struct atmel_hlcdc_layer_desc 
atmel_xlcdc_sam9x75_layers[] = {
.general_config = 12,
.csc = 16,
.scaler_config = 23,
+   .vxs_config = 30,
+   .hxs_config = 31,
},
.clut_offset = 0x1300,
},
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
index 9965c7cc5bf8..aad907ccb65a 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
@@ -198,6 +198,8 @@
  * @disc_pos: discard area position register
  * @disc_size: discard area size register
  * @csc: color space conversion register
+ * @vxs_config: vertical scalar filter taps control register
+ * @hxs_config: horizontal scalar filter taps control register
  */
 struct atmel_hlcdc_layer_cfg_layout {
int xstride[ATMEL_HLCDC_LAYER_MAX_PLANES];
@@ -217,6 +219,8 @@ struct atmel_hlcdc_layer_cfg_layout {
int disc_pos;
int disc_size;
int csc;
+   int vxs_config;
+   int hxs_config;
 };
 
 struct atmel_hlcdc_plane_state;
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
index e2a5bed86fdb..070a377ad3b8 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
@@ -958,6 +958,26 @@ void xlcdc_csc_init(struct atmel_hlcdc_plane *plane,
desc->layout.csc + i,
xlcdc_csc_coeffs[i]);
}
+
+   if (desc->layout.vxs_config && desc->layout.hxs_config) {
+   /*
+* Updating vxs.config and hxs.config fixes the
+* Green Color Issue in SAM9X7 EGT Video Player App
+*/
+   atmel_hlcdc_layer_write_cfg(&plane->layer,
+   desc->layout.vxs_config,
+   ATMEL_XLCDC_LAYER_VXSYCFG_ONE |
+   ATMEL_XLCDC_LAYER_VXSYTAP2_ENABLE |
+   ATMEL_XLCDC_LAYER_VXSCCFG_ONE |
+   ATMEL_XLCDC_LAYER_VXSCTAP2_ENABLE);
+
+   atmel_hlcdc_layer_write_cfg(&plane->layer,
+   desc->layout.hxs_config,
+   ATMEL_XLCDC_LAYER_HXSYCFG_ONE |
+   ATMEL_XLCDC_LAYER_HXSYTAP2_ENABLE |
+   ATMEL_XLCDC_LAYER_HXSCCFG_ONE |
+   ATMEL_XLCDC_LAYER_HXSCTAP2_ENABLE);
+   }
 }
 
 static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane)
-- 
2.25.1



[PATCH v5 8/8] drm: atmel-hlcdc: add support for DSI output formats

2023-09-15 Thread Manikandan Muralidharan
Add support for the following DPI mode if the encoder type
is DSI as per the XLCDC IP datasheet:
- 16BPPCFG1
- 16BPPCFG2
- 16BPPCFG3
- 18BPPCFG1
- 18BPPCFG2
- 24BPP

Signed-off-by: Manikandan Muralidharan 
[durai.manicka...@microchip.com: update output format using is_xlcdc flag]
Signed-off-by: Durai Manickam KR 
---
 .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 123 +-
 1 file changed, 88 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index b0051ec02f7f..f59eb65000da 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -295,11 +295,18 @@ static void atmel_hlcdc_crtc_atomic_enable(struct 
drm_crtc *c,
 
 }
 
-#define ATMEL_HLCDC_RGB444_OUTPUT  BIT(0)
-#define ATMEL_HLCDC_RGB565_OUTPUT  BIT(1)
-#define ATMEL_HLCDC_RGB666_OUTPUT  BIT(2)
-#define ATMEL_HLCDC_RGB888_OUTPUT  BIT(3)
-#define ATMEL_HLCDC_OUTPUT_MODE_MASK   GENMASK(3, 0)
+#define ATMEL_HLCDC_RGB444_OUTPUT  BIT(0)
+#define ATMEL_HLCDC_RGB565_OUTPUT  BIT(1)
+#define ATMEL_HLCDC_RGB666_OUTPUT  BIT(2)
+#define ATMEL_HLCDC_RGB888_OUTPUT  BIT(3)
+#define ATMEL_HLCDC_DPI_RGB565C1_OUTPUTBIT(4)
+#define ATMEL_HLCDC_DPI_RGB565C2_OUTPUTBIT(5)
+#define ATMEL_HLCDC_DPI_RGB565C3_OUTPUTBIT(6)
+#define ATMEL_HLCDC_DPI_RGB666C1_OUTPUTBIT(7)
+#define ATMEL_HLCDC_DPI_RGB666C2_OUTPUTBIT(8)
+#define ATMEL_HLCDC_DPI_RGB888_OUTPUT  BIT(9)
+#define ATMEL_HLCDC_OUTPUT_MODE_MASK   GENMASK(3, 0)
+#define ATMEL_XLCDC_OUTPUT_MODE_MASK   GENMASK(9, 0)
 
 static int atmel_hlcdc_connector_output_mode(struct drm_connector_state *state)
 {
@@ -313,53 +320,99 @@ static int atmel_hlcdc_connector_output_mode(struct 
drm_connector_state *state)
if (!encoder)
encoder = connector->encoder;
 
-   switch (atmel_hlcdc_encoder_get_bus_fmt(encoder)) {
-   case 0:
-   break;
-   case MEDIA_BUS_FMT_RGB444_1X12:
-   return ATMEL_HLCDC_RGB444_OUTPUT;
-   case MEDIA_BUS_FMT_RGB565_1X16:
-   return ATMEL_HLCDC_RGB565_OUTPUT;
-   case MEDIA_BUS_FMT_RGB666_1X18:
-   return ATMEL_HLCDC_RGB666_OUTPUT;
-   case MEDIA_BUS_FMT_RGB888_1X24:
-   return ATMEL_HLCDC_RGB888_OUTPUT;
-   default:
-   return -EINVAL;
-   }
-
-   for (j = 0; j < info->num_bus_formats; j++) {
-   switch (info->bus_formats[j]) {
-   case MEDIA_BUS_FMT_RGB444_1X12:
-   supported_fmts |= ATMEL_HLCDC_RGB444_OUTPUT;
+   if (encoder->encoder_type == DRM_MODE_ENCODER_DSI) {
+   /*
+* atmel-hlcdc to support DSI formats with DSI video pipeline
+* when DRM_MODE_ENCODER_DSI type is set by
+* connector driver component.
+*/
+   switch (atmel_hlcdc_encoder_get_bus_fmt(encoder)) {
+   case 0:
break;
case MEDIA_BUS_FMT_RGB565_1X16:
-   supported_fmts |= ATMEL_HLCDC_RGB565_OUTPUT;
-   break;
+   return ATMEL_HLCDC_DPI_RGB565C1_OUTPUT;
case MEDIA_BUS_FMT_RGB666_1X18:
-   supported_fmts |= ATMEL_HLCDC_RGB666_OUTPUT;
-   break;
+   return ATMEL_HLCDC_DPI_RGB666C1_OUTPUT;
+   case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+   return ATMEL_HLCDC_DPI_RGB666C2_OUTPUT;
case MEDIA_BUS_FMT_RGB888_1X24:
-   supported_fmts |= ATMEL_HLCDC_RGB888_OUTPUT;
-   break;
+   return ATMEL_HLCDC_DPI_RGB888_OUTPUT;
default:
+   return -EINVAL;
+   }
+
+   for (j = 0; j < info->num_bus_formats; j++) {
+   switch (info->bus_formats[j]) {
+   case MEDIA_BUS_FMT_RGB565_1X16:
+   supported_fmts |=
+   ATMEL_HLCDC_DPI_RGB565C1_OUTPUT;
+   break;
+   case MEDIA_BUS_FMT_RGB666_1X18:
+   supported_fmts |=
+   ATMEL_HLCDC_DPI_RGB666C1_OUTPUT;
+   break;
+   case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+   supported_fmts |=
+   ATMEL_HLCDC_DPI_RGB666C2_OUTPUT;
+   break;
+   case MEDIA_BUS_FMT_RGB888_1X24:
+   supported_fmts |=
+   ATMEL_HLCDC_DPI_RGB888_OUTPUT;
+   break;
+   

[PATCH v5 6/8] drm: atmel-hlcdc: add DPI mode support for XLCDC

2023-09-15 Thread Manikandan Muralidharan
Add support for Display Pixel Interface (DPI) Compatible Mode
support in atmel-hlcdc driver for XLCDC IP along with legacy
pixel mapping.DPI mode BIT is configured in LCDC_CFG5 register.

Signed-off-by: Manikandan Muralidharan 
[durai.manicka...@microchip.com: update DPI mode bit using is_xlcdc flag]
Signed-off-by: Durai Manickam KR 
---
 .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 22 ---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 1ac31c0c474a..b0051ec02f7f 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -30,10 +30,12 @@
  *
  * @base: base CRTC state
  * @output_mode: RGBXXX output mode
+ * @dpi: output DPI mode
  */
 struct atmel_hlcdc_crtc_state {
struct drm_crtc_state base;
unsigned int output_mode;
+   u8 dpi;
 };
 
 static inline struct atmel_hlcdc_crtc_state *
@@ -164,6 +166,8 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc 
*c)
 
state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
cfg = state->output_mode << 8;
+   if (is_xlcdc)
+   cfg |= state->dpi << 11;
 
if (!is_xlcdc && (adj->flags & DRM_MODE_FLAG_NVSYNC))
cfg |= ATMEL_HLCDC_VSPOL;
@@ -176,7 +180,9 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc 
*c)
   ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
   ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
   ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
-  ATMEL_HLCDC_GUARDTIME_MASK | ATMEL_HLCDC_MODE_MASK,
+  ATMEL_HLCDC_GUARDTIME_MASK |
+  (is_xlcdc ? ATMEL_XLCDC_MODE_MASK |
+  ATMEL_XLCDC_DPI : ATMEL_HLCDC_MODE_MASK),
   cfg);
 
clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
@@ -374,7 +380,15 @@ static int atmel_hlcdc_crtc_select_output_mode(struct 
drm_crtc_state *state)
 
hstate = drm_crtc_state_to_atmel_hlcdc_crtc_state(state);
hstate->output_mode = fls(output_fmts) - 1;
-
+   if (crtc->dc->desc->is_xlcdc) {
+   /* check if MIPI DPI bit needs to be set */
+   if (fls(output_fmts) > 3) {
+   hstate->output_mode -= 4;
+   hstate->dpi = 1;
+   } else {
+   hstate->dpi = 0;
+   }
+   }
return 0;
 }
 
@@ -478,7 +492,7 @@ static struct drm_crtc_state *
 atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
 {
struct atmel_hlcdc_crtc_state *state, *cur;
-
+   struct atmel_hlcdc_crtc *c = drm_crtc_to_atmel_hlcdc_crtc(crtc);
if (WARN_ON(!crtc->state))
return NULL;
 
@@ -489,6 +503,8 @@ atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
 
cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
state->output_mode = cur->output_mode;
+   if (c->dc->desc->is_xlcdc)
+   state->dpi = cur->dpi;
 
return &state->base;
 }
-- 
2.25.1



[PATCH v5 4/8] drm: atmel-hlcdc: Define SAM9X7 SoC XLCDC specific registers

2023-09-15 Thread Manikandan Muralidharan
From: Durai Manickam KR 

The register address of the XLCDC IP used in SAM9X7 SoC family
are different from the previous HLCDC.Defining those address
space with valid macros.

Signed-off-by: Durai Manickam KR 
[manikanda...@microchip.com: Remove unused macro definitions]
Signed-off-by: Manikandan Muralidharan 
---
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 42 
 include/linux/mfd/atmel-hlcdc.h  | 10 +
 2 files changed, 52 insertions(+)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
index c61fa1733da4..9965c7cc5bf8 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
@@ -15,6 +15,7 @@
 
 #include 
 
+/* LCD controller common registers */
 #define ATMEL_HLCDC_LAYER_CHER 0x0
 #define ATMEL_HLCDC_LAYER_CHDR 0x4
 #define ATMEL_HLCDC_LAYER_CHSR 0x8
@@ -128,6 +129,47 @@
 
 #define ATMEL_HLCDC_MAX_LAYERS 6
 
+/* XLCDC controller specific registers */
+#define ATMEL_XLCDC_LAYER_ENR  0x10
+#define ATMEL_XLCDC_LAYER_EN   BIT(0)
+
+#define ATMEL_XLCDC_LAYER_IER  0x0
+#define ATMEL_XLCDC_LAYER_IDR  0x4
+#define ATMEL_XLCDC_LAYER_ISR  0xc
+#define ATMEL_XLCDC_LAYER_OVR_IRQ(p)   BIT(2 + (8 * (p)))
+
+#define ATMEL_XLCDC_LAYER_PLANE_ADDR(p)(((p) * 0x4) + 0x18)
+
+#define ATMEL_XLCDC_LAYER_DMA_CFG  0
+
+#define ATMEL_XLCDC_LAYER_DMA  BIT(0)
+#define ATMEL_XLCDC_LAYER_REP  BIT(1)
+#define ATMEL_XLCDC_LAYER_DISCEN   BIT(4)
+
+#define ATMEL_XLCDC_LAYER_SFACTC_A0_MULT_AS(4 << 6)
+#define ATMEL_XLCDC_LAYER_SFACTA_ONE   BIT(9)
+#define ATMEL_XLCDC_LAYER_DFACTC_M_A0_MULT_AS  (6 << 11)
+#define ATMEL_XLCDC_LAYER_DFACTA_ONE   BIT(14)
+
+#define ATMEL_XLCDC_LAYER_A0_SHIFT 16
+#define ATMEL_XLCDC_LAYER_A0(x)\
+   ((x) << ATMEL_XLCDC_LAYER_A0_SHIFT)
+
+#define ATMEL_XLCDC_LAYER_VSCALER_LUMA_ENABLE  BIT(0)
+#define ATMEL_XLCDC_LAYER_VSCALER_CHROMA_ENABLEBIT(1)
+#define ATMEL_XLCDC_LAYER_HSCALER_LUMA_ENABLE  BIT(4)
+#define ATMEL_XLCDC_LAYER_HSCALER_CHROMA_ENABLEBIT(5)
+
+#define ATMEL_XLCDC_LAYER_VXSYCFG_ONE  BIT(0)
+#define ATMEL_XLCDC_LAYER_VXSYTAP2_ENABLE  BIT(4)
+#define ATMEL_XLCDC_LAYER_VXSCCFG_ONE  BIT(16)
+#define ATMEL_XLCDC_LAYER_VXSCTAP2_ENABLE  BIT(20)
+
+#define ATMEL_XLCDC_LAYER_HXSYCFG_ONE  BIT(0)
+#define ATMEL_XLCDC_LAYER_HXSYTAP2_ENABLE  BIT(4)
+#define ATMEL_XLCDC_LAYER_HXSCCFG_ONE  BIT(16)
+#define ATMEL_XLCDC_LAYER_HXSCTAP2_ENABLE  BIT(20)
+
 /**
  * Atmel HLCDC Layer registers layout structure
  *
diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h
index a186119a49b5..80d675a03b39 100644
--- a/include/linux/mfd/atmel-hlcdc.h
+++ b/include/linux/mfd/atmel-hlcdc.h
@@ -22,6 +22,8 @@
 #define ATMEL_HLCDC_DITHER BIT(6)
 #define ATMEL_HLCDC_DISPDLYBIT(7)
 #define ATMEL_HLCDC_MODE_MASK  GENMASK(9, 8)
+#define ATMEL_XLCDC_MODE_MASK  GENMASK(10, 8)
+#define ATMEL_XLCDC_DPIBIT(11)
 #define ATMEL_HLCDC_PP BIT(10)
 #define ATMEL_HLCDC_VSPSU  BIT(12)
 #define ATMEL_HLCDC_VSPHO  BIT(13)
@@ -34,6 +36,12 @@
 #define ATMEL_HLCDC_IDR0x30
 #define ATMEL_HLCDC_IMR0x34
 #define ATMEL_HLCDC_ISR0x38
+#define ATMEL_XLCDC_ATTRE  0x3c
+
+#define ATMEL_XLCDC_BASE_UPDATEBIT(0)
+#define ATMEL_XLCDC_OVR1_UPDATEBIT(1)
+#define ATMEL_XLCDC_OVR3_UPDATEBIT(2)
+#define ATMEL_XLCDC_HEO_UPDATE BIT(3)
 
 #define ATMEL_HLCDC_CLKPOL BIT(0)
 #define ATMEL_HLCDC_CLKSEL BIT(2)
@@ -48,6 +56,8 @@
 #define ATMEL_HLCDC_DISP   BIT(2)
 #define ATMEL_HLCDC_PWMBIT(3)
 #define ATMEL_HLCDC_SIPBIT(4)
+#define ATMEL_XLCDC_SD BIT(5)
+#define ATMEL_XLCDC_CM BIT(6)
 
 #define ATMEL_HLCDC_SOFBIT(0)
 #define ATMEL_HLCDC_SYNCDISBIT(1)
-- 
2.25.1



  1   2   >