[PATCH v2 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes
Add MTU3 nodes for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
Tested-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c0a3afd55eaf..3d88480913eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -908,6 +908,43 @@
status = "disabled";
};
+ ssusb0: usb@11201000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11201000 0 0x2dff>,
+ <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port0 PHY_TYPE_USB2>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host0: usb@1120 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1120 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
"dma_ck", "xhci_ck";
+ interrupts = ;
+ mediatek,syscon-wakeup = <&pericfg 0x420 2>;
+ wakeup-source;
+ status = "disabled";
+ };
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
@@ -939,6 +976,44 @@
status = "disabled";
};
+ ssusb1: usb@11281000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11281000 0 0x2dff>,
+ <0 0x11283e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+<&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port1 PHY_TYPE_USB2>,
+ <&u3port1 PHY_TYPE_USB3>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host1: usb@1128 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1128 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+
[PATCH v2 5/9] arm64: dts: mediatek: mt8186: Add ADSP node
Add ADSP node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a0b7dacc10cd..2700c830316f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,26 @@
interrupts = ;
};
+ adsp: adsp@1068 {
+ compatible = "mediatek,mt8186-dsp";
+ reg = <0 0x1068 0 0x2000>,
+ <0 0x1080 0 0x10>,
+ <0 0x1068b000 0 0x100>,
+ <0 0x1068f000 0 0x1000>;
+ reg-names = "cfg", "sram", "sec", "bus";
+ clocks = <&topckgen CLK_TOP_AUDIODSP>,
+<&topckgen CLK_TOP_ADSP_BUS>;
+ clock-names = "audiodsp",
+ "adsp_bus";
+ assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>,
+ <&topckgen CLK_TOP_ADSP_BUS>;
+ assigned-clock-parents = <&clk26m>, <&topckgen
CLK_TOP_MAINPLL_D2_D2>;
+ mbox-names = "rx", "tx";
+ mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>;
+ status = "disabled";
+ };
+
adsp_mailbox0: mailbox@10686000 {
compatible = "mediatek,mt8186-adsp-mbox";
#mbox-cells = <0>;
--
2.18.0
[PATCH v2 6/9] arm64: dts: mediatek: mt8186: Add audio controller node
Add audio controller node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 2700c830316f..c52f9be1e750 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -998,6 +998,68 @@
};
};
+ afe: audio-controller@1121 {
+ compatible = "mediatek,mt8186-sound";
+ reg = <0 0x1121 0 0x2000>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_AUDIO>,
+<&infracfg_ao CLK_INFRA_AO_AUDIO_26M_BCLK>,
+<&topckgen CLK_TOP_AUDIO>,
+<&topckgen CLK_TOP_AUD_INTBUS>,
+<&topckgen CLK_TOP_MAINPLL_D2_D4>,
+<&topckgen CLK_TOP_AUD_1>,
+<&apmixedsys CLK_APMIXED_APLL1>,
+<&topckgen CLK_TOP_AUD_2>,
+<&apmixedsys CLK_APMIXED_APLL2>,
+<&topckgen CLK_TOP_AUD_ENGEN1>,
+<&topckgen CLK_TOP_APLL1_D8>,
+<&topckgen CLK_TOP_AUD_ENGEN2>,
+<&topckgen CLK_TOP_APLL2_D8>,
+<&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>,
+<&topckgen CLK_TOP_APLL12_CK_DIV0>,
+<&topckgen CLK_TOP_APLL12_CK_DIV1>,
+<&topckgen CLK_TOP_APLL12_CK_DIV2>,
+<&topckgen CLK_TOP_APLL12_CK_DIV4>,
+<&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>,
+<&topckgen CLK_TOP_AUDIO_H>,
+<&clk26m>;
+ clock-names = "aud_infra_clk",
+ "mtkaif_26m_clk",
+ "top_mux_audio",
+ "top_mux_audio_int",
+ "top_mainpll_d2_d4",
+ "top_mux_aud_1",
+ "top_apll1_ck",
+ "top_mux_aud_2",
+ "top_apll2_ck",
+ "top_mux_aud_eng1",
+ "top_apll1_d8",
+ "top_mux_aud_eng2",
+ "top_apll2_d8",
+ "top_i2s0_m_sel",
+ "top_i2s1_m_sel",
+ "top_i2s2_m_sel",
+ "top_i2s4_m_sel",
+ "top_tdm_m_sel",
+ "top_apll12_div0",
+ "top_apll12_div1",
+ "top_apll12_div2",
+ "top_apll12_div4",
+ "top_apll12_div_tdm",
+ "top_mux_audio_h",
+ "top_clk26m_clk";
+ interrupts = ;
+ mediatek,apmixedsys = <&apmixedsys>;
+ mediatek,infracfg = <&infracfg_ao>;
+ mediatek,topckgen = <&topckgen>;
+ resets = <&watchdog MT8186_TOPRGU_AUDIO_SW_RST>;
+ reset-names = "audiosys";
+ status = "disabled";
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
--
2.18.0
[PATCH v2 7/9] arm64: dts: mediatek: mt8186: Add DPI node
Add DPI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
Tested-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c52f9be1e750..45b9d6777929 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1230,6 +1230,23 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ dpi: dpi@1400a000 {
+ compatible = "mediatek,mt8186-dpi";
+ reg = <0 0x1400a000 0 0x1000>;
+ clocks = <&topckgen CLK_TOP_DPI>,
+<&mmsys CLK_MM_DISP_DPI>,
+<&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
+ assigned-clocks = <&topckgen CLK_TOP_DPI>;
+ assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
+ interrupts = ;
+ status = "disabled";
+
+ port {
+ dpi_out: endpoint { };
+ };
+ };
+
dsi0: dsi@14013000 {
compatible = "mediatek,mt8186-dsi";
reg = <0 0x14013000 0 0x1000>;
--
2.18.0
[PATCH v2 4/9] arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes
Add ADSP mailbox node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a8ff984f1192..a0b7dacc10cd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,20 @@
interrupts = ;
};
+ adsp_mailbox0: mailbox@10686000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10686100 0 0x1000>;
+ interrupts = ;
+ };
+
+ adsp_mailbox1: mailbox@10687000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10687100 0 0x1000>;
+ interrupts = ;
+ };
+
nor_flash: spi@1100 {
compatible = "mediatek,mt8186-nor";
reg = <0 0x1100 0 0x1000>;
--
2.18.0
[PATCH v2 9/9] arm64: dts: mediatek: mt8186: Add display nodes
Add display nodes and GCE info for MT8186 SoC. Also, add GCE
(Global Command Engine) properties to the display nodes in order to
enable the usage of the CMDQ (Command Queue), which is required for
operating the display.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 135 +++
1 file changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 45b9d6777929..90d1b631bc8f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -5,6 +5,7 @@
*/
/dts-v1/;
#include
+#include
#include
#include
#include
@@ -19,6 +20,13 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ ovl = &ovl;
+ ovl_2l= &ovl_2l;
+ rdma0 = &rdma0;
+ rdma1 = &rdma1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -632,6 +640,15 @@
clocks = <&clk13m>;
};
+ gce: mailbox@1022c000 {
+ compatible = "mediatek,mt8186-gce";
+ reg = <0 0X1022c000 0 0x4000>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ clock-names = "gce";
+ interrupts = ;
+ #mbox-cells = <2>;
+ };
+
scp: scp@1050 {
compatible = "mediatek,mt8186-scp";
reg = <0 0x1050 0 0x4>,
@@ -1197,6 +1214,20 @@
reg = <0 0x1400 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
+ mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0
0x1000>;
+ };
+
+ mutex: mutex@14001000 {
+ compatible = "mediatek,mt8186-disp-mutex";
+ reg = <0 0x14001000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
+ interrupts = ;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401 0x1000
0x1000>;
+ mediatek,gce-events =
,
+
;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
smi_common: smi@14002000 {
@@ -1230,6 +1261,49 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ ovl: ovl@14005000 {
+ compatible = "mediatek,mt8186-disp-ovl",
+"mediatek,mt8192-disp-ovl";
+ reg = <0 0x14005000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L0_OVL_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x5000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ ovl_2l: ovl@14006000 {
+ compatible = "mediatek,mt8186-disp-ovl-2l",
+"mediatek,mt8192-disp-ovl-2l";
+ reg = <0 0x14006000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_OVL_2L_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x6000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ rdma0: rdma@14007000 {
+ compatible = "mediatek,mt8186-disp-rdma",
+"mediatek,mt8183-disp-rdma";
+ reg = <0 0x14007000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_DISP_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x7000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ color: color@14009000 {
+ compatible = "mediatek,mt8186-disp-color",
+
[PATCH v2 8/9] dt-bindings: display: mediatek: Fix the fallback for mediatek, mt8186-disp-ccorr
The mt8186-disp-ccorr is not fully compatible with the mt8183-disp-ccorr
implementation. It causes a crash when system resumes if it binds to the
device.
We should use mt8192-disp-ccorr as fallback of mt8186-disp-ccorr.
Fixes: 8a26ea19d4dc ("dt-bindings: display: mediatek: add MT8186 SoC binding")
Signed-off-by: Allen-KH Cheng
Reviewed-by: Rob Herring
---
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index 63fb02014a56..117e3db43f84 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -32,7 +32,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-ccorr
- - const: mediatek,mt8183-disp-ccorr
+ - const: mediatek,mt8192-disp-ccorr
reg:
maxItems: 1
--
2.18.0
[PATCH v2 3/9] arm64: dts: mediatek: mt8186: Add SPMI node
Add SPMI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 3d88480913eb..a8ff984f1192 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -605,6 +605,25 @@
clock-names = "spi", "wrap";
};
+ spmi: spmi@10015000 {
+ compatible = "mediatek,mt8186-spmi",
+"mediatek,mt8195-spmi";
+ reg = <0 0x10015000 0 0x000e00>,
+ <0 0x1001B000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+<&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+<&topckgen CLK_TOP_SPMI_MST>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = <&topckgen CLK_TOP_SPMI_MST>;
+ assigned-clock-parents = <&topckgen
CLK_TOP_ULPOSC1_D10>;
+ interrupts = ,
+;
+ status = "disabled";
+ };
+
systimer: timer@10017000 {
compatible = "mediatek,mt8186-timer",
"mediatek,mt6765-timer";
--
2.18.0
[PATCH v2 2/9] dt-bindings: spmi: spmi-mtk-pmif: Document mediatek, mt8195-spmi as fallback of mediatek, mt8186-spmi
The mt8186-spmi is used as compatible with mt8195-spmi on the MT8186, document this situation. Signed-off-by: Allen-KH Cheng Reviewed-by: Rob Herring --- .../devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml index abcbbe13723f..e4f465abcfe9 100644 --- a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -18,9 +18,14 @@ allOf: properties: compatible: -enum: - - mediatek,mt6873-spmi - - mediatek,mt8195-spmi +oneOf: + - enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + - items: + - enum: + - mediatek,mt8186-spmi + - const: mediatek,mt8195-spmi reg: maxItems: 2 -- 2.18.0
[PATCH v2 0/9] Add and update some driver nodes for MT8186 SoC
This series is based on matthias github, for-next. Changes since v1: - Remove the unnecessary trailing number - Add aliases for ovl* and rdma* Allen-KH Cheng (9): arm64: dts: mediatek: mt8186: Add MTU3 nodes dt-bindings: spmi: spmi-mtk-pmif: Document mediatek,mt8195-spmi as fallback of mediatek,mt8186-spmi arm64: dts: mediatek: mt8186: Add SPMI node arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes arm64: dts: mediatek: mt8186: Add ADSP node arm64: dts: mediatek: mt8186: Add audio controller node arm64: dts: mediatek: mt8186: Add DPI node dt-bindings: display: mediatek: Fix the fallback for mediatek,mt8186-disp-ccorr arm64: dts: mediatek: mt8186: Add display nodes .../display/mediatek/mediatek,ccorr.yaml | 2 +- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 +- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 342 ++ 3 files changed, 351 insertions(+), 4 deletions(-) -- 2.18.0
[PATCH 7/9] arm64: dts: mediatek: mt8186: Add DPI node
Add DPI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c52f9be1e750..eab30ab01572 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1230,6 +1230,23 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ dpi0: dpi@1400a000 {
+ compatible = "mediatek,mt8186-dpi";
+ reg = <0 0x1400a000 0 0x1000>;
+ clocks = <&topckgen CLK_TOP_DPI>,
+<&mmsys CLK_MM_DISP_DPI>,
+<&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
+ assigned-clocks = <&topckgen CLK_TOP_DPI>;
+ assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
+ interrupts = ;
+ status = "disabled";
+
+ port {
+ dpi_out: endpoint { };
+ };
+ };
+
dsi0: dsi@14013000 {
compatible = "mediatek,mt8186-dsi";
reg = <0 0x14013000 0 0x1000>;
--
2.18.0
[PATCH 5/9] arm64: dts: mediatek: mt8186: Add ADSP node
Add ADSP node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a0b7dacc10cd..2700c830316f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,26 @@
interrupts = ;
};
+ adsp: adsp@1068 {
+ compatible = "mediatek,mt8186-dsp";
+ reg = <0 0x1068 0 0x2000>,
+ <0 0x1080 0 0x10>,
+ <0 0x1068b000 0 0x100>,
+ <0 0x1068f000 0 0x1000>;
+ reg-names = "cfg", "sram", "sec", "bus";
+ clocks = <&topckgen CLK_TOP_AUDIODSP>,
+<&topckgen CLK_TOP_ADSP_BUS>;
+ clock-names = "audiodsp",
+ "adsp_bus";
+ assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>,
+ <&topckgen CLK_TOP_ADSP_BUS>;
+ assigned-clock-parents = <&clk26m>, <&topckgen
CLK_TOP_MAINPLL_D2_D2>;
+ mbox-names = "rx", "tx";
+ mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>;
+ status = "disabled";
+ };
+
adsp_mailbox0: mailbox@10686000 {
compatible = "mediatek,mt8186-adsp-mbox";
#mbox-cells = <0>;
--
2.18.0
[PATCH 8/9] dt-bindings: display: mediatek: Fix the fallback for mediatek, mt8186-disp-ccorr
The mt8186-disp-ccorr is not fully compatible with the mt8183-disp-ccorr
implementation. It causes a crash when system resumes if it binds to the
device.
We should use mt8192-disp-ccorr as fallback of mt8186-disp-ccorr.
Fixes: 8a26ea19d4dc ("dt-bindings: display: mediatek: add MT8186 SoC binding")
Signed-off-by: Allen-KH Cheng
---
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index 63fb02014a56..117e3db43f84 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -32,7 +32,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-ccorr
- - const: mediatek,mt8183-disp-ccorr
+ - const: mediatek,mt8192-disp-ccorr
reg:
maxItems: 1
--
2.18.0
[PATCH 4/9] arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes
Add ADSP mailbox node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index a8ff984f1192..a0b7dacc10cd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -640,6 +640,20 @@
interrupts = ;
};
+ adsp_mailbox0: mailbox@10686000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10686100 0 0x1000>;
+ interrupts = ;
+ };
+
+ adsp_mailbox1: mailbox@10687000 {
+ compatible = "mediatek,mt8186-adsp-mbox";
+ #mbox-cells = <0>;
+ reg = <0 0x10687100 0 0x1000>;
+ interrupts = ;
+ };
+
nor_flash: spi@1100 {
compatible = "mediatek,mt8186-nor";
reg = <0 0x1100 0 0x1000>;
--
2.18.0
[PATCH 9/9] arm64: dts: mediatek: mt8186: Add display nodes
Add display nodes and GCE info for MT8186 SoC. Also, add GCE
(Global Command Engine) properties to the display nodes in order to
enable the usage of the CMDQ (Command Queue), which is required for
operating the display.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 128 +++
1 file changed, 128 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index eab30ab01572..8670d37970ef 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -5,6 +5,7 @@
*/
/dts-v1/;
#include
+#include
#include
#include
#include
@@ -632,6 +633,15 @@
clocks = <&clk13m>;
};
+ gce: mailbox@1022c000 {
+ compatible = "mediatek,mt8186-gce";
+ reg = <0 0X1022c000 0 0x4000>;
+ interrupts = ;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ clock-names = "gce";
+ };
+
scp: scp@1050 {
compatible = "mediatek,mt8186-scp";
reg = <0 0x1050 0 0x4>,
@@ -1197,6 +1207,20 @@
reg = <0 0x1400 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
+ mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0
0x1000>;
+ };
+
+ mutex: mutex@14001000 {
+ compatible = "mediatek,mt8186-disp-mutex";
+ reg = <0 0x14001000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
+ interrupts = ;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401 0x1000
0x1000>;
+ mediatek,gce-events =
,
+
;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
smi_common: smi@14002000 {
@@ -1230,6 +1254,49 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ ovl0: ovl@14005000 {
+ compatible = "mediatek,mt8186-disp-ovl",
+"mediatek,mt8192-disp-ovl";
+ reg = <0 0x14005000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L0_OVL_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x5000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ ovl0_2l: ovl@14006000 {
+ compatible = "mediatek,mt8186-disp-ovl-2l",
+"mediatek,mt8192-disp-ovl-2l";
+ reg = <0 0x14006000 0 0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_OVL_2L_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x6000
0x1000>;
+ };
+
+ rdma0: rdma@14007000 {
+ compatible = "mediatek,mt8186-disp-rdma",
+"mediatek,mt8183-disp-rdma";
+ reg = <0 0x14007000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA0>;
+ interrupts = ;
+ iommus = <&iommu_mm IOMMU_PORT_L1_DISP_RDMA0>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x7000
0x1000>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
+ };
+
+ color0: color@14009000 {
+ compatible = "mediatek,mt8186-disp-color",
+"mediatek,mt8173-disp-color";
+ reg = <0 0x14009000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_DISP_COLOR0>;
+ interrupts = ;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400 0x8000
0x1000>;
+
[PATCH 2/9] dt-bindings: spmi: spmi-mtk-pmif: Document mediatek, mt8195-spmi as fallback of mediatek, mt8186-spmi
The mt8186-spmi is used as compatible with mt8195-spmi on the MT8186, document this situation. Signed-off-by: Allen-KH Cheng --- .../devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml index abcbbe13723f..e4f465abcfe9 100644 --- a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -18,9 +18,14 @@ allOf: properties: compatible: -enum: - - mediatek,mt6873-spmi - - mediatek,mt8195-spmi +oneOf: + - enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + - items: + - enum: + - mediatek,mt8186-spmi + - const: mediatek,mt8195-spmi reg: maxItems: 2 -- 2.18.0
[PATCH 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes
Add MTU3 nodes for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c0a3afd55eaf..3d88480913eb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -908,6 +908,43 @@
status = "disabled";
};
+ ssusb0: usb@11201000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11201000 0 0x2dff>,
+ <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port0 PHY_TYPE_USB2>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host0: usb@1120 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1120 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_REF>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+<&infracfg_ao CLK_INFRA_AO_ICUSB>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
"dma_ck", "xhci_ck";
+ interrupts = ;
+ mediatek,syscon-wakeup = <&pericfg 0x420 2>;
+ wakeup-source;
+ status = "disabled";
+ };
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
@@ -939,6 +976,44 @@
status = "disabled";
};
+ ssusb1: usb@11281000 {
+ compatible = "mediatek,mt8186-mtu3",
+"mediatek,mtu3";
+ reg = <0 0x11281000 0 0x2dff>,
+ <0 0x11283e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+<&clk26m>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ interrupts = ;
+ phys = <&u2port1 PHY_TYPE_USB2>,
+ <&u3port1 PHY_TYPE_USB3>;
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host1: usb@1128 {
+ compatible = "mediatek,mt8186-xhci",
+"mediatek,mtk-xhci";
+ reg = <0 0x1128 0 0x1000>;
+ reg-names = "mac";
+ clocks = <&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+<&infracfg_ao
CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+
[PATCH 6/9] arm64: dts: mediatek: mt8186: Add audio controller node
Add audio controller node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 2700c830316f..c52f9be1e750 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -998,6 +998,68 @@
};
};
+ afe: audio-controller@1121 {
+ compatible = "mediatek,mt8186-sound";
+ reg = <0 0x1121 0 0x2000>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_AUDIO>,
+<&infracfg_ao CLK_INFRA_AO_AUDIO_26M_BCLK>,
+<&topckgen CLK_TOP_AUDIO>,
+<&topckgen CLK_TOP_AUD_INTBUS>,
+<&topckgen CLK_TOP_MAINPLL_D2_D4>,
+<&topckgen CLK_TOP_AUD_1>,
+<&apmixedsys CLK_APMIXED_APLL1>,
+<&topckgen CLK_TOP_AUD_2>,
+<&apmixedsys CLK_APMIXED_APLL2>,
+<&topckgen CLK_TOP_AUD_ENGEN1>,
+<&topckgen CLK_TOP_APLL1_D8>,
+<&topckgen CLK_TOP_AUD_ENGEN2>,
+<&topckgen CLK_TOP_APLL2_D8>,
+<&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>,
+<&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>,
+<&topckgen CLK_TOP_APLL12_CK_DIV0>,
+<&topckgen CLK_TOP_APLL12_CK_DIV1>,
+<&topckgen CLK_TOP_APLL12_CK_DIV2>,
+<&topckgen CLK_TOP_APLL12_CK_DIV4>,
+<&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>,
+<&topckgen CLK_TOP_AUDIO_H>,
+<&clk26m>;
+ clock-names = "aud_infra_clk",
+ "mtkaif_26m_clk",
+ "top_mux_audio",
+ "top_mux_audio_int",
+ "top_mainpll_d2_d4",
+ "top_mux_aud_1",
+ "top_apll1_ck",
+ "top_mux_aud_2",
+ "top_apll2_ck",
+ "top_mux_aud_eng1",
+ "top_apll1_d8",
+ "top_mux_aud_eng2",
+ "top_apll2_d8",
+ "top_i2s0_m_sel",
+ "top_i2s1_m_sel",
+ "top_i2s2_m_sel",
+ "top_i2s4_m_sel",
+ "top_tdm_m_sel",
+ "top_apll12_div0",
+ "top_apll12_div1",
+ "top_apll12_div2",
+ "top_apll12_div4",
+ "top_apll12_div_tdm",
+ "top_mux_audio_h",
+ "top_clk26m_clk";
+ interrupts = ;
+ mediatek,apmixedsys = <&apmixedsys>;
+ mediatek,infracfg = <&infracfg_ao>;
+ mediatek,topckgen = <&topckgen>;
+ resets = <&watchdog MT8186_TOPRGU_AUDIO_SW_RST>;
+ reset-names = "audiosys";
+ status = "disabled";
+ };
+
mmc0: mmc@1123 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
--
2.18.0
[PATCH 0/9] Add and update some driver nodes for MT8186 SoC
This series is based on matthias github, for-next. Allen-KH Cheng (9): arm64: dts: mediatek: mt8186: Add MTU3 nodes dt-bindings: spmi: spmi-mtk-pmif: Document mediatek,mt8195-spmi as fallback of mediatek,mt8186-spmi arm64: dts: mediatek: mt8186: Add SPMI node arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes arm64: dts: mediatek: mt8186: Add ADSP node arm64: dts: mediatek: mt8186: Add audio controller node arm64: dts: mediatek: mt8186: Add DPI node dt-bindings: display: mediatek: Fix the fallback for mediatek,mt8186-disp-ccorr arm64: dts: mediatek: mt8186: Add display nodes .../display/mediatek/mediatek,ccorr.yaml | 2 +- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 11 +- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 335 ++ 3 files changed, 344 insertions(+), 4 deletions(-) -- 2.18.0
[PATCH 3/9] arm64: dts: mediatek: mt8186: Add SPMI node
Add SPMI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 3d88480913eb..a8ff984f1192 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -605,6 +605,25 @@
clock-names = "spi", "wrap";
};
+ spmi: spmi@10015000 {
+ compatible = "mediatek,mt8186-spmi",
+"mediatek,mt8195-spmi";
+ reg = <0 0x10015000 0 0x000e00>,
+ <0 0x1001B000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+<&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+<&topckgen CLK_TOP_SPMI_MST>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = <&topckgen CLK_TOP_SPMI_MST>;
+ assigned-clock-parents = <&topckgen
CLK_TOP_ULPOSC1_D10>;
+ interrupts = ,
+;
+ status = "disabled";
+ };
+
systimer: timer@10017000 {
compatible = "mediatek,mt8186-timer",
"mediatek,mt6765-timer";
--
2.18.0
Re: [PATCH] drm/mediatek: dsi: Move mtk_dsi_stop() call back to mtk_dsi_poweroff()
On 9/19/22 21:32, AngeloGioacchino Del Regno wrote:
> Il 19/09/22 10:40, Hsin-Yi Wang ha scritto:
>> On Mon, Sep 19, 2022 at 4:39 PM Nícolas F. R. A. Prado
>> wrote:
>>>
>>> As the comment right before the mtk_dsi_stop() call advises,
>>> mtk_dsi_stop() should only be called after
>>> mtk_drm_crtc_atomic_disable(). That's because that function calls
>>> drm_crtc_wait_one_vblank(), which requires the vblank irq to be enabled.
>>>
>>> Previously mtk_dsi_stop(), being in mtk_dsi_poweroff() and guarded by a
>>> refcount, would only be called at the end of
>>> mtk_drm_crtc_atomic_disable(), through the call to
>>> mtk_crtc_ddp_hw_fini().
>>> Commit cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>>> enable/disable and define new funcs") moved the mtk_dsi_stop() call to
>>> mtk_output_dsi_disable(), causing it to be called before
>>> mtk_drm_crtc_atomic_disable(), and consequently generating vblank
>>> timeout warnings during suspend.
>>>
>>> Move the mtk_dsi_stop() call back to mtk_dsi_poweroff() so that we have
>>> a working vblank irq during mtk_drm_crtc_atomic_disable() and stop
>>> getting vblank timeout warnings.
>>>
>>> Fixes: cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>>> enable/disable and define new funcs")
>>> Signed-off-by: Nícolas F. R. A. Prado
>>>
>> Tested-by: Hsin-Yi Wang
>>
>
> Reviewed-by: AngeloGioacchino Del Regno
>
>
>
Tested suspend/resume work properly on mt8188 and mt8186 .
Tested-by: Allen-KH Cheng
Re: [PATCH v2] drm: mediatek: Fix display vblank timeout when disable dsi
Hi CK,
We can use [1] in mt8186. Please ignore this PATCH.
Thanks,
Allen
[1]
http://lists.infradead.org/pipermail/linux-mediatek/2022-August/046713.html
On 9/19/22 11:01, Allen-KH Cheng wrote:
> Hi CK,
>
> We will test this fix on the mt8186/mt8183.
> Maybe our fix is not necessary.
>
> I appreciate your suggestion.
>
> BRs,
> Allen
>
> On 9/18/22 12:32, Chun-Kuang Hu wrote:
>> Hi, Allen:
>>
>> Allen-KH Cheng 於 2022年9月14日 週三 晚上10:00寫道：
>>>
>>> From: Xinlei Lee
>>>
>>> Dsi is turned off at bridge.disable, causing crtc to wait for vblank
>>> timeout. It is necessary to add count protection to turn off dsi and
>>> turn off at post_disable.
>>
>> If turn off dsi in post_disable(), you should turn on dsi in pre_enable().
>>
>> There is another patch fix this problem [1], do you have any comment
>> on that patch?
>>
>> [1]
>> http://lists.infradead.org/pipermail/linux-mediatek/2022-August/046713.html
>>
>> Regards,
>> Chun-Kuang.
>>
>>>
>>> Fixes: cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>>> enable/disable and define new funcs")
>>> Signed-off-by: Xinlei Lee
>>> Co-developed-by: Allen-KH Cheng
>>> Signed-off-by: Allen-KH Cheng
>>> ---
>>> Change in v1:
>>> * Rebase to kernel/git/chunkuang.hu/linux.git, mediatek-drm-fixes
>>> [Allen-KH Cheng ]
>>> ---
>>> ---
>>> drivers/gpu/drm/mediatek/mtk_dsi.c | 15 ++-
>>> 1 file changed, 6 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> b/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> index 5b624e0f5b0a..e30f4244c001 100644
>>> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
>>> @@ -768,14 +768,6 @@ static void mtk_dsi_bridge_mode_set(struct drm_bridge
>>> *bridge,
>>> drm_display_mode_to_videomode(adjusted, &dsi->vm);
>>> }
>>>
>>> -static void mtk_dsi_bridge_atomic_disable(struct drm_bridge *bridge,
>>> - struct drm_bridge_state
>>> *old_bridge_state)
>>> -{
>>> - struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>>> -
>>> - mtk_output_dsi_disable(dsi);
>>> -}
>>> -
>>> static void mtk_dsi_bridge_atomic_enable(struct drm_bridge *bridge,
>>> struct drm_bridge_state
>>> *old_bridge_state)
>>> {
>>> @@ -803,13 +795,15 @@ static void mtk_dsi_bridge_atomic_post_disable(struct
>>> drm_bridge *bridge,
>>> {
>>> struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>>>
>>> + if (dsi->refcount == 1)
>>> + mtk_output_dsi_disable(dsi);
>>> +
>>> mtk_dsi_poweroff(dsi);
>>> }
>>>
>>> static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
>>> .attach = mtk_dsi_bridge_attach,
>>> .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
>>> - .atomic_disable = mtk_dsi_bridge_atomic_disable,
>>> .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
>>> .atomic_enable = mtk_dsi_bridge_atomic_enable,
>>> .atomic_pre_enable = mtk_dsi_bridge_atomic_pre_enable,
>>> @@ -829,6 +823,9 @@ void mtk_dsi_ddp_stop(struct device *dev)
>>> {
>>> struct mtk_dsi *dsi = dev_get_drvdata(dev);
>>>
>>> + if (dsi->refcount == 1)
>>> + mtk_output_dsi_disable(dsi);
>>> +
>>> mtk_dsi_poweroff(dsi);
>>> }
>>>
>>> --
>>> 2.18.0
>>>
Re: [PATCH v2] drm: mediatek: Fix display vblank timeout when disable dsi
Hi CK,
We will test this fix on the mt8186/mt8183.
Maybe our fix is not necessary.
I appreciate your suggestion.
BRs,
Allen
On 9/18/22 12:32, Chun-Kuang Hu wrote:
> Hi, Allen:
>
> Allen-KH Cheng 於 2022年9月14日 週三 晚上10:00寫道：
>>
>> From: Xinlei Lee
>>
>> Dsi is turned off at bridge.disable, causing crtc to wait for vblank
>> timeout. It is necessary to add count protection to turn off dsi and
>> turn off at post_disable.
>
> If turn off dsi in post_disable(), you should turn on dsi in pre_enable().
>
> There is another patch fix this problem [1], do you have any comment
> on that patch?
>
> [1]
> http://lists.infradead.org/pipermail/linux-mediatek/2022-August/046713.html
>
> Regards,
> Chun-Kuang.
>
>>
>> Fixes: cde7e2e35c28 ("drm/mediatek: Separate poweron/poweroff from
>> enable/disable and define new funcs")
>> Signed-off-by: Xinlei Lee
>> Co-developed-by: Allen-KH Cheng
>> Signed-off-by: Allen-KH Cheng
>> ---
>> Change in v1:
>> * Rebase to kernel/git/chunkuang.hu/linux.git, mediatek-drm-fixes
>> [Allen-KH Cheng ]
>> ---
>> ---
>> drivers/gpu/drm/mediatek/mtk_dsi.c | 15 ++-
>> 1 file changed, 6 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
>> b/drivers/gpu/drm/mediatek/mtk_dsi.c
>> index 5b624e0f5b0a..e30f4244c001 100644
>> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
>> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
>> @@ -768,14 +768,6 @@ static void mtk_dsi_bridge_mode_set(struct drm_bridge
>> *bridge,
>> drm_display_mode_to_videomode(adjusted, &dsi->vm);
>> }
>>
>> -static void mtk_dsi_bridge_atomic_disable(struct drm_bridge *bridge,
>> - struct drm_bridge_state
>> *old_bridge_state)
>> -{
>> - struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>> -
>> - mtk_output_dsi_disable(dsi);
>> -}
>> -
>> static void mtk_dsi_bridge_atomic_enable(struct drm_bridge *bridge,
>> struct drm_bridge_state
>> *old_bridge_state)
>> {
>> @@ -803,13 +795,15 @@ static void mtk_dsi_bridge_atomic_post_disable(struct
>> drm_bridge *bridge,
>> {
>> struct mtk_dsi *dsi = bridge_to_dsi(bridge);
>>
>> + if (dsi->refcount == 1)
>> + mtk_output_dsi_disable(dsi);
>> +
>> mtk_dsi_poweroff(dsi);
>> }
>>
>> static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
>> .attach = mtk_dsi_bridge_attach,
>> .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
>> - .atomic_disable = mtk_dsi_bridge_atomic_disable,
>> .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
>> .atomic_enable = mtk_dsi_bridge_atomic_enable,
>> .atomic_pre_enable = mtk_dsi_bridge_atomic_pre_enable,
>> @@ -829,6 +823,9 @@ void mtk_dsi_ddp_stop(struct device *dev)
>> {
>> struct mtk_dsi *dsi = dev_get_drvdata(dev);
>>
>> + if (dsi->refcount == 1)
>> + mtk_output_dsi_disable(dsi);
>> +
>> mtk_dsi_poweroff(dsi);
>> }
>>
>> --
>> 2.18.0
>>
