[RFC PATCH 00/10] Support simple-framebuffer on imx8m
This series is the Linux counterpart of what was sent to U-Boot [1] for the support of the simple-framebuffer for the BSH SMM S2Pro board. The need to avoid re-initializing the hardware (power domains, controllers, bridges, display panels) that has already been initialized and kept powered on by the bootloader has required updating more than one YAML file, with the addition of boolean properties to inform the driver that the corresponding hardware has been initialized and left on by the bootloader. All these properties are added on the fly by the bootloader to the various relevant nodes. Support for the simple framebuffer for the dts of imx8mn-bsh-smm-s2/pro board has been sent with a separate patch from this series [2]. [1] https://lore.kernel.org/all/20240913095622.72377-18-dario.binac...@amarulasolutions.com/T/ [2] https://lore.kernel.org/imx/20241024102800.3481574-1-dario.binac...@amarulasolutions.com/T/ Dario Binacchi (10): dt-bindings: soc: imx-blk-ctrl: add 'fsl,power-domains-boot-on' property pmdomain: imx8m-blk-ctrl: don't turn on a power domain already on dt-bindings: power: gpcv2: add 'fsl,boot-on' property pmdomain: imx: gpcv2: don't turn on a power domain already on dt-bindings: display: panel: add 'syna,boot-on' property drm/panel: synaptics-r63353: don't re-activate the panel if already setup dt-bindings: bridge: samsung-dsim: add 'samsung,boot-on' property drm: bridge: samsung-dsim: don't re-activate the bridge if already setup dt-bindings: lcdif: add 'fsl,boot-on' property drm/mxsfb: stop controller and drain FIFOs if already initialized .../display/bridge/samsung,mipi-dsim.yaml | 5 ++ .../bindings/display/fsl,lcdif.yaml | 5 ++ .../display/panel/synaptics,r63353.yaml | 5 ++ .../bindings/power/fsl,imx-gpcv2.yaml | 6 +++ .../soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml | 9 drivers/gpu/drm/bridge/samsung-dsim.c | 13 - drivers/gpu/drm/mxsfb/mxsfb_drv.c | 3 ++ drivers/gpu/drm/mxsfb/mxsfb_drv.h | 1 + drivers/gpu/drm/mxsfb/mxsfb_kms.c | 14 - .../gpu/drm/panel/panel-synaptics-r63353.c| 10 +++- drivers/pmdomain/imx/gpcv2.c | 32 +++- drivers/pmdomain/imx/imx8m-blk-ctrl.c | 51 ++- 12 files changed, 148 insertions(+), 6 deletions(-) -- 2.43.0
[RFC PATCH 10/10] drm/mxsfb: stop controller and drain FIFOs if already initialized
You can't re-program the controller if it is still running. This may
lead to shifted pictures, so stop the controller and drain its FIFOs
in case it's already properly setup.
This patch is crucial when supporting the simple framebuffer, as the
controller has already been initialized by the bootloader.
Signed-off-by: Dario Binacchi
---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 3 +++
drivers/gpu/drm/mxsfb/mxsfb_drv.h | 1 +
drivers/gpu/drm/mxsfb/mxsfb_kms.c | 14 +-
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
index cb5ce4e81fc7..38c94cdc8f6c 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
@@ -10,6 +10,7 @@
#include
#include
+#include
#include
#include
#include
@@ -221,6 +222,8 @@ static int mxsfb_load(struct drm_device *drm,
if (!mxsfb)
return -ENOMEM;
+ mxsfb->enabled =
+ of_property_read_bool(drm->dev->of_node, "fsl,boot-on");
mxsfb->drm = drm;
drm->dev_private = mxsfb;
mxsfb->devdata = devdata;
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.h
b/drivers/gpu/drm/mxsfb/mxsfb_drv.h
index d160d921b25f..0f9ae4ce450c 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.h
+++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.h
@@ -47,6 +47,7 @@ struct mxsfb_drm_private {
struct drm_bridge *bridge;
boolcrc_active;
+ boolenabled;
};
static inline struct mxsfb_drm_private *
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c
b/drivers/gpu/drm/mxsfb/mxsfb_kms.c
index 7ed2516b6de0..d064a2bb65df 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c
@@ -202,9 +202,11 @@ static void mxsfb_enable_controller(struct
mxsfb_drm_private *mxsfb)
writel(reg, mxsfb->base + LCDC_CTRL1);
writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET);
+
+ mxsfb->enabled = true;
}
-static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb)
+static void _mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb)
{
u32 reg;
@@ -221,6 +223,13 @@ static void mxsfb_disable_controller(struct
mxsfb_drm_private *mxsfb)
reg &= ~VDCTRL4_SYNC_SIGNALS_ON;
writel(reg, mxsfb->base + LCDC_VDCTRL4);
+ mxsfb->enabled = false;
+}
+
+static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb)
+{
+ _mxsfb_disable_controller(mxsfb);
+
clk_disable_unprepare(mxsfb->clk);
if (mxsfb->clk_disp_axi)
clk_disable_unprepare(mxsfb->clk_disp_axi);
@@ -354,6 +363,9 @@ static void mxsfb_crtc_atomic_enable(struct drm_crtc *crtc,
u32 bus_format = 0;
dma_addr_t dma_addr;
+ if (mxsfb->enabled)
+ _mxsfb_disable_controller(mxsfb);
+
pm_runtime_get_sync(drm->dev);
mxsfb_enable_axi_clk(mxsfb);
--
2.43.0
[RFC PATCH 09/10] dt-bindings: lcdif: add 'fsl,boot-on' property
The property states that the (e)LCDIF display controller has been initialized and left on by the bootloader. This information becomes relevant in the case of supporting the simple framebuffer. Signed-off-by: Dario Binacchi --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml index 8e3a98aeec32..937f108daacb 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -71,6 +71,11 @@ properties: $ref: /schemas/graph.yaml#/properties/port description: The LCDIF output port + fsl,boot-on: +description: | + The controller has been initialized and left on by the bootloader/firmware. +type: boolean + required: - compatible - reg -- 2.43.0
[RFC PATCH 08/10] drm: bridge: samsung-dsim: don't re-activate the bridge if already setup
The patch does not re-execute the hardware initialization/activation
procedure for the bridge if it is already operational.
This feature is crucial when supporting the simple framebuffer, as the
controller has already been initialized by the bootloader.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
drivers/gpu/drm/bridge/samsung-dsim.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 430f8adebf9c..7c03215bb004 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1933,6 +1933,7 @@ int samsung_dsim_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct samsung_dsim *dsi;
+ bool initialized;
int ret, i;
dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
@@ -2010,6 +2011,13 @@ int samsung_dsim_probe(struct platform_device *pdev)
dsi->bridge.funcs = &samsung_dsim_bridge_funcs;
dsi->bridge.of_node = dev->of_node;
dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;
+ initialized = of_property_read_bool(dev->of_node, "samsung,boot-on");
+ if (initialized) {
+ dsi->state = DSIM_STATE_INITIALIZED | DSIM_STATE_ENABLED;
+ ret = pm_runtime_resume_and_get(dev);
+ if (ret)
+ goto err_disable_runtime;
+ }
/* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */
if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM)
@@ -2020,11 +2028,14 @@ int samsung_dsim_probe(struct platform_device *pdev)
if (dsi->plat_data->host_ops &&
dsi->plat_data->host_ops->register_host) {
ret = dsi->plat_data->host_ops->register_host(dsi);
if (ret)
- goto err_disable_runtime;
+ goto err_put_runtime;
}
return 0;
+err_put_runtime:
+ if (initialized)
+ pm_runtime_put_sync(dev);
err_disable_runtime:
pm_runtime_disable(dev);
--
2.43.0
[RFC PATCH 06/10] drm/panel: synaptics-r63353: don't re-activate the panel if already setup
The patch does not re-execute the hardware initialization/activation
procedure for the panel if it is already operational.
This feature is crucial when supporting the simple framebuffer, as the
controller has already been initialized by the bootloader.
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
drivers/gpu/drm/panel/panel-synaptics-r63353.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
index 169c629746c7..93e3ed545b34 100644
--- a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
+++ b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
@@ -258,6 +258,8 @@ static int r63353_panel_probe(struct mipi_dsi_device *dsi)
int ret = 0;
struct device *dev = &dsi->dev;
struct r63353_panel *panel;
+ bool initialized;
+ enum gpiod_flags rflags;
panel = devm_kzalloc(&dsi->dev, sizeof(*panel), GFP_KERNEL);
if (!panel)
@@ -282,7 +284,9 @@ static int r63353_panel_probe(struct mipi_dsi_device *dsi)
if (IS_ERR(panel->avdd))
return PTR_ERR(panel->avdd);
- panel->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+ initialized = of_property_read_bool(dev->of_node, "syna,boot-on");
+ rflags = initialized ? GPIOD_ASIS : GPIOD_OUT_LOW;
+ panel->reset_gpio = devm_gpiod_get(dev, "reset", rflags);
if (IS_ERR(panel->reset_gpio)) {
dev_err(dev, "failed to get RESET GPIO\n");
return PTR_ERR(panel->reset_gpio);
@@ -297,6 +301,10 @@ static int r63353_panel_probe(struct mipi_dsi_device *dsi)
return ret;
drm_panel_add(&panel->base);
+ if (initialized) {
+ r63353_panel_power_on(panel);
+ panel->base.prepared = true;
+ }
ret = mipi_dsi_attach(dsi);
if (ret < 0) {
--
2.43.0
[RFC PATCH 07/10] dt-bindings: bridge: samsung-dsim: add 'samsung, boot-on' property
The property states that the bridge controller has been initialized and left on by the bootloader. This information becomes relevant in the case of supporting the simple framebuffer. Signed-off-by: Dario Binacchi --- .../bindings/display/bridge/samsung,mipi-dsim.yaml | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml index 4ed7a799ba26..34cd93bc41f9 100644 --- a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml +++ b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml @@ -132,6 +132,11 @@ properties: dependencies: lane-polarities: [data-lanes] + samsung,boot-on: +description: + The bridge has been initialized and left on by the bootloader/firmware. +type: boolean + required: - clock-names - clocks -- 2.43.0
[RFC PATCH 05/10] dt-bindings: display: panel: add 'syna, boot-on' property
The property states that the panel display has been initialized and left on by the bootloader. This information becomes relevant in the case of supporting the simple framebuffer. Signed-off-by: Dario Binacchi --- .../devicetree/bindings/display/panel/synaptics,r63353.yaml | 5 + 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml index 2fd6e0ec3682..987fd6f8b866 100644 --- a/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml +++ b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml @@ -25,6 +25,11 @@ properties: avdd-supply: true dvdd-supply: true + syna,boot-on: +description: | + The display has been initialized and left on by the bootloader/firmware. +type: boolean + required: - compatible - reg -- 2.43.0
[PATCH v2] drm/panel: synaptics-r63353: Fix regulator unbalance
From: Michael Trimarchi
The shutdown function can be called when the display is already
unprepared. For example during reboot this trigger a kernel
backlog. Calling the drm_panel_unprepare, allow us to avoid
to trigger the kernel warning.
Fixes: 2e87bad7cd33 ("drm/panel: Add Synaptics R63353 panel driver")
Tested-by: Dario Binacchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
Reviewed-by: Neil Armstrong
---
Changes in v2:
- Add 'Fixes' tag.
- Add 'Reviewed-by' tag of Neil Armstrong.
drivers/gpu/drm/panel/panel-synaptics-r63353.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
index 169c629746c7..17349825543f 100644
--- a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
+++ b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
@@ -325,7 +325,7 @@ static void r63353_panel_shutdown(struct mipi_dsi_device
*dsi)
{
struct r63353_panel *rpanel = mipi_dsi_get_drvdata(dsi);
- r63353_panel_unprepare(&rpanel->base);
+ drm_panel_unprepare(&rpanel->base);
}
static const struct r63353_desc sharp_ls068b3sx02_data = {
--
2.43.0
[PATCH v2] drm/mxsfb: Remove generic DRM drivers in probe function
Use aperture helpers to remove all generic graphics drivers before loading mxsfb. Makes mxsfb compatible with simpledrm. Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v2: - Use aperture_remove_all_conflicting_devices() instead of drm_aperture_remove_framebuffers(). drivers/gpu/drm/mxsfb/mxsfb_drv.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c index cb5ce4e81fc7..d140984923fd 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -8,6 +8,7 @@ * Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved. */ +#include #include #include #include @@ -360,6 +361,15 @@ static int mxsfb_probe(struct platform_device *pdev) if (ret) goto err_free; + /* +* Remove early framebuffers (ie. simplefb). The framebuffer can be +* located anywhere in RAM +*/ + ret = aperture_remove_all_conflicting_devices(mxsfb_driver.name); + if (ret) + return dev_err_probe(&pdev->dev, ret, +"can't kick out existing framebuffers\n"); + ret = drm_dev_register(drm, 0); if (ret) goto err_unload; -- 2.43.0
[PATCH] drm/panel: synaptics-r63353: Fix regulator unbalance
From: Michael Trimarchi
The shutdown function can be called when the display is already
unprepared. For example during reboot this trigger a kernel
backlog. Calling the drm_panel_unprepare, allow us to avoid
to trigger the kernel warning.
Tested-by: Dario Binacchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
drivers/gpu/drm/panel/panel-synaptics-r63353.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
index 169c629746c7..17349825543f 100644
--- a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
+++ b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
@@ -325,7 +325,7 @@ static void r63353_panel_shutdown(struct mipi_dsi_device
*dsi)
{
struct r63353_panel *rpanel = mipi_dsi_get_drvdata(dsi);
- r63353_panel_unprepare(&rpanel->base);
+ drm_panel_unprepare(&rpanel->base);
}
static const struct r63353_desc sharp_ls068b3sx02_data = {
--
2.43.0
[PATCH] drm/mxsfb: Remove generic DRM drivers in probe function
Use aperture helpers to remove all generic graphics drivers before loading mxsfb. Makes mxsfb compatible with simpledrm. Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c index cb5ce4e81fc7..a8d6dffcd02c 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -17,6 +17,7 @@ #include #include +#include #include #include #include @@ -360,6 +361,15 @@ static int mxsfb_probe(struct platform_device *pdev) if (ret) goto err_free; + /* +* Remove early framebuffers (ie. simplefb). The framebuffer can be +* located anywhere in RAM +*/ + ret = drm_aperture_remove_framebuffers(&mxsfb_driver); + if (ret) + return dev_err_probe(&pdev->dev, ret, +"can't kick out existing framebuffers\n"); + ret = drm_dev_register(drm, 0); if (ret) goto err_unload; -- 2.43.0
Re: [drm-drm-misc:drm-misc-next v2] dt-bindings: nt35510: document 'port' property
Hi, On Wed, Feb 14, 2024 at 10:47 AM Alexandre TORGUE wrote: > > Hi Heiko > > On 1/31/24 16:53, Conor Dooley wrote: > > On Wed, Jan 31, 2024 at 10:28:44AM +0100, Dario Binacchi wrote: > >> Allow 'port' property (coming from panel-common.yaml) to be used in DTS: > >> > >>st/stm32f769-disco-mb1166-reva09.dtb: panel@0: 'port' does not match > >> any of the regexes: 'pinctrl-[0-9]+' > >> > >> Signed-off-by: Dario Binacchi > >> Cc: Alexandre Torgue > > > > Acked-by: Conor Dooley > > > > > >> > >> --- > >> > >> Changes in v2: > >> - Rework the patch to drop errors found by command > >>'make DT_CHECKER_FLAGS=-m dt_binding_check'. > >> > >> .../devicetree/bindings/display/panel/novatek,nt35510.yaml | 1 + > >> 1 file changed, 1 insertion(+) > >> > >> diff --git > >> a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml > >> b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml > >> index a4afaff483b7..91921f4b0e5f 100644 > >> --- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml > >> +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml > >> @@ -31,6 +31,7 @@ properties: > >> vddi-supply: > >> description: regulator that supplies the vddi voltage > >> backlight: true > >> + port: true > >> > >> required: > >> - compatible > >> -- > >> 2.43.0 > >> > > Do you plan to take this patch in drm-misc next branch ? As I have a > dependency with it to merge a DT patch I can take in my tree > (stm32-next) if you prefer. Let me know. > > Cheers > Alex It's been some weeks, so a gentle ping seems in order :) Thanks and regards, Dario -- Dario Binacchi Senior Embedded Linux Developer dario.binac...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
Re: linux-next: manual merge of the drm-misc tree with Linus' tree
Hi Michael,
On Tue, Feb 6, 2024 at 12:29 PM Michael Walle wrote:
>
> Hi Stephen and all,
>
> >> Today's linux-next merge of the drm-misc tree got a conflict in:
> >>
> >> drivers/gpu/drm/bridge/samsung-dsim.c
> >>
> >> between commit:
> >>
> >> ff3d5d04db07 ("drm: bridge: samsung-dsim: Don't use
> >> FORCE_STOP_STATE")
> >>
> >> from Linus' tree and commit:
> >>
> >> b2fe2292624a ("drm: bridge: samsung-dsim: enter display mode in the
> >> enable() callback")
> >>
> >> from the drm-misc tree.
> >>
> >> I fixed it up (see below, please check) and can carry the fix as
> >> necessary. This is now fixed as far as linux-next is concerned, but
> >> any
> >> non trivial conflicts should be mentioned to your upstream maintainer
> >> when your tree is submitted for merging. You may also want to
> >> consider
> >> cooperating with the maintainer of the conflicting tree to minimise
> >> any
> >> particularly complex conflicts.
> >
> > I changed my mind and just used the latter version of this file.
>
> Bug wise, this is the wrong solution. Because it will reintroduce the
> faulty FORCE_STOP_STATE. Also keep in mind, my fixes commit is/was
> already
> backported to the stable series.
>
> See also the discussion at [1]. Unfortunately, there was no conculusion
> yet.
> I think [2] is the proper resolution, at least for the commit
> b2fe2292624a
> ("drm: bridge: samsung-dsim: enter display mode in the enable()
> callback")
> I'm not sure in what state the drm-misc tree is.
>
> -michael
>
> [1]
> https://lore.kernel.org/dri-devel/CAPM=9tytMB9frxNeD08hu1qsusY=wee3bjofmuga1rspabw...@mail.gmail.com/
> [2]
> https://lore.kernel.org/dri-devel/31e1a38a1d012a32d6f7bc8372b63...@kernel.org/
Unfortunately, in this recent period, I have been very busy and have
not been able to run tests on this matter.
As soon as I am able to do so, I will.
Thanks and regards,
Dario
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
[drm-drm-misc:drm-misc-next v2] dt-bindings: nt35510: document 'port' property
Allow 'port' property (coming from panel-common.yaml) to be used in DTS: st/stm32f769-disco-mb1166-reva09.dtb: panel@0: 'port' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Dario Binacchi Cc: Alexandre Torgue --- Changes in v2: - Rework the patch to drop errors found by command 'make DT_CHECKER_FLAGS=-m dt_binding_check'. .../devicetree/bindings/display/panel/novatek,nt35510.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml index a4afaff483b7..91921f4b0e5f 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml @@ -31,6 +31,7 @@ properties: vddi-supply: description: regulator that supplies the vddi voltage backlight: true + port: true required: - compatible -- 2.43.0
Re: [PATCH] drm: bridge: samsung-dsim: Don't use FORCE_STOP_STATE
Hi Michael,
On Mon, Jan 29, 2024 at 5:06 PM Michael Walle wrote:
>
> >> Just FYI this conflictted pretty heavily with drm-misc-next changes in
> >> the same area, someone should check drm-tip has the correct
> >> resolution, I'm not really sure what is definitely should be.
> >
> > FWIW, this looks rather messy now. The drm-tip doesn't build.
> >
> > There was a new call to samsung_dsim_set_stop_state() introduced
> > in commit b2fe2292624ac (drm: bridge: samsung-dsim: enter display
> > mode in the enable() callback).
>
> I had a closer look at the latest linux-next (where somehow my patch
> made it into) and tried to apply commit b2fe2292624ac (drm: bridge:
> samsung-dsim: enter display mode in the enable() callback). It looks
> like only the following hunk is still needed from that patch. Everything
> else is covered by this fixes patch.
>
> Dario, could you rebase your commit onto this patch? I had a quick test
> with this change and it seems to work fine for our case.
>
> --snip--
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
> b/drivers/gpu/drm/bridge/samsung-dsim.c
> index 63a1a0c88be4..92755c90e7d2 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -1498,6 +1498,8 @@ static void samsung_dsim_atomic_disable(struct
> drm_bridge *bridge,
> if (!(dsi->state & DSIM_STATE_ENABLED))
> return;
>
> + samsung_dsim_set_display_enable(dsi, false);
> +
> dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
> }
>
> @@ -1506,8 +1508,6 @@ static void
> samsung_dsim_atomic_post_disable(struct drm_bridge *bridge,
> {
> struct samsung_dsim *dsi = bridge_to_dsi(bridge);
>
> - samsung_dsim_set_display_enable(dsi, false);
> -
> dsi->state &= ~DSIM_STATE_ENABLED;
> pm_runtime_put_sync(dsi->dev);
> }
> --snip--
>
> -michael
I'm sorry, but I didn't understand well what I have to do.
This is what I have done:
git clone
https://kernel.googlesource.com/pub/scm/linux/kernel/git/next/linux-next.git
cd linux-next
# add your changes, the ones of the emails
git am --reject 0001-drm-bridge-samsung-dsim-enter-display-mode-in-the-en.patch
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 92755c90e7d2..b47929072583 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1508,6 +1508,9 @@ static void
samsung_dsim_atomic_post_disable(struct drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
+
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
}
And then test the driver for my use case.
Is everything I wrote correct, or am I making a mistake?
Thanks and regards,
Dario
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
[drm-drm-misc:drm-misc-next] dt-bindings: nt35510: document 'port' property
Allow 'port' property (coming from panel-common.yaml) to be used in DTS:
st/stm32f769-disco-mb1166-reva09.dtb: panel@0: 'port' does not match any of
the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Dario Binacchi
Cc: Alexandre Torgue
---
.../display/panel/novatek,nt35510.yaml| 34 +++
1 file changed, 34 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml
b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml
index a4afaff483b7..72913719df23 100644
--- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml
+++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml
@@ -31,6 +31,22 @@ properties:
vddi-supply:
description: regulator that supplies the vddi voltage
backlight: true
+ port:
+$ref: /schemas/graph.yaml#/properties/port
+
+if:
+ properties:
+compatible:
+ contains:
+enum:
+ - frida,frd400b25025
+then:
+ required:
+- port
+
+else:
+ properties:
+port: false
required:
- compatible
@@ -54,5 +70,23 @@ examples:
backlight = <&gpio_bl>;
};
};
+ - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "frida,frd400b25025", "novatek,nt35510";
+vddi-supply = <&vcc_3v3>;
+vdd-supply = <&vcc_3v3>;
+reg = <0>; /* dsi virtual channel (0..3) */
+reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
+port {
+dsi_panel_in: endpoint {
+remote-endpoint = <&dsi_out>;
+};
+};
+};
+};
...
--
2.43.0
[RESEND PATCH v9 2/2] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8m{m,n,p}
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v9:
- Updated commit message
- Drop [3/3] arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup
because applied.
Changes in v8:
- Move the 'status' property to the end of the list of nodes:
- pwm1
- lcdif
- mipi_dsi
- Add a newline between properties and child node (mipi_dsi_out).
- Sort the iomuxc node alphabetically
- Rename pwm1grp to blgrp
Changes in v7:
- Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller
because applied.
Changes in v6:
- Drop patches:
- [06/10] drm/panel: Add Synaptics R63353 panel driver
- [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller
- [08/10] drm/panel: Add Ilitek ILI9805 panel driver
- [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel
Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git
(drm-misc-next)
Drop patches:
- [01/10] drm/bridge: Fix bridge disable logic
- [02/10] drm/bridge: Fix a use case in the bridge disable logic
Because they are wrong
Changes in v3:
- Replace "synaptics,r63353" compatible with "syna,r63353", as
required by vendor-prefixes.yaml.
- Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma
TM041XDHG01
into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller.
Changes in v2:
- Adjust the mipi_dsi node based on the latest patches merged into
the mainline in the dtsi files it includes.
- Added to the series the following patches:
- 0001 drm/bridge: Fix bridge disable logic
- 0002 drm/bridge: Fix a use case in the bridge disable logic
- 0003 samsung-dsim: enter display mode in the enable() callback
- 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[RESEND PATCH v9 1/2] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[RESEND PATCH v9 0/2] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. The patches for the ili9805 and r63353 LCD panels, which have already been merged into the mainline, do not work without the patch [1/2] "drm: bridge: samsung-dsim: enter display mode in the enable() callback". Changes in v9: - Updated commit message - Drop [3/3] arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup because applied. Changes in v8: - Move the 'status' property to the end of the list of nodes: - pwm1 - lcdif - mipi_dsi - Add a newline between properties and child node (mipi_dsi_out). - Sort the iomuxc node alphabetically - Rename pwm1grp to blgrp Changes in v7: - Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller because applied. Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (2): drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting drivers/gpu/drm/bridge/samsung-dsim.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) -- 2.43.0
Re: [PATCH v5 5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK
Hi Linus, On Tue, Jan 9, 2024 at 1:51 PM Linus Walleij wrote: > > Hi Dario, > > do you want me to apply patches 5,7,8 to the dri-misc > tree? > > Yours, > Linus Walleij Yes, I would appreciate that very much. Thanks and Regards, Dario Binacchi -- Dario Binacchi Senior Embedded Linux Developer dario.binac...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
[PATCH v5 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
The initialization commands are taken from the STMicroelectronics driver
found at [1].
To ensure backward compatibility, flags have been added to enable gamma
correction setting and display control. In other cases, registers have
been set to their default values according to the specifications found
in the datasheet.
[1]
https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Drivers/BSP/Components/nt35510/
Signed-off-by: Dario Binacchi
---
Changes in v5:
- Replace GPIOD_ASIS with GPIOD_OUT_HIGH in the call to
devm_gpiod_get_optional().
Changes in v2:
- Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA
FRD400B25025-A-CTK"
in the same style as the original driver.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 284 --
1 file changed, 252 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index fc16cf3a6d9d..7c634579634d 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -36,6 +36,9 @@
#include
#include
+#define NT35510_CMD_CORRECT_GAMMA BIT(0)
+#define NT35510_CMD_CONTROL_DISPLAY BIT(1)
+
#define MCS_CMD_MAUCCTR0xF0 /* Manufacturer command enable */
#define MCS_CMD_READ_ID1 0xDA
#define MCS_CMD_READ_ID2 0xDB
@@ -112,18 +115,33 @@
/* AVDD and AVEE setting 3 bytes */
#define NT35510_P1_AVDD_LEN 3
#define NT35510_P1_AVEE_LEN 3
+#define NT35510_P1_VCL_LEN 3
#define NT35510_P1_VGH_LEN 3
#define NT35510_P1_VGL_LEN 3
#define NT35510_P1_VGP_LEN 3
#define NT35510_P1_VGN_LEN 3
+#define NT35510_P1_VCMOFF_LEN 2
/* BT1CTR thru BT5CTR setting 3 bytes */
#define NT35510_P1_BT1CTR_LEN 3
#define NT35510_P1_BT2CTR_LEN 3
+#define NT35510_P1_BT3CTR_LEN 3
#define NT35510_P1_BT4CTR_LEN 3
#define NT35510_P1_BT5CTR_LEN 3
/* 52 gamma parameters times two per color: positive and negative */
#define NT35510_P1_GAMMA_LEN 52
+#define NT35510_WRCTRLD_BCTRL BIT(5)
+#define NT35510_WRCTRLD_A BIT(4)
+#define NT35510_WRCTRLD_DD BIT(3)
+#define NT35510_WRCTRLD_BL BIT(2)
+#define NT35510_WRCTRLD_DB BIT(1)
+#define NT35510_WRCTRLD_G BIT(0)
+
+#define NT35510_WRCABC_OFF 0
+#define NT35510_WRCABC_UI_MODE 1
+#define NT35510_WRCABC_STILL_MODE 2
+#define NT35510_WRCABC_MOVING_MODE 3
+
/**
* struct nt35510_config - the display-specific NT35510 configuration
*
@@ -175,6 +193,10 @@ struct nt35510_config {
* @mode_flags: DSI operation mode related flags
*/
unsigned long mode_flags;
+ /**
+* @cmds: enable DSI commands
+*/
+ u32 cmds;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -224,6 +246,25 @@ struct nt35510_config {
* The defaults are 4 and 3 yielding 0x34
*/
u8 bt2ctr[NT35510_P1_BT2CTR_LEN];
+ /**
+* @vcl: setting for VCL ranging from 0x00 = -2.5V to 0x11 = -4.0V
+* in 1V steps, the default is 0x00 which means -2.5V
+*/
+ u8 vcl[NT35510_P1_VCL_LEN];
+ /**
+* @bt3ctr: setting for boost power control for the VCL step-up
+* circuit (3)
+* bits 0..2 in the lower nibble controls CLCK, the booster clock
+* frequency, the values are the same as for PCK in @bt1ctr.
+* bits 4..5 in the upper nibble controls BTCL, the boosting
+* amplification for the step-up circuit.
+* 0 = Disable
+* 1 = -0.5 x VDDB
+* 2 = -1 x VDDB
+* 3 = -2 x VDDB
+* The defaults are 4 and 2 yielding 0x24
+*/
+ u8 bt3ctr[NT35510_P1_BT3CTR_LEN];
/**
* @vgh: setting for VGH ranging from 0x00 = 7.0V to 0x0B = 18.0V
* in 1V steps, the default is 0x08 which means 15V
@@ -277,6 +318,19 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @vcmoff: setting the DC VCOM offset voltage
+* The first byte contains bit 8 of VCM in bit 0 and VCMOFFSEL in bit 4.
+* The second byte contains bits 0..7 of VCM.
+* VCMOFFSEL the common voltage offset mode.
+* VCMOFFSEL 0x00 = VCOM .. 0x01 Gamma.
+* The default is 0x00.
+* VCM the VCOM output voltage (VCMOFFSEL = 0) or the internal register
+* offset for gamma voltage (VCMOFFSEL = 1).
+* VCM 0x00 = 0V/0 .. 0x118 = 3.5V/280 in steps of 12.5mV/1step
+* The default is 0x00 = 0V/0.
+*/
+ u8 vcmoff[NT35510_P1_VCMOFF_LEN];
/**
* @dopctr: setting optional control for display
* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
@@ -441,6 +495,43 @@ struct nt35510_config {
* @gamma_corr_neg_b: Blue gamma correction parameters, negative
*/
u8 gamma_corr_neg_b[NT35510_P1_GAMMA_LEN];
+ /**
+* @wrdisbv: wri
[PATCH v5 7/8] drm/panel: nt35510: move hardwired parameters to configuration
This patch, preparatory for future developments, move the hardwired
parameters to configuration data to allow the addition of new
NT35510-based panels.
Signed-off-by: Dario Binacchi
Reviewed-by: Linus Walleij
Tested-by: Linus Walleij
---
Changes in v5:
- Replace NT35510_ROTATE_180_SETTING with NT35510_ROTATE_0_SETTING
- Add Reviewed-by tag of Linus Walleij
- Tested-by tag of Linus Walleij
Changes in v2:
- Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization"
in the same style as the original driver in order to maintain the same
structure.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 140 ++
1 file changed, 115 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index d6dceb858008..fc16cf3a6d9d 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -171,6 +171,10 @@ struct nt35510_config {
* timing in the display controller.
*/
const struct drm_display_mode mode;
+ /**
+* @mode_flags: DSI operation mode related flags
+*/
+ unsigned long mode_flags;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -273,6 +277,100 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @dopctr: setting optional control for display
+* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
+* 0 = Disable, ERR pin output low
+* 1 = ERR pin output CRC error only
+* 2 = ERR pin output ECC error only
+* 3 = ERR pin output CRC and ECC error
+* The default is 0.
+* N565 bit 2 in the first byte is the 16-bit/pixel format selection.
+* 0 = R[4:0] + G[5:3] & G[2:0] + B[4:0]
+* 1 = G[2:0] + R[4:0] & B[4:0] + G[5:3]
+* The default is 0.
+* DIS_EoTP_HS bit 3 in the first byte is "DSI protocol violation" error
+* reporting.
+* 0 = reporting when error
+* 1 = not reporting when error
+* DSIM bit 4 in the first byte is the video mode data type enable
+* 0 = Video mode data type disable
+* 1 = Video mode data type enable
+* The default is 0.
+* DSIG bit 5 int the first byte is the generic r/w data type enable
+* 0 = Generic r/w disable
+* 1 = Generic r/w enable
+* The default is 0.
+* DSITE bit 6 in the first byte is TE line enable
+* 0 = TE line is disabled
+* 1 = TE line is enabled
+* The default is 0.
+* RAMKP bit 7 in the first byte is the frame memory keep/loss in
+* sleep-in mode
+* 0 = contents loss in sleep-in
+* 1 = contents keep in sleep-in
+* The default is 0.
+* CRL bit 1 in the second byte is the source driver data shift
+* direction selection. This bit is XOR operation with bit RSMX
+* of 3600h command.
+* 0 (RMSX = 0) = S1 -> S1440
+* 0 (RMSX = 1) = S1440 -> S1
+* 1 (RMSX = 0) = S1440 -> S1
+* 1 (RMSX = 1) = S1 -> S1440
+* The default is 0.
+* CTB bit 2 in the second byte is the vertical scanning direction
+* selection for gate control signals. This bit is XOR operation
+* with bit ML of 3600h command.
+* 0 (ML = 0) = Forward (top -> bottom)
+* 0 (ML = 1) = Reverse (bottom -> top)
+* 1 (ML = 0) = Reverse (bottom -> top)
+* 1 (ML = 1) = Forward (top -> bottom)
+* The default is 0.
+* CRGB bit 3 in the second byte is RGB-BGR order selection. This
+* bit is XOR operation with bit RGB of 3600h command.
+* 0 (RGB = 0) = RGB/Normal
+* 0 (RGB = 1) = BGR/RB swap
+* 1 (RGB = 0) = BGR/RB swap
+* 1 (RGB = 1) = RGB/Normal
+* The default is 0.
+* TE_PWR_SEL bit 4 in the second byte is the TE output voltage
+* level selection (only valid when DSTB_SEL = 0 or DSTB_SEL = 1,
+* VSEL = High and VDDI = 1.665~3.3V).
+* 0 = TE output voltage level is VDDI
+* 1 = TE output voltage level is VDDA
+* The default is 0.
+*/
+ u8 dopctr[NT35510_P0_DOPCTR_LEN];
+ /**
+* @madctl: Memory data access control
+* RSMY bit 0 is flip vertical. Flips the display image top to down.
+* RSMX bit 1 is flip horizontal. Flips the display image left to right.
+* MH bit 2 is the horizontal refresh order.
+* RGB bit 3 is the RGB-BGR order.
+* 0 = RGB color sequence
+* 1 = BGR color sequence
+* ML bit 4 is the vertical refresh order.
+* MV bit 5 is the row/column exchange.
+* MX bit 6 is the column address
[PATCH v5 5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the Novatek NT35510-based panel family. Signed-off-by: Dario Binacchi Acked-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij --- Changes in v5: - Add Acked-by tag of Krzysztof Kozlowski - Add Reviewed-by tag of Linus Walleij Changes in v4: - Put the "enum" list in alphabetical order Changes in v3: - Use "enum" to have less code changed Changes in v2: - Add a dash in front of each "items:" .../devicetree/bindings/display/panel/novatek,nt35510.yaml| 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml index bc92928c805b..a4afaff483b7 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml @@ -15,7 +15,9 @@ allOf: properties: compatible: items: - - const: hydis,hva40wv1 + - enum: + - frida,frd400b25025 + - hydis,hva40wv1 - const: novatek,nt35510 description: This indicates the panel manufacturer of the panel that is in turn using the NT35510 panel driver. The compatible -- 2.43.0
[PATCH v5 0/8] Add display support for stm32f769-disco board
The series adds display support for the stm32f769-disco board. It has been tested on hardware revisions MB1225-B03 and MB1166-A09. This required modifications to the nt35510 driver. As I do not have the Hydis HVA40WV1 display, it would be better if someone tested the driver in that configuration. Changes in v5: - Add Acked-by tag of Krzysztof Kozlowski - Add Reviewed-by tag of Linus Walleij - Replace NT35510_ROTATE_180_SETTING with NT35510_ROTATE_0_SETTING - Add Reviewed-by tag of Linus Walleij - Tested-by tag of Linus Walleij - Replace GPIOD_ASIS with GPIOD_OUT_HIGH in the call to devm_gpiod_get_optional(). Changes in v4: - Put the "enum" list in alphabetical order Changes in v3: - Use "enum" to have less code changed Changes in v2: - Add Acked-by tag of Conor Dooley - Add a dash in front of each "items:" - Change the status of panel_backlight node to "disabled" - Delete backlight property from panel0 node. - Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization" in the same style as the original driver in order to maintain the same structure. - Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK" in the same style as the original driver. Dario Binacchi (8): dt-bindings: mfd: stm32f7: Add binding definition for DSI ARM: dts: stm32: add DSI support on stm32f769 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco ARM: dts: stm32: add display support on stm32f769-disco dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK ARM: dts: add stm32f769-disco-mb1225-revb03-mb1166-reva09 drm/panel: nt35510: move hardwired parameters to configuration drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK .../display/panel/novatek,nt35510.yaml| 4 +- arch/arm/boot/dts/st/Makefile | 1 + ...f769-disco-mb1225-revb03-mb1166-reva09.dts | 18 + arch/arm/boot/dts/st/stm32f769-disco.dts | 78 +++- arch/arm/boot/dts/st/stm32f769.dtsi | 21 + drivers/gpu/drm/panel/panel-novatek-nt35510.c | 424 +++--- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 7 files changed, 485 insertions(+), 62 deletions(-) create mode 100644 arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi -- 2.43.0
Re: [PATCH v4 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
On Sun, Jan 7, 2024 at 9:02 PM Linus Walleij wrote:
>
> On Sat, Jan 6, 2024 at 12:07 PM Dario Binacchi
> wrote:
>
> > After submitting v4, I tested the driver under different conditions,
> > i. e. without enabling display support in
> > U-Boot (I also implemented a version for U-Boot, which I will send
> > only after this series is merged into
> > the Linux kernel). In that condition I encountered an issue with the reset
> > pin.
> >
> > The minimal fix, would be this:
> >
> > diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
> > b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
> > index c85dd0d0829d..89ba99763468 100644
> > --- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
> > +++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
> > @@ -1133,7 +1133,7 @@ static int nt35510_probe(struct mipi_dsi_device *dsi)
> > if (ret)
> > return ret;
> >
> > - nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
> > + nt->reset_gpio = devm_gpiod_get_optional(dev, "reset",
> > GPIOD_OUT_HIGH);
>
>
> This is fine, because we later on toggle reset in nt35510_power_on(),
> this just asserts the reset signal already in probe.
>
> I don't see why this would make a difference though?
>
> Is it to make the reset delete artifacts from the screen?
>
> Just explain it in the commit message.
>
> It is a bit confusing when I look at your DTS patch:
>
> https://lore.kernel.org/linux-arm-kernel/20240104084206.721824-7-dario.binac...@amarulasolutions.com/
>
> this doesn't even contain a reset GPIO, so nothing will happen
> at all?
+++ b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2023 Dario Binacchi
+ */
+
+#include "stm32f769-disco.dts"
+
The GPIO is contained in the stm32f769-disco.dts:
panel0: panel-dsi@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
power-supply = <&vcc_3v3>;
backlight = <&panel_backlight>;
status = "okay";
...
};
>
> > I then tried modifying the device tree instead of the nt35510 driver.
> > In the end, I arrived
> > at this patch that leaves me with some doubts, especially regarding
> > the strict option.
> >
> > diff --git
> > a/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
> > b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-m>
> > index 014cac192375..32ed420a6cbf 100644
> > --- a/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
> > +++ b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
> > @@ -13,6 +13,17 @@ &panel0 {
> > compatible = "frida,frd400b25025", "novatek,nt35510";
> > vddi-supply = <&vcc_3v3>;
> > vdd-supply = <&vcc_3v3>;
> > + pinctrl-0 = <&panel_reset>;
> > + pinctrl-names = "default";
> > /delete-property/backlight;
> > /delete-property/power-supply;
> > };
> > +
> > +&pinctrl {
> > + panel_reset: panel-reset {
> > + pins1 {
> > + pinmux = ;
> > + output-high;
>
> But this achieves the *opposite* of what you do in the
> other patch. This sets the reset line de-asserted since it is
> active low.
>
> Did you add the reset line to your device tree and forgot to
> set it as GPIO_ACTIVE_LOW perhaps?
panel0: panel-dsi@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
>
> > --- a/drivers/pinctrl/stm32/pinctrl-stm32.c
> > +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
> > @@ -895,7 +895,6 @@ static const struct pinmux_ops stm32_pmx_ops = {
> > .set_mux= stm32_pmx_set_mux,
> > .gpio_set_direction = stm32_pmx_gpio_set_direction,
> > .request= stm32_pmx_request,
> > - .strict = true,
>
> To be honest this is what I use a lot of the time, with non-strict
> pin control you can set up default GPIO values using the pin control
> device tree, and it's really simple and easy to read like that since e.g.
> in this case you set it from the panel device node which is what
> is also consuming the GPIO, so very logical. So I
> would ce
Re: [PATCH v4 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
On Fri, Jan 5, 2024 at 8:09 PM Linus Walleij wrote:
>
> On Thu, Jan 4, 2024 at 9:42 AM Dario Binacchi
> wrote:
>
> > The initialization commands are taken from the STMicroelectronics driver
> > found at [1].
> > To ensure backward compatibility, flags have been added to enable gamma
> > correction setting and display control. In other cases, registers have
> > been set to their default values according to the specifications found
> > in the datasheet.
> >
> > [1]
> > https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Drivers/BSP/Components/nt35510/
> > Signed-off-by: Dario Binacchi
> >
> > ---
> >
> > (no changes since v2)
>
> Reviewed-by: Linus Walleij
> (also tested to not regress my hardware)
After submitting v4, I tested the driver under different conditions,
i. e. without enabling display support in
U-Boot (I also implemented a version for U-Boot, which I will send
only after this series is merged into
the Linux kernel). In that condition I encountered an issue with the reset pin.
The minimal fix, would be this:
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index c85dd0d0829d..89ba99763468 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -1133,7 +1133,7 @@ static int nt35510_probe(struct mipi_dsi_device *dsi)
if (ret)
return ret;
- nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
+ nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(nt->reset_gpio)) {
dev_err(dev, "error getting RESET GPIO\n");
return PTR_ERR(nt->reset_gpio);
With the doubt that this might cause a regression in your use case.
I then tried modifying the device tree instead of the nt35510 driver.
In the end, I arrived
at this patch that leaves me with some doubts, especially regarding
the strict option.
diff --git
a/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-m>
index 014cac192375..32ed420a6cbf 100644
--- a/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
+++ b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
@@ -13,6 +13,17 @@ &panel0 {
compatible = "frida,frd400b25025", "novatek,nt35510";
vddi-supply = <&vcc_3v3>;
vdd-supply = <&vcc_3v3>;
+ pinctrl-0 = <&panel_reset>;
+ pinctrl-names = "default";
/delete-property/backlight;
/delete-property/power-supply;
};
+
+&pinctrl {
+ panel_reset: panel-reset {
+ pins1 {
+ pinmux = ;
+ output-high;
+ };
+ };
+};
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c
b/drivers/pinctrl/stm32/pinctrl-stm32.c
index 346a31f31bba..6f055f7f96a2 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -895,7 +895,6 @@ static const struct pinmux_ops stm32_pmx_ops = {
.set_mux= stm32_pmx_set_mux,
.gpio_set_direction = stm32_pmx_gpio_set_direction,
.request= stm32_pmx_request,
- .strict = true,
};
Another option to fix my use case without introducing regressions
could be to add a
new property to the device tree that suggests whether to call
devm_gpiod_get_optional()
with the GPIOD_ASIS or GPIOD_OUT_HIGH parameter.
What is your opinion?
Thanks and regards,
Dario Binacchi
>
> Yours,
> Linus Walleij
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH v4 7/8] drm/panel: nt35510: move hardwired parameters to configuration
On Fri, Jan 5, 2024 at 8:08 PM Linus Walleij wrote:
>
> On Thu, Jan 4, 2024 at 9:42 AM Dario Binacchi
> wrote:
>
> > This patch, preparatory for future developments, move the hardwired
> > parameters to configuration data to allow the addition of new
> > NT35510-based panels.
> >
> > Signed-off-by: Dario Binacchi
>
> I tested this patch on the NT35510-based Skomer and it makes the
> whole display mirrored around the Y-axis (text from right to left instead
> of the other way around, penguins appear mirrored upper right
> etc).
>
> + /* Enable TE, EoTP and RGB pixel format */
> + .dopctr = { NT35510_DOPCTR_0_DSITE | NT35510_DOPCTR_0_EOTP |
> + NT35510_DOPCTR_0_N565, NT35510_DOPCTR_1_CTB },
> + .madctl = NT35510_ROTATE_180_SETTING,
>
> Changing this to NT35510_ROTATE_0_SETTING makes it work
> fine again.
Sorry for the mistake
Thanks and regards,
Dario Binacchi
>
> With that change:
> Reviewed-by: Linus Walleij
> Tested-by: Linus Walleij
>
> Yours,
> Linus Walleij
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
[PATCH v4 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
The initialization commands are taken from the STMicroelectronics driver
found at [1].
To ensure backward compatibility, flags have been added to enable gamma
correction setting and display control. In other cases, registers have
been set to their default values according to the specifications found
in the datasheet.
[1]
https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Drivers/BSP/Components/nt35510/
Signed-off-by: Dario Binacchi
---
(no changes since v2)
Changes in v2:
- Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA
FRD400B25025-A-CTK"
in the same style as the original driver.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 282 --
1 file changed, 251 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index ce8969f48286..c85dd0d0829d 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -36,6 +36,9 @@
#include
#include
+#define NT35510_CMD_CORRECT_GAMMA BIT(0)
+#define NT35510_CMD_CONTROL_DISPLAY BIT(1)
+
#define MCS_CMD_MAUCCTR0xF0 /* Manufacturer command enable */
#define MCS_CMD_READ_ID1 0xDA
#define MCS_CMD_READ_ID2 0xDB
@@ -112,18 +115,33 @@
/* AVDD and AVEE setting 3 bytes */
#define NT35510_P1_AVDD_LEN 3
#define NT35510_P1_AVEE_LEN 3
+#define NT35510_P1_VCL_LEN 3
#define NT35510_P1_VGH_LEN 3
#define NT35510_P1_VGL_LEN 3
#define NT35510_P1_VGP_LEN 3
#define NT35510_P1_VGN_LEN 3
+#define NT35510_P1_VCMOFF_LEN 2
/* BT1CTR thru BT5CTR setting 3 bytes */
#define NT35510_P1_BT1CTR_LEN 3
#define NT35510_P1_BT2CTR_LEN 3
+#define NT35510_P1_BT3CTR_LEN 3
#define NT35510_P1_BT4CTR_LEN 3
#define NT35510_P1_BT5CTR_LEN 3
/* 52 gamma parameters times two per color: positive and negative */
#define NT35510_P1_GAMMA_LEN 52
+#define NT35510_WRCTRLD_BCTRL BIT(5)
+#define NT35510_WRCTRLD_A BIT(4)
+#define NT35510_WRCTRLD_DD BIT(3)
+#define NT35510_WRCTRLD_BL BIT(2)
+#define NT35510_WRCTRLD_DB BIT(1)
+#define NT35510_WRCTRLD_G BIT(0)
+
+#define NT35510_WRCABC_OFF 0
+#define NT35510_WRCABC_UI_MODE 1
+#define NT35510_WRCABC_STILL_MODE 2
+#define NT35510_WRCABC_MOVING_MODE 3
+
/**
* struct nt35510_config - the display-specific NT35510 configuration
*
@@ -175,6 +193,10 @@ struct nt35510_config {
* @mode_flags: DSI operation mode related flags
*/
unsigned long mode_flags;
+ /**
+* @cmds: enable DSI commands
+*/
+ u32 cmds;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -224,6 +246,25 @@ struct nt35510_config {
* The defaults are 4 and 3 yielding 0x34
*/
u8 bt2ctr[NT35510_P1_BT2CTR_LEN];
+ /**
+* @vcl: setting for VCL ranging from 0x00 = -2.5V to 0x11 = -4.0V
+* in 1V steps, the default is 0x00 which means -2.5V
+*/
+ u8 vcl[NT35510_P1_VCL_LEN];
+ /**
+* @bt3ctr: setting for boost power control for the VCL step-up
+* circuit (3)
+* bits 0..2 in the lower nibble controls CLCK, the booster clock
+* frequency, the values are the same as for PCK in @bt1ctr.
+* bits 4..5 in the upper nibble controls BTCL, the boosting
+* amplification for the step-up circuit.
+* 0 = Disable
+* 1 = -0.5 x VDDB
+* 2 = -1 x VDDB
+* 3 = -2 x VDDB
+* The defaults are 4 and 2 yielding 0x24
+*/
+ u8 bt3ctr[NT35510_P1_BT3CTR_LEN];
/**
* @vgh: setting for VGH ranging from 0x00 = 7.0V to 0x0B = 18.0V
* in 1V steps, the default is 0x08 which means 15V
@@ -277,6 +318,19 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @vcmoff: setting the DC VCOM offset voltage
+* The first byte contains bit 8 of VCM in bit 0 and VCMOFFSEL in bit 4.
+* The second byte contains bits 0..7 of VCM.
+* VCMOFFSEL the common voltage offset mode.
+* VCMOFFSEL 0x00 = VCOM .. 0x01 Gamma.
+* The default is 0x00.
+* VCM the VCOM output voltage (VCMOFFSEL = 0) or the internal register
+* offset for gamma voltage (VCMOFFSEL = 1).
+* VCM 0x00 = 0V/0 .. 0x118 = 3.5V/280 in steps of 12.5mV/1step
+* The default is 0x00 = 0V/0.
+*/
+ u8 vcmoff[NT35510_P1_VCMOFF_LEN];
/**
* @dopctr: setting optional control for display
* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
@@ -441,6 +495,43 @@ struct nt35510_config {
* @gamma_corr_neg_b: Blue gamma correction parameters, negative
*/
u8 gamma_corr_neg_b[NT35510_P1_GAMMA_LEN];
+ /**
+* @wrdisbv: write display brightness
+* 0x00 value means the lowest brightness and
[PATCH v4 7/8] drm/panel: nt35510: move hardwired parameters to configuration
This patch, preparatory for future developments, move the hardwired
parameters to configuration data to allow the addition of new
NT35510-based panels.
Signed-off-by: Dario Binacchi
---
(no changes since v2)
Changes in v2:
- Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization"
in the same style as the original driver in order to maintain the same
structure.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 140 ++
1 file changed, 115 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index d6dceb858008..ce8969f48286 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -171,6 +171,10 @@ struct nt35510_config {
* timing in the display controller.
*/
const struct drm_display_mode mode;
+ /**
+* @mode_flags: DSI operation mode related flags
+*/
+ unsigned long mode_flags;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -273,6 +277,100 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @dopctr: setting optional control for display
+* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
+* 0 = Disable, ERR pin output low
+* 1 = ERR pin output CRC error only
+* 2 = ERR pin output ECC error only
+* 3 = ERR pin output CRC and ECC error
+* The default is 0.
+* N565 bit 2 in the first byte is the 16-bit/pixel format selection.
+* 0 = R[4:0] + G[5:3] & G[2:0] + B[4:0]
+* 1 = G[2:0] + R[4:0] & B[4:0] + G[5:3]
+* The default is 0.
+* DIS_EoTP_HS bit 3 in the first byte is "DSI protocol violation" error
+* reporting.
+* 0 = reporting when error
+* 1 = not reporting when error
+* DSIM bit 4 in the first byte is the video mode data type enable
+* 0 = Video mode data type disable
+* 1 = Video mode data type enable
+* The default is 0.
+* DSIG bit 5 int the first byte is the generic r/w data type enable
+* 0 = Generic r/w disable
+* 1 = Generic r/w enable
+* The default is 0.
+* DSITE bit 6 in the first byte is TE line enable
+* 0 = TE line is disabled
+* 1 = TE line is enabled
+* The default is 0.
+* RAMKP bit 7 in the first byte is the frame memory keep/loss in
+* sleep-in mode
+* 0 = contents loss in sleep-in
+* 1 = contents keep in sleep-in
+* The default is 0.
+* CRL bit 1 in the second byte is the source driver data shift
+* direction selection. This bit is XOR operation with bit RSMX
+* of 3600h command.
+* 0 (RMSX = 0) = S1 -> S1440
+* 0 (RMSX = 1) = S1440 -> S1
+* 1 (RMSX = 0) = S1440 -> S1
+* 1 (RMSX = 1) = S1 -> S1440
+* The default is 0.
+* CTB bit 2 in the second byte is the vertical scanning direction
+* selection for gate control signals. This bit is XOR operation
+* with bit ML of 3600h command.
+* 0 (ML = 0) = Forward (top -> bottom)
+* 0 (ML = 1) = Reverse (bottom -> top)
+* 1 (ML = 0) = Reverse (bottom -> top)
+* 1 (ML = 1) = Forward (top -> bottom)
+* The default is 0.
+* CRGB bit 3 in the second byte is RGB-BGR order selection. This
+* bit is XOR operation with bit RGB of 3600h command.
+* 0 (RGB = 0) = RGB/Normal
+* 0 (RGB = 1) = BGR/RB swap
+* 1 (RGB = 0) = BGR/RB swap
+* 1 (RGB = 1) = RGB/Normal
+* The default is 0.
+* TE_PWR_SEL bit 4 in the second byte is the TE output voltage
+* level selection (only valid when DSTB_SEL = 0 or DSTB_SEL = 1,
+* VSEL = High and VDDI = 1.665~3.3V).
+* 0 = TE output voltage level is VDDI
+* 1 = TE output voltage level is VDDA
+* The default is 0.
+*/
+ u8 dopctr[NT35510_P0_DOPCTR_LEN];
+ /**
+* @madctl: Memory data access control
+* RSMY bit 0 is flip vertical. Flips the display image top to down.
+* RSMX bit 1 is flip horizontal. Flips the display image left to right.
+* MH bit 2 is the horizontal refresh order.
+* RGB bit 3 is the RGB-BGR order.
+* 0 = RGB color sequence
+* 1 = BGR color sequence
+* ML bit 4 is the vertical refresh order.
+* MV bit 5 is the row/column exchange.
+* MX bit 6 is the column address order.
+* MY bit 7 is the row address order.
+*/
+ u8 madctl;
+ /**
+* @sdhdtctr: source output data hold time
+* 0x00..0x3F = 0..31.5us in s
[PATCH v4 5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the Novatek NT35510-based panel family. Signed-off-by: Dario Binacchi --- Changes in v4: - Put the "enum" list in alphabetical order Changes in v3: - Use "enum" to have less code changed Changes in v2: - Add a dash in front of each "items:" .../devicetree/bindings/display/panel/novatek,nt35510.yaml| 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml index bc92928c805b..a4afaff483b7 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml @@ -15,7 +15,9 @@ allOf: properties: compatible: items: - - const: hydis,hva40wv1 + - enum: + - frida,frd400b25025 + - hydis,hva40wv1 - const: novatek,nt35510 description: This indicates the panel manufacturer of the panel that is in turn using the NT35510 panel driver. The compatible -- 2.43.0
[PATCH v4 0/8] Add display support for stm32f769-disco board
The series adds display support for the stm32f769-disco board. It has been tested on hardware revisions MB1225-B03 and MB1166-A09. This required modifications to the nt35510 driver. As I do not have the Hydis HVA40WV1 display, it would be better if someone tested the driver in that configuration. Changes in v4: - Put the "enum" list in alphabetical order Changes in v3: - Use "enum" to have less code changed Changes in v2: - Add Acked-by tag of Conor Dooley - Add a dash in front of each "items:" - Change the status of panel_backlight node to "disabled" - Delete backlight property from panel0 node. - Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization" in the same style as the original driver in order to maintain the same structure. - Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK" in the same style as the original driver. Dario Binacchi (8): dt-bindings: mfd: stm32f7: Add binding definition for DSI ARM: dts: stm32: add DSI support on stm32f769 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco ARM: dts: stm32: add display support on stm32f769-disco dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK ARM: dts: add stm32f769-disco-mb1225-revb03-mb1166-reva09 drm/panel: nt35510: move hardwired parameters to configuration drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK .../display/panel/novatek,nt35510.yaml| 4 +- arch/arm/boot/dts/st/Makefile | 1 + ...f769-disco-mb1225-revb03-mb1166-reva09.dts | 18 + arch/arm/boot/dts/st/stm32f769-disco.dts | 78 +++- arch/arm/boot/dts/st/stm32f769.dtsi | 21 + drivers/gpu/drm/panel/panel-novatek-nt35510.c | 422 +++--- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 7 files changed, 484 insertions(+), 61 deletions(-) create mode 100644 arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi -- 2.43.0
[PATCH v3 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
The initialization commands are taken from the STMicroelectronics driver
found at [1].
To ensure backward compatibility, flags have been added to enable gamma
correction setting and display control. In other cases, registers have
been set to their default values according to the specifications found
in the datasheet.
[1]
https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Drivers/BSP/Components/nt35510/
Signed-off-by: Dario Binacchi
---
(no changes since v2)
Changes in v2:
- Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA
FRD400B25025-A-CTK"
in the same style as the original driver.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 282 --
1 file changed, 251 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index ce8969f48286..c85dd0d0829d 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -36,6 +36,9 @@
#include
#include
+#define NT35510_CMD_CORRECT_GAMMA BIT(0)
+#define NT35510_CMD_CONTROL_DISPLAY BIT(1)
+
#define MCS_CMD_MAUCCTR0xF0 /* Manufacturer command enable */
#define MCS_CMD_READ_ID1 0xDA
#define MCS_CMD_READ_ID2 0xDB
@@ -112,18 +115,33 @@
/* AVDD and AVEE setting 3 bytes */
#define NT35510_P1_AVDD_LEN 3
#define NT35510_P1_AVEE_LEN 3
+#define NT35510_P1_VCL_LEN 3
#define NT35510_P1_VGH_LEN 3
#define NT35510_P1_VGL_LEN 3
#define NT35510_P1_VGP_LEN 3
#define NT35510_P1_VGN_LEN 3
+#define NT35510_P1_VCMOFF_LEN 2
/* BT1CTR thru BT5CTR setting 3 bytes */
#define NT35510_P1_BT1CTR_LEN 3
#define NT35510_P1_BT2CTR_LEN 3
+#define NT35510_P1_BT3CTR_LEN 3
#define NT35510_P1_BT4CTR_LEN 3
#define NT35510_P1_BT5CTR_LEN 3
/* 52 gamma parameters times two per color: positive and negative */
#define NT35510_P1_GAMMA_LEN 52
+#define NT35510_WRCTRLD_BCTRL BIT(5)
+#define NT35510_WRCTRLD_A BIT(4)
+#define NT35510_WRCTRLD_DD BIT(3)
+#define NT35510_WRCTRLD_BL BIT(2)
+#define NT35510_WRCTRLD_DB BIT(1)
+#define NT35510_WRCTRLD_G BIT(0)
+
+#define NT35510_WRCABC_OFF 0
+#define NT35510_WRCABC_UI_MODE 1
+#define NT35510_WRCABC_STILL_MODE 2
+#define NT35510_WRCABC_MOVING_MODE 3
+
/**
* struct nt35510_config - the display-specific NT35510 configuration
*
@@ -175,6 +193,10 @@ struct nt35510_config {
* @mode_flags: DSI operation mode related flags
*/
unsigned long mode_flags;
+ /**
+* @cmds: enable DSI commands
+*/
+ u32 cmds;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -224,6 +246,25 @@ struct nt35510_config {
* The defaults are 4 and 3 yielding 0x34
*/
u8 bt2ctr[NT35510_P1_BT2CTR_LEN];
+ /**
+* @vcl: setting for VCL ranging from 0x00 = -2.5V to 0x11 = -4.0V
+* in 1V steps, the default is 0x00 which means -2.5V
+*/
+ u8 vcl[NT35510_P1_VCL_LEN];
+ /**
+* @bt3ctr: setting for boost power control for the VCL step-up
+* circuit (3)
+* bits 0..2 in the lower nibble controls CLCK, the booster clock
+* frequency, the values are the same as for PCK in @bt1ctr.
+* bits 4..5 in the upper nibble controls BTCL, the boosting
+* amplification for the step-up circuit.
+* 0 = Disable
+* 1 = -0.5 x VDDB
+* 2 = -1 x VDDB
+* 3 = -2 x VDDB
+* The defaults are 4 and 2 yielding 0x24
+*/
+ u8 bt3ctr[NT35510_P1_BT3CTR_LEN];
/**
* @vgh: setting for VGH ranging from 0x00 = 7.0V to 0x0B = 18.0V
* in 1V steps, the default is 0x08 which means 15V
@@ -277,6 +318,19 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @vcmoff: setting the DC VCOM offset voltage
+* The first byte contains bit 8 of VCM in bit 0 and VCMOFFSEL in bit 4.
+* The second byte contains bits 0..7 of VCM.
+* VCMOFFSEL the common voltage offset mode.
+* VCMOFFSEL 0x00 = VCOM .. 0x01 Gamma.
+* The default is 0x00.
+* VCM the VCOM output voltage (VCMOFFSEL = 0) or the internal register
+* offset for gamma voltage (VCMOFFSEL = 1).
+* VCM 0x00 = 0V/0 .. 0x118 = 3.5V/280 in steps of 12.5mV/1step
+* The default is 0x00 = 0V/0.
+*/
+ u8 vcmoff[NT35510_P1_VCMOFF_LEN];
/**
* @dopctr: setting optional control for display
* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
@@ -441,6 +495,43 @@ struct nt35510_config {
* @gamma_corr_neg_b: Blue gamma correction parameters, negative
*/
u8 gamma_corr_neg_b[NT35510_P1_GAMMA_LEN];
+ /**
+* @wrdisbv: write display brightness
+* 0x00 value means the lowest brightness and
[PATCH v3 7/8] drm/panel: nt35510: move hardwired parameters to configuration
This patch, preparatory for future developments, move the hardwired
parameters to configuration data to allow the addition of new
NT35510-based panels.
Signed-off-by: Dario Binacchi
---
(no changes since v2)
Changes in v2:
- Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization"
in the same style as the original driver in order to maintain the same
structure.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 140 ++
1 file changed, 115 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index d6dceb858008..ce8969f48286 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -171,6 +171,10 @@ struct nt35510_config {
* timing in the display controller.
*/
const struct drm_display_mode mode;
+ /**
+* @mode_flags: DSI operation mode related flags
+*/
+ unsigned long mode_flags;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -273,6 +277,100 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @dopctr: setting optional control for display
+* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
+* 0 = Disable, ERR pin output low
+* 1 = ERR pin output CRC error only
+* 2 = ERR pin output ECC error only
+* 3 = ERR pin output CRC and ECC error
+* The default is 0.
+* N565 bit 2 in the first byte is the 16-bit/pixel format selection.
+* 0 = R[4:0] + G[5:3] & G[2:0] + B[4:0]
+* 1 = G[2:0] + R[4:0] & B[4:0] + G[5:3]
+* The default is 0.
+* DIS_EoTP_HS bit 3 in the first byte is "DSI protocol violation" error
+* reporting.
+* 0 = reporting when error
+* 1 = not reporting when error
+* DSIM bit 4 in the first byte is the video mode data type enable
+* 0 = Video mode data type disable
+* 1 = Video mode data type enable
+* The default is 0.
+* DSIG bit 5 int the first byte is the generic r/w data type enable
+* 0 = Generic r/w disable
+* 1 = Generic r/w enable
+* The default is 0.
+* DSITE bit 6 in the first byte is TE line enable
+* 0 = TE line is disabled
+* 1 = TE line is enabled
+* The default is 0.
+* RAMKP bit 7 in the first byte is the frame memory keep/loss in
+* sleep-in mode
+* 0 = contents loss in sleep-in
+* 1 = contents keep in sleep-in
+* The default is 0.
+* CRL bit 1 in the second byte is the source driver data shift
+* direction selection. This bit is XOR operation with bit RSMX
+* of 3600h command.
+* 0 (RMSX = 0) = S1 -> S1440
+* 0 (RMSX = 1) = S1440 -> S1
+* 1 (RMSX = 0) = S1440 -> S1
+* 1 (RMSX = 1) = S1 -> S1440
+* The default is 0.
+* CTB bit 2 in the second byte is the vertical scanning direction
+* selection for gate control signals. This bit is XOR operation
+* with bit ML of 3600h command.
+* 0 (ML = 0) = Forward (top -> bottom)
+* 0 (ML = 1) = Reverse (bottom -> top)
+* 1 (ML = 0) = Reverse (bottom -> top)
+* 1 (ML = 1) = Forward (top -> bottom)
+* The default is 0.
+* CRGB bit 3 in the second byte is RGB-BGR order selection. This
+* bit is XOR operation with bit RGB of 3600h command.
+* 0 (RGB = 0) = RGB/Normal
+* 0 (RGB = 1) = BGR/RB swap
+* 1 (RGB = 0) = BGR/RB swap
+* 1 (RGB = 1) = RGB/Normal
+* The default is 0.
+* TE_PWR_SEL bit 4 in the second byte is the TE output voltage
+* level selection (only valid when DSTB_SEL = 0 or DSTB_SEL = 1,
+* VSEL = High and VDDI = 1.665~3.3V).
+* 0 = TE output voltage level is VDDI
+* 1 = TE output voltage level is VDDA
+* The default is 0.
+*/
+ u8 dopctr[NT35510_P0_DOPCTR_LEN];
+ /**
+* @madctl: Memory data access control
+* RSMY bit 0 is flip vertical. Flips the display image top to down.
+* RSMX bit 1 is flip horizontal. Flips the display image left to right.
+* MH bit 2 is the horizontal refresh order.
+* RGB bit 3 is the RGB-BGR order.
+* 0 = RGB color sequence
+* 1 = BGR color sequence
+* ML bit 4 is the vertical refresh order.
+* MV bit 5 is the row/column exchange.
+* MX bit 6 is the column address order.
+* MY bit 7 is the row address order.
+*/
+ u8 madctl;
+ /**
+* @sdhdtctr: source output data hold time
+* 0x00..0x3F = 0..31.5us in s
[PATCH v3 5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the Novatek NT35510-based panel family. Signed-off-by: Dario Binacchi --- Changes in v3: - Use "enum" to have less code changed Changes in v2: - Add a dash in front of each "items:" .../devicetree/bindings/display/panel/novatek,nt35510.yaml| 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml index bc92928c805b..43afb316e0e9 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml @@ -15,7 +15,9 @@ allOf: properties: compatible: items: - - const: hydis,hva40wv1 + - enum: + - hydis,hva40wv1 + - frida,frd400b25025 - const: novatek,nt35510 description: This indicates the panel manufacturer of the panel that is in turn using the NT35510 panel driver. The compatible -- 2.43.0
[PATCH v3 0/8] Add display support for stm32f769-disco board
The series adds display support for the stm32f769-disco board. It has been tested on hardware revisions MB1225-B03 and MB1166-A09. This required modifications to the nt35510 driver. As I do not have the Hydis HVA40WV1 display, it would be better if someone tested the driver in that configuration. Changes in v3: - Use "enum" to have less code changed Changes in v2: - Add Acked-by tag of Conor Dooley - Add a dash in front of each "items:" - Change the status of panel_backlight node to "disabled" - Delete backlight property from panel0 node. - Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization" in the same style as the original driver in order to maintain the same structure. - Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK" in the same style as the original driver. Dario Binacchi (8): dt-bindings: mfd: stm32f7: Add binding definition for DSI ARM: dts: stm32: add DSI support on stm32f769 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco ARM: dts: stm32: add display support on stm32f769-disco dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK ARM: dts: add stm32f769-disco-mb1225-revb03-mb1166-reva09 drm/panel: nt35510: move hardwired parameters to configuration drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK .../display/panel/novatek,nt35510.yaml| 4 +- arch/arm/boot/dts/st/Makefile | 1 + ...f769-disco-mb1225-revb03-mb1166-reva09.dts | 18 + arch/arm/boot/dts/st/stm32f769-disco.dts | 78 +++- arch/arm/boot/dts/st/stm32f769.dtsi | 21 + drivers/gpu/drm/panel/panel-novatek-nt35510.c | 422 +++--- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 7 files changed, 484 insertions(+), 61 deletions(-) create mode 100644 arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi -- 2.43.0
[PATCH v2 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
The initialization commands are taken from the STMicroelectronics driver
found at [1].
To ensure backward compatibility, flags have been added to enable gamma
correction setting and display control. In other cases, registers have
been set to their default values according to the specifications found
in the datasheet.
[1]
https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Drivers/BSP/Components/nt35510/
Signed-off-by: Dario Binacchi
---
Changes in v2:
- Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA
FRD400B25025-A-CTK"
in the same style as the original driver.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 282 --
1 file changed, 251 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index ce8969f48286..c85dd0d0829d 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -36,6 +36,9 @@
#include
#include
+#define NT35510_CMD_CORRECT_GAMMA BIT(0)
+#define NT35510_CMD_CONTROL_DISPLAY BIT(1)
+
#define MCS_CMD_MAUCCTR0xF0 /* Manufacturer command enable */
#define MCS_CMD_READ_ID1 0xDA
#define MCS_CMD_READ_ID2 0xDB
@@ -112,18 +115,33 @@
/* AVDD and AVEE setting 3 bytes */
#define NT35510_P1_AVDD_LEN 3
#define NT35510_P1_AVEE_LEN 3
+#define NT35510_P1_VCL_LEN 3
#define NT35510_P1_VGH_LEN 3
#define NT35510_P1_VGL_LEN 3
#define NT35510_P1_VGP_LEN 3
#define NT35510_P1_VGN_LEN 3
+#define NT35510_P1_VCMOFF_LEN 2
/* BT1CTR thru BT5CTR setting 3 bytes */
#define NT35510_P1_BT1CTR_LEN 3
#define NT35510_P1_BT2CTR_LEN 3
+#define NT35510_P1_BT3CTR_LEN 3
#define NT35510_P1_BT4CTR_LEN 3
#define NT35510_P1_BT5CTR_LEN 3
/* 52 gamma parameters times two per color: positive and negative */
#define NT35510_P1_GAMMA_LEN 52
+#define NT35510_WRCTRLD_BCTRL BIT(5)
+#define NT35510_WRCTRLD_A BIT(4)
+#define NT35510_WRCTRLD_DD BIT(3)
+#define NT35510_WRCTRLD_BL BIT(2)
+#define NT35510_WRCTRLD_DB BIT(1)
+#define NT35510_WRCTRLD_G BIT(0)
+
+#define NT35510_WRCABC_OFF 0
+#define NT35510_WRCABC_UI_MODE 1
+#define NT35510_WRCABC_STILL_MODE 2
+#define NT35510_WRCABC_MOVING_MODE 3
+
/**
* struct nt35510_config - the display-specific NT35510 configuration
*
@@ -175,6 +193,10 @@ struct nt35510_config {
* @mode_flags: DSI operation mode related flags
*/
unsigned long mode_flags;
+ /**
+* @cmds: enable DSI commands
+*/
+ u32 cmds;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -224,6 +246,25 @@ struct nt35510_config {
* The defaults are 4 and 3 yielding 0x34
*/
u8 bt2ctr[NT35510_P1_BT2CTR_LEN];
+ /**
+* @vcl: setting for VCL ranging from 0x00 = -2.5V to 0x11 = -4.0V
+* in 1V steps, the default is 0x00 which means -2.5V
+*/
+ u8 vcl[NT35510_P1_VCL_LEN];
+ /**
+* @bt3ctr: setting for boost power control for the VCL step-up
+* circuit (3)
+* bits 0..2 in the lower nibble controls CLCK, the booster clock
+* frequency, the values are the same as for PCK in @bt1ctr.
+* bits 4..5 in the upper nibble controls BTCL, the boosting
+* amplification for the step-up circuit.
+* 0 = Disable
+* 1 = -0.5 x VDDB
+* 2 = -1 x VDDB
+* 3 = -2 x VDDB
+* The defaults are 4 and 2 yielding 0x24
+*/
+ u8 bt3ctr[NT35510_P1_BT3CTR_LEN];
/**
* @vgh: setting for VGH ranging from 0x00 = 7.0V to 0x0B = 18.0V
* in 1V steps, the default is 0x08 which means 15V
@@ -277,6 +318,19 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @vcmoff: setting the DC VCOM offset voltage
+* The first byte contains bit 8 of VCM in bit 0 and VCMOFFSEL in bit 4.
+* The second byte contains bits 0..7 of VCM.
+* VCMOFFSEL the common voltage offset mode.
+* VCMOFFSEL 0x00 = VCOM .. 0x01 Gamma.
+* The default is 0x00.
+* VCM the VCOM output voltage (VCMOFFSEL = 0) or the internal register
+* offset for gamma voltage (VCMOFFSEL = 1).
+* VCM 0x00 = 0V/0 .. 0x118 = 3.5V/280 in steps of 12.5mV/1step
+* The default is 0x00 = 0V/0.
+*/
+ u8 vcmoff[NT35510_P1_VCMOFF_LEN];
/**
* @dopctr: setting optional control for display
* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
@@ -441,6 +495,43 @@ struct nt35510_config {
* @gamma_corr_neg_b: Blue gamma correction parameters, negative
*/
u8 gamma_corr_neg_b[NT35510_P1_GAMMA_LEN];
+ /**
+* @wrdisbv: write display brightness
+* 0x00 value means the lowest brightness and 0xff value means
+
[PATCH v2 7/8] drm/panel: nt35510: move hardwired parameters to configuration
This patch, preparatory for future developments, move the hardwired
parameters to configuration data to allow the addition of new
NT35510-based panels.
Signed-off-by: Dario Binacchi
---
Changes in v2:
- Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization"
in the same style as the original driver in order to maintain the same
structure.
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 140 ++
1 file changed, 115 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index d6dceb858008..ce8969f48286 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -171,6 +171,10 @@ struct nt35510_config {
* timing in the display controller.
*/
const struct drm_display_mode mode;
+ /**
+* @mode_flags: DSI operation mode related flags
+*/
+ unsigned long mode_flags;
/**
* @avdd: setting for AVDD ranging from 0x00 = 6.5V to 0x14 = 4.5V
* in 0.1V steps the default is 0x05 which means 6.0V
@@ -273,6 +277,100 @@ struct nt35510_config {
* same layout of bytes as @vgp.
*/
u8 vgn[NT35510_P1_VGN_LEN];
+ /**
+* @dopctr: setting optional control for display
+* ERR bits 0..1 in the first byte is the ERR pin output signal setting.
+* 0 = Disable, ERR pin output low
+* 1 = ERR pin output CRC error only
+* 2 = ERR pin output ECC error only
+* 3 = ERR pin output CRC and ECC error
+* The default is 0.
+* N565 bit 2 in the first byte is the 16-bit/pixel format selection.
+* 0 = R[4:0] + G[5:3] & G[2:0] + B[4:0]
+* 1 = G[2:0] + R[4:0] & B[4:0] + G[5:3]
+* The default is 0.
+* DIS_EoTP_HS bit 3 in the first byte is "DSI protocol violation" error
+* reporting.
+* 0 = reporting when error
+* 1 = not reporting when error
+* DSIM bit 4 in the first byte is the video mode data type enable
+* 0 = Video mode data type disable
+* 1 = Video mode data type enable
+* The default is 0.
+* DSIG bit 5 int the first byte is the generic r/w data type enable
+* 0 = Generic r/w disable
+* 1 = Generic r/w enable
+* The default is 0.
+* DSITE bit 6 in the first byte is TE line enable
+* 0 = TE line is disabled
+* 1 = TE line is enabled
+* The default is 0.
+* RAMKP bit 7 in the first byte is the frame memory keep/loss in
+* sleep-in mode
+* 0 = contents loss in sleep-in
+* 1 = contents keep in sleep-in
+* The default is 0.
+* CRL bit 1 in the second byte is the source driver data shift
+* direction selection. This bit is XOR operation with bit RSMX
+* of 3600h command.
+* 0 (RMSX = 0) = S1 -> S1440
+* 0 (RMSX = 1) = S1440 -> S1
+* 1 (RMSX = 0) = S1440 -> S1
+* 1 (RMSX = 1) = S1 -> S1440
+* The default is 0.
+* CTB bit 2 in the second byte is the vertical scanning direction
+* selection for gate control signals. This bit is XOR operation
+* with bit ML of 3600h command.
+* 0 (ML = 0) = Forward (top -> bottom)
+* 0 (ML = 1) = Reverse (bottom -> top)
+* 1 (ML = 0) = Reverse (bottom -> top)
+* 1 (ML = 1) = Forward (top -> bottom)
+* The default is 0.
+* CRGB bit 3 in the second byte is RGB-BGR order selection. This
+* bit is XOR operation with bit RGB of 3600h command.
+* 0 (RGB = 0) = RGB/Normal
+* 0 (RGB = 1) = BGR/RB swap
+* 1 (RGB = 0) = BGR/RB swap
+* 1 (RGB = 1) = RGB/Normal
+* The default is 0.
+* TE_PWR_SEL bit 4 in the second byte is the TE output voltage
+* level selection (only valid when DSTB_SEL = 0 or DSTB_SEL = 1,
+* VSEL = High and VDDI = 1.665~3.3V).
+* 0 = TE output voltage level is VDDI
+* 1 = TE output voltage level is VDDA
+* The default is 0.
+*/
+ u8 dopctr[NT35510_P0_DOPCTR_LEN];
+ /**
+* @madctl: Memory data access control
+* RSMY bit 0 is flip vertical. Flips the display image top to down.
+* RSMX bit 1 is flip horizontal. Flips the display image left to right.
+* MH bit 2 is the horizontal refresh order.
+* RGB bit 3 is the RGB-BGR order.
+* 0 = RGB color sequence
+* 1 = BGR color sequence
+* ML bit 4 is the vertical refresh order.
+* MV bit 5 is the row/column exchange.
+* MX bit 6 is the column address order.
+* MY bit 7 is the row address order.
+*/
+ u8 madctl;
+ /**
+* @sdhdtctr: source output data hold time
+* 0x00..0x3F = 0..31.5us in s
[PATCH v2 5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the Novatek NT35510-based panel family. Signed-off-by: Dario Binacchi --- Changes in v2: - Add a dash in front of each "items:" .../bindings/display/panel/novatek,nt35510.yaml| 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml index bc92928c805b..8e69446e00e0 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml @@ -14,9 +14,13 @@ allOf: properties: compatible: -items: - - const: hydis,hva40wv1 - - const: novatek,nt35510 +oneOf: + - items: + - const: hydis,hva40wv1 + - const: novatek,nt35510 + - items: + - const: frida,frd400b25025 + - const: novatek,nt35510 description: This indicates the panel manufacturer of the panel that is in turn using the NT35510 panel driver. The compatible string determines how the NT35510 panel driver shall be configured -- 2.43.0
[PATCH v2 0/8] Add display support for stm32f769-disco board
The series adds display support for the stm32f769-disco board. It has been tested on hardware revisions MB1225-B03 and MB1166-A09. This required modifications to the nt35510 driver. As I do not have the Hydis HVA40WV1 display, it would be better if someone tested the driver in that configuration. Changes in v2: - Add Acked-by tag of Conor Dooley - Add a dash in front of each "items:" - Change the status of panel_backlight node to "disabled" - Delete backlight property from panel0 node. - Re-write the patch [7/8] "drm/panel: nt35510: refactor panel initialization" in the same style as the original driver in order to maintain the same structure. - Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK" in the same style as the original driver. Dario Binacchi (8): dt-bindings: mfd: stm32f7: Add binding definition for DSI ARM: dts: stm32: add DSI support on stm32f769 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco ARM: dts: stm32: add display support on stm32f769-disco dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK ARM: dts: add stm32f769-disco-mb1225-revb03-mb1166-reva09 drm/panel: nt35510: move hardwired parameters to configuration drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK .../display/panel/novatek,nt35510.yaml| 10 +- arch/arm/boot/dts/st/Makefile | 1 + ...f769-disco-mb1225-revb03-mb1166-reva09.dts | 18 + arch/arm/boot/dts/st/stm32f769-disco.dts | 78 +++- arch/arm/boot/dts/st/stm32f769.dtsi | 21 + drivers/gpu/drm/panel/panel-novatek-nt35510.c | 422 +++--- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 7 files changed, 488 insertions(+), 63 deletions(-) create mode 100644 arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi -- 2.43.0
Re: [PATCH 7/8] drm/panel: nt35510: refactor panel initialization
Hi Linus, On Fri, Dec 29, 2023 at 6:43 PM Linus Walleij wrote: > > On Fri, Dec 29, 2023 at 2:52 PM Dario Binacchi > wrote: > > > The previous implementation did not make it easy to support new > > NT35510-based panels with different initialization sequences. > > This patch, preparatory for future developmentes, simplifies the > > addition of new NT35510-based displays and also avoids the risk of > > creating regressions on already managed panels. > > > > Signed-off-by: Dario Binacchi > > The idea is to have the driver adapt to different panels, and encode a deep > understanding just like we do with all hardware drivers. > > NAK. > > This patch: > > - Deletes a lot of useful documentation on how the panel works. > > - Deletes defines and replaces them with magic numbers > > All it achieves is a bit of "magic sequences because we are used to > magic sequences" and that doesn't look like an improvement at all, > instead it creates a dumber driver which has no explanations at all > to what is going on. > > Please rewrite the patch in the same style as the original driver. > The fact that you (probably) are not used to writing display drivers > in this way is not an excuse to destroy this nice structure. > > There are things that can be done, like create an abstraction for > sequence encoding with less open coded command issue > statements, by adding helpers to the DRM core, so if that is what > you want to do, then do that instead? Thanks for your explanations and suggestions. I will rewrite the patch following your suggestions. Thanks and regards, Dario > > Yours, > Linus Walleij -- Dario Binacchi Senior Embedded Linux Developer dario.binac...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
Re: [PATCH 5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK
Hi Linus, On Fri, Dec 29, 2023 at 6:34 PM Linus Walleij wrote: > > Hi Dario, > > thanks for your patch! > > On Fri, Dec 29, 2023 at 2:52 PM Dario Binacchi > wrote: > > > The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the > > Novatek NT35510-based panel family. > > > > Signed-off-by: Dario Binacchi > (...) > > > > +oneOf: > > + items: > > +- const: hydis,hva40wv1 > > +- const: novatek,nt35510 > > + items: > > +- const: frida,frd400b25025 > > +- const: novatek,nt35510 > > You need a dash in from of each "items:" for that to work. Thanks for your help. Regards Dario > > Yours, > Linus Walleij -- Dario Binacchi Senior Embedded Linux Developer dario.binac...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
[PATCH 7/8] drm/panel: nt35510: refactor panel initialization
The previous implementation did not make it easy to support new
NT35510-based panels with different initialization sequences.
This patch, preparatory for future developmentes, simplifies the
addition of new NT35510-based displays and also avoids the risk of
creating regressions on already managed panels.
Signed-off-by: Dario Binacchi
---
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 797 --
1 file changed, 165 insertions(+), 632 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index d6dceb858008..2a5a624fe447 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -36,126 +36,33 @@
#include
#include
-#define MCS_CMD_MAUCCTR0xF0 /* Manufacturer command enable */
#define MCS_CMD_READ_ID1 0xDA
#define MCS_CMD_READ_ID2 0xDB
#define MCS_CMD_READ_ID3 0xDC
#define MCS_CMD_MTP_READ_SETTING 0xF8 /* Uncertain about name */
#define MCS_CMD_MTP_READ_PARAM 0xFF /* Uncertain about name */
-/*
- * These manufacturer commands are available after we enable manufacturer
- * command set (MCS) for page 0.
- */
-#define NT35510_P0_DOPCTR 0xB1
-#define NT35510_P0_SDHDTCTR 0xB6
-#define NT35510_P0_GSEQCTR 0xB7
-#define NT35510_P0_SDEQCTR 0xB8
-#define NT35510_P0_SDVPCTR 0xBA
-#define NT35510_P0_DPFRCTR1 0xBD
-#define NT35510_P0_DPFRCTR2 0xBE
-#define NT35510_P0_DPFRCTR3 0xBF
-#define NT35510_P0_DPMCTR12 0xCC
-
-#define NT35510_P0_DOPCTR_LEN 2
-#define NT35510_P0_GSEQCTR_LEN 2
-#define NT35510_P0_SDEQCTR_LEN 4
-#define NT35510_P0_SDVPCTR_LEN 1
-#define NT35510_P0_DPFRCTR1_LEN 5
-#define NT35510_P0_DPFRCTR2_LEN 5
-#define NT35510_P0_DPFRCTR3_LEN 5
-#define NT35510_P0_DPMCTR12_LEN 3
-
-#define NT35510_DOPCTR_0_RAMKP BIT(7) /* Contents kept in sleep */
-#define NT35510_DOPCTR_0_DSITE BIT(6) /* Enable TE signal */
-#define NT35510_DOPCTR_0_DSIG BIT(5) /* Enable generic read/write */
-#define NT35510_DOPCTR_0_DSIM BIT(4) /* Enable video mode on DSI */
-#define NT35510_DOPCTR_0_EOTP BIT(3) /* Support EoTP */
-#define NT35510_DOPCTR_0_N565 BIT(2) /* RGB or BGR pixel format */
-#define NT35510_DOPCTR_1_TW_PWR_SEL BIT(4) /* TE power selector */
-#define NT35510_DOPCTR_1_CRGB BIT(3) /* RGB or BGR byte order */
-#define NT35510_DOPCTR_1_CTB BIT(2) /* Vertical scanning direction */
-#define NT35510_DOPCTR_1_CRL BIT(1) /* Source driver data shift */
-#define NT35510_P0_SDVPCTR_PRG BIT(2) /* 0 = normal operation, 1 = VGLO */
-#define NT35510_P0_SDVPCTR_AVDD 0 /* source driver output = AVDD */
-#define NT35510_P0_SDVPCTR_OFFCOL 1 /* source driver output = off color */
-#define NT35510_P0_SDVPCTR_AVSS 2 /* source driver output = AVSS */
-#define NT35510_P0_SDVPCTR_HI_Z 3 /* source driver output = High impedance */
+#define _INIT_DCS_CMD(...) { \
+ .type = INIT_DCS_CMD, \
+ .len = sizeof((u8[]){__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} }
-/*
- * These manufacturer commands are available after we enable manufacturer
- * command set (MCS) for page 1.
- */
-#define NT35510_P1_SETAVDD 0xB0
-#define NT35510_P1_SETAVEE 0xB1
-#define NT35510_P1_SETVCL 0xB2
-#define NT35510_P1_SETVGH 0xB3
-#define NT35510_P1_SETVRGH 0xB4
-#define NT35510_P1_SETVGL 0xB5
-#define NT35510_P1_BT1CTR 0xB6
-#define NT35510_P1_BT2CTR 0xB7
-#define NT35510_P1_BT3CTR 0xB8
-#define NT35510_P1_BT4CTR 0xB9 /* VGH boosting times/freq */
-#define NT35510_P1_BT5CTR 0xBA
-#define NT35510_P1_PFMCTR 0xBB
-#define NT35510_P1_SETVGP 0xBC
-#define NT35510_P1_SETVGN 0xBD
-#define NT35510_P1_SETVCMOFF 0xBE
-#define NT35510_P1_VGHCTR 0xBF /* VGH output ctrl */
-#define NT35510_P1_SET_GAMMA_RED_POS 0xD1
-#define NT35510_P1_SET_GAMMA_GREEN_POS 0xD2
-#define NT35510_P1_SET_GAMMA_BLUE_POS 0xD3
-#define NT35510_P1_SET_GAMMA_RED_NEG 0xD4
-#define NT35510_P1_SET_GAMMA_GREEN_NEG 0xD5
-#define NT35510_P1_SET_GAMMA_BLUE_NEG 0xD6
-
-/* AVDD and AVEE setting 3 bytes */
-#define NT35510_P1_AVDD_LEN 3
-#define NT35510_P1_AVEE_LEN 3
-#define NT35510_P1_VGH_LEN 3
-#define NT35510_P1_VGL_LEN 3
-#define NT35510_P1_VGP_LEN 3
-#define NT35510_P1_VGN_LEN 3
-/* BT1CTR thru BT5CTR setting 3 bytes */
-#define NT35510_P1_BT1CTR_LEN 3
-#define NT35510_P1_BT2CTR_LEN 3
-#define NT35510_P1_BT4CTR_LEN 3
-#define NT35510_P1_BT5CTR_LEN 3
-/* 52 gamma parameters times two per color: positive and negative */
-#define NT35510_P1_GAMMA_LEN 52
+#define _INIT_DELAY_CMD(...) { \
+ .type = DELAY_CMD,\
+ .len = sizeof((u8[]){__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} }
+
+enum dsi_cmd_type {
+ INIT_DCS_CMD,
+ DELAY_CMD,
+};
+
+struct panel_init_cmd {
+ enum dsi_cmd_type type;
+ size_t len;
+ const u8 *data;
+};
-/**
- * struct nt35510_config - the display-specific NT35510 configuration
- *
- * Some of the settings provide an array of bytes, A, B C which mean:
- * A = normal / idle off mode
- * B = idle on mode
- * C = partial / idle off mode
- *
- * Gamma
[PATCH 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
The initialization commands are taken from the STMicroelectronics driver
found at
https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Drivers/BSP/Components/nt35510/
Signed-off-by: Dario Binacchi
---
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 75 +++
1 file changed, 75 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index 2a5a624fe447..3cdcc75c4c76 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -1,6 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Novatek NT35510 panel driver
+ * Copyright (C) 2023 Dario Binacchi
+ * Add support to Frida FRD400B25025-A-CTK panel.
+ * Based on code by MCD Application Team (C) 2020 STMicroelectronics
* Copyright (C) 2020 Linus Walleij
* Based on code by Robert Teather (C) 2012 Samsung
*
@@ -165,6 +168,49 @@ static const struct panel_init_cmd
hydis_hva40wv1_init_cmds[] = {
{},
};
+static const struct panel_init_cmd frida_frd400b25025_init_cmds[] = {
+ _INIT_DCS_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01),
+ _INIT_DCS_CMD(0xB0, 0x03, 0x03, 0x03),
+ _INIT_DCS_CMD(0xB6, 0x46, 0x46, 0x46),
+ _INIT_DCS_CMD(0xB1, 0x03, 0x03, 0x03),
+ _INIT_DCS_CMD(0xB7, 0x36, 0x36, 0x36),
+ _INIT_DCS_CMD(0xB2, 0x00, 0x00, 0x02),
+ _INIT_DCS_CMD(0xB8, 0x26, 0x26, 0x26),
+ _INIT_DCS_CMD(0xBF, 0x01),
+ _INIT_DCS_CMD(0xB3, 0x09, 0x09, 0x09),
+ _INIT_DCS_CMD(0xB9, 0x36, 0x36, 0x36),
+ _INIT_DCS_CMD(0xB5, 0x08, 0x08, 0x08),
+ _INIT_DCS_CMD(0xBA, 0x26, 0x26, 0x26),
+ _INIT_DCS_CMD(0xBC, 0x00, 0x80, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x00, 0x80, 0x00),
+ _INIT_DCS_CMD(0xBE, 0x00, 0x50),
+ _INIT_DCS_CMD(0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00),
+ _INIT_DCS_CMD(0xB1, 0xFC, 0x00),
+ _INIT_DCS_CMD(0xB6, 0x03),
+ _INIT_DCS_CMD(0xB5, 0x50),
+ _INIT_DCS_CMD(0xB7, 0x00, 0x00),
+ _INIT_DCS_CMD(0xB8, 0x01, 0x02, 0x02, 0x02),
+ _INIT_DCS_CMD(0xBC, 0x00, 0x00, 0x00),
+ _INIT_DCS_CMD(0xCC, 0x03, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBA, 0x01),
+ _INIT_DCS_CMD(0x35, 0x00),
+ _INIT_DCS_CMD(0x3A, 0x77),
+ _INIT_DELAY_CMD(0xC8),
+ _INIT_DCS_CMD(0x36, 0x00),
+ _INIT_DCS_CMD(0x2A, 0x00, 0x00, 0x01, 0xDF),
+ _INIT_DCS_CMD(0x2B, 0x00, 0x00, 0x03, 0x1F),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(0x78),
+ _INIT_DCS_CMD(0x3A, 0x77),
+ _INIT_DCS_CMD(0x51, 0x7F, 0x00),
+ _INIT_DCS_CMD(0x53, 0x2C),
+ _INIT_DCS_CMD(0x55, 0x02),
+ _INIT_DCS_CMD(0x5E, 0xFF),
+ _INIT_DCS_CMD(0x29),
+ _INIT_DCS_CMD(0x2C),
+ {},
+};
+
/**
* struct nt35510 - state container for the NT35510 panel
*/
@@ -606,7 +652,36 @@ static const struct nt35510_config nt35510_hydis_hva40wv1
= {
.init_cmds = hydis_hva40wv1_init_cmds,
};
+/*
+ * The Frida FRD400B25025-A-CTK panel
+ */
+static const struct nt35510_config nt35510_frida_frd400b25025 = {
+ .width_mm = 52,
+ .height_mm = 86,
+ .mode = {
+ .clock = 23000,
+ .hdisplay = 480,
+ .hsync_start = 480 + 34, /* HFP = 34 */
+ .hsync_end = 480 + 34 + 2, /* HSync = 2 */
+ .htotal = 480 + 34 + 2 + 34, /* HBP = 34 */
+ .vdisplay = 800,
+ .vsync_start = 800 + 15, /* VFP = 15 */
+ .vsync_end = 800 + 15 + 12, /* VSync = 12 */
+ .vtotal = 800 + 15 + 12 + 15, /* VBP = 15 */
+ .flags = 0,
+ },
+ .lanes = 2,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = frida_frd400b25025_init_cmds,
+};
+
static const struct of_device_id nt35510_of_match[] = {
+ {
+ .compatible = "frida,frd400b25025",
+ .data = &nt35510_frida_frd400b25025,
+ },
{
.compatible = "hydis,hva40wv1",
.data = &nt35510_hydis_hva40wv1,
--
2.43.0
[PATCH 5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the Novatek NT35510-based panel family. Signed-off-by: Dario Binacchi --- .../display/panel/novatek,nt35510.yaml| 20 +++ 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml index bc92928c805b..511b93a376b7 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml @@ -14,14 +14,18 @@ allOf: properties: compatible: -items: - - const: hydis,hva40wv1 - - const: novatek,nt35510 -description: This indicates the panel manufacturer of the panel - that is in turn using the NT35510 panel driver. The compatible - string determines how the NT35510 panel driver shall be configured - to work with the indicated panel. The novatek,nt35510 compatible shall - always be provided as a fallback. +oneOf: + items: +- const: hydis,hva40wv1 +- const: novatek,nt35510 + items: +- const: frida,frd400b25025 +- const: novatek,nt35510 + description: This indicates the panel manufacturer of the panel +that is in turn using the NT35510 panel driver. The compatible +string determines how the NT35510 panel driver shall be configured +to work with the indicated panel. The novatek,nt35510 compatible shall +always be provided as a fallback. reg: true reset-gpios: true vdd-supply: -- 2.43.0
[PATCH 0/8] Add display support for stm32f769-disco board
The series adds display support for the stm32f769-disco board. It has been tested on hardware revisions MB1225-B03 and MB1166-A09. This required modifications to the nt35510 driver. As I do not have the Hydis HVA40WV1 display, it would be better if someone tested the driver in that configuration. Dario Binacchi (8): dt-bindings: mfd: stm32f7: Add binding definition for DSI ARM: dts: stm32: add DSI support on stm32f769 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco ARM: dts: stm32: add display support on stm32f769-disco dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK ARM: dts: add stm32f769-disco-mb1225-revb03-mb1166-reva09 drm/panel: nt35510: refactor panel initialization drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK .../display/panel/novatek,nt35510.yaml| 20 +- arch/arm/boot/dts/st/Makefile | 1 + ...f769-disco-mb1225-revb03-mb1166-reva09.dts | 13 + arch/arm/boot/dts/st/stm32f769-disco.dts | 78 +- arch/arm/boot/dts/st/stm32f769.dtsi | 21 + drivers/gpu/drm/panel/panel-novatek-nt35510.c | 872 +- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 7 files changed, 362 insertions(+), 644 deletions(-) create mode 100644 arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi -- 2.43.0
[PATCH v2] drm/debugfs: drop unneeded DEBUG_FS guard
The Makefile enables/disables the file compilation depending on CONFIG_DEBUG_FS. Signed-off-by: Dario Binacchi Reviewed-by: Jani Nikula --- Changes in v2: - Add 'Reviewed-by' tag of Jani Nikula drivers/gpu/drm/drm_debugfs.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c index f291fb4b359f..f80d9cf3e71a 100644 --- a/drivers/gpu/drm/drm_debugfs.c +++ b/drivers/gpu/drm/drm_debugfs.c @@ -45,8 +45,6 @@ #include "drm_crtc_internal.h" #include "drm_internal.h" -#if defined(CONFIG_DEBUG_FS) - /*** * Initialization, etc. **/ @@ -588,5 +586,3 @@ void drm_debugfs_crtc_remove(struct drm_crtc *crtc) debugfs_remove_recursive(crtc->debugfs_entry); crtc->debugfs_entry = NULL; } - -#endif /* CONFIG_DEBUG_FS */ -- 2.43.0
[PATCH v9 0/2] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. This required applying some patches to the samsung-dsim driver and the drm_bridge.c module. Changes in v9: - Updated commit message - Drop [3/3] arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup because applied. Changes in v8: - Move the 'status' property to the end of the list of nodes: - pwm1 - lcdif - mipi_dsi - Add a newline between properties and child node (mipi_dsi_out). - Sort the iomuxc node alphabetically - Rename pwm1grp to blgrp Changes in v7: - Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller because applied. Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (2): drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting drivers/gpu/drm/bridge/samsung-dsim.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) -- 2.43.0
[PATCH v9 2/2] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8m{m,n,p}
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v9:
- Updated commit message
- Drop [3/3] arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup
because applied.
Changes in v8:
- Move the 'status' property to the end of the list of nodes:
- pwm1
- lcdif
- mipi_dsi
- Add a newline between properties and child node (mipi_dsi_out).
- Sort the iomuxc node alphabetically
- Rename pwm1grp to blgrp
Changes in v7:
- Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller
because applied.
Changes in v6:
- Drop patches:
- [06/10] drm/panel: Add Synaptics R63353 panel driver
- [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller
- [08/10] drm/panel: Add Ilitek ILI9805 panel driver
- [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel
Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git
(drm-misc-next)
Drop patches:
- [01/10] drm/bridge: Fix bridge disable logic
- [02/10] drm/bridge: Fix a use case in the bridge disable logic
Because they are wrong
Changes in v3:
- Replace "synaptics,r63353" compatible with "syna,r63353", as
required by vendor-prefixes.yaml.
- Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma
TM041XDHG01
into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller.
Changes in v2:
- Adjust the mipi_dsi node based on the latest patches merged into
the mainline in the dtsi files it includes.
- Added to the series the following patches:
- 0001 drm/bridge: Fix bridge disable logic
- 0002 drm/bridge: Fix a use case in the bridge disable logic
- 0003 samsung-dsim: enter display mode in the enable() callback
- 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[PATCH v9 1/2] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[PATCH v8 1/3] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[PATCH v8 0/3] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. This required applying some patches to the samsung-dsim driver and the drm_bridge.c module. Changes in v8: - Move the 'status' property to the end of the list of nodes: - pwm1 - lcdif - mipi_dsi - Add a newline between properties and child node (mipi_dsi_out). - Sort the iomuxc node alphabetically - Rename pwm1grp to blgrp Changes in v7: - Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller because applied. Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (2): drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Michael Trimarchi (1): arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 + .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 121 ++ drivers/gpu/drm/bridge/samsung-dsim.c | 14 +- 3 files changed, 133 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi -- 2.43.0
[PATCH v8 2/3] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[PATCH v7 1/3] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[PATCH v7 2/3] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[PATCH v7 0/3] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. This required applying some patches to the samsung-dsim driver and the drm_bridge.c module. Changes in v7: - Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller because applied. Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (2): drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Michael Trimarchi (1): arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 + .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 121 ++ drivers/gpu/drm/bridge/samsung-dsim.c | 14 +- 3 files changed, 133 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi -- 2.43.0
[PATCH v6 3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller
From: Michael Trimarchi
Add documentation for "synaptics,r63353" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
Reviewed-by: Krzysztof Kozlowski
---
(no changes since v3)
Changes in v3:
- Add 'Reviewed-by' tag of Krzysztof Kozlowski.
- Replace "synaptics,r63353" compatible with "syna,r63353", as
required by vendor-prefixes.yaml.
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/synaptics,r63353.yaml | 61 +++
1 file changed, 61 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
new file mode 100644
index ..e5617d125567
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/synaptics,r63353.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synaptics R63353 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - sharp,ls068b3sx02
+ - const: syna,r63353
+
+ avdd-supply: true
+ dvdd-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "sharp,ls068b3sx02", "syna,r63353";
+reg = <0>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v6 1/4] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[PATCH v6 2/4] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[PATCH v6 0/4] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. This required applying some patches to the samsung-dsim driver. Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Add 'Reviewed-by' tag of Krzysztof Kozlowski. - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (2): drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Michael Trimarchi (2): dt-bindings: display: panel: Add synaptics r63353 panel controller arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup .../display/panel/synaptics,r63353.yaml | 61 + .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 + .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 121 ++ drivers/gpu/drm/bridge/samsung-dsim.c | 14 +- 4 files changed, 194 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi -- 2.43.0
Re: (subset) [PATCH v5 00/10] Add displays support for bsh-smm-s2/pro boards
Hi Neil, On Mon, Dec 11, 2023 at 10:16 AM Neil Armstrong wrote: > > Hi, > > On Thu, 07 Dec 2023 15:16:29 +0100, Dario Binacchi wrote: > > The series adds drivers for the displays used by bsh-smm-s2/pro boards. > > This required applying some patches to the samsung-dsim driver and the > > drm_bridge.c module. > > > > Changes in v5: > > - Replace a 'return ret' with a 'goto fail' in the r63353_panel_activate() > > - Add 'Reviewed-by' tag of Krzysztof Kozlowski > > > > [...] > > Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git > (drm-misc-next) > > [06/10] drm/panel: Add Synaptics R63353 panel driver > > https://cgit.freedesktop.org/drm/drm-misc/commit/?id=2e87bad7cd339882cf26b7101a1c87dab71962c9 > [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller > > https://cgit.freedesktop.org/drm/drm-misc/commit/?id=549240c98e50207244bc1ac182622b8daba89a89 > [08/10] drm/panel: Add Ilitek ILI9805 panel driver > > https://cgit.freedesktop.org/drm/drm-misc/commit/?id=edbf1d506ebe8c0857c406bd5d5b81d46ffd8437 > [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel > > https://cgit.freedesktop.org/drm/drm-misc/commit/?id=b1fcb7ee3707290466b2cc4956325fb91f09f13b > > -- > Neil > I think you forgot the patch: [05/10] dt-bindings: display: panel: Add synaptics r63353 panel controller I received an email complaining about the lack of documentation for the Synaptics panel. Thanks and regards, Dario -- Dario Binacchi Senior Embedded Linux Developer dario.binac...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
Re: [PATCH v4 02/10] drm/bridge: Fix a use case in the bridge disable logic
Hi Jagan and Dave, On Wed, Dec 6, 2023 at 2:57 PM Michael Nazzareno Trimarchi wrote: > > Hi Jagan > > On Wed, Dec 6, 2023 at 2:31 PM Jagan Teki wrote: > > > > Hi Dario, > > > > On Wed, Dec 6, 2023 at 6:57 PM Dario Binacchi > > wrote: > > > > > > Hi Dave and Jagan, > > > > > > On Tue, Dec 5, 2023 at 4:39 PM Dave Stevenson > > > wrote: > > > > > > > > Hi Dario > > > > > > > > On Tue, 5 Dec 2023 at 10:54, Dario Binacchi > > > > wrote: > > > > > > > > > > The patch fixes the code for finding the next bridge with the > > > > > "pre_enable_prev_first" flag set to false. In case this condition is > > > > > not verified, i. e. there is no subsequent bridge with the flag set to > > > > > false, the whole bridge list is traversed, invalidating the "next" > > > > > variable. > > > > > > > > > > The use of a new iteration variable (i. e. "iter") ensures that the > > > > > value > > > > > of the "next" variable is not invalidated. > > > > > > > > We already have https://patchwork.freedesktop.org/patch/529288/ that > > > > has been reviewed (but not applied) to resolve this. What does this > > > > version do differently and why? > > > > > > My patches only affect drm_atomic_bridge_chain_post_disable(), whereas > > > Jagan's patch affects both > > > drm_atomic_bridge_chain_post_disable() and > > > drm_atomic_bridge_chain_pre_enable(). > > > I tested Jagan's patch on my system with success and I reviewed with > > > Michael Trimarchi the > > > drm_atomic_bridge_chain_pre_enable() fixing and we think it's okay. > > > We also believe that our changes to post_disable() are better, as we > > > set the 'next' variable only when required, > > > and the code is more optimized since the list_is_last() is not called > > > within the loop. > > > Would it be possible to use Jagan's patch for fixing > > > drm_atomic_bridge_chain_pre_enable() and mine for > > > fixing drm_atomic_bridge_chain_post_disable()? > > > > > > > Can you please share the post-disabled bridge chain list with the > > below example before and after your change? > > We have already git commit the description in how the patch affects > the post_disable. As Dario > reported your patch is ok even in our use case. We don't have a real > use case as the one you describe. > > Can we know how you test it in this use case here? Can you test our > patches of post_disable? > > Thanks > Michael > > > > > Example: > > - Panel > > - Bridge 1 > > - Bridge 2 pre_enable_prev_first > > - Bridge 3 > > - Bridge 4 pre_enable_prev_first > > - Bridge 5 pre_enable_prev_first > > - Bridge 6 > > - Encoder > > > > Thanks, > > Jagan. Starting from my use case: # cat /sys/kernel/debug/dri/32e0.lcdif/bridge_chains encoder[36] bridge[0] type: 16, ops: 0x0, OF: /soc@0/bus@32c0/dsi@32e1:fsl,imx8mn-mipi-dsim bridge[1] type: 16, ops: 0x8, OF: /soc@0/bus@32c0/dsi@32e1/panel@0:sharp,ls068b3sx0 I developed a pass through MIPI-DSI bridge driver to try to test your case: # cat /sys/kernel/debug/dri/32e0.lcdif/bridge_chains encoder[36] bridge[0] type: 16, ops: 0x0, OF: /soc@0/bus@32c0/dsi@32e1:fsl,imx8mn-mipi-dsim bridge[1] type: 16, ops: 0x0, OF: /pt_mipi_dsi1:amarula,pt-mipi-dsi bridge[2] type: 16, ops: 0x0, OF: /pt_mipi_dsi2:amarula,pt-mipi-dsi bridge[3] type: 16, ops: 0x0, OF: /pt_mipi_dsi3:amarula,pt-mipi-dsi bridge[4] type: 16, ops: 0x0, OF: /pt_mipi_dsi4:amarula,pt-mipi-dsi bridge[5] type: 16, ops: 0x0, OF: /pt_mipi_dsi5:amarula,pt-mipi-dsi bridge[6] type: 16, ops: 0x8, OF: /pt_mipi_dsi5/panel@0:sharp,ls068b3sx02 The pre_enable_prev_first flag is set through the "amarula,pre_enable_prev_first" dts property I put in my dts. Your and my patches give the same results (result: OK) in both your use case and mine. But If I test my new "enlarged" use case: - Encoder - bridge[0] (samsung-dsim) - bridge[1] pre_enable_prev_first - bridge[2] pre_enable_prev_first - bridge[3] pre_enable_prev_first - bridge[4] pre_enable_prev_first - bridge[5] pre_enable_prev_first - bridge[6] pre_enable_prev_first (Panel) the result is: my patches: KO your patch: OK So, I will remove my patches from the series. Can the driver I implemented to test the use cases (pass through MIPI-DSI) be considered useful for testing these bridge pipelines? Does it make sense to send its patch? Thanks and regards Dario Dario Binacchi Senior Embedded Linux Developer dario.binac...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
[linux-next:master] drm/panel: synaptics-r63353: adjust the includes
Adjust the includes to explicitly include the correct headers. Suggested-by: Rob Herring Signed-off-by: Dario Binacchi --- drivers/gpu/drm/panel/panel-synaptics-r63353.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-synaptics-r63353.c b/drivers/gpu/drm/panel/panel-synaptics-r63353.c index 3f61fcdc550b..169c629746c7 100644 --- a/drivers/gpu/drm/panel/panel-synaptics-r63353.c +++ b/drivers/gpu/drm/panel/panel-synaptics-r63353.c @@ -9,10 +9,9 @@ #include #include #include -#include #include #include -#include +#include #include #include -- 2.43.0
[linux-next:master] drm/panel: ilitek-ili9805: adjust the includes
Adjust the includes to explicitly include the correct headers. Suggested-by: Rob Herring Signed-off-by: Dario Binacchi --- drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c index 5054d1a2b2f5..1cbc25758bd2 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c @@ -7,10 +7,9 @@ #include #include #include -#include #include #include -#include +#include #include #include -- 2.43.0
[PATCH] drm/bridge: samsung-dsim: check the return value only if necessary
It was useless to check again the "ret" variable if the function
register_host() was not called.
Signed-off-by: Dario Binacchi
---
drivers/gpu/drm/bridge/samsung-dsim.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..98cd589e4427 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -2020,11 +2020,11 @@ int samsung_dsim_probe(struct platform_device *pdev)
else
dsi->bridge.timings = &samsung_dsim_bridge_timings_de_high;
- if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host)
+ if (dsi->plat_data->host_ops &&
dsi->plat_data->host_ops->register_host) {
ret = dsi->plat_data->host_ops->register_host(dsi);
-
- if (ret)
- goto err_disable_runtime;
+ if (ret)
+ goto err_disable_runtime;
+ }
return 0;
--
2.43.0
[PATCH v5 09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel
From: Michael Trimarchi
Tianma TM041XDHG01 utilizes the Ilitek ILI9805 controller.
Add this panel's initialzation sequence and timing to ILI9805 driver.
Signed-off-by: Michael Trimarchi
Reviewed-by: Neil Armstrong
Signed-off-by: Dario Binacchi
---
(no changes since v4)
Changes in v4:
- Add Reviewed-by tag of Neil Armstrong
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 53
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
index e36984b46e14..5054d1a2b2f5 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -87,6 +87,36 @@ static const struct ili9805_instr gpm1780a0_init[] = {
ILI9805_INSTR(0, 0xB9, 0x02, 0x00),
};
+static const struct ili9805_instr tm041xdhg01_init[] = {
+ ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG,
ILI9805_SETEXTC_PARAMETER1,
+ ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+ ILI9805_INSTR(100, 0xFD, 0x0F, 0x13, 0x44, 0x00),
+ ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x01,
+ 0x01, 0x30, 0x01, 0x01, 0x30, 0x01, 0x01),
+ ILI9805_INSTR(0, 0xB8, 0x74),
+ ILI9805_INSTR(0, 0xF1, 0x00),
+ ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+ ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+ ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+ ILI9805_INSTR(0, 0xe0, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(0, 0xe1, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(10, 0xc1, 0x15, 0x03, 0x03, 0x31),
+ ILI9805_INSTR(10, 0xB1, 0x00, 0x12, 0x14),
+ ILI9805_INSTR(10, 0xB4, 0x02),
+ ILI9805_INSTR(0, 0xBB, 0x14, 0x55),
+ ILI9805_INSTR(0, MIPI_DCS_SET_ADDRESS_MODE, 0x0a),
+ ILI9805_INSTR(0, MIPI_DCS_SET_PIXEL_FORMAT, 0x77),
+ ILI9805_INSTR(0, 0x20),
+ ILI9805_INSTR(0, 0xB0, 0x00),
+ ILI9805_INSTR(0, 0xB6, 0x01),
+ ILI9805_INSTR(0, 0xc2, 0x11),
+ ILI9805_INSTR(0, 0x51, 0xFF),
+ ILI9805_INSTR(0, 0x53, 0x24),
+ ILI9805_INSTR(0, 0x55, 0x00),
+};
+
static inline struct ili9805 *panel_to_ili9805(struct drm_panel *panel)
{
return container_of(panel, struct ili9805, panel);
@@ -227,6 +257,20 @@ static const struct drm_display_mode gpm1780a0_timing = {
.vtotal = 480 + 2 + 4 + 10,
};
+static const struct drm_display_mode tm041xdhg01_timing = {
+ .clock = 26227,
+
+ .hdisplay = 480,
+ .hsync_start = 480 + 10,
+ .hsync_end = 480 + 10 + 2,
+ .htotal = 480 + 10 + 2 + 36,
+
+ .vdisplay = 768,
+ .vsync_start = 768 + 2,
+ .vsync_end = 768 + 10 + 4,
+ .vtotal = 768 + 2 + 4 + 10,
+};
+
static int ili9805_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -331,8 +375,17 @@ static const struct ili9805_desc gpm1780a0_desc = {
.height_mm = 65,
};
+static const struct ili9805_desc tm041xdhg01_desc = {
+ .init = tm041xdhg01_init,
+ .init_length = ARRAY_SIZE(tm041xdhg01_init),
+ .mode = &tm041xdhg01_timing,
+ .width_mm = 42,
+ .height_mm = 96,
+};
+
static const struct of_device_id ili9805_of_match[] = {
{ .compatible = "giantplus,gpm1790a0", .data = &gpm1780a0_desc },
+ { .compatible = "tianma,tm041xdhg01", .data = &tm041xdhg01_desc },
{ }
};
MODULE_DEVICE_TABLE(of, ili9805_of_match);
--
2.43.0
[PATCH v5 08/10] drm/panel: Add Ilitek ILI9805 panel driver
From: Michael Trimarchi
The GPM1790A0 panel is based on the Ilitek ILI9805 Controller.
Add a driver for it.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v4)
Changes in v4:
- Remove duplicated code for prepare/unprepare callbacks
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig| 9 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 353 +++
4 files changed, 369 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9805.c
diff --git a/MAINTAINERS b/MAINTAINERS
index b82dc141d209..4dccc72a0ed6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6646,6 +6646,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/ilitek,ili9486.yaml
F: drivers/gpu/drm/tiny/ili9486.c
+DRM DRIVER FOR ILITEK ILI9805 PANELS
+M: Michael Trimarchi
+S: Maintained
+F: Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
+F: drivers/gpu/drm/panel/panel-ilitek-ili9805.c
+
DRM DRIVER FOR JADARD JD9365DA-H3 MIPI-DSI LCD PANELS
M: Jagan Teki
S: Maintained
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d018702be3dc..dad938cf6dec 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -194,6 +194,15 @@ config DRM_PANEL_ILITEK_ILI9341
QVGA (240x320) RGB panels. support serial & parallel rgb
interface.
+config DRM_PANEL_ILITEK_ILI9805
+ tristate "Ilitek ILI9805-based panels"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y if you want to enable support for panels based on the
+ Ilitek ILI9805 controller.
+
config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f267d932c2b5..d94a644d0a6c 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) +=
panel-feiyang-fy07024di26a30d
obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9805) += panel-ilitek-ili9805.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
new file mode 100644
index ..e36984b46e14
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -0,0 +1,353 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 BSH Hausgerate GmbH
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#define ILI9805_EXTCMD_CMD_SET_ENABLE_REG (0xff)
+#define ILI9805_SETEXTC_PARAMETER1 (0xff)
+#define ILI9805_SETEXTC_PARAMETER2 (0x98)
+#define ILI9805_SETEXTC_PARAMETER3 (0x05)
+
+#define ILI9805_INSTR(_delay, ...) { \
+ .delay = (_delay), \
+ .len = sizeof((u8[]) {__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} \
+ }
+
+struct ili9805_instr {
+ size_t len;
+ const u8 *data;
+ u32 delay;
+};
+
+struct ili9805_desc {
+ const char *name;
+ const struct ili9805_instr *init;
+ const size_t init_length;
+ const struct drm_display_mode *mode;
+ u32 width_mm;
+ u32 height_mm;
+};
+
+struct ili9805 {
+ struct drm_panelpanel;
+ struct mipi_dsi_device *dsi;
+ const struct ili9805_desc *desc;
+
+ struct regulator*dvdd;
+ struct regulator*avdd;
+ struct gpio_desc*reset_gpio;
+};
+
+static const struct ili9805_instr gpm1780a0_init[] = {
+ ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG,
ILI9805_SETEXTC_PARAMETER1,
+ ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+ ILI9805_INSTR(100, 0xFD, 0x0F, 0x10, 0x44, 0x00),
+ ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x00,
+ 0x00, 0x30, 0x00, 0x00, 0x30, 0x00, 0x00),
+ ILI9805_INSTR(0, 0xB8, 0x62),
+ ILI9805_INSTR(0, 0xF1, 0x00),
+ ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+ ILI9805_INSTR(0, 0xF3, 0x60, 0x83, 0x04),
+ ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+ ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+ ILI9805_INSTR(0, 0xe0, 0x00, 0x08, 0x0d, 0x0e, 0x0e,
[PATCH v5 05/10] dt-bindings: display: panel: Add synaptics r63353 panel controller
From: Michael Trimarchi
Add documentation for "synaptics,r63353" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
Reviewed-by: Krzysztof Kozlowski
---
(no changes since v3)
Changes in v3:
- Add 'Reviewed-by' tag of Krzysztof Kozlowski.
- Replace "synaptics,r63353" compatible with "syna,r63353", as
required by vendor-prefixes.yaml.
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/synaptics,r63353.yaml | 61 +++
1 file changed, 61 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
new file mode 100644
index ..e5617d125567
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/synaptics,r63353.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synaptics R63353 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - sharp,ls068b3sx02
+ - const: syna,r63353
+
+ avdd-supply: true
+ dvdd-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "sharp,ls068b3sx02", "syna,r63353";
+reg = <0>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v5 06/10] drm/panel: Add Synaptics R63353 panel driver
From: Michael Trimarchi
The LS068B3SX02 panel is based on the Synaptics R63353 Controller.
Add a driver for it.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v5:
- Replace a 'return ret' with a 'goto fail' in the r63353_panel_activate()
Changes in v4:
- Set the reset gpio to low in a single operation
- Remove duplicated code for prepare/unprepare callbacks
Changes in v2:
- Adjust the timings of the panel reset
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-synaptics-r63353.c| 363 ++
4 files changed, 379 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-synaptics-r63353.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 788be9ab5b73..b82dc141d209 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6874,6 +6874,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/ste,mcde.yaml
F: drivers/gpu/drm/mcde/
+DRM DRIVER FOR SYNAPTICS R63353 PANELS
+M: Michael Trimarchi
+S: Maintained
+F: Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
+F: drivers/gpu/drm/panel/panel-synaptics-r63353.c
+
DRM DRIVER FOR TI DLPC3433 MIPI DSI TO DMD BRIDGE
M: Jagan Teki
S: Maintained
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..d018702be3dc 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -735,6 +735,15 @@ config DRM_PANEL_SITRONIX_ST7789V
Say Y here if you want to enable support for the Sitronix
ST7789V controller for 240x320 LCD panels
+config DRM_PANEL_SYNAPTICS_R63353
+ tristate "Synaptics R63353-based panels"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y if you want to enable support for panels based on the
+ Synaptics R63353 controller.
+
config DRM_PANEL_SONY_ACX565AKM
tristate "Sony ACX565AKM panel"
depends on GPIOLIB && OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..f267d932c2b5 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LS060T1SX01) +=
panel-sharp-ls060t1sx01.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o
+obj-$(CONFIG_DRM_PANEL_SYNAPTICS_R63353) += panel-synaptics-r63353.o
obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
obj-$(CONFIG_DRM_PANEL_SONY_TD4353_JDI) += panel-sony-td4353-jdi.o
obj-$(CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521) +=
panel-sony-tulip-truly-nt35521.o
diff --git a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
new file mode 100644
index ..3f61fcdc550b
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
@@ -0,0 +1,363 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Synaptics R63353 Controller driver
+ *
+ * Copyright (C) 2020 BSH Hausgerate GmbH
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#define R63353_INSTR(...) { \
+ .len = sizeof((u8[]) {__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} \
+ }
+
+struct r63353_instr {
+ size_t len;
+ const u8 *data;
+};
+
+static const struct r63353_instr sharp_ls068b3sx02_init[] = {
+ R63353_INSTR(0x51, 0xff),
+ R63353_INSTR(0x53, 0x0c),
+ R63353_INSTR(0x55, 0x00),
+ R63353_INSTR(0x84, 0x00),
+ R63353_INSTR(0x29),
+};
+
+struct r63353_desc {
+ const char *name;
+ const struct r63353_instr *init;
+ const size_t init_length;
+ const struct drm_display_mode *mode;
+ u32 width_mm;
+ u32 height_mm;
+};
+
+struct r63353_panel {
+ struct drm_panel base;
+ struct mipi_dsi_device *dsi;
+
+ struct gpio_desc *reset_gpio;
+ struct regulator *dvdd;
+ struct regulator *avdd;
+
+ struct r63353_desc *pdata;
+};
+
+static inline struct r63353_panel *to_r63353_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct r63353_panel, base);
+}
+
+static int r63353_panel_power_on(struct r63353_panel *rpanel)
+{
+ struct mipi_dsi_device *dsi = rpanel->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ ret = regulator_enable(rpanel->avdd);
+ if (ret) {
+ dev_err(dev, "Failed to enable avdd regulator (%d)\n", ret);
+ return ret;
+
[PATCH v5 04/10] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[PATCH v5 07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller
From: Michael Trimarchi
Add documentation for "ilitek,ili9805" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
Reviewed-by: Krzysztof Kozlowski
---
Changes in v5:
- Add 'Reviewed-by' tag of Krzysztof Kozlowski
Changes in v3:
- Drop power-supply
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/ilitek,ili9805.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
new file mode 100644
index ..f4f91f93f490
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9805.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek ILI9805 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - giantplus,gpm1790a0
+ - tianma,tm041xdhg01
+ - const: ilitek,ili9805
+
+ avdd-supply: true
+ dvdd-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "giantplus,gpm1790a0", "ilitek,ili9805";
+reg = <0>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v5 03/10] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[PATCH v5 01/10] drm/bridge: Fix bridge disable logic
As explained by the comment of the fixed code, we need to find the next
bridge that hasn't set the "pre_enable_prev_first" flag to true. The code,
on the contrary, was doing the opposite.
So, the order of disabling the bridges couldn't be altered as required
by setting the "pre_enable_prev_first" flag to true.
Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
bridge init order")
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/drm_bridge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index 30d66bee0ec6..f66bf4925dd8 100644
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -686,7 +686,7 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge
*bridge,
*/
list_for_each_entry_from(next,
&encoder->bridge_chain,
chain_node) {
- if (next->pre_enable_prev_first) {
+ if (!next->pre_enable_prev_first) {
next = list_prev_entry(next,
chain_node);
limit = next;
break;
--
2.43.0
[PATCH v5 00/10] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. This required applying some patches to the samsung-dsim driver and the drm_bridge.c module. Changes in v5: - Replace a 'return ret' with a 'goto fail' in the r63353_panel_activate() - Add 'Reviewed-by' tag of Krzysztof Kozlowski Changes in v4: - Set the reset gpio to low in a single operation - Remove duplicated code for prepare/unprepare callbacks - Remove duplicated code for prepare/unprepare callbacks - Add Reviewed-by tag of Neil Armstrong Changes in v3: - Add 'Reviewed-by' tag of Krzysztof Kozlowski. - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Drop power-supply - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties - Adjust the timings of the panel reset - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (4): drm/bridge: Fix bridge disable logic drm/bridge: Fix a use case in the bridge disable logic drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Michael Trimarchi (6): dt-bindings: display: panel: Add synaptics r63353 panel controller drm/panel: Add Synaptics R63353 panel driver dt-bindings: display: panel: Add Ilitek ili9805 panel controller drm/panel: Add Ilitek ILI9805 panel driver drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup .../display/panel/ilitek,ili9805.yaml | 62 +++ .../display/panel/synaptics,r63353.yaml | 61 +++ MAINTAINERS | 12 + .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 + .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 121 ++ drivers/gpu/drm/bridge/samsung-dsim.c | 14 +- drivers/gpu/drm/drm_bridge.c | 9 +- drivers/gpu/drm/panel/Kconfig | 18 + drivers/gpu/drm/panel/Makefile| 2 + drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 406 ++ .../gpu/drm/panel/panel-synaptics-r63353.c| 363 11 files changed, 1062 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml create mode 100644 Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9805.c create mode 100644 drivers/gpu/drm/panel/panel-synaptics-r63353.c -- 2.43.0
[PATCH v5 02/10] drm/bridge: Fix a use case in the bridge disable logic
The patch fixes the code for finding the next bridge with the
"pre_enable_prev_first" flag set to false. In case this condition is
not verified, i. e. there is no subsequent bridge with the flag set to
false, the whole bridge list is traversed, invalidating the "next"
variable.
The use of a new iteration variable (i. e. "iter") ensures that the value
of the "next" variable is not invalidated.
Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
bridge init order")
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/drm_bridge.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index f66bf4925dd8..2e5781bf192e 100644
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -662,7 +662,7 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge
*bridge,
struct drm_atomic_state *old_state)
{
struct drm_encoder *encoder;
- struct drm_bridge *next, *limit;
+ struct drm_bridge *iter, *next, *limit;
if (!bridge)
return;
@@ -680,14 +680,15 @@ void drm_atomic_bridge_chain_post_disable(struct
drm_bridge *bridge,
* was enabled first, so disabled last
*/
limit = next;
+ iter = next;
/* Find the next bridge that has NOT requested
* prev to be enabled first / disabled last
*/
- list_for_each_entry_from(next,
&encoder->bridge_chain,
+ list_for_each_entry_from(iter,
&encoder->bridge_chain,
chain_node) {
- if (!next->pre_enable_prev_first) {
- next = list_prev_entry(next,
chain_node);
+ if (!iter->pre_enable_prev_first) {
+ next = list_prev_entry(iter,
chain_node);
limit = next;
break;
}
--
2.43.0
[PATCH] drm/debugfs: drop unneeded DEBUG_FS guard
The Makefile enables/disables the file compilation depending on CONFIG_DEBUG_FS. Signed-off-by: Dario Binacchi --- drivers/gpu/drm/drm_debugfs.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c index f291fb4b359f..f80d9cf3e71a 100644 --- a/drivers/gpu/drm/drm_debugfs.c +++ b/drivers/gpu/drm/drm_debugfs.c @@ -45,8 +45,6 @@ #include "drm_crtc_internal.h" #include "drm_internal.h" -#if defined(CONFIG_DEBUG_FS) - /*** * Initialization, etc. **/ @@ -588,5 +586,3 @@ void drm_debugfs_crtc_remove(struct drm_crtc *crtc) debugfs_remove_recursive(crtc->debugfs_entry); crtc->debugfs_entry = NULL; } - -#endif /* CONFIG_DEBUG_FS */ -- 2.43.0
Re: [PATCH v4 02/10] drm/bridge: Fix a use case in the bridge disable logic
Hi Dave and Jagan,
On Tue, Dec 5, 2023 at 4:39 PM Dave Stevenson
wrote:
>
> Hi Dario
>
> On Tue, 5 Dec 2023 at 10:54, Dario Binacchi
> wrote:
> >
> > The patch fixes the code for finding the next bridge with the
> > "pre_enable_prev_first" flag set to false. In case this condition is
> > not verified, i. e. there is no subsequent bridge with the flag set to
> > false, the whole bridge list is traversed, invalidating the "next"
> > variable.
> >
> > The use of a new iteration variable (i. e. "iter") ensures that the value
> > of the "next" variable is not invalidated.
>
> We already have https://patchwork.freedesktop.org/patch/529288/ that
> has been reviewed (but not applied) to resolve this. What does this
> version do differently and why?
My patches only affect drm_atomic_bridge_chain_post_disable(), whereas
Jagan's patch affects both
drm_atomic_bridge_chain_post_disable() and drm_atomic_bridge_chain_pre_enable().
I tested Jagan's patch on my system with success and I reviewed with
Michael Trimarchi the
drm_atomic_bridge_chain_pre_enable() fixing and we think it's okay.
We also believe that our changes to post_disable() are better, as we
set the 'next' variable only when required,
and the code is more optimized since the list_is_last() is not called
within the loop.
Would it be possible to use Jagan's patch for fixing
drm_atomic_bridge_chain_pre_enable() and mine for
fixing drm_atomic_bridge_chain_post_disable()?
Thanks and regards,
Dario
>
> Dave
>
> > Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
> > bridge init order")
> > Co-developed-by: Michael Trimarchi
> > Signed-off-by: Michael Trimarchi
> > Signed-off-by: Dario Binacchi
> > ---
> >
> > (no changes since v1)
> >
> > drivers/gpu/drm/drm_bridge.c | 9 +
> > 1 file changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
> > index f66bf4925dd8..2e5781bf192e 100644
> > --- a/drivers/gpu/drm/drm_bridge.c
> > +++ b/drivers/gpu/drm/drm_bridge.c
> > @@ -662,7 +662,7 @@ void drm_atomic_bridge_chain_post_disable(struct
> > drm_bridge *bridge,
> > struct drm_atomic_state
> > *old_state)
> > {
> > struct drm_encoder *encoder;
> > - struct drm_bridge *next, *limit;
> > + struct drm_bridge *iter, *next, *limit;
> >
> > if (!bridge)
> > return;
> > @@ -680,14 +680,15 @@ void drm_atomic_bridge_chain_post_disable(struct
> > drm_bridge *bridge,
> > * was enabled first, so disabled last
> > */
> > limit = next;
> > + iter = next;
> >
> > /* Find the next bridge that has NOT
> > requested
> > * prev to be enabled first / disabled last
> > */
> > - list_for_each_entry_from(next,
> > &encoder->bridge_chain,
> > + list_for_each_entry_from(iter,
> > &encoder->bridge_chain,
> > chain_node) {
> > - if (!next->pre_enable_prev_first) {
> > - next =
> > list_prev_entry(next, chain_node);
> > + if (!iter->pre_enable_prev_first) {
> > + next =
> > list_prev_entry(iter, chain_node);
> > limit = next;
> > break;
> > }
> > --
> > 2.43.0
> >
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
[PATCH v4 09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel
From: Michael Trimarchi
Tianma TM041XDHG01 utilizes the Ilitek ILI9805 controller.
Add this panel's initialzation sequence and timing to ILI9805 driver.
Signed-off-by: Michael Trimarchi
Reviewed-by: Neil Armstrong
Signed-off-by: Dario Binacchi
---
Changes in v4:
- Add Reviewed-by tag of Neil Armstrong
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 53
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
index e36984b46e14..5054d1a2b2f5 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -87,6 +87,36 @@ static const struct ili9805_instr gpm1780a0_init[] = {
ILI9805_INSTR(0, 0xB9, 0x02, 0x00),
};
+static const struct ili9805_instr tm041xdhg01_init[] = {
+ ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG,
ILI9805_SETEXTC_PARAMETER1,
+ ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+ ILI9805_INSTR(100, 0xFD, 0x0F, 0x13, 0x44, 0x00),
+ ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x01,
+ 0x01, 0x30, 0x01, 0x01, 0x30, 0x01, 0x01),
+ ILI9805_INSTR(0, 0xB8, 0x74),
+ ILI9805_INSTR(0, 0xF1, 0x00),
+ ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+ ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+ ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+ ILI9805_INSTR(0, 0xe0, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(0, 0xe1, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(10, 0xc1, 0x15, 0x03, 0x03, 0x31),
+ ILI9805_INSTR(10, 0xB1, 0x00, 0x12, 0x14),
+ ILI9805_INSTR(10, 0xB4, 0x02),
+ ILI9805_INSTR(0, 0xBB, 0x14, 0x55),
+ ILI9805_INSTR(0, MIPI_DCS_SET_ADDRESS_MODE, 0x0a),
+ ILI9805_INSTR(0, MIPI_DCS_SET_PIXEL_FORMAT, 0x77),
+ ILI9805_INSTR(0, 0x20),
+ ILI9805_INSTR(0, 0xB0, 0x00),
+ ILI9805_INSTR(0, 0xB6, 0x01),
+ ILI9805_INSTR(0, 0xc2, 0x11),
+ ILI9805_INSTR(0, 0x51, 0xFF),
+ ILI9805_INSTR(0, 0x53, 0x24),
+ ILI9805_INSTR(0, 0x55, 0x00),
+};
+
static inline struct ili9805 *panel_to_ili9805(struct drm_panel *panel)
{
return container_of(panel, struct ili9805, panel);
@@ -227,6 +257,20 @@ static const struct drm_display_mode gpm1780a0_timing = {
.vtotal = 480 + 2 + 4 + 10,
};
+static const struct drm_display_mode tm041xdhg01_timing = {
+ .clock = 26227,
+
+ .hdisplay = 480,
+ .hsync_start = 480 + 10,
+ .hsync_end = 480 + 10 + 2,
+ .htotal = 480 + 10 + 2 + 36,
+
+ .vdisplay = 768,
+ .vsync_start = 768 + 2,
+ .vsync_end = 768 + 10 + 4,
+ .vtotal = 768 + 2 + 4 + 10,
+};
+
static int ili9805_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -331,8 +375,17 @@ static const struct ili9805_desc gpm1780a0_desc = {
.height_mm = 65,
};
+static const struct ili9805_desc tm041xdhg01_desc = {
+ .init = tm041xdhg01_init,
+ .init_length = ARRAY_SIZE(tm041xdhg01_init),
+ .mode = &tm041xdhg01_timing,
+ .width_mm = 42,
+ .height_mm = 96,
+};
+
static const struct of_device_id ili9805_of_match[] = {
{ .compatible = "giantplus,gpm1790a0", .data = &gpm1780a0_desc },
+ { .compatible = "tianma,tm041xdhg01", .data = &tm041xdhg01_desc },
{ }
};
MODULE_DEVICE_TABLE(of, ili9805_of_match);
--
2.43.0
[PATCH v4 08/10] drm/panel: Add Ilitek ILI9805 panel driver
From: Michael Trimarchi
The GPM1790A0 panel is based on the Ilitek ILI9805 Controller.
Add a driver for it.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v4:
- Remove duplicated code for prepare/unprepare callbacks
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig| 9 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 353 +++
4 files changed, 369 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9805.c
diff --git a/MAINTAINERS b/MAINTAINERS
index b82dc141d209..4dccc72a0ed6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6646,6 +6646,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/ilitek,ili9486.yaml
F: drivers/gpu/drm/tiny/ili9486.c
+DRM DRIVER FOR ILITEK ILI9805 PANELS
+M: Michael Trimarchi
+S: Maintained
+F: Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
+F: drivers/gpu/drm/panel/panel-ilitek-ili9805.c
+
DRM DRIVER FOR JADARD JD9365DA-H3 MIPI-DSI LCD PANELS
M: Jagan Teki
S: Maintained
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d018702be3dc..dad938cf6dec 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -194,6 +194,15 @@ config DRM_PANEL_ILITEK_ILI9341
QVGA (240x320) RGB panels. support serial & parallel rgb
interface.
+config DRM_PANEL_ILITEK_ILI9805
+ tristate "Ilitek ILI9805-based panels"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y if you want to enable support for panels based on the
+ Ilitek ILI9805 controller.
+
config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f267d932c2b5..d94a644d0a6c 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) +=
panel-feiyang-fy07024di26a30d
obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9805) += panel-ilitek-ili9805.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
new file mode 100644
index ..e36984b46e14
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -0,0 +1,353 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 BSH Hausgerate GmbH
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#define ILI9805_EXTCMD_CMD_SET_ENABLE_REG (0xff)
+#define ILI9805_SETEXTC_PARAMETER1 (0xff)
+#define ILI9805_SETEXTC_PARAMETER2 (0x98)
+#define ILI9805_SETEXTC_PARAMETER3 (0x05)
+
+#define ILI9805_INSTR(_delay, ...) { \
+ .delay = (_delay), \
+ .len = sizeof((u8[]) {__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} \
+ }
+
+struct ili9805_instr {
+ size_t len;
+ const u8 *data;
+ u32 delay;
+};
+
+struct ili9805_desc {
+ const char *name;
+ const struct ili9805_instr *init;
+ const size_t init_length;
+ const struct drm_display_mode *mode;
+ u32 width_mm;
+ u32 height_mm;
+};
+
+struct ili9805 {
+ struct drm_panelpanel;
+ struct mipi_dsi_device *dsi;
+ const struct ili9805_desc *desc;
+
+ struct regulator*dvdd;
+ struct regulator*avdd;
+ struct gpio_desc*reset_gpio;
+};
+
+static const struct ili9805_instr gpm1780a0_init[] = {
+ ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG,
ILI9805_SETEXTC_PARAMETER1,
+ ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+ ILI9805_INSTR(100, 0xFD, 0x0F, 0x10, 0x44, 0x00),
+ ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x00,
+ 0x00, 0x30, 0x00, 0x00, 0x30, 0x00, 0x00),
+ ILI9805_INSTR(0, 0xB8, 0x62),
+ ILI9805_INSTR(0, 0xF1, 0x00),
+ ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+ ILI9805_INSTR(0, 0xF3, 0x60, 0x83, 0x04),
+ ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+ ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+ ILI9805_INSTR(0, 0xe0, 0x00, 0x08, 0x0d, 0x0e, 0x0e, 0x0d, 0x0a, 0x08,
0x04,
+
[PATCH v4 04/10] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[PATCH v4 07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller
From: Michael Trimarchi
Add documentation for "ilitek,ili9805" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v3)
Changes in v3:
- Drop power-supply
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/ilitek,ili9805.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
new file mode 100644
index ..f4f91f93f490
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9805.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek ILI9805 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - giantplus,gpm1790a0
+ - tianma,tm041xdhg01
+ - const: ilitek,ili9805
+
+ avdd-supply: true
+ dvdd-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "giantplus,gpm1790a0", "ilitek,ili9805";
+reg = <0>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v4 06/10] drm/panel: Add Synaptics R63353 panel driver
From: Michael Trimarchi
The LS068B3SX02 panel is based on the Synaptics R63353 Controller.
Add a driver for it.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v4:
- Set the reset gpio to low in a single operation
- Remove duplicated code for prepare/unprepare callbacks
Changes in v2:
- Adjust the timings of the panel reset
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-synaptics-r63353.c| 363 ++
4 files changed, 379 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-synaptics-r63353.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 788be9ab5b73..b82dc141d209 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6874,6 +6874,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/ste,mcde.yaml
F: drivers/gpu/drm/mcde/
+DRM DRIVER FOR SYNAPTICS R63353 PANELS
+M: Michael Trimarchi
+S: Maintained
+F: Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
+F: drivers/gpu/drm/panel/panel-synaptics-r63353.c
+
DRM DRIVER FOR TI DLPC3433 MIPI DSI TO DMD BRIDGE
M: Jagan Teki
S: Maintained
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..d018702be3dc 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -735,6 +735,15 @@ config DRM_PANEL_SITRONIX_ST7789V
Say Y here if you want to enable support for the Sitronix
ST7789V controller for 240x320 LCD panels
+config DRM_PANEL_SYNAPTICS_R63353
+ tristate "Synaptics R63353-based panels"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y if you want to enable support for panels based on the
+ Synaptics R63353 controller.
+
config DRM_PANEL_SONY_ACX565AKM
tristate "Sony ACX565AKM panel"
depends on GPIOLIB && OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..f267d932c2b5 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LS060T1SX01) +=
panel-sharp-ls060t1sx01.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o
+obj-$(CONFIG_DRM_PANEL_SYNAPTICS_R63353) += panel-synaptics-r63353.o
obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
obj-$(CONFIG_DRM_PANEL_SONY_TD4353_JDI) += panel-sony-td4353-jdi.o
obj-$(CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521) +=
panel-sony-tulip-truly-nt35521.o
diff --git a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
new file mode 100644
index ..0a3c2a3d5998
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
@@ -0,0 +1,363 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Synaptics R63353 Controller driver
+ *
+ * Copyright (C) 2020 BSH Hausgerate GmbH
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#define R63353_INSTR(...) { \
+ .len = sizeof((u8[]) {__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} \
+ }
+
+struct r63353_instr {
+ size_t len;
+ const u8 *data;
+};
+
+static const struct r63353_instr sharp_ls068b3sx02_init[] = {
+ R63353_INSTR(0x51, 0xff),
+ R63353_INSTR(0x53, 0x0c),
+ R63353_INSTR(0x55, 0x00),
+ R63353_INSTR(0x84, 0x00),
+ R63353_INSTR(0x29),
+};
+
+struct r63353_desc {
+ const char *name;
+ const struct r63353_instr *init;
+ const size_t init_length;
+ const struct drm_display_mode *mode;
+ u32 width_mm;
+ u32 height_mm;
+};
+
+struct r63353_panel {
+ struct drm_panel base;
+ struct mipi_dsi_device *dsi;
+
+ struct gpio_desc *reset_gpio;
+ struct regulator *dvdd;
+ struct regulator *avdd;
+
+ struct r63353_desc *pdata;
+};
+
+static inline struct r63353_panel *to_r63353_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct r63353_panel, base);
+}
+
+static int r63353_panel_power_on(struct r63353_panel *rpanel)
+{
+ struct mipi_dsi_device *dsi = rpanel->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ ret = regulator_enable(rpanel->avdd);
+ if (ret) {
+ dev_err(dev, "Failed to enable avdd regulator (%d)\n", ret);
+ return ret;
+ }
+
+ usleep_range(15000, 25000);
+
+ ret = regulator_enable(rpanel->dvdd);
+
[PATCH v4 05/10] dt-bindings: display: panel: Add synaptics r63353 panel controller
From: Michael Trimarchi
Add documentation for "synaptics,r63353" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
Reviewed-by: Krzysztof Kozlowski
---
(no changes since v3)
Changes in v3:
- Add 'Reviewed-by' tag of Krzysztof Kozlowski.
- Replace "synaptics,r63353" compatible with "syna,r63353", as
required by vendor-prefixes.yaml.
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/synaptics,r63353.yaml | 61 +++
1 file changed, 61 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
new file mode 100644
index ..e5617d125567
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/synaptics,r63353.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synaptics R63353 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - sharp,ls068b3sx02
+ - const: syna,r63353
+
+ avdd-supply: true
+ dvdd-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "sharp,ls068b3sx02", "syna,r63353";
+reg = <0>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v4 03/10] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[PATCH v4 02/10] drm/bridge: Fix a use case in the bridge disable logic
The patch fixes the code for finding the next bridge with the
"pre_enable_prev_first" flag set to false. In case this condition is
not verified, i. e. there is no subsequent bridge with the flag set to
false, the whole bridge list is traversed, invalidating the "next"
variable.
The use of a new iteration variable (i. e. "iter") ensures that the value
of the "next" variable is not invalidated.
Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
bridge init order")
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/drm_bridge.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index f66bf4925dd8..2e5781bf192e 100644
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -662,7 +662,7 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge
*bridge,
struct drm_atomic_state *old_state)
{
struct drm_encoder *encoder;
- struct drm_bridge *next, *limit;
+ struct drm_bridge *iter, *next, *limit;
if (!bridge)
return;
@@ -680,14 +680,15 @@ void drm_atomic_bridge_chain_post_disable(struct
drm_bridge *bridge,
* was enabled first, so disabled last
*/
limit = next;
+ iter = next;
/* Find the next bridge that has NOT requested
* prev to be enabled first / disabled last
*/
- list_for_each_entry_from(next,
&encoder->bridge_chain,
+ list_for_each_entry_from(iter,
&encoder->bridge_chain,
chain_node) {
- if (!next->pre_enable_prev_first) {
- next = list_prev_entry(next,
chain_node);
+ if (!iter->pre_enable_prev_first) {
+ next = list_prev_entry(iter,
chain_node);
limit = next;
break;
}
--
2.43.0
[PATCH v4 01/10] drm/bridge: Fix bridge disable logic
As explained by the comment of the fixed code, we need to find the next
bridge that hasn't set the "pre_enable_prev_first" flag to true. The code,
on the contrary, was doing the opposite.
So, the order of disabling the bridges couldn't be altered as required
by setting the "pre_enable_prev_first" flag to true.
Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
bridge init order")
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/drm_bridge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index 30d66bee0ec6..f66bf4925dd8 100644
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -686,7 +686,7 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge
*bridge,
*/
list_for_each_entry_from(next,
&encoder->bridge_chain,
chain_node) {
- if (next->pre_enable_prev_first) {
+ if (!next->pre_enable_prev_first) {
next = list_prev_entry(next,
chain_node);
limit = next;
break;
--
2.43.0
[PATCH v4 00/10] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. This required applying some patches to the samsung-dsim driver and the drm_bridge.c module. Changes in v4: - Set the reset gpio to low in a single operation - Remove duplicated code for prepare/unprepare callbacks - Add 'Reviewed-by; tag of Neil Armstrong Changes in v3: - Add 'Reviewed-by' tag of Krzysztof Kozlowski. - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Drop power-supply - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties - Adjust the timings of the panel reset - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (4): drm/bridge: Fix bridge disable logic drm/bridge: Fix a use case in the bridge disable logic drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Michael Trimarchi (6): dt-bindings: display: panel: Add synaptics r63353 panel controller drm/panel: Add Synaptics R63353 panel driver dt-bindings: display: panel: Add Ilitek ili9805 panel controller drm/panel: Add Ilitek ILI9805 panel driver drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup .../display/panel/ilitek,ili9805.yaml | 62 +++ .../display/panel/synaptics,r63353.yaml | 61 +++ MAINTAINERS | 12 + .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 + .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 121 ++ drivers/gpu/drm/bridge/samsung-dsim.c | 14 +- drivers/gpu/drm/drm_bridge.c | 9 +- drivers/gpu/drm/panel/Kconfig | 18 + drivers/gpu/drm/panel/Makefile| 2 + drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 406 ++ .../gpu/drm/panel/panel-synaptics-r63353.c| 363 11 files changed, 1062 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml create mode 100644 Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9805.c create mode 100644 drivers/gpu/drm/panel/panel-synaptics-r63353.c -- 2.43.0
[PATCH v3 09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel
From: Michael Trimarchi
Tianma TM041XDHG01 utilizes the Ilitek ILI9805 controller.
Add this panel's initialzation sequence and timing to ILI9805 driver.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 53
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
index 749959e10d92..cd187b0b1998 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -89,6 +89,36 @@ static const struct ili9805_instr gpm1780a0_init[] = {
ILI9805_INSTR(0, 0xB9, 0x02, 0x00),
};
+static const struct ili9805_instr tm041xdhg01_init[] = {
+ ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG,
ILI9805_SETEXTC_PARAMETER1,
+ ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+ ILI9805_INSTR(100, 0xFD, 0x0F, 0x13, 0x44, 0x00),
+ ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x01,
+ 0x01, 0x30, 0x01, 0x01, 0x30, 0x01, 0x01),
+ ILI9805_INSTR(0, 0xB8, 0x74),
+ ILI9805_INSTR(0, 0xF1, 0x00),
+ ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+ ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+ ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+ ILI9805_INSTR(0, 0xe0, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(0, 0xe1, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(10, 0xc1, 0x15, 0x03, 0x03, 0x31),
+ ILI9805_INSTR(10, 0xB1, 0x00, 0x12, 0x14),
+ ILI9805_INSTR(10, 0xB4, 0x02),
+ ILI9805_INSTR(0, 0xBB, 0x14, 0x55),
+ ILI9805_INSTR(0, MIPI_DCS_SET_ADDRESS_MODE, 0x0a),
+ ILI9805_INSTR(0, MIPI_DCS_SET_PIXEL_FORMAT, 0x77),
+ ILI9805_INSTR(0, 0x20),
+ ILI9805_INSTR(0, 0xB0, 0x00),
+ ILI9805_INSTR(0, 0xB6, 0x01),
+ ILI9805_INSTR(0, 0xc2, 0x11),
+ ILI9805_INSTR(0, 0x51, 0xFF),
+ ILI9805_INSTR(0, 0x53, 0x24),
+ ILI9805_INSTR(0, 0x55, 0x00),
+};
+
static inline struct ili9805 *panel_to_ili9805(struct drm_panel *panel)
{
return container_of(panel, struct ili9805, panel);
@@ -239,6 +269,20 @@ static const struct drm_display_mode gpm1780a0_timing = {
.vtotal = 480 + 2 + 4 + 10,
};
+static const struct drm_display_mode tm041xdhg01_timing = {
+ .clock = 26227,
+
+ .hdisplay = 480,
+ .hsync_start = 480 + 10,
+ .hsync_end = 480 + 10 + 2,
+ .htotal = 480 + 10 + 2 + 36,
+
+ .vdisplay = 768,
+ .vsync_start = 768 + 2,
+ .vsync_end = 768 + 10 + 4,
+ .vtotal = 768 + 2 + 4 + 10,
+};
+
static int ili9805_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -343,8 +387,17 @@ static const struct ili9805_desc gpm1780a0_desc = {
.height_mm = 65,
};
+static const struct ili9805_desc tm041xdhg01_desc = {
+ .init = tm041xdhg01_init,
+ .init_length = ARRAY_SIZE(tm041xdhg01_init),
+ .mode = &tm041xdhg01_timing,
+ .width_mm = 42,
+ .height_mm = 96,
+};
+
static const struct of_device_id ili9805_of_match[] = {
{ .compatible = "giantplus,gpm1790a0", .data = &gpm1780a0_desc },
+ { .compatible = "tianma,tm041xdhg01", .data = &tm041xdhg01_desc },
{ }
};
MODULE_DEVICE_TABLE(of, ili9805_of_match);
--
2.43.0
[PATCH v3 07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller
From: Michael Trimarchi
Add documentation for "ilitek,ili9805" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v3:
- Drop power-supply
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/ilitek,ili9805.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
new file mode 100644
index ..f4f91f93f490
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9805.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek ILI9805 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - giantplus,gpm1790a0
+ - tianma,tm041xdhg01
+ - const: ilitek,ili9805
+
+ avdd-supply: true
+ dvdd-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "giantplus,gpm1790a0", "ilitek,ili9805";
+reg = <0>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v3 06/10] drm/panel: Add Synaptics R63353 panel driver
From: Michael Trimarchi
The LS068B3SX02 panel is based on the Synaptics R63353 Controller.
Add a driver for it.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v2)
Changes in v2:
- Adjust the timings of the panel reset
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-synaptics-r63353.c| 375 ++
4 files changed, 391 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-synaptics-r63353.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 012df8ccf34e..c373764b6e64 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6875,6 +6875,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/ste,mcde.yaml
F: drivers/gpu/drm/mcde/
+DRM DRIVER FOR SYNAPTICS R63353 PANELS
+M: Michael Trimarchi
+S: Maintained
+F: Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
+F: drivers/gpu/drm/panel/panel-synaptics-r63353.c
+
DRM DRIVER FOR TI DLPC3433 MIPI DSI TO DMD BRIDGE
M: Jagan Teki
S: Maintained
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..d018702be3dc 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -735,6 +735,15 @@ config DRM_PANEL_SITRONIX_ST7789V
Say Y here if you want to enable support for the Sitronix
ST7789V controller for 240x320 LCD panels
+config DRM_PANEL_SYNAPTICS_R63353
+ tristate "Synaptics R63353-based panels"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y if you want to enable support for panels based on the
+ Synaptics R63353 controller.
+
config DRM_PANEL_SONY_ACX565AKM
tristate "Sony ACX565AKM panel"
depends on GPIOLIB && OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..f267d932c2b5 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LS060T1SX01) +=
panel-sharp-ls060t1sx01.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) += panel-sitronix-st7701.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o
obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o
+obj-$(CONFIG_DRM_PANEL_SYNAPTICS_R63353) += panel-synaptics-r63353.o
obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
obj-$(CONFIG_DRM_PANEL_SONY_TD4353_JDI) += panel-sony-td4353-jdi.o
obj-$(CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521) +=
panel-sony-tulip-truly-nt35521.o
diff --git a/drivers/gpu/drm/panel/panel-synaptics-r63353.c
b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
new file mode 100644
index ..d45373de7c9f
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-synaptics-r63353.c
@@ -0,0 +1,375 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Synaptics R63353 Controller driver
+ *
+ * Copyright (C) 2020 BSH Hausgerate GmbH
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#define R63353_INSTR(...) { \
+ .len = sizeof((u8[]) {__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} \
+ }
+
+struct r63353_instr {
+ size_t len;
+ const u8 *data;
+};
+
+static const struct r63353_instr sharp_ls068b3sx02_init[] = {
+ R63353_INSTR(0x51, 0xff),
+ R63353_INSTR(0x53, 0x0c),
+ R63353_INSTR(0x55, 0x00),
+ R63353_INSTR(0x84, 0x00),
+ R63353_INSTR(0x29),
+};
+
+struct r63353_desc {
+ const char *name;
+ const struct r63353_instr *init;
+ const size_t init_length;
+ const struct drm_display_mode *mode;
+ u32 width_mm;
+ u32 height_mm;
+};
+
+struct r63353_panel {
+ struct drm_panel base;
+ struct mipi_dsi_device *dsi;
+
+ struct gpio_desc *reset_gpio;
+ struct regulator *dvdd;
+ struct regulator *avdd;
+
+ bool prepared;
+ struct r63353_desc *pdata;
+};
+
+static inline struct r63353_panel *to_r63353_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct r63353_panel, base);
+}
+
+static int r63353_panel_power_on(struct r63353_panel *rpanel)
+{
+ struct mipi_dsi_device *dsi = rpanel->dsi;
+ struct device *dev = &dsi->dev;
+ int ret;
+
+ ret = regulator_enable(rpanel->avdd);
+ if (ret) {
+ dev_err(dev, "Failed to enable avdd regulator (%d)\n", ret);
+ return ret;
+ }
+
+ usleep_range(15000, 25000);
+
+ ret = regulator_enable(rpanel->dvdd);
+ if (ret) {
+ dev_err(dev, "Failed to enable dvdd regu
[PATCH v3 04/10] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting
The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@
#define DSIM_MFLUSH_VS BIT(29)
/* This flag is valid only for exynos3250/3472/5260/5430 */
#define DSIM_CLKLANE_STOP BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANEBIT(31)
/* DSIM_ESCMODE */
#define DSIM_TX_TRIGGER_RSTBIT(4)
@@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
* power consumption.
*/
if (driver_data->has_clklane_stop &&
- dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
reg |= DSIM_CLKLANE_STOP;
+ }
samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
lanes_mask = BIT(dsi->lanes) - 1;
--
2.43.0
[PATCH v3 02/10] drm/bridge: Fix a use case in the bridge disable logic
The patch fixes the code for finding the next bridge with the
"pre_enable_prev_first" flag set to false. In case this condition is
not verified, i. e. there is no subsequent bridge with the flag set to
false, the whole bridge list is traversed, invalidating the "next"
variable.
The use of a new iteration variable (i. e. "iter") ensures that the value
of the "next" variable is not invalidated.
Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
bridge init order")
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/drm_bridge.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index f66bf4925dd8..2e5781bf192e 100644
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -662,7 +662,7 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge
*bridge,
struct drm_atomic_state *old_state)
{
struct drm_encoder *encoder;
- struct drm_bridge *next, *limit;
+ struct drm_bridge *iter, *next, *limit;
if (!bridge)
return;
@@ -680,14 +680,15 @@ void drm_atomic_bridge_chain_post_disable(struct
drm_bridge *bridge,
* was enabled first, so disabled last
*/
limit = next;
+ iter = next;
/* Find the next bridge that has NOT requested
* prev to be enabled first / disabled last
*/
- list_for_each_entry_from(next,
&encoder->bridge_chain,
+ list_for_each_entry_from(iter,
&encoder->bridge_chain,
chain_node) {
- if (!next->pre_enable_prev_first) {
- next = list_prev_entry(next,
chain_node);
+ if (!iter->pre_enable_prev_first) {
+ next = list_prev_entry(iter,
chain_node);
limit = next;
break;
}
--
2.43.0
[PATCH v3 05/10] dt-bindings: display: panel: Add synaptics r63353 panel controller
From: Michael Trimarchi
Add documentation for "synaptics,r63353" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
Reviewed-by: Krzysztof Kozlowski
---
Changes in v3:
- Add 'Reviewed-by' tag of Krzysztof Kozlowski.
- Replace "synaptics,r63353" compatible with "syna,r63353", as
required by vendor-prefixes.yaml.
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/synaptics,r63353.yaml | 61 +++
1 file changed, 61 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
new file mode 100644
index ..e5617d125567
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/synaptics,r63353.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synaptics R63353 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - sharp,ls068b3sx02
+ - const: syna,r63353
+
+ avdd-supply: true
+ dvdd-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "sharp,ls068b3sx02", "syna,r63353";
+reg = <0>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.43.0
[PATCH v3 03/10] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.43.0
[PATCH v3 08/10] drm/panel: Add Ilitek ILI9805 panel driver
From: Michael Trimarchi
The GPM1790A0 panel is based on the Ilitek ILI9805 Controller.
Add a driver for it.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig| 9 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 365 +++
4 files changed, 381 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9805.c
diff --git a/MAINTAINERS b/MAINTAINERS
index c373764b6e64..a89fbc811dc5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6647,6 +6647,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/ilitek,ili9486.yaml
F: drivers/gpu/drm/tiny/ili9486.c
+DRM DRIVER FOR ILITEK ILI9805 PANELS
+M: Michael Trimarchi
+S: Maintained
+F: Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
+F: drivers/gpu/drm/panel/panel-ilitek-ili9805.c
+
DRM DRIVER FOR JADARD JD9365DA-H3 MIPI-DSI LCD PANELS
M: Jagan Teki
S: Maintained
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d018702be3dc..dad938cf6dec 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -194,6 +194,15 @@ config DRM_PANEL_ILITEK_ILI9341
QVGA (240x320) RGB panels. support serial & parallel rgb
interface.
+config DRM_PANEL_ILITEK_ILI9805
+ tristate "Ilitek ILI9805-based panels"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y if you want to enable support for panels based on the
+ Ilitek ILI9805 controller.
+
config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f267d932c2b5..d94a644d0a6c 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) +=
panel-feiyang-fy07024di26a30d
obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9805) += panel-ilitek-ili9805.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
new file mode 100644
index ..749959e10d92
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -0,0 +1,365 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 BSH Hausgerate GmbH
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#define ILI9805_EXTCMD_CMD_SET_ENABLE_REG (0xff)
+#define ILI9805_SETEXTC_PARAMETER1 (0xff)
+#define ILI9805_SETEXTC_PARAMETER2 (0x98)
+#define ILI9805_SETEXTC_PARAMETER3 (0x05)
+
+#define ILI9805_INSTR(_delay, ...) { \
+ .delay = (_delay), \
+ .len = sizeof((u8[]) {__VA_ARGS__}), \
+ .data = (u8[]){__VA_ARGS__} \
+ }
+
+struct ili9805_instr {
+ size_t len;
+ const u8 *data;
+ u32 delay;
+};
+
+struct ili9805_desc {
+ const char *name;
+ const struct ili9805_instr *init;
+ const size_t init_length;
+ const struct drm_display_mode *mode;
+ u32 width_mm;
+ u32 height_mm;
+};
+
+struct ili9805 {
+ struct drm_panelpanel;
+ struct mipi_dsi_device *dsi;
+ const struct ili9805_desc *desc;
+
+ struct regulator*dvdd;
+ struct regulator*avdd;
+ struct gpio_desc*reset_gpio;
+
+ boolprepared;
+};
+
+static const struct ili9805_instr gpm1780a0_init[] = {
+ ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG,
ILI9805_SETEXTC_PARAMETER1,
+ ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+ ILI9805_INSTR(100, 0xFD, 0x0F, 0x10, 0x44, 0x00),
+ ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x00,
+ 0x00, 0x30, 0x00, 0x00, 0x30, 0x00, 0x00),
+ ILI9805_INSTR(0, 0xB8, 0x62),
+ ILI9805_INSTR(0, 0xF1, 0x00),
+ ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+ ILI9805_INSTR(0, 0xF3, 0x60, 0x83, 0x04),
+ ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+ ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+ ILI9805_INSTR(0, 0xe0, 0x00, 0x08, 0x0d, 0x0e, 0x0e, 0x0d, 0x0a, 0x08,
0x04,
+
[PATCH v3 01/10] drm/bridge: Fix bridge disable logic
As explained by the comment of the fixed code, we need to find the next
bridge that hasn't set the "pre_enable_prev_first" flag to true. The code,
on the contrary, was doing the opposite.
So, the order of disabling the bridges couldn't be altered as required
by setting the "pre_enable_prev_first" flag to true.
Fixes: 4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
bridge init order")
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/drm_bridge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index 30d66bee0ec6..f66bf4925dd8 100644
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -686,7 +686,7 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge
*bridge,
*/
list_for_each_entry_from(next,
&encoder->bridge_chain,
chain_node) {
- if (next->pre_enable_prev_first) {
+ if (!next->pre_enable_prev_first) {
next = list_prev_entry(next,
chain_node);
limit = next;
break;
--
2.43.0
[PATCH v3 00/10] Add displays support for bsh-smm-s2/pro boards
The series adds drivers for the displays used by bsh-smm-s2/pro boards. This required applying some patches to the samsung-dsim driver and the drm_bridge.c module. Changes in v3: - Add 'Reviewed-by' tag of Krzysztof Kozlowski. - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Drop power-supply - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller. Changes in v2: - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties - Adjust the timings of the panel reset - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Dario Binacchi (4): drm/bridge: Fix bridge disable logic drm/bridge: Fix a use case in the bridge disable logic drm: bridge: samsung-dsim: enter display mode in the enable() callback drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Michael Trimarchi (6): dt-bindings: display: panel: Add synaptics r63353 panel controller drm/panel: Add Synaptics R63353 panel driver dt-bindings: display: panel: Add Ilitek ili9805 panel controller drm/panel: Add Ilitek ILI9805 panel driver drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup .../display/panel/ilitek,ili9805.yaml | 62 +++ .../display/panel/synaptics,r63353.yaml | 61 +++ MAINTAINERS | 12 + .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 + .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 121 + drivers/gpu/drm/bridge/samsung-dsim.c | 14 +- drivers/gpu/drm/drm_bridge.c | 9 +- drivers/gpu/drm/panel/Kconfig | 18 + drivers/gpu/drm/panel/Makefile| 2 + drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 418 ++ .../gpu/drm/panel/panel-synaptics-r63353.c| 375 11 files changed, 1086 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml create mode 100644 Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9805.c create mode 100644 drivers/gpu/drm/panel/panel-synaptics-r63353.c -- 2.43.0
[PATCH v2 10/11] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel
From: Michael Trimarchi
Tianma TM041XDHG01 utilizes the Ilitek ILI9805 controller.
Add this panel's initialzation sequence and timing to ILI9805 driver.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 53
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
index 749959e10d92..cd187b0b1998 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -89,6 +89,36 @@ static const struct ili9805_instr gpm1780a0_init[] = {
ILI9805_INSTR(0, 0xB9, 0x02, 0x00),
};
+static const struct ili9805_instr tm041xdhg01_init[] = {
+ ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG,
ILI9805_SETEXTC_PARAMETER1,
+ ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+ ILI9805_INSTR(100, 0xFD, 0x0F, 0x13, 0x44, 0x00),
+ ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x01,
+ 0x01, 0x30, 0x01, 0x01, 0x30, 0x01, 0x01),
+ ILI9805_INSTR(0, 0xB8, 0x74),
+ ILI9805_INSTR(0, 0xF1, 0x00),
+ ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+ ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+ ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+ ILI9805_INSTR(0, 0xe0, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(0, 0xe1, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08,
0x04,
+ 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08),
+ ILI9805_INSTR(10, 0xc1, 0x15, 0x03, 0x03, 0x31),
+ ILI9805_INSTR(10, 0xB1, 0x00, 0x12, 0x14),
+ ILI9805_INSTR(10, 0xB4, 0x02),
+ ILI9805_INSTR(0, 0xBB, 0x14, 0x55),
+ ILI9805_INSTR(0, MIPI_DCS_SET_ADDRESS_MODE, 0x0a),
+ ILI9805_INSTR(0, MIPI_DCS_SET_PIXEL_FORMAT, 0x77),
+ ILI9805_INSTR(0, 0x20),
+ ILI9805_INSTR(0, 0xB0, 0x00),
+ ILI9805_INSTR(0, 0xB6, 0x01),
+ ILI9805_INSTR(0, 0xc2, 0x11),
+ ILI9805_INSTR(0, 0x51, 0xFF),
+ ILI9805_INSTR(0, 0x53, 0x24),
+ ILI9805_INSTR(0, 0x55, 0x00),
+};
+
static inline struct ili9805 *panel_to_ili9805(struct drm_panel *panel)
{
return container_of(panel, struct ili9805, panel);
@@ -239,6 +269,20 @@ static const struct drm_display_mode gpm1780a0_timing = {
.vtotal = 480 + 2 + 4 + 10,
};
+static const struct drm_display_mode tm041xdhg01_timing = {
+ .clock = 26227,
+
+ .hdisplay = 480,
+ .hsync_start = 480 + 10,
+ .hsync_end = 480 + 10 + 2,
+ .htotal = 480 + 10 + 2 + 36,
+
+ .vdisplay = 768,
+ .vsync_start = 768 + 2,
+ .vsync_end = 768 + 10 + 4,
+ .vtotal = 768 + 2 + 4 + 10,
+};
+
static int ili9805_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -343,8 +387,17 @@ static const struct ili9805_desc gpm1780a0_desc = {
.height_mm = 65,
};
+static const struct ili9805_desc tm041xdhg01_desc = {
+ .init = tm041xdhg01_init,
+ .init_length = ARRAY_SIZE(tm041xdhg01_init),
+ .mode = &tm041xdhg01_timing,
+ .width_mm = 42,
+ .height_mm = 96,
+};
+
static const struct of_device_id ili9805_of_match[] = {
{ .compatible = "giantplus,gpm1790a0", .data = &gpm1780a0_desc },
+ { .compatible = "tianma,tm041xdhg01", .data = &tm041xdhg01_desc },
{ }
};
MODULE_DEVICE_TABLE(of, ili9805_of_match);
--
2.42.0
[PATCH v2 09/11] dt-bindings: ili9805: add compatible string for Tianma TM041XDHG01
From: Michael Trimarchi Add Tianma TM041XDHG01 that utilizes an Ilitek ILI9805 controller chip, so its compatible string should be added to ilitek,ili9805 file. Add the compatible string for it. Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- (no changes since v1) .../devicetree/bindings/display/panel/ilitek,ili9805.yaml| 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml index e08af5f0b2e9..1b5bf42df7d6 100644 --- a/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml +++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml @@ -17,6 +17,7 @@ properties: items: - enum: - giantplus,gpm1790a0 + - tianma,tm041xdhg01 - const: ilitek,ili9805 avdd-supply: true -- 2.42.0
[PATCH v2 03/11] drm: bridge: samsung-dsim: enter display mode in the enable() callback
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the pre_enabled() and enabled() of the
bridge. So, the bridge can enter display mode only in the enabled().
The unprepare() of the panel-bridge is instead called between the disable()
and post_disable() of the bridge. So, the disable() must exit the display
mode (i .e. enter command mode) to allow the panel-bridge to receive DSI
commands.
samsung_dsim_atomic_pre_enable -> command mode
r63353_panel_prepare -> send DSI commands
samsung_dsim_atomic_enable -> enter display mode
samsung_dsim_atomic_disable -> exit display mode (command mode)
r63353_panel_unprepare -> send DSI commands
samsung_dsim_atomic_post_disable
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index be5914caa17d..15bf05b2bbe4 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct
drm_bridge *bridge,
return;
samsung_dsim_set_display_mode(dsi);
- samsung_dsim_set_display_enable(dsi, true);
}
}
@@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bridge
*bridge,
samsung_dsim_set_display_mode(dsi);
samsung_dsim_set_display_enable(dsi, true);
} else {
+ samsung_dsim_set_display_enable(dsi, true);
samsung_dsim_set_stop_state(dsi, false);
}
@@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_bridge
*bridge,
if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
samsung_dsim_set_stop_state(dsi, true);
+ samsung_dsim_set_display_enable(dsi, false);
+
dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
}
@@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
{
struct samsung_dsim *dsi = bridge_to_dsi(bridge);
- samsung_dsim_set_display_enable(dsi, false);
+ if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+ samsung_dsim_set_stop_state(dsi, true);
dsi->state &= ~DSIM_STATE_ENABLED;
pm_runtime_put_sync(dsi->dev);
--
2.42.0
[PATCH v2 07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel controller
From: Michael Trimarchi
Add documentation for "ilitek,ili9805" panel.
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
Changes in v2:
- Add $ref to panel-common.yaml
- Drop port, reset-gpios, and backlight
- Set port and backlight ad required
- Replace additionalProperties with unevaluatedProperties
.../display/panel/ilitek,ili9805.yaml | 63 +++
1 file changed, 63 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
new file mode 100644
index ..e08af5f0b2e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9805.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9805.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek ILI9805 based MIPI-DSI panels
+
+maintainers:
+ - Michael Trimarchi
+
+allOf:
+ - $ref: panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - giantplus,gpm1790a0
+ - const: ilitek,ili9805
+
+ avdd-supply: true
+ dvdd-supply: true
+ power-supply: true
+ reg: true
+
+required:
+ - compatible
+ - avdd-supply
+ - dvdd-supply
+ - reg
+ - reset-gpios
+ - port
+ - backlight
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+panel@0 {
+compatible = "giantplus,gpm1790a0", "ilitek,ili9805";
+reg = <0>;
+power-supply = <®_display>;
+avdd-supply = <&avdd_display>;
+dvdd-supply = <&dvdd_display>;
+reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
+backlight = <&backlight>;
+
+port {
+panel_in: endpoint {
+remote-endpoint = <&mipi_dsi_out>;
+};
+};
+};
+};
+
+...
--
2.42.0
