[PATCH 1/2] drm/mgag200: Added the hwcursor parameter to turn hardware cursor on/off.
The hwcursor parameter is a boolean variable. When set to true, the
hardware cursor is enabled. When set to false, it is disabled.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_cursor.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/mgag200/mgag200_cursor.c
b/drivers/gpu/drm/mgag200/mgag200_cursor.c
index 9f9780b..c9a94a6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_cursor.c
+++ b/drivers/gpu/drm/mgag200/mgag200_cursor.c
@@ -10,9 +10,17 @@
#include
#include "mgag200_drv.h"
+#include
+
+static bool hwcursor = true;
static bool warn_transparent = true;
static bool warn_palette = true;
+static bool warn_user_input = true;
+
+module_param(hwcursor, bool, 0644);
+MODULE_PARM_DESC(hwcursor, "When true, the hardware cursor is enabled. When
false, it is disabled.");
+
/*
Hide the cursor off screen. We can't disable the cursor hardware because it
@@ -90,6 +98,16 @@ int mga_crtc_cursor_set(struct drm_crtc *crtc,
goto out1;
}
+ if (!hwcursor) {
+ if (warn_user_input) {
+ dev_info(>pdev->dev, "User disabled hardware
cursor.\n");
+ warn_user_input = false;
+ }
+ mga_hide_cursor(mdev);
+ ret = -EINVAL;
+ goto out1;
+ }
+
/* Move cursor buffers into VRAM if they aren't already */
if (!pixels_1->pin_count) {
ret = mgag200_bo_pin(pixels_1, TTM_PL_FLAG_VRAM,
--
1.7.10.4
[PATCH 0/2] drm/mgag200: hardware cursor bug fixes & new parameter
Here are a few bug fixes and a new control parameter for the mgag200 hardware cursor. Julia Lemire (2): drm/mgag200: Added the hwcursor parameter to turn hardware cursor on/off. drm/mgag200: Fix hardware cursor colour inversion and inaccurate register index. drivers/gpu/drm/mgag200/mgag200_cursor.c | 36 +- 1 file changed, 31 insertions(+), 5 deletions(-) -- 1.7.10.4
[PATCH v2 2/2] drm/mgag200: Fix hardware cursor colour inversion and inaccurate register index.
The hardware cursor colous are stored in the DAC indexed registers.
The algorithm for setting these colours via their corresponding index
was off by a value of 0x03.
It was also noted that the R and B bytes were being misread from the
cursor bugger. Assuming the transparency is the MSB or bits 31-24,
then R should be bits 23-16, G should be bits 15-8 and B should be
the LSB or bits 7-0.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_cursor.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_cursor.c
b/drivers/gpu/drm/mgag200/mgag200_cursor.c
index c9a94a6..0fd4ba0 100644
--- a/drivers/gpu/drm/mgag200/mgag200_cursor.c
+++ b/drivers/gpu/drm/mgag200/mgag200_cursor.c
@@ -55,12 +55,12 @@ int mga_crtc_cursor_set(struct drm_crtc *crtc,
uint32_t colour_set[16];
uint32_t *next_space = _set[0];
uint32_t *palette_iter;
- uint32_t this_colour;
+ uint32_t this_colour; /* 32-bit colour encoded pixel */
bool found = false;
int colour_count = 0;
u64 gpu_addr;
u8 reg_index;
- u8 this_row[48];
+ u8 this_row[48]; /* cursor bitmap row array */
if (!pixels_1 || !pixels_2) {
WREG8(MGA_CURPOSXL, 0);
@@ -191,14 +191,20 @@ int mga_crtc_cursor_set(struct drm_crtc *crtc,
}
/* Program colours from cursor icon into palette */
+ /* Colour is receieved as RGB, where is R are the MSB and B are the
LSB. */
+ /* The first three colours are located between indexes 0x08-0x12. */
+ /* The remaining colours are located between indexes 0x60-0x86. */
for (i = 0; i < colour_count; i++) {
if (i <= 2)
reg_index = 0x8 + i*0x4;
else
- reg_index = 0x60 + i*0x3;
- WREG_DAC(reg_index, colour_set[i] & 0xff);
+ reg_index = 0x60 + (i-3)*0x3;
+ /* Write the Red bits. */
+ WREG_DAC(reg_index, colour_set[i]>>16 & 0xff);
+ /* Write the Green bits. */
WREG_DAC(reg_index+1, colour_set[i]>>8 & 0xff);
- WREG_DAC(reg_index+2, colour_set[i]>>16 & 0xff);
+ /* Write the Blue bits. */
+ WREG_DAC(reg_index+2, colour_set[i] & 0xff);
BUG_ON((colour_set[i]>>24 & 0xff) != 0xff);
}
--
1.7.10.4
[PATCH 1/1] drm/mgag200: Fix hardware cursor colour inversion and inaccurate register index.
The hardware cursor colours are stored in the DAC indexed registers.
The algorithm for setting these colours via their corresponding index
was off by a value of 0x03.
It was also noted that the R and B bytes were being misread from the
cursor buffer. Assuming the transparency is the MSB (bits 31-24),
then R should be bits 23-16, G should be bits 15-8 and B should be
the LSB or bits 7-0.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_cursor.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_cursor.c
b/drivers/gpu/drm/mgag200/mgag200_cursor.c
index 801731a..24463b8 100644
--- a/drivers/gpu/drm/mgag200/mgag200_cursor.c
+++ b/drivers/gpu/drm/mgag200/mgag200_cursor.c
@@ -32,7 +32,7 @@ int mga_crtc_cursor_set(struct drm_crtc *crtc,
uint32_t width,
uint32_t height)
{
- struct drm_device *dev = (struct drm_device *)file_priv->minor->dev;
+ struct drm_device *dev = crtc->dev;
struct mga_device *mdev = (struct mga_device *)dev->dev_private;
struct mgag200_bo *pixels_1 = mdev->cursor.pixels_1;
struct mgag200_bo *pixels_2 = mdev->cursor.pixels_2;
@@ -45,12 +45,12 @@ int mga_crtc_cursor_set(struct drm_crtc *crtc,
uint32_t colour_set[16];
uint32_t *next_space = _set[0];
uint32_t *palette_iter;
- uint32_t this_colour;
+ uint32_t this_colour; /* 32-bit colour encoded pixel */
bool found = false;
int colour_count = 0;
u64 gpu_addr;
u8 reg_index;
- u8 this_row[48];
+ u8 this_row[48]; /* cursor bitmap row array */
if (!pixels_1 || !pixels_2) {
WREG8(MGA_CURPOSXL, 0);
@@ -171,14 +171,20 @@ int mga_crtc_cursor_set(struct drm_crtc *crtc,
}
/* Program colours from cursor icon into palette */
+ /* Colour is received as RGB, where R are the MSB and B are the LSB. */
+ /* The first three colours are located between indexes 0x08-0x12. */
+ /* The remaining colours are located between indexes 0x60-0x86. */
for (i = 0; i < colour_count; i++) {
if (i <= 2)
reg_index = 0x8 + i*0x4;
else
- reg_index = 0x60 + i*0x3;
- WREG_DAC(reg_index, colour_set[i] & 0xff);
+ reg_index = 0x60 + (i-3)*0x3;
+ /* Write the Red bits. */
+ WREG_DAC(reg_index, colour_set[i]>>16 & 0xff);
+ /* Write the Green bits. */
WREG_DAC(reg_index+1, colour_set[i]>>8 & 0xff);
- WREG_DAC(reg_index+2, colour_set[i]>>16 & 0xff);
+ /* Write the Blue bits. */
+ WREG_DAC(reg_index+2, colour_set[i] & 0xff);
BUG_ON((colour_set[i]>>24 & 0xff) != 0xff);
}
--
1.7.10.4
[PATCH v3 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
I fixed all of the formatting errors found by scripts/checkpatch.pl. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h |3 +- drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 70 ++-- 3 files changed, 70 insertions(+), 5 deletions(-) -- 1.7.10.4
[PATCH v3 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with
maintaining a proper output. Problems like flickering or black bands appearing
on screen can occur. In order to avoid this, limitations regarding resolutions
and bandwidth have been added for the different variations of the g200e series.
This code was ported from the old xorg mga driver.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_drv.h |3 +-
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 70 ++--
3 files changed, 70 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..988911a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -198,7 +198,8 @@ struct mga_device {
struct ttm_bo_device bdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev->reg_1e24 = RREG32(0x1e24);
+ mdev->unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..99e07b6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev->reg_1e24 >= 0x02) {
+ if (mdev->unique_rev_id >= 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev->reg_1e24 >= 0x01)
+ if (mdev->unique_rev_id >= 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,32 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *mode,
+ int bits_per_pixel)
+{
+ uint32_t total_area, divisor;
+ int64_t active_area, pixels_per_second, bandwidth;
+ uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8;
+
+ divisor = 1024;
+
+ if (!mode->htotal || !mode->vtotal || !mode->clock)
+ return 0;
+
+ active_area = mode->hdisplay * mode->vdisplay;
+ total_area = mode->htotal * mode->vtotal;
+
+ pixels_per_second = active_area * mode->clock * 1000;
+ do_div(pixels_per_second, total_area);
+
+ bandwidth = pixels_per_second * bytes_per_pixel * 100;
+ do_div(bandwidth, divisor);
+
+ return (uint32_t)(bandwidth);
+}
+
+#define MODE_BANDWIDTH MODE_BAD
+
static int mga_vga_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
@@ -1421,7 +1447,45 @@ static int mga_vga_mode_valid(struct drm_connector
*connector,
int bpp = 32;
int i = 0;
- /* FIXME: Add bandwidth and g200se limitations */
+ if (IS_G200_SE(mdev)) {
+ if (mdev->unique_rev_id == 0x01) {
+ if (mode->hdisplay > 1600)
+ return MODE_VIRTUAL_X;
+ if (mode->vdisplay > 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
+ > (24400 * 1024))
+ return MODE_BANDWIDTH;
+ } else if (mdev->unique_rev_id >= 0x02) {
+ if (mode->hdisplay > 1920)
+ return MODE_VIRTUAL_X;
+ if (mode->vdisplay > 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
+ > (30100 * 1024))
+ return MODE_BANDWIDTH;
+ }
+ } else if (mdev->type == G200_WB) {
+ if (mode->hdispl
[PATCH v3 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
I fixed all of the formatting errors found by scripts/checkpatch.pl. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h |3 +- drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 70 ++-- 3 files changed, 70 insertions(+), 5 deletions(-) -- 1.7.10.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with
maintaining a proper output. Problems like flickering or black bands appearing
on screen can occur. In order to avoid this, limitations regarding resolutions
and bandwidth have been added for the different variations of the g200e series.
This code was ported from the old xorg mga driver.
Signed-off-by: Julia Lemire jlem...@matrox.com
---
drivers/gpu/drm/mgag200/mgag200_drv.h |3 +-
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 70 ++--
3 files changed, 70 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..988911a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -198,7 +198,8 @@ struct mga_device {
struct ttm_bo_device bdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev-reg_1e24 = RREG32(0x1e24);
+ mdev-unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..99e07b6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev-reg_1e24 = 0x02) {
+ if (mdev-unique_rev_id = 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev-reg_1e24 = 0x01)
+ if (mdev-unique_rev_id = 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,32 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *mode,
+ int bits_per_pixel)
+{
+ uint32_t total_area, divisor;
+ int64_t active_area, pixels_per_second, bandwidth;
+ uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8;
+
+ divisor = 1024;
+
+ if (!mode-htotal || !mode-vtotal || !mode-clock)
+ return 0;
+
+ active_area = mode-hdisplay * mode-vdisplay;
+ total_area = mode-htotal * mode-vtotal;
+
+ pixels_per_second = active_area * mode-clock * 1000;
+ do_div(pixels_per_second, total_area);
+
+ bandwidth = pixels_per_second * bytes_per_pixel * 100;
+ do_div(bandwidth, divisor);
+
+ return (uint32_t)(bandwidth);
+}
+
+#define MODE_BANDWIDTH MODE_BAD
+
static int mga_vga_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
@@ -1421,7 +1447,45 @@ static int mga_vga_mode_valid(struct drm_connector
*connector,
int bpp = 32;
int i = 0;
- /* FIXME: Add bandwidth and g200se limitations */
+ if (IS_G200_SE(mdev)) {
+ if (mdev-unique_rev_id == 0x01) {
+ if (mode-hdisplay 1600)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
+(24400 * 1024))
+ return MODE_BANDWIDTH;
+ } else if (mdev-unique_rev_id = 0x02) {
+ if (mode-hdisplay 1920)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
+(30100 * 1024))
+ return MODE_BANDWIDTH;
+ }
+ } else if (mdev-type == G200_WB) {
+ if (mode-hdisplay 1280)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1024
[PATCH v2 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
I am resubmitting this patch because I ran into a build error when trying to build it on a 32-bit system. I had to fix how the 64-bit division was done in mga_vga_calculate_mode_bandwidth. I used the do_div macro instead of doing the straight division. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h |3 +- drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 64 ++-- 3 files changed, 64 insertions(+), 5 deletions(-) -- 1.7.10.4
[PATCH v2 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with
maintaining a proper output. Problems like flickering or black bands appearing
on screen can occur. In order to avoid this, limitations regarding resolutions
and bandwidth have been added for the different variations of the g200e series.
This code was ported from the old xorg mga driver.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_drv.h |3 +-
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 64 ++--
3 files changed, 64 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..988911a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -198,7 +198,8 @@ struct mga_device {
struct ttm_bo_device bdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev->reg_1e24 = RREG32(0x1e24);
+ mdev->unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..098bc3b 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev->reg_1e24 >= 0x02) {
+ if (mdev->unique_rev_id >= 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev->reg_1e24 >= 0x01)
+ if (mdev->unique_rev_id >= 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,32 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *
mode,
+ int bits_per_pixel)
+{
+ uint32_t total_area, divisor;
+ uint64_t active_area, pixels_per_second, bandwidth;
+ uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8;
+
+ divisor = 1024;
+
+ if(!mode->htotal || !mode->vtotal || !mode->clock)
+ return 0;
+
+ active_area = mode->hdisplay * mode->vdisplay;
+ total_area = mode->htotal * mode->vtotal;
+
+ pixels_per_second = active_area * mode->clock * 1000;
+ do_div(pixels_per_second, total_area);
+
+ bandwidth = pixels_per_second * bytes_per_pixel * 100;
+ do_div(bandwidth, divisor);
+
+ return (uint32_t)(bandwidth);
+}
+
+#define MODE_BANDWIDTH MODE_BAD
+
static int mga_vga_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
@@ -1421,7 +1447,39 @@ static int mga_vga_mode_valid(struct drm_connector
*connector,
int bpp = 32;
int i = 0;
- /* FIXME: Add bandwidth and g200se limitations */
+ if (IS_G200_SE(mdev)) {
+ if (mdev->unique_rev_id == 0x01) {
+ if (mode->hdisplay > 1600)
+ return MODE_VIRTUAL_X;
+ if (mode->vdisplay > 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp) >
(24400 * 1024))
+ return MODE_BANDWIDTH;
+ } else if (mdev->unique_rev_id >= 0x02) {
+ if (mode->hdisplay > 1920)
+ return MODE_VIRTUAL_X;
+ if (mode->vdisplay > 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp) >
(30100 * 1024))
+ return MODE_BANDWIDTH;
+ }
+ } else if (mdev->type == G200_WB) {
+ if (mode->hdisplay > 1280)
+ return MO
[PATCH v2 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
I am resubmitting this patch because I ran into a build error when trying to build it on a 32-bit system. I had to fix how the 64-bit division was done in mga_vga_calculate_mode_bandwidth. I used the do_div macro instead of doing the straight division. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h |3 +- drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 64 ++-- 3 files changed, 64 insertions(+), 5 deletions(-) -- 1.7.10.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with
maintaining a proper output. Problems like flickering or black bands appearing
on screen can occur. In order to avoid this, limitations regarding resolutions
and bandwidth have been added for the different variations of the g200e series.
This code was ported from the old xorg mga driver.
Signed-off-by: Julia Lemire jlem...@matrox.com
---
drivers/gpu/drm/mgag200/mgag200_drv.h |3 +-
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 64 ++--
3 files changed, 64 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..988911a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -198,7 +198,8 @@ struct mga_device {
struct ttm_bo_device bdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev-reg_1e24 = RREG32(0x1e24);
+ mdev-unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..098bc3b 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev-reg_1e24 = 0x02) {
+ if (mdev-unique_rev_id = 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev-reg_1e24 = 0x01)
+ if (mdev-unique_rev_id = 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,32 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *
mode,
+ int bits_per_pixel)
+{
+ uint32_t total_area, divisor;
+ uint64_t active_area, pixels_per_second, bandwidth;
+ uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8;
+
+ divisor = 1024;
+
+ if(!mode-htotal || !mode-vtotal || !mode-clock)
+ return 0;
+
+ active_area = mode-hdisplay * mode-vdisplay;
+ total_area = mode-htotal * mode-vtotal;
+
+ pixels_per_second = active_area * mode-clock * 1000;
+ do_div(pixels_per_second, total_area);
+
+ bandwidth = pixels_per_second * bytes_per_pixel * 100;
+ do_div(bandwidth, divisor);
+
+ return (uint32_t)(bandwidth);
+}
+
+#define MODE_BANDWIDTH MODE_BAD
+
static int mga_vga_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
@@ -1421,7 +1447,39 @@ static int mga_vga_mode_valid(struct drm_connector
*connector,
int bpp = 32;
int i = 0;
- /* FIXME: Add bandwidth and g200se limitations */
+ if (IS_G200_SE(mdev)) {
+ if (mdev-unique_rev_id == 0x01) {
+ if (mode-hdisplay 1600)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
(24400 * 1024))
+ return MODE_BANDWIDTH;
+ } else if (mdev-unique_rev_id = 0x02) {
+ if (mode-hdisplay 1920)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
(30100 * 1024))
+ return MODE_BANDWIDTH;
+ }
+ } else if (mdev-type == G200_WB) {
+ if (mode-hdisplay 1280)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1024)
+ return MODE_VIRTUAL_Y
[PATCH 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with maintaining a proper output. Problems like flickering or black bands appearing on screen can occur. In order to avoid this, limitations regarding resolutions and bandwidth have been added for the different variations of the g200e series. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h |3 +- drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++-- 3 files changed, 56 insertions(+), 4 deletions(-) -- 1.7.10.4
[PATCH 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
This code was ported from the old xorg mga driver. These limits were
implemented as a solution to a number of problems that were seen. These
problems were linked to the bandwidth limitations of the g200e series.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_drv.h |3 +-
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++--
3 files changed, 56 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..988911a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -198,7 +198,8 @@ struct mga_device {
struct ttm_bo_device bdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev->reg_1e24 = RREG32(0x1e24);
+ mdev->unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..3cdebe6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev->reg_1e24 >= 0x02) {
+ if (mdev->unique_rev_id >= 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev->reg_1e24 >= 0x01)
+ if (mdev->unique_rev_id >= 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,24 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *
mode,
+ int bits_per_pixel)
+{
+ uint64_t active_area, total_area, pixels_per_second;
+ uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8;
+
+ if(!mode->htotal || !mode->vtotal || !mode->clock)
+ return 0;
+
+ active_area = mode->hdisplay * mode->vdisplay;
+ total_area = mode->htotal * mode->vtotal;
+ pixels_per_second = active_area * mode->clock * 1000 / total_area;
+
+ return (uint32_t)(pixels_per_second * bytes_per_pixel * 100 / (1024));
+}
+
+#define MODE_BANDWIDTH MODE_BAD
+
static int mga_vga_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
@@ -1422,6 +1440,39 @@ static int mga_vga_mode_valid(struct drm_connector
*connector,
int i = 0;
/* FIXME: Add bandwidth and g200se limitations */
+ if (IS_G200_SE(mdev)) {
+ if (mdev->unique_rev_id == 0x01) {
+ if (mode->hdisplay > 1600)
+ return MODE_VIRTUAL_X;
+ if (mode->vdisplay > 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp) >
(24400 * 1024))
+ return MODE_BANDWIDTH;
+ } else if (mdev->unique_rev_id >= 0x02) {
+ if (mode->hdisplay > 1920)
+ return MODE_VIRTUAL_X;
+ if (mode->vdisplay > 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp) >
(30100 * 1024))
+ return MODE_BANDWIDTH;
+ }
+ } else if (mdev->type == G200_WB) {
+ if (mode->hdisplay > 1280)
+ return MODE_VIRTUAL_X;
+ if (mode->vdisplay > 1024)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp > (31877 *
1024)))
+ return MODE_BANDWIDTH;
+ } else if (mdev->type == G200_EV &&
+ (mga_vga_calculate_mode_
[PATCH 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with maintaining a proper output. Problems like flickering or black bands appearing on screen can occur. In order to avoid this, limitations regarding resolutions and bandwidth have been added for the different variations of the g200e series. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h |3 +- drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++-- 3 files changed, 56 insertions(+), 4 deletions(-) -- 1.7.10.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
This code was ported from the old xorg mga driver. These limits were
implemented as a solution to a number of problems that were seen. These
problems were linked to the bandwidth limitations of the g200e series.
Signed-off-by: Julia Lemire jlem...@matrox.com
---
drivers/gpu/drm/mgag200/mgag200_drv.h |3 +-
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++--
3 files changed, 56 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..988911a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -198,7 +198,8 @@ struct mga_device {
struct ttm_bo_device bdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev-reg_1e24 = RREG32(0x1e24);
+ mdev-unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..3cdebe6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev-reg_1e24 = 0x02) {
+ if (mdev-unique_rev_id = 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev-reg_1e24 = 0x01)
+ if (mdev-unique_rev_id = 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,24 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *
mode,
+ int bits_per_pixel)
+{
+ uint64_t active_area, total_area, pixels_per_second;
+ uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8;
+
+ if(!mode-htotal || !mode-vtotal || !mode-clock)
+ return 0;
+
+ active_area = mode-hdisplay * mode-vdisplay;
+ total_area = mode-htotal * mode-vtotal;
+ pixels_per_second = active_area * mode-clock * 1000 / total_area;
+
+ return (uint32_t)(pixels_per_second * bytes_per_pixel * 100 / (1024));
+}
+
+#define MODE_BANDWIDTH MODE_BAD
+
static int mga_vga_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
{
@@ -1422,6 +1440,39 @@ static int mga_vga_mode_valid(struct drm_connector
*connector,
int i = 0;
/* FIXME: Add bandwidth and g200se limitations */
+ if (IS_G200_SE(mdev)) {
+ if (mdev-unique_rev_id == 0x01) {
+ if (mode-hdisplay 1600)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
(24400 * 1024))
+ return MODE_BANDWIDTH;
+ } else if (mdev-unique_rev_id = 0x02) {
+ if (mode-hdisplay 1920)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1200)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp)
(30100 * 1024))
+ return MODE_BANDWIDTH;
+ }
+ } else if (mdev-type == G200_WB) {
+ if (mode-hdisplay 1280)
+ return MODE_VIRTUAL_X;
+ if (mode-vdisplay 1024)
+ return MODE_VIRTUAL_Y;
+ if (mga_vga_calculate_mode_bandwidth(mode, bpp (31877 *
1024)))
+ return MODE_BANDWIDTH;
+ } else if (mdev-type == G200_EV
+ (mga_vga_calculate_mode_bandwidth(mode, bpp) (32700 * 1024)))
{
+ return MODE_BANDWIDTH;
+ } else if (mode-type == G200_EH
[PATCH 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
This code was ported from the old xorg mga driver. These limits were
implemented as a solution to a number of problems that were seen. These
problems were linked to the bandwidth limitations of the g200e series.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_drv.h | 41
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++--
3 files changed, 75 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..710aa29 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -168,37 +168,38 @@ enum mga_type {
#define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
struct mga_device {
- struct drm_device *dev;
- unsigned long flags;
+ struct drm_device *dev;
+ unsigned long flags;
- resource_size_t rmmio_base;
- resource_size_t rmmio_size;
- void __iomem*rmmio;
+ resource_size_t rmmio_base;
+ resource_size_t rmmio_size;
+ void __iomem*rmmio;
- drm_local_map_t *framebuffer;
+ drm_local_map_t *framebuffer;
- struct mga_mc mc;
- struct mga_mode_infomode_info;
+ struct mga_mc mc;
+ struct mga_mode_infomode_info;
- struct mga_fbdev *mfbdev;
+ struct mga_fbdev*mfbdev;
- boolsuspended;
- int num_crtc;
- enum mga_type type;
- int has_sdram;
- struct drm_display_mode mode;
+ boolsuspended;
+ int num_crtc;
+ enum mga_type type;
+ int has_sdram;
+ struct drm_display_mode mode;
- int bpp_shifts[4];
+ int bpp_shifts[4];
- int fb_mtrr;
+ int fb_mtrr;
struct {
- struct drm_global_reference mem_global_ref;
- struct ttm_bo_global_ref bo_global_ref;
- struct ttm_bo_device bdev;
+ struct drm_global_reference mem_global_ref;
+ struct ttm_bo_global_refbo_global_ref;
+ struct ttm_bo_devicebdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev->reg_1e24 = RREG32(0x1e24);
+ mdev->unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..3cdebe6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev->reg_1e24 >= 0x02) {
+ if (mdev->unique_rev_id >= 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev->reg_1e24 >= 0x01)
+ if (mdev->unique_rev_id >= 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,24 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *
mode,
+ int bits_per_pixel)
+{
+ uint64_t active_area, total_area, pixels_per_second;
+ uint64_t bytes_per_pixel = (bits_pe
[PATCH 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with maintaining a proper output. Problems like flickering or black bands appearing on screen can occur. In order to avoid this, limitations regarding resolutions and bandwidth have been added for the different variations of the g200e series. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h | 41 drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++-- 3 files changed, 75 insertions(+), 23 deletions(-) -- 1.7.10.4
[PATCH 1/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
This code was ported from the old xorg mga driver. These limits were
implemented as a solution to a number of problems that were seen. These
problems were linked to the bandwidth limitations of the g200e series.
Signed-off-by: Julia Lemire jlem...@matrox.com
---
drivers/gpu/drm/mgag200/mgag200_drv.h | 41
drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++--
3 files changed, 75 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index bf29b2f..710aa29 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -168,37 +168,38 @@ enum mga_type {
#define IS_G200_SE(mdev) (mdev-type == G200_SE_A || mdev-type == G200_SE_B)
struct mga_device {
- struct drm_device *dev;
- unsigned long flags;
+ struct drm_device *dev;
+ unsigned long flags;
- resource_size_t rmmio_base;
- resource_size_t rmmio_size;
- void __iomem*rmmio;
+ resource_size_t rmmio_base;
+ resource_size_t rmmio_size;
+ void __iomem*rmmio;
- drm_local_map_t *framebuffer;
+ drm_local_map_t *framebuffer;
- struct mga_mc mc;
- struct mga_mode_infomode_info;
+ struct mga_mc mc;
+ struct mga_mode_infomode_info;
- struct mga_fbdev *mfbdev;
+ struct mga_fbdev*mfbdev;
- boolsuspended;
- int num_crtc;
- enum mga_type type;
- int has_sdram;
- struct drm_display_mode mode;
+ boolsuspended;
+ int num_crtc;
+ enum mga_type type;
+ int has_sdram;
+ struct drm_display_mode mode;
- int bpp_shifts[4];
+ int bpp_shifts[4];
- int fb_mtrr;
+ int fb_mtrr;
struct {
- struct drm_global_reference mem_global_ref;
- struct ttm_bo_global_ref bo_global_ref;
- struct ttm_bo_device bdev;
+ struct drm_global_reference mem_global_ref;
+ struct ttm_bo_global_refbo_global_ref;
+ struct ttm_bo_devicebdev;
} ttm;
- u32 reg_1e24; /* SE model number */
+ /* SE model number stored in reg 0x1e24 */
+ u32 unique_rev_id;
};
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 9905923..dafe049 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -176,7 +176,7 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev))
- mdev-reg_1e24 = RREG32(0x1e24);
+ mdev-unique_rev_id = RREG32(0x1e24);
ret = mga_vram_init(mdev);
if (ret)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index ee66bad..3cdebe6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1008,7 +1008,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
if (IS_G200_SE(mdev)) {
- if (mdev-reg_1e24 = 0x02) {
+ if (mdev-unique_rev_id = 0x02) {
u8 hi_pri_lvl;
u32 bpp;
u32 mb;
@@ -1038,7 +1038,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl);
} else {
WREG8(MGAREG_CRTCEXT_INDEX, 0x06);
- if (mdev-reg_1e24 = 0x01)
+ if (mdev-unique_rev_id = 0x01)
WREG8(MGAREG_CRTCEXT_DATA, 0x03);
else
WREG8(MGAREG_CRTCEXT_DATA, 0x04);
@@ -1410,6 +1410,24 @@ static int mga_vga_get_modes(struct drm_connector
*connector)
return ret;
}
+static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *
mode,
+ int bits_per_pixel)
+{
+ uint64_t active_area, total_area, pixels_per_second;
+ uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8
[PATCH 0/1] drm/mgag200: Added resolution and bandwidth limits for various G200e products.
At the larger resolutions, the g200e series sometimes struggles with maintaining a proper output. Problems like flickering or black bands appearing on screen can occur. In order to avoid this, limitations regarding resolutions and bandwidth have been added for the different variations of the g200e series. Julia Lemire (1): drm/mgag200: Added resolution and bandwidth limits for various G200e products. drivers/gpu/drm/mgag200/mgag200_drv.h | 41 drivers/gpu/drm/mgag200/mgag200_main.c |2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 55 ++-- 3 files changed, 75 insertions(+), 23 deletions(-) -- 1.7.10.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 4/4] drm/mgag200: Bug fix: Modified pll algorithm for EH project
While testing the mgag200 kms driver on the HP ProLiant Gen8, a
bug was seen. Once the bootloader would load the selected kernel,
the screen would go black. At first it was assumed that the
mgag200 kms driver was hanging. But after setting up the grub
serial output, it was seen that the driver was being loaded
properly. After trying serval monitors, one finaly displayed
the message "Frequency Out of Range". By comparing the kms pll
algorithm with the previous mgag200 xorg driver pll algorithm,
discrepencies were found. Once the kms pll algorithm was
modified, the expected pll values were produced. This fix was
tested on several monitors of varying native resolutions.
Signed-off-by: Julia Lemire
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 6b5db83..7337013 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -382,19 +382,19 @@ static int mga_g200eh_set_plls(struct mga_device *mdev,
long clock)
m = n = p = 0;
vcomax = 80;
vcomin = 40;
- pllreffreq = ;
+ pllreffreq = 3;
delta = 0x;
permitteddelta = clock * 5 / 1000;
- for (testp = 16; testp > 0; testp--) {
+ for (testp = 16; testp > 0; testp >>= 1) {
if (clock * testp > vcomax)
continue;
if (clock * testp < vcomin)
continue;
for (testm = 1; testm < 33; testm++) {
- for (testn = 1; testn < 257; testn++) {
+ for (testn = 17; testn < 257; testn++) {
computed = (pllreffreq * testn) /
(testm * testp);
if (computed > clock)
@@ -404,11 +404,11 @@ static int mga_g200eh_set_plls(struct mga_device *mdev,
long clock)
if (tmpdelta < delta) {
delta = tmpdelta;
n = testn - 1;
- m = (testm - 1) | ((n >> 1) & 0x80);
+ m = (testm - 1);
p = testp - 1;
}
if ((clock * testp) >= 60)
- p |= 80;
+ p |= 0x80;
}
}
}
--
1.7.12.4
[PATCH 4/4] drm/mgag200: Bug fix: Modified pll algorithm for EH project
While testing the mgag200 kms driver on the HP ProLiant Gen8, a
bug was seen. Once the bootloader would load the selected kernel,
the screen would go black. At first it was assumed that the
mgag200 kms driver was hanging. But after setting up the grub
serial output, it was seen that the driver was being loaded
properly. After trying serval monitors, one finaly displayed
the message Frequency Out of Range. By comparing the kms pll
algorithm with the previous mgag200 xorg driver pll algorithm,
discrepencies were found. Once the kms pll algorithm was
modified, the expected pll values were produced. This fix was
tested on several monitors of varying native resolutions.
Signed-off-by: Julia Lemire jlem...@matrox.com
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 6b5db83..7337013 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -382,19 +382,19 @@ static int mga_g200eh_set_plls(struct mga_device *mdev,
long clock)
m = n = p = 0;
vcomax = 80;
vcomin = 40;
- pllreffreq = ;
+ pllreffreq = 3;
delta = 0x;
permitteddelta = clock * 5 / 1000;
- for (testp = 16; testp 0; testp--) {
+ for (testp = 16; testp 0; testp = 1) {
if (clock * testp vcomax)
continue;
if (clock * testp vcomin)
continue;
for (testm = 1; testm 33; testm++) {
- for (testn = 1; testn 257; testn++) {
+ for (testn = 17; testn 257; testn++) {
computed = (pllreffreq * testn) /
(testm * testp);
if (computed clock)
@@ -404,11 +404,11 @@ static int mga_g200eh_set_plls(struct mga_device *mdev,
long clock)
if (tmpdelta delta) {
delta = tmpdelta;
n = testn - 1;
- m = (testm - 1) | ((n 1) 0x80);
+ m = (testm - 1);
p = testp - 1;
}
if ((clock * testp) = 60)
- p |= 80;
+ p |= 0x80;
}
}
}
--
1.7.12.4
___
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dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 1/2] drm/mgag200: Bug fix: Renesas board now selects native resolution.
Renesas boards were consistently defaulting to the 1024x768 resolution, regardless of the native resolution of the monitor plugged in. It was determined that the EDID of the monitor was not being read. Since the DAC is a shared line, in order to read from or write to it we must take control of the DAC clock. This can be done by setting the proper register to one. This bug fix sets the register MGA1064_GEN_IO_CTL2 to one. The DAC control line can be used to determine whether or not a new monitor has been plugged in. But since the hotplug feature is not one we will support, it has been decided to simply leave the register set to one. Signed-off-by: Julia Lemire --- drivers/gpu/drm/mgag200/mgag200_i2c.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mgag200/mgag200_i2c.c b/drivers/gpu/drm/mgag200/mgag200_i2c.c index 5a88ec5..d3dcf54 100644 --- a/drivers/gpu/drm/mgag200/mgag200_i2c.c +++ b/drivers/gpu/drm/mgag200/mgag200_i2c.c @@ -92,6 +92,7 @@ struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev) int ret; int data, clock; + WREG_DAC(MGA1064_GEN_IO_CTL2, 1); WREG_DAC(MGA1064_GEN_IO_DATA, 0xff); WREG_DAC(MGA1064_GEN_IO_CTL, 0); -- 1.7.12.4
[PATCH 1/2] drm/mgag200: Bug fix: Renesas board now selects native resolution.
Renesas boards were consistently defaulting to the 1024x768 resolution, regardless of the native resolution of the monitor plugged in. It was determined that the EDID of the monitor was not being read. Since the DAC is a shared line, in order to read from or write to it we must take control of the DAC clock. This can be done by setting the proper register to one. This bug fix sets the register MGA1064_GEN_IO_CTL2 to one. The DAC control line can be used to determine whether or not a new monitor has been plugged in. But since the hotplug feature is not one we will support, it has been decided to simply leave the register set to one. Signed-off-by: Julia Lemire jlem...@matrox.com --- drivers/gpu/drm/mgag200/mgag200_i2c.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mgag200/mgag200_i2c.c b/drivers/gpu/drm/mgag200/mgag200_i2c.c index 5a88ec5..d3dcf54 100644 --- a/drivers/gpu/drm/mgag200/mgag200_i2c.c +++ b/drivers/gpu/drm/mgag200/mgag200_i2c.c @@ -92,6 +92,7 @@ struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev) int ret; int data, clock; + WREG_DAC(MGA1064_GEN_IO_CTL2, 1); WREG_DAC(MGA1064_GEN_IO_DATA, 0xff); WREG_DAC(MGA1064_GEN_IO_CTL, 0); -- 1.7.12.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
