Re: [PATCH v5 42/80] drm/tilcdc: Run DRM default client setup
September 24, 2024 at 10:12 AM, "Thomas Zimmermann" mailto:tzimmerm...@suse.de?to=%22Thomas%20Zimmermann%22%20%3Ctzimmermann%40suse.de%3E
> wrote:
>
> Call drm_client_setup_with_color_mode() to run the kernel's default
> client setup for DRM. Set fbdev_probe in struct drm_driver, so that
> the client setup can start the common fbdev client.
>
> v5:
> - select DRM_CLIENT_SELECTION
> v3:
> - add DRM_FBDEV_DMA_DRIVER_OPS macro
>
> Signed-off-by: Thomas Zimmermann
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
> Acked-by: Javier Martinez Canillas
> ---
Acked-by: Jyri Sarha
> drivers/gpu/drm/tilcdc/Kconfig | 1 +
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 5 -
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig
> index d3bd2d7a181e..24f9a245ba59 100644
> --- a/drivers/gpu/drm/tilcdc/Kconfig
> +++ b/drivers/gpu/drm/tilcdc/Kconfig
> @@ -2,6 +2,7 @@
> config DRM_TILCDC
> tristate "DRM Support for TI LCDC Display Controller"
> depends on DRM OF && ARM
> + select DRM_CLIENT_SELECTION
> select DRM_KMS_HELPER
> select DRM_GEM_DMA_HELPER
> select DRM_BRIDGE
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index cd5eefa06060..8c9f3705aa6c 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -14,6 +14,7 @@
> #include
>
> #include
> +#include
> #include
> #include
> #include
> @@ -374,7 +375,8 @@ static int tilcdc_init(const struct drm_driver *ddrv,
> struct device *dev)
> goto init_failed;
> priv->is_registered = true;
>
> - drm_fbdev_dma_setup(ddev, bpp);
> + drm_client_setup_with_color_mode(ddev, bpp);
> +
> return 0;
>
> init_failed:
> @@ -472,6 +474,7 @@ DEFINE_DRM_GEM_DMA_FOPS(fops);
> static const struct drm_driver tilcdc_driver = {
> .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
> DRM_GEM_DMA_DRIVER_OPS,
> + DRM_FBDEV_DMA_DRIVER_OPS,
> #ifdef CONFIG_DEBUG_FS
> .debugfs_init = tilcdc_debugfs_init,
> #endif
> --
> 2.46.0
>
Re: [PATCH] drm/tidss: Add MIT license along with GPL-2.0
September 12, 2024 at 8:11 PM, "Devarsh Thakkar" mailto:devar...@ti.com?to=%22Devarsh%20Thakkar%22%20%3Cdevarsht%40ti.com%3E > wrote: > > Modify license to include dual licensing as GPL-2.0-only OR MIT license for > tidss display driver. This allows other operating system ecosystems such as > Zephyr and also the commercial firmwares to refer and derive code from this > display driver in a more permissive manner. > > Signed-off-by: Devarsh Thakkar Acked-by: Jyri Sarha I guess tehnically my ack would not be needed as TI owns the code I've writen for tidss, but here it goes anyway. Best regards, Jyri > --- > drivers/gpu/drm/tidss/Makefile | 2 +- > drivers/gpu/drm/tidss/tidss_crtc.c | 2 +- > drivers/gpu/drm/tidss/tidss_crtc.h | 2 +- > drivers/gpu/drm/tidss/tidss_dispc.c | 2 +- > drivers/gpu/drm/tidss/tidss_dispc.h | 2 +- > drivers/gpu/drm/tidss/tidss_dispc_regs.h | 2 +- > drivers/gpu/drm/tidss/tidss_drv.c | 2 +- > drivers/gpu/drm/tidss/tidss_drv.h | 2 +- > drivers/gpu/drm/tidss/tidss_encoder.c | 2 +- > drivers/gpu/drm/tidss/tidss_encoder.h | 2 +- > drivers/gpu/drm/tidss/tidss_irq.c | 2 +- > drivers/gpu/drm/tidss/tidss_irq.h | 2 +- > drivers/gpu/drm/tidss/tidss_kms.c | 2 +- > drivers/gpu/drm/tidss/tidss_kms.h | 2 +- > drivers/gpu/drm/tidss/tidss_plane.c | 2 +- > drivers/gpu/drm/tidss/tidss_plane.h | 2 +- > drivers/gpu/drm/tidss/tidss_scale_coefs.c | 2 +- > drivers/gpu/drm/tidss/tidss_scale_coefs.h | 2 +- > 18 files changed, 18 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/tidss/Makefile b/drivers/gpu/drm/tidss/Makefile > index 312645271014..c67ff32d02e1 100644 > --- a/drivers/gpu/drm/tidss/Makefile > +++ b/drivers/gpu/drm/tidss/Makefile > @@ -1,4 +1,4 @@ > -# SPDX-License-Identifier: GPL-2.0 > +# SPDX-License-Identifier: GPL-2.0 OR MIT > > tidss-y := tidss_crtc.o \ > tidss_drv.o \ > diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c > b/drivers/gpu/drm/tidss/tidss_crtc.c > index 94f8e3178df5..43dfbead9fa9 100644 > --- a/drivers/gpu/drm/tidss/tidss_crtc.c > +++ b/drivers/gpu/drm/tidss/tidss_crtc.c > @@ -1,4 +1,4 @@ > -// SPDX-License-Identifier: GPL-2.0 > +// SPDX-License-Identifier: GPL-2.0 OR MIT > /* > * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Tomi Valkeinen > diff --git a/drivers/gpu/drm/tidss/tidss_crtc.h > b/drivers/gpu/drm/tidss/tidss_crtc.h > index 040d1205496b..da03873e2ef0 100644 > --- a/drivers/gpu/drm/tidss/tidss_crtc.h > +++ b/drivers/gpu/drm/tidss/tidss_crtc.h > @@ -1,4 +1,4 @@ > -/* SPDX-License-Identifier: GPL-2.0 */ > +/* SPDX-License-Identifier: GPL-2.0 OR MIT */ > /* > * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Tomi Valkeinen > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c > b/drivers/gpu/drm/tidss/tidss_dispc.c > index 1ad711f8d2a8..3321a1c731b1 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.c > +++ b/drivers/gpu/drm/tidss/tidss_dispc.c > @@ -1,4 +1,4 @@ > -// SPDX-License-Identifier: GPL-2.0 > +// SPDX-License-Identifier: GPL-2.0 OR MIT > /* > * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Jyri Sarha > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h > b/drivers/gpu/drm/tidss/tidss_dispc.h > index 086327d51a90..e6e4396a0d63 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.h > +++ b/drivers/gpu/drm/tidss/tidss_dispc.h > @@ -1,4 +1,4 @@ > -/* SPDX-License-Identifier: GPL-2.0 */ > +/* SPDX-License-Identifier: GPL-2.0 OR MIT */ > /* > * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Tomi Valkeinen > diff --git a/drivers/gpu/drm/tidss/tidss_dispc_regs.h > b/drivers/gpu/drm/tidss/tidss_dispc_regs.h > index 13feedfe5d6d..6e27b6d444ab 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc_regs.h > +++ b/drivers/gpu/drm/tidss/tidss_dispc_regs.h > @@ -1,4 +1,4 @@ > -/* SPDX-License-Identifier: GPL-2.0 */ > +/* SPDX-License-Identifier: GPL-2.0 OR MIT */ > /* > * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Jyri Sarha > diff --git a/drivers/gpu/drm/tidss/tidss_drv.c > b/drivers/gpu/drm/tidss/tidss_drv.c > index d15f836dca95..b060e420ddec 100644 > --- a/drivers/gpu/drm/tidss/tidss_drv.c > +++ b/drivers/gpu/drm/tidss/tidss_drv.c > @@ -1,4 +1,4 @@ > -// SPDX-License-Identifier: GPL-2.0 > +// SPDX-License-Identifier: GPL-2.0 OR MIT > /* > * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Tomi Valkeinen > diff --git a/drivers/gpu/drm/tidss/tidss_drv.h > b/drivers/gpu/drm/tidss/tidss_drv.h > index d7f27b0b0315..d4209234f59c 100644 > --- a/drivers/gpu/drm/tidss/tidss_drv.h > +++ b/dr
Re: [PATCH v4 42/80] drm/tilcdc: Run DRM default client setup
September 9, 2024 at 2:30 PM, "Thomas Zimmermann" mailto:tzimmerm...@suse.de?to=%22Thomas%20Zimmermann%22%20%3Ctzimmermann%40suse.de%3E
> wrote:
>
> Call drm_client_setup_with_color_mode() to run the kernel's default
> client setup for DRM. Set fbdev_probe in struct drm_driver, so that
> the client setup can start the common fbdev client.
>
> v3:
> - add DRM_FBDEV_DMA_DRIVER_OPS macro
>
> Signed-off-by: Thomas Zimmermann
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
> Acked-by: Javier Martinez Canillas
>
tilcdc patch looks identical to the previous version, but here is my ack again:
Acked-by: Jyri Sarha
Best regards,
Jyri
>
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index cd5eefa06060..8c9f3705aa6c 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -14,6 +14,7 @@
> #include
>
> #include
> +#include
> #include
> #include
> #include
> @@ -374,7 +375,8 @@ static int tilcdc_init(const struct drm_driver *ddrv,
> struct device *dev)
> goto init_failed;
> priv->is_registered = true;
>
> - drm_fbdev_dma_setup(ddev, bpp);
> + drm_client_setup_with_color_mode(ddev, bpp);
> +
> return 0;
>
> init_failed:
> @@ -472,6 +474,7 @@ DEFINE_DRM_GEM_DMA_FOPS(fops);
> static const struct drm_driver tilcdc_driver = {
> .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
> DRM_GEM_DMA_DRIVER_OPS,
> + DRM_FBDEV_DMA_DRIVER_OPS,
> #ifdef CONFIG_DEBUG_FS
> .debugfs_init = tilcdc_debugfs_init,
> #endif
> --
> 2.46.0
>
Re: [PATCH v3 43/81] drm/tilcdc: Run DRM default client setup
August 30, 2024 at 11:40 AM, "Thomas Zimmermann" mailto:tzimmerm...@suse.de?to=%22Thomas%20Zimmermann%22%20%3Ctzimmermann%40suse.de%3E
> wrote:
>
> Call drm_client_setup_with_color_mode() to run the kernel's default
> client setup for DRM. Set fbdev_probe in struct drm_driver, so that
> the client setup can start the common fbdev client.
>
> v3:
> - add DRM_FBDEV_DMA_DRIVER_OPS macro
>
> Signed-off-by: Thomas Zimmermann
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
Acked-by: Jyri Sarha
Thanks,
Jyri
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index cd5eefa06060..8c9f3705aa6c 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -14,6 +14,7 @@
> #include
>
> #include
> +#include
> #include
> #include
> #include
> @@ -374,7 +375,8 @@ static int tilcdc_init(const struct drm_driver *ddrv,
> struct device *dev)
> goto init_failed;
> priv->is_registered = true;
>
> - drm_fbdev_dma_setup(ddev, bpp);
> + drm_client_setup_with_color_mode(ddev, bpp);
> +
> return 0;
>
> init_failed:
> @@ -472,6 +474,7 @@ DEFINE_DRM_GEM_DMA_FOPS(fops);
> static const struct drm_driver tilcdc_driver = {
> .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
> DRM_GEM_DMA_DRIVER_OPS,
> + DRM_FBDEV_DMA_DRIVER_OPS,
> #ifdef CONFIG_DEBUG_FS
> .debugfs_init = tilcdc_debugfs_init,
> #endif
> --
> 2.46.0
>
Re: [PATCH 9/9] drm/tilcdc: Use backlight power constants
July 31, 2024 at 3:17 PM, "Thomas Zimmermann" mailto:tzimmerm...@suse.de?to=%22Thomas%20Zimmermann%22%20%3Ctzimmermann%40suse.de%3E
> wrote:
>
> Replace FB_BLANK_ constants with their counterparts from the
> backlight subsystem. The values are identical, so there's no
> change in functionality or semantics.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
> ---
Acked-by: Jyri Sarha
Thank,
Jyri
> drivers/gpu/drm/tilcdc/tilcdc_panel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> index 68093d6b6b16..5f2d1b6f9ee9 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> @@ -49,7 +49,7 @@ static void panel_encoder_dpms(struct drm_encoder *encoder,
> int mode)
>
> if (backlight) {
> backlight->props.power = mode == DRM_MODE_DPMS_ON ?
> - FB_BLANK_UNBLANK : FB_BLANK_POWERDOWN;
> + BACKLIGHT_POWER_ON : BACKLIGHT_POWER_OFF;
> backlight_update_status(backlight);
> }
>
> --
> 2.45.2
>
Re: [PATCH 12/21] drm/tilcdc: Allow build without __iowmb()
April 10, 2024 at 8:04 PM, "Ville Syrjälä" mailto:ville.syrj...@linux.intel.com?to=%22Ville%20Syrj%C3%A4l%C3%A4%22%20%3Cville.syrjala%40linux.intel.com%3E > wrote: > > What if someone tries to actually boot a kernel built > with COMPILE_TEST=y on a machine with this hardware? > I doubt there is am335x HW out there with enough memory to load COMPILE_TEST=y kernel. BR, Jyri
Re: [PATCH] drm/tilcdc: request and mapp iomem with devres
December 22, 2023 at 1:52 PM, "Philipp Stanner" mailto:pstan...@redhat.com?to=%22Philipp%20Stanner%22%20%3Cpstanner%40redhat.com%3E
> wrote:
>
> tilcdc currently just ioremaps its iomem, without doing the (a bit more
> robust) request on the memory first. The devm_ functions provide a handy
> way to both request and ioremap the memory with automatic cleanup.
>
> Replace the manual ioremap with the devm_ version.
>
> Suggested-by: Thomas Zimmermann
> Signed-off-by: Philipp Stanner
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
I'll apply this shortly to drm-misc-next.
Thanks,
Jyri
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 19 ---
> 1 file changed, 4 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 8ebd7134ee21..2ad3f44a6e2d 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -182,9 +182,6 @@ static void tilcdc_fini(struct drm_device *dev)
> if (priv->clk)
> clk_put(priv->clk);
>
> - if (priv->mmio)
> - iounmap(priv->mmio);
> -
> if (priv->wq)
> destroy_workqueue(priv->wq);
>
> @@ -201,7 +198,6 @@ static int tilcdc_init(const struct drm_driver *ddrv,
> struct device *dev)
> struct platform_device *pdev = to_platform_device(dev);
> struct device_node *node = dev->of_node;
> struct tilcdc_drm_private *priv;
> - struct resource *res;
> u32 bpp = 0;
> int ret;
>
> @@ -226,17 +222,10 @@ static int tilcdc_init(const struct drm_driver *ddrv,
> struct device *dev)
> goto init_failed;
> }
>
> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - if (!res) {
> - dev_err(dev, "failed to get memory resource\n");
> - ret = -EINVAL;
> - goto init_failed;
> - }
> -
> - priv->mmio = ioremap(res->start, resource_size(res));
> - if (!priv->mmio) {
> - dev_err(dev, "failed to ioremap\n");
> - ret = -ENOMEM;
> + priv->mmio = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(priv->mmio)) {
> + dev_err(dev, "failed to request / ioremap\n");
> + ret = PTR_ERR(priv->mmio);
> goto init_failed;
> }
>
> --
> 2.43.0
>
Re: [PATCH v3 16/16] drm/tilcdc: Convert to platform remove callback returning void
November 2, 2023 at 6:56 PM, "Uwe Kleine-König" mailto:u.kleine-koe...@pengutronix.de?to=%22Uwe%20Kleine-K%C3%B6nig%22%20%3Cu.kleine-koenig%40pengutronix.de%3E
> wrote:
>
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this typically results in resource leaks. To improve here there is a
> quest to make the remove callback return void. In the first step of this
> quest all drivers are converted to .remove_new() which already returns
> void.
>
> There is one error path in tilcdc_pdev_remove() that potentially could
> yield a non-zero return code. In this case an error message describing
> the failure is emitted now instead of
>
> remove callback returned a non-zero value. This will be ignored.
>
> before. Otherwise there is no difference. Also note that currently
> tilcdc_get_external_components() doesn't return negative values.
>
> Signed-off-by: Uwe Kleine-König
Applied this on top of drm-misc-next, dug up my good old Beaglebone-Black,and
tested that everything still works, so:
Tested-by: Jyri Sarha
I'll apply this shortly to drm-misc-next.
Best regards,
Jyri
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 8ebd7134ee21..137cd9f62e9f 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -570,19 +570,18 @@ static int tilcdc_pdev_probe(struct platform_device
> *pdev)
> match);
> }
>
> -static int tilcdc_pdev_remove(struct platform_device *pdev)
> +static void tilcdc_pdev_remove(struct platform_device *pdev)
> {
> int ret;
>
> ret = tilcdc_get_external_components(&pdev->dev, NULL);
> if (ret < 0)
> - return ret;
> + dev_err(&pdev->dev, "tilcdc_get_external_components() failed (%pe)\n",
> + ERR_PTR(ret));
> else if (ret == 0)
> tilcdc_fini(platform_get_drvdata(pdev));
> else
> component_master_del(&pdev->dev, &tilcdc_comp_ops);
> -
> - return 0;
> }
>
> static void tilcdc_pdev_shutdown(struct platform_device *pdev)
> @@ -599,7 +598,7 @@ MODULE_DEVICE_TABLE(of, tilcdc_of_match);
>
> static struct platform_driver tilcdc_platform_driver = {
> .probe = tilcdc_pdev_probe,
> - .remove = tilcdc_pdev_remove,
> + .remove_new = tilcdc_pdev_remove,
> .shutdown = tilcdc_pdev_shutdown,
> .driver = {
> .name = "tilcdc",
> --
> 2.42.0
>
Re: [PATCH 47/53] drm/tilcdc: Convert to platform remove callback returning void
May 7, 2023 at 7:26 PM, "Uwe Kleine-König" mailto:u.kleine-koe...@pengutronix.de?to=%22Uwe%20Kleine-K%C3%B6nig%22%20%3Cu.kleine-koenig%40pengutronix.de%3E
> wrote:
>
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this typically results in resource leaks. To improve here there is a
> quest to make the remove callback return void. In the first step of this
> quest all drivers are converted to .remove_new() which already returns
> void.
>
> Trivially convert this driver from always returning zero in the remove
> callback to the void returning variant.
>
> Signed-off-by: Uwe Kleine-König
Reviewed-by: Jyri Sarha
> ---
> drivers/gpu/drm/tilcdc/tilcdc_panel.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> index 2729e16bc053..9aefd010acde 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> @@ -374,7 +374,7 @@ static int panel_probe(struct platform_device *pdev)
> return ret;
> }
>
> -static int panel_remove(struct platform_device *pdev)
> +static void panel_remove(struct platform_device *pdev)
> {
> struct tilcdc_module *mod = dev_get_platdata(&pdev->dev);
> struct panel_module *panel_mod = to_panel_module(mod);
> @@ -387,8 +387,6 @@ static int panel_remove(struct platform_device *pdev)
>
> tilcdc_module_cleanup(mod);
> kfree(panel_mod->info);
> -
> - return 0;
> }
>
> static const struct of_device_id panel_of_match[] = {
> @@ -398,7 +396,7 @@ static const struct of_device_id panel_of_match[] = {
>
> static struct platform_driver panel_driver = {
> .probe = panel_probe,
> - .remove = panel_remove,
> + .remove_new = panel_remove,
> .driver = {
> .name = "tilcdc-panel",
> .of_match_table = panel_of_match,
> --
> 2.39.2
>
Re: [PATCH 1/4] drm/plane: Remove drm_plane_init()
September 9, 2022 at 1:59 PM, "Thomas Zimmermann" mailto:tzimmerm...@suse.de?to=%22Thomas%20Zimmermann%22%20%3Ctzimmermann%40suse.de%3E
> wrote:
>
> Open-code drm_plane_init() and remove the function from DRM. The
> implementation of drm_plane_init() is a simple wrapper around a call
> to drm_universal_plane_init(), so drivers can just use that instead.
>
> Signed-off-by: Thomas Zimmermann
Acked-by: Jyri Sarha
> ---
> drivers/gpu/drm/drm_modeset_helper.c | 3 +-
> drivers/gpu/drm/drm_plane.c | 32 --
> drivers/gpu/drm/nouveau/dispnv04/overlay.c | 13 +
> drivers/gpu/drm/shmobile/shmob_drm_plane.c | 7 +++--
> drivers/gpu/drm/tilcdc/tilcdc_plane.c | 9 +++---
> include/drm/drm_plane.h | 8 +-
> 6 files changed, 17 insertions(+), 55 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_modeset_helper.c
> b/drivers/gpu/drm/drm_modeset_helper.c
> index bd609a978848..611dd01fb604 100644
> --- a/drivers/gpu/drm/drm_modeset_helper.c
> +++ b/drivers/gpu/drm/drm_modeset_helper.c
> @@ -100,8 +100,7 @@ EXPORT_SYMBOL(drm_helper_mode_fill_fb_struct);
> * This is the minimal list of formats that seem to be safe for modeset use
> * with all current DRM drivers. Most hardware can actually support more
> * formats than this and drivers may specify a more accurate list when
> - * creating the primary plane. However drivers that still call
> - * drm_plane_init() will use this minimal format list as the default.
> + * creating the primary plane.
> */
> static const uint32_t safe_modeset_formats[] = {
> DRM_FORMAT_XRGB,
> diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
> index 726f2f163c26..0f14b4d3bb10 100644
> --- a/drivers/gpu/drm/drm_plane.c
> +++ b/drivers/gpu/drm/drm_plane.c
> @@ -482,38 +482,6 @@ void drm_plane_unregister_all(struct drm_device *dev)
> }
> }
>
> -/**
> - * drm_plane_init - Initialize a legacy plane
> - * @dev: DRM device
> - * @plane: plane object to init
> - * @possible_crtcs: bitmask of possible CRTCs
> - * @funcs: callbacks for the new plane
> - * @formats: array of supported formats (DRM_FORMAT\_\*)
> - * @format_count: number of elements in @formats
> - * @is_primary: plane type (primary vs overlay)
> - *
> - * Legacy API to initialize a DRM plane.
> - *
> - * New drivers should call drm_universal_plane_init() instead.
> - *
> - * Returns:
> - * Zero on success, error code on failure.
> - */
> -int drm_plane_init(struct drm_device *dev, struct drm_plane *plane,
> - uint32_t possible_crtcs,
> - const struct drm_plane_funcs *funcs,
> - const uint32_t *formats, unsigned int format_count,
> - bool is_primary)
> -{
> - enum drm_plane_type type;
> -
> - type = is_primary ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
> - return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
> - formats, format_count,
> - NULL, type, NULL);
> -}
> -EXPORT_SYMBOL(drm_plane_init);
> -
> /**
> * drm_plane_cleanup - Clean up the core plane usage
> * @plane: plane to cleanup
> diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
> b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
> index 37e63e98cd08..33f29736024a 100644
> --- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
> +++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
> @@ -296,9 +296,10 @@ nv10_overlay_init(struct drm_device *device)
> break;
> }
>
> - ret = drm_plane_init(device, &plane->base, 3 /* both crtc's */,
> - &nv10_plane_funcs,
> - formats, num_formats, false);
> + ret = drm_universal_plane_init(device, &plane->base, 3 /* both crtc's */,
> + &nv10_plane_funcs,
> + formats, num_formats, NULL,
> + DRM_PLANE_TYPE_OVERLAY, NULL);
> if (ret)
> goto err;
>
> @@ -475,9 +476,9 @@ nv04_overlay_init(struct drm_device *device)
> if (!plane)
> return;
>
> - ret = drm_plane_init(device, &plane->base, 1 /* single crtc */,
> - &nv04_plane_funcs,
> - formats, 2, false);
> + ret = drm_universal_plane_init(device, &plane->base, 1 /* single crtc */,
> + &nv04_plane_funcs, formats, 2, NULL,
> + DRM_PLANE_TYPE_OVERLAY, NULL);
> if (ret)
> goto err;
>
> diff --git a/drivers/gpu/drm/shmobile/shmob_drm_plane.c
> b/drivers/gpu/drm/shmobile/shmob_drm_plane.c
> index 54228424793a..6c5f0cbe7d95 100644
> --- a/drivers/gpu/drm/shmobile/shmob_drm_plane.c
> +++ b/drivers/gpu/drm/shmobile/shmob_drm_plane.c
> @@ -252,9 +252,10 @@ int shmob_drm_plane_create(struct shmob_drm_device
> *sdev, unsigned int index)
> splane->index = index;
> splane->alpha = 255;
>
> - ret = drm_plane_init(sdev->ddev, &splane->plane, 1,
> - &shmob_drm_plane_funcs, formats,
> - ARRAY_SI
Re: [PATCH] drm/tilcdc: fix typos in comment
On 2022-04-22 14:09, brookxu.cn wrote:
From: Chunguang Xu
Fix typos in comment.
Signed-off-by: Chunguang Xu
Pushed to drm-misc-next.
Thanks,
Jyri
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 29890d7..b986946 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -996,7 +996,7 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc)
if (stat & LCDC_FRAME_DONE) {
tilcdc_crtc->frame_done = true;
wake_up(&tilcdc_crtc->frame_done_wq);
- /* rev 1 lcdc appears to hang if irq is not disbaled here */
+ /* rev 1 lcdc appears to hang if irq is not disabled here */
if (priv->rev == 1)
tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
LCDC_V1_FRAME_DONE_INT_ENA);
Re: [PATCH] tilcdc: tilcdc_external: fix an incorrect NULL check on list iterator
On 2022-03-27 9:15, Xiaomeng Tong wrote:
The bug is here:
if (!encoder) {
The list iterator value 'encoder' will *always* be set and non-NULL
by list_for_each_entry(), so it is incorrect to assume that the
iterator value will be NULL if the list is empty or no element
is found.
To fix the bug, use a new variable 'iter' as the list iterator,
while use the original variable 'encoder' as a dedicated pointer
to point to the found element.
Cc: sta...@vger.kernel.org
Fixes: ec9eab097a500 ("drm/tilcdc: Add drm bridge support for
attaching drm bridge drivers")
Signed-off-by: Xiaomeng Tong
Thanks for the patch. Good catch.
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
I'll apply this to drm-misc-next in couple of days.
Best regards,
Jyri
---
drivers/gpu/drm/tilcdc/tilcdc_external.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c
b/drivers/gpu/drm/tilcdc/tilcdc_external.c
index 7594cf6e186e..3b86d002ef62 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
@@ -60,11 +60,13 @@ struct drm_connector
*tilcdc_encoder_find_connector(struct drm_device *ddev,
int tilcdc_add_component_encoder(struct drm_device *ddev)
{
struct tilcdc_drm_private *priv = ddev->dev_private;
- struct drm_encoder *encoder;
+ struct drm_encoder *encoder = NULL, *iter;
- list_for_each_entry(encoder, &ddev->mode_config.encoder_list, head)
- if (encoder->possible_crtcs & (1 << priv->crtc->index))
+ list_for_each_entry(iter, &ddev->mode_config.encoder_list, head)
+ if (iter->possible_crtcs & (1 << priv->crtc->index)) {
+ encoder = iter;
break;
+ }
if (!encoder) {
dev_err(ddev->dev, "%s: No suitable encoder found\n", __func__);
Re: [PATCH v2 36/37] drm/tilcdc: Add support for the nomodeset kernel parameter
On 2021-12-17 2:37, Javier Martinez Canillas wrote:
According to disable Documentation/admin-guide/kernel-parameters.txt,
this
parameter can be used to disable kernel modesetting.
DRM drivers will not perform display-mode changes or accelerated
rendering
and only the system framebuffer will be available if it was set-up.
But only a few DRM drivers currently check for nomodeset, make this
driver
to also support the command line parameter.
Signed-off-by: Javier Martinez Canillas
Acked-by: Jyri Sarha
---
(no changes since v1)
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index cc567c87057d..eee3c447fbac 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -604,6 +604,9 @@ static struct platform_driver
tilcdc_platform_driver = {
static int __init tilcdc_drm_init(void)
{
+ if (drm_firmware_drivers_only())
+ return -ENODEV;
+
DBG("init");
tilcdc_panel_init();
return platform_driver_register(&tilcdc_platform_driver);
Re: [PATCH v3] drm/tilcdc: add const to of_device_id
On 2021-12-16 11:55, Xiang wangx wrote:
struct of_device_id should normally be const.
Signed-off-by: Xiang wangx
Reviewed-by: Jyri Sarha
Thanks,
Jyri
---
Changes since v1
* add const in line 63
Changes since v2
* removed line 63
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 3ddb7c710a3d..cc567c87057d 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -60,8 +60,6 @@ void tilcdc_module_cleanup(struct tilcdc_module *mod)
list_del(&mod->list);
}
-static struct of_device_id tilcdc_of_match[];
-
static int tilcdc_atomic_check(struct drm_device *dev,
struct drm_atomic_state *state)
{
@@ -587,7 +585,7 @@ static int tilcdc_pdev_remove(struct
platform_device *pdev)
return 0;
}
-static struct of_device_id tilcdc_of_match[] = {
+static const struct of_device_id tilcdc_of_match[] = {
{ .compatible = "ti,am33xx-tilcdc", },
{ .compatible = "ti,da850-tilcdc", },
{ },
Re: [PATCH v2] drm/tilcdc: add const to of_device_id
On 2021-12-16 11:44, Joe Perches wrote:
On Thu, 2021-12-16 at 17:26 +0800, Xiang wangx wrote:
struct of_device_id should normally be const.
[]
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
[]
@@ -60,7 +60,7 @@ void tilcdc_module_cleanup(struct tilcdc_module
*mod)
list_del(&mod->list);
}
-static struct of_device_id tilcdc_of_match[];
+static const struct of_device_id tilcdc_of_match[];
This line could likely be removed instead.
$ git grep -w -n tilcdc_of_match
drivers/gpu/drm/tilcdc/tilcdc_drv.c:63:static struct of_device_id
tilcdc_of_match[];
drivers/gpu/drm/tilcdc/tilcdc_drv.c:590:static struct of_device_id
tilcdc_of_match[] = {
drivers/gpu/drm/tilcdc/tilcdc_drv.c:595:MODULE_DEVICE_TABLE(of,
tilcdc_of_match);
drivers/gpu/drm/tilcdc/tilcdc_drv.c:603:
.of_match_table = tilcdc_of_match,
Oh yes. It appears to have been there from day one and even then it was
bogus.
Xiang Wang, could you produce one more version of the patch with the
declaration removed.
Best regards,
Jyri
@@ -587,7 +587,7 @@ static int tilcdc_pdev_remove(struct
platform_device *pdev)
return 0;
}
-static struct of_device_id tilcdc_of_match[] = {
+static const struct of_device_id tilcdc_of_match[] = {
{ .compatible = "ti,am33xx-tilcdc", },
{ .compatible = "ti,da850-tilcdc", },
{ },
Re: [PATCH] drm/tilcdc: add const to of_device_id
Please fix the bellow error and I will review and merge this. But in
future, please at least compile test you changes with relevant
configurations or alldefconfig before sending them to upstream!
Best regards,
Jyri
On 2021-12-15 22:35, kernel test robot wrote:
Hi Xiang,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v5.16-rc5 next-20211214]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Xiang-wangx/drm-tilcdc-add-const-to-of_device_id/20211216-002326
base: git://anongit.freedesktop.org/drm/drm drm-next
config: arm-randconfig-c002-20211214
(https://download.01.org/0day-ci/archive/20211216/202112160411.snrselay-...@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
-O ~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/0day-ci/linux/commit/5698eadb76d94a4fc5298f5bea88b839399ddef0
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review
Xiang-wangx/drm-tilcdc-add-const-to-of_device_id/20211216-002326
git checkout 5698eadb76d94a4fc5298f5bea88b839399ddef0
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0
make.cross O=build_dir ARCH=arm SHELL=/bin/bash
drivers/gpu/drm/tilcdc/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
All errors (new ones prefixed by >>):
drivers/gpu/drm/tilcdc/tilcdc_drv.c:590:34: error: conflicting types
for 'tilcdc_of_match'; have 'const struct of_device_id[]'
590 | static const struct of_device_id tilcdc_of_match[] = {
| ^~~
drivers/gpu/drm/tilcdc/tilcdc_drv.c:63:28: note: previous
declaration of 'tilcdc_of_match' with type 'struct of_device_id[]'
63 | static struct of_device_id tilcdc_of_match[];
|^~~
drivers/gpu/drm/tilcdc/tilcdc_drv.c:63:28: error: array
'tilcdc_of_match' assumed to have one element [-Werror]
drivers/gpu/drm/tilcdc/tilcdc_drv.c:63:28: error: 'tilcdc_of_match'
defined but not used [-Werror=unused-variable]
cc1: all warnings being treated as errors
vim +590 drivers/gpu/drm/tilcdc/tilcdc_drv.c
589
> 590 static const struct of_device_id tilcdc_of_match[] = {
591 { .compatible = "ti,am33xx-tilcdc", },
592 { .compatible = "ti,da850-tilcdc", },
593 { },
594 };
595 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
596
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
Re: [PATCH v3 24/34] drm/tilcdc: Migrate to aggregate driver
On 2021-10-26 3:00, Stephen Boyd wrote:
Use an aggregate driver instead of component ops so that we can get
proper driver probe ordering of the aggregate device with respect to
all
the component devices that make up the aggregate device.
Cc: Jyri Sarha
Cc: Tomi Valkeinen
Cc: Daniel Vetter
Cc: "Rafael J. Wysocki"
Cc: Rob Clark
Cc: Russell King
Cc: Saravana Kannan
Signed-off-by: Stephen Boyd
---
Tested-by: Jyri Sarha
Thanks,
Jyri
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 6b03f89a98d4..d5c6567eec8d 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -531,13 +531,16 @@ static const struct dev_pm_ops tilcdc_pm_ops = {
/*
* Platform driver:
*/
-static int tilcdc_bind(struct device *dev)
+static int tilcdc_bind(struct aggregate_device *adev)
{
+ struct device *dev = adev->parent;
+
return tilcdc_init(&tilcdc_driver, dev);
}
-static void tilcdc_unbind(struct device *dev)
+static void tilcdc_unbind(struct aggregate_device *adev)
{
+ struct device *dev = adev->parent;
struct drm_device *ddev = dev_get_drvdata(dev);
/* Check if a subcomponent has already triggered the unloading. */
@@ -547,9 +550,13 @@ static void tilcdc_unbind(struct device *dev)
tilcdc_fini(dev_get_drvdata(dev));
}
-static const struct component_master_ops tilcdc_comp_ops = {
- .bind = tilcdc_bind,
- .unbind = tilcdc_unbind,
+static struct aggregate_driver tilcdc_aggregate_driver = {
+ .probe = tilcdc_bind,
+ .remove = tilcdc_unbind,
+ .driver = {
+ .name = "tilcdc_drm",
+ .owner = THIS_MODULE,
+ },
};
static int tilcdc_pdev_probe(struct platform_device *pdev)
@@ -566,12 +573,9 @@ static int tilcdc_pdev_probe(struct
platform_device *pdev)
ret = tilcdc_get_external_components(&pdev->dev, &match);
if (ret < 0)
return ret;
- else if (ret == 0)
+ if (ret == 0)
return tilcdc_init(&tilcdc_driver, &pdev->dev);
- else
- return component_master_add_with_match(&pdev->dev,
- &tilcdc_comp_ops,
- match);
+ return component_aggregate_register(&pdev->dev,
&tilcdc_aggregate_driver, match);
}
static int tilcdc_pdev_remove(struct platform_device *pdev)
@@ -581,10 +585,10 @@ static int tilcdc_pdev_remove(struct
platform_device *pdev)
ret = tilcdc_get_external_components(&pdev->dev, NULL);
if (ret < 0)
return ret;
- else if (ret == 0)
+ if (ret == 0)
tilcdc_fini(platform_get_drvdata(pdev));
else
- component_master_del(&pdev->dev, &tilcdc_comp_ops);
+ component_aggregate_unregister(&pdev->dev,
&tilcdc_aggregate_driver);
return 0;
}
Re: [PATCH] drm: Remove redundant 'flush_workqueue()' calls
On 2021-10-10 16:59, Christophe JAILLET wrote:
'destroy_workqueue()' already drains the queue before destroying it, so
there is no need to flush it explicitly.
Remove the redundant 'flush_workqueue()' calls.
This was generated with coccinelle:
@@
expression E;
@@
- flush_workqueue(E);
destroy_workqueue(E);
Signed-off-by: Christophe JAILLET
For tilcdc
Acked-by: Jyri Sarha
Thanks,
Jyri
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 1 -
drivers/gpu/drm/msm/dsi/dsi_host.c| 1 -
drivers/gpu/drm/msm/edp/edp_ctrl.c| 1 -
drivers/gpu/drm/msm/hdmi/hdmi.c | 4 +---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 +---
drivers/gpu/drm/vmwgfx/ttm_memory.c | 1 -
6 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 789acae37f55..06bde46df451 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -1733,7 +1733,6 @@ static void etnaviv_gpu_unbind(struct device
*dev, struct device *master,
DBG("%s", dev_name(gpu->dev));
- flush_workqueue(gpu->wq);
destroy_workqueue(gpu->wq);
etnaviv_sched_fini(gpu);
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index c86b5090fae6..462ea65ebf89 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1925,7 +1925,6 @@ void msm_dsi_host_destroy(struct mipi_dsi_host
*host)
DBG("");
dsi_tx_buf_free(msm_host);
if (msm_host->workqueue) {
- flush_workqueue(msm_host->workqueue);
destroy_workqueue(msm_host->workqueue);
msm_host->workqueue = NULL;
}
diff --git a/drivers/gpu/drm/msm/edp/edp_ctrl.c
b/drivers/gpu/drm/msm/edp/edp_ctrl.c
index fe1366b4c49f..07129a6e5dbb 100644
--- a/drivers/gpu/drm/msm/edp/edp_ctrl.c
+++ b/drivers/gpu/drm/msm/edp/edp_ctrl.c
@@ -1190,7 +1190,6 @@ void msm_edp_ctrl_destroy(struct edp_ctrl *ctrl)
return;
if (ctrl->workqueue) {
- flush_workqueue(ctrl->workqueue);
destroy_workqueue(ctrl->workqueue);
ctrl->workqueue = NULL;
}
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c
b/drivers/gpu/drm/msm/hdmi/hdmi.c
index 737453b6e596..5ba7c8f28419 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -61,10 +61,8 @@ static void msm_hdmi_destroy(struct hdmi *hdmi)
* at this point, hpd has been disabled,
* after flush workq, it's safe to deinit hdcp
*/
- if (hdmi->workq) {
- flush_workqueue(hdmi->workq);
+ if (hdmi->workq)
destroy_workqueue(hdmi->workq);
- }
msm_hdmi_hdcp_destroy(hdmi);
if (hdmi->phy_dev) {
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 6b03f89a98d4..3ddb7c710a3d 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -186,10 +186,8 @@ static void tilcdc_fini(struct drm_device *dev)
if (priv->mmio)
iounmap(priv->mmio);
- if (priv->wq) {
- flush_workqueue(priv->wq);
+ if (priv->wq)
destroy_workqueue(priv->wq);
- }
dev->dev_private = NULL;
diff --git a/drivers/gpu/drm/vmwgfx/ttm_memory.c
b/drivers/gpu/drm/vmwgfx/ttm_memory.c
index edd17c30d5a5..7f7fe35fc21d 100644
--- a/drivers/gpu/drm/vmwgfx/ttm_memory.c
+++ b/drivers/gpu/drm/vmwgfx/ttm_memory.c
@@ -468,7 +468,6 @@ void ttm_mem_global_release(struct ttm_mem_global
*glob)
struct ttm_mem_zone *zone;
unsigned int i;
- flush_workqueue(glob->swap_queue);
destroy_workqueue(glob->swap_queue);
glob->swap_queue = NULL;
for (i = 0; i < glob->num_zones; ++i) {
Re: [PATCH] drm/bridge: Centralize error message when bridge attach fails
On 2021-04-15 4:47, Laurent Pinchart wrote: Being informed of a failure to attach a bridge is useful, and many drivers prints an error message in that case. Move the message to drm_bridge_attach() to avoid code duplication. Suggested-by: Stephen Boyd Signed-off-by: Laurent Pinchart Reviewed-by: Jyri Sarha ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v3 0/3] drm/tilcdc: fix LCD pixel clock setting
Thanks, Reviewed-by: Jyri Sarha for the series. I'll merge these later today. Best regards, Jyri On 2021-03-22 23:33, Dario Binacchi wrote: The series was born from a patch to fix the LCD pixel clock setting. Two additional patches have been added to this. One renames a misleading variable name that was probably the cause of the bug and the other fixes a warning message. Changes in v3: - Replace calculated with requested in the warning message. - Swap the positions of the real_pclk_rate, and pclk_rate parameters in the warning message. Changes in v2: - The patch has been added in version 2. - Rename clk_div_rate to real_pclk_rate. - Provide pixel clock rate to tilcdc_pclk_diff(). - The patch has been added in version 2. Dario Binacchi (3): drm/tilcdc: rename req_rate to pclk_rate drm/tilcdc: fix LCD pixel clock setting drm/tilcdc: fix pixel clock setting warning message drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/tilcdc: panel: fix platform_no_drv_owner.cocci warnings
On 2021-03-03 11:04, Yang Li wrote:
./drivers/gpu/drm/tilcdc/tilcdc_panel.c:402:3-8: No need to set .owner
here. The core will do it.
Remove .owner field if calls are used which set it automatically
Reported-by: Abaci Robot
Signed-off-by: Yang Li
Reviewed-by: Jyri Sarha
I'll merge this soon to drm-misc-next.
Best regards,
Jyri
---
drivers/gpu/drm/tilcdc/tilcdc_panel.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
index 00efc30..4235780 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
@@ -399,7 +399,6 @@ static int panel_remove(struct platform_device
*pdev)
.probe = panel_probe,
.remove = panel_remove,
.driver = {
- .owner = THIS_MODULE,
.name = "tilcdc-panel",
.of_match_table = panel_of_match,
},
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Re: [PATCH v2 0/3] drm/tilcdc: fix LCD pixel clock setting
On 2021-03-21 10:31, Dario Binacchi wrote: The series was born from a patch to fix the LCD pixel clock setting. Two additional patches have been added to this. One renames a misleading variable name that was probably the cause of the bug and the other fixes a warning message. Thanks you, I think this looks good now. Reviewed-by: Jyri Sarha For the series. I'll wait a day or two if Tomi has something more to say and merge this to drm-misc-next. Best regards, Jyri Changes in v2: - The patch has been added in version 2. - Rename clk_div_rate to real_pclk_rate. - Provide pixel clock rate to tilcdc_pclk_diff(). - The patch has been added in version 2. Dario Binacchi (3): drm/tilcdc: rename req_rate to pclk_rate drm/tilcdc: fix LCD pixel clock setting drm/tilcdc: fix pixel clock setting warning message drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/tilcdc: fix LCD pixel clock setting
On 2021-03-18 23:47, Dario Binacchi wrote:
Il 17/03/2021 09:19 Tomi Valkeinen ha scritto:
On 14/03/2021 17:13, Dario Binacchi wrote:
> As reported by TI spruh73x RM, the LCD pixel clock (LCD_PCLK) frequency
> is obtained by dividing LCD_CLK, the LCD controller reference clock,
> for CLKDIV:
>
> LCD_PCLK = LCD_CLK / CLKDIV
>
> where CLKDIV must be greater than 1.
>
> Therefore LCD_CLK must be set to 'req_rate * CLKDIV' instead of req_rate
The above doesn't make sense, the code already sets LCD_CLK to
'req_rate
* clkdiv', not req_rate.
> and the real LCD_CLK rate must be compared with 'req_rate * CLKDIV' and
> not with req_rate.
This is true, the code looks at the wrong value.
> Passing req_rate instead of 'req_rate * CLKDIV' to the tilcdc_pclk_diff
> routine caused it to fail even if LCD_CLK was properly set.
>
> Signed-off-by: Dario Binacchi
>
> ---
>
> drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> index 30213708fc99..02f56c9a5da5 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> @@ -203,7 +203,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
>struct drm_device *dev = crtc->dev;
>struct tilcdc_drm_private *priv = dev->dev_private;
>struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
> - unsigned long clk_rate, real_rate, req_rate;
> + unsigned long clk_rate, real_rate, req_rate, clk_div_rate;
>unsigned int clkdiv;
>int ret;
>
> @@ -211,10 +211,11 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
>
>/* mode.clock is in KHz, set_rate wants parameter in Hz */
>req_rate = crtc->mode.clock * 1000;
> -
> - ret = clk_set_rate(priv->clk, req_rate * clkdiv);
> + /* LCD clock divisor input rate */
> + clk_div_rate = req_rate * clkdiv;
"clk_div_rate" sounds a bit odd to me. Why not lcd_fck_rate, as that's
the name used later? Or lcd_clk_rate. Or maybe lcd_clk_req_rate...
I prefer lcd_clk_rate.
How about adding an additional patch that changes the variable names to
make
the code more readable?
req_rate -> lcd_pclk_rate
clk_rate -> real_lcd_clk_rate
And add a comment to the function which highlights the relationship
LCD_CLK = LCD_PCLK * CLDIV ?
What about renaming current req_rate to pclk_rate (for pixel clock
rate), and calling pclk_rate * clkdiv = req_rate, as that is the rate we
need to request from the input clock? Adding lcd to local variable names
here is quite redundant after all. In any case req_rate is bit
misleading name here and probably part of the reason why the bug exists
in the first place.
Best regards,
Jyri
> + ret = clk_set_rate(priv->clk, clk_div_rate);
>clk_rate = clk_get_rate(priv->clk);
> - if (ret < 0 || tilcdc_pclk_diff(req_rate, clk_rate) > 5) {
> + if (ret < 0 || tilcdc_pclk_diff(clk_div_rate, clk_rate) > 5) {
>/*
> * If we fail to set the clock rate (some architectures don't
> * use the common clock framework yet and may not implement
>
I think this fix is fine, but looking at the current code, it's
calling
tilcdc_pclk_diff(), but doesn't actually provide pixel clocks to the
function, but fclk.
Yes, I agree.
Thanks and regards,
Dario
Tomi
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Re: [RESEND PATCH] drm/tilcdc: fix raster control register setting
On 2021-02-16 22:22, Dario Binacchi wrote: The fdd property of the tilcdc_panel_info structure must set the reqdly bit field (bit 12 to 19) of the raster control register. The previous statement set the least significant bit instead. Signed-off-by: Dario Binacchi Reviewed-by: Jyri Sarha Tested-by: Jyri Sarha Thanks for a good catch. I'll merge to this drm-misc-next soon. Best regards, Jyri --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 30213708fc99..238068e28729 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -393,7 +393,7 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) return; } } - reg |= info->fdd < 12; + reg |= info->fdd << 12; tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg); if (info->invert_pxl_clk) ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/tilcdc: replace spin_lock_irqsave by spin_lock in hard IRQ
On 2021-02-08 4:32, Tian Tao wrote:
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.
Signed-off-by: Tian Tao
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
I merge to this drm-misc-next soon.
Best regards,
Jyri
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 3021370..b3e38e9 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -904,13 +904,12 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc
*crtc)
tilcdc_clear_irqstatus(dev, stat);
if (stat & LCDC_END_OF_FRAME0) {
- unsigned long flags;
bool skip_event = false;
ktime_t now;
now = ktime_get();
- spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+ spin_lock(&tilcdc_crtc->irq_lock);
tilcdc_crtc->last_vblank = now;
@@ -920,21 +919,21 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc
*crtc)
skip_event = true;
}
- spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
+ spin_unlock(&tilcdc_crtc->irq_lock);
drm_crtc_handle_vblank(crtc);
if (!skip_event) {
struct drm_pending_vblank_event *event;
- spin_lock_irqsave(&dev->event_lock, flags);
+ spin_lock(&dev->event_lock);
event = tilcdc_crtc->event;
tilcdc_crtc->event = NULL;
if (event)
drm_crtc_send_vblank_event(crtc, event);
- spin_unlock_irqrestore(&dev->event_lock, flags);
+ spin_unlock(&dev->event_lock);
}
if (tilcdc_crtc->frame_intact)
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Re: [RESEND][PATCH] drm/tilcdc: send vblank event when disabling crtc
On 2021-02-09 10:24, quanyang.w...@windriver.com wrote:
From: Quanyang Wang
When run xrandr to change resolution on Beaglebone Black board, it will
print the error information:
root@beaglebone:~# xrandr -display :0 --output HDMI-1 --mode 720x400
[drm:drm_crtc_commit_wait] *ERROR* flip_done timed out
[drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [CRTC:32:tilcdc
crtc] commit wait timed out
[drm:drm_crtc_commit_wait] *ERROR* flip_done timed out
[drm:drm_atomic_helper_wait_for_dependencies] *ERROR*
[CONNECTOR:34:HDMI-A-1] commit wait timed out
[drm:drm_crtc_commit_wait] *ERROR* flip_done timed out
[drm:drm_atomic_helper_wait_for_dependencies] *ERROR*
[PLANE:31:plane-0] commit wait timed out
tilcdc 4830e000.lcdc: already pending page flip!
This is because there is operation sequence as below:
drm_atomic_connector_commit_dpms(mode is DRM_MODE_DPMS_OFF):
...
drm_atomic_helper_setup_commit <-
init_completion(commit_A->flip_done)
drm_atomic_helper_commit_tail
tilcdc_crtc_atomic_disable
tilcdc_plane_atomic_update <- drm_crtc_send_vblank_event in
tilcdc_crtc_irq
is skipped since
tilcdc_crtc->enabled is 0
tilcdc_crtc_atomic_flush <- drm_crtc_send_vblank_event is
skipped since
crtc->state->event is set to be
NULL in
tilcdc_plane_atomic_update
drm_mode_setcrtc:
...
drm_atomic_helper_setup_commit <-
init_completion(commit_B->flip_done)
drm_atomic_helper_wait_for_dependencies
drm_crtc_commit_wait <- wait for commit_A->flip_done
completing
Just as shown above, the steps which could complete commit_A->flip_done
are all skipped and commit_A->flip_done will never be completed. This
will
result a time-out ERROR when drm_crtc_commit_wait check the
commit_A->flip_done.
So add drm_crtc_send_vblank_event in tilcdc_crtc_atomic_disable to
complete commit_A->flip_done.
Fixes: cb345decb4d2 ("drm/tilcdc: Use standard
drm_atomic_helper_commit")
Signed-off-by: Quanyang Wang
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
Thanks a lot! I think I have bumbed into this once or twice, but latelu
I have had time to look into this. I'll merge this to drm-misc-next
soon.
Best regards,
Jyri
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 30213708fc99..d99afd19ca08 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -515,6 +515,15 @@ static void tilcdc_crtc_off(struct drm_crtc
*crtc, bool shutdown)
drm_crtc_vblank_off(crtc);
+ spin_lock_irq(&crtc->dev->event_lock);
+
+ if (crtc->state->event) {
+ drm_crtc_send_vblank_event(crtc, crtc->state->event);
+ crtc->state->event = NULL;
+ }
+
+ spin_unlock_irq(&crtc->dev->event_lock);
+
tilcdc_crtc_disable_irqs(dev);
pm_runtime_put_sync(dev->dev);
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Re: [PATCH] drm/tilcdc: send vblank event when disabling crtc
On 2021-02-09 5:09, quanyang.wang wrote:
Ping.
Could you resend the original patch (I have not received it) so I can
easily test and merge it?
I'll find some time to do it soon.
Best regards,
Jyri
On 1/29/21 3:58 PM, Tomi Valkeinen wrote:
Dropped the @ti.com addresses and added the new ones.
Tomi
On 29/01/2021 07:58, quanyang.w...@windriver.com wrote:
From: Quanyang Wang
When run xrandr to change resolution on Beaglebone Black board, it
will
print the error information:
root@beaglebone:~# xrandr -display :0 --output HDMI-1 --mode 720x400
[drm:drm_crtc_commit_wait] *ERROR* flip_done timed out
[drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [CRTC:32:tilcdc
crtc] commit wait timed out
[drm:drm_crtc_commit_wait] *ERROR* flip_done timed out
[drm:drm_atomic_helper_wait_for_dependencies] *ERROR*
[CONNECTOR:34:HDMI-A-1] commit wait timed out
[drm:drm_crtc_commit_wait] *ERROR* flip_done timed out
[drm:drm_atomic_helper_wait_for_dependencies] *ERROR*
[PLANE:31:plane-0] commit wait timed out
tilcdc 4830e000.lcdc: already pending page flip!
This is because there is operation sequence as below:
drm_atomic_connector_commit_dpms(mode is DRM_MODE_DPMS_OFF):
...
drm_atomic_helper_setup_commit <-
init_completion(commit_A->flip_done)
drm_atomic_helper_commit_tail
tilcdc_crtc_atomic_disable
tilcdc_plane_atomic_update <- drm_crtc_send_vblank_event in
tilcdc_crtc_irq
is skipped since
tilcdc_crtc->enabled is 0
tilcdc_crtc_atomic_flush <- drm_crtc_send_vblank_event is
skipped since
crtc->state->event is set to
be NULL in
tilcdc_plane_atomic_update
drm_mode_setcrtc:
...
drm_atomic_helper_setup_commit <-
init_completion(commit_B->flip_done)
drm_atomic_helper_wait_for_dependencies
drm_crtc_commit_wait <- wait for commit_A->flip_done
completing
Just as shown above, the steps which could complete
commit_A->flip_done
are all skipped and commit_A->flip_done will never be completed. This
will
result a time-out ERROR when drm_crtc_commit_wait check the
commit_A->flip_done.
So add drm_crtc_send_vblank_event in tilcdc_crtc_atomic_disable to
complete commit_A->flip_done.
Fixes: cb345decb4d2 ("drm/tilcdc: Use standard
drm_atomic_helper_commit")
Signed-off-by: Quanyang Wang
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 30213708fc99..d99afd19ca08 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -515,6 +515,15 @@ static void tilcdc_crtc_off(struct drm_crtc
*crtc, bool shutdown)
drm_crtc_vblank_off(crtc);
+ spin_lock_irq(&crtc->dev->event_lock);
+
+ if (crtc->state->event) {
+ drm_crtc_send_vblank_event(crtc, crtc->state->event);
+ crtc->state->event = NULL;
+ }
+
+ spin_unlock_irq(&crtc->dev->event_lock);
+
tilcdc_crtc_disable_irqs(dev);
pm_runtime_put_sync(dev->dev);
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Re: [PATCH] MAINTAINERS: Update addresses for TI display drivers
On 2020-12-16 9:59, Tomi Valkeinen wrote: Update the maintainer email addresses for TI display drivers. Signed-off-by: Tomi Valkeinen Acked-by: Jyri Sarha --- MAINTAINERS | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 281de213ef47..c21471497a18 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5932,8 +5932,8 @@ F: Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml F: drivers/gpu/drm/stm DRM DRIVERS FOR TI KEYSTONE -M: Jyri Sarha -M: Tomi Valkeinen +M: Jyri Sarha +M: Tomi Valkeinen L: dri-devel@lists.freedesktop.org S: Maintained T: git git://anongit.freedesktop.org/drm/drm-misc @@ -5943,15 +5943,15 @@ F: Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml F: drivers/gpu/drm/tidss/ DRM DRIVERS FOR TI LCDC -M: Jyri Sarha -R: Tomi Valkeinen +M: Jyri Sarha +R: Tomi Valkeinen L: dri-devel@lists.freedesktop.org S: Maintained F: Documentation/devicetree/bindings/display/tilcdc/ F: drivers/gpu/drm/tilcdc/ DRM DRIVERS FOR TI OMAP -M: Tomi Valkeinen +M: Tomi Valkeinen L: dri-devel@lists.freedesktop.org S: Maintained F: Documentation/devicetree/bindings/display/ti/ ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 1/4] drm/tilcdc: avoid 'make W=2' build failure
On 26/10/2020 21:41, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The -Wmissing-field-initializer warning when building with W=2
> turns into an error because tilcdc is built with -Werror:
>
> drm/tilcdc/tilcdc_drv.c:431:33: error: missing field 'data' initializer
> [-Werror,-Wmissing-field-initializers] { "regs", tilcdc_regs_show, 0 },
> drm/tilcdc/tilcdc_drv.c:432:33: error: missing field 'data' initializer
> [-Werror,-Wmissing-field-initializers] { "mm", tilcdc_mm_show, 0 },
>
> Add the missing field initializers to address the warning.
>
> Signed-off-by: Arnd Bergmann
Reviewed-by: Jyri Sarha
Please let me know if you want me to merge this.
Best regards,
Jyri
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 4f5fc3e87383..754a66051a21 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -428,8 +428,8 @@ static int tilcdc_mm_show(struct seq_file *m, void *arg)
> }
>
> static struct drm_info_list tilcdc_debugfs_list[] = {
> - { "regs", tilcdc_regs_show, 0 },
> - { "mm", tilcdc_mm_show, 0 },
> + { "regs", tilcdc_regs_show, 0, NULL },
> + { "mm", tilcdc_mm_show, 0, NULL },
> };
>
> static void tilcdc_debugfs_init(struct drm_minor *minor)
>
--
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Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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[PATCH v3 0/2] drm/tilcdc: Couple of minor feature improvements
Since v2: - "drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data" - Add reviewed-by tag - fix: -:106: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #106: FILE: drivers/gpu/drm/tilcdc/tilcdc_drv.c:289: + if (of_property_read_u32(node, "max-pixelclock", + &priv->max_pixelclock)) Since first version. - "drm/tilcdc: Do not keep vblank interrupts enabled all the time" - Add reviewed-by tags - "drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data" - Put TILCDC_DEFAULT_MAX_WIDTH_V1 before *_V2 and The vblank interrupts have been always on when the display is on for a very long time, so I decided that it is about time to fix it. Then the following patch is just a cleanup. BR, Jyri Jyri Sarha (2): drm/tilcdc: Do not keep vblank interrupts enabled all the time drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 52 ++-- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 38 +++- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 7 ++-- 3 files changed, 59 insertions(+), 38 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 2/2] drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data
We already have a private data member for maximum display width so
let's use it and get rid of the redundant tilcdc_crtc_max_width().
The LCDC version probing is moved to before reading the device tree
properties so that the version information is available when private
data maximum width is initialized, if "max-width" property is not
found.
Signed-off-by: Jyri Sarha
Reviewed-by: Tomi Valkeinen
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 16 +---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 38 +++-
drivers/gpu/drm/tilcdc/tilcdc_drv.h | 7 ++---
3 files changed, 26 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 0fd3dafe6404..da2ab2aa3577 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -754,20 +754,6 @@ static const struct drm_crtc_funcs tilcdc_crtc_funcs = {
.disable_vblank = tilcdc_crtc_disable_vblank,
};
-int tilcdc_crtc_max_width(struct drm_crtc *crtc)
-{
- struct drm_device *dev = crtc->dev;
- struct tilcdc_drm_private *priv = dev->dev_private;
- int max_width = 0;
-
- if (priv->rev == 1)
- max_width = 1024;
- else if (priv->rev == 2)
- max_width = 2048;
-
- return max_width;
-}
-
static enum drm_mode_status
tilcdc_crtc_mode_valid(struct drm_crtc *crtc,
const struct drm_display_mode *mode)
@@ -780,7 +766,7 @@ tilcdc_crtc_mode_valid(struct drm_crtc *crtc,
* check to see if the width is within the range that
* the LCD Controller physically supports
*/
- if (mode->hdisplay > tilcdc_crtc_max_width(crtc))
+ if (mode->hdisplay > priv->max_width)
return MODE_VIRTUAL_X;
/* width must be multiple of 16 */
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 4f5fc3e87383..c5f82e693f1a 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -105,7 +105,7 @@ static void modeset_init(struct drm_device *dev)
dev->mode_config.min_width = 0;
dev->mode_config.min_height = 0;
- dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
+ dev->mode_config.max_width = priv->max_width;
dev->mode_config.max_height = 2048;
dev->mode_config.funcs = &mode_config_funcs;
}
@@ -218,22 +218,6 @@ static int tilcdc_init(struct drm_driver *ddrv, struct
device *dev)
goto init_failed;
}
- if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
- priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
-
- DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
-
- if (of_property_read_u32(node, "max-width", &priv->max_width))
- priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
-
- DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
-
- if (of_property_read_u32(node, "max-pixelclock",
- &priv->max_pixelclock))
- priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
-
- DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
-
pm_runtime_enable(dev);
/* Determine LCD IP Version */
@@ -287,6 +271,26 @@ static int tilcdc_init(struct drm_driver *ddrv, struct
device *dev)
}
}
+ if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
+ priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
+
+ DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
+
+ if (of_property_read_u32(node, "max-width", &priv->max_width)) {
+ if (priv->rev == 1)
+ priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1;
+ else
+ priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2;
+ }
+
+ DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
+
+ if (of_property_read_u32(node, "max-pixelclock",
+&priv->max_pixelclock))
+ priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
+
+ DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
+
ret = tilcdc_crtc_create(ddev);
if (ret < 0) {
dev_err(dev, "failed to create crtc\n");
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
index 18815e75ca4f..d29806ca8817 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
@@ -28,8 +28,10 @@ struct drm_plane;
/* Defaulting to pixel cl
[PATCH v3 1/2] drm/tilcdc: Do not keep vblank interrupts enabled all the time
END_OF_FRAME interrupts have been enabled all the time since the
beginning of this driver. It is about time to add this feature.
Signed-off-by: Jyri Sarha
Reviewed-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index cf4ead0dc2e3..0fd3dafe6404 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -147,12 +147,9 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev)
tilcdc_set(dev, LCDC_RASTER_CTRL_REG,
LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA |
LCDC_V1_UNDERFLOW_INT_ENA);
- tilcdc_set(dev, LCDC_DMA_CTRL_REG,
- LCDC_V1_END_OF_FRAME_INT_ENA);
} else {
tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG,
LCDC_V2_UNDERFLOW_INT_ENA |
- LCDC_V2_END_OF_FRAME0_INT_ENA |
LCDC_FRAME_DONE | LCDC_SYNC_LOST);
}
}
@@ -678,11 +675,44 @@ static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc,
static int tilcdc_crtc_enable_vblank(struct drm_crtc *crtc)
{
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct tilcdc_drm_private *priv = dev->dev_private;
+ unsigned long flags;
+
+ spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+
+ tilcdc_clear_irqstatus(dev, LCDC_END_OF_FRAME0);
+
+ if (priv->rev == 1)
+ tilcdc_set(dev, LCDC_DMA_CTRL_REG,
+ LCDC_V1_END_OF_FRAME_INT_ENA);
+ else
+ tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG,
+ LCDC_V2_END_OF_FRAME0_INT_ENA);
+
+ spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
+
return 0;
}
static void tilcdc_crtc_disable_vblank(struct drm_crtc *crtc)
{
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct tilcdc_drm_private *priv = dev->dev_private;
+ unsigned long flags;
+
+ spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+
+ if (priv->rev == 1)
+ tilcdc_clear(dev, LCDC_DMA_CTRL_REG,
+LCDC_V1_END_OF_FRAME_INT_ENA);
+ else
+ tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
+LCDC_V2_END_OF_FRAME0_INT_ENA);
+
+ spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
}
static void tilcdc_crtc_reset(struct drm_crtc *crtc)
--
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[PATCH] ARM: davinci_all_defconfig: Add CONFIG_DRM_DISPLAY_CONNECTOR=m
Current dumb-vga-dac driver requires CONFIG_DRM_DISPLAY_CONNECTOR for it to work. Signed-off-by: Jyri Sarha --- An alternative would be selecting CONFIG_DRM_DISPLAY_CONNECTOR from all bridges requiring DRM connector. arch/arm/configs/davinci_all_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig index e849367c0566..28471757c129 100644 --- a/arch/arm/configs/davinci_all_defconfig +++ b/arch/arm/configs/davinci_all_defconfig @@ -160,6 +160,7 @@ CONFIG_DRM=m CONFIG_DRM_TILCDC=m CONFIG_DRM_SIMPLE_BRIDGE=m CONFIG_DRM_TINYDRM=m +CONFIG_DRM_DISPLAY_CONNECTOR=m CONFIG_TINYDRM_ST7586=m CONFIG_FB=y CONFIG_FIRMWARE_EDID=y -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 0/2] drm/tilcdc: Couple of minor feature improvements
Since first version. - "drm/tilcdc: Do not keep vblank interrupts enabled all the time" - Add reviewed-by tags - "drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data" - Put TILCDC_DEFAULT_MAX_WIDTH_V1 before *_V2 and The vblank interrupts have been always on when the display is on for a very long time, so I decided that it is about time to fix it. Then the following patch is just a cleanup. BR, Jyri Jyri Sarha (2): drm/tilcdc: Do not keep vblank interrupts enabled all the time drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 52 ++-- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 38 +++- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 7 ++-- 3 files changed, 59 insertions(+), 38 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 2/2] drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data
We already have a private data member for maximum display width so
let's use it and get rid of the redundant tilcdc_crtc_max_width().
The LCDC version probing is moved to before reading the device tree
properties so that the version information is available when private
data maximum width is initialized, if "max-width" property is not
found.
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 16 +---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 38 +++-
drivers/gpu/drm/tilcdc/tilcdc_drv.h | 7 ++---
3 files changed, 26 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 29f263e1975a..27ea529d74b8 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -754,20 +754,6 @@ static const struct drm_crtc_funcs tilcdc_crtc_funcs = {
.disable_vblank = tilcdc_crtc_disable_vblank,
};
-int tilcdc_crtc_max_width(struct drm_crtc *crtc)
-{
- struct drm_device *dev = crtc->dev;
- struct tilcdc_drm_private *priv = dev->dev_private;
- int max_width = 0;
-
- if (priv->rev == 1)
- max_width = 1024;
- else if (priv->rev == 2)
- max_width = 2048;
-
- return max_width;
-}
-
static enum drm_mode_status
tilcdc_crtc_mode_valid(struct drm_crtc *crtc,
const struct drm_display_mode *mode)
@@ -780,7 +766,7 @@ tilcdc_crtc_mode_valid(struct drm_crtc *crtc,
* check to see if the width is within the range that
* the LCD Controller physically supports
*/
- if (mode->hdisplay > tilcdc_crtc_max_width(crtc))
+ if (mode->hdisplay > priv->max_width)
return MODE_VIRTUAL_X;
/* width must be multiple of 16 */
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 4f5fc3e87383..866b33b40eff 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -105,7 +105,7 @@ static void modeset_init(struct drm_device *dev)
dev->mode_config.min_width = 0;
dev->mode_config.min_height = 0;
- dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
+ dev->mode_config.max_width = priv->max_width;
dev->mode_config.max_height = 2048;
dev->mode_config.funcs = &mode_config_funcs;
}
@@ -218,22 +218,6 @@ static int tilcdc_init(struct drm_driver *ddrv, struct
device *dev)
goto init_failed;
}
- if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
- priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
-
- DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
-
- if (of_property_read_u32(node, "max-width", &priv->max_width))
- priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
-
- DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
-
- if (of_property_read_u32(node, "max-pixelclock",
- &priv->max_pixelclock))
- priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
-
- DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
-
pm_runtime_enable(dev);
/* Determine LCD IP Version */
@@ -287,6 +271,26 @@ static int tilcdc_init(struct drm_driver *ddrv, struct
device *dev)
}
}
+ if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
+ priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
+
+ DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
+
+ if (of_property_read_u32(node, "max-width", &priv->max_width)) {
+ if (priv->rev == 1)
+ priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1;
+ else
+ priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2;
+ }
+
+ DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
+
+ if (of_property_read_u32(node, "max-pixelclock",
+ &priv->max_pixelclock))
+ priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
+
+ DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
+
ret = tilcdc_crtc_create(ddev);
if (ret < 0) {
dev_err(dev, "failed to create crtc\n");
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
index 18815e75ca4f..d29806ca8817 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
@@ -28,8 +28,10 @@ struct drm_plane;
/* Defaulting to pixel clock defined o
[PATCH v2 1/2] drm/tilcdc: Do not keep vblank interrupts enabled all the time
END_OF_FRAME interrupts have been enabled all the time since the
beginning of this driver. It is about time to add this feature.
Signed-off-by: Jyri Sarha
Reviewed-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 1856962411c7..29f263e1975a 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -147,12 +147,9 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev)
tilcdc_set(dev, LCDC_RASTER_CTRL_REG,
LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA |
LCDC_V1_UNDERFLOW_INT_ENA);
- tilcdc_set(dev, LCDC_DMA_CTRL_REG,
- LCDC_V1_END_OF_FRAME_INT_ENA);
} else {
tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG,
LCDC_V2_UNDERFLOW_INT_ENA |
- LCDC_V2_END_OF_FRAME0_INT_ENA |
LCDC_FRAME_DONE | LCDC_SYNC_LOST);
}
}
@@ -678,11 +675,44 @@ static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc,
static int tilcdc_crtc_enable_vblank(struct drm_crtc *crtc)
{
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct tilcdc_drm_private *priv = dev->dev_private;
+ unsigned long flags;
+
+ spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+
+ tilcdc_clear_irqstatus(dev, LCDC_END_OF_FRAME0);
+
+ if (priv->rev == 1)
+ tilcdc_set(dev, LCDC_DMA_CTRL_REG,
+ LCDC_V1_END_OF_FRAME_INT_ENA);
+ else
+ tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG,
+ LCDC_V2_END_OF_FRAME0_INT_ENA);
+
+ spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
+
return 0;
}
static void tilcdc_crtc_disable_vblank(struct drm_crtc *crtc)
{
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct tilcdc_drm_private *priv = dev->dev_private;
+ unsigned long flags;
+
+ spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+
+ if (priv->rev == 1)
+ tilcdc_clear(dev, LCDC_DMA_CTRL_REG,
+LCDC_V1_END_OF_FRAME_INT_ENA);
+ else
+ tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
+LCDC_V2_END_OF_FRAME0_INT_ENA);
+
+ spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
}
static void tilcdc_crtc_reset(struct drm_crtc *crtc)
--
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[PATCH 0/2] drm/tilcdc: Couple of minor feature improvements
The vblank interrupts have been always on when the display is on for a very long time, so I decided that it is about time to fix it. Then the following patch is just a cleanup. BR, Jyri Jyri Sarha (2): drm/tilcdc: Do not keep vblank interrupts enabled all the time drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 52 ++-- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 38 +++- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 7 ++-- 3 files changed, 59 insertions(+), 38 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 2/2] drm/tilcdc: Remove tilcdc_crtc_max_width(), use private data
We already have a private data member for maximum display width so
let's use it and get rid of the redundant tilcdc_crtc_max_width().
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 16 +---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 38 +++-
drivers/gpu/drm/tilcdc/tilcdc_drv.h | 7 ++---
3 files changed, 26 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 29f263e1975a..27ea529d74b8 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -754,20 +754,6 @@ static const struct drm_crtc_funcs tilcdc_crtc_funcs = {
.disable_vblank = tilcdc_crtc_disable_vblank,
};
-int tilcdc_crtc_max_width(struct drm_crtc *crtc)
-{
- struct drm_device *dev = crtc->dev;
- struct tilcdc_drm_private *priv = dev->dev_private;
- int max_width = 0;
-
- if (priv->rev == 1)
- max_width = 1024;
- else if (priv->rev == 2)
- max_width = 2048;
-
- return max_width;
-}
-
static enum drm_mode_status
tilcdc_crtc_mode_valid(struct drm_crtc *crtc,
const struct drm_display_mode *mode)
@@ -780,7 +766,7 @@ tilcdc_crtc_mode_valid(struct drm_crtc *crtc,
* check to see if the width is within the range that
* the LCD Controller physically supports
*/
- if (mode->hdisplay > tilcdc_crtc_max_width(crtc))
+ if (mode->hdisplay > priv->max_width)
return MODE_VIRTUAL_X;
/* width must be multiple of 16 */
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 4f5fc3e87383..866b33b40eff 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -105,7 +105,7 @@ static void modeset_init(struct drm_device *dev)
dev->mode_config.min_width = 0;
dev->mode_config.min_height = 0;
- dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
+ dev->mode_config.max_width = priv->max_width;
dev->mode_config.max_height = 2048;
dev->mode_config.funcs = &mode_config_funcs;
}
@@ -218,22 +218,6 @@ static int tilcdc_init(struct drm_driver *ddrv, struct
device *dev)
goto init_failed;
}
- if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
- priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
-
- DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
-
- if (of_property_read_u32(node, "max-width", &priv->max_width))
- priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
-
- DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
-
- if (of_property_read_u32(node, "max-pixelclock",
- &priv->max_pixelclock))
- priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
-
- DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
-
pm_runtime_enable(dev);
/* Determine LCD IP Version */
@@ -287,6 +271,26 @@ static int tilcdc_init(struct drm_driver *ddrv, struct
device *dev)
}
}
+ if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
+ priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
+
+ DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
+
+ if (of_property_read_u32(node, "max-width", &priv->max_width)) {
+ if (priv->rev == 1)
+ priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1;
+ else
+ priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2;
+ }
+
+ DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
+
+ if (of_property_read_u32(node, "max-pixelclock",
+ &priv->max_pixelclock))
+ priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
+
+ DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
+
ret = tilcdc_crtc_create(ddev);
if (ret < 0) {
dev_err(dev, "failed to create crtc\n");
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
index 18815e75ca4f..76adf87fec4e 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
@@ -28,8 +28,10 @@ struct drm_plane;
/* Defaulting to pixel clock defined on AM335x */
#define TILCDC_DEFAULT_MAX_PIXELCLOCK 126000
-/* Defaulting to max width as defined on AM335x */
-#define TILCDC_DEFAULT_MAX_WIDTH 2048
+/* Maximum width as defined on AM335x */
+#define TILCDC_DEFAULT_MAX_WIDTH_V2 2048
[PATCH 1/2] drm/tilcdc: Do not keep vblank interrupts enabled all the time
END_OF_FRAME interrupts have been enabled all the time since the
beginning of this driver. It is about time to add this feature.
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 1856962411c7..29f263e1975a 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -147,12 +147,9 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev)
tilcdc_set(dev, LCDC_RASTER_CTRL_REG,
LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA |
LCDC_V1_UNDERFLOW_INT_ENA);
- tilcdc_set(dev, LCDC_DMA_CTRL_REG,
- LCDC_V1_END_OF_FRAME_INT_ENA);
} else {
tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG,
LCDC_V2_UNDERFLOW_INT_ENA |
- LCDC_V2_END_OF_FRAME0_INT_ENA |
LCDC_FRAME_DONE | LCDC_SYNC_LOST);
}
}
@@ -678,11 +675,44 @@ static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc,
static int tilcdc_crtc_enable_vblank(struct drm_crtc *crtc)
{
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct tilcdc_drm_private *priv = dev->dev_private;
+ unsigned long flags;
+
+ spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+
+ tilcdc_clear_irqstatus(dev, LCDC_END_OF_FRAME0);
+
+ if (priv->rev == 1)
+ tilcdc_set(dev, LCDC_DMA_CTRL_REG,
+ LCDC_V1_END_OF_FRAME_INT_ENA);
+ else
+ tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG,
+ LCDC_V2_END_OF_FRAME0_INT_ENA);
+
+ spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
+
return 0;
}
static void tilcdc_crtc_disable_vblank(struct drm_crtc *crtc)
{
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct tilcdc_drm_private *priv = dev->dev_private;
+ unsigned long flags;
+
+ spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
+
+ if (priv->rev == 1)
+ tilcdc_clear(dev, LCDC_DMA_CTRL_REG,
+LCDC_V1_END_OF_FRAME_INT_ENA);
+ else
+ tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
+LCDC_V2_END_OF_FRAME0_INT_ENA);
+
+ spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
}
static void tilcdc_crtc_reset(struct drm_crtc *crtc)
--
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Re: [PATCH] drm/tidss: implement WA for AM65xx erratum i2000
On 12/08/2020 14:26, Tomi Valkeinen wrote:
> This patch implements WA for AM65xx erratum i2000, which causes YUV
> formats to show wrong colors.
>
> An earlier patch removed a partial WA:
>
> a8d9d7da1546349f18eb2d6b6b3a04bdeb38719d ("drm/tidss: remove AM65x PG1 YUV
> erratum code")
>
> The patch explains the reasoning for removal. The change in plans has
> been that it has become clear that there are and will be users for PG1
> SoCs and as such it's good to implement the WA for PG1s.
>
> This patch adds the WA back so that it is only used on SR1.0 (which is
> the new name for PG1). The previous WA code didn't check the SoC
> revision, which this patch does.
>
> Signed-off-by: Tomi Valkeinen
Reviewed-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_dispc.c | 32 +
> drivers/gpu/drm/tidss/tidss_dispc.h | 4
> 2 files changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
> b/drivers/gpu/drm/tidss/tidss_dispc.c
> index 629dd06393f6..a3e8caf319bb 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
> @@ -19,6 +19,7 @@
> #include
> #include
> #include
> +#include
>
> #include
> #include
> @@ -302,6 +303,8 @@ struct dispc_device {
> u32 num_fourccs;
>
> u32 memory_bandwidth_limit;
> +
> + struct dispc_errata errata;
> };
>
> static void dispc_write(struct dispc_device *dispc, u16 reg, u32 val)
> @@ -2641,6 +2644,19 @@ static int dispc_init_am65x_oldi_io_ctrl(struct device
> *dev,
> return 0;
> }
>
> +static void dispc_init_errata(struct dispc_device *dispc)
> +{
> + static const struct soc_device_attribute am65x_sr10_soc_devices[] = {
> + { .family = "AM65X", .revision = "SR1.0" },
> + { /* sentinel */ }
> + };
> +
> + if (soc_device_match(am65x_sr10_soc_devices)) {
> + dispc->errata.i2000 = true;
> + dev_info(dispc->dev, "WA for erratum i2000: YUV formats
> disabled\n");
> + }
> +}
> +
> int dispc_init(struct tidss_device *tidss)
> {
> struct device *dev = tidss->dev;
> @@ -2664,19 +2680,27 @@ int dispc_init(struct tidss_device *tidss)
> if (!dispc)
> return -ENOMEM;
>
> + dispc->tidss = tidss;
> + dispc->dev = dev;
> + dispc->feat = feat;
> +
> + dispc_init_errata(dispc);
> +
> dispc->fourccs = devm_kcalloc(dev, ARRAY_SIZE(dispc_color_formats),
> sizeof(*dispc->fourccs), GFP_KERNEL);
> if (!dispc->fourccs)
> return -ENOMEM;
>
> num_fourccs = 0;
> - for (i = 0; i < ARRAY_SIZE(dispc_color_formats); ++i)
> + for (i = 0; i < ARRAY_SIZE(dispc_color_formats); ++i) {
> + if (dispc->errata.i2000 &&
> + dispc_fourcc_is_yuv(dispc_color_formats[i].fourcc)) {
> + continue;
> + }
> dispc->fourccs[num_fourccs++] = dispc_color_formats[i].fourcc;
> + }
>
> dispc->num_fourccs = num_fourccs;
> - dispc->tidss = tidss;
> - dispc->dev = dev;
> - dispc->feat = feat;
>
> dispc_common_regmap = dispc->feat->common_regs;
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h
> b/drivers/gpu/drm/tidss/tidss_dispc.h
> index 902e612ff7ac..353972fe658a 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.h
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.h
> @@ -46,6 +46,10 @@ struct dispc_features_scaling {
> u32 xinc_max;
> };
>
> +struct dispc_errata {
> + bool i2000; /* DSS Does Not Support YUV Pixel Data Formats */
> +};
> +
> enum dispc_vp_bus_type {
> DISPC_VP_DPI, /* DPI output */
> DISPC_VP_OLDI, /* OLDI (LVDS) output */
>
--
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Re: [PATCH] drm/tidss: Replace HTTP links with HTTPS ones
On 13/07/2020 15:39, Alexander A. Klimov wrote: > Rationale: > Reduces attack surface on kernel devs opening the links for MITM > as HTTPS traffic is much harder to manipulate. > > Deterministic algorithm: > For each file: > If not .svg: > For each line: > If doesn't contain `\bxmlns\b`: > For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: > If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: > If both the HTTP and HTTPS versions > return 200 OK and serve the same content: > Replace HTTP with HTTPS. > > Signed-off-by: Alexander A. Klimov > --- > Continuing my work started at 93431e0607e5. > See also: git log --oneline '--author=Alexander A. Klimov > ' v5.7..master > (Actually letting a shell for loop submit all this stuff for me.) > > If there are any URLs to be removed completely or at least not just > HTTPSified: > Just clearly say so and I'll *undo my change*. > See also: https://lkml.org/lkml/2020/6/27/64 > > If there are any valid, but yet not changed URLs: > See: https://lkml.org/lkml/2020/6/26/837 > > If you apply the patch, please let me know. > > Sorry again to all maintainers who complained about subject lines. > Now I realized that you want an actually perfect prefixes, > not just subsystem ones. > I tried my best... > And yes, *I could* (at least half-)automate it. > Impossible is nothing! :) > Acked-by: Jyri Sarha > > drivers/gpu/drm/tidss/tidss_crtc.c| 2 +- > drivers/gpu/drm/tidss/tidss_crtc.h| 2 +- > drivers/gpu/drm/tidss/tidss_dispc.c | 2 +- > drivers/gpu/drm/tidss/tidss_dispc.h | 2 +- > drivers/gpu/drm/tidss/tidss_dispc_regs.h | 2 +- > drivers/gpu/drm/tidss/tidss_drv.c | 2 +- > drivers/gpu/drm/tidss/tidss_drv.h | 2 +- > drivers/gpu/drm/tidss/tidss_encoder.c | 2 +- > drivers/gpu/drm/tidss/tidss_encoder.h | 2 +- > drivers/gpu/drm/tidss/tidss_irq.c | 2 +- > drivers/gpu/drm/tidss/tidss_irq.h | 2 +- > drivers/gpu/drm/tidss/tidss_kms.c | 2 +- > drivers/gpu/drm/tidss/tidss_kms.h | 2 +- > drivers/gpu/drm/tidss/tidss_plane.c | 2 +- > drivers/gpu/drm/tidss/tidss_plane.h | 2 +- > drivers/gpu/drm/tidss/tidss_scale_coefs.c | 2 +- > drivers/gpu/drm/tidss/tidss_scale_coefs.h | 2 +- > 17 files changed, 17 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c > b/drivers/gpu/drm/tidss/tidss_crtc.c > index 89a226912de8..a591c70b8386 100644 > --- a/drivers/gpu/drm/tidss/tidss_crtc.c > +++ b/drivers/gpu/drm/tidss/tidss_crtc.c > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ > + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Tomi Valkeinen > */ > > diff --git a/drivers/gpu/drm/tidss/tidss_crtc.h > b/drivers/gpu/drm/tidss/tidss_crtc.h > index 09e773666228..040d1205496b 100644 > --- a/drivers/gpu/drm/tidss/tidss_crtc.h > +++ b/drivers/gpu/drm/tidss/tidss_crtc.h > @@ -1,6 +1,6 @@ > /* SPDX-License-Identifier: GPL-2.0 */ > /* > - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ > + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Tomi Valkeinen > */ > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c > b/drivers/gpu/drm/tidss/tidss_dispc.c > index 629dd06393f6..e7d28ec8f7f3 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.c > +++ b/drivers/gpu/drm/tidss/tidss_dispc.c > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > - * Copyright (C) 2016-2018 Texas Instruments Incorporated - > http://www.ti.com/ > + * Copyright (C) 2016-2018 Texas Instruments Incorporated - > https://www.ti.com/ > * Author: Jyri Sarha > */ > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h > b/drivers/gpu/drm/tidss/tidss_dispc.h > index 902e612ff7ac..5984e0de2cd9 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.h > +++ b/drivers/gpu/drm/tidss/tidss_dispc.h > @@ -1,6 +1,6 @@ > /* SPDX-License-Identifier: GPL-2.0 */ > /* > - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ > + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > * Author: Tomi Valkeinen > */ > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc_regs.h > b/drivers/gpu/drm/tidss/tidss_dispc_regs.h > index 88a83a41b6e3..13feedfe5d6d 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc_regs.h > +++ b/drivers/gpu/drm/tidss/tidss_dispc_regs.h > @@ -1,6 +1,6 @@ > /* SPDX-License-Identifier
Re: [PATCH] drm/tilcdc: Use standard drm_atomic_helper_commit
Thank you Daniel,
Now this works perfectly, all while I was on vacation.
On 08/07/2020 17:20, Daniel Vetter wrote:
> Gives us proper nonblocking support for free, and a pile of other
> things. The tilcdc code is simply old enough that it was never
> converted over, but was stuck forever with the copypasta from when it
> was initially merged.
>
> The riskiest thing with this conversion is maybe that there's an issue
> with the vblank handling or vblank event handling, which will upset
> the modern commit support in atomic helpers. But from a cursory review
> drm_crtc_vblank_on/off is called in the right places, and the event
> handling also seems to exist (albeit with much hand-rolling and
> probably some races, could perhaps be converted over to
> drm_crtc_arm_vblank_event without any real loss).
>
> Motivated by me not having to hand-roll the dma-fence annotations for
> this.
>
> v2: Clear out crtc_state->event when we're handling the event, to
> avoid upsetting the helpers (reported by Jyri).
>
> v3: Also send out even whent the crtc is getting disabled. Tilcdc looks a
> bit like conversion to simple display helpers would work out really
> nice.
>
Probably. Should take a closer looks some day when I have time.
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
Tested-by: Jyri Sarha
Reviewed-by: Jyri Sarha
> --
> From logs looks like we're not stuck when disabling the display, so I
> hacked in a bit of code for that too. Like mentioned above, tilcdc
> looks like a perfect candidate for simple display helpers, I think
> that would simplify a _lot_ of code here.
> -Daniel
> ---
> drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 13
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 47 +--
> drivers/gpu/drm/tilcdc/tilcdc_plane.c | 8 +++--
> 3 files changed, 19 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> index e9dd5e5cb4e7..1856962411c7 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> @@ -537,6 +537,18 @@ static void tilcdc_crtc_atomic_disable(struct drm_crtc
> *crtc,
> tilcdc_crtc_disable(crtc);
> }
>
> +static void tilcdc_crtc_atomic_flush(struct drm_crtc *crtc,
> + struct drm_crtc_state *old_state)
> +{
> + if (!crtc->state->event)
> + return;
> +
> + spin_lock_irq(&crtc->dev->event_lock);
> + drm_crtc_send_vblank_event(crtc, crtc->state->event);
> + crtc->state->event = NULL;
> + spin_unlock_irq(&crtc->dev->event_lock);
> +}
> +
> void tilcdc_crtc_shutdown(struct drm_crtc *crtc)
> {
> tilcdc_crtc_off(crtc, true);
> @@ -822,6 +834,7 @@ static const struct drm_crtc_helper_funcs
> tilcdc_crtc_helper_funcs = {
> .atomic_check = tilcdc_crtc_atomic_check,
> .atomic_enable = tilcdc_crtc_atomic_enable,
> .atomic_disable = tilcdc_crtc_atomic_disable,
> + .atomic_flush = tilcdc_crtc_atomic_flush,
> };
>
> void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 0d74a6443263..4f5fc3e87383 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -87,55 +87,10 @@ static int tilcdc_atomic_check(struct drm_device *dev,
> return ret;
> }
>
> -static int tilcdc_commit(struct drm_device *dev,
> - struct drm_atomic_state *state,
> - bool async)
> -{
> - int ret;
> -
> - ret = drm_atomic_helper_prepare_planes(dev, state);
> - if (ret)
> - return ret;
> -
> - ret = drm_atomic_helper_swap_state(state, true);
> - if (ret) {
> - drm_atomic_helper_cleanup_planes(dev, state);
> - return ret;
> - }
> -
> - /*
> - * Everything below can be run asynchronously without the need to grab
> - * any modeset locks at all under one condition: It must be guaranteed
> - * that the asynchronous work has either been cancelled (if the driver
> - * supports it, which at least requires that the framebuffers get
> - * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
> - * before the new state gets committed on the software side with
> - * drm_atomic_helper_swap_state().
> - *
> - * This scheme allows new atomic state updates to be prepared and
> - * checked in parallel to the asynchronous completion of the previous
> - * update. Which is important since compositors nee
Re: [PATCH] drm/tilcdc: Use standard drm_atomic_helper_commit
On 08/07/2020 12:44, Daniel Vetter wrote:
> Gives us proper nonblocking support for free, and a pile of other
> things. The tilcdc code is simply old enough that it was never
> converted over, but was stuck forever with the copypasta from when it
> was initially merged.
>
> The riskiest thing with this conversion is maybe that there's an issue
> with the vblank handling or vblank event handling, which will upset
> the modern commit support in atomic helpers. But from a cursory review
> drm_crtc_vblank_on/off is called in the right places, and the event
> handling also seems to exist (albeit with much hand-rolling and
> probably some races, could perhaps be converted over to
> drm_crtc_arm_vblank_event without any real loss).
>
> Motivated by me not having to hand-roll the dma-fence annotations for
> this.
>
> v2: Clear out crtc_state->event when we're handling the event, to
> avoid upsetting the helpers (reported by Jyri).
>
Reverted the old and applied this new. It works a bit better as the
fbconsole comes up without any warnings, but after that it is almost as
bad. The kmstest is able to make the commit but it does not finish and
nothing comes visible on the screen until couple of "flip_done timed outs".
A new kernel log is attached.
Best regards,
Jyri
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
> --
> I'm not really sure whether the event handling is correct for when a
> crtc gets disabled. dpms off or similar would be a good test, assuming
> this patch here fixes the first issue.
> -Daniel
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 47 +--
> drivers/gpu/drm/tilcdc/tilcdc_plane.c | 8 +++--
> 2 files changed, 6 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 0d74a6443263..4f5fc3e87383 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -87,55 +87,10 @@ static int tilcdc_atomic_check(struct drm_device *dev,
> return ret;
> }
>
> -static int tilcdc_commit(struct drm_device *dev,
> - struct drm_atomic_state *state,
> - bool async)
> -{
> - int ret;
> -
> - ret = drm_atomic_helper_prepare_planes(dev, state);
> - if (ret)
> - return ret;
> -
> - ret = drm_atomic_helper_swap_state(state, true);
> - if (ret) {
> - drm_atomic_helper_cleanup_planes(dev, state);
> - return ret;
> - }
> -
> - /*
> - * Everything below can be run asynchronously without the need to grab
> - * any modeset locks at all under one condition: It must be guaranteed
> - * that the asynchronous work has either been cancelled (if the driver
> - * supports it, which at least requires that the framebuffers get
> - * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
> - * before the new state gets committed on the software side with
> - * drm_atomic_helper_swap_state().
> - *
> - * This scheme allows new atomic state updates to be prepared and
> - * checked in parallel to the asynchronous completion of the previous
> - * update. Which is important since compositors need to figure out the
> - * composition of the next frame right after having submitted the
> - * current layout.
> - */
> -
> - drm_atomic_helper_commit_modeset_disables(dev, state);
> -
> - drm_atomic_helper_commit_planes(dev, state, 0);
> -
> - drm_atomic_helper_commit_modeset_enables(dev, state);
> -
> - drm_atomic_helper_wait_for_vblanks(dev, state);
> -
> - drm_atomic_helper_cleanup_planes(dev, state);
> -
> - return 0;
> -}
> -
> static const struct drm_mode_config_funcs mode_config_funcs = {
> .fb_create = drm_gem_fb_create,
> .atomic_check = tilcdc_atomic_check,
> - .atomic_commit = tilcdc_commit,
> + .atomic_commit = drm_atomic_helper_commit,
> };
>
> static void modeset_init(struct drm_device *dev)
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> index 0d09b31ae759..2f681a713815 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> @@ -83,9 +83,11 @@ static void tilcdc_plane_atomic_update(struct drm_plane
> *plane,
> if (WARN_ON(!state->fb || !state->crtc->state))
> return;
>
> - tilcdc_crtc_update_fb(state->crtc,
> - state->fb,
> - state->crtc->state->event);
> + if (tilcdc_crtc_update_fb(state
Re: [PATCH 15/25] drm/tilcdc: Use standard drm_atomic_helper_commit
On 07/07/2020 23:12, Daniel Vetter wrote:
> Gives us proper nonblocking support for free, and a pile of other
> things. The tilcdc code is simply old enough that it was never
> converted over, but was stuck forever with the copypasta from when it
> was initially merged.
>
> The riskiest thing with this conversion is maybe that there's an issue
> with the vblank handling or vblank event handling, which will upset
> the modern commit support in atomic helpers. But from a cursory review
> drm_crtc_vblank_on/off is called in the right places, and the event
> handling also seems to exist (albeit with much hand-rolling and
> probably some races, could perhaps be converted over to
> drm_crtc_arm_vblank_event without any real loss).
>
> Motivated by me not having to hand-roll the dma-fence annotations for
> this.
>
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
I tried this out, but it is not working. Something breaks in the event
handling and event reference counting. Unfortunately my vacation is
pressing on, and I am not sure if I have time to debug the issue further
before that.
Anyway, I have attached the boot log with the following WARN dumps:
[ 12.203874] WARNING: CPU: 0 PID: 208 at
drivers/gpu/drm/drm_atomic_helper.c:2329
drm_atomic_helper_commit_hw_done+0x144/0x168 [drm_kms_helper]
[ 12.217682] WARNING: CPU: 0 PID: 208 at
drivers/gpu/drm/drm_atomic_helper.c:2329
drm_atomic_helper_commit_hw_done+0x144/0x168 [drm_kms_helper]
[ 232.156231] WARNING: CPU: 0 PID: 1315 at
drivers/gpu/drm/drm_atomic_helper.c:2329
drm_atomic_helper_commit_hw_done+0x144/0x168 [drm_kms_helper]
[ 232.472068] WARNING: CPU: 0 PID: 1315 at lib/refcount.c:28
__drm_atomic_helper_plane_destroy_state+0xd0/0xe0 [drm_kms_helper]
[ 240.611129] WARNING: CPU: 0 PID: 1317 at
drivers/gpu/drm/drm_atomic_helper.c:2329
drm_atomic_helper_commit_hw_done+0x144/0x168 [drm_kms_helper]
The first two came at boot time when setting up the fbconsole, the ones
after that came when I tried to use kmstest[1]. The fbconsole came up,
but nothing after that works.
I am back from vacation in the beginning of august, so there may be some
time before I can debug this further.
Best regards,
Jyri
[1] https://github.com/tomba/kmsxx
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 47 +
> 1 file changed, 1 insertion(+), 46 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 0d74a6443263..4f5fc3e87383 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -87,55 +87,10 @@ static int tilcdc_atomic_check(struct drm_device *dev,
> return ret;
> }
>
> -static int tilcdc_commit(struct drm_device *dev,
> - struct drm_atomic_state *state,
> - bool async)
> -{
> - int ret;
> -
> - ret = drm_atomic_helper_prepare_planes(dev, state);
> - if (ret)
> - return ret;
> -
> - ret = drm_atomic_helper_swap_state(state, true);
> - if (ret) {
> - drm_atomic_helper_cleanup_planes(dev, state);
> - return ret;
> - }
> -
> - /*
> - * Everything below can be run asynchronously without the need to grab
> - * any modeset locks at all under one condition: It must be guaranteed
> - * that the asynchronous work has either been cancelled (if the driver
> - * supports it, which at least requires that the framebuffers get
> - * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
> - * before the new state gets committed on the software side with
> - * drm_atomic_helper_swap_state().
> - *
> - * This scheme allows new atomic state updates to be prepared and
> - * checked in parallel to the asynchronous completion of the previous
> - * update. Which is important since compositors need to figure out the
> - * composition of the next frame right after having submitted the
> - * current layout.
> - */
> -
> - drm_atomic_helper_commit_modeset_disables(dev, state);
> -
> - drm_atomic_helper_commit_planes(dev, state, 0);
> -
> - drm_atomic_helper_commit_modeset_enables(dev, state);
> -
> - drm_atomic_helper_wait_for_vblanks(dev, state);
> -
> - drm_atomic_helper_cleanup_planes(dev, state);
> -
> - return 0;
> -}
> -
> static const struct drm_mode_config_funcs mode_config_funcs = {
> .fb_create = drm_gem_fb_create,
> .atomic_check = tilcdc_atomic_check,
> - .atomic_commit = tilcdc_commit,
> + .atomic_commit = drm_atomic_helper_commit,
Re: [PATCH 14/25] drm/tidss: Annotate dma-fence critical section in commit path
On 07/07/2020 23:12, Daniel Vetter wrote:
> Ends right after hw_done(), totally standard case.
>
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
Acked-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_kms.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_kms.c
> b/drivers/gpu/drm/tidss/tidss_kms.c
> index b6e61d6cf60f..556bc801b77c 100644
> --- a/drivers/gpu/drm/tidss/tidss_kms.c
> +++ b/drivers/gpu/drm/tidss/tidss_kms.c
> @@ -4,6 +4,8 @@
> * Author: Tomi Valkeinen
> */
>
> +#include
> +
> #include
> #include
> #include
> @@ -26,6 +28,7 @@ static void tidss_atomic_commit_tail(struct
> drm_atomic_state *old_state)
> {
> struct drm_device *ddev = old_state->dev;
> struct tidss_device *tidss = to_tidss(ddev);
> + bool fence_cookie = dma_fence_begin_signalling();
>
> dev_dbg(ddev->dev, "%s\n", __func__);
>
> @@ -36,6 +39,7 @@ static void tidss_atomic_commit_tail(struct
> drm_atomic_state *old_state)
> drm_atomic_helper_commit_modeset_enables(ddev, old_state);
>
> drm_atomic_helper_commit_hw_done(old_state);
> + dma_fence_end_signalling(fence_cookie);
> drm_atomic_helper_wait_for_flip_done(ddev, old_state);
>
> drm_atomic_helper_cleanup_planes(ddev, old_state);
>
--
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Re: [PATCH v1 1/7] drm/tidss: drop use of legacy drm_bus_flags
On 30/06/2020 21:05, Sam Ravnborg wrote: > Use the more descriptive _DRIVE_ variants thus avoiding the > legacy drm_bus_flags values. > > Signed-off-by: Sam Ravnborg > Cc: Laurent Pinchart > Cc: Jyri Sarha > Cc: Tomi Valkeinen Acked-by: Jyri Sarha > --- > drivers/gpu/drm/tidss/tidss_dispc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c > b/drivers/gpu/drm/tidss/tidss_dispc.c > index 629dd06393f6..772a497e8c57 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.c > +++ b/drivers/gpu/drm/tidss/tidss_dispc.c > @@ -997,12 +997,12 @@ void dispc_vp_enable(struct dispc_device *dispc, u32 > hw_videoport, > > ieo = !!(tstate->bus_flags & DRM_BUS_FLAG_DE_LOW); > > - ipc = !!(tstate->bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE); > + ipc = !!(tstate->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE); > > /* always use the 'rf' setting */ > onoff = true; > > - rf = !!(tstate->bus_flags & DRM_BUS_FLAG_SYNC_POSEDGE); > + rf = !!(tstate->bus_flags & DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE); > > /* always use aligned syncs */ > align = true; > -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v3 37/43] drm/tilcdc: Use GEM CMA object functions
On 05/06/2020 10:32, Thomas Zimmermann wrote:
> Create GEM objects with drm_gem_cma_create_object_default_funcs(), which
> allocates the object and sets CMA's default object functions. Corresponding
> callbacks in struct drm_driver are cleared. No functional changes are made.
>
> Driver and object-function instances use the same callback functions, with
> the exception of vunmap. The implementation of vunmap is empty and left out
> in CMA's default object functions.
>
> v3:
> * convert to DRIVER_OPS macro in a separate patch
>
> Signed-off-by: Thomas Zimmermann
> Acked-by: Emil Velikov
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index a5e9ee4c7fbf4..a6582325651bd 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -496,17 +496,12 @@ DEFINE_DRM_GEM_CMA_FOPS(fops);
> static struct drm_driver tilcdc_driver = {
> .driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
> .irq_handler= tilcdc_irq,
> - .gem_free_object_unlocked = drm_gem_cma_free_object,
> - .gem_print_info = drm_gem_cma_print_info,
> - .gem_vm_ops = &drm_gem_cma_vm_ops,
> + .gem_create_object = drm_gem_cma_create_object_default_funcs,
> .dumb_create= drm_gem_cma_dumb_create,
>
> .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
> .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
> - .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
> .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
> - .gem_prime_vmap = drm_gem_cma_prime_vmap,
> - .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
> .gem_prime_mmap = drm_gem_cma_prime_mmap,
> #ifdef CONFIG_DEBUG_FS
> .debugfs_init = tilcdc_debugfs_init,
>
--
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Re: [PATCH v3 38/43] drm/tilcdc: Set GEM CMA functions with DRM_GEM_CMA_DRIVER_OPS
On 05/06/2020 10:32, Thomas Zimmermann wrote:
> DRM_GEM_CMA_DRIVER_OPS sets the functions in struct drm_driver
> to their defaults. No functional changes are made.
>
> Signed-off-by: Thomas Zimmermann
> Acked-by: Emil Velikov
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 8 +---
> 1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index a6582325651bd..0d74a64432633 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -496,13 +496,7 @@ DEFINE_DRM_GEM_CMA_FOPS(fops);
> static struct drm_driver tilcdc_driver = {
> .driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
> .irq_handler= tilcdc_irq,
> - .gem_create_object = drm_gem_cma_create_object_default_funcs,
> - .dumb_create= drm_gem_cma_dumb_create,
> -
> - .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
> - .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
> - .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
> - .gem_prime_mmap = drm_gem_cma_prime_mmap,
> + DRM_GEM_CMA_DRIVER_OPS,
> #ifdef CONFIG_DEBUG_FS
> .debugfs_init = tilcdc_debugfs_init,
> #endif
>
--
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Re: [PATCH] drm/tidss: fix modeset init for DPI panels
On 04/06/2020 11:02, Tomi Valkeinen wrote:
> The connector type for DISPC's DPI videoport was set the LVDS instead of
> DPI. This causes any DPI panel setup to fail with tidss, making all DPI
> panels unusable.
>
> Fix this by using correct connector type.
>
> Signed-off-by: Tomi Valkeinen
> Fixes: 32a1795f57eecc39749017 ("drm/tidss: New driver for TI Keystone
> platform Display SubSystem")
> Cc: sta...@vger.kernel.org # v5.7+
Reviewed-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_kms.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_kms.c
> b/drivers/gpu/drm/tidss/tidss_kms.c
> index 7d419960b030..74467f6eafee 100644
> --- a/drivers/gpu/drm/tidss/tidss_kms.c
> +++ b/drivers/gpu/drm/tidss/tidss_kms.c
> @@ -154,7 +154,7 @@ static int tidss_dispc_modeset_init(struct tidss_device
> *tidss)
> break;
> case DISPC_VP_DPI:
> enc_type = DRM_MODE_ENCODER_DPI;
> - conn_type = DRM_MODE_CONNECTOR_LVDS;
> + conn_type = DRM_MODE_CONNECTOR_DPI;
> break;
> default:
> WARN_ON(1);
>
--
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Re: [PATCH 2/3] drm/tilcdc: remove unnecessary state->fb check
On 29/04/2020 13:42, Tomi Valkeinen wrote:
> tilcdc_plane_atomic_check() exits if state->fb == NULL, so no need to
> check it again later.
>
> Signed-off-by: Tomi Valkeinen
Reviewed-by: Jyri Sarha
> ---
> drivers/gpu/drm/tilcdc/tilcdc_plane.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> index e2090020b3a0..0d09b31ae759 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
> @@ -62,8 +62,7 @@ static int tilcdc_plane_atomic_check(struct drm_plane
> *plane,
> return -EINVAL;
> }
>
> - if (state->fb && old_state->fb &&
> - state->fb->format != old_state->fb->format) {
> + if (old_state->fb && state->fb->format != old_state->fb->format) {
> dev_dbg(plane->dev->dev,
> "%s(): pixel format change requires mode_change\n",
> __func__);
>
--
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Re: [PATCH 3/3] drm/tilcdc: add missing static for panel_driver
On 29/04/2020 13:42, Tomi Valkeinen wrote:
> struct platform_driver panel_driver is only used from tilcdc_panel.c, so
> it can be static.
>
> Signed-off-by: Tomi Valkeinen
Reviewed-by: Jyri Sarha
> ---
> drivers/gpu/drm/tilcdc/tilcdc_panel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> index f66e2f2a1a35..cdc93a81b552 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> @@ -404,7 +404,7 @@ static const struct of_device_id panel_of_match[] = {
> { },
> };
>
> -struct platform_driver panel_driver = {
> +static struct platform_driver panel_driver = {
> .probe = panel_probe,
> .remove = panel_remove,
> .driver = {
>
--
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Re: [PATCH 1/3] drm/tilcdc: fix leak & null ref in panel_connector_get_modes
On 29/04/2020 13:42, Tomi Valkeinen wrote:
> If videomode_from_timings() returns true, the mode allocated with
> drm_mode_create will be leaked.
>
> Also, the return value of drm_mode_create() is never checked, and thus
> could cause NULL deref.
>
> Fix these two issues.
>
> Signed-off-by: Tomi Valkeinen
Reviewed-by: Jyri Sarha
> ---
> drivers/gpu/drm/tilcdc/tilcdc_panel.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> index 5584e656b857..f66e2f2a1a35 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> @@ -143,12 +143,16 @@ static int panel_connector_get_modes(struct
> drm_connector *connector)
> int i;
>
> for (i = 0; i < timings->num_timings; i++) {
> - struct drm_display_mode *mode = drm_mode_create(dev);
> + struct drm_display_mode *mode;
> struct videomode vm;
>
> if (videomode_from_timings(timings, &vm, i))
> break;
>
> + mode = drm_mode_create(dev);
> + if (!mode)
> + break;
> +
> drm_display_mode_from_videomode(&vm, mode);
>
> mode->type = DRM_MODE_TYPE_DRIVER;
>
--
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Re: [PATCH] drm/tidss: remove AM65x PG1 YUV erratum code
On 29/04/2020 15:10, Tomi Valkeinen wrote:
> AM65x PG1 has a HW issue with YUV pixel formats, resulting in wrong
> colors on the screen. This issue is fixed in PG2 hardware.
>
> The driver currently has code to hide YUV pixel formats from the
> userspace. To support PG2, we would need to add code to detect the SoC
> version and hide the YUV formats based on that.
>
> However, as PG1 will be phased out and PG2 will be the main platform, a
> much simpler solution is just to drop the code in question. The downside
> is that the users will be able to use YUV formats on PG1, getting wrong
> colors on the screen. On the other hand, that may also be a plus, as the
> same applications will now work on PG1 and PG2, even if the colors are
> wrong on PG1.
>
> Signed-off-by: Tomi Valkeinen
One minor nitpick bellow, but otherwise:
Reviewed-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_dispc.c | 11 ++-
> drivers/gpu/drm/tidss/tidss_dispc.h | 5 -
> 2 files changed, 2 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
> b/drivers/gpu/drm/tidss/tidss_dispc.c
> index 29f42768e294..629dd06393f6 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
> @@ -181,10 +181,6 @@ const struct dispc_features dispc_am65x_feats = {
> .vid_name = { "vid", "vidl1" },
> .vid_lite = { false, true, },
> .vid_order = { 1, 0 },
> -
> - .errata = {
> - .i2000 = true,
> - },
> };
>
> static const u16 tidss_j721e_common_regs[DISPC_COMMON_REG_TABLE_LEN] = {
> @@ -2674,12 +2670,9 @@ int dispc_init(struct tidss_device *tidss)
> return -ENOMEM;
>
> num_fourccs = 0;
> - for (i = 0; i < ARRAY_SIZE(dispc_color_formats); ++i) {
> - if (feat->errata.i2000 &&
> - dispc_fourcc_is_yuv(dispc_color_formats[i].fourcc))
> - continue;
> + for (i = 0; i < ARRAY_SIZE(dispc_color_formats); ++i)
> dispc->fourccs[num_fourccs++] = dispc_color_formats[i].fourcc;
> - }
> +
> dispc->num_fourccs = num_fourccs;
> dispc->tidss = tidss;
> dispc->dev = dev;
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h
> b/drivers/gpu/drm/tidss/tidss_dispc.h
> index a4a68249e44b..1228b166b255 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.h
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.h
> @@ -46,10 +46,6 @@ struct dispc_features_scaling {
> u32 xinc_max;
> };
>
> -struct dispc_errata {
> - bool i2000; /* DSS Does Not Support YUV Pixel Data Formats */
> -};
> -
> enum dispc_vp_bus_type {
> DISPC_VP_DPI, /* DPI output */
> DISPC_VP_OLDI, /* OLDI (LVDS) output */
> @@ -84,7 +80,6 @@ struct dispc_features {
> bool vid_lite[TIDSS_MAX_PLANES];
> u32 vid_order[TIDSS_MAX_PLANES];
>
Shouldn't we remove the above empty line too?
> - struct dispc_errata errata;
> };
>
> extern const struct dispc_features dispc_k2g_feats;
>
--
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Re: [PATCH 27/44] drm/tidss: Use devm_drm_dev_alloc
On 03/04/2020 16:58, Daniel Vetter wrote:
> Already using devm_drm_dev_init, so very simple replacment.
>
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
Tested-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_drv.c | 15 ---
> 1 file changed, 4 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_drv.c
> b/drivers/gpu/drm/tidss/tidss_drv.c
> index ad449d104306..7d4465d58be8 100644
> --- a/drivers/gpu/drm/tidss/tidss_drv.c
> +++ b/drivers/gpu/drm/tidss/tidss_drv.c
> @@ -135,20 +135,13 @@ static int tidss_probe(struct platform_device *pdev)
>
> dev_dbg(dev, "%s\n", __func__);
>
> - /* Can't use devm_* since drm_device's lifetime may exceed dev's */
> - tidss = kzalloc(sizeof(*tidss), GFP_KERNEL);
> - if (!tidss)
> - return -ENOMEM;
> + tidss = devm_drm_dev_alloc(&pdev->dev, &tidss_driver,
> +struct tidss_device, ddev);
> + if (IS_ERR(tidss))
> + return PTR_ERR(tidss);
>
> ddev = &tidss->ddev;
>
> - ret = devm_drm_dev_init(&pdev->dev, ddev, &tidss_driver);
> - if (ret) {
> - kfree(ddev);
> - return ret;
> - }
> - drmm_add_final_kfree(ddev, tidss);
> -
> tidss->dev = dev;
> tidss->feat = of_device_get_match_data(dev);
>
>
--
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Re: [PATCH 29/44] drm/tidss: Delete tidss->saved_state
On 03/04/2020 16:58, Daniel Vetter wrote:
> Not used anymore since the switch to suspend/resume helpers.
>
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
Tested-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_drv.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_drv.h
> b/drivers/gpu/drm/tidss/tidss_drv.h
> index b23cd95c8d78..3b0a3d87b7c4 100644
> --- a/drivers/gpu/drm/tidss/tidss_drv.h
> +++ b/drivers/gpu/drm/tidss/tidss_drv.h
> @@ -29,8 +29,6 @@ struct tidss_device {
>
> spinlock_t wait_lock; /* protects the irq masks */
> dispc_irq_t irq_mask; /* enabled irqs in addition to wait_list */
> -
> - struct drm_atomic_state *saved_state;
> };
>
> #define to_tidss(__dev) container_of(__dev, struct tidss_device, ddev)
>
--
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Re: [PATCH 28/44] drm/tidss: Don't use drm_device->dev_private
On 03/04/2020 16:58, Daniel Vetter wrote:
> Upcasting using a container_of macro is more typesafe, faster and
> easier for the compiler to optimize.
>
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
Tested-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_crtc.c | 16
> drivers/gpu/drm/tidss/tidss_drv.c | 2 --
> drivers/gpu/drm/tidss/tidss_drv.h | 2 ++
> drivers/gpu/drm/tidss/tidss_irq.c | 12 ++--
> drivers/gpu/drm/tidss/tidss_kms.c | 2 +-
> drivers/gpu/drm/tidss/tidss_plane.c | 6 +++---
> 6 files changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
> b/drivers/gpu/drm/tidss/tidss_crtc.c
> index d4ce9bab8c7e..2396262c09e4 100644
> --- a/drivers/gpu/drm/tidss/tidss_crtc.c
> +++ b/drivers/gpu/drm/tidss/tidss_crtc.c
> @@ -24,7 +24,7 @@
> static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc)
> {
> struct drm_device *ddev = tcrtc->crtc.dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
> struct drm_pending_vblank_event *event;
> unsigned long flags;
> bool busy;
> @@ -88,7 +88,7 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
> struct drm_crtc_state *state)
> {
> struct drm_device *ddev = crtc->dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
> struct dispc_device *dispc = tidss->dispc;
> struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
> u32 hw_videoport = tcrtc->hw_videoport;
> @@ -165,7 +165,7 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
> {
> struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
> struct drm_device *ddev = crtc->dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
> unsigned long flags;
>
> dev_dbg(ddev->dev,
> @@ -216,7 +216,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc
> *crtc,
> {
> struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
> struct drm_device *ddev = crtc->dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
> const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
> unsigned long flags;
> int r;
> @@ -259,7 +259,7 @@ static void tidss_crtc_atomic_disable(struct drm_crtc
> *crtc,
> {
> struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
> struct drm_device *ddev = crtc->dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
> unsigned long flags;
>
> dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);
> @@ -295,7 +295,7 @@ enum drm_mode_status tidss_crtc_mode_valid(struct
> drm_crtc *crtc,
> {
> struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
> struct drm_device *ddev = crtc->dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
>
> return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode);
> }
> @@ -314,7 +314,7 @@ static const struct drm_crtc_helper_funcs
> tidss_crtc_helper_funcs = {
> static int tidss_crtc_enable_vblank(struct drm_crtc *crtc)
> {
> struct drm_device *ddev = crtc->dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
>
> dev_dbg(ddev->dev, "%s\n", __func__);
>
> @@ -328,7 +328,7 @@ static int tidss_crtc_enable_vblank(struct drm_crtc *crtc)
> static void tidss_crtc_disable_vblank(struct drm_crtc *crtc)
> {
> struct drm_device *ddev = crtc->dev;
> - struct tidss_device *tidss = ddev->dev_private;
> + struct tidss_device *tidss = to_tidss(ddev);
>
> dev_dbg(ddev->dev, "%s\n", __func__);
>
> diff --git a/drivers/gpu/drm/tidss/tidss_drv.c
> b/drivers/gpu/drm/tidss/tidss_drv.c
> index 7d4465d58be8..99edc66ebdef 100644
> --- a/drivers/gpu/drm/tidss/tidss_drv.c
> +++ b/drivers/gpu/drm/tidss/tidss_drv.c
> @@ -147,8 +147,6 @@ static int tidss_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, tidss);
>
> - ddev->dev_private = tidss;
> -
> ret = dispc_init(tidss);
> if (ret) {
> dev_err(dev, "failed to initialize dispc: %d\n", ret);
> diff --git a/drivers/gpu/drm/tidss/tidss_drv.h
> b/drivers/gpu/drm/ti
Re: [PATCH 07/10] drm/tilcdc: Set up fbdev after fully registering device
On 06/04/2020 16:44, Thomas Zimmermann wrote: > Generic fbdev support is a DRM client. Set it up after fully registering > the new DRM device. > > Signed-off-by: Thomas Zimmermann Acked-by: Jyri Sarha However, this change hardly makes any difference, as the only place where "is_registere"'s value is checked is in tilcdc_fini() which is also called to cleanup the resources if tilcdc_init() fails. Best regards, Jyri > --- > drivers/gpu/drm/tilcdc/tilcdc_drv.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c > b/drivers/gpu/drm/tilcdc/tilcdc_drv.c > index 78c1877d13a83..a5e9ee4c7fbf4 100644 > --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c > +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c > @@ -390,10 +390,9 @@ static int tilcdc_init(struct drm_driver *ddrv, struct > device *dev) > ret = drm_dev_register(ddev, 0); > if (ret) > goto init_failed; > + priv->is_registered = true; > > drm_fbdev_generic_setup(ddev, bpp); > - > - priv->is_registered = true; > return 0; > > init_failed: > -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 10/12] docs: dt: display/ti: fix typos at the devicetree/ directory name
On 17/03/2020 15:10, Mauro Carvalho Chehab wrote: > The name of the devicetree directory is wrong on those three > TI bindings: > > Signed-off-by: Mauro Carvalho Chehab Acked-by: Jyri Sarha > --- > Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml | 2 +- > Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml | 2 +- > Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > index cac61a998203..c6598d2e3fa3 100644 > --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > @@ -65,7 +65,7 @@ properties: >ports: > type: object > description: > - Ports as described in Documentation/devictree/bindings/graph.txt > + Ports as described in Documentation/devicetree/bindings/graph.txt > properties: >"#address-cells": > const: 1 > diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml > b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml > index ade9b2f513f5..9e19293c0dbc 100644 > --- a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml > +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml > @@ -98,7 +98,7 @@ properties: >ports: > type: object > description: > - Ports as described in Documentation/devictree/bindings/graph.txt > + Ports as described in Documentation/devicetree/bindings/graph.txt > properties: >"#address-cells": > const: 1 > diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml > b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml > index 385bd060ccf9..698f439d839c 100644 > --- a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml > +++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml > @@ -56,7 +56,7 @@ properties: >port: > type: object > description: > - Port as described in Documentation/devictree/bindings/graph.txt. > + Port as described in Documentation/devicetree/bindings/graph.txt. >The DSS DPI output port node > >max-memory-bandwidth: > -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2] dt-bindings: display: ti: Fix dtc unit-address warnings in examples
On 13/03/2020 20:07, Rob Herring wrote:
> Extra dtc warnings (roughly what W=1 enables) are now enabled by default
> when building the binding examples. These were fixed treewide in
> 5.6-rc5, but some new display bindings have been added with new
> warnings:
>
> Documentation/devicetree/bindings/display/ti/ti,am65x-dss.example.dts:21.27-49.11:
> Warning (unit_address_format): /example-0/dss@04a0: unit name should not
> have leading 0s
> Documentation/devicetree/bindings/display/ti/ti,j721e-dss.example.dts:21.27-72.11:
> Warning (unit_address_format): /example-0/dss@04a0: unit name should not
> have leading 0s
> Documentation/devicetree/bindings/display/ti/ti,k2g-dss.example.dts:20.27-42.11:
> Warning (unit_address_format): /example-0/dss@0254: unit name should not
> have leading 0s
>
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
> Signed-off-by: Rob Herring
Acked-by: Jyri Sarha
> ---
> v2:
> - Drop panel fixes as there's another patch fixing the 3 panels plus
>others.
> ---
> Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml | 2 +-
> Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml | 2 +-
> Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> index cac61a998203..aa5543a64526 100644
> --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> @@ -121,7 +121,7 @@ examples:
> #include
> #include
>
> -dss: dss@04a0 {
> +dss: dss@4a0 {
> compatible = "ti,am65x-dss";
> reg = <0x0 0x04a0 0x0 0x1000>, /* common */
> <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
> diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
> b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
> index ade9b2f513f5..6d47cd7206c2 100644
> --- a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
> +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
> @@ -154,7 +154,7 @@ examples:
> #include
> #include
>
> -dss: dss@04a0 {
> +dss: dss@4a0 {
> compatible = "ti,j721e-dss";
> reg = <0x00 0x04a0 0x00 0x1>, /* common_m */
> <0x00 0x04a1 0x00 0x1>, /* common_s0*/
> diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
> b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
> index 385bd060ccf9..7cb37053e95b 100644
> --- a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
> +++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
> @@ -81,7 +81,7 @@ examples:
> #include
> #include
>
> -dss: dss@0254 {
> +dss: dss@254 {
> compatible = "ti,k2g-dss";
> reg = <0x0254 0x400>,
> <0x0255 0x1000>,
>
--
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Re: [PATCH 17/22] drm/tilcdc: Use simple encoder
On 05/03/2020 17:59, Thomas Zimmermann wrote:
> The tilcdc driver uses empty implementations for its encoders. Replace
> the code with the generic simple encoder.
>
> Signed-off-by: Thomas Zimmermann
Acked-by: Jyri Sarha
> ---
> drivers/gpu/drm/tilcdc/tilcdc_external.c | 10 +++---
> drivers/gpu/drm/tilcdc/tilcdc_panel.c| 8 ++--
> 2 files changed, 5 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c
> b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> index 28b7f703236e..b177525588c1 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> @@ -10,6 +10,7 @@
> #include
> #include
> #include
> +#include
>
> #include "tilcdc_drv.h"
> #include "tilcdc_external.h"
> @@ -83,10 +84,6 @@ int tilcdc_add_component_encoder(struct drm_device *ddev)
> return 0;
> }
>
> -static const struct drm_encoder_funcs tilcdc_external_encoder_funcs = {
> - .destroy= drm_encoder_cleanup,
> -};
> -
> static
> int tilcdc_attach_bridge(struct drm_device *ddev, struct drm_bridge *bridge)
> {
> @@ -131,9 +128,8 @@ int tilcdc_attach_external_device(struct drm_device *ddev)
> if (!priv->external_encoder)
> return -ENOMEM;
>
> - ret = drm_encoder_init(ddev, priv->external_encoder,
> -&tilcdc_external_encoder_funcs,
> -DRM_MODE_ENCODER_NONE, NULL);
> + ret = drm_simple_encoder_init(ddev, priv->external_encoder,
> + DRM_MODE_ENCODER_NONE);
> if (ret) {
> dev_err(ddev->dev, "drm_encoder_init() failed %d\n", ret);
> return ret;
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> index 5584e656b857..12823d60c4e8 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
> @@ -16,6 +16,7 @@
> #include
> #include
> #include
> +#include
>
> #include "tilcdc_drv.h"
> #include "tilcdc_panel.h"
> @@ -74,10 +75,6 @@ static void panel_encoder_mode_set(struct drm_encoder
> *encoder,
> /* nothing needed */
> }
>
> -static const struct drm_encoder_funcs panel_encoder_funcs = {
> - .destroy= drm_encoder_cleanup,
> -};
> -
> static const struct drm_encoder_helper_funcs panel_encoder_helper_funcs = {
> .dpms = panel_encoder_dpms,
> .prepare= panel_encoder_prepare,
> @@ -102,8 +99,7 @@ static struct drm_encoder *panel_encoder_create(struct
> drm_device *dev,
> encoder = &panel_encoder->base;
> encoder->possible_crtcs = 1;
>
> - ret = drm_encoder_init(dev, encoder, &panel_encoder_funcs,
> - DRM_MODE_ENCODER_LVDS, NULL);
> + ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
> if (ret < 0)
> goto fail;
>
>
--
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Re: [PATCH 16/22] drm/tidss: Use simple encoder
On 05/03/2020 17:59, Thomas Zimmermann wrote:
> The tidss driver uses an empty implementation for its encoder. Replace
> the code with the generic simple encoder.
>
> Signed-off-by: Thomas Zimmermann
Acked-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_encoder.c | 10 +++---
> 1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_encoder.c
> b/drivers/gpu/drm/tidss/tidss_encoder.c
> index 83785b0a66a9..4c0558286f5e 100644
> --- a/drivers/gpu/drm/tidss/tidss_encoder.c
> +++ b/drivers/gpu/drm/tidss/tidss_encoder.c
> @@ -8,8 +8,9 @@
>
> #include
> #include
> -#include
> #include
> +#include
> +#include
>
> #include "tidss_crtc.h"
> #include "tidss_drv.h"
> @@ -59,10 +60,6 @@ static const struct drm_encoder_helper_funcs
> encoder_helper_funcs = {
> .atomic_check = tidss_encoder_atomic_check,
> };
>
> -static const struct drm_encoder_funcs encoder_funcs = {
> - .destroy = drm_encoder_cleanup,
> -};
> -
> struct drm_encoder *tidss_encoder_create(struct tidss_device *tidss,
>u32 encoder_type, u32 possible_crtcs)
> {
> @@ -75,8 +72,7 @@ struct drm_encoder *tidss_encoder_create(struct
> tidss_device *tidss,
>
> enc->possible_crtcs = possible_crtcs;
>
> - ret = drm_encoder_init(&tidss->ddev, enc, &encoder_funcs,
> -encoder_type, NULL);
> + ret = drm_simple_encoder_init(&tidss->ddev, enc, encoder_type);
> if (ret < 0)
> return ERR_PTR(ret);
>
>
--
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Re: [PATCH 17/21] drm/tilcdc: remove check for return value of debugfs functions.
On 27/02/2020 14:02, Wambui Karuga wrote:
> Since 987d65d01356 (drm: debugfs: make
> drm_debugfs_create_files() never fail), drm_debugfs_create_files() never
> fails. Therefore, remove the check and error handling of the return
> value of drm_debugfs_create_files() as it is not needed in
> tilcdc_debugfs_init().
>
> Also remove local variables that are not used after the changes, and
> declare tilcdc_debugfs_init() as void.
>
> Signed-off-by: Wambui Karuga
Ok, so this is a part of a bigger series.
Acked-by: Jyri Sarha
I assume the series will be merged as one without my involvement. Please
let me know if that is not the case.
BR,
Jyri
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 17 -
> 1 file changed, 4 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 0791a0200cc3..78c1877d13a8 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -478,26 +478,17 @@ static struct drm_info_list tilcdc_debugfs_list[] = {
> { "mm", tilcdc_mm_show, 0 },
> };
>
> -static int tilcdc_debugfs_init(struct drm_minor *minor)
> +static void tilcdc_debugfs_init(struct drm_minor *minor)
> {
> - struct drm_device *dev = minor->dev;
> struct tilcdc_module *mod;
> - int ret;
>
> - ret = drm_debugfs_create_files(tilcdc_debugfs_list,
> - ARRAY_SIZE(tilcdc_debugfs_list),
> - minor->debugfs_root, minor);
> + drm_debugfs_create_files(tilcdc_debugfs_list,
> + ARRAY_SIZE(tilcdc_debugfs_list),
> + minor->debugfs_root, minor);
>
> list_for_each_entry(mod, &module_list, list)
> if (mod->funcs->debugfs_init)
> mod->funcs->debugfs_init(mod, minor);
> -
> - if (ret) {
> - dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
> - return ret;
> - }
> -
> - return ret;
> }
> #endif
>
>
--
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[PATCH v6] drm/tidss: dispc: Fix broken plane positioning code
The old implementation of placing planes on the CRTC while configuring
the planes was naive and relied on the order in which the planes were
configured, enabled, and disabled. The situation where a plane's zpos
was changed on the fly was completely broken. The usual symptoms of
this problem was scrambled display and a flood of sync lost errors,
when a plane was active in two layers at the same time, or a missing
plane, in case when a layer was accidentally disabled.
The rewrite takes a more straight forward approach when HW is
concerned. The plane positioning registers are in the CRTC (or
actually OVR) register space and it is more natural to configure them
in a one go when configuring the CRTC. To do this we need make sure we
have all the planes on the updated CRTCs in the new atomic state. The
untouched planes on CRTCs that need plane position update are added to
the atomic state in tidss_atomic_check().
Signed-off-by: Jyri Sarha
Reviewed-by: Tomi Valkeinen
---
One more round for this:
- if(!opstate->crtc || opstate->crtc_x != npstate->crtc_x ||
+ if (!opstate->crtc || opstate->crtc_x != npstate->crtc_x ||
The change is so minor that I kept the Reviewed-by from Tomi.
drivers/gpu/drm/tidss/tidss_crtc.c | 55 +
drivers/gpu/drm/tidss/tidss_crtc.h | 2 ++
drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++--
drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++
drivers/gpu/drm/tidss/tidss_kms.c | 52 ++-
5 files changed, 133 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
b/drivers/gpu/drm/tidss/tidss_crtc.c
index 032c31ee2820..d4ce9bab8c7e 100644
--- a/drivers/gpu/drm/tidss/tidss_crtc.c
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c
@@ -17,6 +17,7 @@
#include "tidss_dispc.h"
#include "tidss_drv.h"
#include "tidss_irq.h"
+#include "tidss_plane.h"
/* Page flip and frame done IRQs */
@@ -111,6 +112,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
return dispc_vp_bus_check(dispc, hw_videoport, state);
}
+/*
+ * This needs all affected planes to be present in the atomic
+ * state. The untouched planes are added to the state in
+ * tidss_atomic_check().
+ */
+static void tidss_crtc_position_planes(struct tidss_device *tidss,
+ struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state,
+ bool newmodeset)
+{
+ struct drm_atomic_state *ostate = old_state->state;
+ struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
+ struct drm_crtc_state *cstate = crtc->state;
+ int layer;
+
+ if (!newmodeset && !cstate->zpos_changed &&
+ !to_tidss_crtc_state(cstate)->plane_pos_changed)
+ return;
+
+ for (layer = 0; layer < tidss->feat->num_planes; layer++) {
+ struct drm_plane_state *pstate;
+ struct drm_plane *plane;
+ bool layer_active = false;
+ int i;
+
+ for_each_new_plane_in_state(ostate, plane, pstate, i) {
+ if (pstate->crtc != crtc || !pstate->visible)
+ continue;
+
+ if (pstate->normalized_zpos == layer) {
+ layer_active = true;
+ break;
+ }
+ }
+
+ if (layer_active) {
+ struct tidss_plane *tplane = to_tidss_plane(plane);
+
+ dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
+ tcrtc->hw_videoport,
+ pstate->crtc_x, pstate->crtc_y,
+ layer);
+ }
+ dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer,
+ layer_active);
+ }
+}
+
static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state)
{
@@ -146,6 +195,9 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
/* Write vp properties to HW if needed. */
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
+ /* Update plane positions if needed. */
+ tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
+
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
spin_lock_irqsave(&ddev->event_lock, flags);
@@ -183,6 +235,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
return;
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);
+ tidss_crtc_position_planes(tidss, crtc, old_stat
Re: [PATCH] drm/tilcdc: remove check for return value of debugfs functions.
On 18/02/2020 17:55, Wambui Karuga wrote:
> Remove the check and error handling of the return value of
> drm_debugfs_create_files as it is not needed in tilcdc_debugfs_init.
> Also remove local variables that are not used after the changes.
>
> Signed-off-by: Wambui Karuga
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
I'll merge this to drm-misc-next tomorrow.
Thank you for the patch,
Jyri
> ---
> drivers/gpu/drm/tilcdc/tilcdc_drv.c | 15 ---
> 1 file changed, 4 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> index 0791a0200cc3..3f7071eb9c78 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
> @@ -480,24 +480,17 @@ static struct drm_info_list tilcdc_debugfs_list[] = {
>
> static int tilcdc_debugfs_init(struct drm_minor *minor)
> {
> - struct drm_device *dev = minor->dev;
> struct tilcdc_module *mod;
> - int ret;
>
> - ret = drm_debugfs_create_files(tilcdc_debugfs_list,
> - ARRAY_SIZE(tilcdc_debugfs_list),
> - minor->debugfs_root, minor);
> + drm_debugfs_create_files(tilcdc_debugfs_list,
> + ARRAY_SIZE(tilcdc_debugfs_list),
> + minor->debugfs_root, minor);
>
> list_for_each_entry(mod, &module_list, list)
> if (mod->funcs->debugfs_init)
> mod->funcs->debugfs_init(mod, minor);
>
> - if (ret) {
> - dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
> - return ret;
> - }
> -
> - return ret;
> + return 0;
> }
> #endif
>
>
--
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[PATCH] drm/tidss: Add prepare_fb to the plane helper funcs
From: Gowtham Tammana
drm_gem_fb_prepare_fb() extracts fence and attaches to plane state.
The fence info is needed if implicit fencing is used. Add this as
prepare_fb function pointer to plane helper funcs.
Signed-off-by: Gowtham Tammana
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tidss/tidss_plane.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/tidss/tidss_plane.c
b/drivers/gpu/drm/tidss/tidss_plane.c
index ff99b2dd4a17..345678faaeb6 100644
--- a/drivers/gpu/drm/tidss/tidss_plane.c
+++ b/drivers/gpu/drm/tidss/tidss_plane.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include "tidss_crtc.h"
#include "tidss_dispc.h"
@@ -142,6 +143,7 @@ static void tidss_plane_atomic_disable(struct drm_plane
*plane,
}
static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
+ .prepare_fb = drm_gem_fb_prepare_fb,
.atomic_check = tidss_plane_atomic_check,
.atomic_update = tidss_plane_atomic_update,
.atomic_disable = tidss_plane_atomic_disable,
--
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Re: [PATCH -next] drm/tidss: Drop pointless static qualifier in dispc_find_csc()
On 27/02/2020 08:50, YueHaibing wrote:
> There is no need to have the 'const struct dispc_csc_coef *coef'
> variable static since new value always be assigned before use it.
>
> Signed-off-by: YueHaibing
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
I'll merge this to drm-misc-next tomorrow.
Thank you for the patch,
Jyri
> ---
> drivers/gpu/drm/tidss/tidss_dispc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
> b/drivers/gpu/drm/tidss/tidss_dispc.c
> index eeb160dc047b..e6cb176484a9 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
> @@ -1510,7 +1510,7 @@ struct dispc_csc_coef *dispc_find_csc(enum
> drm_color_encoding encoding,
> static void dispc_vid_csc_setup(struct dispc_device *dispc, u32 hw_plane,
> const struct drm_plane_state *state)
> {
> - static const struct dispc_csc_coef *coef;
> + const struct dispc_csc_coef *coef;
>
> coef = dispc_find_csc(state->color_encoding, state->color_range);
> if (!coef) {
>
>
>
>
>
--
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Re: [PATCH][next][V2] drm/tidss: fix spelling mistakes "bufer" and "requsted"
On 24/02/2020 19:42, Colin King wrote:
> From: Colin Ian King
>
> There are two spelling mistakes in warning and debug messages.
> Fix them.
>
> Signed-off-by: Colin Ian King
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
I'll merge this to drm-misc-next tomorrow.
Thank you for the patch,
Jyri
> ---
>
> V2: Add spelling mistake fix for "requsted"
>
> ---
> drivers/gpu/drm/tidss/tidss_dispc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
> b/drivers/gpu/drm/tidss/tidss_dispc.c
> index eeb160dc047b..b3dc83d2f668 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
> @@ -1235,7 +1235,7 @@ int dispc_vp_set_clk_rate(struct dispc_device *dispc,
> u32 hw_videoport,
>
> if (dispc_pclk_diff(rate, new_rate) > 5)
> dev_warn(dispc->dev,
> - "vp%d: Clock rate %lu differs over 5%% from requsted
> %lu\n",
> + "vp%d: Clock rate %lu differs over 5%% from requested
> %lu\n",
>hw_videoport, new_rate, rate);
>
> dev_dbg(dispc->dev, "vp%d: new rate %lu Hz (requested %lu Hz)\n",
> @@ -1699,7 +1699,7 @@ static int dispc_vid_calc_scaling(struct dispc_device
> *dispc,
>
> if (sp->xinc > f->xinc_max) {
> dev_dbg(dispc->dev,
> - "%s: Too wide input bufer %u > %u\n", __func__,
> + "%s: Too wide input buffer %u > %u\n", __func__,
> state->src_w >> 16, in_width_max * f->xinc_max);
> return -EINVAL;
> }
>
--
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Re: [PATCH] drm/tidss: Use drm_for_each_bridge_in_chain()
On 22/02/2020 13:07, Laurent Pinchart wrote:
> Replace the manual encoder->bridge_chain walk with the
> drm_for_each_bridge_in_chain() macro. Drivers should not touch the
> bridge_chain field directly.
>
> Signed-off-by: Laurent Pinchart
Reviewed-by: Jyri Sarha
Tested-by: Jyri Sarha
I'll merge this to drm-misc-next tomorrow.
Thank you for the patch,
Jyri
> ---
> drivers/gpu/drm/tidss/tidss_encoder.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_encoder.c
> b/drivers/gpu/drm/tidss/tidss_encoder.c
> index f7fe3a43ead0..83785b0a66a9 100644
> --- a/drivers/gpu/drm/tidss/tidss_encoder.c
> +++ b/drivers/gpu/drm/tidss/tidss_encoder.c
> @@ -32,7 +32,7 @@ static int tidss_encoder_atomic_check(struct drm_encoder
> *encoder,
>* bridge timings, or from the connector's display_info if no
>* bridge defines the timings.
>*/
> - list_for_each_entry(bridge, &encoder->bridge_chain, chain_node) {
> + drm_for_each_bridge_in_chain(encoder, bridge) {
> if (!bridge->timings)
> continue;
>
>
--
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[PATCH v5] drm/tidss: dispc: Fix broken plane positioning code
The old implementation of placing planes on the CRTC while configuring
the planes was naive and relied on the order in which the planes were
configured, enabled, and disabled. The situation where a plane's zpos
was changed on the fly was completely broken. The usual symptoms of
this problem was scrambled display and a flood of sync lost errors,
when a plane was active in two layers at the same time, or a missing
plane, in case when a layer was accidentally disabled.
The rewrite takes a more straight forward approach when HW is
concerned. The plane positioning registers are in the CRTC (or
actually OVR) register space and it is more natural to configure them
in a one go when configuring the CRTC. To do this we need make sure we
have all the planes on the updated CRTCs in the new atomic state. The
untouched planes on CRTCs that need plane position update are added to
the atomic state in tidss_atomic_check().
Signed-off-by: Jyri Sarha
---
The subject line has changed. The earlier versions of the patch can be
found here:
https://lists.freedesktop.org/archives/dri-devel/2020-February/254238.html
https://lists.freedesktop.org/archives/dri-devel/2020-February/254744.html
https://lists.freedesktop.org/archives/dri-devel/2020-February/254792.html
https://lists.freedesktop.org/archives/dri-devel/2020-February/254666.html
drivers/gpu/drm/tidss/tidss_crtc.c | 55 +
drivers/gpu/drm/tidss/tidss_crtc.h | 2 ++
drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++--
drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++
drivers/gpu/drm/tidss/tidss_kms.c | 52 ++-
5 files changed, 133 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
b/drivers/gpu/drm/tidss/tidss_crtc.c
index 032c31ee2820..d4ce9bab8c7e 100644
--- a/drivers/gpu/drm/tidss/tidss_crtc.c
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c
@@ -17,6 +17,7 @@
#include "tidss_dispc.h"
#include "tidss_drv.h"
#include "tidss_irq.h"
+#include "tidss_plane.h"
/* Page flip and frame done IRQs */
@@ -111,6 +112,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
return dispc_vp_bus_check(dispc, hw_videoport, state);
}
+/*
+ * This needs all affected planes to be present in the atomic
+ * state. The untouched planes are added to the state in
+ * tidss_atomic_check().
+ */
+static void tidss_crtc_position_planes(struct tidss_device *tidss,
+ struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state,
+ bool newmodeset)
+{
+ struct drm_atomic_state *ostate = old_state->state;
+ struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
+ struct drm_crtc_state *cstate = crtc->state;
+ int layer;
+
+ if (!newmodeset && !cstate->zpos_changed &&
+ !to_tidss_crtc_state(cstate)->plane_pos_changed)
+ return;
+
+ for (layer = 0; layer < tidss->feat->num_planes; layer++) {
+ struct drm_plane_state *pstate;
+ struct drm_plane *plane;
+ bool layer_active = false;
+ int i;
+
+ for_each_new_plane_in_state(ostate, plane, pstate, i) {
+ if (pstate->crtc != crtc || !pstate->visible)
+ continue;
+
+ if (pstate->normalized_zpos == layer) {
+ layer_active = true;
+ break;
+ }
+ }
+
+ if (layer_active) {
+ struct tidss_plane *tplane = to_tidss_plane(plane);
+
+ dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
+ tcrtc->hw_videoport,
+ pstate->crtc_x, pstate->crtc_y,
+ layer);
+ }
+ dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer,
+ layer_active);
+ }
+}
+
static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state)
{
@@ -146,6 +195,9 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
/* Write vp properties to HW if needed. */
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
+ /* Update plane positions if needed. */
+ tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
+
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
spin_lock_irqsave(&ddev->event_lock, flags);
@@ -183,6 +235,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
return;
dispc_vp_setup(tidss->dispc, tcrtc->hw_videopor
Re: [PATCH v4 3/3] drm: bridge: cdns-mhdp: add j721e wrapper
On 06/02/2020 08:29, Yuti Amonkar wrote:
> Add j721e wrapper for mhdp, which sets up the clock and data muxes.
>
> Signed-off-by: Yuti Amonkar
> ---
> drivers/gpu/drm/bridge/Kconfig | 12
> drivers/gpu/drm/bridge/Makefile | 3 +
> drivers/gpu/drm/bridge/cdns-mhdp-core.c | 14 +
> drivers/gpu/drm/bridge/cdns-mhdp-core.h | 1 +
> drivers/gpu/drm/bridge/cdns-mhdp-j721e.c | 79
> drivers/gpu/drm/bridge/cdns-mhdp-j721e.h | 55 +
> 6 files changed, 164 insertions(+)
> create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.c
> create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.h
>
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index c66f2ef04f71..32e3bc5edae8 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -38,6 +38,18 @@ config DRM_CDNS_MHDP
> It takes a DPI stream as input and output it encoded
> in DP format.
>
> +if DRM_CDNS_MHDP
> +
> +config DRM_CDNS_MHDP_J721E
> + bool "J721E Cadence DPI/DP wrapper support"
> + default y
> + help
> + Support J721E Cadence DPI/DP wrapper. This is a wrapper
> + which adds support for J721E related platform ops. It
> + initializes the J721e Display Port and sets up the
> + clock and data muxes.
> +endif
> +
> config DRM_DUMB_VGA_DAC
> tristate "Dumb VGA DAC Bridge support"
> depends on OF
> diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> index 71019088d257..7e6c64f9021f 100644
> --- a/drivers/gpu/drm/bridge/Makefile
> +++ b/drivers/gpu/drm/bridge/Makefile
> @@ -21,3 +21,6 @@ obj-y += analogix/
> obj-y += synopsys/
>
> cdns-mhdp-objs := cdns-mhdp-core.o
> +ifeq ($(CONFIG_DRM_CDNS_MHDP_J721E),y)
> + cdns-mhdp-objs += cdns-mhdp-j721e.o
> +endif
> diff --git a/drivers/gpu/drm/bridge/cdns-mhdp-core.c
> b/drivers/gpu/drm/bridge/cdns-mhdp-core.c
> index 51ed9cdee161..8483b6b1023b 100644
> --- a/drivers/gpu/drm/bridge/cdns-mhdp-core.c
> +++ b/drivers/gpu/drm/bridge/cdns-mhdp-core.c
> @@ -36,8 +36,22 @@
>
> #include "cdns-mhdp-core.h"
>
> +#include "cdns-mhdp-j721e.h"
> +
> +#ifdef CONFIG_DRM_CDNS_MHDP_J721E
> +static const struct mhdp_platform_ops mhdp_ti_j721e_ops = {
> + .init = cdns_mhdp_j721e_init,
> + .exit = cdns_mhdp_j721e_fini,
> + .enable = cdns_mhdp_j721e_enable,
> + .disable = cdns_mhdp_j721e_disable,
> +};
> +#endif
> +
> static const struct of_device_id mhdp_ids[] = {
> { .compatible = "cdns,mhdp8546", },
> +#ifdef CONFIG_DRM_CDNS_MHDP_J721E
> + { .compatible = "ti,j721e-mhdp8546", .data = &mhdp_ti_j721e_ops },
> +#endif
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, mhdp_ids);
> diff --git a/drivers/gpu/drm/bridge/cdns-mhdp-core.h
> b/drivers/gpu/drm/bridge/cdns-mhdp-core.h
> index 2f3b67987832..67a99eab5db3 100644
> --- a/drivers/gpu/drm/bridge/cdns-mhdp-core.h
> +++ b/drivers/gpu/drm/bridge/cdns-mhdp-core.h
> @@ -335,6 +335,7 @@ struct mhdp_platform_ops {
>
> struct cdns_mhdp_device {
> void __iomem *regs;
> + void __iomem *j721e_regs;
>
> struct device *dev;
> struct clk *clk;
> diff --git a/drivers/gpu/drm/bridge/cdns-mhdp-j721e.c
> b/drivers/gpu/drm/bridge/cdns-mhdp-j721e.c
> new file mode 100644
> index ..a87faf55c065
> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/cdns-mhdp-j721e.c
> @@ -0,0 +1,79 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * TI j721e Cadence MHDP DP wrapper
> + *
> + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
> + * Author: Jyri Sarha + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include
> +#include
> +
> +#include "cdns-mhdp-j721e.h"
> +
> +#define REVISION0x00
> +#define DPTX_IPCFG 0x04
> +#define ECC_MEM_CFG 0x08
> +#define DPTX_DSC_CFG0x0c
> +#define DPTX_SRC_CFG0x10
> +#define DPTX_VIF_SECURE_MODE_CFG0x14
> +#define DPTX_VIF_CONN_STATUS0x18
> +#define PHY_CLK_STATUS 0x1c
> +
> +#define DPTX_SRC_AIF_EN BIT(16)
> +#define DPTX_SRC_VIF_3_IN30B BIT(11)
> +#define DPTX_SRC_VIF_2_IN30B BIT(10)
> +#define DPTX_SRC_VIF_1
Re: [PATCH v4] drm/tidss: dispc: Rewrite naive plane positioning code
On 14/02/2020 13:20, Tomi Valkeinen wrote:
> On 13/02/2020 21:37, Jyri Sarha wrote:
>> The old implementation of placing planes on the CRTC while configuring
>> the planes was naive and relied on the order in which the planes were
>> configured, enabled, and disabled. The situation where a plane's zpos
>> was changed on the fly was completely broken. The usual symptoms of
>> this problem was scrambled display and a flood of sync lost errors,
>> when a plane was active in two layers at the same time, or a missing
>> plane, in case when a layer was accidentally disabled.
>>
>> The rewrite takes a more straight forward approach when HW is
>> concerned. The plane positioning registers are in the CRTC (or
>> actually OVR) register space and it is more natural to configure them
>> in a one go when configuring the CRTC. To do this we need make sure we
>> have all the planes on the updated CRTCs in the new atomic state. The
>> untouched planes on CRTCs that need plane position update are added to
>> the atomic state in tidss_atomic_check().
>
> The subject needs updating. This is a fix for a bug, and subject needs
> to reflect that.
>
Ok
>> Signed-off-by: Jyri Sarha
>> ---
>> drivers/gpu/drm/tidss/tidss_crtc.c | 55 +
>> drivers/gpu/drm/tidss/tidss_crtc.h | 2 ++
>> drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++--
>> drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++
>> drivers/gpu/drm/tidss/tidss_kms.c | 49 -
>> 5 files changed, 130 insertions(+), 36 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
>> b/drivers/gpu/drm/tidss/tidss_crtc.c
>> index 032c31ee2820..631ec61b086a 100644
>> --- a/drivers/gpu/drm/tidss/tidss_crtc.c
>> +++ b/drivers/gpu/drm/tidss/tidss_crtc.c
>> @@ -17,6 +17,7 @@
>> #include "tidss_dispc.h"
>> #include "tidss_drv.h"
>> #include "tidss_irq.h"
>> +#include "tidss_plane.h"
>> /* Page flip and frame done IRQs */
>> @@ -111,6 +112,54 @@ static int tidss_crtc_atomic_check(struct
>> drm_crtc *crtc,
>> return dispc_vp_bus_check(dispc, hw_videoport, state);
>> }
>> +/*
>> + * This needs all affected planes to be present in the atomic
>> + * state. The untouched planes are added to the state in
>> + * tidss_atomic_check().
>> + */
>> +static void tidss_crtc_position_planes(struct tidss_device *tidss,
>> + struct drm_crtc *crtc,
>> + struct drm_crtc_state *old_state,
>> + bool newmodeset)
>> +{
>> + struct drm_atomic_state *ostate = old_state->state;
>> + struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
>> + struct drm_crtc_state *cstate = crtc->state;
>> + int zpos;
>> +
>> + if (!newmodeset && !cstate->zpos_changed &&
>> + !to_tidss_crtc_state(cstate)->plane_pos_changed)
>> + return;
>> +
>> + for (zpos = 0; zpos < tidss->feat->num_planes; zpos++) {
>> + struct drm_plane_state *pstate;
>> + struct drm_plane *plane;
>> + bool zpos_taken = false;
>> + int i;
>> +
>> + for_each_new_plane_in_state(ostate, plane, pstate, i) {
>> + if (pstate->crtc != crtc || !pstate->visible)
>> + continue;
>> +
>> + if (pstate->normalized_zpos == zpos) {
>> + zpos_taken = true;
>> + break;
>> + }
>> + }
>> +
>> + if (zpos_taken) {
>> + struct tidss_plane *tplane = to_tidss_plane(plane);
>> +
>> + dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
>> + tcrtc->hw_videoport,
>> + pstate->crtc_x, pstate->crtc_y,
>> + zpos);
>> + }
>> + dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, zpos,
>> + zpos_taken);
>> + }
>> +}
>
> Nitpicking, but... I think the "zpos" above is really "layer". Even the
> params, to which you pass "zpos", in the ovr functions are named "layer".
>
Well, it is both. But I'll change that.
> "zpos_taken" sounds like it's reserved and not available for us, or
> something like that. Maybe "layer_active" conveys better that we're just
> collecting which layers are active and whi
Re: [PATCH 41/51] drm/tidss: Drop explicit drm_mode_config_cleanup call
On 21/02/2020 23:03, Daniel Vetter wrote:
> It's right above the drm_dev_put().
>
> This is made possible by a preceeding patch which added a drmm_
> cleanup action to drm_mode_config_init(), hence all we need to do to
> ensure that drm_mode_config_cleanup() is run on final drm_device
> cleanup is check the new error code for _init().
>
> Aside: Another driver with a bit much devm_kzalloc, which should
> probably use drmm_kzalloc instead ...
>
> I'm pretty sure this one blows up already under KASAN because it's
> using devm_drm_dev_init, and later on devm_kzalloc. Hence the memory
> will get freed before the final drm_dev_put (all from the devres
> code), but the cleanup in that final drm_dev_put will access the just
> freed memory.
>
> Unfortunately fixing this properly needs slightly more work, namely
> drmm_ versions for all the drm objects (planes, crtc, ...), so that
> the cleanup actually happens before even drmm_kzalloc would release
> the underlying memory. Not quite there yet.
>
> v2: Explain why this cleanup is possible (Laurent).
>
> Cc: Laurent Pinchart
> Signed-off-by: Daniel Vetter
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
Acked-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_drv.c | 4
> drivers/gpu/drm/tidss/tidss_kms.c | 19 +--
> drivers/gpu/drm/tidss/tidss_kms.h | 1 -
> 3 files changed, 5 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_drv.c
> b/drivers/gpu/drm/tidss/tidss_drv.c
> index 460d5e9d0cf4..ad449d104306 100644
> --- a/drivers/gpu/drm/tidss/tidss_drv.c
> +++ b/drivers/gpu/drm/tidss/tidss_drv.c
> @@ -103,11 +103,7 @@ static const struct dev_pm_ops tidss_pm_ops = {
>
> static void tidss_release(struct drm_device *ddev)
> {
> - struct tidss_device *tidss = ddev->dev_private;
> -
> drm_kms_helper_poll_fini(ddev);
> -
> - tidss_modeset_cleanup(tidss);
> }
>
> DEFINE_DRM_GEM_CMA_FOPS(tidss_fops);
> diff --git a/drivers/gpu/drm/tidss/tidss_kms.c
> b/drivers/gpu/drm/tidss/tidss_kms.c
> index 5311e0f1c551..87e07e0e4eae 100644
> --- a/drivers/gpu/drm/tidss/tidss_kms.c
> +++ b/drivers/gpu/drm/tidss/tidss_kms.c
> @@ -208,7 +208,9 @@ int tidss_modeset_init(struct tidss_device *tidss)
>
> dev_dbg(tidss->dev, "%s\n", __func__);
>
> - drm_mode_config_init(ddev);
> + ret = drm_mode_config_init(ddev);
> + if (ret)
> + return ret;
>
> ddev->mode_config.min_width = 8;
> ddev->mode_config.min_height = 8;
> @@ -220,11 +222,11 @@ int tidss_modeset_init(struct tidss_device *tidss)
>
> ret = tidss_dispc_modeset_init(tidss);
> if (ret)
> - goto err_mode_config_cleanup;
> + return ret;
>
> ret = drm_vblank_init(ddev, tidss->num_crtcs);
> if (ret)
> - goto err_mode_config_cleanup;
> + return ret;
>
> /* Start with vertical blanking interrupt reporting disabled. */
> for (i = 0; i < tidss->num_crtcs; ++i)
> @@ -235,15 +237,4 @@ int tidss_modeset_init(struct tidss_device *tidss)
> dev_dbg(tidss->dev, "%s done\n", __func__);
>
> return 0;
> -
> -err_mode_config_cleanup:
> - drm_mode_config_cleanup(ddev);
> - return ret;
> -}
> -
> -void tidss_modeset_cleanup(struct tidss_device *tidss)
> -{
> - struct drm_device *ddev = &tidss->ddev;
> -
> - drm_mode_config_cleanup(ddev);
> }
> diff --git a/drivers/gpu/drm/tidss/tidss_kms.h
> b/drivers/gpu/drm/tidss/tidss_kms.h
> index dda5625d0128..99aaff099f22 100644
> --- a/drivers/gpu/drm/tidss/tidss_kms.h
> +++ b/drivers/gpu/drm/tidss/tidss_kms.h
> @@ -10,6 +10,5 @@
> struct tidss_device;
>
> int tidss_modeset_init(struct tidss_device *tidss);
> -void tidss_modeset_cleanup(struct tidss_device *tidss);
>
> #endif
>
--
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Re: [PATCH 11/51] drm/tidss: Use drmm_add_final_kfree
On 21/02/2020 23:02, Daniel Vetter wrote: > With this we can drop the final kfree from the release function. > > Signed-off-by: Daniel Vetter > Cc: Jyri Sarha > Cc: Tomi Valkeinen Acked-by: Jyri Sarha > --- > drivers/gpu/drm/tidss/tidss_drv.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_drv.c > b/drivers/gpu/drm/tidss/tidss_drv.c > index d95e4be2c7b9..32a85628dbec 100644 > --- a/drivers/gpu/drm/tidss/tidss_drv.c > +++ b/drivers/gpu/drm/tidss/tidss_drv.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include > #include > > #include "tidss_dispc.h" > @@ -109,8 +110,6 @@ static void tidss_release(struct drm_device *ddev) > tidss_modeset_cleanup(tidss); > > drm_dev_fini(ddev); > - > - kfree(tidss); > } > > DEFINE_DRM_GEM_CMA_FOPS(tidss_fops); > @@ -154,6 +153,7 @@ static int tidss_probe(struct platform_device *pdev) > kfree(ddev); > return ret; > } > + drmm_add_final_kfree(ddev, tidss); > > tidss->dev = dev; > tidss->feat = of_device_get_match_data(dev); > -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH resend 2/2] ARM: dts: keystone-k2g-evm: add HDMI video support
Add DT nodes for HDMI video support for K2G EVM. The HDMI uses SiI9022
DPI as HDMI encoder. The DSS DPI is connected to SiI9022 HDMI
encoder's video input and encoder's output goes to HDMI connector.
Signed-off-by: Jyri Sarha
---
arch/arm/boot/dts/keystone-k2g-evm.dts | 101 +
1 file changed, 101 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts
b/arch/arm/boot/dts/keystone-k2g-evm.dts
index b7f10bf94576..db640bab8c1d 100644
--- a/arch/arm/boot/dts/keystone-k2g-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2g-evm.dts
@@ -45,6 +45,19 @@
regulator-max-microvolt = <180>;
regulator-always-on;
};
+
+ hdmi: connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&sii9022_out>;
+ };
+ };
+ };
};
&k2g_pinctrl {
@@ -89,6 +102,13 @@
>;
};
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP |
MUX_MODE0)/* i2c1_scl.i2c1_scl */
+ K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP |
MUX_MODE0)/* i2c1_sda.i2c1_sda */
+ >;
+ };
+
ecap0_pins: ecap0_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4)
/* pr1_mdio_data.ecap0_in_apwm0_out */
@@ -160,6 +180,40 @@
K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* MDIO_DATA.MDIO_DATA */
>;
};
+
+ vout_pins: pinmux_vout_pins {
+ pinctrl-single,pins = <
+ K2G_CORE_IOPAD(0x1078) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata23.dssdata23 */
+ K2G_CORE_IOPAD(0x107c) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata22.dssdata22 */
+ K2G_CORE_IOPAD(0x1080) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata21.dssdata21 */
+ K2G_CORE_IOPAD(0x1084) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata20.dssdata20 */
+ K2G_CORE_IOPAD(0x1088) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata19.dssdata19 */
+ K2G_CORE_IOPAD(0x108c) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata18.dssdata18 */
+ K2G_CORE_IOPAD(0x1090) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata17.dssdata17 */
+ K2G_CORE_IOPAD(0x1094) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata16.dssdata16 */
+ K2G_CORE_IOPAD(0x1098) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata15.dssdata15 */
+ K2G_CORE_IOPAD(0x109c) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata14.dssdata14 */
+ K2G_CORE_IOPAD(0x10a0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata13.dssdata13 */
+ K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata12.dssdata12 */
+ K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata11.dssdata11 */
+ K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata10.dssdata10 */
+ K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata9.dssdata9 */
+ K2G_CORE_IOPAD(0x10b4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata8.dssdata8 */
+ K2G_CORE_IOPAD(0x10b8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata7.dssdata7 */
+ K2G_CORE_IOPAD(0x10bc) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata6.dssdata6 */
+ K2G_CORE_IOPAD(0x10c0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata5.dssdata5 */
+ K2G_CORE_IOPAD(0x10c4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata4.dssdata4 */
+ K2G_CORE_IOPAD(0x10c8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata3.dssdata3 */
+ K2G_CORE_IOPAD(0x10cc) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata2.dssdata2 */
+ K2G_CORE_IOPAD(0x10d0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata1.dssdata1 */
+ K2G_CORE_IOPAD(0x10d4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata0.dssdata0 */
+ K2G_CORE_IOPAD(0x10d8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssvsync.dssvsync */
+ K2G_CORE_IOPAD(0x10dc) (BUFFER_CLASS_B | PULL_DISABLE |
MU
[PATCH resend 1/2] ARM: dts: keystone-k2g: Add DSS node
Add DT node for DSS. K2G has DSS version 6. Keystone family DSS are
somewhat different compered to the old OMAP family DSSes and the
binding looks different too.
Signed-off-by: Jyri Sarha
Signed-off-by: Tomi Valkeinen
Signed-off-by: Jyri Sarha
---
arch/arm/boot/dts/keystone-k2g.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi
b/arch/arm/boot/dts/keystone-k2g.dtsi
index 1c833105d6c5..08ba31780baa 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -324,6 +324,28 @@
clock-names = "gpio";
};
+ dss: dss@0254 {
+ compatible = "ti,k2g-dss";
+ reg = <0x0254 0x400>,
+ <0x0255 0x1000>,
+ <0x02557000 0x1000>,
+ <0x0255a800 0x100>,
+ <0x0255ac00 0x100>;
+ reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
+ clocks =<&k2g_clks 0x2 0>,
+ <&k2g_clks 0x2 1>;
+ clock-names = "fck", "vp1";
+ interrupts = ;
+
+ power-domains = <&k2g_pds 0x2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ max-memory-bandwidth = <23000>;
+ };
+
edma0: edma@270 {
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
reg = <0x0270 0x8000>;
--
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[PATCH resend 0/2] dts: keystone-k2g-evm: Display support
Resend because the earlier recipient list was wrong. Now that drm/tidss is queued for mainline, lets add display support for k2g-evm. There is no hurry since tidss is out only in v5.7, but it should not harm to have the dts changes in place before that. Jyri Sarha (2): ARM: dts: keystone-k2g: Add DSS node ARM: dts: keystone-k2g-evm: add HDMI video support arch/arm/boot/dts/keystone-k2g-evm.dts | 101 + arch/arm/boot/dts/keystone-k2g.dtsi| 22 ++ 2 files changed, 123 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v4] drm/tidss: dispc: Rewrite naive plane positioning code
The old implementation of placing planes on the CRTC while configuring
the planes was naive and relied on the order in which the planes were
configured, enabled, and disabled. The situation where a plane's zpos
was changed on the fly was completely broken. The usual symptoms of
this problem was scrambled display and a flood of sync lost errors,
when a plane was active in two layers at the same time, or a missing
plane, in case when a layer was accidentally disabled.
The rewrite takes a more straight forward approach when HW is
concerned. The plane positioning registers are in the CRTC (or
actually OVR) register space and it is more natural to configure them
in a one go when configuring the CRTC. To do this we need make sure we
have all the planes on the updated CRTCs in the new atomic state. The
untouched planes on CRTCs that need plane position update are added to
the atomic state in tidss_atomic_check().
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tidss/tidss_crtc.c | 55 +
drivers/gpu/drm/tidss/tidss_crtc.h | 2 ++
drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++--
drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++
drivers/gpu/drm/tidss/tidss_kms.c | 49 -
5 files changed, 130 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
b/drivers/gpu/drm/tidss/tidss_crtc.c
index 032c31ee2820..631ec61b086a 100644
--- a/drivers/gpu/drm/tidss/tidss_crtc.c
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c
@@ -17,6 +17,7 @@
#include "tidss_dispc.h"
#include "tidss_drv.h"
#include "tidss_irq.h"
+#include "tidss_plane.h"
/* Page flip and frame done IRQs */
@@ -111,6 +112,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
return dispc_vp_bus_check(dispc, hw_videoport, state);
}
+/*
+ * This needs all affected planes to be present in the atomic
+ * state. The untouched planes are added to the state in
+ * tidss_atomic_check().
+ */
+static void tidss_crtc_position_planes(struct tidss_device *tidss,
+ struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state,
+ bool newmodeset)
+{
+ struct drm_atomic_state *ostate = old_state->state;
+ struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
+ struct drm_crtc_state *cstate = crtc->state;
+ int zpos;
+
+ if (!newmodeset && !cstate->zpos_changed &&
+ !to_tidss_crtc_state(cstate)->plane_pos_changed)
+ return;
+
+ for (zpos = 0; zpos < tidss->feat->num_planes; zpos++) {
+ struct drm_plane_state *pstate;
+ struct drm_plane *plane;
+ bool zpos_taken = false;
+ int i;
+
+ for_each_new_plane_in_state(ostate, plane, pstate, i) {
+ if (pstate->crtc != crtc || !pstate->visible)
+ continue;
+
+ if (pstate->normalized_zpos == zpos) {
+ zpos_taken = true;
+ break;
+ }
+ }
+
+ if (zpos_taken) {
+ struct tidss_plane *tplane = to_tidss_plane(plane);
+
+ dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
+ tcrtc->hw_videoport,
+ pstate->crtc_x, pstate->crtc_y,
+ zpos);
+ }
+ dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, zpos,
+ zpos_taken);
+ }
+}
+
static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state)
{
@@ -146,6 +195,9 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
/* Write vp properties to HW if needed. */
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
+ /* Update plane positions if needed. */
+ tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
+
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
spin_lock_irqsave(&ddev->event_lock, flags);
@@ -183,6 +235,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
return;
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);
+ tidss_crtc_position_planes(tidss, crtc, old_state, true);
/* Turn vertical blanking interrupt reporting on. */
drm_crtc_vblank_on(crtc);
@@ -318,6 +371,8 @@ static struct drm_crtc_state
*tidss_crtc_duplicate_state(struct drm_crtc *crtc)
__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
+ state->plane_pos_change
Re: [PATCH v3] drm/tidss: dispc: Rewrite naive plane positioning code
On 13/02/2020 13:52, Jyri Sarha wrote:
> On 13/02/2020 12:49, Tomi Valkeinen wrote:
>> On 13/02/2020 12:44, Jyri Sarha wrote:
>>
>>> + /*
>>> + * If a plane on a CRTC changes add all active planes on that
>>> + * CRTC to the atomic state. This is needed for updating the
>>> + * plane positions in tidss_crtc_position_planes() which is
>>> + * called from crtc_atomic_enable() and crtc_atomic_flush().
>>> + * The update is needed for x,y-position changes too, so
>>> + * zpos_changed condition is not enough and we need this if
>>> + * planes_changed is true too.
>>> + */
>>> + for_each_new_crtc_in_state(state, crtc, cstate, i) {
>>> + if (cstate->zpos_changed || cstate->planes_changed) {
>>> + ret = drm_atomic_add_affected_planes(state, crtc);
>>> + if (ret)
>>> + return ret;
>>> + }
>>> + }
>>
>> I think 99.99...% of the commits are such where only planes' fb address
>> is changed. I think "planes_changed" is true for these. I wonder if it
>> would be a sensible optimization to skip this for those 99.99...% cases.
>> Can we detect that easily?
>>
>
> Sure by looping all planes in the state through with
> for_each_oldnew_plane_in_state() and checking if crtc_x or crtc_y has
> changed. But then again writing the positions of max 4 planes is really
> not that heavy operation. There is more calculation to do and more
> registers to write when updating the fp, so I do not think avoiding the
> OVR update justifies the extra complexity.
>
Well, I implemented this anyway just for the fun of it. After all the
added complexity is not that much, since we already have an extended
CRTC state. Judge your self, I'll send v4 shortly.
Best regards,
Jyri
>> Well, we haven't optimized for those 99.99...% cases anywhere else
>> either, so it's possible it doesn't matter.
>>
>
>
>
>
>
--
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Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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Re: [PATCH v3] drm/tidss: dispc: Rewrite naive plane positioning code
On 13/02/2020 12:49, Tomi Valkeinen wrote:
> On 13/02/2020 12:44, Jyri Sarha wrote:
>
>> + /*
>> + * If a plane on a CRTC changes add all active planes on that
>> + * CRTC to the atomic state. This is needed for updating the
>> + * plane positions in tidss_crtc_position_planes() which is
>> + * called from crtc_atomic_enable() and crtc_atomic_flush().
>> + * The update is needed for x,y-position changes too, so
>> + * zpos_changed condition is not enough and we need this if
>> + * planes_changed is true too.
>> + */
>> + for_each_new_crtc_in_state(state, crtc, cstate, i) {
>> + if (cstate->zpos_changed || cstate->planes_changed) {
>> + ret = drm_atomic_add_affected_planes(state, crtc);
>> + if (ret)
>> + return ret;
>> + }
>> + }
>
> I think 99.99...% of the commits are such where only planes' fb address
> is changed. I think "planes_changed" is true for these. I wonder if it
> would be a sensible optimization to skip this for those 99.99...% cases.
> Can we detect that easily?
>
Sure by looping all planes in the state through with
for_each_oldnew_plane_in_state() and checking if crtc_x or crtc_y has
changed. But then again writing the positions of max 4 planes is really
not that heavy operation. There is more calculation to do and more
registers to write when updating the fp, so I do not think avoiding the
OVR update justifies the extra complexity.
> Well, we haven't optimized for those 99.99...% cases anywhere else
> either, so it's possible it doesn't matter.
>
--
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Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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[PATCH v3] drm/tidss: dispc: Rewrite naive plane positioning code
The old implementation of placing planes on the CRTC while configuring
the planes was naive and relied on the order in which the planes were
configured, enabled, and disabled. The situation where a plane's zpos
was changed on the fly was completely broken. The usual symptoms of
this problem was scrambled display and a flood of sync lost errors,
when a plane was active in two layers at the same time, or a missing
plane, in case when a layer was accidentally disabled.
The rewrite takes a more straight forward approach when HW is
concerned. The plane positioning registers are in the CRTC (or
actually OVR) register space and it is more natural to configure them
in a one go when configuring the CRTC. To do this we need make sure we
have all the planes on the updated CRTCs in the new atomic state. The
untouched planes on changed CRTCs are added to the atomic state in
tidss_atomic_check().
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tidss/tidss_crtc.c | 52 +++
drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++--
drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++
drivers/gpu/drm/tidss/tidss_kms.c | 33 -
4 files changed, 109 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
b/drivers/gpu/drm/tidss/tidss_crtc.c
index 032c31ee2820..36478c54784b 100644
--- a/drivers/gpu/drm/tidss/tidss_crtc.c
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c
@@ -17,6 +17,7 @@
#include "tidss_dispc.h"
#include "tidss_drv.h"
#include "tidss_irq.h"
+#include "tidss_plane.h"
/* Page flip and frame done IRQs */
@@ -111,6 +112,53 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
return dispc_vp_bus_check(dispc, hw_videoport, state);
}
+/*
+ * This needs all affected planes to be present in the atomic
+ * state. The untouched planes are added to the state in
+ * tidss_atomic_check().
+ */
+static void tidss_crtc_position_planes(struct tidss_device *tidss,
+ struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state,
+ bool newmodeset)
+{
+ struct drm_atomic_state *ostate = old_state->state;
+ struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
+ struct drm_crtc_state *cstate = crtc->state;
+ int zpos;
+
+ if (!newmodeset && !cstate->zpos_changed && !cstate->planes_changed)
+ return;
+
+ for (zpos = 0; zpos < tidss->feat->num_planes; zpos++) {
+ struct drm_plane_state *pstate;
+ struct drm_plane *plane;
+ bool zpos_taken = false;
+ int i;
+
+ for_each_new_plane_in_state(ostate, plane, pstate, i) {
+ if (pstate->crtc != crtc || !pstate->visible)
+ continue;
+
+ if (pstate->normalized_zpos == zpos) {
+ zpos_taken = true;
+ break;
+ }
+ }
+
+ if (zpos_taken) {
+ struct tidss_plane *tplane = to_tidss_plane(plane);
+
+ dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
+ tcrtc->hw_videoport,
+ pstate->crtc_x, pstate->crtc_y,
+ zpos);
+ }
+ dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, zpos,
+ zpos_taken);
+ }
+}
+
static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state)
{
@@ -146,6 +194,9 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
/* Write vp properties to HW if needed. */
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
+ /* Update plane positions if needed. */
+ tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
+
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
spin_lock_irqsave(&ddev->event_lock, flags);
@@ -183,6 +234,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
return;
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);
+ tidss_crtc_position_planes(tidss, crtc, old_state, true);
/* Turn vertical blanking interrupt reporting on. */
drm_crtc_vblank_on(crtc);
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
b/drivers/gpu/drm/tidss/tidss_dispc.c
index eeb160dc047b..e79dad246b1e 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -281,11 +281,6 @@ struct dss_vp_data {
u32 *gamma_table;
};
-struct dss_plane_data {
- u32 zorder
Re: [PATCH v2] drm/tidss: dispc: Rewrite naive plane positioning code
On 13/02/2020 11:19, Daniel Vetter wrote: > On Thu, Feb 13, 2020 at 10:03 AM Jyri Sarha wrote: >> >> On 12/02/2020 22:28, Daniel Vetter wrote: >>> On Wed, Feb 12, 2020 at 7:01 PM Jyri Sarha wrote: >>>> >>>> On 12/02/2020 16:33, Ville Syrjälä wrote: >>>>> On Wed, Feb 12, 2020 at 04:08:11PM +0200, Jyri Sarha wrote: >>>>>> On 12/02/2020 15:59, Jyri Sarha wrote: >>>>>>> The old implementation of placing planes on the CRTC while configuring >>>>>>> the planes was naive and relied on the order in which the planes were >>>>>>> configured, enabled, and disabled. The situation where a plane's zpos >>>>>>> was changed on the fly was completely broken. The usual symptoms of >>>>>>> this problem was scrambled display and a flood of sync lost errors, >>>>>>> when a plane was active in two layers at the same time, or a missing >>>>>>> plane, in case when a layer was accidentally disabled. >>>>>>> >>>>>>> The rewrite takes a more straight forward approach when HW is >>>>>>> concerned. The plane positioning registers are in the CRTC (actually >>>>>>> OVR) register space and it is more natural to configure them in one go >>>>>>> while configuring the CRTC. To do this we need to make sure we have >>>>>>> all the planes on updated CRTCs in the new atomic state to be >>>>>>> committed. This is done by calling drm_atomic_add_affected_planes() in >>>>>>> crtc_atomic_check(). >>>>>>> >>>>>>> Signed-off-by: Jyri Sarha >>>>>>> --- >>>>>>> drivers/gpu/drm/tidss/tidss_crtc.c | 55 - >>>>>>> drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++-- >>>>>>> drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++ >>>>>>> 3 files changed, 79 insertions(+), 36 deletions(-) >>>>>>> >>>>>>> diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c >>>>>>> b/drivers/gpu/drm/tidss/tidss_crtc.c >>>>>>> index 032c31ee2820..f7c5fd1094a8 100644 >>>>>>> --- a/drivers/gpu/drm/tidss/tidss_crtc.c >>>>>>> +++ b/drivers/gpu/drm/tidss/tidss_crtc.c >>>>>> ... >>>>>>> @@ -108,7 +110,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc >>>>>>> *crtc, >>>>>>> return -EINVAL; >>>>>>> } >>>>>>> >>>>>>> - return dispc_vp_bus_check(dispc, hw_videoport, state); >>>>>>> + ret = dispc_vp_bus_check(dispc, hw_videoport, state); >>>>>>> + if (ret) >>>>>>> + return ret; >>>>>>> + >>>>>>> + /* Add unchanged planes on this crtc to state for zpos update. */ >>>>>>> + return drm_atomic_add_affected_planes(state->state, crtc); >>>>>> >>>>>> Is this a correct way to use drm_atomic_add_affected_planes()? >>>>>> >>>>>> I saw that some other drivers implement their own mode_config >>>>>> atomic_check() and have this call there in >>>>>> for_each_new_crtc_in_state()-loop, but I thought it should be fine to >>>>>> call it in crtc_atomic_check(). >>>>> >>>>> You seem to be using drm_atomic_helper_check_planes(), which means >>>>> crtc.atomic_check() gets called after plane.atomic_check(). So this >>>>> might be good or bad depending on whether you'd like the planes you >>>>> add here to go through their .atomic_check() or not. >>>>> >>>> >>>> Should have thought of that my self. Extra plane.atomic_check() calls do >>>> not do any actual harm, but they are potentially expensive. The planes >>>> are really only needed there in the commit phase (crtc_enable() or >>>> flush()). Well, I'll do my own mode_config.atomic_check() and call >>>> drm_atomic_add_affected_planes() in a for_each_new_crtc_in_state()-loop >>>> after all the checks. >>> >>> Also, if you do use the helpers then this should already have happened >>> for you. Which makes me wonder why all this work, so maybe there's >>> some dependency between all the various check functio
Re: [PATCH v2] drm/tidss: dispc: Rewrite naive plane positioning code
On 12/02/2020 22:28, Daniel Vetter wrote: > On Wed, Feb 12, 2020 at 7:01 PM Jyri Sarha wrote: >> >> On 12/02/2020 16:33, Ville Syrjälä wrote: >>> On Wed, Feb 12, 2020 at 04:08:11PM +0200, Jyri Sarha wrote: >>>> On 12/02/2020 15:59, Jyri Sarha wrote: >>>>> The old implementation of placing planes on the CRTC while configuring >>>>> the planes was naive and relied on the order in which the planes were >>>>> configured, enabled, and disabled. The situation where a plane's zpos >>>>> was changed on the fly was completely broken. The usual symptoms of >>>>> this problem was scrambled display and a flood of sync lost errors, >>>>> when a plane was active in two layers at the same time, or a missing >>>>> plane, in case when a layer was accidentally disabled. >>>>> >>>>> The rewrite takes a more straight forward approach when HW is >>>>> concerned. The plane positioning registers are in the CRTC (actually >>>>> OVR) register space and it is more natural to configure them in one go >>>>> while configuring the CRTC. To do this we need to make sure we have >>>>> all the planes on updated CRTCs in the new atomic state to be >>>>> committed. This is done by calling drm_atomic_add_affected_planes() in >>>>> crtc_atomic_check(). >>>>> >>>>> Signed-off-by: Jyri Sarha >>>>> --- >>>>> drivers/gpu/drm/tidss/tidss_crtc.c | 55 - >>>>> drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++-- >>>>> drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++ >>>>> 3 files changed, 79 insertions(+), 36 deletions(-) >>>>> >>>>> diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c >>>>> b/drivers/gpu/drm/tidss/tidss_crtc.c >>>>> index 032c31ee2820..f7c5fd1094a8 100644 >>>>> --- a/drivers/gpu/drm/tidss/tidss_crtc.c >>>>> +++ b/drivers/gpu/drm/tidss/tidss_crtc.c >>>> ... >>>>> @@ -108,7 +110,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc >>>>> *crtc, >>>>> return -EINVAL; >>>>> } >>>>> >>>>> - return dispc_vp_bus_check(dispc, hw_videoport, state); >>>>> + ret = dispc_vp_bus_check(dispc, hw_videoport, state); >>>>> + if (ret) >>>>> + return ret; >>>>> + >>>>> + /* Add unchanged planes on this crtc to state for zpos update. */ >>>>> + return drm_atomic_add_affected_planes(state->state, crtc); >>>> >>>> Is this a correct way to use drm_atomic_add_affected_planes()? >>>> >>>> I saw that some other drivers implement their own mode_config >>>> atomic_check() and have this call there in >>>> for_each_new_crtc_in_state()-loop, but I thought it should be fine to >>>> call it in crtc_atomic_check(). >>> >>> You seem to be using drm_atomic_helper_check_planes(), which means >>> crtc.atomic_check() gets called after plane.atomic_check(). So this >>> might be good or bad depending on whether you'd like the planes you >>> add here to go through their .atomic_check() or not. >>> >> >> Should have thought of that my self. Extra plane.atomic_check() calls do >> not do any actual harm, but they are potentially expensive. The planes >> are really only needed there in the commit phase (crtc_enable() or >> flush()). Well, I'll do my own mode_config.atomic_check() and call >> drm_atomic_add_affected_planes() in a for_each_new_crtc_in_state()-loop >> after all the checks. > > Also, if you do use the helpers then this should already have happened > for you. Which makes me wonder why all this work, so maybe there's > some dependency between all the various check functions you have going > on? Might be time to roll your own top-level check function that calls > stuff in the order your hw needs things to be checked, so that you > don't add new states late and have to run one check phase twice (which > is totally fine with the helpers as long as all your check callbacks > are idempotent, but often just overkill and confusing). All the driver specific checks are perfectly independent without any cross dependencies. And there is no extra data in the plane- or CRTC-state, nor do the driver specific checks touch the state in any way. I only want all the planes on a crtc to be there, if any of the planes on th
Re: [PATCH v2] drm/tidss: dispc: Rewrite naive plane positioning code
On 12/02/2020 16:33, Ville Syrjälä wrote: > On Wed, Feb 12, 2020 at 04:08:11PM +0200, Jyri Sarha wrote: >> On 12/02/2020 15:59, Jyri Sarha wrote: >>> The old implementation of placing planes on the CRTC while configuring >>> the planes was naive and relied on the order in which the planes were >>> configured, enabled, and disabled. The situation where a plane's zpos >>> was changed on the fly was completely broken. The usual symptoms of >>> this problem was scrambled display and a flood of sync lost errors, >>> when a plane was active in two layers at the same time, or a missing >>> plane, in case when a layer was accidentally disabled. >>> >>> The rewrite takes a more straight forward approach when HW is >>> concerned. The plane positioning registers are in the CRTC (actually >>> OVR) register space and it is more natural to configure them in one go >>> while configuring the CRTC. To do this we need to make sure we have >>> all the planes on updated CRTCs in the new atomic state to be >>> committed. This is done by calling drm_atomic_add_affected_planes() in >>> crtc_atomic_check(). >>> >>> Signed-off-by: Jyri Sarha >>> --- >>> drivers/gpu/drm/tidss/tidss_crtc.c | 55 - >>> drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++-- >>> drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++ >>> 3 files changed, 79 insertions(+), 36 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c >>> b/drivers/gpu/drm/tidss/tidss_crtc.c >>> index 032c31ee2820..f7c5fd1094a8 100644 >>> --- a/drivers/gpu/drm/tidss/tidss_crtc.c >>> +++ b/drivers/gpu/drm/tidss/tidss_crtc.c >> ... >>> @@ -108,7 +110,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc >>> *crtc, >>> return -EINVAL; >>> } >>> >>> - return dispc_vp_bus_check(dispc, hw_videoport, state); >>> + ret = dispc_vp_bus_check(dispc, hw_videoport, state); >>> + if (ret) >>> + return ret; >>> + >>> + /* Add unchanged planes on this crtc to state for zpos update. */ >>> + return drm_atomic_add_affected_planes(state->state, crtc); >> >> Is this a correct way to use drm_atomic_add_affected_planes()? >> >> I saw that some other drivers implement their own mode_config >> atomic_check() and have this call there in >> for_each_new_crtc_in_state()-loop, but I thought it should be fine to >> call it in crtc_atomic_check(). > > You seem to be using drm_atomic_helper_check_planes(), which means > crtc.atomic_check() gets called after plane.atomic_check(). So this > might be good or bad depending on whether you'd like the planes you > add here to go through their .atomic_check() or not. > Should have thought of that my self. Extra plane.atomic_check() calls do not do any actual harm, but they are potentially expensive. The planes are really only needed there in the commit phase (crtc_enable() or flush()). Well, I'll do my own mode_config.atomic_check() and call drm_atomic_add_affected_planes() in a for_each_new_crtc_in_state()-loop after all the checks. Thanks, Jyri -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2] drm/tidss: dispc: Rewrite naive plane positioning code
On 12/02/2020 15:59, Jyri Sarha wrote: > The old implementation of placing planes on the CRTC while configuring > the planes was naive and relied on the order in which the planes were > configured, enabled, and disabled. The situation where a plane's zpos > was changed on the fly was completely broken. The usual symptoms of > this problem was scrambled display and a flood of sync lost errors, > when a plane was active in two layers at the same time, or a missing > plane, in case when a layer was accidentally disabled. > > The rewrite takes a more straight forward approach when HW is > concerned. The plane positioning registers are in the CRTC (actually > OVR) register space and it is more natural to configure them in one go > while configuring the CRTC. To do this we need to make sure we have > all the planes on updated CRTCs in the new atomic state to be > committed. This is done by calling drm_atomic_add_affected_planes() in > crtc_atomic_check(). > > Signed-off-by: Jyri Sarha > --- > drivers/gpu/drm/tidss/tidss_crtc.c | 55 - > drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++-- > drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++ > 3 files changed, 79 insertions(+), 36 deletions(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c > b/drivers/gpu/drm/tidss/tidss_crtc.c > index 032c31ee2820..f7c5fd1094a8 100644 > --- a/drivers/gpu/drm/tidss/tidss_crtc.c > +++ b/drivers/gpu/drm/tidss/tidss_crtc.c ... > @@ -108,7 +110,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc, > return -EINVAL; > } > > - return dispc_vp_bus_check(dispc, hw_videoport, state); > + ret = dispc_vp_bus_check(dispc, hw_videoport, state); > + if (ret) > + return ret; > + > + /* Add unchanged planes on this crtc to state for zpos update. */ > + return drm_atomic_add_affected_planes(state->state, crtc); Is this a correct way to use drm_atomic_add_affected_planes()? I saw that some other drivers implement their own mode_config atomic_check() and have this call there in for_each_new_crtc_in_state()-loop, but I thought it should be fine to call it in crtc_atomic_check(). BR, Jyri -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2] drm/tidss: dispc: Rewrite naive plane positioning code
The old implementation of placing planes on the CRTC while configuring
the planes was naive and relied on the order in which the planes were
configured, enabled, and disabled. The situation where a plane's zpos
was changed on the fly was completely broken. The usual symptoms of
this problem was scrambled display and a flood of sync lost errors,
when a plane was active in two layers at the same time, or a missing
plane, in case when a layer was accidentally disabled.
The rewrite takes a more straight forward approach when HW is
concerned. The plane positioning registers are in the CRTC (actually
OVR) register space and it is more natural to configure them in one go
while configuring the CRTC. To do this we need to make sure we have
all the planes on updated CRTCs in the new atomic state to be
committed. This is done by calling drm_atomic_add_affected_planes() in
crtc_atomic_check().
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tidss/tidss_crtc.c | 55 -
drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++--
drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++
3 files changed, 79 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
b/drivers/gpu/drm/tidss/tidss_crtc.c
index 032c31ee2820..f7c5fd1094a8 100644
--- a/drivers/gpu/drm/tidss/tidss_crtc.c
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c
@@ -17,6 +17,7 @@
#include "tidss_dispc.h"
#include "tidss_drv.h"
#include "tidss_irq.h"
+#include "tidss_plane.h"
/* Page flip and frame done IRQs */
@@ -93,6 +94,7 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
u32 hw_videoport = tcrtc->hw_videoport;
const struct drm_display_mode *mode;
enum drm_mode_status ok;
+ int ret;
dev_dbg(ddev->dev, "%s\n", __func__);
@@ -108,7 +110,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
return -EINVAL;
}
- return dispc_vp_bus_check(dispc, hw_videoport, state);
+ ret = dispc_vp_bus_check(dispc, hw_videoport, state);
+ if (ret)
+ return ret;
+
+ /* Add unchanged planes on this crtc to state for zpos update. */
+ return drm_atomic_add_affected_planes(state->state, crtc);
+}
+
+static void tidss_crtc_position_planes(struct tidss_device *tidss,
+ struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state,
+ bool newmodeset)
+{
+ struct drm_atomic_state *ostate = old_state->state;
+ struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
+ struct drm_crtc_state *cstate = crtc->state;
+ int zpos;
+
+ if (!newmodeset && !cstate->zpos_changed && !cstate->planes_changed)
+ return;
+
+ for (zpos = 0; zpos < tidss->feat->num_planes; zpos++) {
+ struct drm_plane_state *pstate;
+ struct drm_plane *plane;
+ bool zpos_taken = false;
+ int i;
+
+ for_each_new_plane_in_state(ostate, plane, pstate, i) {
+ if (pstate->crtc != crtc || !pstate->visible)
+ continue;
+
+ if (pstate->normalized_zpos == zpos) {
+ zpos_taken = true;
+ break;
+ }
+ }
+
+ if (zpos_taken) {
+ struct tidss_plane *tplane = to_tidss_plane(plane);
+
+ dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
+ tcrtc->hw_videoport,
+ pstate->crtc_x, pstate->crtc_y,
+ zpos);
+ }
+ dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, zpos,
+ zpos_taken);
+ }
}
static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
@@ -146,6 +195,9 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
/* Write vp properties to HW if needed. */
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
+ /* Update plane positions if needed. */
+ tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
+
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
spin_lock_irqsave(&ddev->event_lock, flags);
@@ -183,6 +235,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
return;
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);
+ tidss_crtc_position_planes(tidss, crtc, old_state, true);
/* Turn vertical blanking interrupt reporting on. */
drm_crtc_vblank_on(crtc);
diff --git a/drivers/gpu/drm/tidss/tidss_
Re: [PATCH] drm/tidss: dispc: Rewrite naive plane positioning code
On 11/02/2020 17:41, Daniel Vetter wrote: > On Tue, Feb 11, 2020 at 04:40:21PM +0100, Daniel Vetter wrote: >> On Tue, Feb 11, 2020 at 03:00:30PM +0200, Ville Syrjälä wrote: >>> On Tue, Feb 11, 2020 at 11:11:34AM +0200, Tomi Valkeinen wrote: Hi Ville, On 10/02/2020 18:03, Ville Syrjälä wrote: > The usual approach we follow in i915 for things that affect more > than one plane is is to collect that state into the crtc state. > That way we get to remember it for the planes that are not part > of the current commit. > > And when we have state that affects more than one crtc that again > get collected up one level up in what we call global state > (basically drm_private_obj with less heavy handed locking scheme). I'm confused. Don't we always have the full state available? Why do you need to store state into custom crtc-state? Here we are interested in the x, y and z positions of all the planes on a crtc. Creating a custom state object and duplicating that information there seems a bit silly, as surely that information is tracked by DRM? >>> >>> You can have it if you add all the planes to the state, which can be >>> a bit expensive. Another option would to peek into the planes' states >>> that aren't in the commit, but that's quite gross due to bypassing >>> the normal locking rules and instead relying on the crtc mutex to >>> sufficiently protect the plane states as well. And I suspect trying >>> to do said peeking during the commit phase when the locks have >>> already been dropped will end badly. >> >> Yup, don't peek outside of atomic_check. >> >> Also the peeking only works for planes associated to the crtc. Either >> because that's how the hw works (i915 has fixed plane routing). >> >> Now if this is only about all the planes currently active on a crtc, then >> you the helpers will already add all those plane states for you, and you >> can just walk them in your commit function. Not exactly sure what you need >> here. > > See drm_atomic_add_affected_planes() in case you're rolling your own > stuff. Thanks, This looks to be exactly what I needed. BR, Jyri -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 0/2] drm/panel: simple: Rocktech RK101II01D-CT + binding
Add support for Rocktech RK101II01D-CT panel to panel-simple and add yaml binding for it. Changes since v2: - No separate binding document, just add new compatible to panel-simple.yaml Changes since first fersion: - Move to yaml binding Jyri Sarha (2): dt-bindings: panel-simple: Add rocktech,rk101ii01d-ct compatible drm/panel: simple: Add Rocktech RK101II01D-CT panel .../bindings/display/panel/panel-simple.yaml | 2 ++ drivers/gpu/drm/panel/panel-simple.c | 32 +++ 2 files changed, 34 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 2/2] drm/panel: simple: Add Rocktech RK101II01D-CT panel
Add support for Rocktech RK101II01D-CT, 10.1" 1280x800 TFT with LVDS
interface, LED backlight and integrated Goodix GT928 capacitive touch
panel.
Signed-off-by: Jyri Sarha
Reviewed-by: Tomi Valkeinen
---
drivers/gpu/drm/panel/panel-simple.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index d901ccb5cf9b..82363d05bad4 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -2662,6 +2662,35 @@ static const struct panel_desc rocktech_rk070er9427 = {
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
};
+static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = {
+ .clock = 71100,
+ .hdisplay = 1280,
+ .hsync_start = 1280 + 48,
+ .hsync_end = 1280 + 48 + 32,
+ .htotal = 1280 + 48 + 32 + 80,
+ .vdisplay = 800,
+ .vsync_start = 800 + 2,
+ .vsync_end = 800 + 2 + 5,
+ .vtotal = 800 + 2 + 5 + 16,
+ .vrefresh = 60,
+};
+
+static const struct panel_desc rocktech_rk101ii01d_ct = {
+ .modes = &rocktech_rk101ii01d_ct_mode,
+ .num_modes = 1,
+ .size = {
+ .width = 217,
+ .height = 136,
+ },
+ .delay = {
+ .prepare = 50,
+ .disable = 50,
+ },
+ .bus_flags = DRM_BUS_FLAG_DE_HIGH,
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
.clock = 271560,
.hdisplay = 2560,
@@ -3569,6 +3598,9 @@ static const struct of_device_id platform_of_match[] = {
}, {
.compatible = "rocktech,rk070er9427",
.data = &rocktech_rk070er9427,
+ }, {
+ .compatible = "rocktech,rk101ii01d-ct",
+ .data = &rocktech_rk101ii01d_ct,
}, {
.compatible = "samsung,lsn122dl01-c01",
.data = &samsung_lsn122dl01_c01,
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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[PATCH v3 1/2] dt-bindings: panel-simple: Add rocktech, rk101ii01d-ct compatible
Add compatible to panel-simple for Rocktech Displays Limited
RK101II01D-CT 10.1" TFT 1280x800 Pixels with LVDS interface, LED
Backlight, and capacitive touch panel ("goodix,gt928" compatible).
Signed-off-by: Jyri Sarha
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
index cf23b0ad077a..e717018d34ae 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
@@ -201,6 +201,8 @@ properties:
- osddisplays,osd101t2045-53ts
# QiaoDian XianShi Corporation 4"3 TFT LCD panel
- qiaodian,qd43003c0-40
+# Rocktech Displays Ltd. RK101II01D-CT 10.1" TFT 1280x800
+ - rocktech,rk101ii01d-ct
# Rocktech Display Ltd. RK070ER9427 800(RGB)x480 TFT LCD panel
- rocktech,rk070er9427
# Samsung 12.2" (2560x1600 pixels) TFT LCD panel
--
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Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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Re: [PATCH] drm/tidss: dispc: Rewrite naive plane positioning code
On 10/02/2020 15:21, Ville Syrjälä wrote: > On Sun, Feb 09, 2020 at 02:50:09PM +0200, Jyri Sarha wrote: >> On 07/02/2020 20:45, Ville Syrjälä wrote: >>> On Fri, Feb 07, 2020 at 08:26:17PM +0200, Jyri Sarha wrote: >>>> On 07/02/2020 20:18, Jyri Sarha wrote: >>>>> The old implementation of placing planes on the CRTC while configuring >>>>> the planes was naive and relied on the order in which the planes were >>>>> configured, enabled, and disabled. The situation where a plane's zpos >>>>> was changed on the fly was completely broken. The usual symptoms of >>>>> this problem was scrambled display and a flood of sync lost errors, >>>>> when a plane was active in two layers at the same time, or a missing >>>>> plane, in case when a layer was accidentally disabled. >>>>> >>>>> The rewrite takes a more straight forward approach when when HW is >>>>> concerned. The plane positioning registers are in the CRTC (or >>>>> actually OVR) register space and it is more natural to configure them >>>>> in a one go when configuring the CRTC. This is easy since we have >>>>> access to the whole atomic state when updating the CRTC configuration. >>>>> >>>> >>>> While implementing this fix it caught me by surprise that >>>> crtc->state->state (pointer up to full atomic state) is NULL when >>>> crtc_enable() or -flush() is called. So I take the plane-state directly >>>> from the plane->state and just assume that it is pointing to the same >>>> atomic state with the crtc state I am having. I that alraight? >>> >>> IMO you should never use plane->state etc. Better pass down the >>> full atomic state everywhere. Otherwise you can never even consider >>> increasing the commit queue depth since you'd end up accessing the >>> wrong state. >>> >> >> Ok. I did explore this a bit and it starts to look like that I have to >> store the planes' zpos values in the driver after all. Only the changes >> are available in the drm_atomic_state being commited so I have to >> maintain the full state myself. That is if I should not use plane->state >> in crtc_enable() or -flush(). > > You have the full old and new states around for each > crtc/plane/connector in the state. So not sure what you mean > by having only the changes available? > If (by using the drm_atomic_state pointer in old_crtc_state paremeter) I loop the planes trough with for_each_oldnew_plane_in_state(), I will only see the planes that were part of the drm atomic request sent from the user-space. I just tested that again. But is it a requirement that an user-space applications should always send the full state, and that the driver should assume that all mode_config objects that are not there in drm_atomic_state should be disabled? At least the implementation of drm_atomic_get_plane_state() (used by at least drm_atomic_normalize_zpos() and drm_mode_config_helper_suspend()) seems to suggest otherwise. When getting the plane state it first tries drm_atomic_get_existing_plane_state(), but if it can not find the state from the given drm_atomic_state, it goes down to the actual plane and calls plane->funcs->atomic_duplicate_state(plane) to get it from the plane-object itself. >> >>>> >>>> Why is the crtc->state->state NULL? Is it a bug or is there some reason >>>> to it? >>> >>> Currently swap_state() moves that state pointer from the new obj state >>> to the old obj state, and clears the one in the new obj state. Not entirely >>> sure why, but maybe just so there isn't a stale ->state pointer hanging >>> around in the obj->state after the swap? >>> >>> I think a better way could be to not clobber the old obj state at >>> all, leave the new_obj_state->state alone, and just clear the ->state >>> pointer .duplicate_state(). But that would require reviewing a bunch >>> of code to find all the places where old_obj_state->state gets used >>> during the commit. >>> >> >> I think those places are many, since at least I did not figure out any >> other way to access the full commit behind the atomic helpers. > > I haven't examined how many drivers depend on the current behaviour. > But fixing up the core/helpers should be pretty trivial. > -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v4 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper.
On 06/02/2020 08:29, Yuti Amonkar wrote: > This patch series adds new DRM driver for Cadence Display Port. > The Cadence Display Port is also referred as MHDP (Mobile High > Definition Link, High-Definition Multimedia Interface Display > Port) Cadence Display Port complies with VESA DisplayPort (DP) > and embedded Display Port (eDP) standards. This driver implements > Single Stream Transport (SST) support. Adds Texas Instruments SoC > J721e specific wrapper and adds the device tree bindings in YAML format. > > The patch series has three patches which applies the changes in the below > sequence > 1. 001-dt-bindings-drm-bridge-Document-Cadence-MHDP-bridge-bindings > Documents the bindings in yaml format. > 2. 002-drm-bridge-Add-support-for-Cadence-MHDP-bridge > This patch adds new DRM driver for Cadence MHDP Display Port. The patch > implements supports > for single stream transport mode. > 3. 003-drm-bridge-cdns-mhdp-add-j721e-wrapper > Add Texas Instruments (TI) j721e wrapper for mhdp. The wrapper configures > mhdp clocks > and muxes as required by SoC. > For the whole series: Tested-by: Jyri Sarha Reviewed-by: Jyri Sarha As a number of code lines are written by me. Best regards, Jyri > Version History: > > v4: > - Added SPDX dual license tag to YAML bindings. > - Corrected indentation of the child node properties. > - Removed the maxItems in the conditional statement. > - Removed phy-names property from the bindings. > - Add Reviewed-by: Rob Herring tag to the > "Document Cadence MHDP bridge bindings" patch. > - Renamed the DRM driver executable name from mhdp8546 to cdns-mhdp in > Makefile. > - Renamed the DRM driver and header file from cdns-mhdp to cdns-mhdp-core. > > v3: > - Added if / then clause to validate that the reg length is proper > based on the value of the compatible property. > - Updated phy property description in YAML to a generic one. > - Renamed num_lanes and max_bit_rate property strings to cdns,num-lanes > and cdns,max-bit-rate based on update in PHY series [2]. > > v2: > - Use enum in compatible property of YAML file. > - Add reg-names property to YAML file > - Add minItems and maxItems to reg property in YAML. > - Remove cdns_mhdp_link_probe function to remove > duplication of reading dpcd capabilities. > > This patch series is dependent on PHY DisplayPort configuration patch [1] > > [1] > > https://lkml.org/lkml/2020/1/6/279 > > [2] > > https://lkml.org/lkml/2020/2/6/15 > > > Yuti Amonkar (3): > dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings. > drm: bridge: Add support for Cadence MHDP DPI/DP bridge > drm: bridge: cdns-mhdp: add j721e wrapper > > .../bindings/display/bridge/cdns,mhdp.yaml| 125 + > drivers/gpu/drm/bridge/Kconfig| 23 + > drivers/gpu/drm/bridge/Makefile |6 + > drivers/gpu/drm/bridge/cdns-mhdp-core.c | 2220 + > drivers/gpu/drm/bridge/cdns-mhdp-core.h | 381 +++ > drivers/gpu/drm/bridge/cdns-mhdp-j721e.c | 79 + > drivers/gpu/drm/bridge/cdns-mhdp-j721e.h | 55 + > 7 files changed, 2889 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml > create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-core.c > create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-core.h > create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.c > create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.h > -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/tidss: dispc: Rewrite naive plane positioning code
On 07/02/2020 20:45, Ville Syrjälä wrote: > On Fri, Feb 07, 2020 at 08:26:17PM +0200, Jyri Sarha wrote: >> On 07/02/2020 20:18, Jyri Sarha wrote: >>> The old implementation of placing planes on the CRTC while configuring >>> the planes was naive and relied on the order in which the planes were >>> configured, enabled, and disabled. The situation where a plane's zpos >>> was changed on the fly was completely broken. The usual symptoms of >>> this problem was scrambled display and a flood of sync lost errors, >>> when a plane was active in two layers at the same time, or a missing >>> plane, in case when a layer was accidentally disabled. >>> >>> The rewrite takes a more straight forward approach when when HW is >>> concerned. The plane positioning registers are in the CRTC (or >>> actually OVR) register space and it is more natural to configure them >>> in a one go when configuring the CRTC. This is easy since we have >>> access to the whole atomic state when updating the CRTC configuration. >>> >> >> While implementing this fix it caught me by surprise that >> crtc->state->state (pointer up to full atomic state) is NULL when >> crtc_enable() or -flush() is called. So I take the plane-state directly >> from the plane->state and just assume that it is pointing to the same >> atomic state with the crtc state I am having. I that alraight? > > IMO you should never use plane->state etc. Better pass down the > full atomic state everywhere. Otherwise you can never even consider > increasing the commit queue depth since you'd end up accessing the > wrong state. > Ok. I did explore this a bit and it starts to look like that I have to store the planes' zpos values in the driver after all. Only the changes are available in the drm_atomic_state being commited so I have to maintain the full state myself. That is if I should not use plane->state in crtc_enable() or -flush(). >> >> Why is the crtc->state->state NULL? Is it a bug or is there some reason >> to it? > > Currently swap_state() moves that state pointer from the new obj state > to the old obj state, and clears the one in the new obj state. Not entirely > sure why, but maybe just so there isn't a stale ->state pointer hanging > around in the obj->state after the swap? > > I think a better way could be to not clobber the old obj state at > all, leave the new_obj_state->state alone, and just clear the ->state > pointer .duplicate_state(). But that would require reviewing a bunch > of code to find all the places where old_obj_state->state gets used > during the commit. > I think those places are many, since at least I did not figure out any other way to access the full commit behind the atomic helpers. -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/tidss: dispc: Rewrite naive plane positioning code
On 07/02/2020 20:18, Jyri Sarha wrote:
> The old implementation of placing planes on the CRTC while configuring
> the planes was naive and relied on the order in which the planes were
> configured, enabled, and disabled. The situation where a plane's zpos
> was changed on the fly was completely broken. The usual symptoms of
> this problem was scrambled display and a flood of sync lost errors,
> when a plane was active in two layers at the same time, or a missing
> plane, in case when a layer was accidentally disabled.
>
> The rewrite takes a more straight forward approach when when HW is
> concerned. The plane positioning registers are in the CRTC (or
> actually OVR) register space and it is more natural to configure them
> in a one go when configuring the CRTC. This is easy since we have
> access to the whole atomic state when updating the CRTC configuration.
>
While implementing this fix it caught me by surprise that
crtc->state->state (pointer up to full atomic state) is NULL when
crtc_enable() or -flush() is called. So I take the plane-state directly
from the plane->state and just assume that it is pointing to the same
atomic state with the crtc state I am having. I that alraight?
Why is the crtc->state->state NULL? Is it a bug or is there some reason
to it?
Best regards,
Jyri
> Signed-off-by: Jyri Sarha
> ---
> drivers/gpu/drm/tidss/tidss_crtc.c | 2 +-
> drivers/gpu/drm/tidss/tidss_dispc.c | 66 -
> 2 files changed, 47 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
> b/drivers/gpu/drm/tidss/tidss_crtc.c
> index 032c31ee2820..367efdebe2f8 100644
> --- a/drivers/gpu/drm/tidss/tidss_crtc.c
> +++ b/drivers/gpu/drm/tidss/tidss_crtc.c
> @@ -143,7 +143,7 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
> if (WARN_ON(!crtc->state->event))
> return;
>
> - /* Write vp properties to HW if needed. */
> + /* Write vp properties and plane positions to HW if needed. */
> dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
>
> WARN_ON(drm_crtc_vblank_get(crtc) != 0);
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
> b/drivers/gpu/drm/tidss/tidss_dispc.c
> index eeb160dc047b..cfc230d2a88a 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
> @@ -20,6 +20,7 @@
> #include
> #include
>
> +#include
> #include
> #include
> #include
> @@ -281,11 +282,6 @@ struct dss_vp_data {
> u32 *gamma_table;
> };
>
> -struct dss_plane_data {
> - u32 zorder;
> - u32 hw_videoport;
> -};
> -
> struct dispc_device {
> struct tidss_device *tidss;
> struct device *dev;
> @@ -307,8 +303,6 @@ struct dispc_device {
>
> struct dss_vp_data vp_data[TIDSS_MAX_PORTS];
>
> - struct dss_plane_data plane_data[TIDSS_MAX_PLANES];
> -
> u32 *fourccs;
> u32 num_fourccs;
>
> @@ -1301,13 +1295,54 @@ static void dispc_ovr_set_plane(struct dispc_device
> *dispc,
> }
> }
>
> -static void dispc_ovr_enable_plane(struct dispc_device *dispc,
> -u32 hw_videoport, u32 zpos, bool enable)
> +static void dispc_ovr_enable_layer(struct dispc_device *dispc,
> +u32 hw_videoport, u32 layer, bool enable)
> {
> - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(zpos),
> + if (dispc->feat->subrev == DISPC_K2G)
> + return;
> +
> + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),
> !!enable, 0, 0);
> }
>
> +static void dispc_vp_position_planes(struct dispc_device *dispc,
> + u32 hw_videoport,
> + const struct drm_crtc_state *cstate,
> + bool newmodeset)
> +{
> + struct drm_device *ddev = &dispc->tidss->ddev;
> + int zpos;
> +
> + if (!cstate->zpos_changed && !cstate->planes_changed && !newmodeset)
> + return;
> +
> + for (zpos = 0; zpos < dispc->feat->num_planes; zpos++) {
> + struct drm_plane *plane;
> + bool zpos_taken = false;
> +
> + drm_for_each_plane_mask(plane, ddev, cstate->plane_mask) {
> + if (WARN_ON(!plane->state))
> + continue;
> +
> + if (plane->state->normalized_zpos == zpos) {
> + zpos_taken = true;
> + break;
> +
[PATCH] drm/tidss: dispc: Rewrite naive plane positioning code
The old implementation of placing planes on the CRTC while configuring
the planes was naive and relied on the order in which the planes were
configured, enabled, and disabled. The situation where a plane's zpos
was changed on the fly was completely broken. The usual symptoms of
this problem was scrambled display and a flood of sync lost errors,
when a plane was active in two layers at the same time, or a missing
plane, in case when a layer was accidentally disabled.
The rewrite takes a more straight forward approach when when HW is
concerned. The plane positioning registers are in the CRTC (or
actually OVR) register space and it is more natural to configure them
in a one go when configuring the CRTC. This is easy since we have
access to the whole atomic state when updating the CRTC configuration.
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/tidss/tidss_crtc.c | 2 +-
drivers/gpu/drm/tidss/tidss_dispc.c | 66 -
2 files changed, 47 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c
b/drivers/gpu/drm/tidss/tidss_crtc.c
index 032c31ee2820..367efdebe2f8 100644
--- a/drivers/gpu/drm/tidss/tidss_crtc.c
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c
@@ -143,7 +143,7 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
if (WARN_ON(!crtc->state->event))
return;
- /* Write vp properties to HW if needed. */
+ /* Write vp properties and plane positions to HW if needed. */
dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c
b/drivers/gpu/drm/tidss/tidss_dispc.c
index eeb160dc047b..cfc230d2a88a 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -20,6 +20,7 @@
#include
#include
+#include
#include
#include
#include
@@ -281,11 +282,6 @@ struct dss_vp_data {
u32 *gamma_table;
};
-struct dss_plane_data {
- u32 zorder;
- u32 hw_videoport;
-};
-
struct dispc_device {
struct tidss_device *tidss;
struct device *dev;
@@ -307,8 +303,6 @@ struct dispc_device {
struct dss_vp_data vp_data[TIDSS_MAX_PORTS];
- struct dss_plane_data plane_data[TIDSS_MAX_PLANES];
-
u32 *fourccs;
u32 num_fourccs;
@@ -1301,13 +1295,54 @@ static void dispc_ovr_set_plane(struct dispc_device
*dispc,
}
}
-static void dispc_ovr_enable_plane(struct dispc_device *dispc,
- u32 hw_videoport, u32 zpos, bool enable)
+static void dispc_ovr_enable_layer(struct dispc_device *dispc,
+ u32 hw_videoport, u32 layer, bool enable)
{
- OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(zpos),
+ if (dispc->feat->subrev == DISPC_K2G)
+ return;
+
+ OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer),
!!enable, 0, 0);
}
+static void dispc_vp_position_planes(struct dispc_device *dispc,
+u32 hw_videoport,
+const struct drm_crtc_state *cstate,
+bool newmodeset)
+{
+ struct drm_device *ddev = &dispc->tidss->ddev;
+ int zpos;
+
+ if (!cstate->zpos_changed && !cstate->planes_changed && !newmodeset)
+ return;
+
+ for (zpos = 0; zpos < dispc->feat->num_planes; zpos++) {
+ struct drm_plane *plane;
+ bool zpos_taken = false;
+
+ drm_for_each_plane_mask(plane, ddev, cstate->plane_mask) {
+ if (WARN_ON(!plane->state))
+ continue;
+
+ if (plane->state->normalized_zpos == zpos) {
+ zpos_taken = true;
+ break;
+ }
+ }
+
+ if (zpos_taken) {
+ struct tidss_plane *tplane = to_tidss_plane(plane);
+ const struct drm_plane_state *pstate = plane->state;
+
+ dispc_ovr_set_plane(dispc, tplane->hw_plane_id,
+ hw_videoport,
+ pstate->crtc_x, pstate->crtc_y,
+ zpos);
+ }
+ dispc_ovr_enable_layer(dispc, hw_videoport, zpos, zpos_taken);
+ }
+}
+
/* CSC */
enum csc_ctm {
CSC_RR, CSC_RG, CSC_RB,
@@ -2070,21 +2105,11 @@ int dispc_plane_setup(struct dispc_device *dispc, u32
hw_plane,
VID_REG_FLD_MOD(dispc, hw_plane, DISPC_VID_ATTRIBUTES, 0,
28, 28);
- dispc_ovr_set_plane(dispc, hw_plane, hw_videoport,
- state->crtc_x, state->
Re: [PATCH v3 2/3] drm: bridge: Add support for Cadence MHDP DPI/DP bridge
On 22/01/2020 12:55, Yuti Amonkar wrote:
> This patch adds new DRM driver for Cadence MHDP DPTX IP used on J721e SoC.
> MHDP DPTX IP is the component that complies with VESA DisplayPort (DP) and
> embedded Display Port (eDP) standards.It integrates uCPU running the
> embedded Firmware(FW) interfaced over APB interface.
> Basically, it takes a DPI stream as input and output it encoded in DP
> format. Currently, it supports only SST mode.
>
> Signed-off-by: Yuti Amonkar
> ---
> drivers/gpu/drm/bridge/Kconfig | 11 +
> drivers/gpu/drm/bridge/Makefile|3 +
> drivers/gpu/drm/bridge/cdns-mhdp.c | 2202
>
> drivers/gpu/drm/bridge/cdns-mhdp.h | 380 +++
> 4 files changed, 2596 insertions(+)
> create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp.c
> create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp.h
>
...
> diff --git a/drivers/gpu/drm/bridge/cdns-mhdp.c
> b/drivers/gpu/drm/bridge/cdns-mhdp.c
> new file mode 100644
> index 000..0bc7fba
> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/cdns-mhdp.c
> @@ -0,0 +1,2202 @@
> +// SPDX-License-Identifier: GPL-2.0
...
> +
> +static int mhdp_probe(struct platform_device *pdev)
> +{
> + const struct of_device_id *match;
> + struct resource *regs;
> + struct cdns_mhdp_device *mhdp;
> + struct clk *clk;
> + int ret;
> + unsigned long rate;
> + int irq;
> + u32 lanes_prop;
> + unsigned int link_rate;
> +
> + mhdp = devm_kzalloc(&pdev->dev, sizeof(struct cdns_mhdp_device),
> + GFP_KERNEL);
> + if (!mhdp)
> + return -ENOMEM;
> +
> + clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(clk)) {
> + dev_err(&pdev->dev, "couldn't get clk: %ld\n", PTR_ERR(clk));
> + return PTR_ERR(clk);
> + }
> +
> + mhdp->clk = clk;
> + mhdp->dev = &pdev->dev;
> + mhdp->conn_bus_flags_defaults = DRM_BUS_FLAG_DE_HIGH;
> + mutex_init(&mhdp->mbox_mutex);
> + spin_lock_init(&mhdp->start_lock);
> + dev_set_drvdata(&pdev->dev, mhdp);
> +
> + drm_dp_aux_init(&mhdp->aux);
> + mhdp->aux.dev = &pdev->dev;
> + mhdp->aux.transfer = mhdp_transfer;
> +
> + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mhdp->regs = devm_ioremap_resource(&pdev->dev, regs);
> + if (IS_ERR(mhdp->regs))
> + return PTR_ERR(mhdp->regs);
> +
> + mhdp->phy = devm_phy_get(&pdev->dev, "dpphy");
> + if (IS_ERR(mhdp->phy)) {
> + dev_err(&pdev->dev, "no PHY configured\n");
> + return PTR_ERR(mhdp->phy);
> + }
> +
> + platform_set_drvdata(pdev, mhdp);
> +
> + clk_prepare_enable(clk);
> +
> + match = of_match_device(mhdp_ids, &pdev->dev);
> + if (!match)
> + return -ENODEV;
> + mhdp->ops = (struct mhdp_platform_ops *)match->data;
> +
> + pm_runtime_enable(&pdev->dev);
> + ret = pm_runtime_get_sync(&pdev->dev);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "pm_runtime_get_sync failed\n");
> + pm_runtime_disable(&pdev->dev);
> + goto clk_disable;
> + }
> +
> + if (mhdp->ops && mhdp->ops->init) {
> + ret = mhdp->ops->init(mhdp);
> + if (ret != 0) {
> + dev_err(&pdev->dev, "MHDP platform initialization
> failed: %d\n",
> + ret);
> + goto runtime_put;
> + }
> + }
> +
> + rate = clk_get_rate(clk);
> + writel(rate % 100, mhdp->regs + CDNS_SW_CLK_L);
> + writel(rate / 100, mhdp->regs + CDNS_SW_CLK_H);
> +
> + dev_dbg(&pdev->dev, "func clk rate %lu Hz\n", rate);
> +
> + writel(~0, mhdp->regs + CDNS_MB_INT_MASK);
> + writel(~0, mhdp->regs + CDNS_APB_INT_MASK);
> +
> + irq = platform_get_irq(pdev, 0);
> + ret = devm_request_threaded_irq(mhdp->dev, irq, NULL, mhdp_irq_handler,
> + IRQF_ONESHOT, "mhdp8546", mhdp);
> + if (ret) {
> + dev_err(&pdev->dev, "cannot install IRQ %d\n", irq);
> + ret = -EIO;
> + goto plat_fini;
> + }
> +
> + /* Read source capabilities, based on PHY's device tree properties. */
> + ret = device_property_read_u32(&mhdp->phy->dev, "cdns,num-lanes",
> +&(lanes_prop));
> + if (ret)
> + mhdp->host.lanes_cnt = CDNS_LANE_4;
> + else
> + mhdp->host.lanes_cnt = lanes_prop;
> +
> + ret = device_property_read_u32(&mhdp->phy->dev, "cdns,max-bit-rate",
> +&(link_rate));
> + if (ret)
> + link_rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_8_1);
> + else
> + /* PHY uses Mb/s, DRM uses tens of kb/s. */
> + link_rate *= 100;
> +
> + mhdp->host.link_rate = link_rate;
> + mhdp->host.volt_swing = CDNS_VOLT_SWING(3);
> + mhdp->host.pre_emphasis = CDNS_PRE_EMPHASIS(3);
> + mhdp->host.patter
[PATCH 2/2] ARM: dts: keystone-k2g-evm: add HDMI video support
Add DT nodes for HDMI video support for K2G EVM. The HDMI uses SiI9022
DPI as HDMI encoder. The DSS DPI is connected to SiI9022 HDMI
encoder's video input and encoder's output goes to HDMI connector.
Signed-off-by: Jyri Sarha
---
arch/arm/boot/dts/keystone-k2g-evm.dts | 101 +
1 file changed, 101 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts
b/arch/arm/boot/dts/keystone-k2g-evm.dts
index b7f10bf94576..db640bab8c1d 100644
--- a/arch/arm/boot/dts/keystone-k2g-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2g-evm.dts
@@ -45,6 +45,19 @@
regulator-max-microvolt = <180>;
regulator-always-on;
};
+
+ hdmi: connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&sii9022_out>;
+ };
+ };
+ };
};
&k2g_pinctrl {
@@ -89,6 +102,13 @@
>;
};
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP |
MUX_MODE0)/* i2c1_scl.i2c1_scl */
+ K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP |
MUX_MODE0)/* i2c1_sda.i2c1_sda */
+ >;
+ };
+
ecap0_pins: ecap0_pins {
pinctrl-single,pins = <
K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4)
/* pr1_mdio_data.ecap0_in_apwm0_out */
@@ -160,6 +180,40 @@
K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* MDIO_DATA.MDIO_DATA */
>;
};
+
+ vout_pins: pinmux_vout_pins {
+ pinctrl-single,pins = <
+ K2G_CORE_IOPAD(0x1078) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata23.dssdata23 */
+ K2G_CORE_IOPAD(0x107c) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata22.dssdata22 */
+ K2G_CORE_IOPAD(0x1080) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata21.dssdata21 */
+ K2G_CORE_IOPAD(0x1084) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata20.dssdata20 */
+ K2G_CORE_IOPAD(0x1088) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata19.dssdata19 */
+ K2G_CORE_IOPAD(0x108c) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata18.dssdata18 */
+ K2G_CORE_IOPAD(0x1090) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata17.dssdata17 */
+ K2G_CORE_IOPAD(0x1094) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata16.dssdata16 */
+ K2G_CORE_IOPAD(0x1098) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata15.dssdata15 */
+ K2G_CORE_IOPAD(0x109c) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata14.dssdata14 */
+ K2G_CORE_IOPAD(0x10a0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata13.dssdata13 */
+ K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata12.dssdata12 */
+ K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata11.dssdata11 */
+ K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata10.dssdata10 */
+ K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata9.dssdata9 */
+ K2G_CORE_IOPAD(0x10b4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata8.dssdata8 */
+ K2G_CORE_IOPAD(0x10b8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata7.dssdata7 */
+ K2G_CORE_IOPAD(0x10bc) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata6.dssdata6 */
+ K2G_CORE_IOPAD(0x10c0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata5.dssdata5 */
+ K2G_CORE_IOPAD(0x10c4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata4.dssdata4 */
+ K2G_CORE_IOPAD(0x10c8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata3.dssdata3 */
+ K2G_CORE_IOPAD(0x10cc) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata2.dssdata2 */
+ K2G_CORE_IOPAD(0x10d0) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata1.dssdata1 */
+ K2G_CORE_IOPAD(0x10d4) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssdata0.dssdata0 */
+ K2G_CORE_IOPAD(0x10d8) (BUFFER_CLASS_B | PULL_DISABLE |
MUX_MODE0) /* dssvsync.dssvsync */
+ K2G_CORE_IOPAD(0x10dc) (BUFFER_CLASS_B | PULL_DISABLE |
MU
[PATCH 1/2] ARM: dts: keystone-k2g: Add DSS node
Add DT node for DSS. K2G has DSS version 6. Keystone family DSS are
somewhat different compered to the old OMAP family DSSes and the
binding looks different too.
Signed-off-by: Jyri Sarha
Signed-off-by: Tomi Valkeinen
Signed-off-by: Jyri Sarha
---
arch/arm/boot/dts/keystone-k2g.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi
b/arch/arm/boot/dts/keystone-k2g.dtsi
index 1c833105d6c5..08ba31780baa 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -324,6 +324,28 @@
clock-names = "gpio";
};
+ dss: dss@0254 {
+ compatible = "ti,k2g-dss";
+ reg = <0x0254 0x400>,
+ <0x0255 0x1000>,
+ <0x02557000 0x1000>,
+ <0x0255a800 0x100>,
+ <0x0255ac00 0x100>;
+ reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
+ clocks =<&k2g_clks 0x2 0>,
+ <&k2g_clks 0x2 1>;
+ clock-names = "fck", "vp1";
+ interrupts = ;
+
+ power-domains = <&k2g_pds 0x2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ max-memory-bandwidth = <23000>;
+ };
+
edma0: edma@270 {
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
reg = <0x0270 0x8000>;
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 0/2] ARM: dts: keystone-k2g-evm: Display support
Now that drm/tidss is queued for mainline, lets add display support for k2g-evm. There is no hurry since tidss is out only in v5.7, but it should not harm to have the dts changes in place before that. Jyri Sarha (2): ARM: dts: keystone-k2g: Add DSS node ARM: dts: keystone-k2g-evm: add HDMI video support arch/arm/boot/dts/keystone-k2g-evm.dts | 101 + arch/arm/boot/dts/keystone-k2g.dtsi| 22 ++ 2 files changed, 123 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v9 4/5] drm/tidss: New driver for TI Keystone platform Display SubSystem
This patch adds a new DRM driver for Texas Instruments DSS IPs used on Texas Instruments Keystone K2G, AM65x, and J721e SoCs. The new DSS IP is a major change to the older DSS IP versions, which are supported by the omapdrm driver. While on higher level the Keystone DSS resembles the older DSS versions, the registers are completely different and the internal pipelines differ a lot. DSS IP found on K2G is an "ultra-light" version, and has only a single plane and a single output. The K3 DSS IPs are found on AM65x and J721E SoCs. AM65x DSS has two video ports, one full video plane, and another "lite" plane without scaling support. J721E has 4 video ports, 2 video planes and 2 lite planes. AM65x DSS has also an integrated OLDI (LVDS) output. Version history: v2: - rebased on top of drm-next-2019-11-27 - sort all include lines in all files - remove all include - remove select "select VIDEOMODE_HELPERS" - call dispc_vp_setup() later in tidss_crtc_atomic_flush() (there is no to call it in new modeset case as it is also called in vp_enable()) - change probe sequence and drm_device allocation (follow example in drm_drv.c) - use __maybe_unused instead of #ifdef for pm functions - remove "struct drm_fbdev_cma *fbdev;" from driver data - check panel connector type before connecting it v3: no change v4: no change v5: - remove fifo underflow irq handling, it is not an error and it should be used for debug purposes only - memory tuning, prefetch plane fifo up to high-threshold value to minimize possibility of underflows. v6: - Check CTM and gamma support from dispc_features when creating crtc - Implement CTM support for k2g and fix k3 CTM implementation - Remove gamma property persistence and always write color properties in a new modeset v7: - Fix checkpatch.pl --strict issues - Rebase on top of drm-misc-next-2020-01-10 v8: - Remove idle debug prints from dispc_init() - Add Reviewed-by: Benoit Parrot v9: - Rename dispc_write_irqenable() to dispc_set_irqenable() to avoid conflict exported omapfb function with same name - Add Signed-off-by: Tomi Valkeinen Co-developed-by: Tomi Valkeinen Signed-off-by: Jyri Sarha Acked-by: Sam Ravnborg Reviewed-by: Benoit Parrot Signed-off-by: Tomi Valkeinen --- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki drivers/gpu/drm/Kconfig |2 + drivers/gpu/drm/Makefile |1 + drivers/gpu/drm/tidss/Kconfig | 14 + drivers/gpu/drm/tidss/Makefile| 12 + drivers/gpu/drm/tidss/tidss_crtc.c| 377 +++ drivers/gpu/drm/tidss/tidss_crtc.h| 46 + drivers/gpu/drm/tidss/tidss_dispc.c | 2768 + drivers/gpu/drm/tidss/tidss_dispc.h | 132 + drivers/gpu/drm/tidss/tidss_dispc_regs.h | 243 ++ drivers/gpu/drm/tidss/tidss_drv.c | 285 +++ drivers/gpu/drm/tidss/tidss_drv.h | 39 + drivers/gpu/drm/tidss/tidss_encoder.c | 88 + drivers/gpu/drm/tidss/tidss_encoder.h | 17 + drivers/gpu/drm/tidss/tidss_irq.c | 146 ++ drivers/gpu/drm/tidss/tidss_irq.h | 77 + drivers/gpu/drm/tidss/tidss_kms.c | 249 ++ drivers/gpu/drm/tidss/tidss_kms.h | 15 + drivers/gpu/drm/tidss/tidss_plane.c | 217 ++ drivers/gpu/drm/tidss/tidss_plane.h | 25 + drivers/gpu/drm/tidss/tidss_scale_coefs.c | 202 ++ drivers/gpu/drm/tidss/tidss_scale_coefs.h | 22 + 21 files changed, 4977 insertions(+) create mode 100644 drivers/gpu/drm/tidss/Kconfig create mode 100644 drivers/gpu/drm/tidss/Makefile create mode 100644 drivers/gpu/drm/tidss/tidss_crtc.c create mode 100644 drivers/gpu/drm/tidss/tidss_crtc.h create mode 100644 drivers/gpu/drm/tidss/tidss_dispc.c create mode 100644 drivers/gpu/drm/tidss/tidss_dispc.h create mode 100644 drivers/gpu/drm/tidss/tidss_dispc_regs.h create mode 100644 drivers/gpu/drm/tidss/tidss_drv.c create mode 100644 drivers/gpu/drm/tidss/tidss_drv.h create mode 100644 drivers/gpu/drm/tidss/tidss_encoder.c create mode 100644 drivers/gpu/drm/tidss/tidss_encoder.h create mode 100644 drivers/gpu/drm/tidss/tidss_irq.c create mode 100644 drivers/gpu/drm/tidss/tidss_irq.h create mode 100644 drivers/gpu/drm/tidss/tidss_kms.c create mode 100644 drivers/gpu/drm/tidss/tidss_kms.h create mode 100644 drivers/gpu/drm/tidss/tidss_plane.c create mode 100644 drivers/gpu/drm/tidss/tidss_plane.h create mode 100644 drivers/gpu/drm/tidss/tidss_scale_coefs.c create mode 100644 drivers/gpu/drm/tidss/tidss_scale_coefs.h diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index d0aa6cff2e02..4bffa08f610a 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -389,6 +389,8 @@ source "drivers/gpu/drm/aspeed/Kconfig" source "drivers/gpu/drm/mcde/Kconf
[PATCH v9 5/5] MAINTAINERS: add entry for tidss
Add entry for tidss DRM driver. Version history: v2: no change v3: - Move tidss entry after omapdrm - Add "T: git git://anongit.freedesktop.org/drm/drm-misc" v4: no change v5: no change v6: no change v7: no change v8: - Add Reviewed-by: Benoit Parrot v9: - Add Signed-off-by: Tomi Valkeinen Signed-off-by: Jyri Sarha Reviewed-by: Benoit Parrot Signed-off-by: Tomi Valkeinen --- MAINTAINERS | 11 +++ 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index aa9add598b7d..d8f65dc1dde8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5630,6 +5630,17 @@ S: Maintained F: drivers/gpu/drm/omapdrm/ F: Documentation/devicetree/bindings/display/ti/ +DRM DRIVERS FOR TI KEYSTONE +M: Jyri Sarha +M: Tomi Valkeinen +L: dri-devel@lists.freedesktop.org +S: Maintained +F: drivers/gpu/drm/tidss/ +F: Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml +F: Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +F: Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml +T: git git://anongit.freedesktop.org/drm/drm-misc + DRM DRIVERS FOR V3D M: Eric Anholt S: Supported -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
